3 Broadcom BCM43xx wireless driver
5 Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
6 Stefano Brivio <st3@riseup.net>
7 Michael Buesch <mbuesch@freenet.de>
8 Danny van Dyk <kugelfang@gentoo.org>
9 Andreas Jaggi <andreas.jaggi@waterwave.ch>
11 Some parts of the code in this file are derived from the ipw2200
12 driver Copyright(c) 2003 - 2004 Intel Corporation.
14 This program is free software; you can redistribute it and/or modify
15 it under the terms of the GNU General Public License as published by
16 the Free Software Foundation; either version 2 of the License, or
17 (at your option) any later version.
19 This program is distributed in the hope that it will be useful,
20 but WITHOUT ANY WARRANTY; without even the implied warranty of
21 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 GNU General Public License for more details.
24 You should have received a copy of the GNU General Public License
25 along with this program; see the file COPYING. If not, write to
26 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
27 Boston, MA 02110-1301, USA.
31 #include <linux/delay.h>
32 #include <linux/pci.h>
33 #include <linux/types.h>
36 #include "bcm43xx_phy.h"
37 #include "bcm43xx_main.h"
38 #include "bcm43xx_radio.h"
39 #include "bcm43xx_ilt.h"
40 #include "bcm43xx_power.h"
43 static const s8 bcm43xx_tssi2dbm_b_table[] = {
44 0x4D, 0x4C, 0x4B, 0x4A,
45 0x4A, 0x49, 0x48, 0x47,
46 0x47, 0x46, 0x45, 0x45,
47 0x44, 0x43, 0x42, 0x42,
48 0x41, 0x40, 0x3F, 0x3E,
49 0x3D, 0x3C, 0x3B, 0x3A,
50 0x39, 0x38, 0x37, 0x36,
51 0x35, 0x34, 0x32, 0x31,
52 0x30, 0x2F, 0x2D, 0x2C,
53 0x2B, 0x29, 0x28, 0x26,
54 0x25, 0x23, 0x21, 0x1F,
55 0x1D, 0x1A, 0x17, 0x14,
56 0x10, 0x0C, 0x06, 0x00,
62 static const s8 bcm43xx_tssi2dbm_g_table[] = {
81 static void bcm43xx_phy_initg(struct bcm43xx_private *bcm);
85 void bcm43xx_voluntary_preempt(void)
87 assert(!in_atomic() && !in_irq() &&
88 !in_interrupt() && !irqs_disabled());
89 #ifndef CONFIG_PREEMPT
91 #endif /* CONFIG_PREEMPT */
94 void bcm43xx_raw_phy_lock(struct bcm43xx_private *bcm)
96 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
98 assert(irqs_disabled());
99 if (bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD) == 0x00000000) {
103 if (bcm->current_core->rev < 3) {
104 bcm43xx_mac_suspend(bcm);
105 spin_lock(&phy->lock);
107 if (bcm->ieee->iw_mode != IW_MODE_MASTER)
108 bcm43xx_power_saving_ctl_bits(bcm, -1, 1);
113 void bcm43xx_raw_phy_unlock(struct bcm43xx_private *bcm)
115 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
117 assert(irqs_disabled());
118 if (bcm->current_core->rev < 3) {
119 if (phy->is_locked) {
120 spin_unlock(&phy->lock);
121 bcm43xx_mac_enable(bcm);
124 if (bcm->ieee->iw_mode != IW_MODE_MASTER)
125 bcm43xx_power_saving_ctl_bits(bcm, -1, -1);
130 u16 bcm43xx_phy_read(struct bcm43xx_private *bcm, u16 offset)
132 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_CONTROL, offset);
133 return bcm43xx_read16(bcm, BCM43xx_MMIO_PHY_DATA);
136 void bcm43xx_phy_write(struct bcm43xx_private *bcm, u16 offset, u16 val)
138 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_CONTROL, offset);
140 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_DATA, val);
143 void bcm43xx_phy_calibrate(struct bcm43xx_private *bcm)
145 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
147 bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD); /* Dummy read. */
150 if (phy->type == BCM43xx_PHYTYPE_G && phy->rev == 1) {
151 bcm43xx_wireless_core_reset(bcm, 0);
152 bcm43xx_phy_initg(bcm);
153 bcm43xx_wireless_core_reset(bcm, 1);
159 * http://bcm-specs.sipsolutions.net/SetPHY
161 int bcm43xx_phy_connect(struct bcm43xx_private *bcm, int connect)
163 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
166 if (bcm->current_core->rev < 5)
169 flags = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATEHIGH);
171 if (!(flags & 0x00010000))
173 flags = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATELOW);
174 flags |= (0x800 << 18);
175 bcm43xx_write32(bcm, BCM43xx_CIR_SBTMSTATELOW, flags);
177 if (!(flags & 0x00020000))
179 flags = bcm43xx_read32(bcm, BCM43xx_CIR_SBTMSTATELOW);
180 flags &= ~(0x800 << 18);
181 bcm43xx_write32(bcm, BCM43xx_CIR_SBTMSTATELOW, flags);
184 phy->connected = connect;
186 dprintk(KERN_INFO PFX "PHY connected\n");
188 dprintk(KERN_INFO PFX "PHY disconnected\n");
193 /* intialize B PHY power control
194 * as described in http://bcm-specs.sipsolutions.net/InitPowerControl
196 static void bcm43xx_phy_init_pctl(struct bcm43xx_private *bcm)
198 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
199 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
200 u16 saved_batt = 0, saved_ratt = 0, saved_txctl1 = 0;
201 int must_reset_txpower = 0;
203 assert(phy->type != BCM43xx_PHYTYPE_A);
204 if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) &&
205 (bcm->board_type == 0x0416))
208 bcm43xx_phy_write(bcm, 0x0028, 0x8018);
209 bcm43xx_write16(bcm, 0x03E6, bcm43xx_read16(bcm, 0x03E6) & 0xFFDF);
211 if (phy->type == BCM43xx_PHYTYPE_G) {
214 bcm43xx_phy_write(bcm, 0x047A, 0xC111);
216 if (phy->savedpctlreg != 0xFFFF)
219 if (phy->type == BCM43xx_PHYTYPE_B &&
221 radio->version == 0x2050) {
222 bcm43xx_radio_write16(bcm, 0x0076,
223 bcm43xx_radio_read16(bcm, 0x0076) | 0x0084);
225 saved_batt = radio->baseband_atten;
226 saved_ratt = radio->radio_atten;
227 saved_txctl1 = radio->txctl1;
228 if ((radio->revision >= 6) && (radio->revision <= 8)
229 && /*FIXME: incomplete specs for 5 < revision < 9 */ 0)
230 bcm43xx_radio_set_txpower_bg(bcm, 0xB, 0x1F, 0);
232 bcm43xx_radio_set_txpower_bg(bcm, 0xB, 9, 0);
233 must_reset_txpower = 1;
235 bcm43xx_dummy_transmission(bcm);
237 phy->savedpctlreg = bcm43xx_phy_read(bcm, BCM43xx_PHY_G_PCTL);
239 if (must_reset_txpower)
240 bcm43xx_radio_set_txpower_bg(bcm, saved_batt, saved_ratt, saved_txctl1);
242 bcm43xx_radio_write16(bcm, 0x0076, bcm43xx_radio_read16(bcm, 0x0076) & 0xFF7B);
243 bcm43xx_radio_clear_tssi(bcm);
246 static void bcm43xx_phy_agcsetup(struct bcm43xx_private *bcm)
248 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
254 bcm43xx_ilt_write(bcm, offset, 0x00FE);
255 bcm43xx_ilt_write(bcm, offset + 1, 0x000D);
256 bcm43xx_ilt_write(bcm, offset + 2, 0x0013);
257 bcm43xx_ilt_write(bcm, offset + 3, 0x0019);
260 bcm43xx_ilt_write(bcm, 0x1800, 0x2710);
261 bcm43xx_ilt_write(bcm, 0x1801, 0x9B83);
262 bcm43xx_ilt_write(bcm, 0x1802, 0x9B83);
263 bcm43xx_ilt_write(bcm, 0x1803, 0x0F8D);
264 bcm43xx_phy_write(bcm, 0x0455, 0x0004);
267 bcm43xx_phy_write(bcm, 0x04A5, (bcm43xx_phy_read(bcm, 0x04A5) & 0x00FF) | 0x5700);
268 bcm43xx_phy_write(bcm, 0x041A, (bcm43xx_phy_read(bcm, 0x041A) & 0xFF80) | 0x000F);
269 bcm43xx_phy_write(bcm, 0x041A, (bcm43xx_phy_read(bcm, 0x041A) & 0xC07F) | 0x2B80);
270 bcm43xx_phy_write(bcm, 0x048C, (bcm43xx_phy_read(bcm, 0x048C) & 0xF0FF) | 0x0300);
272 bcm43xx_radio_write16(bcm, 0x007A, bcm43xx_radio_read16(bcm, 0x007A) | 0x0008);
274 bcm43xx_phy_write(bcm, 0x04A0, (bcm43xx_phy_read(bcm, 0x04A0) & 0xFFF0) | 0x0008);
275 bcm43xx_phy_write(bcm, 0x04A1, (bcm43xx_phy_read(bcm, 0x04A1) & 0xF0FF) | 0x0600);
276 bcm43xx_phy_write(bcm, 0x04A2, (bcm43xx_phy_read(bcm, 0x04A2) & 0xF0FF) | 0x0700);
277 bcm43xx_phy_write(bcm, 0x04A0, (bcm43xx_phy_read(bcm, 0x04A0) & 0xF0FF) | 0x0100);
280 bcm43xx_phy_write(bcm, 0x04A2, (bcm43xx_phy_read(bcm, 0x04A2) & 0xFFF0) | 0x0007);
282 bcm43xx_phy_write(bcm, 0x0488, (bcm43xx_phy_read(bcm, 0x0488) & 0xFF00) | 0x001C);
283 bcm43xx_phy_write(bcm, 0x0488, (bcm43xx_phy_read(bcm, 0x0488) & 0xC0FF) | 0x0200);
284 bcm43xx_phy_write(bcm, 0x0496, (bcm43xx_phy_read(bcm, 0x0496) & 0xFF00) | 0x001C);
285 bcm43xx_phy_write(bcm, 0x0489, (bcm43xx_phy_read(bcm, 0x0489) & 0xFF00) | 0x0020);
286 bcm43xx_phy_write(bcm, 0x0489, (bcm43xx_phy_read(bcm, 0x0489) & 0xC0FF) | 0x0200);
287 bcm43xx_phy_write(bcm, 0x0482, (bcm43xx_phy_read(bcm, 0x0482) & 0xFF00) | 0x002E);
288 bcm43xx_phy_write(bcm, 0x0496, (bcm43xx_phy_read(bcm, 0x0496) & 0x00FF) | 0x1A00);
289 bcm43xx_phy_write(bcm, 0x0481, (bcm43xx_phy_read(bcm, 0x0481) & 0xFF00) | 0x0028);
290 bcm43xx_phy_write(bcm, 0x0481, (bcm43xx_phy_read(bcm, 0x0481) & 0x00FF) | 0x2C00);
293 bcm43xx_phy_write(bcm, 0x0430, 0x092B);
294 bcm43xx_phy_write(bcm, 0x041B, (bcm43xx_phy_read(bcm, 0x041B) & 0xFFE1) | 0x0002);
296 bcm43xx_phy_write(bcm, 0x041B, bcm43xx_phy_read(bcm, 0x041B) & 0xFFE1);
297 bcm43xx_phy_write(bcm, 0x041F, 0x287A);
298 bcm43xx_phy_write(bcm, 0x0420, (bcm43xx_phy_read(bcm, 0x0420) & 0xFFF0) | 0x0004);
302 bcm43xx_phy_write(bcm, 0x0422, 0x287A);
303 bcm43xx_phy_write(bcm, 0x0420, (bcm43xx_phy_read(bcm, 0x0420) & 0x0FFF) | 0x3000);
306 bcm43xx_phy_write(bcm, 0x04A8, (bcm43xx_phy_read(bcm, 0x04A8) & 0x8080) | 0x7874);
307 bcm43xx_phy_write(bcm, 0x048E, 0x1C00);
310 bcm43xx_phy_write(bcm, 0x04AB, (bcm43xx_phy_read(bcm, 0x04AB) & 0xF0FF) | 0x0600);
311 bcm43xx_phy_write(bcm, 0x048B, 0x005E);
312 bcm43xx_phy_write(bcm, 0x048C, (bcm43xx_phy_read(bcm, 0x048C) & 0xFF00) | 0x001E);
313 bcm43xx_phy_write(bcm, 0x048D, 0x0002);
316 bcm43xx_ilt_write(bcm, offset + 0x0800, 0);
317 bcm43xx_ilt_write(bcm, offset + 0x0801, 7);
318 bcm43xx_ilt_write(bcm, offset + 0x0802, 16);
319 bcm43xx_ilt_write(bcm, offset + 0x0803, 28);
322 bcm43xx_phy_write(bcm, 0x0426, (bcm43xx_phy_read(bcm, 0x0426)
324 bcm43xx_phy_write(bcm, 0x0426, (bcm43xx_phy_read(bcm, 0x0426)
329 static void bcm43xx_phy_setupg(struct bcm43xx_private *bcm)
331 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
334 assert(phy->type == BCM43xx_PHYTYPE_G);
336 bcm43xx_phy_write(bcm, 0x0406, 0x4F19);
337 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS,
338 (bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS) & 0xFC3F) | 0x0340);
339 bcm43xx_phy_write(bcm, 0x042C, 0x005A);
340 bcm43xx_phy_write(bcm, 0x0427, 0x001A);
342 for (i = 0; i < BCM43xx_ILT_FINEFREQG_SIZE; i++)
343 bcm43xx_ilt_write(bcm, 0x5800 + i, bcm43xx_ilt_finefreqg[i]);
344 for (i = 0; i < BCM43xx_ILT_NOISEG1_SIZE; i++)
345 bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noiseg1[i]);
346 for (i = 0; i < BCM43xx_ILT_ROTOR_SIZE; i++)
347 bcm43xx_ilt_write32(bcm, 0x2000 + i, bcm43xx_ilt_rotor[i]);
349 /* nrssi values are signed 6-bit values. Not sure why we write 0x7654 here... */
350 bcm43xx_nrssi_hw_write(bcm, 0xBA98, (s16)0x7654);
353 bcm43xx_phy_write(bcm, 0x04C0, 0x1861);
354 bcm43xx_phy_write(bcm, 0x04C1, 0x0271);
355 } else if (phy->rev > 2) {
356 bcm43xx_phy_write(bcm, 0x04C0, 0x0098);
357 bcm43xx_phy_write(bcm, 0x04C1, 0x0070);
358 bcm43xx_phy_write(bcm, 0x04C9, 0x0080);
360 bcm43xx_phy_write(bcm, 0x042B, bcm43xx_phy_read(bcm, 0x042B) | 0x800);
362 for (i = 0; i < 64; i++)
363 bcm43xx_ilt_write(bcm, 0x4000 + i, i);
364 for (i = 0; i < BCM43xx_ILT_NOISEG2_SIZE; i++)
365 bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noiseg2[i]);
369 for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)
370 bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg1[i]);
371 else if ((phy->rev >= 7) && (bcm43xx_phy_read(bcm, 0x0449) & 0x0200))
372 for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)
373 bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg3[i]);
375 for (i = 0; i < BCM43xx_ILT_NOISESCALEG_SIZE; i++)
376 bcm43xx_ilt_write(bcm, 0x1400 + i, bcm43xx_ilt_noisescaleg2[i]);
379 for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)
380 bcm43xx_ilt_write(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr1[i]);
381 else if ((phy->rev > 2) && (phy->rev <= 8))
382 for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)
383 bcm43xx_ilt_write(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr2[i]);
386 for (i = 0; i < BCM43xx_ILT_RETARD_SIZE; i++)
387 bcm43xx_ilt_write32(bcm, 0x2400 + i, bcm43xx_ilt_retard[i]);
388 for (i = 0; i < 4; i++) {
389 bcm43xx_ilt_write(bcm, 0x5404 + i, 0x0020);
390 bcm43xx_ilt_write(bcm, 0x5408 + i, 0x0020);
391 bcm43xx_ilt_write(bcm, 0x540C + i, 0x0020);
392 bcm43xx_ilt_write(bcm, 0x5410 + i, 0x0020);
394 bcm43xx_phy_agcsetup(bcm);
396 if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) &&
397 (bcm->board_type == 0x0416) &&
398 (bcm->board_revision == 0x0017))
401 bcm43xx_ilt_write(bcm, 0x5001, 0x0002);
402 bcm43xx_ilt_write(bcm, 0x5002, 0x0001);
404 for (i = 0; i <= 0x2F; i++)
405 bcm43xx_ilt_write(bcm, 0x1000 + i, 0x0820);
406 bcm43xx_phy_agcsetup(bcm);
407 bcm43xx_phy_read(bcm, 0x0400); /* dummy read */
408 bcm43xx_phy_write(bcm, 0x0403, 0x1000);
409 bcm43xx_ilt_write(bcm, 0x3C02, 0x000F);
410 bcm43xx_ilt_write(bcm, 0x3C03, 0x0014);
412 if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM) &&
413 (bcm->board_type == 0x0416) &&
414 (bcm->board_revision == 0x0017))
417 bcm43xx_ilt_write(bcm, 0x0401, 0x0002);
418 bcm43xx_ilt_write(bcm, 0x0402, 0x0001);
422 /* Initialize the noisescaletable for APHY */
423 static void bcm43xx_phy_init_noisescaletbl(struct bcm43xx_private *bcm)
425 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
428 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_CTRL, 0x1400);
429 for (i = 0; i < 12; i++) {
431 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x6767);
433 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x2323);
436 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x6700);
438 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x2300);
439 for (i = 0; i < 11; i++) {
441 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x6767);
443 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x2323);
446 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x0067);
448 bcm43xx_phy_write(bcm, BCM43xx_PHY_ILT_A_DATA1, 0x0023);
451 static void bcm43xx_phy_setupa(struct bcm43xx_private *bcm)
453 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
456 assert(phy->type == BCM43xx_PHYTYPE_A);
459 bcm43xx_phy_write(bcm, 0x008E, 0x3800);
460 bcm43xx_phy_write(bcm, 0x0035, 0x03FF);
461 bcm43xx_phy_write(bcm, 0x0036, 0x0400);
463 bcm43xx_ilt_write(bcm, 0x3807, 0x0051);
465 bcm43xx_phy_write(bcm, 0x001C, 0x0FF9);
466 bcm43xx_phy_write(bcm, 0x0020, bcm43xx_phy_read(bcm, 0x0020) & 0xFF0F);
467 bcm43xx_ilt_write(bcm, 0x3C0C, 0x07BF);
468 bcm43xx_radio_write16(bcm, 0x0002, 0x07BF);
470 bcm43xx_phy_write(bcm, 0x0024, 0x4680);
471 bcm43xx_phy_write(bcm, 0x0020, 0x0003);
472 bcm43xx_phy_write(bcm, 0x001D, 0x0F40);
473 bcm43xx_phy_write(bcm, 0x001F, 0x1C00);
475 bcm43xx_phy_write(bcm, 0x002A, (bcm43xx_phy_read(bcm, 0x002A) & 0x00FF) | 0x0400);
476 bcm43xx_phy_write(bcm, 0x002B, bcm43xx_phy_read(bcm, 0x002B) & 0xFBFF);
477 bcm43xx_phy_write(bcm, 0x008E, 0x58C1);
479 bcm43xx_ilt_write(bcm, 0x0803, 0x000F);
480 bcm43xx_ilt_write(bcm, 0x0804, 0x001F);
481 bcm43xx_ilt_write(bcm, 0x0805, 0x002A);
482 bcm43xx_ilt_write(bcm, 0x0805, 0x0030);
483 bcm43xx_ilt_write(bcm, 0x0807, 0x003A);
485 bcm43xx_ilt_write(bcm, 0x0000, 0x0013);
486 bcm43xx_ilt_write(bcm, 0x0001, 0x0013);
487 bcm43xx_ilt_write(bcm, 0x0002, 0x0013);
488 bcm43xx_ilt_write(bcm, 0x0003, 0x0013);
489 bcm43xx_ilt_write(bcm, 0x0004, 0x0015);
490 bcm43xx_ilt_write(bcm, 0x0005, 0x0015);
491 bcm43xx_ilt_write(bcm, 0x0006, 0x0019);
493 bcm43xx_ilt_write(bcm, 0x0404, 0x0003);
494 bcm43xx_ilt_write(bcm, 0x0405, 0x0003);
495 bcm43xx_ilt_write(bcm, 0x0406, 0x0007);
497 for (i = 0; i < 16; i++)
498 bcm43xx_ilt_write(bcm, 0x4000 + i, (0x8 + i) & 0x000F);
500 bcm43xx_ilt_write(bcm, 0x3003, 0x1044);
501 bcm43xx_ilt_write(bcm, 0x3004, 0x7201);
502 bcm43xx_ilt_write(bcm, 0x3006, 0x0040);
503 bcm43xx_ilt_write(bcm, 0x3001, (bcm43xx_ilt_read(bcm, 0x3001) & 0x0010) | 0x0008);
505 for (i = 0; i < BCM43xx_ILT_FINEFREQA_SIZE; i++)
506 bcm43xx_ilt_write(bcm, 0x5800 + i, bcm43xx_ilt_finefreqa[i]);
507 for (i = 0; i < BCM43xx_ILT_NOISEA2_SIZE; i++)
508 bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noisea2[i]);
509 for (i = 0; i < BCM43xx_ILT_ROTOR_SIZE; i++)
510 bcm43xx_ilt_write32(bcm, 0x2000 + i, bcm43xx_ilt_rotor[i]);
511 bcm43xx_phy_init_noisescaletbl(bcm);
512 for (i = 0; i < BCM43xx_ILT_RETARD_SIZE; i++)
513 bcm43xx_ilt_write32(bcm, 0x2400 + i, bcm43xx_ilt_retard[i]);
516 for (i = 0; i < 64; i++)
517 bcm43xx_ilt_write(bcm, 0x4000 + i, i);
519 bcm43xx_ilt_write(bcm, 0x3807, 0x0051);
521 bcm43xx_phy_write(bcm, 0x001C, 0x0FF9);
522 bcm43xx_phy_write(bcm, 0x0020, bcm43xx_phy_read(bcm, 0x0020) & 0xFF0F);
523 bcm43xx_radio_write16(bcm, 0x0002, 0x07BF);
525 bcm43xx_phy_write(bcm, 0x0024, 0x4680);
526 bcm43xx_phy_write(bcm, 0x0020, 0x0003);
527 bcm43xx_phy_write(bcm, 0x001D, 0x0F40);
528 bcm43xx_phy_write(bcm, 0x001F, 0x1C00);
529 bcm43xx_phy_write(bcm, 0x002A, (bcm43xx_phy_read(bcm, 0x002A) & 0x00FF) | 0x0400);
531 bcm43xx_ilt_write(bcm, 0x3001, (bcm43xx_ilt_read(bcm, 0x3001) & 0x0010) | 0x0008);
532 for (i = 0; i < BCM43xx_ILT_NOISEA3_SIZE; i++)
533 bcm43xx_ilt_write(bcm, 0x1800 + i, bcm43xx_ilt_noisea3[i]);
534 bcm43xx_phy_init_noisescaletbl(bcm);
535 for (i = 0; i < BCM43xx_ILT_SIGMASQR_SIZE; i++)
536 bcm43xx_ilt_write(bcm, 0x5000 + i, bcm43xx_ilt_sigmasqr1[i]);
538 bcm43xx_phy_write(bcm, 0x0003, 0x1808);
540 bcm43xx_ilt_write(bcm, 0x0803, 0x000F);
541 bcm43xx_ilt_write(bcm, 0x0804, 0x001F);
542 bcm43xx_ilt_write(bcm, 0x0805, 0x002A);
543 bcm43xx_ilt_write(bcm, 0x0805, 0x0030);
544 bcm43xx_ilt_write(bcm, 0x0807, 0x003A);
546 bcm43xx_ilt_write(bcm, 0x0000, 0x0013);
547 bcm43xx_ilt_write(bcm, 0x0001, 0x0013);
548 bcm43xx_ilt_write(bcm, 0x0002, 0x0013);
549 bcm43xx_ilt_write(bcm, 0x0003, 0x0013);
550 bcm43xx_ilt_write(bcm, 0x0004, 0x0015);
551 bcm43xx_ilt_write(bcm, 0x0005, 0x0015);
552 bcm43xx_ilt_write(bcm, 0x0006, 0x0019);
554 bcm43xx_ilt_write(bcm, 0x0404, 0x0003);
555 bcm43xx_ilt_write(bcm, 0x0405, 0x0003);
556 bcm43xx_ilt_write(bcm, 0x0406, 0x0007);
558 bcm43xx_ilt_write(bcm, 0x3C02, 0x000F);
559 bcm43xx_ilt_write(bcm, 0x3C03, 0x0014);
566 /* Initialize APHY. This is also called for the GPHY in some cases. */
567 static void bcm43xx_phy_inita(struct bcm43xx_private *bcm)
569 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
570 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
573 if (phy->type == BCM43xx_PHYTYPE_A) {
574 bcm43xx_phy_setupa(bcm);
576 bcm43xx_phy_setupg(bcm);
577 if (bcm->sprom.boardflags & BCM43xx_BFL_PACTRL)
578 bcm43xx_phy_write(bcm, 0x046E, 0x03CF);
582 bcm43xx_phy_write(bcm, BCM43xx_PHY_A_CRS,
583 (bcm43xx_phy_read(bcm, BCM43xx_PHY_A_CRS) & 0xF83C) | 0x0340);
584 bcm43xx_phy_write(bcm, 0x0034, 0x0001);
586 TODO();//TODO: RSSI AGC
587 bcm43xx_phy_write(bcm, BCM43xx_PHY_A_CRS,
588 bcm43xx_phy_read(bcm, BCM43xx_PHY_A_CRS) | (1 << 14));
589 bcm43xx_radio_init2060(bcm);
591 if ((bcm->board_vendor == PCI_VENDOR_ID_BROADCOM)
592 && ((bcm->board_type == 0x0416) || (bcm->board_type == 0x040A))) {
593 if (radio->lofcal == 0xFFFF) {
594 TODO();//TODO: LOF Cal
595 bcm43xx_radio_set_tx_iq(bcm);
597 bcm43xx_radio_write16(bcm, 0x001E, radio->lofcal);
600 bcm43xx_phy_write(bcm, 0x007A, 0xF111);
602 if (phy->savedpctlreg == 0xFFFF) {
603 bcm43xx_radio_write16(bcm, 0x0019, 0x0000);
604 bcm43xx_radio_write16(bcm, 0x0017, 0x0020);
606 tval = bcm43xx_ilt_read(bcm, 0x3001);
608 bcm43xx_ilt_write(bcm, 0x3001,
609 (bcm43xx_ilt_read(bcm, 0x3001) & 0xFF87)
612 bcm43xx_ilt_write(bcm, 0x3001,
613 (bcm43xx_ilt_read(bcm, 0x3001) & 0xFFC3)
616 bcm43xx_dummy_transmission(bcm);
617 phy->savedpctlreg = bcm43xx_phy_read(bcm, BCM43xx_PHY_A_PCTL);
618 bcm43xx_ilt_write(bcm, 0x3001, tval);
620 bcm43xx_radio_set_txpower_a(bcm, 0x0018);
622 bcm43xx_radio_clear_tssi(bcm);
625 static void bcm43xx_phy_initb2(struct bcm43xx_private *bcm)
627 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
630 bcm43xx_write16(bcm, 0x03EC, 0x3F22);
631 bcm43xx_phy_write(bcm, 0x0020, 0x301C);
632 bcm43xx_phy_write(bcm, 0x0026, 0x0000);
633 bcm43xx_phy_write(bcm, 0x0030, 0x00C6);
634 bcm43xx_phy_write(bcm, 0x0088, 0x3E00);
636 for (offset = 0x0089; offset < 0x00A7; offset++) {
637 bcm43xx_phy_write(bcm, offset, val);
640 bcm43xx_phy_write(bcm, 0x03E4, 0x3000);
641 if (radio->channel == 0xFF)
642 bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 0);
644 bcm43xx_radio_selectchannel(bcm, radio->channel, 0);
645 if (radio->version != 0x2050) {
646 bcm43xx_radio_write16(bcm, 0x0075, 0x0080);
647 bcm43xx_radio_write16(bcm, 0x0079, 0x0081);
649 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
650 bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
651 if (radio->version == 0x2050) {
652 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
653 bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
654 bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
655 bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
656 bcm43xx_radio_write16(bcm, 0x007A, 0x000F);
657 bcm43xx_phy_write(bcm, 0x0038, 0x0677);
658 bcm43xx_radio_init2050(bcm);
660 bcm43xx_phy_write(bcm, 0x0014, 0x0080);
661 bcm43xx_phy_write(bcm, 0x0032, 0x00CA);
662 bcm43xx_phy_write(bcm, 0x0032, 0x00CC);
663 bcm43xx_phy_write(bcm, 0x0035, 0x07C2);
664 bcm43xx_phy_lo_b_measure(bcm);
665 bcm43xx_phy_write(bcm, 0x0026, 0xCC00);
666 if (radio->version != 0x2050)
667 bcm43xx_phy_write(bcm, 0x0026, 0xCE00);
668 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, 0x1000);
669 bcm43xx_phy_write(bcm, 0x002A, 0x88A3);
670 if (radio->version != 0x2050)
671 bcm43xx_phy_write(bcm, 0x002A, 0x88C2);
672 bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
673 bcm43xx_phy_init_pctl(bcm);
676 static void bcm43xx_phy_initb4(struct bcm43xx_private *bcm)
678 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
681 bcm43xx_write16(bcm, 0x03EC, 0x3F22);
682 bcm43xx_phy_write(bcm, 0x0020, 0x301C);
683 bcm43xx_phy_write(bcm, 0x0026, 0x0000);
684 bcm43xx_phy_write(bcm, 0x0030, 0x00C6);
685 bcm43xx_phy_write(bcm, 0x0088, 0x3E00);
687 for (offset = 0x0089; offset < 0x00A7; offset++) {
688 bcm43xx_phy_write(bcm, offset, val);
691 bcm43xx_phy_write(bcm, 0x03E4, 0x3000);
692 if (radio->channel == 0xFF)
693 bcm43xx_radio_selectchannel(bcm, BCM43xx_RADIO_DEFAULT_CHANNEL_BG, 0);
695 bcm43xx_radio_selectchannel(bcm, radio->channel, 0);
696 if (radio->version != 0x2050) {
697 bcm43xx_radio_write16(bcm, 0x0075, 0x0080);
698 bcm43xx_radio_write16(bcm, 0x0079, 0x0081);
700 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
701 bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
702 if (radio->version == 0x2050) {
703 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
704 bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
705 bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
706 bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
707 bcm43xx_radio_write16(bcm, 0x007A, 0x000F);
708 bcm43xx_phy_write(bcm, 0x0038, 0x0677);
709 bcm43xx_radio_init2050(bcm);
711 bcm43xx_phy_write(bcm, 0x0014, 0x0080);
712 bcm43xx_phy_write(bcm, 0x0032, 0x00CA);
713 if (radio->version == 0x2050)
714 bcm43xx_phy_write(bcm, 0x0032, 0x00E0);
715 bcm43xx_phy_write(bcm, 0x0035, 0x07C2);
717 bcm43xx_phy_lo_b_measure(bcm);
719 bcm43xx_phy_write(bcm, 0x0026, 0xCC00);
720 if (radio->version == 0x2050)
721 bcm43xx_phy_write(bcm, 0x0026, 0xCE00);
722 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, 0x1100);
723 bcm43xx_phy_write(bcm, 0x002A, 0x88A3);
724 if (radio->version == 0x2050)
725 bcm43xx_phy_write(bcm, 0x002A, 0x88C2);
726 bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
727 if (bcm->sprom.boardflags & BCM43xx_BFL_RSSI) {
728 bcm43xx_calc_nrssi_slope(bcm);
729 bcm43xx_calc_nrssi_threshold(bcm);
731 bcm43xx_phy_init_pctl(bcm);
734 static void bcm43xx_phy_initb5(struct bcm43xx_private *bcm)
736 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
737 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
742 if (phy->analog == 1)
743 bcm43xx_radio_write16(bcm, 0x007A,
744 bcm43xx_radio_read16(bcm, 0x007A)
746 if ((bcm->board_vendor != PCI_VENDOR_ID_BROADCOM) &&
747 (bcm->board_type != 0x0416)) {
749 for (offset = 0x00A8 ; offset < 0x00C7; offset++) {
750 bcm43xx_phy_write(bcm, offset, value);
754 bcm43xx_phy_write(bcm, 0x0035,
755 (bcm43xx_phy_read(bcm, 0x0035) & 0xF0FF)
757 if (radio->version == 0x2050)
758 bcm43xx_phy_write(bcm, 0x0038, 0x0667);
760 if (phy->connected) {
761 if (radio->version == 0x2050) {
762 bcm43xx_radio_write16(bcm, 0x007A,
763 bcm43xx_radio_read16(bcm, 0x007A)
765 bcm43xx_radio_write16(bcm, 0x0051,
766 bcm43xx_radio_read16(bcm, 0x0051)
769 bcm43xx_write16(bcm, BCM43xx_MMIO_PHY_RADIO, 0x0000);
771 bcm43xx_phy_write(bcm, 0x0802, bcm43xx_phy_read(bcm, 0x0802) | 0x0100);
772 bcm43xx_phy_write(bcm, 0x042B, bcm43xx_phy_read(bcm, 0x042B) | 0x2000);
774 bcm43xx_phy_write(bcm, 0x001C, 0x186A);
776 bcm43xx_phy_write(bcm, 0x0013, (bcm43xx_phy_read(bcm, 0x0013) & 0x00FF) | 0x1900);
777 bcm43xx_phy_write(bcm, 0x0035, (bcm43xx_phy_read(bcm, 0x0035) & 0xFFC0) | 0x0064);
778 bcm43xx_phy_write(bcm, 0x005D, (bcm43xx_phy_read(bcm, 0x005D) & 0xFF80) | 0x000A);
781 if (bcm->bad_frames_preempt) {
782 bcm43xx_phy_write(bcm, BCM43xx_PHY_RADIO_BITFIELD,
783 bcm43xx_phy_read(bcm, BCM43xx_PHY_RADIO_BITFIELD) | (1 << 11));
786 if (phy->analog == 1) {
787 bcm43xx_phy_write(bcm, 0x0026, 0xCE00);
788 bcm43xx_phy_write(bcm, 0x0021, 0x3763);
789 bcm43xx_phy_write(bcm, 0x0022, 0x1BC3);
790 bcm43xx_phy_write(bcm, 0x0023, 0x06F9);
791 bcm43xx_phy_write(bcm, 0x0024, 0x037E);
793 bcm43xx_phy_write(bcm, 0x0026, 0xCC00);
794 bcm43xx_phy_write(bcm, 0x0030, 0x00C6);
795 bcm43xx_write16(bcm, 0x03EC, 0x3F22);
797 if (phy->analog == 1)
798 bcm43xx_phy_write(bcm, 0x0020, 0x3E1C);
800 bcm43xx_phy_write(bcm, 0x0020, 0x301C);
802 if (phy->analog == 0)
803 bcm43xx_write16(bcm, 0x03E4, 0x3000);
805 old_channel = radio->channel;
806 /* Force to channel 7, even if not supported. */
807 bcm43xx_radio_selectchannel(bcm, 7, 0);
809 if (radio->version != 0x2050) {
810 bcm43xx_radio_write16(bcm, 0x0075, 0x0080);
811 bcm43xx_radio_write16(bcm, 0x0079, 0x0081);
814 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
815 bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
817 if (radio->version == 0x2050) {
818 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
819 bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
822 bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
823 bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
825 bcm43xx_radio_write16(bcm, 0x007A, bcm43xx_radio_read16(bcm, 0x007A) | 0x0007);
827 bcm43xx_radio_selectchannel(bcm, old_channel, 0);
829 bcm43xx_phy_write(bcm, 0x0014, 0x0080);
830 bcm43xx_phy_write(bcm, 0x0032, 0x00CA);
831 bcm43xx_phy_write(bcm, 0x002A, 0x88A3);
833 bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
835 if (radio->version == 0x2050)
836 bcm43xx_radio_write16(bcm, 0x005D, 0x000D);
838 bcm43xx_write16(bcm, 0x03E4, (bcm43xx_read16(bcm, 0x03E4) & 0xFFC0) | 0x0004);
841 static void bcm43xx_phy_initb6(struct bcm43xx_private *bcm)
843 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
844 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
848 bcm43xx_phy_write(bcm, 0x003E, 0x817A);
849 bcm43xx_radio_write16(bcm, 0x007A,
850 (bcm43xx_radio_read16(bcm, 0x007A) | 0x0058));
851 if (radio->revision == 4 ||
852 radio->revision == 5) {
853 bcm43xx_radio_write16(bcm, 0x0051, 0x0037);
854 bcm43xx_radio_write16(bcm, 0x0052, 0x0070);
855 bcm43xx_radio_write16(bcm, 0x0053, 0x00B3);
856 bcm43xx_radio_write16(bcm, 0x0054, 0x009B);
857 bcm43xx_radio_write16(bcm, 0x005A, 0x0088);
858 bcm43xx_radio_write16(bcm, 0x005B, 0x0088);
859 bcm43xx_radio_write16(bcm, 0x005D, 0x0088);
860 bcm43xx_radio_write16(bcm, 0x005E, 0x0088);
861 bcm43xx_radio_write16(bcm, 0x007D, 0x0088);
862 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
863 BCM43xx_UCODEFLAGS_OFFSET,
864 (bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
865 BCM43xx_UCODEFLAGS_OFFSET)
868 if (radio->revision == 8) {
869 bcm43xx_radio_write16(bcm, 0x0051, 0x0000);
870 bcm43xx_radio_write16(bcm, 0x0052, 0x0040);
871 bcm43xx_radio_write16(bcm, 0x0053, 0x00B7);
872 bcm43xx_radio_write16(bcm, 0x0054, 0x0098);
873 bcm43xx_radio_write16(bcm, 0x005A, 0x0088);
874 bcm43xx_radio_write16(bcm, 0x005B, 0x006B);
875 bcm43xx_radio_write16(bcm, 0x005C, 0x000F);
876 if (bcm->sprom.boardflags & 0x8000) {
877 bcm43xx_radio_write16(bcm, 0x005D, 0x00FA);
878 bcm43xx_radio_write16(bcm, 0x005E, 0x00D8);
880 bcm43xx_radio_write16(bcm, 0x005D, 0x00F5);
881 bcm43xx_radio_write16(bcm, 0x005E, 0x00B8);
883 bcm43xx_radio_write16(bcm, 0x0073, 0x0003);
884 bcm43xx_radio_write16(bcm, 0x007D, 0x00A8);
885 bcm43xx_radio_write16(bcm, 0x007C, 0x0001);
886 bcm43xx_radio_write16(bcm, 0x007E, 0x0008);
889 for (offset = 0x0088; offset < 0x0098; offset++) {
890 bcm43xx_phy_write(bcm, offset, val);
894 for (offset = 0x0098; offset < 0x00A8; offset++) {
895 bcm43xx_phy_write(bcm, offset, val);
899 for (offset = 0x00A8; offset < 0x00C8; offset++) {
900 bcm43xx_phy_write(bcm, offset, (val & 0x3F3F));
903 if (phy->type == BCM43xx_PHYTYPE_G) {
904 bcm43xx_radio_write16(bcm, 0x007A,
905 bcm43xx_radio_read16(bcm, 0x007A) | 0x0020);
906 bcm43xx_radio_write16(bcm, 0x0051,
907 bcm43xx_radio_read16(bcm, 0x0051) | 0x0004);
908 bcm43xx_phy_write(bcm, 0x0802,
909 bcm43xx_phy_read(bcm, 0x0802) | 0x0100);
910 bcm43xx_phy_write(bcm, 0x042B,
911 bcm43xx_phy_read(bcm, 0x042B) | 0x2000);
912 bcm43xx_phy_write(bcm, 0x5B, 0x0000);
913 bcm43xx_phy_write(bcm, 0x5C, 0x0000);
916 old_channel = radio->channel;
917 if (old_channel >= 8)
918 bcm43xx_radio_selectchannel(bcm, 1, 0);
920 bcm43xx_radio_selectchannel(bcm, 13, 0);
922 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
923 bcm43xx_radio_write16(bcm, 0x0050, 0x0023);
925 if (radio->revision < 6 || radio-> revision == 8) {
926 bcm43xx_radio_write16(bcm, 0x007C, (bcm43xx_radio_read16(bcm, 0x007C)
928 bcm43xx_radio_write16(bcm, 0x0050, 0x0020);
930 if (radio->revision <= 2) {
931 bcm43xx_radio_write16(bcm, 0x007C, 0x0020);
932 bcm43xx_radio_write16(bcm, 0x005A, 0x0070);
933 bcm43xx_radio_write16(bcm, 0x005B, 0x007B);
934 bcm43xx_radio_write16(bcm, 0x005C, 0x00B0);
936 bcm43xx_radio_write16(bcm, 0x007A,
937 (bcm43xx_radio_read16(bcm, 0x007A) & 0x00F8) | 0x0007);
939 bcm43xx_radio_selectchannel(bcm, old_channel, 0);
941 bcm43xx_phy_write(bcm, 0x0014, 0x0200);
942 if (radio->revision >= 6)
943 bcm43xx_phy_write(bcm, 0x002A, 0x88C2);
945 bcm43xx_phy_write(bcm, 0x002A, 0x8AC0);
946 bcm43xx_phy_write(bcm, 0x0038, 0x0668);
947 bcm43xx_radio_set_txpower_bg(bcm, 0xFFFF, 0xFFFF, 0xFFFF);
948 if (radio->revision <= 5)
949 bcm43xx_phy_write(bcm, 0x005D, (bcm43xx_phy_read(bcm, 0x005D)
951 if (radio->revision <= 2)
952 bcm43xx_radio_write16(bcm, 0x005D, 0x000D);
954 if (phy->analog == 4){
955 bcm43xx_write16(bcm, 0x03E4, 0x0009);
956 bcm43xx_phy_write(bcm, 0x61, bcm43xx_phy_read(bcm, 0x61) & 0xFFF);
958 bcm43xx_phy_write(bcm, 0x0002, (bcm43xx_phy_read(bcm, 0x0002) & 0xFFC0) | 0x0004);
960 if (phy->type == BCM43xx_PHYTYPE_G)
961 bcm43xx_write16(bcm, 0x03E6, 0x0);
962 if (phy->type == BCM43xx_PHYTYPE_B) {
963 bcm43xx_write16(bcm, 0x03E6, 0x8140);
964 bcm43xx_phy_write(bcm, 0x0016, 0x0410);
965 bcm43xx_phy_write(bcm, 0x0017, 0x0820);
966 bcm43xx_phy_write(bcm, 0x0062, 0x0007);
967 bcm43xx_radio_init2050(bcm);
968 bcm43xx_phy_lo_g_measure(bcm);
969 if (bcm->sprom.boardflags & BCM43xx_BFL_RSSI) {
970 bcm43xx_calc_nrssi_slope(bcm);
971 bcm43xx_calc_nrssi_threshold(bcm);
973 bcm43xx_phy_init_pctl(bcm);
977 static void bcm43xx_calc_loopback_gain(struct bcm43xx_private *bcm)
979 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
980 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
981 u16 backup_phy[15] = {0};
985 u16 loop1_cnt, loop1_done, loop1_omitted;
988 backup_phy[0] = bcm43xx_phy_read(bcm, 0x0429);
989 backup_phy[1] = bcm43xx_phy_read(bcm, 0x0001);
990 backup_phy[2] = bcm43xx_phy_read(bcm, 0x0811);
991 backup_phy[3] = bcm43xx_phy_read(bcm, 0x0812);
993 backup_phy[4] = bcm43xx_phy_read(bcm, 0x0814);
994 backup_phy[5] = bcm43xx_phy_read(bcm, 0x0815);
996 backup_phy[6] = bcm43xx_phy_read(bcm, 0x005A);
997 backup_phy[7] = bcm43xx_phy_read(bcm, 0x0059);
998 backup_phy[8] = bcm43xx_phy_read(bcm, 0x0058);
999 backup_phy[9] = bcm43xx_phy_read(bcm, 0x000A);
1000 backup_phy[10] = bcm43xx_phy_read(bcm, 0x0003);
1001 backup_phy[11] = bcm43xx_phy_read(bcm, 0x080F);
1002 backup_phy[12] = bcm43xx_phy_read(bcm, 0x0810);
1003 backup_phy[13] = bcm43xx_phy_read(bcm, 0x002B);
1004 backup_phy[14] = bcm43xx_phy_read(bcm, 0x0015);
1005 bcm43xx_phy_read(bcm, 0x002D); /* dummy read */
1006 backup_bband = radio->baseband_atten;
1007 backup_radio[0] = bcm43xx_radio_read16(bcm, 0x0052);
1008 backup_radio[1] = bcm43xx_radio_read16(bcm, 0x0043);
1009 backup_radio[2] = bcm43xx_radio_read16(bcm, 0x007A);
1011 bcm43xx_phy_write(bcm, 0x0429,
1012 bcm43xx_phy_read(bcm, 0x0429) & 0x3FFF);
1013 bcm43xx_phy_write(bcm, 0x0001,
1014 bcm43xx_phy_read(bcm, 0x0001) & 0x8000);
1015 bcm43xx_phy_write(bcm, 0x0811,
1016 bcm43xx_phy_read(bcm, 0x0811) | 0x0002);
1017 bcm43xx_phy_write(bcm, 0x0812,
1018 bcm43xx_phy_read(bcm, 0x0812) & 0xFFFD);
1019 bcm43xx_phy_write(bcm, 0x0811,
1020 bcm43xx_phy_read(bcm, 0x0811) | 0x0001);
1021 bcm43xx_phy_write(bcm, 0x0812,
1022 bcm43xx_phy_read(bcm, 0x0812) & 0xFFFE);
1023 if (phy->rev != 1) {
1024 bcm43xx_phy_write(bcm, 0x0814,
1025 bcm43xx_phy_read(bcm, 0x0814) | 0x0001);
1026 bcm43xx_phy_write(bcm, 0x0815,
1027 bcm43xx_phy_read(bcm, 0x0815) & 0xFFFE);
1028 bcm43xx_phy_write(bcm, 0x0814,
1029 bcm43xx_phy_read(bcm, 0x0814) | 0x0002);
1030 bcm43xx_phy_write(bcm, 0x0815,
1031 bcm43xx_phy_read(bcm, 0x0815) & 0xFFFD);
1033 bcm43xx_phy_write(bcm, 0x0811,
1034 bcm43xx_phy_read(bcm, 0x0811) | 0x000C);
1035 bcm43xx_phy_write(bcm, 0x0812,
1036 bcm43xx_phy_read(bcm, 0x0812) | 0x000C);
1038 bcm43xx_phy_write(bcm, 0x0811,
1039 (bcm43xx_phy_read(bcm, 0x0811)
1040 & 0xFFCF) | 0x0030);
1041 bcm43xx_phy_write(bcm, 0x0812,
1042 (bcm43xx_phy_read(bcm, 0x0812)
1043 & 0xFFCF) | 0x0010);
1045 bcm43xx_phy_write(bcm, 0x005A, 0x0780);
1046 bcm43xx_phy_write(bcm, 0x0059, 0xC810);
1047 bcm43xx_phy_write(bcm, 0x0058, 0x000D);
1048 if (phy->analog == 0) {
1049 bcm43xx_phy_write(bcm, 0x0003, 0x0122);
1051 bcm43xx_phy_write(bcm, 0x000A,
1052 bcm43xx_phy_read(bcm, 0x000A)
1055 if (phy->rev != 1) {
1056 bcm43xx_phy_write(bcm, 0x0814,
1057 bcm43xx_phy_read(bcm, 0x0814) | 0x0004);
1058 bcm43xx_phy_write(bcm, 0x0815,
1059 bcm43xx_phy_read(bcm, 0x0815) & 0xFFFB);
1061 bcm43xx_phy_write(bcm, 0x0003,
1062 (bcm43xx_phy_read(bcm, 0x0003)
1063 & 0xFF9F) | 0x0040);
1064 if (radio->version == 0x2050 && radio->revision == 2) {
1065 bcm43xx_radio_write16(bcm, 0x0052, 0x0000);
1066 bcm43xx_radio_write16(bcm, 0x0043,
1067 (bcm43xx_radio_read16(bcm, 0x0043)
1068 & 0xFFF0) | 0x0009);
1070 } else if (radio->revision == 8) {
1071 bcm43xx_radio_write16(bcm, 0x0043, 0x000F);
1076 bcm43xx_phy_set_baseband_attenuation(bcm, 11);
1079 bcm43xx_phy_write(bcm, 0x080F, 0xC020);
1081 bcm43xx_phy_write(bcm, 0x080F, 0x8020);
1082 bcm43xx_phy_write(bcm, 0x0810, 0x0000);
1084 bcm43xx_phy_write(bcm, 0x002B,
1085 (bcm43xx_phy_read(bcm, 0x002B)
1086 & 0xFFC0) | 0x0001);
1087 bcm43xx_phy_write(bcm, 0x002B,
1088 (bcm43xx_phy_read(bcm, 0x002B)
1089 & 0xC0FF) | 0x0800);
1090 bcm43xx_phy_write(bcm, 0x0811,
1091 bcm43xx_phy_read(bcm, 0x0811) | 0x0100);
1092 bcm43xx_phy_write(bcm, 0x0812,
1093 bcm43xx_phy_read(bcm, 0x0812) & 0xCFFF);
1094 if (bcm->sprom.boardflags & BCM43xx_BFL_EXTLNA) {
1095 if (phy->rev >= 7) {
1096 bcm43xx_phy_write(bcm, 0x0811,
1097 bcm43xx_phy_read(bcm, 0x0811)
1099 bcm43xx_phy_write(bcm, 0x0812,
1100 bcm43xx_phy_read(bcm, 0x0812)
1104 bcm43xx_radio_write16(bcm, 0x007A,
1105 bcm43xx_radio_read16(bcm, 0x007A)
1108 for (i = 0; i < loop1_cnt; i++) {
1109 bcm43xx_radio_write16(bcm, 0x0043, loop1_cnt);
1110 bcm43xx_phy_write(bcm, 0x0812,
1111 (bcm43xx_phy_read(bcm, 0x0812)
1112 & 0xF0FF) | (i << 8));
1113 bcm43xx_phy_write(bcm, 0x0015,
1114 (bcm43xx_phy_read(bcm, 0x0015)
1115 & 0x0FFF) | 0xA000);
1116 bcm43xx_phy_write(bcm, 0x0015,
1117 (bcm43xx_phy_read(bcm, 0x0015)
1118 & 0x0FFF) | 0xF000);
1120 if (bcm43xx_phy_read(bcm, 0x002D) >= 0x0DFC)
1124 loop1_omitted = loop1_cnt - loop1_done;
1127 if (loop1_done >= 8) {
1128 bcm43xx_phy_write(bcm, 0x0812,
1129 bcm43xx_phy_read(bcm, 0x0812)
1131 for (i = loop1_done - 8; i < 16; i++) {
1132 bcm43xx_phy_write(bcm, 0x0812,
1133 (bcm43xx_phy_read(bcm, 0x0812)
1134 & 0xF0FF) | (i << 8));
1135 bcm43xx_phy_write(bcm, 0x0015,
1136 (bcm43xx_phy_read(bcm, 0x0015)
1137 & 0x0FFF) | 0xA000);
1138 bcm43xx_phy_write(bcm, 0x0015,
1139 (bcm43xx_phy_read(bcm, 0x0015)
1140 & 0x0FFF) | 0xF000);
1142 if (bcm43xx_phy_read(bcm, 0x002D) >= 0x0DFC)
1147 if (phy->rev != 1) {
1148 bcm43xx_phy_write(bcm, 0x0814, backup_phy[4]);
1149 bcm43xx_phy_write(bcm, 0x0815, backup_phy[5]);
1151 bcm43xx_phy_write(bcm, 0x005A, backup_phy[6]);
1152 bcm43xx_phy_write(bcm, 0x0059, backup_phy[7]);
1153 bcm43xx_phy_write(bcm, 0x0058, backup_phy[8]);
1154 bcm43xx_phy_write(bcm, 0x000A, backup_phy[9]);
1155 bcm43xx_phy_write(bcm, 0x0003, backup_phy[10]);
1156 bcm43xx_phy_write(bcm, 0x080F, backup_phy[11]);
1157 bcm43xx_phy_write(bcm, 0x0810, backup_phy[12]);
1158 bcm43xx_phy_write(bcm, 0x002B, backup_phy[13]);
1159 bcm43xx_phy_write(bcm, 0x0015, backup_phy[14]);
1161 bcm43xx_phy_set_baseband_attenuation(bcm, backup_bband);
1163 bcm43xx_radio_write16(bcm, 0x0052, backup_radio[0]);
1164 bcm43xx_radio_write16(bcm, 0x0043, backup_radio[1]);
1165 bcm43xx_radio_write16(bcm, 0x007A, backup_radio[2]);
1167 bcm43xx_phy_write(bcm, 0x0811, backup_phy[2] | 0x0003);
1169 bcm43xx_phy_write(bcm, 0x0811, backup_phy[2]);
1170 bcm43xx_phy_write(bcm, 0x0812, backup_phy[3]);
1171 bcm43xx_phy_write(bcm, 0x0429, backup_phy[0]);
1172 bcm43xx_phy_write(bcm, 0x0001, backup_phy[1]);
1174 phy->loopback_gain[0] = ((loop1_done * 6) - (loop1_omitted * 4)) - 11;
1175 phy->loopback_gain[1] = (24 - (3 * loop2_done)) * 2;
1178 static void bcm43xx_phy_initg(struct bcm43xx_private *bcm)
1180 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1181 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1185 bcm43xx_phy_initb5(bcm);
1187 bcm43xx_phy_initb6(bcm);
1188 if (phy->rev >= 2 || phy->connected)
1189 bcm43xx_phy_inita(bcm);
1191 if (phy->rev >= 2) {
1192 bcm43xx_phy_write(bcm, 0x0814, 0x0000);
1193 bcm43xx_phy_write(bcm, 0x0815, 0x0000);
1195 if (phy->rev == 2) {
1196 bcm43xx_phy_write(bcm, 0x0811, 0x0000);
1197 bcm43xx_phy_write(bcm, 0x0015, 0x00C0);
1200 bcm43xx_phy_write(bcm, 0x0811, 0x0400);
1201 bcm43xx_phy_write(bcm, 0x0015, 0x00C0);
1203 if (phy->rev >= 2 && phy->connected) {
1204 tmp = bcm43xx_phy_read(bcm, 0x0400) & 0xFF;
1205 if (tmp ==3 || tmp == 5) {
1206 bcm43xx_phy_write(bcm, 0x04C2, 0x1816);
1207 bcm43xx_phy_write(bcm, 0x04C3, 0x8006);
1209 bcm43xx_phy_write(bcm, 0x04CC,
1210 (bcm43xx_phy_read(bcm, 0x04CC)
1211 & 0x00FF) | 0x1F00);
1214 bcm43xx_phy_write(bcm, 0x047E, 0x0078);
1216 if (radio->revision == 8) {
1217 bcm43xx_phy_write(bcm, 0x0801, bcm43xx_phy_read(bcm, 0x0801) | 0x0080);
1218 bcm43xx_phy_write(bcm, 0x043E, bcm43xx_phy_read(bcm, 0x043E) | 0x0004);
1220 if (phy->rev >= 2 && phy->connected)
1221 bcm43xx_calc_loopback_gain(bcm);
1222 if (radio->revision != 8) {
1223 if (radio->initval == 0xFFFF)
1224 radio->initval = bcm43xx_radio_init2050(bcm);
1226 bcm43xx_radio_write16(bcm, 0x0078, radio->initval);
1228 if (radio->txctl2 == 0xFFFF) {
1229 bcm43xx_phy_lo_g_measure(bcm);
1231 if (radio->version == 0x2050 && radio->revision == 8) {
1232 bcm43xx_radio_write16(bcm, 0x0052,
1233 (radio->txctl1 << 4) | radio->txctl2);
1235 bcm43xx_radio_write16(bcm, 0x0052,
1236 (bcm43xx_radio_read16(bcm, 0x0052)
1237 & 0xFFF0) | radio->txctl1);
1239 if (phy->rev >= 6) {
1240 bcm43xx_phy_write(bcm, 0x0036,
1241 (bcm43xx_phy_read(bcm, 0x0036)
1242 & 0x0FFF) | (radio->txctl2 << 12));
1244 if (bcm->sprom.boardflags & BCM43xx_BFL_PACTRL)
1245 bcm43xx_phy_write(bcm, 0x002E, 0x8075);
1247 bcm43xx_phy_write(bcm, 0x002E, 0x807F);
1249 bcm43xx_phy_write(bcm, 0x002F, 0x0101);
1251 bcm43xx_phy_write(bcm, 0x002F, 0x0202);
1253 if (phy->connected || phy->rev >= 2) {
1254 bcm43xx_phy_lo_adjust(bcm, 0);
1255 bcm43xx_phy_write(bcm, 0x080F, 0x8078);
1258 if (!(bcm->sprom.boardflags & BCM43xx_BFL_RSSI)) {
1259 /* The specs state to update the NRSSI LT with
1260 * the value 0x7FFFFFFF here. I think that is some weird
1261 * compiler optimization in the original driver.
1262 * Essentially, what we do here is resetting all NRSSI LT
1263 * entries to -32 (see the limit_value() in nrssi_hw_update())
1265 bcm43xx_nrssi_hw_update(bcm, 0xFFFF);
1266 bcm43xx_calc_nrssi_threshold(bcm);
1267 } else if (phy->connected || phy->rev >= 2) {
1268 if (radio->nrssi[0] == -1000) {
1269 assert(radio->nrssi[1] == -1000);
1270 bcm43xx_calc_nrssi_slope(bcm);
1272 assert(radio->nrssi[1] != -1000);
1273 bcm43xx_calc_nrssi_threshold(bcm);
1276 if (radio->revision == 8)
1277 bcm43xx_phy_write(bcm, 0x0805, 0x3230);
1278 bcm43xx_phy_init_pctl(bcm);
1279 if (bcm->chip_id == 0x4306 && bcm->chip_package == 2) {
1280 bcm43xx_phy_write(bcm, 0x0429,
1281 bcm43xx_phy_read(bcm, 0x0429) & 0xBFFF);
1282 bcm43xx_phy_write(bcm, 0x04C3,
1283 bcm43xx_phy_read(bcm, 0x04C3) & 0x7FFF);
1287 static u16 bcm43xx_phy_lo_b_r15_loop(struct bcm43xx_private *bcm)
1291 unsigned long flags;
1293 local_irq_save(flags);
1294 for (i = 0; i < 10; i++){
1295 bcm43xx_phy_write(bcm, 0x0015, 0xAFA0);
1297 bcm43xx_phy_write(bcm, 0x0015, 0xEFA0);
1299 bcm43xx_phy_write(bcm, 0x0015, 0xFFA0);
1301 ret += bcm43xx_phy_read(bcm, 0x002C);
1303 local_irq_restore(flags);
1304 bcm43xx_voluntary_preempt();
1309 void bcm43xx_phy_lo_b_measure(struct bcm43xx_private *bcm)
1311 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1312 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1313 u16 regstack[12] = { 0 };
1318 regstack[0] = bcm43xx_phy_read(bcm, 0x0015);
1319 regstack[1] = bcm43xx_radio_read16(bcm, 0x0052) & 0xFFF0;
1321 if (radio->version == 0x2053) {
1322 regstack[2] = bcm43xx_phy_read(bcm, 0x000A);
1323 regstack[3] = bcm43xx_phy_read(bcm, 0x002A);
1324 regstack[4] = bcm43xx_phy_read(bcm, 0x0035);
1325 regstack[5] = bcm43xx_phy_read(bcm, 0x0003);
1326 regstack[6] = bcm43xx_phy_read(bcm, 0x0001);
1327 regstack[7] = bcm43xx_phy_read(bcm, 0x0030);
1329 regstack[8] = bcm43xx_radio_read16(bcm, 0x0043);
1330 regstack[9] = bcm43xx_radio_read16(bcm, 0x007A);
1331 regstack[10] = bcm43xx_read16(bcm, 0x03EC);
1332 regstack[11] = bcm43xx_radio_read16(bcm, 0x0052) & 0x00F0;
1334 bcm43xx_phy_write(bcm, 0x0030, 0x00FF);
1335 bcm43xx_write16(bcm, 0x03EC, 0x3F3F);
1336 bcm43xx_phy_write(bcm, 0x0035, regstack[4] & 0xFF7F);
1337 bcm43xx_radio_write16(bcm, 0x007A, regstack[9] & 0xFFF0);
1339 bcm43xx_phy_write(bcm, 0x0015, 0xB000);
1340 bcm43xx_phy_write(bcm, 0x002B, 0x0004);
1342 if (radio->version == 0x2053) {
1343 bcm43xx_phy_write(bcm, 0x002B, 0x0203);
1344 bcm43xx_phy_write(bcm, 0x002A, 0x08A3);
1347 phy->minlowsig[0] = 0xFFFF;
1349 for (i = 0; i < 4; i++) {
1350 bcm43xx_radio_write16(bcm, 0x0052, regstack[1] | i);
1351 bcm43xx_phy_lo_b_r15_loop(bcm);
1353 for (i = 0; i < 10; i++) {
1354 bcm43xx_radio_write16(bcm, 0x0052, regstack[1] | i);
1355 mls = bcm43xx_phy_lo_b_r15_loop(bcm) / 10;
1356 if (mls < phy->minlowsig[0]) {
1357 phy->minlowsig[0] = mls;
1358 phy->minlowsigpos[0] = i;
1361 bcm43xx_radio_write16(bcm, 0x0052, regstack[1] | phy->minlowsigpos[0]);
1363 phy->minlowsig[1] = 0xFFFF;
1365 for (i = -4; i < 5; i += 2) {
1366 for (j = -4; j < 5; j += 2) {
1368 fval = (0x0100 * i) + j + 0x0100;
1370 fval = (0x0100 * i) + j;
1371 bcm43xx_phy_write(bcm, 0x002F, fval);
1372 mls = bcm43xx_phy_lo_b_r15_loop(bcm) / 10;
1373 if (mls < phy->minlowsig[1]) {
1374 phy->minlowsig[1] = mls;
1375 phy->minlowsigpos[1] = fval;
1379 phy->minlowsigpos[1] += 0x0101;
1381 bcm43xx_phy_write(bcm, 0x002F, phy->minlowsigpos[1]);
1382 if (radio->version == 0x2053) {
1383 bcm43xx_phy_write(bcm, 0x000A, regstack[2]);
1384 bcm43xx_phy_write(bcm, 0x002A, regstack[3]);
1385 bcm43xx_phy_write(bcm, 0x0035, regstack[4]);
1386 bcm43xx_phy_write(bcm, 0x0003, regstack[5]);
1387 bcm43xx_phy_write(bcm, 0x0001, regstack[6]);
1388 bcm43xx_phy_write(bcm, 0x0030, regstack[7]);
1390 bcm43xx_radio_write16(bcm, 0x0043, regstack[8]);
1391 bcm43xx_radio_write16(bcm, 0x007A, regstack[9]);
1393 bcm43xx_radio_write16(bcm, 0x0052,
1394 (bcm43xx_radio_read16(bcm, 0x0052) & 0x000F)
1397 bcm43xx_write16(bcm, 0x03EC, regstack[10]);
1399 bcm43xx_phy_write(bcm, 0x0015, regstack[0]);
1403 u16 bcm43xx_phy_lo_g_deviation_subval(struct bcm43xx_private *bcm, u16 control)
1405 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1407 unsigned long flags;
1409 local_irq_save(flags);
1410 if (phy->connected) {
1411 bcm43xx_phy_write(bcm, 0x15, 0xE300);
1413 bcm43xx_phy_write(bcm, 0x0812, control | 0x00B0);
1415 bcm43xx_phy_write(bcm, 0x0812, control | 0x00B2);
1417 bcm43xx_phy_write(bcm, 0x0812, control | 0x00B3);
1419 bcm43xx_phy_write(bcm, 0x0015, 0xF300);
1422 bcm43xx_phy_write(bcm, 0x0015, control | 0xEFA0);
1424 bcm43xx_phy_write(bcm, 0x0015, control | 0xEFE0);
1426 bcm43xx_phy_write(bcm, 0x0015, control | 0xFFE0);
1429 ret = bcm43xx_phy_read(bcm, 0x002D);
1430 local_irq_restore(flags);
1431 bcm43xx_voluntary_preempt();
1436 static u32 bcm43xx_phy_lo_g_singledeviation(struct bcm43xx_private *bcm, u16 control)
1441 for (i = 0; i < 8; i++)
1442 ret += bcm43xx_phy_lo_g_deviation_subval(bcm, control);
1447 /* Write the LocalOscillator CONTROL */
1449 void bcm43xx_lo_write(struct bcm43xx_private *bcm,
1450 struct bcm43xx_lopair *pair)
1454 value = (u8)(pair->low);
1455 value |= ((u8)(pair->high)) << 8;
1457 #ifdef CONFIG_BCM43XX_DEBUG
1459 if (pair->low < -8 || pair->low > 8 ||
1460 pair->high < -8 || pair->high > 8) {
1461 printk(KERN_WARNING PFX
1462 "WARNING: Writing invalid LOpair "
1463 "(low: %d, high: %d, index: %lu)\n",
1464 pair->low, pair->high,
1465 (unsigned long)(pair - bcm43xx_current_phy(bcm)->_lo_pairs));
1470 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_LO_CONTROL, value);
1474 struct bcm43xx_lopair * bcm43xx_find_lopair(struct bcm43xx_private *bcm,
1475 u16 baseband_attenuation,
1476 u16 radio_attenuation,
1479 static const u8 dict[10] = { 11, 10, 11, 12, 13, 12, 13, 12, 13, 12 };
1480 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1482 if (baseband_attenuation > 6)
1483 baseband_attenuation = 6;
1484 assert(radio_attenuation < 10);
1487 return bcm43xx_get_lopair(phy,
1489 baseband_attenuation);
1491 return bcm43xx_get_lopair(phy, dict[radio_attenuation], baseband_attenuation);
1495 struct bcm43xx_lopair * bcm43xx_current_lopair(struct bcm43xx_private *bcm)
1497 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1499 return bcm43xx_find_lopair(bcm,
1500 radio->baseband_atten,
1506 void bcm43xx_phy_lo_adjust(struct bcm43xx_private *bcm, int fixed)
1508 struct bcm43xx_lopair *pair;
1511 /* Use fixed values. Only for initialization. */
1512 pair = bcm43xx_find_lopair(bcm, 2, 3, 0);
1514 pair = bcm43xx_current_lopair(bcm);
1515 bcm43xx_lo_write(bcm, pair);
1518 static void bcm43xx_phy_lo_g_measure_txctl2(struct bcm43xx_private *bcm)
1520 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1524 bcm43xx_radio_write16(bcm, 0x0052, 0x0000);
1526 smallest = bcm43xx_phy_lo_g_singledeviation(bcm, 0);
1527 for (i = 0; i < 16; i++) {
1528 bcm43xx_radio_write16(bcm, 0x0052, i);
1530 tmp = bcm43xx_phy_lo_g_singledeviation(bcm, 0);
1531 if (tmp < smallest) {
1536 radio->txctl2 = txctl2;
1540 void bcm43xx_phy_lo_g_state(struct bcm43xx_private *bcm,
1541 const struct bcm43xx_lopair *in_pair,
1542 struct bcm43xx_lopair *out_pair,
1545 static const struct bcm43xx_lopair transitions[8] = {
1546 { .high = 1, .low = 1, },
1547 { .high = 1, .low = 0, },
1548 { .high = 1, .low = -1, },
1549 { .high = 0, .low = -1, },
1550 { .high = -1, .low = -1, },
1551 { .high = -1, .low = 0, },
1552 { .high = -1, .low = 1, },
1553 { .high = 0, .low = 1, },
1555 struct bcm43xx_lopair lowest_transition = {
1556 .high = in_pair->high,
1557 .low = in_pair->low,
1559 struct bcm43xx_lopair tmp_pair;
1560 struct bcm43xx_lopair transition;
1565 u32 lowest_deviation;
1568 /* Note that in_pair and out_pair can point to the same pair. Be careful. */
1570 bcm43xx_lo_write(bcm, &lowest_transition);
1571 lowest_deviation = bcm43xx_phy_lo_g_singledeviation(bcm, r27);
1574 assert(state >= 0 && state <= 8);
1578 } else if (state % 2 == 0) {
1591 tmp_pair.high = lowest_transition.high;
1592 tmp_pair.low = lowest_transition.low;
1594 assert(j >= 1 && j <= 8);
1595 transition.high = tmp_pair.high + transitions[j - 1].high;
1596 transition.low = tmp_pair.low + transitions[j - 1].low;
1597 if ((abs(transition.low) < 9) && (abs(transition.high) < 9)) {
1598 bcm43xx_lo_write(bcm, &transition);
1599 tmp = bcm43xx_phy_lo_g_singledeviation(bcm, r27);
1600 if (tmp < lowest_deviation) {
1601 lowest_deviation = tmp;
1605 lowest_transition.high = transition.high;
1606 lowest_transition.low = transition.low;
1616 } while (i-- && found_lower);
1618 out_pair->high = lowest_transition.high;
1619 out_pair->low = lowest_transition.low;
1622 /* Set the baseband attenuation value on chip. */
1623 void bcm43xx_phy_set_baseband_attenuation(struct bcm43xx_private *bcm,
1624 u16 baseband_attenuation)
1626 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1629 if (phy->analog == 0) {
1630 value = (bcm43xx_read16(bcm, 0x03E6) & 0xFFF0);
1631 value |= (baseband_attenuation & 0x000F);
1632 bcm43xx_write16(bcm, 0x03E6, value);
1636 if (phy->analog > 1) {
1637 value = bcm43xx_phy_read(bcm, 0x0060) & ~0x003C;
1638 value |= (baseband_attenuation << 2) & 0x003C;
1640 value = bcm43xx_phy_read(bcm, 0x0060) & ~0x0078;
1641 value |= (baseband_attenuation << 3) & 0x0078;
1643 bcm43xx_phy_write(bcm, 0x0060, value);
1646 /* http://bcm-specs.sipsolutions.net/LocalOscillator/Measure */
1647 void bcm43xx_phy_lo_g_measure(struct bcm43xx_private *bcm)
1649 static const u8 pairorder[10] = { 3, 1, 5, 7, 9, 2, 0, 4, 6, 8 };
1650 const int is_initializing = (bcm43xx_status(bcm) == BCM43xx_STAT_INITIALIZING);
1651 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1652 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1653 u16 h, i, oldi = 0, j;
1654 struct bcm43xx_lopair control;
1655 struct bcm43xx_lopair *tmp_control;
1657 u16 regstack[16] = { 0 };
1660 //XXX: What are these?
1663 oldchannel = radio->channel;
1665 if (phy->connected) {
1666 regstack[0] = bcm43xx_phy_read(bcm, BCM43xx_PHY_G_CRS);
1667 regstack[1] = bcm43xx_phy_read(bcm, 0x0802);
1668 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, regstack[0] & 0x7FFF);
1669 bcm43xx_phy_write(bcm, 0x0802, regstack[1] & 0xFFFC);
1671 regstack[3] = bcm43xx_read16(bcm, 0x03E2);
1672 bcm43xx_write16(bcm, 0x03E2, regstack[3] | 0x8000);
1673 regstack[4] = bcm43xx_read16(bcm, BCM43xx_MMIO_CHANNEL_EXT);
1674 regstack[5] = bcm43xx_phy_read(bcm, 0x15);
1675 regstack[6] = bcm43xx_phy_read(bcm, 0x2A);
1676 regstack[7] = bcm43xx_phy_read(bcm, 0x35);
1677 regstack[8] = bcm43xx_phy_read(bcm, 0x60);
1678 regstack[9] = bcm43xx_radio_read16(bcm, 0x43);
1679 regstack[10] = bcm43xx_radio_read16(bcm, 0x7A);
1680 regstack[11] = bcm43xx_radio_read16(bcm, 0x52);
1681 if (phy->connected) {
1682 regstack[12] = bcm43xx_phy_read(bcm, 0x0811);
1683 regstack[13] = bcm43xx_phy_read(bcm, 0x0812);
1684 regstack[14] = bcm43xx_phy_read(bcm, 0x0814);
1685 regstack[15] = bcm43xx_phy_read(bcm, 0x0815);
1687 bcm43xx_radio_selectchannel(bcm, 6, 0);
1688 if (phy->connected) {
1689 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, regstack[0] & 0x7FFF);
1690 bcm43xx_phy_write(bcm, 0x0802, regstack[1] & 0xFFFC);
1691 bcm43xx_dummy_transmission(bcm);
1693 bcm43xx_radio_write16(bcm, 0x0043, 0x0006);
1695 bcm43xx_phy_set_baseband_attenuation(bcm, 2);
1697 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, 0x0000);
1698 bcm43xx_phy_write(bcm, 0x002E, 0x007F);
1699 bcm43xx_phy_write(bcm, 0x080F, 0x0078);
1700 bcm43xx_phy_write(bcm, 0x0035, regstack[7] & ~(1 << 7));
1701 bcm43xx_radio_write16(bcm, 0x007A, regstack[10] & 0xFFF0);
1702 bcm43xx_phy_write(bcm, 0x002B, 0x0203);
1703 bcm43xx_phy_write(bcm, 0x002A, 0x08A3);
1704 if (phy->connected) {
1705 bcm43xx_phy_write(bcm, 0x0814, regstack[14] | 0x0003);
1706 bcm43xx_phy_write(bcm, 0x0815, regstack[15] & 0xFFFC);
1707 bcm43xx_phy_write(bcm, 0x0811, 0x01B3);
1708 bcm43xx_phy_write(bcm, 0x0812, 0x00B2);
1710 if (is_initializing)
1711 bcm43xx_phy_lo_g_measure_txctl2(bcm);
1712 bcm43xx_phy_write(bcm, 0x080F, 0x8078);
1717 for (h = 0; h < 10; h++) {
1718 /* Loop over each possible RadioAttenuation (0-9) */
1720 if (is_initializing) {
1724 } else if (((i % 2 == 1) && (oldi % 2 == 1)) ||
1725 ((i % 2 == 0) && (oldi % 2 == 0))) {
1726 tmp_control = bcm43xx_get_lopair(phy, oldi, 0);
1727 memcpy(&control, tmp_control, sizeof(control));
1729 tmp_control = bcm43xx_get_lopair(phy, 3, 0);
1730 memcpy(&control, tmp_control, sizeof(control));
1733 /* Loop over each possible BasebandAttenuation/2 */
1734 for (j = 0; j < 4; j++) {
1735 if (is_initializing) {
1747 tmp_control = bcm43xx_get_lopair(phy, i, j * 2);
1748 if (!tmp_control->used)
1750 memcpy(&control, tmp_control, sizeof(control));
1754 bcm43xx_radio_write16(bcm, 0x43, i);
1755 bcm43xx_radio_write16(bcm, 0x52, radio->txctl2);
1757 bcm43xx_voluntary_preempt();
1759 bcm43xx_phy_set_baseband_attenuation(bcm, j * 2);
1761 tmp = (regstack[10] & 0xFFF0);
1764 bcm43xx_radio_write16(bcm, 0x007A, tmp);
1766 tmp_control = bcm43xx_get_lopair(phy, i, j * 2);
1767 bcm43xx_phy_lo_g_state(bcm, &control, tmp_control, r27);
1771 /* Loop over each possible RadioAttenuation (10-13) */
1772 for (i = 10; i < 14; i++) {
1773 /* Loop over each possible BasebandAttenuation/2 */
1774 for (j = 0; j < 4; j++) {
1775 if (is_initializing) {
1776 tmp_control = bcm43xx_get_lopair(phy, i - 9, j * 2);
1777 memcpy(&control, tmp_control, sizeof(control));
1778 tmp = (i - 9) * 2 + j - 5;//FIXME: This is wrong, as the following if statement can never trigger.
1789 tmp_control = bcm43xx_get_lopair(phy, i - 9, j * 2);
1790 if (!tmp_control->used)
1792 memcpy(&control, tmp_control, sizeof(control));
1796 bcm43xx_radio_write16(bcm, 0x43, i - 9);
1797 bcm43xx_radio_write16(bcm, 0x52,
1799 | (3/*txctl1*/ << 4));//FIXME: shouldn't txctl1 be zero here and 3 in the loop above?
1801 bcm43xx_voluntary_preempt();
1803 bcm43xx_phy_set_baseband_attenuation(bcm, j * 2);
1805 tmp = (regstack[10] & 0xFFF0);
1808 bcm43xx_radio_write16(bcm, 0x7A, tmp);
1810 tmp_control = bcm43xx_get_lopair(phy, i, j * 2);
1811 bcm43xx_phy_lo_g_state(bcm, &control, tmp_control, r27);
1816 if (phy->connected) {
1817 bcm43xx_phy_write(bcm, 0x0015, 0xE300);
1818 bcm43xx_phy_write(bcm, 0x0812, (r27 << 8) | 0xA0);
1820 bcm43xx_phy_write(bcm, 0x0812, (r27 << 8) | 0xA2);
1822 bcm43xx_phy_write(bcm, 0x0812, (r27 << 8) | 0xA3);
1823 bcm43xx_voluntary_preempt();
1825 bcm43xx_phy_write(bcm, 0x0015, r27 | 0xEFA0);
1826 bcm43xx_phy_lo_adjust(bcm, is_initializing);
1827 bcm43xx_phy_write(bcm, 0x002E, 0x807F);
1829 bcm43xx_phy_write(bcm, 0x002F, 0x0202);
1831 bcm43xx_phy_write(bcm, 0x002F, 0x0101);
1832 bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, regstack[4]);
1833 bcm43xx_phy_write(bcm, 0x0015, regstack[5]);
1834 bcm43xx_phy_write(bcm, 0x002A, regstack[6]);
1835 bcm43xx_phy_write(bcm, 0x0035, regstack[7]);
1836 bcm43xx_phy_write(bcm, 0x0060, regstack[8]);
1837 bcm43xx_radio_write16(bcm, 0x0043, regstack[9]);
1838 bcm43xx_radio_write16(bcm, 0x007A, regstack[10]);
1839 regstack[11] &= 0x00F0;
1840 regstack[11] |= (bcm43xx_radio_read16(bcm, 0x52) & 0x000F);
1841 bcm43xx_radio_write16(bcm, 0x52, regstack[11]);
1842 bcm43xx_write16(bcm, 0x03E2, regstack[3]);
1843 if (phy->connected) {
1844 bcm43xx_phy_write(bcm, 0x0811, regstack[12]);
1845 bcm43xx_phy_write(bcm, 0x0812, regstack[13]);
1846 bcm43xx_phy_write(bcm, 0x0814, regstack[14]);
1847 bcm43xx_phy_write(bcm, 0x0815, regstack[15]);
1848 bcm43xx_phy_write(bcm, BCM43xx_PHY_G_CRS, regstack[0]);
1849 bcm43xx_phy_write(bcm, 0x0802, regstack[1]);
1851 bcm43xx_radio_selectchannel(bcm, oldchannel, 1);
1853 #ifdef CONFIG_BCM43XX_DEBUG
1855 /* Sanity check for all lopairs. */
1856 for (i = 0; i < BCM43xx_LO_COUNT; i++) {
1857 tmp_control = phy->_lo_pairs + i;
1858 if (tmp_control->low < -8 || tmp_control->low > 8 ||
1859 tmp_control->high < -8 || tmp_control->high > 8) {
1860 printk(KERN_WARNING PFX
1861 "WARNING: Invalid LOpair (low: %d, high: %d, index: %d)\n",
1862 tmp_control->low, tmp_control->high, i);
1866 #endif /* CONFIG_BCM43XX_DEBUG */
1870 void bcm43xx_phy_lo_mark_current_used(struct bcm43xx_private *bcm)
1872 struct bcm43xx_lopair *pair;
1874 pair = bcm43xx_current_lopair(bcm);
1878 void bcm43xx_phy_lo_mark_all_unused(struct bcm43xx_private *bcm)
1880 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1881 struct bcm43xx_lopair *pair;
1884 for (i = 0; i < BCM43xx_LO_COUNT; i++) {
1885 pair = phy->_lo_pairs + i;
1890 /* http://bcm-specs.sipsolutions.net/EstimatePowerOut
1891 * This function converts a TSSI value to dBm in Q5.2
1893 static s8 bcm43xx_phy_estimate_power_out(struct bcm43xx_private *bcm, s8 tssi)
1895 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1899 tmp = phy->idle_tssi;
1901 tmp -= phy->savedpctlreg;
1903 switch (phy->type) {
1904 case BCM43xx_PHYTYPE_A:
1906 tmp = limit_value(tmp, 0x00, 0xFF);
1907 dbm = phy->tssi2dbm[tmp];
1908 TODO(); //TODO: There's a FIXME on the specs
1910 case BCM43xx_PHYTYPE_B:
1911 case BCM43xx_PHYTYPE_G:
1912 tmp = limit_value(tmp, 0x00, 0x3F);
1913 dbm = phy->tssi2dbm[tmp];
1922 /* http://bcm-specs.sipsolutions.net/RecalculateTransmissionPower */
1923 void bcm43xx_phy_xmitpower(struct bcm43xx_private *bcm)
1925 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
1926 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
1928 if (phy->savedpctlreg == 0xFFFF)
1930 if ((bcm->board_type == 0x0416) &&
1931 (bcm->board_vendor == PCI_VENDOR_ID_BROADCOM))
1934 switch (phy->type) {
1935 case BCM43xx_PHYTYPE_A: {
1937 TODO(); //TODO: Nothing for A PHYs yet :-/
1941 case BCM43xx_PHYTYPE_B:
1942 case BCM43xx_PHYTYPE_G: {
1948 s16 desired_pwr, estimated_pwr, pwr_adjust;
1949 s16 radio_att_delta, baseband_att_delta;
1950 s16 radio_attenuation, baseband_attenuation;
1951 unsigned long phylock_flags;
1953 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0058);
1954 v0 = (s8)(tmp & 0x00FF);
1955 v1 = (s8)((tmp & 0xFF00) >> 8);
1956 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x005A);
1957 v2 = (s8)(tmp & 0x00FF);
1958 v3 = (s8)((tmp & 0xFF00) >> 8);
1961 if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F) {
1962 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0070);
1963 v0 = (s8)(tmp & 0x00FF);
1964 v1 = (s8)((tmp & 0xFF00) >> 8);
1965 tmp = bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x0072);
1966 v2 = (s8)(tmp & 0x00FF);
1967 v3 = (s8)((tmp & 0xFF00) >> 8);
1968 if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F)
1970 v0 = (v0 + 0x20) & 0x3F;
1971 v1 = (v1 + 0x20) & 0x3F;
1972 v2 = (v2 + 0x20) & 0x3F;
1973 v3 = (v3 + 0x20) & 0x3F;
1976 bcm43xx_radio_clear_tssi(bcm);
1978 average = (v0 + v1 + v2 + v3 + 2) / 4;
1980 if (tmp && (bcm43xx_shm_read16(bcm, BCM43xx_SHM_SHARED, 0x005E) & 0x8))
1983 estimated_pwr = bcm43xx_phy_estimate_power_out(bcm, average);
1985 max_pwr = bcm->sprom.maxpower_bgphy;
1987 if ((bcm->sprom.boardflags & BCM43xx_BFL_PACTRL) &&
1988 (phy->type == BCM43xx_PHYTYPE_G))
1992 max_pwr = min(REG - bcm->sprom.antennagain_bgphy - 0x6, max_pwr)
1993 where REG is the max power as per the regulatory domain
1996 desired_pwr = limit_value(radio->txpower_desired, 0, max_pwr);
1997 /* Check if we need to adjust the current power. */
1998 pwr_adjust = desired_pwr - estimated_pwr;
1999 radio_att_delta = -(pwr_adjust + 7) >> 3;
2000 baseband_att_delta = -(pwr_adjust >> 1) - (4 * radio_att_delta);
2001 if ((radio_att_delta == 0) && (baseband_att_delta == 0)) {
2002 bcm43xx_phy_lo_mark_current_used(bcm);
2006 /* Calculate the new attenuation values. */
2007 baseband_attenuation = radio->baseband_atten;
2008 baseband_attenuation += baseband_att_delta;
2009 radio_attenuation = radio->radio_atten;
2010 radio_attenuation += radio_att_delta;
2012 /* Get baseband and radio attenuation values into their permitted ranges.
2013 * baseband 0-11, radio 0-9.
2014 * Radio attenuation affects power level 4 times as much as baseband.
2016 if (radio_attenuation < 0) {
2017 baseband_attenuation -= (4 * -radio_attenuation);
2018 radio_attenuation = 0;
2019 } else if (radio_attenuation > 9) {
2020 baseband_attenuation += (4 * (radio_attenuation - 9));
2021 radio_attenuation = 9;
2023 while (baseband_attenuation < 0 && radio_attenuation > 0) {
2024 baseband_attenuation += 4;
2025 radio_attenuation--;
2027 while (baseband_attenuation > 11 && radio_attenuation < 9) {
2028 baseband_attenuation -= 4;
2029 radio_attenuation++;
2032 baseband_attenuation = limit_value(baseband_attenuation, 0, 11);
2034 txpower = radio->txctl1;
2035 if ((radio->version == 0x2050) && (radio->revision == 2)) {
2036 if (radio_attenuation <= 1) {
2039 radio_attenuation += 2;
2040 baseband_attenuation += 2;
2041 } else if (bcm->sprom.boardflags & BCM43xx_BFL_PACTRL) {
2042 baseband_attenuation += 4 * (radio_attenuation - 2);
2043 radio_attenuation = 2;
2045 } else if (radio_attenuation > 4 && txpower != 0) {
2047 if (baseband_attenuation < 3) {
2048 radio_attenuation -= 3;
2049 baseband_attenuation += 2;
2051 radio_attenuation -= 2;
2052 baseband_attenuation -= 2;
2056 radio->txctl1 = txpower;
2057 baseband_attenuation = limit_value(baseband_attenuation, 0, 11);
2058 radio_attenuation = limit_value(radio_attenuation, 0, 9);
2060 bcm43xx_phy_lock(bcm, phylock_flags);
2061 bcm43xx_radio_lock(bcm);
2062 bcm43xx_radio_set_txpower_bg(bcm, baseband_attenuation,
2063 radio_attenuation, txpower);
2064 bcm43xx_phy_lo_mark_current_used(bcm);
2065 bcm43xx_radio_unlock(bcm);
2066 bcm43xx_phy_unlock(bcm, phylock_flags);
2075 s32 bcm43xx_tssi2dbm_ad(s32 num, s32 den)
2080 return (num+den/2)/den;
2084 s8 bcm43xx_tssi2dbm_entry(s8 entry [], u8 index, s16 pab0, s16 pab1, s16 pab2)
2086 s32 m1, m2, f = 256, q, delta;
2089 m1 = bcm43xx_tssi2dbm_ad(16 * pab0 + index * pab1, 32);
2090 m2 = max(bcm43xx_tssi2dbm_ad(32768 + index * pab2, 256), 1);
2094 q = bcm43xx_tssi2dbm_ad(f * 4096 -
2095 bcm43xx_tssi2dbm_ad(m2 * f, 16) * f, 2048);
2099 } while (delta >= 2);
2100 entry[index] = limit_value(bcm43xx_tssi2dbm_ad(m1 * f, 8192), -127, 128);
2104 /* http://bcm-specs.sipsolutions.net/TSSI_to_DBM_Table */
2105 int bcm43xx_phy_init_tssi2dbm_table(struct bcm43xx_private *bcm)
2107 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
2108 struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm);
2109 s16 pab0, pab1, pab2;
2113 if (phy->type == BCM43xx_PHYTYPE_A) {
2114 pab0 = (s16)(bcm->sprom.pa1b0);
2115 pab1 = (s16)(bcm->sprom.pa1b1);
2116 pab2 = (s16)(bcm->sprom.pa1b2);
2118 pab0 = (s16)(bcm->sprom.pa0b0);
2119 pab1 = (s16)(bcm->sprom.pa0b1);
2120 pab2 = (s16)(bcm->sprom.pa0b2);
2123 if ((bcm->chip_id == 0x4301) && (radio->version != 0x2050)) {
2124 phy->idle_tssi = 0x34;
2125 phy->tssi2dbm = bcm43xx_tssi2dbm_b_table;
2129 if (pab0 != 0 && pab1 != 0 && pab2 != 0 &&
2130 pab0 != -1 && pab1 != -1 && pab2 != -1) {
2131 /* The pabX values are set in SPROM. Use them. */
2132 if (phy->type == BCM43xx_PHYTYPE_A) {
2133 if ((s8)bcm->sprom.idle_tssi_tgt_aphy != 0 &&
2134 (s8)bcm->sprom.idle_tssi_tgt_aphy != -1)
2135 phy->idle_tssi = (s8)(bcm->sprom.idle_tssi_tgt_aphy);
2137 phy->idle_tssi = 62;
2139 if ((s8)bcm->sprom.idle_tssi_tgt_bgphy != 0 &&
2140 (s8)bcm->sprom.idle_tssi_tgt_bgphy != -1)
2141 phy->idle_tssi = (s8)(bcm->sprom.idle_tssi_tgt_bgphy);
2143 phy->idle_tssi = 62;
2145 dyn_tssi2dbm = kmalloc(64, GFP_KERNEL);
2146 if (dyn_tssi2dbm == NULL) {
2147 printk(KERN_ERR PFX "Could not allocate memory"
2148 "for tssi2dbm table\n");
2151 for (idx = 0; idx < 64; idx++)
2152 if (bcm43xx_tssi2dbm_entry(dyn_tssi2dbm, idx, pab0, pab1, pab2)) {
2153 phy->tssi2dbm = NULL;
2154 printk(KERN_ERR PFX "Could not generate "
2155 "tssi2dBm table\n");
2156 kfree(dyn_tssi2dbm);
2159 phy->tssi2dbm = dyn_tssi2dbm;
2160 phy->dyn_tssi_tbl = 1;
2162 /* pabX values not set in SPROM. */
2163 switch (phy->type) {
2164 case BCM43xx_PHYTYPE_A:
2165 /* APHY needs a generated table. */
2166 phy->tssi2dbm = NULL;
2167 printk(KERN_ERR PFX "Could not generate tssi2dBm "
2168 "table (wrong SPROM info)!\n");
2170 case BCM43xx_PHYTYPE_B:
2171 phy->idle_tssi = 0x34;
2172 phy->tssi2dbm = bcm43xx_tssi2dbm_b_table;
2174 case BCM43xx_PHYTYPE_G:
2175 phy->idle_tssi = 0x34;
2176 phy->tssi2dbm = bcm43xx_tssi2dbm_g_table;
2184 int bcm43xx_phy_init(struct bcm43xx_private *bcm)
2186 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
2189 switch (phy->type) {
2190 case BCM43xx_PHYTYPE_A:
2191 if (phy->rev == 2 || phy->rev == 3) {
2192 bcm43xx_phy_inita(bcm);
2196 case BCM43xx_PHYTYPE_B:
2199 bcm43xx_phy_initb2(bcm);
2203 bcm43xx_phy_initb4(bcm);
2207 bcm43xx_phy_initb5(bcm);
2211 bcm43xx_phy_initb6(bcm);
2216 case BCM43xx_PHYTYPE_G:
2217 bcm43xx_phy_initg(bcm);
2222 printk(KERN_WARNING PFX "Unknown PHYTYPE found!\n");
2227 void bcm43xx_phy_set_antenna_diversity(struct bcm43xx_private *bcm)
2229 struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm);
2235 antennadiv = phy->antenna_diversity;
2237 if (antennadiv == 0xFFFF)
2239 assert(antennadiv <= 3);
2241 ucodeflags = bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
2242 BCM43xx_UCODEFLAGS_OFFSET);
2243 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
2244 BCM43xx_UCODEFLAGS_OFFSET,
2245 ucodeflags & ~BCM43xx_UCODEFLAG_AUTODIV);
2247 switch (phy->type) {
2248 case BCM43xx_PHYTYPE_A:
2249 case BCM43xx_PHYTYPE_G:
2250 if (phy->type == BCM43xx_PHYTYPE_A)
2255 if (antennadiv == 2)
2256 value = (3/*automatic*/ << 7);
2258 value = (antennadiv << 7);
2259 bcm43xx_phy_write(bcm, offset + 1,
2260 (bcm43xx_phy_read(bcm, offset + 1)
2263 if (antennadiv >= 2) {
2264 if (antennadiv == 2)
2265 value = (antennadiv << 7);
2267 value = (0/*force0*/ << 7);
2268 bcm43xx_phy_write(bcm, offset + 0x2B,
2269 (bcm43xx_phy_read(bcm, offset + 0x2B)
2273 if (phy->type == BCM43xx_PHYTYPE_G) {
2274 if (antennadiv >= 2)
2275 bcm43xx_phy_write(bcm, 0x048C,
2276 bcm43xx_phy_read(bcm, 0x048C)
2279 bcm43xx_phy_write(bcm, 0x048C,
2280 bcm43xx_phy_read(bcm, 0x048C)
2282 if (phy->rev >= 2) {
2283 bcm43xx_phy_write(bcm, 0x0461,
2284 bcm43xx_phy_read(bcm, 0x0461)
2286 bcm43xx_phy_write(bcm, 0x04AD,
2287 (bcm43xx_phy_read(bcm, 0x04AD)
2288 & 0x00FF) | 0x0015);
2290 bcm43xx_phy_write(bcm, 0x0427, 0x0008);
2292 bcm43xx_phy_write(bcm, 0x0427,
2293 (bcm43xx_phy_read(bcm, 0x0427)
2294 & 0x00FF) | 0x0008);
2296 else if (phy->rev >= 6)
2297 bcm43xx_phy_write(bcm, 0x049B, 0x00DC);
2300 bcm43xx_phy_write(bcm, 0x002B,
2301 (bcm43xx_phy_read(bcm, 0x002B)
2302 & 0x00FF) | 0x0024);
2304 bcm43xx_phy_write(bcm, 0x0061,
2305 bcm43xx_phy_read(bcm, 0x0061)
2307 if (phy->rev == 3) {
2308 bcm43xx_phy_write(bcm, 0x0093, 0x001D);
2309 bcm43xx_phy_write(bcm, 0x0027, 0x0008);
2311 bcm43xx_phy_write(bcm, 0x0093, 0x003A);
2312 bcm43xx_phy_write(bcm, 0x0027,
2313 (bcm43xx_phy_read(bcm, 0x0027)
2314 & 0x00FF) | 0x0008);
2319 case BCM43xx_PHYTYPE_B:
2320 if (bcm->current_core->rev == 2)
2321 value = (3/*automatic*/ << 7);
2323 value = (antennadiv << 7);
2324 bcm43xx_phy_write(bcm, 0x03E2,
2325 (bcm43xx_phy_read(bcm, 0x03E2)
2332 if (antennadiv >= 2) {
2333 ucodeflags = bcm43xx_shm_read32(bcm, BCM43xx_SHM_SHARED,
2334 BCM43xx_UCODEFLAGS_OFFSET);
2335 bcm43xx_shm_write32(bcm, BCM43xx_SHM_SHARED,
2336 BCM43xx_UCODEFLAGS_OFFSET,
2337 ucodeflags | BCM43xx_UCODEFLAG_AUTODIV);
2340 phy->antenna_diversity = antennadiv;