drivers/net/wireless/ath/ath9k/recv.c

   1 /*
   2  * Copyright (c) 2008-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include "ath9k.h"
  18 #include "ar9003_mac.h"
  19
  20 #define SKB_CB_ATHBUF(__skb)    (*((struct ath_buf **)__skb->cb))
  21
  22 static inline bool ath_is_alt_ant_ratio_better(int alt_ratio, int maxdelta,
  23                                                int mindelta, int main_rssi_avg,
  24                                                int alt_rssi_avg, int pkt_count)
  25 {
  26         return (((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
  27                 (alt_rssi_avg > main_rssi_avg + maxdelta)) ||
  28                 (alt_rssi_avg > main_rssi_avg + mindelta)) && (pkt_count > 50);
  29 }
  30
  31 static inline bool ath_ant_div_comb_alt_check(u8 div_group, int alt_ratio,
  32                                         int curr_main_set, int curr_alt_set,
  33                                         int alt_rssi_avg, int main_rssi_avg)
  34 {
  35         bool result = false;
  36         switch (div_group) {
  37         case 0:
  38                 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
  39                         result = true;
  40                 break;
  41         case 1:
  42                 if ((((curr_main_set == ATH_ANT_DIV_COMB_LNA2) &&
  43                         (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) &&
  44                                 (alt_rssi_avg >= (main_rssi_avg - 5))) ||
  45                         ((curr_main_set == ATH_ANT_DIV_COMB_LNA1) &&
  46                         (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) &&
  47                                 (alt_rssi_avg >= (main_rssi_avg - 2)))) &&
  48                                                         (alt_rssi_avg >= 4))
  49                         result = true;
  50                 else
  51                         result = false;
  52                 break;
  53         }
  54
  55         return result;
  56 }
  57
  58 static inline bool ath9k_check_auto_sleep(struct ath_softc *sc)
  59 {
  60         return sc->ps_enabled &&
  61                (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP);
  62 }
  63
  64 /*
  65  * Setup and link descriptors.
  66  *
  67  * 11N: we can no longer afford to self link the last descriptor.
  68  * MAC acknowledges BA status as long as it copies frames to host
  69  * buffer (or rx fifo). This can incorrectly acknowledge packets
  70  * to a sender if last desc is self-linked.
  71  */
  72 static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
  73 {
  74         struct ath_hw *ah = sc->sc_ah;
  75         struct ath_common *common = ath9k_hw_common(ah);
  76         struct ath_desc *ds;
  77         struct sk_buff *skb;
  78
  79         ATH_RXBUF_RESET(bf);
  80
  81         ds = bf->bf_desc;
  82         ds->ds_link = 0; /* link to null */
  83         ds->ds_data = bf->bf_buf_addr;
  84
  85         /* virtual addr of the beginning of the buffer. */
  86         skb = bf->bf_mpdu;
  87         BUG_ON(skb == NULL);
  88         ds->ds_vdata = skb->data;
  89
  90         /*
  91          * setup rx descriptors. The rx_bufsize here tells the hardware
  92          * how much data it can DMA to us and that we are prepared
  93          * to process
  94          */
  95         ath9k_hw_setuprxdesc(ah, ds,
  96                              common->rx_bufsize,
  97                              0);
  98
  99         if (sc->rx.rxlink == NULL)
 100                 ath9k_hw_putrxbuf(ah, bf->bf_daddr);
 101         else
 102                 *sc->rx.rxlink = bf->bf_daddr;
 103
 104         sc->rx.rxlink = &ds->ds_link;
 105 }
 106
 107 static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
 108 {
 109         /* XXX block beacon interrupts */
 110         ath9k_hw_setantenna(sc->sc_ah, antenna);
 111         sc->rx.defant = antenna;
 112         sc->rx.rxotherant = 0;
 113 }
 114
 115 static void ath_opmode_init(struct ath_softc *sc)
 116 {
 117         struct ath_hw *ah = sc->sc_ah;
 118         struct ath_common *common = ath9k_hw_common(ah);
 119
 120         u32 rfilt, mfilt[2];
 121
 122         /* configure rx filter */
 123         rfilt = ath_calcrxfilter(sc);
 124         ath9k_hw_setrxfilter(ah, rfilt);
 125
 126         /* configure bssid mask */
 127         ath_hw_setbssidmask(common);
 128
 129         /* configure operational mode */
 130         ath9k_hw_setopmode(ah);
 131
 132         /* calculate and install multicast filter */
 133         mfilt[0] = mfilt[1] = ~0;
 134         ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
 135 }
 136
 137 static bool ath_rx_edma_buf_link(struct ath_softc *sc,
 138                                  enum ath9k_rx_qtype qtype)
 139 {
 140         struct ath_hw *ah = sc->sc_ah;
 141         struct ath_rx_edma *rx_edma;
 142         struct sk_buff *skb;
 143         struct ath_buf *bf;
 144
 145         rx_edma = &sc->rx.rx_edma[qtype];
 146         if (skb_queue_len(&rx_edma->rx_fifo) >= rx_edma->rx_fifo_hwsize)
 147                 return false;
 148
 149         bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
 150         list_del_init(&bf->list);
 151
 152         skb = bf->bf_mpdu;
 153
 154         ATH_RXBUF_RESET(bf);
 155         memset(skb->data, 0, ah->caps.rx_status_len);
 156         dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
 157                                 ah->caps.rx_status_len, DMA_TO_DEVICE);
 158
 159         SKB_CB_ATHBUF(skb) = bf;
 160         ath9k_hw_addrxbuf_edma(ah, bf->bf_buf_addr, qtype);
 161         skb_queue_tail(&rx_edma->rx_fifo, skb);
 162
 163         return true;
 164 }
 165
 166 static void ath_rx_addbuffer_edma(struct ath_softc *sc,
 167                                   enum ath9k_rx_qtype qtype, int size)
 168 {
 169         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 170         u32 nbuf = 0;
 171
 172         if (list_empty(&sc->rx.rxbuf)) {
 173                 ath_dbg(common, ATH_DBG_QUEUE, "No free rx buf available\n");
 174                 return;
 175         }
 176
 177         while (!list_empty(&sc->rx.rxbuf)) {
 178                 nbuf++;
 179
 180                 if (!ath_rx_edma_buf_link(sc, qtype))
 181                         break;
 182
 183                 if (nbuf >= size)
 184                         break;
 185         }
 186 }
 187
 188 static void ath_rx_remove_buffer(struct ath_softc *sc,
 189                                  enum ath9k_rx_qtype qtype)
 190 {
 191         struct ath_buf *bf;
 192         struct ath_rx_edma *rx_edma;
 193         struct sk_buff *skb;
 194
 195         rx_edma = &sc->rx.rx_edma[qtype];
 196
 197         while ((skb = skb_dequeue(&rx_edma->rx_fifo)) != NULL) {
 198                 bf = SKB_CB_ATHBUF(skb);
 199                 BUG_ON(!bf);
 200                 list_add_tail(&bf->list, &sc->rx.rxbuf);
 201         }
 202 }
 203
 204 static void ath_rx_edma_cleanup(struct ath_softc *sc)
 205 {
 206         struct ath_buf *bf;
 207
 208         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
 209         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
 210
 211         list_for_each_entry(bf, &sc->rx.rxbuf, list) {
 212                 if (bf->bf_mpdu)
 213                         dev_kfree_skb_any(bf->bf_mpdu);
 214         }
 215
 216         INIT_LIST_HEAD(&sc->rx.rxbuf);
 217
 218         kfree(sc->rx.rx_bufptr);
 219         sc->rx.rx_bufptr = NULL;
 220 }
 221
 222 static void ath_rx_edma_init_queue(struct ath_rx_edma *rx_edma, int size)
 223 {
 224         skb_queue_head_init(&rx_edma->rx_fifo);
 225         skb_queue_head_init(&rx_edma->rx_buffers);
 226         rx_edma->rx_fifo_hwsize = size;
 227 }
 228
 229 static int ath_rx_edma_init(struct ath_softc *sc, int nbufs)
 230 {
 231         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 232         struct ath_hw *ah = sc->sc_ah;
 233         struct sk_buff *skb;
 234         struct ath_buf *bf;
 235         int error = 0, i;
 236         u32 size;
 237
 238         ath9k_hw_set_rx_bufsize(ah, common->rx_bufsize -
 239                                     ah->caps.rx_status_len);
 240
 241         ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_LP],
 242                                ah->caps.rx_lp_qdepth);
 243         ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_HP],
 244                                ah->caps.rx_hp_qdepth);
 245
 246         size = sizeof(struct ath_buf) * nbufs;
 247         bf = kzalloc(size, GFP_KERNEL);
 248         if (!bf)
 249                 return -ENOMEM;
 250
 251         INIT_LIST_HEAD(&sc->rx.rxbuf);
 252         sc->rx.rx_bufptr = bf;
 253
 254         for (i = 0; i < nbufs; i++, bf++) {
 255                 skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL);
 256                 if (!skb) {
 257                         error = -ENOMEM;
 258                         goto rx_init_fail;
 259                 }
 260
 261                 memset(skb->data, 0, common->rx_bufsize);
 262                 bf->bf_mpdu = skb;
 263
 264                 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
 265                                                  common->rx_bufsize,
 266                                                  DMA_BIDIRECTIONAL);
 267                 if (unlikely(dma_mapping_error(sc->dev,
 268                                                 bf->bf_buf_addr))) {
 269                                 dev_kfree_skb_any(skb);
 270                                 bf->bf_mpdu = NULL;
 271                                 bf->bf_buf_addr = 0;
 272                                 ath_err(common,
 273                                         "dma_mapping_error() on RX init\n");
 274                                 error = -ENOMEM;
 275                                 goto rx_init_fail;
 276                 }
 277
 278                 list_add_tail(&bf->list, &sc->rx.rxbuf);
 279         }
 280
 281         return 0;
 282
 283 rx_init_fail:
 284         ath_rx_edma_cleanup(sc);
 285         return error;
 286 }
 287
 288 static void ath_edma_start_recv(struct ath_softc *sc)
 289 {
 290         spin_lock_bh(&sc->rx.rxbuflock);
 291
 292         ath9k_hw_rxena(sc->sc_ah);
 293
 294         ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_HP,
 295                               sc->rx.rx_edma[ATH9K_RX_QUEUE_HP].rx_fifo_hwsize);
 296
 297         ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_LP,
 298                               sc->rx.rx_edma[ATH9K_RX_QUEUE_LP].rx_fifo_hwsize);
 299
 300         ath_opmode_init(sc);
 301
 302         ath9k_hw_startpcureceive(sc->sc_ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
 303
 304         spin_unlock_bh(&sc->rx.rxbuflock);
 305 }
 306
 307 static void ath_edma_stop_recv(struct ath_softc *sc)
 308 {
 309         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
 310         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
 311 }
 312
 313 int ath_rx_init(struct ath_softc *sc, int nbufs)
 314 {
 315         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 316         struct sk_buff *skb;
 317         struct ath_buf *bf;
 318         int error = 0;
 319
 320         spin_lock_init(&sc->sc_pcu_lock);
 321         sc->sc_flags &= ~SC_OP_RXFLUSH;
 322         spin_lock_init(&sc->rx.rxbuflock);
 323
 324         common->rx_bufsize = IEEE80211_MAX_MPDU_LEN / 2 +
 325                              sc->sc_ah->caps.rx_status_len;
 326
 327         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 328                 return ath_rx_edma_init(sc, nbufs);
 329         } else {
 330                 ath_dbg(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
 331                         common->cachelsz, common->rx_bufsize);
 332
 333                 /* Initialize rx descriptors */
 334
 335                 error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
 336                                 "rx", nbufs, 1, 0);
 337                 if (error != 0) {
 338                         ath_err(common,
 339                                 "failed to allocate rx descriptors: %d\n",
 340                                 error);
 341                         goto err;
 342                 }
 343
 344                 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
 345                         skb = ath_rxbuf_alloc(common, common->rx_bufsize,
 346                                               GFP_KERNEL);
 347                         if (skb == NULL) {
 348                                 error = -ENOMEM;
 349                                 goto err;
 350                         }
 351
 352                         bf->bf_mpdu = skb;
 353                         bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
 354                                         common->rx_bufsize,
 355                                         DMA_FROM_DEVICE);
 356                         if (unlikely(dma_mapping_error(sc->dev,
 357                                                         bf->bf_buf_addr))) {
 358                                 dev_kfree_skb_any(skb);
 359                                 bf->bf_mpdu = NULL;
 360                                 bf->bf_buf_addr = 0;
 361                                 ath_err(common,
 362                                         "dma_mapping_error() on RX init\n");
 363                                 error = -ENOMEM;
 364                                 goto err;
 365                         }
 366                 }
 367                 sc->rx.rxlink = NULL;
 368         }
 369
 370 err:
 371         if (error)
 372                 ath_rx_cleanup(sc);
 373
 374         return error;
 375 }
 376
 377 void ath_rx_cleanup(struct ath_softc *sc)
 378 {
 379         struct ath_hw *ah = sc->sc_ah;
 380         struct ath_common *common = ath9k_hw_common(ah);
 381         struct sk_buff *skb;
 382         struct ath_buf *bf;
 383
 384         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 385                 ath_rx_edma_cleanup(sc);
 386                 return;
 387         } else {
 388                 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
 389                         skb = bf->bf_mpdu;
 390                         if (skb) {
 391                                 dma_unmap_single(sc->dev, bf->bf_buf_addr,
 392                                                 common->rx_bufsize,
 393                                                 DMA_FROM_DEVICE);
 394                                 dev_kfree_skb(skb);
 395                                 bf->bf_buf_addr = 0;
 396                                 bf->bf_mpdu = NULL;
 397                         }
 398                 }
 399
 400                 if (sc->rx.rxdma.dd_desc_len != 0)
 401                         ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
 402         }
 403 }
 404
 405 /*
 406  * Calculate the receive filter according to the
 407  * operating mode and state:
 408  *
 409  * o always accept unicast, broadcast, and multicast traffic
 410  * o maintain current state of phy error reception (the hal
 411  *   may enable phy error frames for noise immunity work)
 412  * o probe request frames are accepted only when operating in
 413  *   hostap, adhoc, or monitor modes
 414  * o enable promiscuous mode according to the interface state
 415  * o accept beacons:
 416  *   - when operating in adhoc mode so the 802.11 layer creates
 417  *     node table entries for peers,
 418  *   - when operating in station mode for collecting rssi data when
 419  *     the station is otherwise quiet, or
 420  *   - when operating as a repeater so we see repeater-sta beacons
 421  *   - when scanning
 422  */
 423
 424 u32 ath_calcrxfilter(struct ath_softc *sc)
 425 {
 426 #define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
 427
 428         u32 rfilt;
 429
 430         rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
 431                 | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
 432                 | ATH9K_RX_FILTER_MCAST;
 433
 434         if (sc->rx.rxfilter & FIF_PROBE_REQ)
 435                 rfilt |= ATH9K_RX_FILTER_PROBEREQ;
 436
 437         /*
 438          * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
 439          * mode interface or when in monitor mode. AP mode does not need this
 440          * since it receives all in-BSS frames anyway.
 441          */
 442         if (sc->sc_ah->is_monitoring)
 443                 rfilt |= ATH9K_RX_FILTER_PROM;
 444
 445         if (sc->rx.rxfilter & FIF_CONTROL)
 446                 rfilt |= ATH9K_RX_FILTER_CONTROL;
 447
 448         if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
 449             (sc->nvifs <= 1) &&
 450             !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
 451                 rfilt |= ATH9K_RX_FILTER_MYBEACON;
 452         else
 453                 rfilt |= ATH9K_RX_FILTER_BEACON;
 454
 455         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
 456             (sc->rx.rxfilter & FIF_PSPOLL))
 457                 rfilt |= ATH9K_RX_FILTER_PSPOLL;
 458
 459         if (conf_is_ht(&sc->hw->conf))
 460                 rfilt |= ATH9K_RX_FILTER_COMP_BAR;
 461
 462         if (sc->nvifs > 1 || (sc->rx.rxfilter & FIF_OTHER_BSS)) {
 463                 /* The following may also be needed for other older chips */
 464                 if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
 465                         rfilt |= ATH9K_RX_FILTER_PROM;
 466                 rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
 467         }
 468
 469         return rfilt;
 470
 471 #undef RX_FILTER_PRESERVE
 472 }
 473
 474 int ath_startrecv(struct ath_softc *sc)
 475 {
 476         struct ath_hw *ah = sc->sc_ah;
 477         struct ath_buf *bf, *tbf;
 478
 479         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 480                 ath_edma_start_recv(sc);
 481                 return 0;
 482         }
 483
 484         spin_lock_bh(&sc->rx.rxbuflock);
 485         if (list_empty(&sc->rx.rxbuf))
 486                 goto start_recv;
 487
 488         sc->rx.rxlink = NULL;
 489         list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
 490                 ath_rx_buf_link(sc, bf);
 491         }
 492
 493         /* We could have deleted elements so the list may be empty now */
 494         if (list_empty(&sc->rx.rxbuf))
 495                 goto start_recv;
 496
 497         bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
 498         ath9k_hw_putrxbuf(ah, bf->bf_daddr);
 499         ath9k_hw_rxena(ah);
 500
 501 start_recv:
 502         ath_opmode_init(sc);
 503         ath9k_hw_startpcureceive(ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
 504
 505         spin_unlock_bh(&sc->rx.rxbuflock);
 506
 507         return 0;
 508 }
 509
 510 bool ath_stoprecv(struct ath_softc *sc)
 511 {
 512         struct ath_hw *ah = sc->sc_ah;
 513         bool stopped, reset = false;
 514
 515         spin_lock_bh(&sc->rx.rxbuflock);
 516         ath9k_hw_abortpcurecv(ah);
 517         ath9k_hw_setrxfilter(ah, 0);
 518         stopped = ath9k_hw_stopdmarecv(ah, &reset);
 519
 520         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 521                 ath_edma_stop_recv(sc);
 522         else
 523                 sc->rx.rxlink = NULL;
 524         spin_unlock_bh(&sc->rx.rxbuflock);
 525
 526         if (!(ah->ah_flags & AH_UNPLUGGED) &&
 527             unlikely(!stopped)) {
 528                 ath_err(ath9k_hw_common(sc->sc_ah),
 529                         "Could not stop RX, we could be "
 530                         "confusing the DMA engine when we start RX up\n");
 531                 ATH_DBG_WARN_ON_ONCE(!stopped);
 532         }
 533         return stopped && !reset;
 534 }
 535
 536 void ath_flushrecv(struct ath_softc *sc)
 537 {
 538         sc->sc_flags |= SC_OP_RXFLUSH;
 539         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 540                 ath_rx_tasklet(sc, 1, true);
 541         ath_rx_tasklet(sc, 1, false);
 542         sc->sc_flags &= ~SC_OP_RXFLUSH;
 543 }
 544
 545 static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
 546 {
 547         /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
 548         struct ieee80211_mgmt *mgmt;
 549         u8 *pos, *end, id, elen;
 550         struct ieee80211_tim_ie *tim;
 551
 552         mgmt = (struct ieee80211_mgmt *)skb->data;
 553         pos = mgmt->u.beacon.variable;
 554         end = skb->data + skb->len;
 555
 556         while (pos + 2 < end) {
 557                 id = *pos++;
 558                 elen = *pos++;
 559                 if (pos + elen > end)
 560                         break;
 561
 562                 if (id == WLAN_EID_TIM) {
 563                         if (elen < sizeof(*tim))
 564                                 break;
 565                         tim = (struct ieee80211_tim_ie *) pos;
 566                         if (tim->dtim_count != 0)
 567                                 break;
 568                         return tim->bitmap_ctrl & 0x01;
 569                 }
 570
 571                 pos += elen;
 572         }
 573
 574         return false;
 575 }
 576
 577 static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
 578 {
 579         struct ieee80211_mgmt *mgmt;
 580         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 581
 582         if (skb->len < 24 + 8 + 2 + 2)
 583                 return;
 584
 585         mgmt = (struct ieee80211_mgmt *)skb->data;
 586         if (memcmp(common->curbssid, mgmt->bssid, ETH_ALEN) != 0) {
 587                 /* TODO:  This doesn't work well if you have stations
 588                  * associated to two different APs because curbssid
 589                  * is just the last AP that any of the stations associated
 590                  * with.
 591                  */
 592                 return; /* not from our current AP */
 593         }
 594
 595         sc->ps_flags &= ~PS_WAIT_FOR_BEACON;
 596
 597         if (sc->ps_flags & PS_BEACON_SYNC) {
 598                 sc->ps_flags &= ~PS_BEACON_SYNC;
 599                 ath_dbg(common, ATH_DBG_PS,
 600                         "Reconfigure Beacon timers based on timestamp from the AP\n");
 601                 ath_set_beacon(sc);
 602                 sc->ps_flags &= ~PS_TSFOOR_SYNC;
 603         }
 604
 605         if (ath_beacon_dtim_pending_cab(skb)) {
 606                 /*
 607                  * Remain awake waiting for buffered broadcast/multicast
 608                  * frames. If the last broadcast/multicast frame is not
 609                  * received properly, the next beacon frame will work as
 610                  * a backup trigger for returning into NETWORK SLEEP state,
 611                  * so we are waiting for it as well.
 612                  */
 613                 ath_dbg(common, ATH_DBG_PS,
 614                         "Received DTIM beacon indicating buffered broadcast/multicast frame(s)\n");
 615                 sc->ps_flags |= PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON;
 616                 return;
 617         }
 618
 619         if (sc->ps_flags & PS_WAIT_FOR_CAB) {
 620                 /*
 621                  * This can happen if a broadcast frame is dropped or the AP
 622                  * fails to send a frame indicating that all CAB frames have
 623                  * been delivered.
 624                  */
 625                 sc->ps_flags &= ~PS_WAIT_FOR_CAB;
 626                 ath_dbg(common, ATH_DBG_PS,
 627                         "PS wait for CAB frames timed out\n");
 628         }
 629 }
 630
 631 static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
 632 {
 633         struct ieee80211_hdr *hdr;
 634         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 635
 636         hdr = (struct ieee80211_hdr *)skb->data;
 637
 638         /* Process Beacon and CAB receive in PS state */
 639         if (((sc->ps_flags & PS_WAIT_FOR_BEACON) || ath9k_check_auto_sleep(sc))
 640             && ieee80211_is_beacon(hdr->frame_control))
 641                 ath_rx_ps_beacon(sc, skb);
 642         else if ((sc->ps_flags & PS_WAIT_FOR_CAB) &&
 643                  (ieee80211_is_data(hdr->frame_control) ||
 644                   ieee80211_is_action(hdr->frame_control)) &&
 645                  is_multicast_ether_addr(hdr->addr1) &&
 646                  !ieee80211_has_moredata(hdr->frame_control)) {
 647                 /*
 648                  * No more broadcast/multicast frames to be received at this
 649                  * point.
 650                  */
 651                 sc->ps_flags &= ~(PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON);
 652                 ath_dbg(common, ATH_DBG_PS,
 653                         "All PS CAB frames received, back to sleep\n");
 654         } else if ((sc->ps_flags & PS_WAIT_FOR_PSPOLL_DATA) &&
 655                    !is_multicast_ether_addr(hdr->addr1) &&
 656                    !ieee80211_has_morefrags(hdr->frame_control)) {
 657                 sc->ps_flags &= ~PS_WAIT_FOR_PSPOLL_DATA;
 658                 ath_dbg(common, ATH_DBG_PS,
 659                         "Going back to sleep after having received PS-Poll data (0x%lx)\n",
 660                         sc->ps_flags & (PS_WAIT_FOR_BEACON |
 661                                         PS_WAIT_FOR_CAB |
 662                                         PS_WAIT_FOR_PSPOLL_DATA |
 663                                         PS_WAIT_FOR_TX_ACK));
 664         }
 665 }
 666
 667 static bool ath_edma_get_buffers(struct ath_softc *sc,
 668                                  enum ath9k_rx_qtype qtype)
 669 {
 670         struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
 671         struct ath_hw *ah = sc->sc_ah;
 672         struct ath_common *common = ath9k_hw_common(ah);
 673         struct sk_buff *skb;
 674         struct ath_buf *bf;
 675         int ret;
 676
 677         skb = skb_peek(&rx_edma->rx_fifo);
 678         if (!skb)
 679                 return false;
 680
 681         bf = SKB_CB_ATHBUF(skb);
 682         BUG_ON(!bf);
 683
 684         dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
 685                                 common->rx_bufsize, DMA_FROM_DEVICE);
 686
 687         ret = ath9k_hw_process_rxdesc_edma(ah, NULL, skb->data);
 688         if (ret == -EINPROGRESS) {
 689                 /*let device gain the buffer again*/
 690                 dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
 691                                 common->rx_bufsize, DMA_FROM_DEVICE);
 692                 return false;
 693         }
 694
 695         __skb_unlink(skb, &rx_edma->rx_fifo);
 696         if (ret == -EINVAL) {
 697                 /* corrupt descriptor, skip this one and the following one */
 698                 list_add_tail(&bf->list, &sc->rx.rxbuf);
 699                 ath_rx_edma_buf_link(sc, qtype);
 700                 skb = skb_peek(&rx_edma->rx_fifo);
 701                 if (!skb)
 702                         return true;
 703
 704                 bf = SKB_CB_ATHBUF(skb);
 705                 BUG_ON(!bf);
 706
 707                 __skb_unlink(skb, &rx_edma->rx_fifo);
 708                 list_add_tail(&bf->list, &sc->rx.rxbuf);
 709                 ath_rx_edma_buf_link(sc, qtype);
 710                 return true;
 711         }
 712         skb_queue_tail(&rx_edma->rx_buffers, skb);
 713
 714         return true;
 715 }
 716
 717 static struct ath_buf *ath_edma_get_next_rx_buf(struct ath_softc *sc,
 718                                                 struct ath_rx_status *rs,
 719                                                 enum ath9k_rx_qtype qtype)
 720 {
 721         struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
 722         struct sk_buff *skb;
 723         struct ath_buf *bf;
 724
 725         while (ath_edma_get_buffers(sc, qtype));
 726         skb = __skb_dequeue(&rx_edma->rx_buffers);
 727         if (!skb)
 728                 return NULL;
 729
 730         bf = SKB_CB_ATHBUF(skb);
 731         ath9k_hw_process_rxdesc_edma(sc->sc_ah, rs, skb->data);
 732         return bf;
 733 }
 734
 735 static struct ath_buf *ath_get_next_rx_buf(struct ath_softc *sc,
 736                                            struct ath_rx_status *rs)
 737 {
 738         struct ath_hw *ah = sc->sc_ah;
 739         struct ath_common *common = ath9k_hw_common(ah);
 740         struct ath_desc *ds;
 741         struct ath_buf *bf;
 742         int ret;
 743
 744         if (list_empty(&sc->rx.rxbuf)) {
 745                 sc->rx.rxlink = NULL;
 746                 return NULL;
 747         }
 748
 749         bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
 750         ds = bf->bf_desc;
 751
 752         /*
 753          * Must provide the virtual address of the current
 754          * descriptor, the physical address, and the virtual
 755          * address of the next descriptor in the h/w chain.
 756          * This allows the HAL to look ahead to see if the
 757          * hardware is done with a descriptor by checking the
 758          * done bit in the following descriptor and the address
 759          * of the current descriptor the DMA engine is working
 760          * on.  All this is necessary because of our use of
 761          * a self-linked list to avoid rx overruns.
 762          */
 763         ret = ath9k_hw_rxprocdesc(ah, ds, rs, 0);
 764         if (ret == -EINPROGRESS) {
 765                 struct ath_rx_status trs;
 766                 struct ath_buf *tbf;
 767                 struct ath_desc *tds;
 768
 769                 memset(&trs, 0, sizeof(trs));
 770                 if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
 771                         sc->rx.rxlink = NULL;
 772                         return NULL;
 773                 }
 774
 775                 tbf = list_entry(bf->list.next, struct ath_buf, list);
 776
 777                 /*
 778                  * On some hardware the descriptor status words could
 779                  * get corrupted, including the done bit. Because of
 780                  * this, check if the next descriptor's done bit is
 781                  * set or not.
 782                  *
 783                  * If the next descriptor's done bit is set, the current
 784                  * descriptor has been corrupted. Force s/w to discard
 785                  * this descriptor and continue...
 786                  */
 787
 788                 tds = tbf->bf_desc;
 789                 ret = ath9k_hw_rxprocdesc(ah, tds, &trs, 0);
 790                 if (ret == -EINPROGRESS)
 791                         return NULL;
 792         }
 793
 794         if (!bf->bf_mpdu)
 795                 return bf;
 796
 797         /*
 798          * Synchronize the DMA transfer with CPU before
 799          * 1. accessing the frame
 800          * 2. requeueing the same buffer to h/w
 801          */
 802         dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
 803                         common->rx_bufsize,
 804                         DMA_FROM_DEVICE);
 805
 806         return bf;
 807 }
 808
 809 /* Assumes you've already done the endian to CPU conversion */
 810 static bool ath9k_rx_accept(struct ath_common *common,
 811                             struct ieee80211_hdr *hdr,
 812                             struct ieee80211_rx_status *rxs,
 813                             struct ath_rx_status *rx_stats,
 814                             bool *decrypt_error)
 815 {
 816 #define is_mc_or_valid_tkip_keyix ((is_mc ||                    \
 817                 (rx_stats->rs_keyix != ATH9K_RXKEYIX_INVALID && \
 818                 test_bit(rx_stats->rs_keyix, common->tkip_keymap))))
 819
 820         struct ath_hw *ah = common->ah;
 821         __le16 fc;
 822         u8 rx_status_len = ah->caps.rx_status_len;
 823
 824         fc = hdr->frame_control;
 825
 826         if (!rx_stats->rs_datalen)
 827                 return false;
 828         /*
 829          * rs_status follows rs_datalen so if rs_datalen is too large
 830          * we can take a hint that hardware corrupted it, so ignore
 831          * those frames.
 832          */
 833         if (rx_stats->rs_datalen > (common->rx_bufsize - rx_status_len))
 834                 return false;
 835
 836         /* Only use error bits from the last fragment */
 837         if (rx_stats->rs_more)
 838                 return true;
 839
 840         /*
 841          * The rx_stats->rs_status will not be set until the end of the
 842          * chained descriptors so it can be ignored if rs_more is set. The
 843          * rs_more will be false at the last element of the chained
 844          * descriptors.
 845          */
 846         if (rx_stats->rs_status != 0) {
 847                 if (rx_stats->rs_status & ATH9K_RXERR_CRC)
 848                         rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
 849                 if (rx_stats->rs_status & ATH9K_RXERR_PHY)
 850                         return false;
 851
 852                 if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) {
 853                         *decrypt_error = true;
 854                 } else if (rx_stats->rs_status & ATH9K_RXERR_MIC) {
 855                         bool is_mc;
 856                         /*
 857                          * The MIC error bit is only valid if the frame
 858                          * is not a control frame or fragment, and it was
 859                          * decrypted using a valid TKIP key.
 860                          */
 861                         is_mc = !!is_multicast_ether_addr(hdr->addr1);
 862
 863                         if (!ieee80211_is_ctl(fc) &&
 864                             !ieee80211_has_morefrags(fc) &&
 865                             !(le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG) &&
 866                             is_mc_or_valid_tkip_keyix)
 867                                 rxs->flag |= RX_FLAG_MMIC_ERROR;
 868                         else
 869                                 rx_stats->rs_status &= ~ATH9K_RXERR_MIC;
 870                 }
 871                 /*
 872                  * Reject error frames with the exception of
 873                  * decryption and MIC failures. For monitor mode,
 874                  * we also ignore the CRC error.
 875                  */
 876                 if (ah->is_monitoring) {
 877                         if (rx_stats->rs_status &
 878                             ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
 879                               ATH9K_RXERR_CRC))
 880                                 return false;
 881                 } else {
 882                         if (rx_stats->rs_status &
 883                             ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
 884                                 return false;
 885                         }
 886                 }
 887         }
 888         return true;
 889 }
 890
 891 static int ath9k_process_rate(struct ath_common *common,
 892                               struct ieee80211_hw *hw,
 893                               struct ath_rx_status *rx_stats,
 894                               struct ieee80211_rx_status *rxs)
 895 {
 896         struct ieee80211_supported_band *sband;
 897         enum ieee80211_band band;
 898         unsigned int i = 0;
 899
 900         band = hw->conf.channel->band;
 901         sband = hw->wiphy->bands[band];
 902
 903         if (rx_stats->rs_rate & 0x80) {
 904                 /* HT rate */
 905                 rxs->flag |= RX_FLAG_HT;
 906                 if (rx_stats->rs_flags & ATH9K_RX_2040)
 907                         rxs->flag |= RX_FLAG_40MHZ;
 908                 if (rx_stats->rs_flags & ATH9K_RX_GI)
 909                         rxs->flag |= RX_FLAG_SHORT_GI;
 910                 rxs->rate_idx = rx_stats->rs_rate & 0x7f;
 911                 return 0;
 912         }
 913
 914         for (i = 0; i < sband->n_bitrates; i++) {
 915                 if (sband->bitrates[i].hw_value == rx_stats->rs_rate) {
 916                         rxs->rate_idx = i;
 917                         return 0;
 918                 }
 919                 if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) {
 920                         rxs->flag |= RX_FLAG_SHORTPRE;
 921                         rxs->rate_idx = i;
 922                         return 0;
 923                 }
 924         }
 925
 926         /*
 927          * No valid hardware bitrate found -- we should not get here
 928          * because hardware has already validated this frame as OK.
 929          */
 930         ath_dbg(common, ATH_DBG_XMIT,
 931                 "unsupported hw bitrate detected 0x%02x using 1 Mbit\n",
 932                 rx_stats->rs_rate);
 933
 934         return -EINVAL;
 935 }
 936
 937 static void ath9k_process_rssi(struct ath_common *common,
 938                                struct ieee80211_hw *hw,
 939                                struct ieee80211_hdr *hdr,
 940                                struct ath_rx_status *rx_stats)
 941 {
 942         struct ath_softc *sc = hw->priv;
 943         struct ath_hw *ah = common->ah;
 944         int last_rssi;
 945         __le16 fc;
 946
 947         if ((ah->opmode != NL80211_IFTYPE_STATION) &&
 948             (ah->opmode != NL80211_IFTYPE_ADHOC))
 949                 return;
 950
 951         fc = hdr->frame_control;
 952         if (!ieee80211_is_beacon(fc) ||
 953             compare_ether_addr(hdr->addr3, common->curbssid)) {
 954                 /* TODO:  This doesn't work well if you have stations
 955                  * associated to two different APs because curbssid
 956                  * is just the last AP that any of the stations associated
 957                  * with.
 958                  */
 959                 return;
 960         }
 961
 962         if (rx_stats->rs_rssi != ATH9K_RSSI_BAD && !rx_stats->rs_moreaggr)
 963                 ATH_RSSI_LPF(sc->last_rssi, rx_stats->rs_rssi);
 964
 965         last_rssi = sc->last_rssi;
 966         if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
 967                 rx_stats->rs_rssi = ATH_EP_RND(last_rssi,
 968                                               ATH_RSSI_EP_MULTIPLIER);
 969         if (rx_stats->rs_rssi < 0)
 970                 rx_stats->rs_rssi = 0;
 971
 972         /* Update Beacon RSSI, this is used by ANI. */
 973         ah->stats.avgbrssi = rx_stats->rs_rssi;
 974 }
 975
 976 /*
 977  * For Decrypt or Demic errors, we only mark packet status here and always push
 978  * up the frame up to let mac80211 handle the actual error case, be it no
 979  * decryption key or real decryption error. This let us keep statistics there.
 980  */
 981 static int ath9k_rx_skb_preprocess(struct ath_common *common,
 982                                    struct ieee80211_hw *hw,
 983                                    struct ieee80211_hdr *hdr,
 984                                    struct ath_rx_status *rx_stats,
 985                                    struct ieee80211_rx_status *rx_status,
 986                                    bool *decrypt_error)
 987 {
 988         memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
 989
 990         /*
 991          * everything but the rate is checked here, the rate check is done
 992          * separately to avoid doing two lookups for a rate for each frame.
 993          */
 994         if (!ath9k_rx_accept(common, hdr, rx_status, rx_stats, decrypt_error))
 995                 return -EINVAL;
 996
 997         /* Only use status info from the last fragment */
 998         if (rx_stats->rs_more)
 999                 return 0;
1000
1001         ath9k_process_rssi(common, hw, hdr, rx_stats);
1002
1003         if (ath9k_process_rate(common, hw, rx_stats, rx_status))
1004                 return -EINVAL;
1005
1006         rx_status->band = hw->conf.channel->band;
1007         rx_status->freq = hw->conf.channel->center_freq;
1008         rx_status->signal = ATH_DEFAULT_NOISE_FLOOR + rx_stats->rs_rssi;
1009         rx_status->antenna = rx_stats->rs_antenna;
1010         rx_status->flag |= RX_FLAG_MACTIME_MPDU;
1011
1012         return 0;
1013 }
1014
1015 static void ath9k_rx_skb_postprocess(struct ath_common *common,
1016                                      struct sk_buff *skb,
1017                                      struct ath_rx_status *rx_stats,
1018                                      struct ieee80211_rx_status *rxs,
1019                                      bool decrypt_error)
1020 {
1021         struct ath_hw *ah = common->ah;
1022         struct ieee80211_hdr *hdr;
1023         int hdrlen, padpos, padsize;
1024         u8 keyix;
1025         __le16 fc;
1026
1027         /* see if any padding is done by the hw and remove it */
1028         hdr = (struct ieee80211_hdr *) skb->data;
1029         hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1030         fc = hdr->frame_control;
1031         padpos = ath9k_cmn_padpos(hdr->frame_control);
1032
1033         /* The MAC header is padded to have 32-bit boundary if the
1034          * packet payload is non-zero. The general calculation for
1035          * padsize would take into account odd header lengths:
1036          * padsize = (4 - padpos % 4) % 4; However, since only
1037          * even-length headers are used, padding can only be 0 or 2
1038          * bytes and we can optimize this a bit. In addition, we must
1039          * not try to remove padding from short control frames that do
1040          * not have payload. */
1041         padsize = padpos & 3;
1042         if (padsize && skb->len>=padpos+padsize+FCS_LEN) {
1043                 memmove(skb->data + padsize, skb->data, padpos);
1044                 skb_pull(skb, padsize);
1045         }
1046
1047         keyix = rx_stats->rs_keyix;
1048
1049         if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error &&
1050             ieee80211_has_protected(fc)) {
1051                 rxs->flag |= RX_FLAG_DECRYPTED;
1052         } else if (ieee80211_has_protected(fc)
1053                    && !decrypt_error && skb->len >= hdrlen + 4) {
1054                 keyix = skb->data[hdrlen + 3] >> 6;
1055
1056                 if (test_bit(keyix, common->keymap))
1057                         rxs->flag |= RX_FLAG_DECRYPTED;
1058         }
1059         if (ah->sw_mgmt_crypto &&
1060             (rxs->flag & RX_FLAG_DECRYPTED) &&
1061             ieee80211_is_mgmt(fc))
1062                 /* Use software decrypt for management frames. */
1063                 rxs->flag &= ~RX_FLAG_DECRYPTED;
1064 }
1065
1066 static void ath_lnaconf_alt_good_scan(struct ath_ant_comb *antcomb,
1067                                       struct ath_hw_antcomb_conf ant_conf,
1068                                       int main_rssi_avg)
1069 {
1070         antcomb->quick_scan_cnt = 0;
1071
1072         if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA2)
1073                 antcomb->rssi_lna2 = main_rssi_avg;
1074         else if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA1)
1075                 antcomb->rssi_lna1 = main_rssi_avg;
1076
1077         switch ((ant_conf.main_lna_conf << 4) | ant_conf.alt_lna_conf) {
1078         case (0x10): /* LNA2 A-B */
1079                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1080                 antcomb->first_quick_scan_conf =
1081                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1082                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1083                 break;
1084         case (0x20): /* LNA1 A-B */
1085                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1086                 antcomb->first_quick_scan_conf =
1087                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1088                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1089                 break;
1090         case (0x21): /* LNA1 LNA2 */
1091                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA2;
1092                 antcomb->first_quick_scan_conf =
1093                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1094                 antcomb->second_quick_scan_conf =
1095                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1096                 break;
1097         case (0x12): /* LNA2 LNA1 */
1098                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1;
1099                 antcomb->first_quick_scan_conf =
1100                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1101                 antcomb->second_quick_scan_conf =
1102                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1103                 break;
1104         case (0x13): /* LNA2 A+B */
1105                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1106                 antcomb->first_quick_scan_conf =
1107                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1108                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1109                 break;
1110         case (0x23): /* LNA1 A+B */
1111                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1112                 antcomb->first_quick_scan_conf =
1113                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1114                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1115                 break;
1116         default:
1117                 break;
1118         }
1119 }
1120
1121 static void ath_select_ant_div_from_quick_scan(struct ath_ant_comb *antcomb,
1122                                 struct ath_hw_antcomb_conf *div_ant_conf,
1123                                 int main_rssi_avg, int alt_rssi_avg,
1124                                 int alt_ratio)
1125 {
1126         /* alt_good */
1127         switch (antcomb->quick_scan_cnt) {
1128         case 0:
1129                 /* set alt to main, and alt to first conf */
1130                 div_ant_conf->main_lna_conf = antcomb->main_conf;
1131                 div_ant_conf->alt_lna_conf = antcomb->first_quick_scan_conf;
1132                 break;
1133         case 1:
1134                 /* set alt to main, and alt to first conf */
1135                 div_ant_conf->main_lna_conf = antcomb->main_conf;
1136                 div_ant_conf->alt_lna_conf = antcomb->second_quick_scan_conf;
1137                 antcomb->rssi_first = main_rssi_avg;
1138                 antcomb->rssi_second = alt_rssi_avg;
1139
1140                 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1141                         /* main is LNA1 */
1142                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1143                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1144                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1145                                                 main_rssi_avg, alt_rssi_avg,
1146                                                 antcomb->total_pkt_count))
1147                                 antcomb->first_ratio = true;
1148                         else
1149                                 antcomb->first_ratio = false;
1150                 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1151                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1152                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1153                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1154                                                 main_rssi_avg, alt_rssi_avg,
1155                                                 antcomb->total_pkt_count))
1156                                 antcomb->first_ratio = true;
1157                         else
1158                                 antcomb->first_ratio = false;
1159                 } else {
1160                         if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1161                             (alt_rssi_avg > main_rssi_avg +
1162                             ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1163                             (alt_rssi_avg > main_rssi_avg)) &&
1164                             (antcomb->total_pkt_count > 50))
1165                                 antcomb->first_ratio = true;
1166                         else
1167                                 antcomb->first_ratio = false;
1168                 }
1169                 break;
1170         case 2:
1171                 antcomb->alt_good = false;
1172                 antcomb->scan_not_start = false;
1173                 antcomb->scan = false;
1174                 antcomb->rssi_first = main_rssi_avg;
1175                 antcomb->rssi_third = alt_rssi_avg;
1176
1177                 if (antcomb->second_quick_scan_conf == ATH_ANT_DIV_COMB_LNA1)
1178                         antcomb->rssi_lna1 = alt_rssi_avg;
1179                 else if (antcomb->second_quick_scan_conf ==
1180                          ATH_ANT_DIV_COMB_LNA2)
1181                         antcomb->rssi_lna2 = alt_rssi_avg;
1182                 else if (antcomb->second_quick_scan_conf ==
1183                          ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2) {
1184                         if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2)
1185                                 antcomb->rssi_lna2 = main_rssi_avg;
1186                         else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1)
1187                                 antcomb->rssi_lna1 = main_rssi_avg;
1188                 }
1189
1190                 if (antcomb->rssi_lna2 > antcomb->rssi_lna1 +
1191                     ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)
1192                         div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1193                 else
1194                         div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA1;
1195
1196                 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1197                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1198                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1199                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1200                                                 main_rssi_avg, alt_rssi_avg,
1201                                                 antcomb->total_pkt_count))
1202                                 antcomb->second_ratio = true;
1203                         else
1204                                 antcomb->second_ratio = false;
1205                 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1206                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1207                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1208                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1209                                                 main_rssi_avg, alt_rssi_avg,
1210                                                 antcomb->total_pkt_count))
1211                                 antcomb->second_ratio = true;
1212                         else
1213                                 antcomb->second_ratio = false;
1214                 } else {
1215                         if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1216                             (alt_rssi_avg > main_rssi_avg +
1217                             ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1218                             (alt_rssi_avg > main_rssi_avg)) &&
1219                             (antcomb->total_pkt_count > 50))
1220                                 antcomb->second_ratio = true;
1221                         else
1222                                 antcomb->second_ratio = false;
1223                 }
1224
1225                 /* set alt to the conf with maximun ratio */
1226                 if (antcomb->first_ratio && antcomb->second_ratio) {
1227                         if (antcomb->rssi_second > antcomb->rssi_third) {
1228                                 /* first alt*/
1229                                 if ((antcomb->first_quick_scan_conf ==
1230                                     ATH_ANT_DIV_COMB_LNA1) ||
1231                                     (antcomb->first_quick_scan_conf ==
1232                                     ATH_ANT_DIV_COMB_LNA2))
1233                                         /* Set alt LNA1 or LNA2*/
1234                                         if (div_ant_conf->main_lna_conf ==
1235                                             ATH_ANT_DIV_COMB_LNA2)
1236                                                 div_ant_conf->alt_lna_conf =
1237                                                         ATH_ANT_DIV_COMB_LNA1;
1238                                         else
1239                                                 div_ant_conf->alt_lna_conf =
1240                                                         ATH_ANT_DIV_COMB_LNA2;
1241                                 else
1242                                         /* Set alt to A+B or A-B */
1243                                         div_ant_conf->alt_lna_conf =
1244                                                 antcomb->first_quick_scan_conf;
1245                         } else if ((antcomb->second_quick_scan_conf ==
1246                                    ATH_ANT_DIV_COMB_LNA1) ||
1247                                    (antcomb->second_quick_scan_conf ==
1248                                    ATH_ANT_DIV_COMB_LNA2)) {
1249                                 /* Set alt LNA1 or LNA2 */
1250                                 if (div_ant_conf->main_lna_conf ==
1251                                     ATH_ANT_DIV_COMB_LNA2)
1252                                         div_ant_conf->alt_lna_conf =
1253                                                 ATH_ANT_DIV_COMB_LNA1;
1254                                 else
1255                                         div_ant_conf->alt_lna_conf =
1256                                                 ATH_ANT_DIV_COMB_LNA2;
1257                         } else {
1258                                 /* Set alt to A+B or A-B */
1259                                 div_ant_conf->alt_lna_conf =
1260                                         antcomb->second_quick_scan_conf;
1261                         }
1262                 } else if (antcomb->first_ratio) {
1263                         /* first alt */
1264                         if ((antcomb->first_quick_scan_conf ==
1265                             ATH_ANT_DIV_COMB_LNA1) ||
1266                             (antcomb->first_quick_scan_conf ==
1267                             ATH_ANT_DIV_COMB_LNA2))
1268                                         /* Set alt LNA1 or LNA2 */
1269                                 if (div_ant_conf->main_lna_conf ==
1270                                     ATH_ANT_DIV_COMB_LNA2)
1271                                         div_ant_conf->alt_lna_conf =
1272                                                         ATH_ANT_DIV_COMB_LNA1;
1273                                 else
1274                                         div_ant_conf->alt_lna_conf =
1275                                                         ATH_ANT_DIV_COMB_LNA2;
1276                         else
1277                                 /* Set alt to A+B or A-B */
1278                                 div_ant_conf->alt_lna_conf =
1279                                                 antcomb->first_quick_scan_conf;
1280                 } else if (antcomb->second_ratio) {
1281                                 /* second alt */
1282                         if ((antcomb->second_quick_scan_conf ==
1283                             ATH_ANT_DIV_COMB_LNA1) ||
1284                             (antcomb->second_quick_scan_conf ==
1285                             ATH_ANT_DIV_COMB_LNA2))
1286                                 /* Set alt LNA1 or LNA2 */
1287                                 if (div_ant_conf->main_lna_conf ==
1288                                     ATH_ANT_DIV_COMB_LNA2)
1289                                         div_ant_conf->alt_lna_conf =
1290                                                 ATH_ANT_DIV_COMB_LNA1;
1291                                 else
1292                                         div_ant_conf->alt_lna_conf =
1293                                                 ATH_ANT_DIV_COMB_LNA2;
1294                         else
1295                                 /* Set alt to A+B or A-B */
1296                                 div_ant_conf->alt_lna_conf =
1297                                                 antcomb->second_quick_scan_conf;
1298                 } else {
1299                         /* main is largest */
1300                         if ((antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) ||
1301                             (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2))
1302                                 /* Set alt LNA1 or LNA2 */
1303                                 if (div_ant_conf->main_lna_conf ==
1304                                     ATH_ANT_DIV_COMB_LNA2)
1305                                         div_ant_conf->alt_lna_conf =
1306                                                         ATH_ANT_DIV_COMB_LNA1;
1307                                 else
1308                                         div_ant_conf->alt_lna_conf =
1309                                                         ATH_ANT_DIV_COMB_LNA2;
1310                         else
1311                                 /* Set alt to A+B or A-B */
1312                                 div_ant_conf->alt_lna_conf = antcomb->main_conf;
1313                 }
1314                 break;
1315         default:
1316                 break;
1317         }
1318 }
1319
1320 static void ath_ant_div_conf_fast_divbias(struct ath_hw_antcomb_conf *ant_conf,
1321                 struct ath_ant_comb *antcomb, int alt_ratio)
1322 {
1323         if (ant_conf->div_group == 0) {
1324                 /* Adjust the fast_div_bias based on main and alt lna conf */
1325                 switch ((ant_conf->main_lna_conf << 4) |
1326                                 ant_conf->alt_lna_conf) {
1327                 case (0x01): /* A-B LNA2 */
1328                         ant_conf->fast_div_bias = 0x3b;
1329                         break;
1330                 case (0x02): /* A-B LNA1 */
1331                         ant_conf->fast_div_bias = 0x3d;
1332                         break;
1333                 case (0x03): /* A-B A+B */
1334                         ant_conf->fast_div_bias = 0x1;
1335                         break;
1336                 case (0x10): /* LNA2 A-B */
1337                         ant_conf->fast_div_bias = 0x7;
1338                         break;
1339                 case (0x12): /* LNA2 LNA1 */
1340                         ant_conf->fast_div_bias = 0x2;
1341                         break;
1342                 case (0x13): /* LNA2 A+B */
1343                         ant_conf->fast_div_bias = 0x7;
1344                         break;
1345                 case (0x20): /* LNA1 A-B */
1346                         ant_conf->fast_div_bias = 0x6;
1347                         break;
1348                 case (0x21): /* LNA1 LNA2 */
1349                         ant_conf->fast_div_bias = 0x0;
1350                         break;
1351                 case (0x23): /* LNA1 A+B */
1352                         ant_conf->fast_div_bias = 0x6;
1353                         break;
1354                 case (0x30): /* A+B A-B */
1355                         ant_conf->fast_div_bias = 0x1;
1356                         break;
1357                 case (0x31): /* A+B LNA2 */
1358                         ant_conf->fast_div_bias = 0x3b;
1359                         break;
1360                 case (0x32): /* A+B LNA1 */
1361                         ant_conf->fast_div_bias = 0x3d;
1362                         break;
1363                 default:
1364                         break;
1365                 }
1366         } else if (ant_conf->div_group == 2) {
1367                 /* Adjust the fast_div_bias based on main and alt_lna_conf */
1368                 switch ((ant_conf->main_lna_conf << 4) |
1369                                 ant_conf->alt_lna_conf) {
1370                 case (0x01): /* A-B LNA2 */
1371                         ant_conf->fast_div_bias = 0x1;
1372                         ant_conf->main_gaintb = 0;
1373                         ant_conf->alt_gaintb = 0;
1374                         break;
1375                 case (0x02): /* A-B LNA1 */
1376                         ant_conf->fast_div_bias = 0x1;
1377                         ant_conf->main_gaintb = 0;
1378                         ant_conf->alt_gaintb = 0;
1379                         break;
1380                 case (0x03): /* A-B A+B */
1381                         ant_conf->fast_div_bias = 0x1;
1382                         ant_conf->main_gaintb = 0;
1383                         ant_conf->alt_gaintb = 0;
1384                         break;
1385                 case (0x10): /* LNA2 A-B */
1386                         if (!(antcomb->scan) &&
1387                                 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1388                                 ant_conf->fast_div_bias = 0x1;
1389                         else
1390                                 ant_conf->fast_div_bias = 0x2;
1391                         ant_conf->main_gaintb = 0;
1392                         ant_conf->alt_gaintb = 0;
1393                         break;
1394                 case (0x12): /* LNA2 LNA1 */
1395                         ant_conf->fast_div_bias = 0x1;
1396                         ant_conf->main_gaintb = 0;
1397                         ant_conf->alt_gaintb = 0;
1398                         break;
1399                 case (0x13): /* LNA2 A+B */
1400                         if (!(antcomb->scan) &&
1401                                 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1402                                 ant_conf->fast_div_bias = 0x1;
1403                         else
1404                                 ant_conf->fast_div_bias = 0x2;
1405                         ant_conf->main_gaintb = 0;
1406                         ant_conf->alt_gaintb = 0;
1407                         break;
1408                 case (0x20): /* LNA1 A-B */
1409                         if (!(antcomb->scan) &&
1410                                 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1411                                 ant_conf->fast_div_bias = 0x1;
1412                         else
1413                                 ant_conf->fast_div_bias = 0x2;
1414                         ant_conf->main_gaintb = 0;
1415                         ant_conf->alt_gaintb = 0;
1416                         break;
1417                 case (0x21): /* LNA1 LNA2 */
1418                         ant_conf->fast_div_bias = 0x1;
1419                         ant_conf->main_gaintb = 0;
1420                         ant_conf->alt_gaintb = 0;
1421                         break;
1422                 case (0x23): /* LNA1 A+B */
1423                         if (!(antcomb->scan) &&
1424                                 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1425                                 ant_conf->fast_div_bias = 0x1;
1426                         else
1427                                 ant_conf->fast_div_bias = 0x2;
1428                         ant_conf->main_gaintb = 0;
1429                         ant_conf->alt_gaintb = 0;
1430                         break;
1431                 case (0x30): /* A+B A-B */
1432                         ant_conf->fast_div_bias = 0x1;
1433                         ant_conf->main_gaintb = 0;
1434                         ant_conf->alt_gaintb = 0;
1435                         break;
1436                 case (0x31): /* A+B LNA2 */
1437                         ant_conf->fast_div_bias = 0x1;
1438                         ant_conf->main_gaintb = 0;
1439                         ant_conf->alt_gaintb = 0;
1440                         break;
1441                 case (0x32): /* A+B LNA1 */
1442                         ant_conf->fast_div_bias = 0x1;
1443                         ant_conf->main_gaintb = 0;
1444                         ant_conf->alt_gaintb = 0;
1445                         break;
1446                 default:
1447                         break;
1448                 }
1449
1450         }
1451
1452 }
1453
1454 /* Antenna diversity and combining */
1455 static void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs)
1456 {
1457         struct ath_hw_antcomb_conf div_ant_conf;
1458         struct ath_ant_comb *antcomb = &sc->ant_comb;
1459         int alt_ratio = 0, alt_rssi_avg = 0, main_rssi_avg = 0, curr_alt_set;
1460         int curr_main_set;
1461         int main_rssi = rs->rs_rssi_ctl0;
1462         int alt_rssi = rs->rs_rssi_ctl1;
1463         int rx_ant_conf,  main_ant_conf;
1464         bool short_scan = false;
1465
1466         rx_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_CURRENT_SHIFT) &
1467                        ATH_ANT_RX_MASK;
1468         main_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_MAIN_SHIFT) &
1469                          ATH_ANT_RX_MASK;
1470
1471         /* Record packet only when both main_rssi and  alt_rssi is positive */
1472         if (main_rssi > 0 && alt_rssi > 0) {
1473                 antcomb->total_pkt_count++;
1474                 antcomb->main_total_rssi += main_rssi;
1475                 antcomb->alt_total_rssi  += alt_rssi;
1476                 if (main_ant_conf == rx_ant_conf)
1477                         antcomb->main_recv_cnt++;
1478                 else
1479                         antcomb->alt_recv_cnt++;
1480         }
1481
1482         /* Short scan check */
1483         if (antcomb->scan && antcomb->alt_good) {
1484                 if (time_after(jiffies, antcomb->scan_start_time +
1485                     msecs_to_jiffies(ATH_ANT_DIV_COMB_SHORT_SCAN_INTR)))
1486                         short_scan = true;
1487                 else
1488                         if (antcomb->total_pkt_count ==
1489                             ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT) {
1490                                 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1491                                             antcomb->total_pkt_count);
1492                                 if (alt_ratio < ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
1493                                         short_scan = true;
1494                         }
1495         }
1496
1497         if (((antcomb->total_pkt_count < ATH_ANT_DIV_COMB_MAX_PKTCOUNT) ||
1498             rs->rs_moreaggr) && !short_scan)
1499                 return;
1500
1501         if (antcomb->total_pkt_count) {
1502                 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1503                              antcomb->total_pkt_count);
1504                 main_rssi_avg = (antcomb->main_total_rssi /
1505                                  antcomb->total_pkt_count);
1506                 alt_rssi_avg = (antcomb->alt_total_rssi /
1507                                  antcomb->total_pkt_count);
1508         }
1509
1510
1511         ath9k_hw_antdiv_comb_conf_get(sc->sc_ah, &div_ant_conf);
1512         curr_alt_set = div_ant_conf.alt_lna_conf;
1513         curr_main_set = div_ant_conf.main_lna_conf;
1514
1515         antcomb->count++;
1516
1517         if (antcomb->count == ATH_ANT_DIV_COMB_MAX_COUNT) {
1518                 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO) {
1519                         ath_lnaconf_alt_good_scan(antcomb, div_ant_conf,
1520                                                   main_rssi_avg);
1521                         antcomb->alt_good = true;
1522                 } else {
1523                         antcomb->alt_good = false;
1524                 }
1525
1526                 antcomb->count = 0;
1527                 antcomb->scan = true;
1528                 antcomb->scan_not_start = true;
1529         }
1530
1531         if (!antcomb->scan) {
1532                 if (ath_ant_div_comb_alt_check(div_ant_conf.div_group,
1533                                         alt_ratio, curr_main_set, curr_alt_set,
1534                                         alt_rssi_avg, main_rssi_avg)) {
1535                         if (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) {
1536                                 /* Switch main and alt LNA */
1537                                 div_ant_conf.main_lna_conf =
1538                                                 ATH_ANT_DIV_COMB_LNA2;
1539                                 div_ant_conf.alt_lna_conf  =
1540                                                 ATH_ANT_DIV_COMB_LNA1;
1541                         } else if (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) {
1542                                 div_ant_conf.main_lna_conf =
1543                                                 ATH_ANT_DIV_COMB_LNA1;
1544                                 div_ant_conf.alt_lna_conf  =
1545                                                 ATH_ANT_DIV_COMB_LNA2;
1546                         }
1547
1548                         goto div_comb_done;
1549                 } else if ((curr_alt_set != ATH_ANT_DIV_COMB_LNA1) &&
1550                            (curr_alt_set != ATH_ANT_DIV_COMB_LNA2)) {
1551                         /* Set alt to another LNA */
1552                         if (curr_main_set == ATH_ANT_DIV_COMB_LNA2)
1553                                 div_ant_conf.alt_lna_conf =
1554                                                 ATH_ANT_DIV_COMB_LNA1;
1555                         else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1)
1556                                 div_ant_conf.alt_lna_conf =
1557                                                 ATH_ANT_DIV_COMB_LNA2;
1558
1559                         goto div_comb_done;
1560                 }
1561
1562                 if ((alt_rssi_avg < (main_rssi_avg +
1563                                                 div_ant_conf.lna1_lna2_delta)))
1564                         goto div_comb_done;
1565         }
1566
1567         if (!antcomb->scan_not_start) {
1568                 switch (curr_alt_set) {
1569                 case ATH_ANT_DIV_COMB_LNA2:
1570                         antcomb->rssi_lna2 = alt_rssi_avg;
1571                         antcomb->rssi_lna1 = main_rssi_avg;
1572                         antcomb->scan = true;
1573                         /* set to A+B */
1574                         div_ant_conf.main_lna_conf =
1575                                 ATH_ANT_DIV_COMB_LNA1;
1576                         div_ant_conf.alt_lna_conf  =
1577                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1578                         break;
1579                 case ATH_ANT_DIV_COMB_LNA1:
1580                         antcomb->rssi_lna1 = alt_rssi_avg;
1581                         antcomb->rssi_lna2 = main_rssi_avg;
1582                         antcomb->scan = true;
1583                         /* set to A+B */
1584                         div_ant_conf.main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1585                         div_ant_conf.alt_lna_conf  =
1586                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1587                         break;
1588                 case ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2:
1589                         antcomb->rssi_add = alt_rssi_avg;
1590                         antcomb->scan = true;
1591                         /* set to A-B */
1592                         div_ant_conf.alt_lna_conf =
1593                                 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1594                         break;
1595                 case ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2:
1596                         antcomb->rssi_sub = alt_rssi_avg;
1597                         antcomb->scan = false;
1598                         if (antcomb->rssi_lna2 >
1599                             (antcomb->rssi_lna1 +
1600                             ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)) {
1601                                 /* use LNA2 as main LNA */
1602                                 if ((antcomb->rssi_add > antcomb->rssi_lna1) &&
1603                                     (antcomb->rssi_add > antcomb->rssi_sub)) {
1604                                         /* set to A+B */
1605                                         div_ant_conf.main_lna_conf =
1606                                                 ATH_ANT_DIV_COMB_LNA2;
1607                                         div_ant_conf.alt_lna_conf  =
1608                                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1609                                 } else if (antcomb->rssi_sub >
1610                                            antcomb->rssi_lna1) {
1611                                         /* set to A-B */
1612                                         div_ant_conf.main_lna_conf =
1613                                                 ATH_ANT_DIV_COMB_LNA2;
1614                                         div_ant_conf.alt_lna_conf =
1615                                                 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1616                                 } else {
1617                                         /* set to LNA1 */
1618                                         div_ant_conf.main_lna_conf =
1619                                                 ATH_ANT_DIV_COMB_LNA2;
1620                                         div_ant_conf.alt_lna_conf =
1621                                                 ATH_ANT_DIV_COMB_LNA1;
1622                                 }
1623                         } else {
1624                                 /* use LNA1 as main LNA */
1625                                 if ((antcomb->rssi_add > antcomb->rssi_lna2) &&
1626                                     (antcomb->rssi_add > antcomb->rssi_sub)) {
1627                                         /* set to A+B */
1628                                         div_ant_conf.main_lna_conf =
1629                                                 ATH_ANT_DIV_COMB_LNA1;
1630                                         div_ant_conf.alt_lna_conf  =
1631                                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1632                                 } else if (antcomb->rssi_sub >
1633                                            antcomb->rssi_lna1) {
1634                                         /* set to A-B */
1635                                         div_ant_conf.main_lna_conf =
1636                                                 ATH_ANT_DIV_COMB_LNA1;
1637                                         div_ant_conf.alt_lna_conf =
1638                                                 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1639                                 } else {
1640                                         /* set to LNA2 */
1641                                         div_ant_conf.main_lna_conf =
1642                                                 ATH_ANT_DIV_COMB_LNA1;
1643                                         div_ant_conf.alt_lna_conf =
1644                                                 ATH_ANT_DIV_COMB_LNA2;
1645                                 }
1646                         }
1647                         break;
1648                 default:
1649                         break;
1650                 }
1651         } else {
1652                 if (!antcomb->alt_good) {
1653                         antcomb->scan_not_start = false;
1654                         /* Set alt to another LNA */
1655                         if (curr_main_set == ATH_ANT_DIV_COMB_LNA2) {
1656                                 div_ant_conf.main_lna_conf =
1657                                                 ATH_ANT_DIV_COMB_LNA2;
1658                                 div_ant_conf.alt_lna_conf =
1659                                                 ATH_ANT_DIV_COMB_LNA1;
1660                         } else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1) {
1661                                 div_ant_conf.main_lna_conf =
1662                                                 ATH_ANT_DIV_COMB_LNA1;
1663                                 div_ant_conf.alt_lna_conf =
1664                                                 ATH_ANT_DIV_COMB_LNA2;
1665                         }
1666                         goto div_comb_done;
1667                 }
1668         }
1669
1670         ath_select_ant_div_from_quick_scan(antcomb, &div_ant_conf,
1671                                            main_rssi_avg, alt_rssi_avg,
1672                                            alt_ratio);
1673
1674         antcomb->quick_scan_cnt++;
1675
1676 div_comb_done:
1677         ath_ant_div_conf_fast_divbias(&div_ant_conf, antcomb, alt_ratio);
1678         ath9k_hw_antdiv_comb_conf_set(sc->sc_ah, &div_ant_conf);
1679
1680         antcomb->scan_start_time = jiffies;
1681         antcomb->total_pkt_count = 0;
1682         antcomb->main_total_rssi = 0;
1683         antcomb->alt_total_rssi = 0;
1684         antcomb->main_recv_cnt = 0;
1685         antcomb->alt_recv_cnt = 0;
1686 }
1687
1688 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
1689 {
1690         struct ath_buf *bf;
1691         struct sk_buff *skb = NULL, *requeue_skb, *hdr_skb;
1692         struct ieee80211_rx_status *rxs;
1693         struct ath_hw *ah = sc->sc_ah;
1694         struct ath_common *common = ath9k_hw_common(ah);
1695         /*
1696          * The hw can technically differ from common->hw when using ath9k
1697          * virtual wiphy so to account for that we iterate over the active
1698          * wiphys and find the appropriate wiphy and therefore hw.
1699          */
1700         struct ieee80211_hw *hw = sc->hw;
1701         struct ieee80211_hdr *hdr;
1702         int retval;
1703         bool decrypt_error = false;
1704         struct ath_rx_status rs;
1705         enum ath9k_rx_qtype qtype;
1706         bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
1707         int dma_type;
1708         u8 rx_status_len = ah->caps.rx_status_len;
1709         u64 tsf = 0;
1710         u32 tsf_lower = 0;
1711         unsigned long flags;
1712
1713         if (edma)
1714                 dma_type = DMA_BIDIRECTIONAL;
1715         else
1716                 dma_type = DMA_FROM_DEVICE;
1717
1718         qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP;
1719         spin_lock_bh(&sc->rx.rxbuflock);
1720
1721         tsf = ath9k_hw_gettsf64(ah);
1722         tsf_lower = tsf & 0xffffffff;
1723
1724         do {
1725                 /* If handling rx interrupt and flush is in progress => exit */
1726                 if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
1727                         break;
1728
1729                 memset(&rs, 0, sizeof(rs));
1730                 if (edma)
1731                         bf = ath_edma_get_next_rx_buf(sc, &rs, qtype);
1732                 else
1733                         bf = ath_get_next_rx_buf(sc, &rs);
1734
1735                 if (!bf)
1736                         break;
1737
1738                 skb = bf->bf_mpdu;
1739                 if (!skb)
1740                         continue;
1741
1742                 /*
1743                  * Take frame header from the first fragment and RX status from
1744                  * the last one.
1745                  */
1746                 if (sc->rx.frag)
1747                         hdr_skb = sc->rx.frag;
1748                 else
1749                         hdr_skb = skb;
1750
1751                 hdr = (struct ieee80211_hdr *) (hdr_skb->data + rx_status_len);
1752                 rxs = IEEE80211_SKB_RXCB(hdr_skb);
1753
1754                 ath_debug_stat_rx(sc, &rs);
1755
1756                 /*
1757                  * If we're asked to flush receive queue, directly
1758                  * chain it back at the queue without processing it.
1759                  */
1760                 if (flush)
1761                         goto requeue_drop_frag;
1762
1763                 retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs,
1764                                                  rxs, &decrypt_error);
1765                 if (retval)
1766                         goto requeue_drop_frag;
1767
1768                 rxs->mactime = (tsf & ~0xffffffffULL) | rs.rs_tstamp;
1769                 if (rs.rs_tstamp > tsf_lower &&
1770                     unlikely(rs.rs_tstamp - tsf_lower > 0x10000000))
1771                         rxs->mactime -= 0x100000000ULL;
1772
1773                 if (rs.rs_tstamp < tsf_lower &&
1774                     unlikely(tsf_lower - rs.rs_tstamp > 0x10000000))
1775                         rxs->mactime += 0x100000000ULL;
1776
1777                 /* Ensure we always have an skb to requeue once we are done
1778                  * processing the current buffer's skb */
1779                 requeue_skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_ATOMIC);
1780
1781                 /* If there is no memory we ignore the current RX'd frame,
1782                  * tell hardware it can give us a new frame using the old
1783                  * skb and put it at the tail of the sc->rx.rxbuf list for
1784                  * processing. */
1785                 if (!requeue_skb)
1786                         goto requeue_drop_frag;
1787
1788                 /* Unmap the frame */
1789                 dma_unmap_single(sc->dev, bf->bf_buf_addr,
1790                                  common->rx_bufsize,
1791                                  dma_type);
1792
1793                 skb_put(skb, rs.rs_datalen + ah->caps.rx_status_len);
1794                 if (ah->caps.rx_status_len)
1795                         skb_pull(skb, ah->caps.rx_status_len);
1796
1797                 if (!rs.rs_more)
1798                         ath9k_rx_skb_postprocess(common, hdr_skb, &rs,
1799                                                  rxs, decrypt_error);
1800
1801                 /* We will now give hardware our shiny new allocated skb */
1802                 bf->bf_mpdu = requeue_skb;
1803                 bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
1804                                                  common->rx_bufsize,
1805                                                  dma_type);
1806                 if (unlikely(dma_mapping_error(sc->dev,
1807                           bf->bf_buf_addr))) {
1808                         dev_kfree_skb_any(requeue_skb);
1809                         bf->bf_mpdu = NULL;
1810                         bf->bf_buf_addr = 0;
1811                         ath_err(common, "dma_mapping_error() on RX\n");
1812                         ieee80211_rx(hw, skb);
1813                         break;
1814                 }
1815
1816                 if (rs.rs_more) {
1817                         /*
1818                          * rs_more indicates chained descriptors which can be
1819                          * used to link buffers together for a sort of
1820                          * scatter-gather operation.
1821                          */
1822                         if (sc->rx.frag) {
1823                                 /* too many fragments - cannot handle frame */
1824                                 dev_kfree_skb_any(sc->rx.frag);
1825                                 dev_kfree_skb_any(skb);
1826                                 skb = NULL;
1827                         }
1828                         sc->rx.frag = skb;
1829                         goto requeue;
1830                 }
1831
1832                 if (sc->rx.frag) {
1833                         int space = skb->len - skb_tailroom(hdr_skb);
1834
1835                         sc->rx.frag = NULL;
1836
1837                         if (pskb_expand_head(hdr_skb, 0, space, GFP_ATOMIC) < 0) {
1838                                 dev_kfree_skb(skb);
1839                                 goto requeue_drop_frag;
1840                         }
1841
1842                         skb_copy_from_linear_data(skb, skb_put(hdr_skb, skb->len),
1843                                                   skb->len);
1844                         dev_kfree_skb_any(skb);
1845                         skb = hdr_skb;
1846                 }
1847
1848                 /*
1849                  * change the default rx antenna if rx diversity chooses the
1850                  * other antenna 3 times in a row.
1851                  */
1852                 if (sc->rx.defant != rs.rs_antenna) {
1853                         if (++sc->rx.rxotherant >= 3)
1854                                 ath_setdefantenna(sc, rs.rs_antenna);
1855                 } else {
1856                         sc->rx.rxotherant = 0;
1857                 }
1858
1859                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1860
1861                 if ((sc->ps_flags & (PS_WAIT_FOR_BEACON |
1862                                               PS_WAIT_FOR_CAB |
1863                                               PS_WAIT_FOR_PSPOLL_DATA)) ||
1864                                                 ath9k_check_auto_sleep(sc))
1865                         ath_rx_ps(sc, skb);
1866                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1867
1868                 if (ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB)
1869                         ath_ant_comb_scan(sc, &rs);
1870
1871                 ieee80211_rx(hw, skb);
1872
1873 requeue_drop_frag:
1874                 if (sc->rx.frag) {
1875                         dev_kfree_skb_any(sc->rx.frag);
1876                         sc->rx.frag = NULL;
1877                 }
1878 requeue:
1879                 if (edma) {
1880                         list_add_tail(&bf->list, &sc->rx.rxbuf);
1881                         ath_rx_edma_buf_link(sc, qtype);
1882                 } else {
1883                         list_move_tail(&bf->list, &sc->rx.rxbuf);
1884                         ath_rx_buf_link(sc, bf);
1885                         ath9k_hw_rxena(ah);
1886                 }
1887         } while (1);
1888
1889         spin_unlock_bh(&sc->rx.rxbuflock);
1890
1891         return 0;
1892 }