drivers/net/wireless/ath/ath9k/recv.c

   1 /*
   2  * Copyright (c) 2008-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/dma-mapping.h>
  18 #include "ath9k.h"
  19 #include "ar9003_mac.h"
  20
  21 #define SKB_CB_ATHBUF(__skb)    (*((struct ath_buf **)__skb->cb))
  22
  23 static inline bool ath_is_alt_ant_ratio_better(int alt_ratio, int maxdelta,
  24                                                int mindelta, int main_rssi_avg,
  25                                                int alt_rssi_avg, int pkt_count)
  26 {
  27         return (((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
  28                 (alt_rssi_avg > main_rssi_avg + maxdelta)) ||
  29                 (alt_rssi_avg > main_rssi_avg + mindelta)) && (pkt_count > 50);
  30 }
  31
  32 static inline bool ath_ant_div_comb_alt_check(u8 div_group, int alt_ratio,
  33                                         int curr_main_set, int curr_alt_set,
  34                                         int alt_rssi_avg, int main_rssi_avg)
  35 {
  36         bool result = false;
  37         switch (div_group) {
  38         case 0:
  39                 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
  40                         result = true;
  41                 break;
  42         case 1:
  43         case 2:
  44                 if ((((curr_main_set == ATH_ANT_DIV_COMB_LNA2) &&
  45                         (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) &&
  46                                 (alt_rssi_avg >= (main_rssi_avg - 5))) ||
  47                         ((curr_main_set == ATH_ANT_DIV_COMB_LNA1) &&
  48                         (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) &&
  49                                 (alt_rssi_avg >= (main_rssi_avg - 2)))) &&
  50                                                         (alt_rssi_avg >= 4))
  51                         result = true;
  52                 else
  53                         result = false;
  54                 break;
  55         }
  56
  57         return result;
  58 }
  59
  60 static inline bool ath9k_check_auto_sleep(struct ath_softc *sc)
  61 {
  62         return sc->ps_enabled &&
  63                (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP);
  64 }
  65
  66 /*
  67  * Setup and link descriptors.
  68  *
  69  * 11N: we can no longer afford to self link the last descriptor.
  70  * MAC acknowledges BA status as long as it copies frames to host
  71  * buffer (or rx fifo). This can incorrectly acknowledge packets
  72  * to a sender if last desc is self-linked.
  73  */
  74 static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
  75 {
  76         struct ath_hw *ah = sc->sc_ah;
  77         struct ath_common *common = ath9k_hw_common(ah);
  78         struct ath_desc *ds;
  79         struct sk_buff *skb;
  80
  81         ATH_RXBUF_RESET(bf);
  82
  83         ds = bf->bf_desc;
  84         ds->ds_link = 0; /* link to null */
  85         ds->ds_data = bf->bf_buf_addr;
  86
  87         /* virtual addr of the beginning of the buffer. */
  88         skb = bf->bf_mpdu;
  89         BUG_ON(skb == NULL);
  90         ds->ds_vdata = skb->data;
  91
  92         /*
  93          * setup rx descriptors. The rx_bufsize here tells the hardware
  94          * how much data it can DMA to us and that we are prepared
  95          * to process
  96          */
  97         ath9k_hw_setuprxdesc(ah, ds,
  98                              common->rx_bufsize,
  99                              0);
 100
 101         if (sc->rx.rxlink == NULL)
 102                 ath9k_hw_putrxbuf(ah, bf->bf_daddr);
 103         else
 104                 *sc->rx.rxlink = bf->bf_daddr;
 105
 106         sc->rx.rxlink = &ds->ds_link;
 107 }
 108
 109 static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
 110 {
 111         /* XXX block beacon interrupts */
 112         ath9k_hw_setantenna(sc->sc_ah, antenna);
 113         sc->rx.defant = antenna;
 114         sc->rx.rxotherant = 0;
 115 }
 116
 117 static void ath_opmode_init(struct ath_softc *sc)
 118 {
 119         struct ath_hw *ah = sc->sc_ah;
 120         struct ath_common *common = ath9k_hw_common(ah);
 121
 122         u32 rfilt, mfilt[2];
 123
 124         /* configure rx filter */
 125         rfilt = ath_calcrxfilter(sc);
 126         ath9k_hw_setrxfilter(ah, rfilt);
 127
 128         /* configure bssid mask */
 129         ath_hw_setbssidmask(common);
 130
 131         /* configure operational mode */
 132         ath9k_hw_setopmode(ah);
 133
 134         /* calculate and install multicast filter */
 135         mfilt[0] = mfilt[1] = ~0;
 136         ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
 137 }
 138
 139 static bool ath_rx_edma_buf_link(struct ath_softc *sc,
 140                                  enum ath9k_rx_qtype qtype)
 141 {
 142         struct ath_hw *ah = sc->sc_ah;
 143         struct ath_rx_edma *rx_edma;
 144         struct sk_buff *skb;
 145         struct ath_buf *bf;
 146
 147         rx_edma = &sc->rx.rx_edma[qtype];
 148         if (skb_queue_len(&rx_edma->rx_fifo) >= rx_edma->rx_fifo_hwsize)
 149                 return false;
 150
 151         bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
 152         list_del_init(&bf->list);
 153
 154         skb = bf->bf_mpdu;
 155
 156         ATH_RXBUF_RESET(bf);
 157         memset(skb->data, 0, ah->caps.rx_status_len);
 158         dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
 159                                 ah->caps.rx_status_len, DMA_TO_DEVICE);
 160
 161         SKB_CB_ATHBUF(skb) = bf;
 162         ath9k_hw_addrxbuf_edma(ah, bf->bf_buf_addr, qtype);
 163         skb_queue_tail(&rx_edma->rx_fifo, skb);
 164
 165         return true;
 166 }
 167
 168 static void ath_rx_addbuffer_edma(struct ath_softc *sc,
 169                                   enum ath9k_rx_qtype qtype, int size)
 170 {
 171         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 172         u32 nbuf = 0;
 173
 174         if (list_empty(&sc->rx.rxbuf)) {
 175                 ath_dbg(common, ATH_DBG_QUEUE, "No free rx buf available\n");
 176                 return;
 177         }
 178
 179         while (!list_empty(&sc->rx.rxbuf)) {
 180                 nbuf++;
 181
 182                 if (!ath_rx_edma_buf_link(sc, qtype))
 183                         break;
 184
 185                 if (nbuf >= size)
 186                         break;
 187         }
 188 }
 189
 190 static void ath_rx_remove_buffer(struct ath_softc *sc,
 191                                  enum ath9k_rx_qtype qtype)
 192 {
 193         struct ath_buf *bf;
 194         struct ath_rx_edma *rx_edma;
 195         struct sk_buff *skb;
 196
 197         rx_edma = &sc->rx.rx_edma[qtype];
 198
 199         while ((skb = skb_dequeue(&rx_edma->rx_fifo)) != NULL) {
 200                 bf = SKB_CB_ATHBUF(skb);
 201                 BUG_ON(!bf);
 202                 list_add_tail(&bf->list, &sc->rx.rxbuf);
 203         }
 204 }
 205
 206 static void ath_rx_edma_cleanup(struct ath_softc *sc)
 207 {
 208         struct ath_hw *ah = sc->sc_ah;
 209         struct ath_common *common = ath9k_hw_common(ah);
 210         struct ath_buf *bf;
 211
 212         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
 213         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
 214
 215         list_for_each_entry(bf, &sc->rx.rxbuf, list) {
 216                 if (bf->bf_mpdu) {
 217                         dma_unmap_single(sc->dev, bf->bf_buf_addr,
 218                                         common->rx_bufsize,
 219                                         DMA_BIDIRECTIONAL);
 220                         dev_kfree_skb_any(bf->bf_mpdu);
 221                         bf->bf_buf_addr = 0;
 222                         bf->bf_mpdu = NULL;
 223                 }
 224         }
 225
 226         INIT_LIST_HEAD(&sc->rx.rxbuf);
 227
 228         kfree(sc->rx.rx_bufptr);
 229         sc->rx.rx_bufptr = NULL;
 230 }
 231
 232 static void ath_rx_edma_init_queue(struct ath_rx_edma *rx_edma, int size)
 233 {
 234         skb_queue_head_init(&rx_edma->rx_fifo);
 235         skb_queue_head_init(&rx_edma->rx_buffers);
 236         rx_edma->rx_fifo_hwsize = size;
 237 }
 238
 239 static int ath_rx_edma_init(struct ath_softc *sc, int nbufs)
 240 {
 241         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 242         struct ath_hw *ah = sc->sc_ah;
 243         struct sk_buff *skb;
 244         struct ath_buf *bf;
 245         int error = 0, i;
 246         u32 size;
 247
 248         ath9k_hw_set_rx_bufsize(ah, common->rx_bufsize -
 249                                     ah->caps.rx_status_len);
 250
 251         ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_LP],
 252                                ah->caps.rx_lp_qdepth);
 253         ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_HP],
 254                                ah->caps.rx_hp_qdepth);
 255
 256         size = sizeof(struct ath_buf) * nbufs;
 257         bf = kzalloc(size, GFP_KERNEL);
 258         if (!bf)
 259                 return -ENOMEM;
 260
 261         INIT_LIST_HEAD(&sc->rx.rxbuf);
 262         sc->rx.rx_bufptr = bf;
 263
 264         for (i = 0; i < nbufs; i++, bf++) {
 265                 skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL);
 266                 if (!skb) {
 267                         error = -ENOMEM;
 268                         goto rx_init_fail;
 269                 }
 270
 271                 memset(skb->data, 0, common->rx_bufsize);
 272                 bf->bf_mpdu = skb;
 273
 274                 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
 275                                                  common->rx_bufsize,
 276                                                  DMA_BIDIRECTIONAL);
 277                 if (unlikely(dma_mapping_error(sc->dev,
 278                                                 bf->bf_buf_addr))) {
 279                                 dev_kfree_skb_any(skb);
 280                                 bf->bf_mpdu = NULL;
 281                                 bf->bf_buf_addr = 0;
 282                                 ath_err(common,
 283                                         "dma_mapping_error() on RX init\n");
 284                                 error = -ENOMEM;
 285                                 goto rx_init_fail;
 286                 }
 287
 288                 list_add_tail(&bf->list, &sc->rx.rxbuf);
 289         }
 290
 291         return 0;
 292
 293 rx_init_fail:
 294         ath_rx_edma_cleanup(sc);
 295         return error;
 296 }
 297
 298 static void ath_edma_start_recv(struct ath_softc *sc)
 299 {
 300         spin_lock_bh(&sc->rx.rxbuflock);
 301
 302         ath9k_hw_rxena(sc->sc_ah);
 303
 304         ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_HP,
 305                               sc->rx.rx_edma[ATH9K_RX_QUEUE_HP].rx_fifo_hwsize);
 306
 307         ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_LP,
 308                               sc->rx.rx_edma[ATH9K_RX_QUEUE_LP].rx_fifo_hwsize);
 309
 310         ath_opmode_init(sc);
 311
 312         ath9k_hw_startpcureceive(sc->sc_ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
 313
 314         spin_unlock_bh(&sc->rx.rxbuflock);
 315 }
 316
 317 static void ath_edma_stop_recv(struct ath_softc *sc)
 318 {
 319         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
 320         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
 321 }
 322
 323 int ath_rx_init(struct ath_softc *sc, int nbufs)
 324 {
 325         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 326         struct sk_buff *skb;
 327         struct ath_buf *bf;
 328         int error = 0;
 329
 330         spin_lock_init(&sc->sc_pcu_lock);
 331         sc->sc_flags &= ~SC_OP_RXFLUSH;
 332         spin_lock_init(&sc->rx.rxbuflock);
 333
 334         common->rx_bufsize = IEEE80211_MAX_MPDU_LEN / 2 +
 335                              sc->sc_ah->caps.rx_status_len;
 336
 337         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 338                 return ath_rx_edma_init(sc, nbufs);
 339         } else {
 340                 ath_dbg(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
 341                         common->cachelsz, common->rx_bufsize);
 342
 343                 /* Initialize rx descriptors */
 344
 345                 error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
 346                                 "rx", nbufs, 1, 0);
 347                 if (error != 0) {
 348                         ath_err(common,
 349                                 "failed to allocate rx descriptors: %d\n",
 350                                 error);
 351                         goto err;
 352                 }
 353
 354                 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
 355                         skb = ath_rxbuf_alloc(common, common->rx_bufsize,
 356                                               GFP_KERNEL);
 357                         if (skb == NULL) {
 358                                 error = -ENOMEM;
 359                                 goto err;
 360                         }
 361
 362                         bf->bf_mpdu = skb;
 363                         bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
 364                                         common->rx_bufsize,
 365                                         DMA_FROM_DEVICE);
 366                         if (unlikely(dma_mapping_error(sc->dev,
 367                                                         bf->bf_buf_addr))) {
 368                                 dev_kfree_skb_any(skb);
 369                                 bf->bf_mpdu = NULL;
 370                                 bf->bf_buf_addr = 0;
 371                                 ath_err(common,
 372                                         "dma_mapping_error() on RX init\n");
 373                                 error = -ENOMEM;
 374                                 goto err;
 375                         }
 376                 }
 377                 sc->rx.rxlink = NULL;
 378         }
 379
 380 err:
 381         if (error)
 382                 ath_rx_cleanup(sc);
 383
 384         return error;
 385 }
 386
 387 void ath_rx_cleanup(struct ath_softc *sc)
 388 {
 389         struct ath_hw *ah = sc->sc_ah;
 390         struct ath_common *common = ath9k_hw_common(ah);
 391         struct sk_buff *skb;
 392         struct ath_buf *bf;
 393
 394         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 395                 ath_rx_edma_cleanup(sc);
 396                 return;
 397         } else {
 398                 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
 399                         skb = bf->bf_mpdu;
 400                         if (skb) {
 401                                 dma_unmap_single(sc->dev, bf->bf_buf_addr,
 402                                                 common->rx_bufsize,
 403                                                 DMA_FROM_DEVICE);
 404                                 dev_kfree_skb(skb);
 405                                 bf->bf_buf_addr = 0;
 406                                 bf->bf_mpdu = NULL;
 407                         }
 408                 }
 409
 410                 if (sc->rx.rxdma.dd_desc_len != 0)
 411                         ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
 412         }
 413 }
 414
 415 /*
 416  * Calculate the receive filter according to the
 417  * operating mode and state:
 418  *
 419  * o always accept unicast, broadcast, and multicast traffic
 420  * o maintain current state of phy error reception (the hal
 421  *   may enable phy error frames for noise immunity work)
 422  * o probe request frames are accepted only when operating in
 423  *   hostap, adhoc, or monitor modes
 424  * o enable promiscuous mode according to the interface state
 425  * o accept beacons:
 426  *   - when operating in adhoc mode so the 802.11 layer creates
 427  *     node table entries for peers,
 428  *   - when operating in station mode for collecting rssi data when
 429  *     the station is otherwise quiet, or
 430  *   - when operating as a repeater so we see repeater-sta beacons
 431  *   - when scanning
 432  */
 433
 434 u32 ath_calcrxfilter(struct ath_softc *sc)
 435 {
 436         u32 rfilt;
 437
 438         rfilt = ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
 439                 | ATH9K_RX_FILTER_MCAST;
 440
 441         if (sc->rx.rxfilter & FIF_PROBE_REQ)
 442                 rfilt |= ATH9K_RX_FILTER_PROBEREQ;
 443
 444         /*
 445          * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
 446          * mode interface or when in monitor mode. AP mode does not need this
 447          * since it receives all in-BSS frames anyway.
 448          */
 449         if (sc->sc_ah->is_monitoring)
 450                 rfilt |= ATH9K_RX_FILTER_PROM;
 451
 452         if (sc->rx.rxfilter & FIF_CONTROL)
 453                 rfilt |= ATH9K_RX_FILTER_CONTROL;
 454
 455         if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
 456             (sc->nvifs <= 1) &&
 457             !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
 458                 rfilt |= ATH9K_RX_FILTER_MYBEACON;
 459         else
 460                 rfilt |= ATH9K_RX_FILTER_BEACON;
 461
 462         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
 463             (sc->rx.rxfilter & FIF_PSPOLL))
 464                 rfilt |= ATH9K_RX_FILTER_PSPOLL;
 465
 466         if (conf_is_ht(&sc->hw->conf))
 467                 rfilt |= ATH9K_RX_FILTER_COMP_BAR;
 468
 469         if (sc->nvifs > 1 || (sc->rx.rxfilter & FIF_OTHER_BSS)) {
 470                 /* The following may also be needed for other older chips */
 471                 if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
 472                         rfilt |= ATH9K_RX_FILTER_PROM;
 473                 rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
 474         }
 475
 476         return rfilt;
 477
 478 #undef RX_FILTER_PRESERVE
 479 }
 480
 481 int ath_startrecv(struct ath_softc *sc)
 482 {
 483         struct ath_hw *ah = sc->sc_ah;
 484         struct ath_buf *bf, *tbf;
 485
 486         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 487                 ath_edma_start_recv(sc);
 488                 return 0;
 489         }
 490
 491         spin_lock_bh(&sc->rx.rxbuflock);
 492         if (list_empty(&sc->rx.rxbuf))
 493                 goto start_recv;
 494
 495         sc->rx.rxlink = NULL;
 496         list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
 497                 ath_rx_buf_link(sc, bf);
 498         }
 499
 500         /* We could have deleted elements so the list may be empty now */
 501         if (list_empty(&sc->rx.rxbuf))
 502                 goto start_recv;
 503
 504         bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
 505         ath9k_hw_putrxbuf(ah, bf->bf_daddr);
 506         ath9k_hw_rxena(ah);
 507
 508 start_recv:
 509         ath_opmode_init(sc);
 510         ath9k_hw_startpcureceive(ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
 511
 512         spin_unlock_bh(&sc->rx.rxbuflock);
 513
 514         return 0;
 515 }
 516
 517 bool ath_stoprecv(struct ath_softc *sc)
 518 {
 519         struct ath_hw *ah = sc->sc_ah;
 520         bool stopped, reset = false;
 521
 522         spin_lock_bh(&sc->rx.rxbuflock);
 523         ath9k_hw_abortpcurecv(ah);
 524         ath9k_hw_setrxfilter(ah, 0);
 525         stopped = ath9k_hw_stopdmarecv(ah, &reset);
 526
 527         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 528                 ath_edma_stop_recv(sc);
 529         else
 530                 sc->rx.rxlink = NULL;
 531         spin_unlock_bh(&sc->rx.rxbuflock);
 532
 533         if (!(ah->ah_flags & AH_UNPLUGGED) &&
 534             unlikely(!stopped)) {
 535                 ath_err(ath9k_hw_common(sc->sc_ah),
 536                         "Could not stop RX, we could be "
 537                         "confusing the DMA engine when we start RX up\n");
 538                 ATH_DBG_WARN_ON_ONCE(!stopped);
 539         }
 540         return stopped && !reset;
 541 }
 542
 543 void ath_flushrecv(struct ath_softc *sc)
 544 {
 545         sc->sc_flags |= SC_OP_RXFLUSH;
 546         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 547                 ath_rx_tasklet(sc, 1, true);
 548         ath_rx_tasklet(sc, 1, false);
 549         sc->sc_flags &= ~SC_OP_RXFLUSH;
 550 }
 551
 552 static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
 553 {
 554         /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
 555         struct ieee80211_mgmt *mgmt;
 556         u8 *pos, *end, id, elen;
 557         struct ieee80211_tim_ie *tim;
 558
 559         mgmt = (struct ieee80211_mgmt *)skb->data;
 560         pos = mgmt->u.beacon.variable;
 561         end = skb->data + skb->len;
 562
 563         while (pos + 2 < end) {
 564                 id = *pos++;
 565                 elen = *pos++;
 566                 if (pos + elen > end)
 567                         break;
 568
 569                 if (id == WLAN_EID_TIM) {
 570                         if (elen < sizeof(*tim))
 571                                 break;
 572                         tim = (struct ieee80211_tim_ie *) pos;
 573                         if (tim->dtim_count != 0)
 574                                 break;
 575                         return tim->bitmap_ctrl & 0x01;
 576                 }
 577
 578                 pos += elen;
 579         }
 580
 581         return false;
 582 }
 583
 584 static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
 585 {
 586         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 587
 588         if (skb->len < 24 + 8 + 2 + 2)
 589                 return;
 590
 591         sc->ps_flags &= ~PS_WAIT_FOR_BEACON;
 592
 593         if (sc->ps_flags & PS_BEACON_SYNC) {
 594                 sc->ps_flags &= ~PS_BEACON_SYNC;
 595                 ath_dbg(common, ATH_DBG_PS,
 596                         "Reconfigure Beacon timers based on timestamp from the AP\n");
 597                 ath_set_beacon(sc);
 598         }
 599
 600         if (ath_beacon_dtim_pending_cab(skb)) {
 601                 /*
 602                  * Remain awake waiting for buffered broadcast/multicast
 603                  * frames. If the last broadcast/multicast frame is not
 604                  * received properly, the next beacon frame will work as
 605                  * a backup trigger for returning into NETWORK SLEEP state,
 606                  * so we are waiting for it as well.
 607                  */
 608                 ath_dbg(common, ATH_DBG_PS,
 609                         "Received DTIM beacon indicating buffered broadcast/multicast frame(s)\n");
 610                 sc->ps_flags |= PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON;
 611                 return;
 612         }
 613
 614         if (sc->ps_flags & PS_WAIT_FOR_CAB) {
 615                 /*
 616                  * This can happen if a broadcast frame is dropped or the AP
 617                  * fails to send a frame indicating that all CAB frames have
 618                  * been delivered.
 619                  */
 620                 sc->ps_flags &= ~PS_WAIT_FOR_CAB;
 621                 ath_dbg(common, ATH_DBG_PS,
 622                         "PS wait for CAB frames timed out\n");
 623         }
 624 }
 625
 626 static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb, bool mybeacon)
 627 {
 628         struct ieee80211_hdr *hdr;
 629         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 630
 631         hdr = (struct ieee80211_hdr *)skb->data;
 632
 633         /* Process Beacon and CAB receive in PS state */
 634         if (((sc->ps_flags & PS_WAIT_FOR_BEACON) || ath9k_check_auto_sleep(sc))
 635             && mybeacon)
 636                 ath_rx_ps_beacon(sc, skb);
 637         else if ((sc->ps_flags & PS_WAIT_FOR_CAB) &&
 638                  (ieee80211_is_data(hdr->frame_control) ||
 639                   ieee80211_is_action(hdr->frame_control)) &&
 640                  is_multicast_ether_addr(hdr->addr1) &&
 641                  !ieee80211_has_moredata(hdr->frame_control)) {
 642                 /*
 643                  * No more broadcast/multicast frames to be received at this
 644                  * point.
 645                  */
 646                 sc->ps_flags &= ~(PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON);
 647                 ath_dbg(common, ATH_DBG_PS,
 648                         "All PS CAB frames received, back to sleep\n");
 649         } else if ((sc->ps_flags & PS_WAIT_FOR_PSPOLL_DATA) &&
 650                    !is_multicast_ether_addr(hdr->addr1) &&
 651                    !ieee80211_has_morefrags(hdr->frame_control)) {
 652                 sc->ps_flags &= ~PS_WAIT_FOR_PSPOLL_DATA;
 653                 ath_dbg(common, ATH_DBG_PS,
 654                         "Going back to sleep after having received PS-Poll data (0x%lx)\n",
 655                         sc->ps_flags & (PS_WAIT_FOR_BEACON |
 656                                         PS_WAIT_FOR_CAB |
 657                                         PS_WAIT_FOR_PSPOLL_DATA |
 658                                         PS_WAIT_FOR_TX_ACK));
 659         }
 660 }
 661
 662 static bool ath_edma_get_buffers(struct ath_softc *sc,
 663                                  enum ath9k_rx_qtype qtype)
 664 {
 665         struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
 666         struct ath_hw *ah = sc->sc_ah;
 667         struct ath_common *common = ath9k_hw_common(ah);
 668         struct sk_buff *skb;
 669         struct ath_buf *bf;
 670         int ret;
 671
 672         skb = skb_peek(&rx_edma->rx_fifo);
 673         if (!skb)
 674                 return false;
 675
 676         bf = SKB_CB_ATHBUF(skb);
 677         BUG_ON(!bf);
 678
 679         dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
 680                                 common->rx_bufsize, DMA_FROM_DEVICE);
 681
 682         ret = ath9k_hw_process_rxdesc_edma(ah, NULL, skb->data);
 683         if (ret == -EINPROGRESS) {
 684                 /*let device gain the buffer again*/
 685                 dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
 686                                 common->rx_bufsize, DMA_FROM_DEVICE);
 687                 return false;
 688         }
 689
 690         __skb_unlink(skb, &rx_edma->rx_fifo);
 691         if (ret == -EINVAL) {
 692                 /* corrupt descriptor, skip this one and the following one */
 693                 list_add_tail(&bf->list, &sc->rx.rxbuf);
 694                 ath_rx_edma_buf_link(sc, qtype);
 695                 skb = skb_peek(&rx_edma->rx_fifo);
 696                 if (!skb)
 697                         return true;
 698
 699                 bf = SKB_CB_ATHBUF(skb);
 700                 BUG_ON(!bf);
 701
 702                 __skb_unlink(skb, &rx_edma->rx_fifo);
 703                 list_add_tail(&bf->list, &sc->rx.rxbuf);
 704                 ath_rx_edma_buf_link(sc, qtype);
 705                 return true;
 706         }
 707         skb_queue_tail(&rx_edma->rx_buffers, skb);
 708
 709         return true;
 710 }
 711
 712 static struct ath_buf *ath_edma_get_next_rx_buf(struct ath_softc *sc,
 713                                                 struct ath_rx_status *rs,
 714                                                 enum ath9k_rx_qtype qtype)
 715 {
 716         struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
 717         struct sk_buff *skb;
 718         struct ath_buf *bf;
 719
 720         while (ath_edma_get_buffers(sc, qtype));
 721         skb = __skb_dequeue(&rx_edma->rx_buffers);
 722         if (!skb)
 723                 return NULL;
 724
 725         bf = SKB_CB_ATHBUF(skb);
 726         ath9k_hw_process_rxdesc_edma(sc->sc_ah, rs, skb->data);
 727         return bf;
 728 }
 729
 730 static struct ath_buf *ath_get_next_rx_buf(struct ath_softc *sc,
 731                                            struct ath_rx_status *rs)
 732 {
 733         struct ath_hw *ah = sc->sc_ah;
 734         struct ath_common *common = ath9k_hw_common(ah);
 735         struct ath_desc *ds;
 736         struct ath_buf *bf;
 737         int ret;
 738
 739         if (list_empty(&sc->rx.rxbuf)) {
 740                 sc->rx.rxlink = NULL;
 741                 return NULL;
 742         }
 743
 744         bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
 745         ds = bf->bf_desc;
 746
 747         /*
 748          * Must provide the virtual address of the current
 749          * descriptor, the physical address, and the virtual
 750          * address of the next descriptor in the h/w chain.
 751          * This allows the HAL to look ahead to see if the
 752          * hardware is done with a descriptor by checking the
 753          * done bit in the following descriptor and the address
 754          * of the current descriptor the DMA engine is working
 755          * on.  All this is necessary because of our use of
 756          * a self-linked list to avoid rx overruns.
 757          */
 758         ret = ath9k_hw_rxprocdesc(ah, ds, rs);
 759         if (ret == -EINPROGRESS) {
 760                 struct ath_rx_status trs;
 761                 struct ath_buf *tbf;
 762                 struct ath_desc *tds;
 763
 764                 memset(&trs, 0, sizeof(trs));
 765                 if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
 766                         sc->rx.rxlink = NULL;
 767                         return NULL;
 768                 }
 769
 770                 tbf = list_entry(bf->list.next, struct ath_buf, list);
 771
 772                 /*
 773                  * On some hardware the descriptor status words could
 774                  * get corrupted, including the done bit. Because of
 775                  * this, check if the next descriptor's done bit is
 776                  * set or not.
 777                  *
 778                  * If the next descriptor's done bit is set, the current
 779                  * descriptor has been corrupted. Force s/w to discard
 780                  * this descriptor and continue...
 781                  */
 782
 783                 tds = tbf->bf_desc;
 784                 ret = ath9k_hw_rxprocdesc(ah, tds, &trs);
 785                 if (ret == -EINPROGRESS)
 786                         return NULL;
 787         }
 788
 789         if (!bf->bf_mpdu)
 790                 return bf;
 791
 792         /*
 793          * Synchronize the DMA transfer with CPU before
 794          * 1. accessing the frame
 795          * 2. requeueing the same buffer to h/w
 796          */
 797         dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
 798                         common->rx_bufsize,
 799                         DMA_FROM_DEVICE);
 800
 801         return bf;
 802 }
 803
 804 /* Assumes you've already done the endian to CPU conversion */
 805 static bool ath9k_rx_accept(struct ath_common *common,
 806                             struct ieee80211_hdr *hdr,
 807                             struct ieee80211_rx_status *rxs,
 808                             struct ath_rx_status *rx_stats,
 809                             bool *decrypt_error)
 810 {
 811         struct ath_softc *sc = (struct ath_softc *) common->priv;
 812         bool is_mc, is_valid_tkip, strip_mic, mic_error;
 813         struct ath_hw *ah = common->ah;
 814         __le16 fc;
 815         u8 rx_status_len = ah->caps.rx_status_len;
 816
 817         fc = hdr->frame_control;
 818
 819         is_mc = !!is_multicast_ether_addr(hdr->addr1);
 820         is_valid_tkip = rx_stats->rs_keyix != ATH9K_RXKEYIX_INVALID &&
 821                 test_bit(rx_stats->rs_keyix, common->tkip_keymap);
 822         strip_mic = is_valid_tkip && ieee80211_is_data(fc) &&
 823                 !(rx_stats->rs_status &
 824                 (ATH9K_RXERR_DECRYPT | ATH9K_RXERR_CRC | ATH9K_RXERR_MIC |
 825                  ATH9K_RXERR_KEYMISS));
 826
 827         /*
 828          * Key miss events are only relevant for pairwise keys where the
 829          * descriptor does contain a valid key index. This has been observed
 830          * mostly with CCMP encryption.
 831          */
 832         if (rx_stats->rs_keyix == ATH9K_RXKEYIX_INVALID ||
 833             !test_bit(rx_stats->rs_keyix, common->ccmp_keymap))
 834                 rx_stats->rs_status &= ~ATH9K_RXERR_KEYMISS;
 835
 836         if (!rx_stats->rs_datalen)
 837                 return false;
 838         /*
 839          * rs_status follows rs_datalen so if rs_datalen is too large
 840          * we can take a hint that hardware corrupted it, so ignore
 841          * those frames.
 842          */
 843         if (rx_stats->rs_datalen > (common->rx_bufsize - rx_status_len))
 844                 return false;
 845
 846         /* Only use error bits from the last fragment */
 847         if (rx_stats->rs_more)
 848                 return true;
 849
 850         mic_error = is_valid_tkip && !ieee80211_is_ctl(fc) &&
 851                 !ieee80211_has_morefrags(fc) &&
 852                 !(le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG) &&
 853                 (rx_stats->rs_status & ATH9K_RXERR_MIC);
 854
 855         /*
 856          * The rx_stats->rs_status will not be set until the end of the
 857          * chained descriptors so it can be ignored if rs_more is set. The
 858          * rs_more will be false at the last element of the chained
 859          * descriptors.
 860          */
 861         if (rx_stats->rs_status != 0) {
 862                 u8 status_mask;
 863
 864                 if (rx_stats->rs_status & ATH9K_RXERR_CRC) {
 865                         rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
 866                         mic_error = false;
 867                 }
 868                 if (rx_stats->rs_status & ATH9K_RXERR_PHY)
 869                         return false;
 870
 871                 if ((rx_stats->rs_status & ATH9K_RXERR_DECRYPT) ||
 872                     (!is_mc && (rx_stats->rs_status & ATH9K_RXERR_KEYMISS))) {
 873                         *decrypt_error = true;
 874                         mic_error = false;
 875                 }
 876
 877                 /*
 878                  * Reject error frames with the exception of
 879                  * decryption and MIC failures. For monitor mode,
 880                  * we also ignore the CRC error.
 881                  */
 882                 status_mask = ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
 883                               ATH9K_RXERR_KEYMISS;
 884
 885                 if (ah->is_monitoring && (sc->rx.rxfilter & FIF_FCSFAIL))
 886                         status_mask |= ATH9K_RXERR_CRC;
 887
 888                 if (rx_stats->rs_status & ~status_mask)
 889                         return false;
 890         }
 891
 892         /*
 893          * For unicast frames the MIC error bit can have false positives,
 894          * so all MIC error reports need to be validated in software.
 895          * False negatives are not common, so skip software verification
 896          * if the hardware considers the MIC valid.
 897          */
 898         if (strip_mic)
 899                 rxs->flag |= RX_FLAG_MMIC_STRIPPED;
 900         else if (is_mc && mic_error)
 901                 rxs->flag |= RX_FLAG_MMIC_ERROR;
 902
 903         return true;
 904 }
 905
 906 static int ath9k_process_rate(struct ath_common *common,
 907                               struct ieee80211_hw *hw,
 908                               struct ath_rx_status *rx_stats,
 909                               struct ieee80211_rx_status *rxs)
 910 {
 911         struct ieee80211_supported_band *sband;
 912         enum ieee80211_band band;
 913         unsigned int i = 0;
 914
 915         band = hw->conf.channel->band;
 916         sband = hw->wiphy->bands[band];
 917
 918         if (rx_stats->rs_rate & 0x80) {
 919                 /* HT rate */
 920                 rxs->flag |= RX_FLAG_HT;
 921                 if (rx_stats->rs_flags & ATH9K_RX_2040)
 922                         rxs->flag |= RX_FLAG_40MHZ;
 923                 if (rx_stats->rs_flags & ATH9K_RX_GI)
 924                         rxs->flag |= RX_FLAG_SHORT_GI;
 925                 rxs->rate_idx = rx_stats->rs_rate & 0x7f;
 926                 return 0;
 927         }
 928
 929         for (i = 0; i < sband->n_bitrates; i++) {
 930                 if (sband->bitrates[i].hw_value == rx_stats->rs_rate) {
 931                         rxs->rate_idx = i;
 932                         return 0;
 933                 }
 934                 if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) {
 935                         rxs->flag |= RX_FLAG_SHORTPRE;
 936                         rxs->rate_idx = i;
 937                         return 0;
 938                 }
 939         }
 940
 941         /*
 942          * No valid hardware bitrate found -- we should not get here
 943          * because hardware has already validated this frame as OK.
 944          */
 945         ath_dbg(common, ATH_DBG_ANY,
 946                 "unsupported hw bitrate detected 0x%02x using 1 Mbit\n",
 947                 rx_stats->rs_rate);
 948
 949         return -EINVAL;
 950 }
 951
 952 static void ath9k_process_rssi(struct ath_common *common,
 953                                struct ieee80211_hw *hw,
 954                                struct ieee80211_hdr *hdr,
 955                                struct ath_rx_status *rx_stats)
 956 {
 957         struct ath_softc *sc = hw->priv;
 958         struct ath_hw *ah = common->ah;
 959         int last_rssi;
 960
 961         if (!rx_stats->is_mybeacon ||
 962             ((ah->opmode != NL80211_IFTYPE_STATION) &&
 963              (ah->opmode != NL80211_IFTYPE_ADHOC)))
 964                 return;
 965
 966         if (rx_stats->rs_rssi != ATH9K_RSSI_BAD && !rx_stats->rs_moreaggr)
 967                 ATH_RSSI_LPF(sc->last_rssi, rx_stats->rs_rssi);
 968
 969         last_rssi = sc->last_rssi;
 970         if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
 971                 rx_stats->rs_rssi = ATH_EP_RND(last_rssi,
 972                                               ATH_RSSI_EP_MULTIPLIER);
 973         if (rx_stats->rs_rssi < 0)
 974                 rx_stats->rs_rssi = 0;
 975
 976         /* Update Beacon RSSI, this is used by ANI. */
 977         ah->stats.avgbrssi = rx_stats->rs_rssi;
 978 }
 979
 980 /*
 981  * For Decrypt or Demic errors, we only mark packet status here and always push
 982  * up the frame up to let mac80211 handle the actual error case, be it no
 983  * decryption key or real decryption error. This let us keep statistics there.
 984  */
 985 static int ath9k_rx_skb_preprocess(struct ath_common *common,
 986                                    struct ieee80211_hw *hw,
 987                                    struct ieee80211_hdr *hdr,
 988                                    struct ath_rx_status *rx_stats,
 989                                    struct ieee80211_rx_status *rx_status,
 990                                    bool *decrypt_error)
 991 {
 992         struct ath_hw *ah = common->ah;
 993
 994         memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
 995
 996         /*
 997          * everything but the rate is checked here, the rate check is done
 998          * separately to avoid doing two lookups for a rate for each frame.
 999          */
1000         if (!ath9k_rx_accept(common, hdr, rx_status, rx_stats, decrypt_error))
1001                 return -EINVAL;
1002
1003         /* Only use status info from the last fragment */
1004         if (rx_stats->rs_more)
1005                 return 0;
1006
1007         ath9k_process_rssi(common, hw, hdr, rx_stats);
1008
1009         if (ath9k_process_rate(common, hw, rx_stats, rx_status))
1010                 return -EINVAL;
1011
1012         rx_status->band = hw->conf.channel->band;
1013         rx_status->freq = hw->conf.channel->center_freq;
1014         rx_status->signal = ah->noise + rx_stats->rs_rssi;
1015         rx_status->antenna = rx_stats->rs_antenna;
1016         rx_status->flag |= RX_FLAG_MACTIME_MPDU;
1017
1018         return 0;
1019 }
1020
1021 static void ath9k_rx_skb_postprocess(struct ath_common *common,
1022                                      struct sk_buff *skb,
1023                                      struct ath_rx_status *rx_stats,
1024                                      struct ieee80211_rx_status *rxs,
1025                                      bool decrypt_error)
1026 {
1027         struct ath_hw *ah = common->ah;
1028         struct ieee80211_hdr *hdr;
1029         int hdrlen, padpos, padsize;
1030         u8 keyix;
1031         __le16 fc;
1032
1033         /* see if any padding is done by the hw and remove it */
1034         hdr = (struct ieee80211_hdr *) skb->data;
1035         hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1036         fc = hdr->frame_control;
1037         padpos = ath9k_cmn_padpos(hdr->frame_control);
1038
1039         /* The MAC header is padded to have 32-bit boundary if the
1040          * packet payload is non-zero. The general calculation for
1041          * padsize would take into account odd header lengths:
1042          * padsize = (4 - padpos % 4) % 4; However, since only
1043          * even-length headers are used, padding can only be 0 or 2
1044          * bytes and we can optimize this a bit. In addition, we must
1045          * not try to remove padding from short control frames that do
1046          * not have payload. */
1047         padsize = padpos & 3;
1048         if (padsize && skb->len>=padpos+padsize+FCS_LEN) {
1049                 memmove(skb->data + padsize, skb->data, padpos);
1050                 skb_pull(skb, padsize);
1051         }
1052
1053         keyix = rx_stats->rs_keyix;
1054
1055         if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error &&
1056             ieee80211_has_protected(fc)) {
1057                 rxs->flag |= RX_FLAG_DECRYPTED;
1058         } else if (ieee80211_has_protected(fc)
1059                    && !decrypt_error && skb->len >= hdrlen + 4) {
1060                 keyix = skb->data[hdrlen + 3] >> 6;
1061
1062                 if (test_bit(keyix, common->keymap))
1063                         rxs->flag |= RX_FLAG_DECRYPTED;
1064         }
1065         if (ah->sw_mgmt_crypto &&
1066             (rxs->flag & RX_FLAG_DECRYPTED) &&
1067             ieee80211_is_mgmt(fc))
1068                 /* Use software decrypt for management frames. */
1069                 rxs->flag &= ~RX_FLAG_DECRYPTED;
1070 }
1071
1072 static void ath_lnaconf_alt_good_scan(struct ath_ant_comb *antcomb,
1073                                       struct ath_hw_antcomb_conf ant_conf,
1074                                       int main_rssi_avg)
1075 {
1076         antcomb->quick_scan_cnt = 0;
1077
1078         if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA2)
1079                 antcomb->rssi_lna2 = main_rssi_avg;
1080         else if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA1)
1081                 antcomb->rssi_lna1 = main_rssi_avg;
1082
1083         switch ((ant_conf.main_lna_conf << 4) | ant_conf.alt_lna_conf) {
1084         case 0x10: /* LNA2 A-B */
1085                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1086                 antcomb->first_quick_scan_conf =
1087                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1088                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1089                 break;
1090         case 0x20: /* LNA1 A-B */
1091                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1092                 antcomb->first_quick_scan_conf =
1093                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1094                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1095                 break;
1096         case 0x21: /* LNA1 LNA2 */
1097                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA2;
1098                 antcomb->first_quick_scan_conf =
1099                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1100                 antcomb->second_quick_scan_conf =
1101                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1102                 break;
1103         case 0x12: /* LNA2 LNA1 */
1104                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1;
1105                 antcomb->first_quick_scan_conf =
1106                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1107                 antcomb->second_quick_scan_conf =
1108                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1109                 break;
1110         case 0x13: /* LNA2 A+B */
1111                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1112                 antcomb->first_quick_scan_conf =
1113                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1114                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1115                 break;
1116         case 0x23: /* LNA1 A+B */
1117                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1118                 antcomb->first_quick_scan_conf =
1119                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1120                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1121                 break;
1122         default:
1123                 break;
1124         }
1125 }
1126
1127 static void ath_select_ant_div_from_quick_scan(struct ath_ant_comb *antcomb,
1128                                 struct ath_hw_antcomb_conf *div_ant_conf,
1129                                 int main_rssi_avg, int alt_rssi_avg,
1130                                 int alt_ratio)
1131 {
1132         /* alt_good */
1133         switch (antcomb->quick_scan_cnt) {
1134         case 0:
1135                 /* set alt to main, and alt to first conf */
1136                 div_ant_conf->main_lna_conf = antcomb->main_conf;
1137                 div_ant_conf->alt_lna_conf = antcomb->first_quick_scan_conf;
1138                 break;
1139         case 1:
1140                 /* set alt to main, and alt to first conf */
1141                 div_ant_conf->main_lna_conf = antcomb->main_conf;
1142                 div_ant_conf->alt_lna_conf = antcomb->second_quick_scan_conf;
1143                 antcomb->rssi_first = main_rssi_avg;
1144                 antcomb->rssi_second = alt_rssi_avg;
1145
1146                 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1147                         /* main is LNA1 */
1148                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1149                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1150                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1151                                                 main_rssi_avg, alt_rssi_avg,
1152                                                 antcomb->total_pkt_count))
1153                                 antcomb->first_ratio = true;
1154                         else
1155                                 antcomb->first_ratio = false;
1156                 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1157                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1158                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1159                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1160                                                 main_rssi_avg, alt_rssi_avg,
1161                                                 antcomb->total_pkt_count))
1162                                 antcomb->first_ratio = true;
1163                         else
1164                                 antcomb->first_ratio = false;
1165                 } else {
1166                         if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1167                             (alt_rssi_avg > main_rssi_avg +
1168                             ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1169                             (alt_rssi_avg > main_rssi_avg)) &&
1170                             (antcomb->total_pkt_count > 50))
1171                                 antcomb->first_ratio = true;
1172                         else
1173                                 antcomb->first_ratio = false;
1174                 }
1175                 break;
1176         case 2:
1177                 antcomb->alt_good = false;
1178                 antcomb->scan_not_start = false;
1179                 antcomb->scan = false;
1180                 antcomb->rssi_first = main_rssi_avg;
1181                 antcomb->rssi_third = alt_rssi_avg;
1182
1183                 if (antcomb->second_quick_scan_conf == ATH_ANT_DIV_COMB_LNA1)
1184                         antcomb->rssi_lna1 = alt_rssi_avg;
1185                 else if (antcomb->second_quick_scan_conf ==
1186                          ATH_ANT_DIV_COMB_LNA2)
1187                         antcomb->rssi_lna2 = alt_rssi_avg;
1188                 else if (antcomb->second_quick_scan_conf ==
1189                          ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2) {
1190                         if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2)
1191                                 antcomb->rssi_lna2 = main_rssi_avg;
1192                         else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1)
1193                                 antcomb->rssi_lna1 = main_rssi_avg;
1194                 }
1195
1196                 if (antcomb->rssi_lna2 > antcomb->rssi_lna1 +
1197                     ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)
1198                         div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1199                 else
1200                         div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA1;
1201
1202                 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1203                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1204                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1205                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1206                                                 main_rssi_avg, alt_rssi_avg,
1207                                                 antcomb->total_pkt_count))
1208                                 antcomb->second_ratio = true;
1209                         else
1210                                 antcomb->second_ratio = false;
1211                 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1212                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1213                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1214                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1215                                                 main_rssi_avg, alt_rssi_avg,
1216                                                 antcomb->total_pkt_count))
1217                                 antcomb->second_ratio = true;
1218                         else
1219                                 antcomb->second_ratio = false;
1220                 } else {
1221                         if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1222                             (alt_rssi_avg > main_rssi_avg +
1223                             ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1224                             (alt_rssi_avg > main_rssi_avg)) &&
1225                             (antcomb->total_pkt_count > 50))
1226                                 antcomb->second_ratio = true;
1227                         else
1228                                 antcomb->second_ratio = false;
1229                 }
1230
1231                 /* set alt to the conf with maximun ratio */
1232                 if (antcomb->first_ratio && antcomb->second_ratio) {
1233                         if (antcomb->rssi_second > antcomb->rssi_third) {
1234                                 /* first alt*/
1235                                 if ((antcomb->first_quick_scan_conf ==
1236                                     ATH_ANT_DIV_COMB_LNA1) ||
1237                                     (antcomb->first_quick_scan_conf ==
1238                                     ATH_ANT_DIV_COMB_LNA2))
1239                                         /* Set alt LNA1 or LNA2*/
1240                                         if (div_ant_conf->main_lna_conf ==
1241                                             ATH_ANT_DIV_COMB_LNA2)
1242                                                 div_ant_conf->alt_lna_conf =
1243                                                         ATH_ANT_DIV_COMB_LNA1;
1244                                         else
1245                                                 div_ant_conf->alt_lna_conf =
1246                                                         ATH_ANT_DIV_COMB_LNA2;
1247                                 else
1248                                         /* Set alt to A+B or A-B */
1249                                         div_ant_conf->alt_lna_conf =
1250                                                 antcomb->first_quick_scan_conf;
1251                         } else if ((antcomb->second_quick_scan_conf ==
1252                                    ATH_ANT_DIV_COMB_LNA1) ||
1253                                    (antcomb->second_quick_scan_conf ==
1254                                    ATH_ANT_DIV_COMB_LNA2)) {
1255                                 /* Set alt LNA1 or LNA2 */
1256                                 if (div_ant_conf->main_lna_conf ==
1257                                     ATH_ANT_DIV_COMB_LNA2)
1258                                         div_ant_conf->alt_lna_conf =
1259                                                 ATH_ANT_DIV_COMB_LNA1;
1260                                 else
1261                                         div_ant_conf->alt_lna_conf =
1262                                                 ATH_ANT_DIV_COMB_LNA2;
1263                         } else {
1264                                 /* Set alt to A+B or A-B */
1265                                 div_ant_conf->alt_lna_conf =
1266                                         antcomb->second_quick_scan_conf;
1267                         }
1268                 } else if (antcomb->first_ratio) {
1269                         /* first alt */
1270                         if ((antcomb->first_quick_scan_conf ==
1271                             ATH_ANT_DIV_COMB_LNA1) ||
1272                             (antcomb->first_quick_scan_conf ==
1273                             ATH_ANT_DIV_COMB_LNA2))
1274                                         /* Set alt LNA1 or LNA2 */
1275                                 if (div_ant_conf->main_lna_conf ==
1276                                     ATH_ANT_DIV_COMB_LNA2)
1277                                         div_ant_conf->alt_lna_conf =
1278                                                         ATH_ANT_DIV_COMB_LNA1;
1279                                 else
1280                                         div_ant_conf->alt_lna_conf =
1281                                                         ATH_ANT_DIV_COMB_LNA2;
1282                         else
1283                                 /* Set alt to A+B or A-B */
1284                                 div_ant_conf->alt_lna_conf =
1285                                                 antcomb->first_quick_scan_conf;
1286                 } else if (antcomb->second_ratio) {
1287                                 /* second alt */
1288                         if ((antcomb->second_quick_scan_conf ==
1289                             ATH_ANT_DIV_COMB_LNA1) ||
1290                             (antcomb->second_quick_scan_conf ==
1291                             ATH_ANT_DIV_COMB_LNA2))
1292                                 /* Set alt LNA1 or LNA2 */
1293                                 if (div_ant_conf->main_lna_conf ==
1294                                     ATH_ANT_DIV_COMB_LNA2)
1295                                         div_ant_conf->alt_lna_conf =
1296                                                 ATH_ANT_DIV_COMB_LNA1;
1297                                 else
1298                                         div_ant_conf->alt_lna_conf =
1299                                                 ATH_ANT_DIV_COMB_LNA2;
1300                         else
1301                                 /* Set alt to A+B or A-B */
1302                                 div_ant_conf->alt_lna_conf =
1303                                                 antcomb->second_quick_scan_conf;
1304                 } else {
1305                         /* main is largest */
1306                         if ((antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) ||
1307                             (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2))
1308                                 /* Set alt LNA1 or LNA2 */
1309                                 if (div_ant_conf->main_lna_conf ==
1310                                     ATH_ANT_DIV_COMB_LNA2)
1311                                         div_ant_conf->alt_lna_conf =
1312                                                         ATH_ANT_DIV_COMB_LNA1;
1313                                 else
1314                                         div_ant_conf->alt_lna_conf =
1315                                                         ATH_ANT_DIV_COMB_LNA2;
1316                         else
1317                                 /* Set alt to A+B or A-B */
1318                                 div_ant_conf->alt_lna_conf = antcomb->main_conf;
1319                 }
1320                 break;
1321         default:
1322                 break;
1323         }
1324 }
1325
1326 static void ath_ant_div_conf_fast_divbias(struct ath_hw_antcomb_conf *ant_conf,
1327                 struct ath_ant_comb *antcomb, int alt_ratio)
1328 {
1329         if (ant_conf->div_group == 0) {
1330                 /* Adjust the fast_div_bias based on main and alt lna conf */
1331                 switch ((ant_conf->main_lna_conf << 4) |
1332                                 ant_conf->alt_lna_conf) {
1333                 case 0x01: /* A-B LNA2 */
1334                         ant_conf->fast_div_bias = 0x3b;
1335                         break;
1336                 case 0x02: /* A-B LNA1 */
1337                         ant_conf->fast_div_bias = 0x3d;
1338                         break;
1339                 case 0x03: /* A-B A+B */
1340                         ant_conf->fast_div_bias = 0x1;
1341                         break;
1342                 case 0x10: /* LNA2 A-B */
1343                         ant_conf->fast_div_bias = 0x7;
1344                         break;
1345                 case 0x12: /* LNA2 LNA1 */
1346                         ant_conf->fast_div_bias = 0x2;
1347                         break;
1348                 case 0x13: /* LNA2 A+B */
1349                         ant_conf->fast_div_bias = 0x7;
1350                         break;
1351                 case 0x20: /* LNA1 A-B */
1352                         ant_conf->fast_div_bias = 0x6;
1353                         break;
1354                 case 0x21: /* LNA1 LNA2 */
1355                         ant_conf->fast_div_bias = 0x0;
1356                         break;
1357                 case 0x23: /* LNA1 A+B */
1358                         ant_conf->fast_div_bias = 0x6;
1359                         break;
1360                 case 0x30: /* A+B A-B */
1361                         ant_conf->fast_div_bias = 0x1;
1362                         break;
1363                 case 0x31: /* A+B LNA2 */
1364                         ant_conf->fast_div_bias = 0x3b;
1365                         break;
1366                 case 0x32: /* A+B LNA1 */
1367                         ant_conf->fast_div_bias = 0x3d;
1368                         break;
1369                 default:
1370                         break;
1371                 }
1372         } else if (ant_conf->div_group == 1) {
1373                 /* Adjust the fast_div_bias based on main and alt_lna_conf */
1374                 switch ((ant_conf->main_lna_conf << 4) |
1375                         ant_conf->alt_lna_conf) {
1376                 case 0x01: /* A-B LNA2 */
1377                         ant_conf->fast_div_bias = 0x1;
1378                         ant_conf->main_gaintb = 0;
1379                         ant_conf->alt_gaintb = 0;
1380                         break;
1381                 case 0x02: /* A-B LNA1 */
1382                         ant_conf->fast_div_bias = 0x1;
1383                         ant_conf->main_gaintb = 0;
1384                         ant_conf->alt_gaintb = 0;
1385                         break;
1386                 case 0x03: /* A-B A+B */
1387                         ant_conf->fast_div_bias = 0x1;
1388                         ant_conf->main_gaintb = 0;
1389                         ant_conf->alt_gaintb = 0;
1390                         break;
1391                 case 0x10: /* LNA2 A-B */
1392                         if (!(antcomb->scan) &&
1393                             (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1394                                 ant_conf->fast_div_bias = 0x3f;
1395                         else
1396                                 ant_conf->fast_div_bias = 0x1;
1397                         ant_conf->main_gaintb = 0;
1398                         ant_conf->alt_gaintb = 0;
1399                         break;
1400                 case 0x12: /* LNA2 LNA1 */
1401                         ant_conf->fast_div_bias = 0x1;
1402                         ant_conf->main_gaintb = 0;
1403                         ant_conf->alt_gaintb = 0;
1404                         break;
1405                 case 0x13: /* LNA2 A+B */
1406                         if (!(antcomb->scan) &&
1407                             (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1408                                 ant_conf->fast_div_bias = 0x3f;
1409                         else
1410                                 ant_conf->fast_div_bias = 0x1;
1411                         ant_conf->main_gaintb = 0;
1412                         ant_conf->alt_gaintb = 0;
1413                         break;
1414                 case 0x20: /* LNA1 A-B */
1415                         if (!(antcomb->scan) &&
1416                             (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1417                                 ant_conf->fast_div_bias = 0x3f;
1418                         else
1419                                 ant_conf->fast_div_bias = 0x1;
1420                         ant_conf->main_gaintb = 0;
1421                         ant_conf->alt_gaintb = 0;
1422                         break;
1423                 case 0x21: /* LNA1 LNA2 */
1424                         ant_conf->fast_div_bias = 0x1;
1425                         ant_conf->main_gaintb = 0;
1426                         ant_conf->alt_gaintb = 0;
1427                         break;
1428                 case 0x23: /* LNA1 A+B */
1429                         if (!(antcomb->scan) &&
1430                             (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1431                                 ant_conf->fast_div_bias = 0x3f;
1432                         else
1433                                 ant_conf->fast_div_bias = 0x1;
1434                         ant_conf->main_gaintb = 0;
1435                         ant_conf->alt_gaintb = 0;
1436                         break;
1437                 case 0x30: /* A+B A-B */
1438                         ant_conf->fast_div_bias = 0x1;
1439                         ant_conf->main_gaintb = 0;
1440                         ant_conf->alt_gaintb = 0;
1441                         break;
1442                 case 0x31: /* A+B LNA2 */
1443                         ant_conf->fast_div_bias = 0x1;
1444                         ant_conf->main_gaintb = 0;
1445                         ant_conf->alt_gaintb = 0;
1446                         break;
1447                 case 0x32: /* A+B LNA1 */
1448                         ant_conf->fast_div_bias = 0x1;
1449                         ant_conf->main_gaintb = 0;
1450                         ant_conf->alt_gaintb = 0;
1451                         break;
1452                 default:
1453                         break;
1454                 }
1455         } else if (ant_conf->div_group == 2) {
1456                 /* Adjust the fast_div_bias based on main and alt_lna_conf */
1457                 switch ((ant_conf->main_lna_conf << 4) |
1458                                 ant_conf->alt_lna_conf) {
1459                 case 0x01: /* A-B LNA2 */
1460                         ant_conf->fast_div_bias = 0x1;
1461                         ant_conf->main_gaintb = 0;
1462                         ant_conf->alt_gaintb = 0;
1463                         break;
1464                 case 0x02: /* A-B LNA1 */
1465                         ant_conf->fast_div_bias = 0x1;
1466                         ant_conf->main_gaintb = 0;
1467                         ant_conf->alt_gaintb = 0;
1468                         break;
1469                 case 0x03: /* A-B A+B */
1470                         ant_conf->fast_div_bias = 0x1;
1471                         ant_conf->main_gaintb = 0;
1472                         ant_conf->alt_gaintb = 0;
1473                         break;
1474                 case 0x10: /* LNA2 A-B */
1475                         if (!(antcomb->scan) &&
1476                                 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1477                                 ant_conf->fast_div_bias = 0x1;
1478                         else
1479                                 ant_conf->fast_div_bias = 0x2;
1480                         ant_conf->main_gaintb = 0;
1481                         ant_conf->alt_gaintb = 0;
1482                         break;
1483                 case 0x12: /* LNA2 LNA1 */
1484                         ant_conf->fast_div_bias = 0x1;
1485                         ant_conf->main_gaintb = 0;
1486                         ant_conf->alt_gaintb = 0;
1487                         break;
1488                 case 0x13: /* LNA2 A+B */
1489                         if (!(antcomb->scan) &&
1490                                 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1491                                 ant_conf->fast_div_bias = 0x1;
1492                         else
1493                                 ant_conf->fast_div_bias = 0x2;
1494                         ant_conf->main_gaintb = 0;
1495                         ant_conf->alt_gaintb = 0;
1496                         break;
1497                 case 0x20: /* LNA1 A-B */
1498                         if (!(antcomb->scan) &&
1499                                 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1500                                 ant_conf->fast_div_bias = 0x1;
1501                         else
1502                                 ant_conf->fast_div_bias = 0x2;
1503                         ant_conf->main_gaintb = 0;
1504                         ant_conf->alt_gaintb = 0;
1505                         break;
1506                 case 0x21: /* LNA1 LNA2 */
1507                         ant_conf->fast_div_bias = 0x1;
1508                         ant_conf->main_gaintb = 0;
1509                         ant_conf->alt_gaintb = 0;
1510                         break;
1511                 case 0x23: /* LNA1 A+B */
1512                         if (!(antcomb->scan) &&
1513                                 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1514                                 ant_conf->fast_div_bias = 0x1;
1515                         else
1516                                 ant_conf->fast_div_bias = 0x2;
1517                         ant_conf->main_gaintb = 0;
1518                         ant_conf->alt_gaintb = 0;
1519                         break;
1520                 case 0x30: /* A+B A-B */
1521                         ant_conf->fast_div_bias = 0x1;
1522                         ant_conf->main_gaintb = 0;
1523                         ant_conf->alt_gaintb = 0;
1524                         break;
1525                 case 0x31: /* A+B LNA2 */
1526                         ant_conf->fast_div_bias = 0x1;
1527                         ant_conf->main_gaintb = 0;
1528                         ant_conf->alt_gaintb = 0;
1529                         break;
1530                 case 0x32: /* A+B LNA1 */
1531                         ant_conf->fast_div_bias = 0x1;
1532                         ant_conf->main_gaintb = 0;
1533                         ant_conf->alt_gaintb = 0;
1534                         break;
1535                 default:
1536                         break;
1537                 }
1538         }
1539 }
1540
1541 /* Antenna diversity and combining */
1542 static void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs)
1543 {
1544         struct ath_hw_antcomb_conf div_ant_conf;
1545         struct ath_ant_comb *antcomb = &sc->ant_comb;
1546         int alt_ratio = 0, alt_rssi_avg = 0, main_rssi_avg = 0, curr_alt_set;
1547         int curr_main_set;
1548         int main_rssi = rs->rs_rssi_ctl0;
1549         int alt_rssi = rs->rs_rssi_ctl1;
1550         int rx_ant_conf,  main_ant_conf;
1551         bool short_scan = false;
1552
1553         rx_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_CURRENT_SHIFT) &
1554                        ATH_ANT_RX_MASK;
1555         main_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_MAIN_SHIFT) &
1556                          ATH_ANT_RX_MASK;
1557
1558         /* Record packet only when both main_rssi and  alt_rssi is positive */
1559         if (main_rssi > 0 && alt_rssi > 0) {
1560                 antcomb->total_pkt_count++;
1561                 antcomb->main_total_rssi += main_rssi;
1562                 antcomb->alt_total_rssi  += alt_rssi;
1563                 if (main_ant_conf == rx_ant_conf)
1564                         antcomb->main_recv_cnt++;
1565                 else
1566                         antcomb->alt_recv_cnt++;
1567         }
1568
1569         /* Short scan check */
1570         if (antcomb->scan && antcomb->alt_good) {
1571                 if (time_after(jiffies, antcomb->scan_start_time +
1572                     msecs_to_jiffies(ATH_ANT_DIV_COMB_SHORT_SCAN_INTR)))
1573                         short_scan = true;
1574                 else
1575                         if (antcomb->total_pkt_count ==
1576                             ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT) {
1577                                 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1578                                             antcomb->total_pkt_count);
1579                                 if (alt_ratio < ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
1580                                         short_scan = true;
1581                         }
1582         }
1583
1584         if (((antcomb->total_pkt_count < ATH_ANT_DIV_COMB_MAX_PKTCOUNT) ||
1585             rs->rs_moreaggr) && !short_scan)
1586                 return;
1587
1588         if (antcomb->total_pkt_count) {
1589                 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1590                              antcomb->total_pkt_count);
1591                 main_rssi_avg = (antcomb->main_total_rssi /
1592                                  antcomb->total_pkt_count);
1593                 alt_rssi_avg = (antcomb->alt_total_rssi /
1594                                  antcomb->total_pkt_count);
1595         }
1596
1597
1598         ath9k_hw_antdiv_comb_conf_get(sc->sc_ah, &div_ant_conf);
1599         curr_alt_set = div_ant_conf.alt_lna_conf;
1600         curr_main_set = div_ant_conf.main_lna_conf;
1601
1602         antcomb->count++;
1603
1604         if (antcomb->count == ATH_ANT_DIV_COMB_MAX_COUNT) {
1605                 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO) {
1606                         ath_lnaconf_alt_good_scan(antcomb, div_ant_conf,
1607                                                   main_rssi_avg);
1608                         antcomb->alt_good = true;
1609                 } else {
1610                         antcomb->alt_good = false;
1611                 }
1612
1613                 antcomb->count = 0;
1614                 antcomb->scan = true;
1615                 antcomb->scan_not_start = true;
1616         }
1617
1618         if (!antcomb->scan) {
1619                 if (ath_ant_div_comb_alt_check(div_ant_conf.div_group,
1620                                         alt_ratio, curr_main_set, curr_alt_set,
1621                                         alt_rssi_avg, main_rssi_avg)) {
1622                         if (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) {
1623                                 /* Switch main and alt LNA */
1624                                 div_ant_conf.main_lna_conf =
1625                                                 ATH_ANT_DIV_COMB_LNA2;
1626                                 div_ant_conf.alt_lna_conf  =
1627                                                 ATH_ANT_DIV_COMB_LNA1;
1628                         } else if (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) {
1629                                 div_ant_conf.main_lna_conf =
1630                                                 ATH_ANT_DIV_COMB_LNA1;
1631                                 div_ant_conf.alt_lna_conf  =
1632                                                 ATH_ANT_DIV_COMB_LNA2;
1633                         }
1634
1635                         goto div_comb_done;
1636                 } else if ((curr_alt_set != ATH_ANT_DIV_COMB_LNA1) &&
1637                            (curr_alt_set != ATH_ANT_DIV_COMB_LNA2)) {
1638                         /* Set alt to another LNA */
1639                         if (curr_main_set == ATH_ANT_DIV_COMB_LNA2)
1640                                 div_ant_conf.alt_lna_conf =
1641                                                 ATH_ANT_DIV_COMB_LNA1;
1642                         else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1)
1643                                 div_ant_conf.alt_lna_conf =
1644                                                 ATH_ANT_DIV_COMB_LNA2;
1645
1646                         goto div_comb_done;
1647                 }
1648
1649                 if ((alt_rssi_avg < (main_rssi_avg +
1650                                                 div_ant_conf.lna1_lna2_delta)))
1651                         goto div_comb_done;
1652         }
1653
1654         if (!antcomb->scan_not_start) {
1655                 switch (curr_alt_set) {
1656                 case ATH_ANT_DIV_COMB_LNA2:
1657                         antcomb->rssi_lna2 = alt_rssi_avg;
1658                         antcomb->rssi_lna1 = main_rssi_avg;
1659                         antcomb->scan = true;
1660                         /* set to A+B */
1661                         div_ant_conf.main_lna_conf =
1662                                 ATH_ANT_DIV_COMB_LNA1;
1663                         div_ant_conf.alt_lna_conf  =
1664                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1665                         break;
1666                 case ATH_ANT_DIV_COMB_LNA1:
1667                         antcomb->rssi_lna1 = alt_rssi_avg;
1668                         antcomb->rssi_lna2 = main_rssi_avg;
1669                         antcomb->scan = true;
1670                         /* set to A+B */
1671                         div_ant_conf.main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1672                         div_ant_conf.alt_lna_conf  =
1673                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1674                         break;
1675                 case ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2:
1676                         antcomb->rssi_add = alt_rssi_avg;
1677                         antcomb->scan = true;
1678                         /* set to A-B */
1679                         div_ant_conf.alt_lna_conf =
1680                                 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1681                         break;
1682                 case ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2:
1683                         antcomb->rssi_sub = alt_rssi_avg;
1684                         antcomb->scan = false;
1685                         if (antcomb->rssi_lna2 >
1686                             (antcomb->rssi_lna1 +
1687                             ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)) {
1688                                 /* use LNA2 as main LNA */
1689                                 if ((antcomb->rssi_add > antcomb->rssi_lna1) &&
1690                                     (antcomb->rssi_add > antcomb->rssi_sub)) {
1691                                         /* set to A+B */
1692                                         div_ant_conf.main_lna_conf =
1693                                                 ATH_ANT_DIV_COMB_LNA2;
1694                                         div_ant_conf.alt_lna_conf  =
1695                                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1696                                 } else if (antcomb->rssi_sub >
1697                                            antcomb->rssi_lna1) {
1698                                         /* set to A-B */
1699                                         div_ant_conf.main_lna_conf =
1700                                                 ATH_ANT_DIV_COMB_LNA2;
1701                                         div_ant_conf.alt_lna_conf =
1702                                                 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1703                                 } else {
1704                                         /* set to LNA1 */
1705                                         div_ant_conf.main_lna_conf =
1706                                                 ATH_ANT_DIV_COMB_LNA2;
1707                                         div_ant_conf.alt_lna_conf =
1708                                                 ATH_ANT_DIV_COMB_LNA1;
1709                                 }
1710                         } else {
1711                                 /* use LNA1 as main LNA */
1712                                 if ((antcomb->rssi_add > antcomb->rssi_lna2) &&
1713                                     (antcomb->rssi_add > antcomb->rssi_sub)) {
1714                                         /* set to A+B */
1715                                         div_ant_conf.main_lna_conf =
1716                                                 ATH_ANT_DIV_COMB_LNA1;
1717                                         div_ant_conf.alt_lna_conf  =
1718                                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1719                                 } else if (antcomb->rssi_sub >
1720                                            antcomb->rssi_lna1) {
1721                                         /* set to A-B */
1722                                         div_ant_conf.main_lna_conf =
1723                                                 ATH_ANT_DIV_COMB_LNA1;
1724                                         div_ant_conf.alt_lna_conf =
1725                                                 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1726                                 } else {
1727                                         /* set to LNA2 */
1728                                         div_ant_conf.main_lna_conf =
1729                                                 ATH_ANT_DIV_COMB_LNA1;
1730                                         div_ant_conf.alt_lna_conf =
1731                                                 ATH_ANT_DIV_COMB_LNA2;
1732                                 }
1733                         }
1734                         break;
1735                 default:
1736                         break;
1737                 }
1738         } else {
1739                 if (!antcomb->alt_good) {
1740                         antcomb->scan_not_start = false;
1741                         /* Set alt to another LNA */
1742                         if (curr_main_set == ATH_ANT_DIV_COMB_LNA2) {
1743                                 div_ant_conf.main_lna_conf =
1744                                                 ATH_ANT_DIV_COMB_LNA2;
1745                                 div_ant_conf.alt_lna_conf =
1746                                                 ATH_ANT_DIV_COMB_LNA1;
1747                         } else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1) {
1748                                 div_ant_conf.main_lna_conf =
1749                                                 ATH_ANT_DIV_COMB_LNA1;
1750                                 div_ant_conf.alt_lna_conf =
1751                                                 ATH_ANT_DIV_COMB_LNA2;
1752                         }
1753                         goto div_comb_done;
1754                 }
1755         }
1756
1757         ath_select_ant_div_from_quick_scan(antcomb, &div_ant_conf,
1758                                            main_rssi_avg, alt_rssi_avg,
1759                                            alt_ratio);
1760
1761         antcomb->quick_scan_cnt++;
1762
1763 div_comb_done:
1764         ath_ant_div_conf_fast_divbias(&div_ant_conf, antcomb, alt_ratio);
1765         ath9k_hw_antdiv_comb_conf_set(sc->sc_ah, &div_ant_conf);
1766
1767         antcomb->scan_start_time = jiffies;
1768         antcomb->total_pkt_count = 0;
1769         antcomb->main_total_rssi = 0;
1770         antcomb->alt_total_rssi = 0;
1771         antcomb->main_recv_cnt = 0;
1772         antcomb->alt_recv_cnt = 0;
1773 }
1774
1775 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
1776 {
1777         struct ath_buf *bf;
1778         struct sk_buff *skb = NULL, *requeue_skb, *hdr_skb;
1779         struct ieee80211_rx_status *rxs;
1780         struct ath_hw *ah = sc->sc_ah;
1781         struct ath_common *common = ath9k_hw_common(ah);
1782         struct ieee80211_hw *hw = sc->hw;
1783         struct ieee80211_hdr *hdr;
1784         int retval;
1785         struct ath_rx_status rs;
1786         enum ath9k_rx_qtype qtype;
1787         bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
1788         int dma_type;
1789         u8 rx_status_len = ah->caps.rx_status_len;
1790         u64 tsf = 0;
1791         u32 tsf_lower = 0;
1792         unsigned long flags;
1793
1794         if (edma)
1795                 dma_type = DMA_BIDIRECTIONAL;
1796         else
1797                 dma_type = DMA_FROM_DEVICE;
1798
1799         qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP;
1800         spin_lock_bh(&sc->rx.rxbuflock);
1801
1802         tsf = ath9k_hw_gettsf64(ah);
1803         tsf_lower = tsf & 0xffffffff;
1804
1805         do {
1806                 bool decrypt_error = false;
1807                 /* If handling rx interrupt and flush is in progress => exit */
1808                 if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
1809                         break;
1810
1811                 memset(&rs, 0, sizeof(rs));
1812                 if (edma)
1813                         bf = ath_edma_get_next_rx_buf(sc, &rs, qtype);
1814                 else
1815                         bf = ath_get_next_rx_buf(sc, &rs);
1816
1817                 if (!bf)
1818                         break;
1819
1820                 skb = bf->bf_mpdu;
1821                 if (!skb)
1822                         continue;
1823
1824                 /*
1825                  * Take frame header from the first fragment and RX status from
1826                  * the last one.
1827                  */
1828                 if (sc->rx.frag)
1829                         hdr_skb = sc->rx.frag;
1830                 else
1831                         hdr_skb = skb;
1832
1833                 hdr = (struct ieee80211_hdr *) (hdr_skb->data + rx_status_len);
1834                 rxs = IEEE80211_SKB_RXCB(hdr_skb);
1835                 if (ieee80211_is_beacon(hdr->frame_control) &&
1836                     !compare_ether_addr(hdr->addr3, common->curbssid))
1837                         rs.is_mybeacon = true;
1838                 else
1839                         rs.is_mybeacon = false;
1840
1841                 ath_debug_stat_rx(sc, &rs);
1842
1843                 /*
1844                  * If we're asked to flush receive queue, directly
1845                  * chain it back at the queue without processing it.
1846                  */
1847                 if (sc->sc_flags & SC_OP_RXFLUSH)
1848                         goto requeue_drop_frag;
1849
1850                 retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs,
1851                                                  rxs, &decrypt_error);
1852                 if (retval)
1853                         goto requeue_drop_frag;
1854
1855                 rxs->mactime = (tsf & ~0xffffffffULL) | rs.rs_tstamp;
1856                 if (rs.rs_tstamp > tsf_lower &&
1857                     unlikely(rs.rs_tstamp - tsf_lower > 0x10000000))
1858                         rxs->mactime -= 0x100000000ULL;
1859
1860                 if (rs.rs_tstamp < tsf_lower &&
1861                     unlikely(tsf_lower - rs.rs_tstamp > 0x10000000))
1862                         rxs->mactime += 0x100000000ULL;
1863
1864                 /* Ensure we always have an skb to requeue once we are done
1865                  * processing the current buffer's skb */
1866                 requeue_skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_ATOMIC);
1867
1868                 /* If there is no memory we ignore the current RX'd frame,
1869                  * tell hardware it can give us a new frame using the old
1870                  * skb and put it at the tail of the sc->rx.rxbuf list for
1871                  * processing. */
1872                 if (!requeue_skb)
1873                         goto requeue_drop_frag;
1874
1875                 /* Unmap the frame */
1876                 dma_unmap_single(sc->dev, bf->bf_buf_addr,
1877                                  common->rx_bufsize,
1878                                  dma_type);
1879
1880                 skb_put(skb, rs.rs_datalen + ah->caps.rx_status_len);
1881                 if (ah->caps.rx_status_len)
1882                         skb_pull(skb, ah->caps.rx_status_len);
1883
1884                 if (!rs.rs_more)
1885                         ath9k_rx_skb_postprocess(common, hdr_skb, &rs,
1886                                                  rxs, decrypt_error);
1887
1888                 /* We will now give hardware our shiny new allocated skb */
1889                 bf->bf_mpdu = requeue_skb;
1890                 bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
1891                                                  common->rx_bufsize,
1892                                                  dma_type);
1893                 if (unlikely(dma_mapping_error(sc->dev,
1894                           bf->bf_buf_addr))) {
1895                         dev_kfree_skb_any(requeue_skb);
1896                         bf->bf_mpdu = NULL;
1897                         bf->bf_buf_addr = 0;
1898                         ath_err(common, "dma_mapping_error() on RX\n");
1899                         ieee80211_rx(hw, skb);
1900                         break;
1901                 }
1902
1903                 if (rs.rs_more) {
1904                         /*
1905                          * rs_more indicates chained descriptors which can be
1906                          * used to link buffers together for a sort of
1907                          * scatter-gather operation.
1908                          */
1909                         if (sc->rx.frag) {
1910                                 /* too many fragments - cannot handle frame */
1911                                 dev_kfree_skb_any(sc->rx.frag);
1912                                 dev_kfree_skb_any(skb);
1913                                 skb = NULL;
1914                         }
1915                         sc->rx.frag = skb;
1916                         goto requeue;
1917                 }
1918
1919                 if (sc->rx.frag) {
1920                         int space = skb->len - skb_tailroom(hdr_skb);
1921
1922                         sc->rx.frag = NULL;
1923
1924                         if (pskb_expand_head(hdr_skb, 0, space, GFP_ATOMIC) < 0) {
1925                                 dev_kfree_skb(skb);
1926                                 goto requeue_drop_frag;
1927                         }
1928
1929                         skb_copy_from_linear_data(skb, skb_put(hdr_skb, skb->len),
1930                                                   skb->len);
1931                         dev_kfree_skb_any(skb);
1932                         skb = hdr_skb;
1933                 }
1934
1935                 /*
1936                  * change the default rx antenna if rx diversity chooses the
1937                  * other antenna 3 times in a row.
1938                  */
1939                 if (sc->rx.defant != rs.rs_antenna) {
1940                         if (++sc->rx.rxotherant >= 3)
1941                                 ath_setdefantenna(sc, rs.rs_antenna);
1942                 } else {
1943                         sc->rx.rxotherant = 0;
1944                 }
1945
1946                 if (rxs->flag & RX_FLAG_MMIC_STRIPPED)
1947                         skb_trim(skb, skb->len - 8);
1948
1949                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1950
1951                 if ((sc->ps_flags & (PS_WAIT_FOR_BEACON |
1952                                      PS_WAIT_FOR_CAB |
1953                                      PS_WAIT_FOR_PSPOLL_DATA)) ||
1954                     ath9k_check_auto_sleep(sc))
1955                         ath_rx_ps(sc, skb, rs.is_mybeacon);
1956                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1957
1958                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx == 3)
1959                         ath_ant_comb_scan(sc, &rs);
1960
1961                 ieee80211_rx(hw, skb);
1962
1963 requeue_drop_frag:
1964                 if (sc->rx.frag) {
1965                         dev_kfree_skb_any(sc->rx.frag);
1966                         sc->rx.frag = NULL;
1967                 }
1968 requeue:
1969                 if (edma) {
1970                         list_add_tail(&bf->list, &sc->rx.rxbuf);
1971                         ath_rx_edma_buf_link(sc, qtype);
1972                 } else {
1973                         list_move_tail(&bf->list, &sc->rx.rxbuf);
1974                         ath_rx_buf_link(sc, bf);
1975                         if (!flush)
1976                                 ath9k_hw_rxena(ah);
1977                 }
1978         } while (1);
1979
1980         spin_unlock_bh(&sc->rx.rxbuflock);
1981
1982         if (!(ah->imask & ATH9K_INT_RXEOL)) {
1983                 ah->imask |= (ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
1984                 ath9k_hw_set_interrupts(ah);
1985         }
1986
1987         return 0;
1988 }