drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_update_txpow(struct ath_softc *sc)
  22 {
  23         struct ath_hw *ah = sc->sc_ah;
  24
  25         if (sc->curtxpow != sc->config.txpowlimit) {
  26                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
  27                 /* read back in case value is clamped */
  28                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  29         }
  30 }
  31
  32 static u8 parse_mpdudensity(u8 mpdudensity)
  33 {
  34         /*
  35          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  36          *   0 for no restriction
  37          *   1 for 1/4 us
  38          *   2 for 1/2 us
  39          *   3 for 1 us
  40          *   4 for 2 us
  41          *   5 for 4 us
  42          *   6 for 8 us
  43          *   7 for 16 us
  44          */
  45         switch (mpdudensity) {
  46         case 0:
  47                 return 0;
  48         case 1:
  49         case 2:
  50         case 3:
  51                 /* Our lower layer calculations limit our precision to
  52                    1 microsecond */
  53                 return 1;
  54         case 4:
  55                 return 2;
  56         case 5:
  57                 return 4;
  58         case 6:
  59                 return 8;
  60         case 7:
  61                 return 16;
  62         default:
  63                 return 0;
  64         }
  65 }
  66
  67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  68                                                 struct ieee80211_hw *hw)
  69 {
  70         struct ieee80211_channel *curchan = hw->conf.channel;
  71         struct ath9k_channel *channel;
  72         u8 chan_idx;
  73
  74         chan_idx = curchan->hw_value;
  75         channel = &sc->sc_ah->channels[chan_idx];
  76         ath9k_update_ichannel(sc, hw, channel);
  77         return channel;
  78 }
  79
  80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  81 {
  82         unsigned long flags;
  83         bool ret;
  84
  85         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  86         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  87         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  88
  89         return ret;
  90 }
  91
  92 void ath9k_ps_wakeup(struct ath_softc *sc)
  93 {
  94         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  95         unsigned long flags;
  96         enum ath9k_power_mode power_mode;
  97
  98         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  99         if (++sc->ps_usecount != 1)
 100                 goto unlock;
 101
 102         power_mode = sc->sc_ah->power_mode;
 103         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 104
 105         /*
 106          * While the hardware is asleep, the cycle counters contain no
 107          * useful data. Better clear them now so that they don't mess up
 108          * survey data results.
 109          */
 110         if (power_mode != ATH9K_PM_AWAKE) {
 111                 spin_lock(&common->cc_lock);
 112                 ath_hw_cycle_counters_update(common);
 113                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 114                 spin_unlock(&common->cc_lock);
 115         }
 116
 117  unlock:
 118         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 119 }
 120
 121 void ath9k_ps_restore(struct ath_softc *sc)
 122 {
 123         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 124         unsigned long flags;
 125
 126         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 127         if (--sc->ps_usecount != 0)
 128                 goto unlock;
 129
 130         spin_lock(&common->cc_lock);
 131         ath_hw_cycle_counters_update(common);
 132         spin_unlock(&common->cc_lock);
 133
 134         if (sc->ps_idle)
 135                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 136         else if (sc->ps_enabled &&
 137                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 138                               PS_WAIT_FOR_CAB |
 139                               PS_WAIT_FOR_PSPOLL_DATA |
 140                               PS_WAIT_FOR_TX_ACK)))
 141                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 142
 143  unlock:
 144         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 145 }
 146
 147 static void ath_start_ani(struct ath_common *common)
 148 {
 149         struct ath_hw *ah = common->ah;
 150         unsigned long timestamp = jiffies_to_msecs(jiffies);
 151         struct ath_softc *sc = (struct ath_softc *) common->priv;
 152
 153         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 154                 return;
 155
 156         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 157                 return;
 158
 159         common->ani.longcal_timer = timestamp;
 160         common->ani.shortcal_timer = timestamp;
 161         common->ani.checkani_timer = timestamp;
 162
 163         mod_timer(&common->ani.timer,
 164                   jiffies +
 165                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 166 }
 167
 168 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 169 {
 170         struct ath_hw *ah = sc->sc_ah;
 171         struct ath9k_channel *chan = &ah->channels[channel];
 172         struct survey_info *survey = &sc->survey[channel];
 173
 174         if (chan->noisefloor) {
 175                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 176                 survey->noise = chan->noisefloor;
 177         }
 178 }
 179
 180 static void ath_update_survey_stats(struct ath_softc *sc)
 181 {
 182         struct ath_hw *ah = sc->sc_ah;
 183         struct ath_common *common = ath9k_hw_common(ah);
 184         int pos = ah->curchan - &ah->channels[0];
 185         struct survey_info *survey = &sc->survey[pos];
 186         struct ath_cycle_counters *cc = &common->cc_survey;
 187         unsigned int div = common->clockrate * 1000;
 188
 189         if (!ah->curchan)
 190                 return;
 191
 192         if (ah->power_mode == ATH9K_PM_AWAKE)
 193                 ath_hw_cycle_counters_update(common);
 194
 195         if (cc->cycles > 0) {
 196                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 197                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 198                         SURVEY_INFO_CHANNEL_TIME_RX |
 199                         SURVEY_INFO_CHANNEL_TIME_TX;
 200                 survey->channel_time += cc->cycles / div;
 201                 survey->channel_time_busy += cc->rx_busy / div;
 202                 survey->channel_time_rx += cc->rx_frame / div;
 203                 survey->channel_time_tx += cc->tx_frame / div;
 204         }
 205         memset(cc, 0, sizeof(*cc));
 206
 207         ath_update_survey_nf(sc, pos);
 208 }
 209
 210 /*
 211  * Set/change channels.  If the channel is really being changed, it's done
 212  * by reseting the chip.  To accomplish this we must first cleanup any pending
 213  * DMA, then restart stuff.
 214 */
 215 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 216                     struct ath9k_channel *hchan)
 217 {
 218         struct ath_hw *ah = sc->sc_ah;
 219         struct ath_common *common = ath9k_hw_common(ah);
 220         struct ieee80211_conf *conf = &common->hw->conf;
 221         bool fastcc = true, stopped;
 222         struct ieee80211_channel *channel = hw->conf.channel;
 223         struct ath9k_hw_cal_data *caldata = NULL;
 224         int r;
 225
 226         if (sc->sc_flags & SC_OP_INVALID)
 227                 return -EIO;
 228
 229         del_timer_sync(&common->ani.timer);
 230         cancel_work_sync(&sc->paprd_work);
 231         cancel_work_sync(&sc->hw_check_work);
 232         cancel_delayed_work_sync(&sc->tx_complete_work);
 233
 234         ath9k_ps_wakeup(sc);
 235
 236         spin_lock_bh(&sc->sc_pcu_lock);
 237
 238         /*
 239          * This is only performed if the channel settings have
 240          * actually changed.
 241          *
 242          * To switch channels clear any pending DMA operations;
 243          * wait long enough for the RX fifo to drain, reset the
 244          * hardware at the new frequency, and then re-enable
 245          * the relevant bits of the h/w.
 246          */
 247         ath9k_hw_disable_interrupts(ah);
 248         stopped = ath_drain_all_txq(sc, false);
 249
 250         if (!ath_stoprecv(sc))
 251                 stopped = false;
 252
 253         if (!ath9k_hw_check_alive(ah))
 254                 stopped = false;
 255
 256         /* XXX: do not flush receive queue here. We don't want
 257          * to flush data frames already in queue because of
 258          * changing channel. */
 259
 260         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 261                 fastcc = false;
 262
 263         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 264                 caldata = &sc->caldata;
 265
 266         ath_dbg(common, ATH_DBG_CONFIG,
 267                 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 268                 sc->sc_ah->curchan->channel,
 269                 channel->center_freq, conf_is_ht40(conf),
 270                 fastcc);
 271
 272         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 273         if (r) {
 274                 ath_err(common,
 275                         "Unable to reset channel (%u MHz), reset status %d\n",
 276                         channel->center_freq, r);
 277                 goto ps_restore;
 278         }
 279
 280         if (ath_startrecv(sc) != 0) {
 281                 ath_err(common, "Unable to restart recv logic\n");
 282                 r = -EIO;
 283                 goto ps_restore;
 284         }
 285
 286         ath_update_txpow(sc);
 287         ath9k_hw_set_interrupts(ah, ah->imask);
 288
 289         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 290                 if (sc->sc_flags & SC_OP_BEACONS)
 291                         ath_beacon_config(sc, NULL);
 292                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 293                 ath_start_ani(common);
 294         }
 295
 296  ps_restore:
 297         ieee80211_wake_queues(hw);
 298
 299         spin_unlock_bh(&sc->sc_pcu_lock);
 300
 301         ath9k_ps_restore(sc);
 302         return r;
 303 }
 304
 305 static void ath_paprd_activate(struct ath_softc *sc)
 306 {
 307         struct ath_hw *ah = sc->sc_ah;
 308         struct ath9k_hw_cal_data *caldata = ah->caldata;
 309         struct ath_common *common = ath9k_hw_common(ah);
 310         int chain;
 311
 312         if (!caldata || !caldata->paprd_done)
 313                 return;
 314
 315         ath9k_ps_wakeup(sc);
 316         ar9003_paprd_enable(ah, false);
 317         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 318                 if (!(common->tx_chainmask & BIT(chain)))
 319                         continue;
 320
 321                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 322         }
 323
 324         ar9003_paprd_enable(ah, true);
 325         ath9k_ps_restore(sc);
 326 }
 327
 328 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
 329 {
 330         struct ieee80211_hw *hw = sc->hw;
 331         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
 332         struct ath_tx_control txctl;
 333         int time_left;
 334
 335         memset(&txctl, 0, sizeof(txctl));
 336         txctl.txq = sc->tx.txq_map[WME_AC_BE];
 337
 338         memset(tx_info, 0, sizeof(*tx_info));
 339         tx_info->band = hw->conf.channel->band;
 340         tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
 341         tx_info->control.rates[0].idx = 0;
 342         tx_info->control.rates[0].count = 1;
 343         tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
 344         tx_info->control.rates[1].idx = -1;
 345
 346         init_completion(&sc->paprd_complete);
 347         sc->paprd_pending = true;
 348         txctl.paprd = BIT(chain);
 349         if (ath_tx_start(hw, skb, &txctl) != 0)
 350                 return false;
 351
 352         time_left = wait_for_completion_timeout(&sc->paprd_complete,
 353                         msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 354         sc->paprd_pending = false;
 355
 356         if (!time_left)
 357                 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
 358                         "Timeout waiting for paprd training on TX chain %d\n",
 359                         chain);
 360
 361         return !!time_left;
 362 }
 363
 364 void ath_paprd_calibrate(struct work_struct *work)
 365 {
 366         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 367         struct ieee80211_hw *hw = sc->hw;
 368         struct ath_hw *ah = sc->sc_ah;
 369         struct ieee80211_hdr *hdr;
 370         struct sk_buff *skb = NULL;
 371         struct ath9k_hw_cal_data *caldata = ah->caldata;
 372         struct ath_common *common = ath9k_hw_common(ah);
 373         int ftype;
 374         int chain_ok = 0;
 375         int chain;
 376         int len = 1800;
 377
 378         if (!caldata)
 379                 return;
 380
 381         if (ar9003_paprd_init_table(ah) < 0)
 382                 return;
 383
 384         skb = alloc_skb(len, GFP_KERNEL);
 385         if (!skb)
 386                 return;
 387
 388         skb_put(skb, len);
 389         memset(skb->data, 0, len);
 390         hdr = (struct ieee80211_hdr *)skb->data;
 391         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 392         hdr->frame_control = cpu_to_le16(ftype);
 393         hdr->duration_id = cpu_to_le16(10);
 394         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 395         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 396         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 397
 398         ath9k_ps_wakeup(sc);
 399         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 400                 if (!(common->tx_chainmask & BIT(chain)))
 401                         continue;
 402
 403                 chain_ok = 0;
 404
 405                 ath_dbg(common, ATH_DBG_CALIBRATE,
 406                         "Sending PAPRD frame for thermal measurement "
 407                         "on chain %d\n", chain);
 408                 if (!ath_paprd_send_frame(sc, skb, chain))
 409                         goto fail_paprd;
 410
 411                 ar9003_paprd_setup_gain_table(ah, chain);
 412
 413                 ath_dbg(common, ATH_DBG_CALIBRATE,
 414                         "Sending PAPRD training frame on chain %d\n", chain);
 415                 if (!ath_paprd_send_frame(sc, skb, chain))
 416                         goto fail_paprd;
 417
 418                 if (!ar9003_paprd_is_done(ah))
 419                         break;
 420
 421                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
 422                         break;
 423
 424                 chain_ok = 1;
 425         }
 426         kfree_skb(skb);
 427
 428         if (chain_ok) {
 429                 caldata->paprd_done = true;
 430                 ath_paprd_activate(sc);
 431         }
 432
 433 fail_paprd:
 434         ath9k_ps_restore(sc);
 435 }
 436
 437 /*
 438  *  This routine performs the periodic noise floor calibration function
 439  *  that is used to adjust and optimize the chip performance.  This
 440  *  takes environmental changes (location, temperature) into account.
 441  *  When the task is complete, it reschedules itself depending on the
 442  *  appropriate interval that was calculated.
 443  */
 444 void ath_ani_calibrate(unsigned long data)
 445 {
 446         struct ath_softc *sc = (struct ath_softc *)data;
 447         struct ath_hw *ah = sc->sc_ah;
 448         struct ath_common *common = ath9k_hw_common(ah);
 449         bool longcal = false;
 450         bool shortcal = false;
 451         bool aniflag = false;
 452         unsigned int timestamp = jiffies_to_msecs(jiffies);
 453         u32 cal_interval, short_cal_interval, long_cal_interval;
 454         unsigned long flags;
 455
 456         if (ah->caldata && ah->caldata->nfcal_interference)
 457                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 458         else
 459                 long_cal_interval = ATH_LONG_CALINTERVAL;
 460
 461         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 462                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 463
 464         /* Only calibrate if awake */
 465         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 466                 goto set_timer;
 467
 468         ath9k_ps_wakeup(sc);
 469
 470         /* Long calibration runs independently of short calibration. */
 471         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 472                 longcal = true;
 473                 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 474                 common->ani.longcal_timer = timestamp;
 475         }
 476
 477         /* Short calibration applies only while caldone is false */
 478         if (!common->ani.caldone) {
 479                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 480                         shortcal = true;
 481                         ath_dbg(common, ATH_DBG_ANI,
 482                                 "shortcal @%lu\n", jiffies);
 483                         common->ani.shortcal_timer = timestamp;
 484                         common->ani.resetcal_timer = timestamp;
 485                 }
 486         } else {
 487                 if ((timestamp - common->ani.resetcal_timer) >=
 488                     ATH_RESTART_CALINTERVAL) {
 489                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 490                         if (common->ani.caldone)
 491                                 common->ani.resetcal_timer = timestamp;
 492                 }
 493         }
 494
 495         /* Verify whether we must check ANI */
 496         if ((timestamp - common->ani.checkani_timer) >=
 497              ah->config.ani_poll_interval) {
 498                 aniflag = true;
 499                 common->ani.checkani_timer = timestamp;
 500         }
 501
 502         /* Skip all processing if there's nothing to do. */
 503         if (longcal || shortcal || aniflag) {
 504                 /* Call ANI routine if necessary */
 505                 if (aniflag) {
 506                         spin_lock_irqsave(&common->cc_lock, flags);
 507                         ath9k_hw_ani_monitor(ah, ah->curchan);
 508                         ath_update_survey_stats(sc);
 509                         spin_unlock_irqrestore(&common->cc_lock, flags);
 510                 }
 511
 512                 /* Perform calibration if necessary */
 513                 if (longcal || shortcal) {
 514                         common->ani.caldone =
 515                                 ath9k_hw_calibrate(ah,
 516                                                    ah->curchan,
 517                                                    common->rx_chainmask,
 518                                                    longcal);
 519                 }
 520         }
 521
 522         ath9k_ps_restore(sc);
 523
 524 set_timer:
 525         /*
 526         * Set timer interval based on previous results.
 527         * The interval must be the shortest necessary to satisfy ANI,
 528         * short calibration and long calibration.
 529         */
 530         cal_interval = ATH_LONG_CALINTERVAL;
 531         if (sc->sc_ah->config.enable_ani)
 532                 cal_interval = min(cal_interval,
 533                                    (u32)ah->config.ani_poll_interval);
 534         if (!common->ani.caldone)
 535                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 536
 537         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 538         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 539                 if (!ah->caldata->paprd_done)
 540                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 541                 else if (!ah->paprd_table_write_done)
 542                         ath_paprd_activate(sc);
 543         }
 544 }
 545
 546 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 547 {
 548         struct ath_node *an;
 549         struct ath_hw *ah = sc->sc_ah;
 550         an = (struct ath_node *)sta->drv_priv;
 551
 552 #ifdef CONFIG_ATH9K_DEBUGFS
 553         spin_lock(&sc->nodes_lock);
 554         list_add(&an->list, &sc->nodes);
 555         spin_unlock(&sc->nodes_lock);
 556         an->sta = sta;
 557 #endif
 558         if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
 559                 sc->sc_flags |= SC_OP_ENABLE_APM;
 560
 561         if (sc->sc_flags & SC_OP_TXAGGR) {
 562                 ath_tx_node_init(sc, an);
 563                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 564                                      sta->ht_cap.ampdu_factor);
 565                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 566         }
 567 }
 568
 569 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 570 {
 571         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 572
 573 #ifdef CONFIG_ATH9K_DEBUGFS
 574         spin_lock(&sc->nodes_lock);
 575         list_del(&an->list);
 576         spin_unlock(&sc->nodes_lock);
 577         an->sta = NULL;
 578 #endif
 579
 580         if (sc->sc_flags & SC_OP_TXAGGR)
 581                 ath_tx_node_cleanup(sc, an);
 582 }
 583
 584 void ath_hw_check(struct work_struct *work)
 585 {
 586         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 587         int i;
 588
 589         ath9k_ps_wakeup(sc);
 590
 591         for (i = 0; i < 3; i++) {
 592                 if (ath9k_hw_check_alive(sc->sc_ah))
 593                         goto out;
 594
 595                 msleep(1);
 596         }
 597         ath_reset(sc, true);
 598
 599 out:
 600         ath9k_ps_restore(sc);
 601 }
 602
 603 void ath9k_tasklet(unsigned long data)
 604 {
 605         struct ath_softc *sc = (struct ath_softc *)data;
 606         struct ath_hw *ah = sc->sc_ah;
 607         struct ath_common *common = ath9k_hw_common(ah);
 608
 609         u32 status = sc->intrstatus;
 610         u32 rxmask;
 611
 612         ath9k_ps_wakeup(sc);
 613
 614         if (status & ATH9K_INT_FATAL) {
 615                 ath_reset(sc, true);
 616                 ath9k_ps_restore(sc);
 617                 return;
 618         }
 619
 620         spin_lock(&sc->sc_pcu_lock);
 621
 622         /*
 623          * Only run the baseband hang check if beacons stop working in AP or
 624          * IBSS mode, because it has a high false positive rate. For station
 625          * mode it should not be necessary, since the upper layers will detect
 626          * this through a beacon miss automatically and the following channel
 627          * change will trigger a hardware reset anyway
 628          */
 629         if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
 630             !ath9k_hw_check_alive(ah))
 631                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 632
 633         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 634                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 635                           ATH9K_INT_RXORN);
 636         else
 637                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 638
 639         if (status & rxmask) {
 640                 /* Check for high priority Rx first */
 641                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 642                     (status & ATH9K_INT_RXHP))
 643                         ath_rx_tasklet(sc, 0, true);
 644
 645                 ath_rx_tasklet(sc, 0, false);
 646         }
 647
 648         if (status & ATH9K_INT_TX) {
 649                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 650                         ath_tx_edma_tasklet(sc);
 651                 else
 652                         ath_tx_tasklet(sc);
 653         }
 654
 655         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 656                 /*
 657                  * TSF sync does not look correct; remain awake to sync with
 658                  * the next Beacon.
 659                  */
 660                 ath_dbg(common, ATH_DBG_PS,
 661                         "TSFOOR - Sync with next Beacon\n");
 662                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 663         }
 664
 665         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 666                 if (status & ATH9K_INT_GENTIMER)
 667                         ath_gen_timer_isr(sc->sc_ah);
 668
 669         /* re-enable hardware interrupt */
 670         ath9k_hw_enable_interrupts(ah);
 671
 672         spin_unlock(&sc->sc_pcu_lock);
 673         ath9k_ps_restore(sc);
 674 }
 675
 676 irqreturn_t ath_isr(int irq, void *dev)
 677 {
 678 #define SCHED_INTR (                            \
 679                 ATH9K_INT_FATAL |               \
 680                 ATH9K_INT_RXORN |               \
 681                 ATH9K_INT_RXEOL |               \
 682                 ATH9K_INT_RX |                  \
 683                 ATH9K_INT_RXLP |                \
 684                 ATH9K_INT_RXHP |                \
 685                 ATH9K_INT_TX |                  \
 686                 ATH9K_INT_BMISS |               \
 687                 ATH9K_INT_CST |                 \
 688                 ATH9K_INT_TSFOOR |              \
 689                 ATH9K_INT_GENTIMER)
 690
 691         struct ath_softc *sc = dev;
 692         struct ath_hw *ah = sc->sc_ah;
 693         struct ath_common *common = ath9k_hw_common(ah);
 694         enum ath9k_int status;
 695         bool sched = false;
 696
 697         /*
 698          * The hardware is not ready/present, don't
 699          * touch anything. Note this can happen early
 700          * on if the IRQ is shared.
 701          */
 702         if (sc->sc_flags & SC_OP_INVALID)
 703                 return IRQ_NONE;
 704
 705
 706         /* shared irq, not for us */
 707
 708         if (!ath9k_hw_intrpend(ah))
 709                 return IRQ_NONE;
 710
 711         /*
 712          * Figure out the reason(s) for the interrupt.  Note
 713          * that the hal returns a pseudo-ISR that may include
 714          * bits we haven't explicitly enabled so we mask the
 715          * value to insure we only process bits we requested.
 716          */
 717         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 718         status &= ah->imask;    /* discard unasked-for bits */
 719
 720         /*
 721          * If there are no status bits set, then this interrupt was not
 722          * for me (should have been caught above).
 723          */
 724         if (!status)
 725                 return IRQ_NONE;
 726
 727         /* Cache the status */
 728         sc->intrstatus = status;
 729
 730         if (status & SCHED_INTR)
 731                 sched = true;
 732
 733         /*
 734          * If a FATAL or RXORN interrupt is received, we have to reset the
 735          * chip immediately.
 736          */
 737         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 738             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 739                 goto chip_reset;
 740
 741         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 742             (status & ATH9K_INT_BB_WATCHDOG)) {
 743
 744                 spin_lock(&common->cc_lock);
 745                 ath_hw_cycle_counters_update(common);
 746                 ar9003_hw_bb_watchdog_dbg_info(ah);
 747                 spin_unlock(&common->cc_lock);
 748
 749                 goto chip_reset;
 750         }
 751
 752         if (status & ATH9K_INT_SWBA)
 753                 tasklet_schedule(&sc->bcon_tasklet);
 754
 755         if (status & ATH9K_INT_TXURN)
 756                 ath9k_hw_updatetxtriglevel(ah, true);
 757
 758         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 759                 if (status & ATH9K_INT_RXEOL) {
 760                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 761                         ath9k_hw_set_interrupts(ah, ah->imask);
 762                 }
 763         }
 764
 765         if (status & ATH9K_INT_MIB) {
 766                 /*
 767                  * Disable interrupts until we service the MIB
 768                  * interrupt; otherwise it will continue to
 769                  * fire.
 770                  */
 771                 ath9k_hw_disable_interrupts(ah);
 772                 /*
 773                  * Let the hal handle the event. We assume
 774                  * it will clear whatever condition caused
 775                  * the interrupt.
 776                  */
 777                 spin_lock(&common->cc_lock);
 778                 ath9k_hw_proc_mib_event(ah);
 779                 spin_unlock(&common->cc_lock);
 780                 ath9k_hw_enable_interrupts(ah);
 781         }
 782
 783         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 784                 if (status & ATH9K_INT_TIM_TIMER) {
 785                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 786                                 goto chip_reset;
 787                         /* Clear RxAbort bit so that we can
 788                          * receive frames */
 789                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 790                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 791                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 792                 }
 793
 794 chip_reset:
 795
 796         ath_debug_stat_interrupt(sc, status);
 797
 798         if (sched) {
 799                 /* turn off every interrupt */
 800                 ath9k_hw_disable_interrupts(ah);
 801                 tasklet_schedule(&sc->intr_tq);
 802         }
 803
 804         return IRQ_HANDLED;
 805
 806 #undef SCHED_INTR
 807 }
 808
 809 static u32 ath_get_extchanmode(struct ath_softc *sc,
 810                                struct ieee80211_channel *chan,
 811                                enum nl80211_channel_type channel_type)
 812 {
 813         u32 chanmode = 0;
 814
 815         switch (chan->band) {
 816         case IEEE80211_BAND_2GHZ:
 817                 switch(channel_type) {
 818                 case NL80211_CHAN_NO_HT:
 819                 case NL80211_CHAN_HT20:
 820                         chanmode = CHANNEL_G_HT20;
 821                         break;
 822                 case NL80211_CHAN_HT40PLUS:
 823                         chanmode = CHANNEL_G_HT40PLUS;
 824                         break;
 825                 case NL80211_CHAN_HT40MINUS:
 826                         chanmode = CHANNEL_G_HT40MINUS;
 827                         break;
 828                 }
 829                 break;
 830         case IEEE80211_BAND_5GHZ:
 831                 switch(channel_type) {
 832                 case NL80211_CHAN_NO_HT:
 833                 case NL80211_CHAN_HT20:
 834                         chanmode = CHANNEL_A_HT20;
 835                         break;
 836                 case NL80211_CHAN_HT40PLUS:
 837                         chanmode = CHANNEL_A_HT40PLUS;
 838                         break;
 839                 case NL80211_CHAN_HT40MINUS:
 840                         chanmode = CHANNEL_A_HT40MINUS;
 841                         break;
 842                 }
 843                 break;
 844         default:
 845                 break;
 846         }
 847
 848         return chanmode;
 849 }
 850
 851 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 852                                  struct ieee80211_hw *hw,
 853                                  struct ieee80211_vif *vif,
 854                                  struct ieee80211_bss_conf *bss_conf)
 855 {
 856         struct ath_hw *ah = sc->sc_ah;
 857         struct ath_common *common = ath9k_hw_common(ah);
 858
 859         if (bss_conf->assoc) {
 860                 ath_dbg(common, ATH_DBG_CONFIG,
 861                         "Bss Info ASSOC %d, bssid: %pM\n",
 862                         bss_conf->aid, common->curbssid);
 863
 864                 /* New association, store aid */
 865                 common->curaid = bss_conf->aid;
 866                 ath9k_hw_write_associd(ah);
 867
 868                 /*
 869                  * Request a re-configuration of Beacon related timers
 870                  * on the receipt of the first Beacon frame (i.e.,
 871                  * after time sync with the AP).
 872                  */
 873                 sc->ps_flags |= PS_BEACON_SYNC;
 874
 875                 /* Configure the beacon */
 876                 ath_beacon_config(sc, vif);
 877
 878                 /* Reset rssi stats */
 879                 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
 880                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 881
 882                 sc->sc_flags |= SC_OP_ANI_RUN;
 883                 ath_start_ani(common);
 884         } else {
 885                 ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 886                 common->curaid = 0;
 887                 /* Stop ANI */
 888                 sc->sc_flags &= ~SC_OP_ANI_RUN;
 889                 del_timer_sync(&common->ani.timer);
 890         }
 891 }
 892
 893 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 894 {
 895         struct ath_hw *ah = sc->sc_ah;
 896         struct ath_common *common = ath9k_hw_common(ah);
 897         struct ieee80211_channel *channel = hw->conf.channel;
 898         int r;
 899
 900         ath9k_ps_wakeup(sc);
 901         spin_lock_bh(&sc->sc_pcu_lock);
 902
 903         ath9k_hw_configpcipowersave(ah, 0, 0);
 904
 905         if (!ah->curchan)
 906                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 907
 908         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 909         if (r) {
 910                 ath_err(common,
 911                         "Unable to reset channel (%u MHz), reset status %d\n",
 912                         channel->center_freq, r);
 913         }
 914
 915         ath_update_txpow(sc);
 916         if (ath_startrecv(sc) != 0) {
 917                 ath_err(common, "Unable to restart recv logic\n");
 918                 goto out;
 919         }
 920         if (sc->sc_flags & SC_OP_BEACONS)
 921                 ath_beacon_config(sc, NULL);    /* restart beacons */
 922
 923         /* Re-Enable  interrupts */
 924         ath9k_hw_set_interrupts(ah, ah->imask);
 925
 926         /* Enable LED */
 927         ath9k_hw_cfg_output(ah, ah->led_pin,
 928                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 929         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 930
 931         ieee80211_wake_queues(hw);
 932 out:
 933         spin_unlock_bh(&sc->sc_pcu_lock);
 934
 935         ath9k_ps_restore(sc);
 936 }
 937
 938 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 939 {
 940         struct ath_hw *ah = sc->sc_ah;
 941         struct ieee80211_channel *channel = hw->conf.channel;
 942         int r;
 943
 944         ath9k_ps_wakeup(sc);
 945         spin_lock_bh(&sc->sc_pcu_lock);
 946
 947         ieee80211_stop_queues(hw);
 948
 949         /*
 950          * Keep the LED on when the radio is disabled
 951          * during idle unassociated state.
 952          */
 953         if (!sc->ps_idle) {
 954                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 955                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 956         }
 957
 958         /* Disable interrupts */
 959         ath9k_hw_disable_interrupts(ah);
 960
 961         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 962
 963         ath_stoprecv(sc);               /* turn off frame recv */
 964         ath_flushrecv(sc);              /* flush recv queue */
 965
 966         if (!ah->curchan)
 967                 ah->curchan = ath_get_curchannel(sc, hw);
 968
 969         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 970         if (r) {
 971                 ath_err(ath9k_hw_common(sc->sc_ah),
 972                         "Unable to reset channel (%u MHz), reset status %d\n",
 973                         channel->center_freq, r);
 974         }
 975
 976         ath9k_hw_phy_disable(ah);
 977
 978         ath9k_hw_configpcipowersave(ah, 1, 1);
 979
 980         spin_unlock_bh(&sc->sc_pcu_lock);
 981         ath9k_ps_restore(sc);
 982
 983         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 984 }
 985
 986 int ath_reset(struct ath_softc *sc, bool retry_tx)
 987 {
 988         struct ath_hw *ah = sc->sc_ah;
 989         struct ath_common *common = ath9k_hw_common(ah);
 990         struct ieee80211_hw *hw = sc->hw;
 991         int r;
 992
 993         /* Stop ANI */
 994         del_timer_sync(&common->ani.timer);
 995
 996         spin_lock_bh(&sc->sc_pcu_lock);
 997
 998         ieee80211_stop_queues(hw);
 999
1000         ath9k_hw_disable_interrupts(ah);
1001         ath_drain_all_txq(sc, retry_tx);
1002
1003         ath_stoprecv(sc);
1004         ath_flushrecv(sc);
1005
1006         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
1007         if (r)
1008                 ath_err(common,
1009                         "Unable to reset hardware; reset status %d\n", r);
1010
1011         if (ath_startrecv(sc) != 0)
1012                 ath_err(common, "Unable to start recv logic\n");
1013
1014         /*
1015          * We may be doing a reset in response to a request
1016          * that changes the channel so update any state that
1017          * might change as a result.
1018          */
1019         ath_update_txpow(sc);
1020
1021         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1022                 ath_beacon_config(sc, NULL);    /* restart beacons */
1023
1024         ath9k_hw_set_interrupts(ah, ah->imask);
1025
1026         if (retry_tx) {
1027                 int i;
1028                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1029                         if (ATH_TXQ_SETUP(sc, i)) {
1030                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1031                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1032                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1033                         }
1034                 }
1035         }
1036
1037         ieee80211_wake_queues(hw);
1038         spin_unlock_bh(&sc->sc_pcu_lock);
1039
1040         /* Start ANI */
1041         ath_start_ani(common);
1042
1043         return r;
1044 }
1045
1046 /* XXX: Remove me once we don't depend on ath9k_channel for all
1047  * this redundant data */
1048 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1049                            struct ath9k_channel *ichan)
1050 {
1051         struct ieee80211_channel *chan = hw->conf.channel;
1052         struct ieee80211_conf *conf = &hw->conf;
1053
1054         ichan->channel = chan->center_freq;
1055         ichan->chan = chan;
1056
1057         if (chan->band == IEEE80211_BAND_2GHZ) {
1058                 ichan->chanmode = CHANNEL_G;
1059                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1060         } else {
1061                 ichan->chanmode = CHANNEL_A;
1062                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1063         }
1064
1065         if (conf_is_ht(conf))
1066                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1067                                             conf->channel_type);
1068 }
1069
1070 /**********************/
1071 /* mac80211 callbacks */
1072 /**********************/
1073
1074 static int ath9k_start(struct ieee80211_hw *hw)
1075 {
1076         struct ath_softc *sc = hw->priv;
1077         struct ath_hw *ah = sc->sc_ah;
1078         struct ath_common *common = ath9k_hw_common(ah);
1079         struct ieee80211_channel *curchan = hw->conf.channel;
1080         struct ath9k_channel *init_channel;
1081         int r;
1082
1083         ath_dbg(common, ATH_DBG_CONFIG,
1084                 "Starting driver with initial channel: %d MHz\n",
1085                 curchan->center_freq);
1086
1087         mutex_lock(&sc->mutex);
1088
1089         /* setup initial channel */
1090         sc->chan_idx = curchan->hw_value;
1091
1092         init_channel = ath_get_curchannel(sc, hw);
1093
1094         /* Reset SERDES registers */
1095         ath9k_hw_configpcipowersave(ah, 0, 0);
1096
1097         /*
1098          * The basic interface to setting the hardware in a good
1099          * state is ``reset''.  On return the hardware is known to
1100          * be powered up and with interrupts disabled.  This must
1101          * be followed by initialization of the appropriate bits
1102          * and then setup of the interrupt mask.
1103          */
1104         spin_lock_bh(&sc->sc_pcu_lock);
1105         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1106         if (r) {
1107                 ath_err(common,
1108                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1109                         r, curchan->center_freq);
1110                 spin_unlock_bh(&sc->sc_pcu_lock);
1111                 goto mutex_unlock;
1112         }
1113
1114         /*
1115          * This is needed only to setup initial state
1116          * but it's best done after a reset.
1117          */
1118         ath_update_txpow(sc);
1119
1120         /*
1121          * Setup the hardware after reset:
1122          * The receive engine is set going.
1123          * Frame transmit is handled entirely
1124          * in the frame output path; there's nothing to do
1125          * here except setup the interrupt mask.
1126          */
1127         if (ath_startrecv(sc) != 0) {
1128                 ath_err(common, "Unable to start recv logic\n");
1129                 r = -EIO;
1130                 spin_unlock_bh(&sc->sc_pcu_lock);
1131                 goto mutex_unlock;
1132         }
1133         spin_unlock_bh(&sc->sc_pcu_lock);
1134
1135         /* Setup our intr mask. */
1136         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1137                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1138                     ATH9K_INT_GLOBAL;
1139
1140         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1141                 ah->imask |= ATH9K_INT_RXHP |
1142                              ATH9K_INT_RXLP |
1143                              ATH9K_INT_BB_WATCHDOG;
1144         else
1145                 ah->imask |= ATH9K_INT_RX;
1146
1147         ah->imask |= ATH9K_INT_GTT;
1148
1149         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1150                 ah->imask |= ATH9K_INT_CST;
1151
1152         sc->sc_flags &= ~SC_OP_INVALID;
1153         sc->sc_ah->is_monitoring = false;
1154
1155         /* Disable BMISS interrupt when we're not associated */
1156         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1157         ath9k_hw_set_interrupts(ah, ah->imask);
1158
1159         ieee80211_wake_queues(hw);
1160
1161         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1162
1163         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1164             !ah->btcoex_hw.enabled) {
1165                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1166                                            AR_STOMP_LOW_WLAN_WGHT);
1167                 ath9k_hw_btcoex_enable(ah);
1168
1169                 if (common->bus_ops->bt_coex_prep)
1170                         common->bus_ops->bt_coex_prep(common);
1171                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1172                         ath9k_btcoex_timer_resume(sc);
1173         }
1174
1175         /* User has the option to provide pm-qos value as a module
1176          * parameter rather than using the default value of
1177          * 'ATH9K_PM_QOS_DEFAULT_VALUE'.
1178          */
1179         pm_qos_update_request(&sc->pm_qos_req, ath9k_pm_qos_value);
1180
1181         if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1182                 common->bus_ops->extn_synch_en(common);
1183
1184 mutex_unlock:
1185         mutex_unlock(&sc->mutex);
1186
1187         return r;
1188 }
1189
1190 static int ath9k_tx(struct ieee80211_hw *hw,
1191                     struct sk_buff *skb)
1192 {
1193         struct ath_softc *sc = hw->priv;
1194         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1195         struct ath_tx_control txctl;
1196         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1197
1198         if (sc->ps_enabled) {
1199                 /*
1200                  * mac80211 does not set PM field for normal data frames, so we
1201                  * need to update that based on the current PS mode.
1202                  */
1203                 if (ieee80211_is_data(hdr->frame_control) &&
1204                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1205                     !ieee80211_has_pm(hdr->frame_control)) {
1206                         ath_dbg(common, ATH_DBG_PS,
1207                                 "Add PM=1 for a TX frame while in PS mode\n");
1208                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1209                 }
1210         }
1211
1212         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1213                 /*
1214                  * We are using PS-Poll and mac80211 can request TX while in
1215                  * power save mode. Need to wake up hardware for the TX to be
1216                  * completed and if needed, also for RX of buffered frames.
1217                  */
1218                 ath9k_ps_wakeup(sc);
1219                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1220                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1221                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1222                         ath_dbg(common, ATH_DBG_PS,
1223                                 "Sending PS-Poll to pick a buffered frame\n");
1224                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1225                 } else {
1226                         ath_dbg(common, ATH_DBG_PS,
1227                                 "Wake up to complete TX\n");
1228                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1229                 }
1230                 /*
1231                  * The actual restore operation will happen only after
1232                  * the sc_flags bit is cleared. We are just dropping
1233                  * the ps_usecount here.
1234                  */
1235                 ath9k_ps_restore(sc);
1236         }
1237
1238         memset(&txctl, 0, sizeof(struct ath_tx_control));
1239         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1240
1241         ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1242
1243         if (ath_tx_start(hw, skb, &txctl) != 0) {
1244                 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1245                 goto exit;
1246         }
1247
1248         return 0;
1249 exit:
1250         dev_kfree_skb_any(skb);
1251         return 0;
1252 }
1253
1254 static void ath9k_stop(struct ieee80211_hw *hw)
1255 {
1256         struct ath_softc *sc = hw->priv;
1257         struct ath_hw *ah = sc->sc_ah;
1258         struct ath_common *common = ath9k_hw_common(ah);
1259
1260         mutex_lock(&sc->mutex);
1261
1262         if (led_blink)
1263                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1264
1265         cancel_delayed_work_sync(&sc->tx_complete_work);
1266         cancel_work_sync(&sc->paprd_work);
1267         cancel_work_sync(&sc->hw_check_work);
1268
1269         if (sc->sc_flags & SC_OP_INVALID) {
1270                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1271                 mutex_unlock(&sc->mutex);
1272                 return;
1273         }
1274
1275         /* Ensure HW is awake when we try to shut it down. */
1276         ath9k_ps_wakeup(sc);
1277
1278         if (ah->btcoex_hw.enabled) {
1279                 ath9k_hw_btcoex_disable(ah);
1280                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1281                         ath9k_btcoex_timer_pause(sc);
1282         }
1283
1284         spin_lock_bh(&sc->sc_pcu_lock);
1285
1286         /* make sure h/w will not generate any interrupt
1287          * before setting the invalid flag. */
1288         ath9k_hw_disable_interrupts(ah);
1289
1290         if (!(sc->sc_flags & SC_OP_INVALID)) {
1291                 ath_drain_all_txq(sc, false);
1292                 ath_stoprecv(sc);
1293                 ath9k_hw_phy_disable(ah);
1294         } else
1295                 sc->rx.rxlink = NULL;
1296
1297         /* disable HAL and put h/w to sleep */
1298         ath9k_hw_disable(ah);
1299         ath9k_hw_configpcipowersave(ah, 1, 1);
1300
1301         spin_unlock_bh(&sc->sc_pcu_lock);
1302
1303         ath9k_ps_restore(sc);
1304
1305         sc->ps_idle = true;
1306         ath_radio_disable(sc, hw);
1307
1308         sc->sc_flags |= SC_OP_INVALID;
1309
1310         pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
1311
1312         mutex_unlock(&sc->mutex);
1313
1314         ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1315 }
1316
1317 bool ath9k_uses_beacons(int type)
1318 {
1319         switch (type) {
1320         case NL80211_IFTYPE_AP:
1321         case NL80211_IFTYPE_ADHOC:
1322         case NL80211_IFTYPE_MESH_POINT:
1323                 return true;
1324         default:
1325                 return false;
1326         }
1327 }
1328
1329 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1330                                  struct ieee80211_vif *vif)
1331 {
1332         struct ath_vif *avp = (void *)vif->drv_priv;
1333
1334         /* Disable SWBA interrupt */
1335         sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
1336         ath9k_ps_wakeup(sc);
1337         ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1338         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1339         tasklet_kill(&sc->bcon_tasklet);
1340         ath9k_ps_restore(sc);
1341
1342         ath_beacon_return(sc, avp);
1343         sc->sc_flags &= ~SC_OP_BEACONS;
1344
1345         if (sc->nbcnvifs > 0) {
1346                 /* Re-enable beaconing */
1347                 sc->sc_ah->imask |= ATH9K_INT_SWBA;
1348                 ath9k_ps_wakeup(sc);
1349                 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1350                 ath9k_ps_restore(sc);
1351         }
1352 }
1353
1354 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1355 {
1356         struct ath9k_vif_iter_data *iter_data = data;
1357         int i;
1358
1359         if (iter_data->hw_macaddr)
1360                 for (i = 0; i < ETH_ALEN; i++)
1361                         iter_data->mask[i] &=
1362                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1363
1364         switch (vif->type) {
1365         case NL80211_IFTYPE_AP:
1366                 iter_data->naps++;
1367                 break;
1368         case NL80211_IFTYPE_STATION:
1369                 iter_data->nstations++;
1370                 break;
1371         case NL80211_IFTYPE_ADHOC:
1372                 iter_data->nadhocs++;
1373                 break;
1374         case NL80211_IFTYPE_MESH_POINT:
1375                 iter_data->nmeshes++;
1376                 break;
1377         case NL80211_IFTYPE_WDS:
1378                 iter_data->nwds++;
1379                 break;
1380         default:
1381                 iter_data->nothers++;
1382                 break;
1383         }
1384 }
1385
1386 /* Called with sc->mutex held. */
1387 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1388                                struct ieee80211_vif *vif,
1389                                struct ath9k_vif_iter_data *iter_data)
1390 {
1391         struct ath_softc *sc = hw->priv;
1392         struct ath_hw *ah = sc->sc_ah;
1393         struct ath_common *common = ath9k_hw_common(ah);
1394
1395         /*
1396          * Use the hardware MAC address as reference, the hardware uses it
1397          * together with the BSSID mask when matching addresses.
1398          */
1399         memset(iter_data, 0, sizeof(*iter_data));
1400         iter_data->hw_macaddr = common->macaddr;
1401         memset(&iter_data->mask, 0xff, ETH_ALEN);
1402
1403         if (vif)
1404                 ath9k_vif_iter(iter_data, vif->addr, vif);
1405
1406         /* Get list of all active MAC addresses */
1407         ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1408                                                    iter_data);
1409 }
1410
1411 /* Called with sc->mutex held. */
1412 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1413                                           struct ieee80211_vif *vif)
1414 {
1415         struct ath_softc *sc = hw->priv;
1416         struct ath_hw *ah = sc->sc_ah;
1417         struct ath_common *common = ath9k_hw_common(ah);
1418         struct ath9k_vif_iter_data iter_data;
1419
1420         ath9k_calculate_iter_data(hw, vif, &iter_data);
1421
1422         /* Set BSSID mask. */
1423         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1424         ath_hw_setbssidmask(common);
1425
1426         /* Set op-mode & TSF */
1427         if (iter_data.naps > 0) {
1428                 ath9k_hw_set_tsfadjust(ah, 1);
1429                 sc->sc_flags |= SC_OP_TSF_RESET;
1430                 ah->opmode = NL80211_IFTYPE_AP;
1431         } else {
1432                 ath9k_hw_set_tsfadjust(ah, 0);
1433                 sc->sc_flags &= ~SC_OP_TSF_RESET;
1434
1435                 if (iter_data.nwds + iter_data.nmeshes)
1436                         ah->opmode = NL80211_IFTYPE_AP;
1437                 else if (iter_data.nadhocs)
1438                         ah->opmode = NL80211_IFTYPE_ADHOC;
1439                 else
1440                         ah->opmode = NL80211_IFTYPE_STATION;
1441         }
1442
1443         /*
1444          * Enable MIB interrupts when there are hardware phy counters.
1445          */
1446         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1447                 if (ah->config.enable_ani)
1448                         ah->imask |= ATH9K_INT_MIB;
1449                 ah->imask |= ATH9K_INT_TSFOOR;
1450         } else {
1451                 ah->imask &= ~ATH9K_INT_MIB;
1452                 ah->imask &= ~ATH9K_INT_TSFOOR;
1453         }
1454
1455         ath9k_hw_set_interrupts(ah, ah->imask);
1456
1457         /* Set up ANI */
1458         if ((iter_data.naps + iter_data.nadhocs) > 0) {
1459                 sc->sc_flags |= SC_OP_ANI_RUN;
1460                 ath_start_ani(common);
1461         } else {
1462                 sc->sc_flags &= ~SC_OP_ANI_RUN;
1463                 del_timer_sync(&common->ani.timer);
1464         }
1465 }
1466
1467 /* Called with sc->mutex held, vif counts set up properly. */
1468 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1469                                    struct ieee80211_vif *vif)
1470 {
1471         struct ath_softc *sc = hw->priv;
1472
1473         ath9k_calculate_summary_state(hw, vif);
1474
1475         if (ath9k_uses_beacons(vif->type)) {
1476                 int error;
1477                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1478                 /* This may fail because upper levels do not have beacons
1479                  * properly configured yet.  That's OK, we assume it
1480                  * will be properly configured and then we will be notified
1481                  * in the info_changed method and set up beacons properly
1482                  * there.
1483                  */
1484                 error = ath_beacon_alloc(sc, vif);
1485                 if (error)
1486                         ath9k_reclaim_beacon(sc, vif);
1487                 else
1488                         ath_beacon_config(sc, vif);
1489         }
1490 }
1491
1492
1493 static int ath9k_add_interface(struct ieee80211_hw *hw,
1494                                struct ieee80211_vif *vif)
1495 {
1496         struct ath_softc *sc = hw->priv;
1497         struct ath_hw *ah = sc->sc_ah;
1498         struct ath_common *common = ath9k_hw_common(ah);
1499         struct ath_vif *avp = (void *)vif->drv_priv;
1500         int ret = 0;
1501
1502         mutex_lock(&sc->mutex);
1503
1504         switch (vif->type) {
1505         case NL80211_IFTYPE_STATION:
1506         case NL80211_IFTYPE_WDS:
1507         case NL80211_IFTYPE_ADHOC:
1508         case NL80211_IFTYPE_AP:
1509         case NL80211_IFTYPE_MESH_POINT:
1510                 break;
1511         default:
1512                 ath_err(common, "Interface type %d not yet supported\n",
1513                         vif->type);
1514                 ret = -EOPNOTSUPP;
1515                 goto out;
1516         }
1517
1518         if (ath9k_uses_beacons(vif->type)) {
1519                 if (sc->nbcnvifs >= ATH_BCBUF) {
1520                         ath_err(common, "Not enough beacon buffers when adding"
1521                                 " new interface of type: %i\n",
1522                                 vif->type);
1523                         ret = -ENOBUFS;
1524                         goto out;
1525                 }
1526         }
1527
1528         if ((vif->type == NL80211_IFTYPE_ADHOC) &&
1529             sc->nvifs > 0) {
1530                 ath_err(common, "Cannot create ADHOC interface when other"
1531                         " interfaces already exist.\n");
1532                 ret = -EINVAL;
1533                 goto out;
1534         }
1535
1536         ath_dbg(common, ATH_DBG_CONFIG,
1537                 "Attach a VIF of type: %d\n", vif->type);
1538
1539         /* Set the VIF opmode */
1540         avp->av_opmode = vif->type;
1541         avp->av_bslot = -1;
1542
1543         sc->nvifs++;
1544
1545         ath9k_do_vif_add_setup(hw, vif);
1546 out:
1547         mutex_unlock(&sc->mutex);
1548         return ret;
1549 }
1550
1551 static int ath9k_change_interface(struct ieee80211_hw *hw,
1552                                   struct ieee80211_vif *vif,
1553                                   enum nl80211_iftype new_type,
1554                                   bool p2p)
1555 {
1556         struct ath_softc *sc = hw->priv;
1557         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1558         int ret = 0;
1559
1560         ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1561         mutex_lock(&sc->mutex);
1562
1563         /* See if new interface type is valid. */
1564         if ((new_type == NL80211_IFTYPE_ADHOC) &&
1565             (sc->nvifs > 1)) {
1566                 ath_err(common, "When using ADHOC, it must be the only"
1567                         " interface.\n");
1568                 ret = -EINVAL;
1569                 goto out;
1570         }
1571
1572         if (ath9k_uses_beacons(new_type) &&
1573             !ath9k_uses_beacons(vif->type)) {
1574                 if (sc->nbcnvifs >= ATH_BCBUF) {
1575                         ath_err(common, "No beacon slot available\n");
1576                         ret = -ENOBUFS;
1577                         goto out;
1578                 }
1579         }
1580
1581         /* Clean up old vif stuff */
1582         if (ath9k_uses_beacons(vif->type))
1583                 ath9k_reclaim_beacon(sc, vif);
1584
1585         /* Add new settings */
1586         vif->type = new_type;
1587         vif->p2p = p2p;
1588
1589         ath9k_do_vif_add_setup(hw, vif);
1590 out:
1591         mutex_unlock(&sc->mutex);
1592         return ret;
1593 }
1594
1595 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1596                                    struct ieee80211_vif *vif)
1597 {
1598         struct ath_softc *sc = hw->priv;
1599         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1600
1601         ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1602
1603         mutex_lock(&sc->mutex);
1604
1605         sc->nvifs--;
1606
1607         /* Reclaim beacon resources */
1608         if (ath9k_uses_beacons(vif->type))
1609                 ath9k_reclaim_beacon(sc, vif);
1610
1611         ath9k_calculate_summary_state(hw, NULL);
1612
1613         mutex_unlock(&sc->mutex);
1614 }
1615
1616 static void ath9k_enable_ps(struct ath_softc *sc)
1617 {
1618         struct ath_hw *ah = sc->sc_ah;
1619
1620         sc->ps_enabled = true;
1621         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1622                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1623                         ah->imask |= ATH9K_INT_TIM_TIMER;
1624                         ath9k_hw_set_interrupts(ah, ah->imask);
1625                 }
1626                 ath9k_hw_setrxabort(ah, 1);
1627         }
1628 }
1629
1630 static void ath9k_disable_ps(struct ath_softc *sc)
1631 {
1632         struct ath_hw *ah = sc->sc_ah;
1633
1634         sc->ps_enabled = false;
1635         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1636         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1637                 ath9k_hw_setrxabort(ah, 0);
1638                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1639                                   PS_WAIT_FOR_CAB |
1640                                   PS_WAIT_FOR_PSPOLL_DATA |
1641                                   PS_WAIT_FOR_TX_ACK);
1642                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1643                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1644                         ath9k_hw_set_interrupts(ah, ah->imask);
1645                 }
1646         }
1647
1648 }
1649
1650 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1651 {
1652         struct ath_softc *sc = hw->priv;
1653         struct ath_hw *ah = sc->sc_ah;
1654         struct ath_common *common = ath9k_hw_common(ah);
1655         struct ieee80211_conf *conf = &hw->conf;
1656         bool disable_radio = false;
1657
1658         mutex_lock(&sc->mutex);
1659
1660         /*
1661          * Leave this as the first check because we need to turn on the
1662          * radio if it was disabled before prior to processing the rest
1663          * of the changes. Likewise we must only disable the radio towards
1664          * the end.
1665          */
1666         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1667                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1668                 if (!sc->ps_idle) {
1669                         ath_radio_enable(sc, hw);
1670                         ath_dbg(common, ATH_DBG_CONFIG,
1671                                 "not-idle: enabling radio\n");
1672                 } else {
1673                         disable_radio = true;
1674                 }
1675         }
1676
1677         /*
1678          * We just prepare to enable PS. We have to wait until our AP has
1679          * ACK'd our null data frame to disable RX otherwise we'll ignore
1680          * those ACKs and end up retransmitting the same null data frames.
1681          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1682          */
1683         if (changed & IEEE80211_CONF_CHANGE_PS) {
1684                 unsigned long flags;
1685                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1686                 if (conf->flags & IEEE80211_CONF_PS)
1687                         ath9k_enable_ps(sc);
1688                 else
1689                         ath9k_disable_ps(sc);
1690                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1691         }
1692
1693         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1694                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1695                         ath_dbg(common, ATH_DBG_CONFIG,
1696                                 "Monitor mode is enabled\n");
1697                         sc->sc_ah->is_monitoring = true;
1698                 } else {
1699                         ath_dbg(common, ATH_DBG_CONFIG,
1700                                 "Monitor mode is disabled\n");
1701                         sc->sc_ah->is_monitoring = false;
1702                 }
1703         }
1704
1705         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1706                 struct ieee80211_channel *curchan = hw->conf.channel;
1707                 int pos = curchan->hw_value;
1708                 int old_pos = -1;
1709                 unsigned long flags;
1710
1711                 if (ah->curchan)
1712                         old_pos = ah->curchan - &ah->channels[0];
1713
1714                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1715                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1716                 else
1717                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1718
1719                 ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1720                         curchan->center_freq);
1721
1722                 /* XXX: remove me eventualy */
1723                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1724
1725                 /* update survey stats for the old channel before switching */
1726                 spin_lock_irqsave(&common->cc_lock, flags);
1727                 ath_update_survey_stats(sc);
1728                 spin_unlock_irqrestore(&common->cc_lock, flags);
1729
1730                 /*
1731                  * If the operating channel changes, change the survey in-use flags
1732                  * along with it.
1733                  * Reset the survey data for the new channel, unless we're switching
1734                  * back to the operating channel from an off-channel operation.
1735                  */
1736                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1737                     sc->cur_survey != &sc->survey[pos]) {
1738
1739                         if (sc->cur_survey)
1740                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1741
1742                         sc->cur_survey = &sc->survey[pos];
1743
1744                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1745                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1746                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1747                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1748                 }
1749
1750                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1751                         ath_err(common, "Unable to set channel\n");
1752                         mutex_unlock(&sc->mutex);
1753                         return -EINVAL;
1754                 }
1755
1756                 /*
1757                  * The most recent snapshot of channel->noisefloor for the old
1758                  * channel is only available after the hardware reset. Copy it to
1759                  * the survey stats now.
1760                  */
1761                 if (old_pos >= 0)
1762                         ath_update_survey_nf(sc, old_pos);
1763         }
1764
1765         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1766                 sc->config.txpowlimit = 2 * conf->power_level;
1767                 ath_update_txpow(sc);
1768         }
1769
1770         if (disable_radio) {
1771                 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1772                 ath_radio_disable(sc, hw);
1773         }
1774
1775         mutex_unlock(&sc->mutex);
1776
1777         return 0;
1778 }
1779
1780 #define SUPPORTED_FILTERS                       \
1781         (FIF_PROMISC_IN_BSS |                   \
1782         FIF_ALLMULTI |                          \
1783         FIF_CONTROL |                           \
1784         FIF_PSPOLL |                            \
1785         FIF_OTHER_BSS |                         \
1786         FIF_BCN_PRBRESP_PROMISC |               \
1787         FIF_PROBE_REQ |                         \
1788         FIF_FCSFAIL)
1789
1790 /* FIXME: sc->sc_full_reset ? */
1791 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1792                                    unsigned int changed_flags,
1793                                    unsigned int *total_flags,
1794                                    u64 multicast)
1795 {
1796         struct ath_softc *sc = hw->priv;
1797         u32 rfilt;
1798
1799         changed_flags &= SUPPORTED_FILTERS;
1800         *total_flags &= SUPPORTED_FILTERS;
1801
1802         sc->rx.rxfilter = *total_flags;
1803         ath9k_ps_wakeup(sc);
1804         rfilt = ath_calcrxfilter(sc);
1805         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1806         ath9k_ps_restore(sc);
1807
1808         ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1809                 "Set HW RX filter: 0x%x\n", rfilt);
1810 }
1811
1812 static int ath9k_sta_add(struct ieee80211_hw *hw,
1813                          struct ieee80211_vif *vif,
1814                          struct ieee80211_sta *sta)
1815 {
1816         struct ath_softc *sc = hw->priv;
1817
1818         ath_node_attach(sc, sta);
1819
1820         return 0;
1821 }
1822
1823 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1824                             struct ieee80211_vif *vif,
1825                             struct ieee80211_sta *sta)
1826 {
1827         struct ath_softc *sc = hw->priv;
1828
1829         ath_node_detach(sc, sta);
1830
1831         return 0;
1832 }
1833
1834 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1835                          const struct ieee80211_tx_queue_params *params)
1836 {
1837         struct ath_softc *sc = hw->priv;
1838         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1839         struct ath_txq *txq;
1840         struct ath9k_tx_queue_info qi;
1841         int ret = 0;
1842
1843         if (queue >= WME_NUM_AC)
1844                 return 0;
1845
1846         txq = sc->tx.txq_map[queue];
1847
1848         mutex_lock(&sc->mutex);
1849
1850         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1851
1852         qi.tqi_aifs = params->aifs;
1853         qi.tqi_cwmin = params->cw_min;
1854         qi.tqi_cwmax = params->cw_max;
1855         qi.tqi_burstTime = params->txop;
1856
1857         ath_dbg(common, ATH_DBG_CONFIG,
1858                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1859                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1860                 params->cw_max, params->txop);
1861
1862         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1863         if (ret)
1864                 ath_err(common, "TXQ Update failed\n");
1865
1866         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1867                 if (queue == WME_AC_BE && !ret)
1868                         ath_beaconq_config(sc);
1869
1870         mutex_unlock(&sc->mutex);
1871
1872         return ret;
1873 }
1874
1875 static int ath9k_set_key(struct ieee80211_hw *hw,
1876                          enum set_key_cmd cmd,
1877                          struct ieee80211_vif *vif,
1878                          struct ieee80211_sta *sta,
1879                          struct ieee80211_key_conf *key)
1880 {
1881         struct ath_softc *sc = hw->priv;
1882         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1883         int ret = 0;
1884
1885         if (ath9k_modparam_nohwcrypt)
1886                 return -ENOSPC;
1887
1888         mutex_lock(&sc->mutex);
1889         ath9k_ps_wakeup(sc);
1890         ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1891
1892         switch (cmd) {
1893         case SET_KEY:
1894                 ret = ath_key_config(common, vif, sta, key);
1895                 if (ret >= 0) {
1896                         key->hw_key_idx = ret;
1897                         /* push IV and Michael MIC generation to stack */
1898                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1899                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1900                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1901                         if (sc->sc_ah->sw_mgmt_crypto &&
1902                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1903                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1904                         ret = 0;
1905                 }
1906                 break;
1907         case DISABLE_KEY:
1908                 ath_key_delete(common, key);
1909                 break;
1910         default:
1911                 ret = -EINVAL;
1912         }
1913
1914         ath9k_ps_restore(sc);
1915         mutex_unlock(&sc->mutex);
1916
1917         return ret;
1918 }
1919
1920 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1921                                    struct ieee80211_vif *vif,
1922                                    struct ieee80211_bss_conf *bss_conf,
1923                                    u32 changed)
1924 {
1925         struct ath_softc *sc = hw->priv;
1926         struct ath_hw *ah = sc->sc_ah;
1927         struct ath_common *common = ath9k_hw_common(ah);
1928         struct ath_vif *avp = (void *)vif->drv_priv;
1929         int slottime;
1930         int error;
1931
1932         mutex_lock(&sc->mutex);
1933
1934         if (changed & BSS_CHANGED_BSSID) {
1935                 /* Set BSSID */
1936                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1937                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1938                 common->curaid = 0;
1939                 ath9k_hw_write_associd(ah);
1940
1941                 /* Set aggregation protection mode parameters */
1942                 sc->config.ath_aggr_prot = 0;
1943
1944                 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
1945                         common->curbssid, common->curaid);
1946
1947                 /* need to reconfigure the beacon */
1948                 sc->sc_flags &= ~SC_OP_BEACONS ;
1949         }
1950
1951         /* Enable transmission of beacons (AP, IBSS, MESH) */
1952         if ((changed & BSS_CHANGED_BEACON) ||
1953             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1954                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1955                 error = ath_beacon_alloc(sc, vif);
1956                 if (!error)
1957                         ath_beacon_config(sc, vif);
1958         }
1959
1960         if (changed & BSS_CHANGED_ERP_SLOT) {
1961                 if (bss_conf->use_short_slot)
1962                         slottime = 9;
1963                 else
1964                         slottime = 20;
1965                 if (vif->type == NL80211_IFTYPE_AP) {
1966                         /*
1967                          * Defer update, so that connected stations can adjust
1968                          * their settings at the same time.
1969                          * See beacon.c for more details
1970                          */
1971                         sc->beacon.slottime = slottime;
1972                         sc->beacon.updateslot = UPDATE;
1973                 } else {
1974                         ah->slottime = slottime;
1975                         ath9k_hw_init_global_settings(ah);
1976                 }
1977         }
1978
1979         /* Disable transmission of beacons */
1980         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1981                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1982
1983         if (changed & BSS_CHANGED_BEACON_INT) {
1984                 sc->beacon_interval = bss_conf->beacon_int;
1985                 /*
1986                  * In case of AP mode, the HW TSF has to be reset
1987                  * when the beacon interval changes.
1988                  */
1989                 if (vif->type == NL80211_IFTYPE_AP) {
1990                         sc->sc_flags |= SC_OP_TSF_RESET;
1991                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1992                         error = ath_beacon_alloc(sc, vif);
1993                         if (!error)
1994                                 ath_beacon_config(sc, vif);
1995                 } else {
1996                         ath_beacon_config(sc, vif);
1997                 }
1998         }
1999
2000         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
2001                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
2002                         bss_conf->use_short_preamble);
2003                 if (bss_conf->use_short_preamble)
2004                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
2005                 else
2006                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
2007         }
2008
2009         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
2010                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
2011                         bss_conf->use_cts_prot);
2012                 if (bss_conf->use_cts_prot &&
2013                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
2014                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
2015                 else
2016                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
2017         }
2018
2019         if (changed & BSS_CHANGED_ASSOC) {
2020                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
2021                         bss_conf->assoc);
2022                 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
2023         }
2024
2025         mutex_unlock(&sc->mutex);
2026 }
2027
2028 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
2029 {
2030         struct ath_softc *sc = hw->priv;
2031         u64 tsf;
2032
2033         mutex_lock(&sc->mutex);
2034         ath9k_ps_wakeup(sc);
2035         tsf = ath9k_hw_gettsf64(sc->sc_ah);
2036         ath9k_ps_restore(sc);
2037         mutex_unlock(&sc->mutex);
2038
2039         return tsf;
2040 }
2041
2042 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2043 {
2044         struct ath_softc *sc = hw->priv;
2045
2046         mutex_lock(&sc->mutex);
2047         ath9k_ps_wakeup(sc);
2048         ath9k_hw_settsf64(sc->sc_ah, tsf);
2049         ath9k_ps_restore(sc);
2050         mutex_unlock(&sc->mutex);
2051 }
2052
2053 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2054 {
2055         struct ath_softc *sc = hw->priv;
2056
2057         mutex_lock(&sc->mutex);
2058
2059         ath9k_ps_wakeup(sc);
2060         ath9k_hw_reset_tsf(sc->sc_ah);
2061         ath9k_ps_restore(sc);
2062
2063         mutex_unlock(&sc->mutex);
2064 }
2065
2066 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2067                               struct ieee80211_vif *vif,
2068                               enum ieee80211_ampdu_mlme_action action,
2069                               struct ieee80211_sta *sta,
2070                               u16 tid, u16 *ssn, u8 buf_size)
2071 {
2072         struct ath_softc *sc = hw->priv;
2073         int ret = 0;
2074
2075         local_bh_disable();
2076
2077         switch (action) {
2078         case IEEE80211_AMPDU_RX_START:
2079                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2080                         ret = -ENOTSUPP;
2081                 break;
2082         case IEEE80211_AMPDU_RX_STOP:
2083                 break;
2084         case IEEE80211_AMPDU_TX_START:
2085                 if (!(sc->sc_flags & SC_OP_TXAGGR))
2086                         return -EOPNOTSUPP;
2087
2088                 ath9k_ps_wakeup(sc);
2089                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2090                 if (!ret)
2091                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2092                 ath9k_ps_restore(sc);
2093                 break;
2094         case IEEE80211_AMPDU_TX_STOP:
2095                 ath9k_ps_wakeup(sc);
2096                 ath_tx_aggr_stop(sc, sta, tid);
2097                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2098                 ath9k_ps_restore(sc);
2099                 break;
2100         case IEEE80211_AMPDU_TX_OPERATIONAL:
2101                 ath9k_ps_wakeup(sc);
2102                 ath_tx_aggr_resume(sc, sta, tid);
2103                 ath9k_ps_restore(sc);
2104                 break;
2105         default:
2106                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2107         }
2108
2109         local_bh_enable();
2110
2111         return ret;
2112 }
2113
2114 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2115                              struct survey_info *survey)
2116 {
2117         struct ath_softc *sc = hw->priv;
2118         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2119         struct ieee80211_supported_band *sband;
2120         struct ieee80211_channel *chan;
2121         unsigned long flags;
2122         int pos;
2123
2124         spin_lock_irqsave(&common->cc_lock, flags);
2125         if (idx == 0)
2126                 ath_update_survey_stats(sc);
2127
2128         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2129         if (sband && idx >= sband->n_channels) {
2130                 idx -= sband->n_channels;
2131                 sband = NULL;
2132         }
2133
2134         if (!sband)
2135                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2136
2137         if (!sband || idx >= sband->n_channels) {
2138                 spin_unlock_irqrestore(&common->cc_lock, flags);
2139                 return -ENOENT;
2140         }
2141
2142         chan = &sband->channels[idx];
2143         pos = chan->hw_value;
2144         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2145         survey->channel = chan;
2146         spin_unlock_irqrestore(&common->cc_lock, flags);
2147
2148         return 0;
2149 }
2150
2151 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2152 {
2153         struct ath_softc *sc = hw->priv;
2154         struct ath_hw *ah = sc->sc_ah;
2155
2156         mutex_lock(&sc->mutex);
2157         ah->coverage_class = coverage_class;
2158         ath9k_hw_init_global_settings(ah);
2159         mutex_unlock(&sc->mutex);
2160 }
2161
2162 struct ieee80211_ops ath9k_ops = {
2163         .tx                 = ath9k_tx,
2164         .start              = ath9k_start,
2165         .stop               = ath9k_stop,
2166         .add_interface      = ath9k_add_interface,
2167         .change_interface   = ath9k_change_interface,
2168         .remove_interface   = ath9k_remove_interface,
2169         .config             = ath9k_config,
2170         .configure_filter   = ath9k_configure_filter,
2171         .sta_add            = ath9k_sta_add,
2172         .sta_remove         = ath9k_sta_remove,
2173         .conf_tx            = ath9k_conf_tx,
2174         .bss_info_changed   = ath9k_bss_info_changed,
2175         .set_key            = ath9k_set_key,
2176         .get_tsf            = ath9k_get_tsf,
2177         .set_tsf            = ath9k_set_tsf,
2178         .reset_tsf          = ath9k_reset_tsf,
2179         .ampdu_action       = ath9k_ampdu_action,
2180         .get_survey         = ath9k_get_survey,
2181         .rfkill_poll        = ath9k_rfkill_poll_state,
2182         .set_coverage_class = ath9k_set_coverage_class,
2183 };