drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_update_txpow(struct ath_softc *sc)
  22 {
  23         struct ath_hw *ah = sc->sc_ah;
  24
  25         if (sc->curtxpow != sc->config.txpowlimit) {
  26                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
  27                 /* read back in case value is clamped */
  28                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  29         }
  30 }
  31
  32 static u8 parse_mpdudensity(u8 mpdudensity)
  33 {
  34         /*
  35          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  36          *   0 for no restriction
  37          *   1 for 1/4 us
  38          *   2 for 1/2 us
  39          *   3 for 1 us
  40          *   4 for 2 us
  41          *   5 for 4 us
  42          *   6 for 8 us
  43          *   7 for 16 us
  44          */
  45         switch (mpdudensity) {
  46         case 0:
  47                 return 0;
  48         case 1:
  49         case 2:
  50         case 3:
  51                 /* Our lower layer calculations limit our precision to
  52                    1 microsecond */
  53                 return 1;
  54         case 4:
  55                 return 2;
  56         case 5:
  57                 return 4;
  58         case 6:
  59                 return 8;
  60         case 7:
  61                 return 16;
  62         default:
  63                 return 0;
  64         }
  65 }
  66
  67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  68                                                 struct ieee80211_hw *hw)
  69 {
  70         struct ieee80211_channel *curchan = hw->conf.channel;
  71         struct ath9k_channel *channel;
  72         u8 chan_idx;
  73
  74         chan_idx = curchan->hw_value;
  75         channel = &sc->sc_ah->channels[chan_idx];
  76         ath9k_update_ichannel(sc, hw, channel);
  77         return channel;
  78 }
  79
  80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  81 {
  82         unsigned long flags;
  83         bool ret;
  84
  85         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  86         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  87         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  88
  89         return ret;
  90 }
  91
  92 void ath9k_ps_wakeup(struct ath_softc *sc)
  93 {
  94         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  95         unsigned long flags;
  96         enum ath9k_power_mode power_mode;
  97
  98         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  99         if (++sc->ps_usecount != 1)
 100                 goto unlock;
 101
 102         power_mode = sc->sc_ah->power_mode;
 103         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 104
 105         /*
 106          * While the hardware is asleep, the cycle counters contain no
 107          * useful data. Better clear them now so that they don't mess up
 108          * survey data results.
 109          */
 110         if (power_mode != ATH9K_PM_AWAKE) {
 111                 spin_lock(&common->cc_lock);
 112                 ath_hw_cycle_counters_update(common);
 113                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 114                 spin_unlock(&common->cc_lock);
 115         }
 116
 117  unlock:
 118         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 119 }
 120
 121 void ath9k_ps_restore(struct ath_softc *sc)
 122 {
 123         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 124         unsigned long flags;
 125
 126         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 127         if (--sc->ps_usecount != 0)
 128                 goto unlock;
 129
 130         spin_lock(&common->cc_lock);
 131         ath_hw_cycle_counters_update(common);
 132         spin_unlock(&common->cc_lock);
 133
 134         if (sc->ps_idle)
 135                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 136         else if (sc->ps_enabled &&
 137                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 138                               PS_WAIT_FOR_CAB |
 139                               PS_WAIT_FOR_PSPOLL_DATA |
 140                               PS_WAIT_FOR_TX_ACK)))
 141                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 142
 143  unlock:
 144         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 145 }
 146
 147 static void ath_start_ani(struct ath_common *common)
 148 {
 149         struct ath_hw *ah = common->ah;
 150         unsigned long timestamp = jiffies_to_msecs(jiffies);
 151         struct ath_softc *sc = (struct ath_softc *) common->priv;
 152
 153         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 154                 return;
 155
 156         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 157                 return;
 158
 159         common->ani.longcal_timer = timestamp;
 160         common->ani.shortcal_timer = timestamp;
 161         common->ani.checkani_timer = timestamp;
 162
 163         mod_timer(&common->ani.timer,
 164                   jiffies +
 165                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 166 }
 167
 168 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 169 {
 170         struct ath_hw *ah = sc->sc_ah;
 171         struct ath9k_channel *chan = &ah->channels[channel];
 172         struct survey_info *survey = &sc->survey[channel];
 173
 174         if (chan->noisefloor) {
 175                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 176                 survey->noise = chan->noisefloor;
 177         }
 178 }
 179
 180 static void ath_update_survey_stats(struct ath_softc *sc)
 181 {
 182         struct ath_hw *ah = sc->sc_ah;
 183         struct ath_common *common = ath9k_hw_common(ah);
 184         int pos = ah->curchan - &ah->channels[0];
 185         struct survey_info *survey = &sc->survey[pos];
 186         struct ath_cycle_counters *cc = &common->cc_survey;
 187         unsigned int div = common->clockrate * 1000;
 188
 189         if (!ah->curchan)
 190                 return;
 191
 192         if (ah->power_mode == ATH9K_PM_AWAKE)
 193                 ath_hw_cycle_counters_update(common);
 194
 195         if (cc->cycles > 0) {
 196                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 197                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 198                         SURVEY_INFO_CHANNEL_TIME_RX |
 199                         SURVEY_INFO_CHANNEL_TIME_TX;
 200                 survey->channel_time += cc->cycles / div;
 201                 survey->channel_time_busy += cc->rx_busy / div;
 202                 survey->channel_time_rx += cc->rx_frame / div;
 203                 survey->channel_time_tx += cc->tx_frame / div;
 204         }
 205         memset(cc, 0, sizeof(*cc));
 206
 207         ath_update_survey_nf(sc, pos);
 208 }
 209
 210 /*
 211  * Set/change channels.  If the channel is really being changed, it's done
 212  * by reseting the chip.  To accomplish this we must first cleanup any pending
 213  * DMA, then restart stuff.
 214 */
 215 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 216                     struct ath9k_channel *hchan)
 217 {
 218         struct ath_wiphy *aphy = hw->priv;
 219         struct ath_hw *ah = sc->sc_ah;
 220         struct ath_common *common = ath9k_hw_common(ah);
 221         struct ieee80211_conf *conf = &common->hw->conf;
 222         bool fastcc = true, stopped;
 223         struct ieee80211_channel *channel = hw->conf.channel;
 224         struct ath9k_hw_cal_data *caldata = NULL;
 225         int r;
 226
 227         if (sc->sc_flags & SC_OP_INVALID)
 228                 return -EIO;
 229
 230         del_timer_sync(&common->ani.timer);
 231         cancel_work_sync(&sc->paprd_work);
 232         cancel_work_sync(&sc->hw_check_work);
 233         cancel_delayed_work_sync(&sc->tx_complete_work);
 234
 235         ath9k_ps_wakeup(sc);
 236
 237         spin_lock_bh(&sc->sc_pcu_lock);
 238
 239         /*
 240          * This is only performed if the channel settings have
 241          * actually changed.
 242          *
 243          * To switch channels clear any pending DMA operations;
 244          * wait long enough for the RX fifo to drain, reset the
 245          * hardware at the new frequency, and then re-enable
 246          * the relevant bits of the h/w.
 247          */
 248         ath9k_hw_disable_interrupts(ah);
 249         stopped = ath_drain_all_txq(sc, false);
 250
 251         if (!ath_stoprecv(sc))
 252                 stopped = false;
 253
 254         if (!ath9k_hw_check_alive(ah))
 255                 stopped = false;
 256
 257         /* XXX: do not flush receive queue here. We don't want
 258          * to flush data frames already in queue because of
 259          * changing channel. */
 260
 261         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 262                 fastcc = false;
 263
 264         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 265                 caldata = &aphy->caldata;
 266
 267         ath_dbg(common, ATH_DBG_CONFIG,
 268                 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 269                 sc->sc_ah->curchan->channel,
 270                 channel->center_freq, conf_is_ht40(conf),
 271                 fastcc);
 272
 273         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 274         if (r) {
 275                 ath_err(common,
 276                         "Unable to reset channel (%u MHz), reset status %d\n",
 277                         channel->center_freq, r);
 278                 goto ps_restore;
 279         }
 280
 281         if (ath_startrecv(sc) != 0) {
 282                 ath_err(common, "Unable to restart recv logic\n");
 283                 r = -EIO;
 284                 goto ps_restore;
 285         }
 286
 287         ath_update_txpow(sc);
 288         ath9k_hw_set_interrupts(ah, ah->imask);
 289
 290         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 291                 if (sc->sc_flags & SC_OP_BEACONS)
 292                         ath_beacon_config(sc, NULL);
 293                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 294                 ath_start_ani(common);
 295         }
 296
 297  ps_restore:
 298         ieee80211_wake_queues(hw);
 299
 300         spin_unlock_bh(&sc->sc_pcu_lock);
 301
 302         ath9k_ps_restore(sc);
 303         return r;
 304 }
 305
 306 static void ath_paprd_activate(struct ath_softc *sc)
 307 {
 308         struct ath_hw *ah = sc->sc_ah;
 309         struct ath9k_hw_cal_data *caldata = ah->caldata;
 310         struct ath_common *common = ath9k_hw_common(ah);
 311         int chain;
 312
 313         if (!caldata || !caldata->paprd_done)
 314                 return;
 315
 316         ath9k_ps_wakeup(sc);
 317         ar9003_paprd_enable(ah, false);
 318         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 319                 if (!(common->tx_chainmask & BIT(chain)))
 320                         continue;
 321
 322                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 323         }
 324
 325         ar9003_paprd_enable(ah, true);
 326         ath9k_ps_restore(sc);
 327 }
 328
 329 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
 330 {
 331         struct ieee80211_hw *hw = sc->hw;
 332         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
 333         struct ath_tx_control txctl;
 334         int time_left;
 335
 336         memset(&txctl, 0, sizeof(txctl));
 337         txctl.txq = sc->tx.txq_map[WME_AC_BE];
 338
 339         memset(tx_info, 0, sizeof(*tx_info));
 340         tx_info->band = hw->conf.channel->band;
 341         tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
 342         tx_info->control.rates[0].idx = 0;
 343         tx_info->control.rates[0].count = 1;
 344         tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
 345         tx_info->control.rates[1].idx = -1;
 346
 347         init_completion(&sc->paprd_complete);
 348         sc->paprd_pending = true;
 349         txctl.paprd = BIT(chain);
 350         if (ath_tx_start(hw, skb, &txctl) != 0)
 351                 return false;
 352
 353         time_left = wait_for_completion_timeout(&sc->paprd_complete,
 354                         msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 355         sc->paprd_pending = false;
 356
 357         if (!time_left)
 358                 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
 359                         "Timeout waiting for paprd training on TX chain %d\n",
 360                         chain);
 361
 362         return !!time_left;
 363 }
 364
 365 void ath_paprd_calibrate(struct work_struct *work)
 366 {
 367         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 368         struct ieee80211_hw *hw = sc->hw;
 369         struct ath_hw *ah = sc->sc_ah;
 370         struct ieee80211_hdr *hdr;
 371         struct sk_buff *skb = NULL;
 372         struct ath9k_hw_cal_data *caldata = ah->caldata;
 373         struct ath_common *common = ath9k_hw_common(ah);
 374         int ftype;
 375         int chain_ok = 0;
 376         int chain;
 377         int len = 1800;
 378
 379         if (!caldata)
 380                 return;
 381
 382         if (ar9003_paprd_init_table(ah) < 0)
 383                 return;
 384
 385         skb = alloc_skb(len, GFP_KERNEL);
 386         if (!skb)
 387                 return;
 388
 389         skb_put(skb, len);
 390         memset(skb->data, 0, len);
 391         hdr = (struct ieee80211_hdr *)skb->data;
 392         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 393         hdr->frame_control = cpu_to_le16(ftype);
 394         hdr->duration_id = cpu_to_le16(10);
 395         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 396         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 397         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 398
 399         ath9k_ps_wakeup(sc);
 400         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 401                 if (!(common->tx_chainmask & BIT(chain)))
 402                         continue;
 403
 404                 chain_ok = 0;
 405
 406                 ath_dbg(common, ATH_DBG_CALIBRATE,
 407                         "Sending PAPRD frame for thermal measurement "
 408                         "on chain %d\n", chain);
 409                 if (!ath_paprd_send_frame(sc, skb, chain))
 410                         goto fail_paprd;
 411
 412                 ar9003_paprd_setup_gain_table(ah, chain);
 413
 414                 ath_dbg(common, ATH_DBG_CALIBRATE,
 415                         "Sending PAPRD training frame on chain %d\n", chain);
 416                 if (!ath_paprd_send_frame(sc, skb, chain))
 417                         goto fail_paprd;
 418
 419                 if (!ar9003_paprd_is_done(ah))
 420                         break;
 421
 422                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
 423                         break;
 424
 425                 chain_ok = 1;
 426         }
 427         kfree_skb(skb);
 428
 429         if (chain_ok) {
 430                 caldata->paprd_done = true;
 431                 ath_paprd_activate(sc);
 432         }
 433
 434 fail_paprd:
 435         ath9k_ps_restore(sc);
 436 }
 437
 438 /*
 439  *  This routine performs the periodic noise floor calibration function
 440  *  that is used to adjust and optimize the chip performance.  This
 441  *  takes environmental changes (location, temperature) into account.
 442  *  When the task is complete, it reschedules itself depending on the
 443  *  appropriate interval that was calculated.
 444  */
 445 void ath_ani_calibrate(unsigned long data)
 446 {
 447         struct ath_softc *sc = (struct ath_softc *)data;
 448         struct ath_hw *ah = sc->sc_ah;
 449         struct ath_common *common = ath9k_hw_common(ah);
 450         bool longcal = false;
 451         bool shortcal = false;
 452         bool aniflag = false;
 453         unsigned int timestamp = jiffies_to_msecs(jiffies);
 454         u32 cal_interval, short_cal_interval, long_cal_interval;
 455         unsigned long flags;
 456
 457         if (ah->caldata && ah->caldata->nfcal_interference)
 458                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 459         else
 460                 long_cal_interval = ATH_LONG_CALINTERVAL;
 461
 462         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 463                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 464
 465         /* Only calibrate if awake */
 466         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 467                 goto set_timer;
 468
 469         ath9k_ps_wakeup(sc);
 470
 471         /* Long calibration runs independently of short calibration. */
 472         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 473                 longcal = true;
 474                 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 475                 common->ani.longcal_timer = timestamp;
 476         }
 477
 478         /* Short calibration applies only while caldone is false */
 479         if (!common->ani.caldone) {
 480                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 481                         shortcal = true;
 482                         ath_dbg(common, ATH_DBG_ANI,
 483                                 "shortcal @%lu\n", jiffies);
 484                         common->ani.shortcal_timer = timestamp;
 485                         common->ani.resetcal_timer = timestamp;
 486                 }
 487         } else {
 488                 if ((timestamp - common->ani.resetcal_timer) >=
 489                     ATH_RESTART_CALINTERVAL) {
 490                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 491                         if (common->ani.caldone)
 492                                 common->ani.resetcal_timer = timestamp;
 493                 }
 494         }
 495
 496         /* Verify whether we must check ANI */
 497         if ((timestamp - common->ani.checkani_timer) >=
 498              ah->config.ani_poll_interval) {
 499                 aniflag = true;
 500                 common->ani.checkani_timer = timestamp;
 501         }
 502
 503         /* Skip all processing if there's nothing to do. */
 504         if (longcal || shortcal || aniflag) {
 505                 /* Call ANI routine if necessary */
 506                 if (aniflag) {
 507                         spin_lock_irqsave(&common->cc_lock, flags);
 508                         ath9k_hw_ani_monitor(ah, ah->curchan);
 509                         ath_update_survey_stats(sc);
 510                         spin_unlock_irqrestore(&common->cc_lock, flags);
 511                 }
 512
 513                 /* Perform calibration if necessary */
 514                 if (longcal || shortcal) {
 515                         common->ani.caldone =
 516                                 ath9k_hw_calibrate(ah,
 517                                                    ah->curchan,
 518                                                    common->rx_chainmask,
 519                                                    longcal);
 520                 }
 521         }
 522
 523         ath9k_ps_restore(sc);
 524
 525 set_timer:
 526         /*
 527         * Set timer interval based on previous results.
 528         * The interval must be the shortest necessary to satisfy ANI,
 529         * short calibration and long calibration.
 530         */
 531         cal_interval = ATH_LONG_CALINTERVAL;
 532         if (sc->sc_ah->config.enable_ani)
 533                 cal_interval = min(cal_interval,
 534                                    (u32)ah->config.ani_poll_interval);
 535         if (!common->ani.caldone)
 536                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 537
 538         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 539         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 540                 if (!ah->caldata->paprd_done)
 541                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 542                 else if (!ah->paprd_table_write_done)
 543                         ath_paprd_activate(sc);
 544         }
 545 }
 546
 547 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 548 {
 549         struct ath_node *an;
 550         struct ath_hw *ah = sc->sc_ah;
 551         an = (struct ath_node *)sta->drv_priv;
 552
 553 #ifdef CONFIG_ATH9K_DEBUGFS
 554         spin_lock(&sc->nodes_lock);
 555         list_add(&an->list, &sc->nodes);
 556         spin_unlock(&sc->nodes_lock);
 557         an->sta = sta;
 558 #endif
 559         if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
 560                 sc->sc_flags |= SC_OP_ENABLE_APM;
 561
 562         if (sc->sc_flags & SC_OP_TXAGGR) {
 563                 ath_tx_node_init(sc, an);
 564                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 565                                      sta->ht_cap.ampdu_factor);
 566                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 567         }
 568 }
 569
 570 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 571 {
 572         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 573
 574 #ifdef CONFIG_ATH9K_DEBUGFS
 575         spin_lock(&sc->nodes_lock);
 576         list_del(&an->list);
 577         spin_unlock(&sc->nodes_lock);
 578         an->sta = NULL;
 579 #endif
 580
 581         if (sc->sc_flags & SC_OP_TXAGGR)
 582                 ath_tx_node_cleanup(sc, an);
 583 }
 584
 585 void ath_hw_check(struct work_struct *work)
 586 {
 587         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 588         int i;
 589
 590         ath9k_ps_wakeup(sc);
 591
 592         for (i = 0; i < 3; i++) {
 593                 if (ath9k_hw_check_alive(sc->sc_ah))
 594                         goto out;
 595
 596                 msleep(1);
 597         }
 598         ath_reset(sc, true);
 599
 600 out:
 601         ath9k_ps_restore(sc);
 602 }
 603
 604 void ath9k_tasklet(unsigned long data)
 605 {
 606         struct ath_softc *sc = (struct ath_softc *)data;
 607         struct ath_hw *ah = sc->sc_ah;
 608         struct ath_common *common = ath9k_hw_common(ah);
 609
 610         u32 status = sc->intrstatus;
 611         u32 rxmask;
 612
 613         ath9k_ps_wakeup(sc);
 614
 615         if (status & ATH9K_INT_FATAL) {
 616                 ath_reset(sc, true);
 617                 ath9k_ps_restore(sc);
 618                 return;
 619         }
 620
 621         spin_lock(&sc->sc_pcu_lock);
 622
 623         /*
 624          * Only run the baseband hang check if beacons stop working in AP or
 625          * IBSS mode, because it has a high false positive rate. For station
 626          * mode it should not be necessary, since the upper layers will detect
 627          * this through a beacon miss automatically and the following channel
 628          * change will trigger a hardware reset anyway
 629          */
 630         if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
 631             !ath9k_hw_check_alive(ah))
 632                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 633
 634         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 635                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 636                           ATH9K_INT_RXORN);
 637         else
 638                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 639
 640         if (status & rxmask) {
 641                 /* Check for high priority Rx first */
 642                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 643                     (status & ATH9K_INT_RXHP))
 644                         ath_rx_tasklet(sc, 0, true);
 645
 646                 ath_rx_tasklet(sc, 0, false);
 647         }
 648
 649         if (status & ATH9K_INT_TX) {
 650                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 651                         ath_tx_edma_tasklet(sc);
 652                 else
 653                         ath_tx_tasklet(sc);
 654         }
 655
 656         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 657                 /*
 658                  * TSF sync does not look correct; remain awake to sync with
 659                  * the next Beacon.
 660                  */
 661                 ath_dbg(common, ATH_DBG_PS,
 662                         "TSFOOR - Sync with next Beacon\n");
 663                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 664         }
 665
 666         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 667                 if (status & ATH9K_INT_GENTIMER)
 668                         ath_gen_timer_isr(sc->sc_ah);
 669
 670         /* re-enable hardware interrupt */
 671         ath9k_hw_enable_interrupts(ah);
 672
 673         spin_unlock(&sc->sc_pcu_lock);
 674         ath9k_ps_restore(sc);
 675 }
 676
 677 irqreturn_t ath_isr(int irq, void *dev)
 678 {
 679 #define SCHED_INTR (                            \
 680                 ATH9K_INT_FATAL |               \
 681                 ATH9K_INT_RXORN |               \
 682                 ATH9K_INT_RXEOL |               \
 683                 ATH9K_INT_RX |                  \
 684                 ATH9K_INT_RXLP |                \
 685                 ATH9K_INT_RXHP |                \
 686                 ATH9K_INT_TX |                  \
 687                 ATH9K_INT_BMISS |               \
 688                 ATH9K_INT_CST |                 \
 689                 ATH9K_INT_TSFOOR |              \
 690                 ATH9K_INT_GENTIMER)
 691
 692         struct ath_softc *sc = dev;
 693         struct ath_hw *ah = sc->sc_ah;
 694         struct ath_common *common = ath9k_hw_common(ah);
 695         enum ath9k_int status;
 696         bool sched = false;
 697
 698         /*
 699          * The hardware is not ready/present, don't
 700          * touch anything. Note this can happen early
 701          * on if the IRQ is shared.
 702          */
 703         if (sc->sc_flags & SC_OP_INVALID)
 704                 return IRQ_NONE;
 705
 706
 707         /* shared irq, not for us */
 708
 709         if (!ath9k_hw_intrpend(ah))
 710                 return IRQ_NONE;
 711
 712         /*
 713          * Figure out the reason(s) for the interrupt.  Note
 714          * that the hal returns a pseudo-ISR that may include
 715          * bits we haven't explicitly enabled so we mask the
 716          * value to insure we only process bits we requested.
 717          */
 718         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 719         status &= ah->imask;    /* discard unasked-for bits */
 720
 721         /*
 722          * If there are no status bits set, then this interrupt was not
 723          * for me (should have been caught above).
 724          */
 725         if (!status)
 726                 return IRQ_NONE;
 727
 728         /* Cache the status */
 729         sc->intrstatus = status;
 730
 731         if (status & SCHED_INTR)
 732                 sched = true;
 733
 734         /*
 735          * If a FATAL or RXORN interrupt is received, we have to reset the
 736          * chip immediately.
 737          */
 738         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 739             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 740                 goto chip_reset;
 741
 742         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 743             (status & ATH9K_INT_BB_WATCHDOG)) {
 744
 745                 spin_lock(&common->cc_lock);
 746                 ath_hw_cycle_counters_update(common);
 747                 ar9003_hw_bb_watchdog_dbg_info(ah);
 748                 spin_unlock(&common->cc_lock);
 749
 750                 goto chip_reset;
 751         }
 752
 753         if (status & ATH9K_INT_SWBA)
 754                 tasklet_schedule(&sc->bcon_tasklet);
 755
 756         if (status & ATH9K_INT_TXURN)
 757                 ath9k_hw_updatetxtriglevel(ah, true);
 758
 759         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 760                 if (status & ATH9K_INT_RXEOL) {
 761                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 762                         ath9k_hw_set_interrupts(ah, ah->imask);
 763                 }
 764         }
 765
 766         if (status & ATH9K_INT_MIB) {
 767                 /*
 768                  * Disable interrupts until we service the MIB
 769                  * interrupt; otherwise it will continue to
 770                  * fire.
 771                  */
 772                 ath9k_hw_disable_interrupts(ah);
 773                 /*
 774                  * Let the hal handle the event. We assume
 775                  * it will clear whatever condition caused
 776                  * the interrupt.
 777                  */
 778                 spin_lock(&common->cc_lock);
 779                 ath9k_hw_proc_mib_event(ah);
 780                 spin_unlock(&common->cc_lock);
 781                 ath9k_hw_enable_interrupts(ah);
 782         }
 783
 784         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 785                 if (status & ATH9K_INT_TIM_TIMER) {
 786                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 787                                 goto chip_reset;
 788                         /* Clear RxAbort bit so that we can
 789                          * receive frames */
 790                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 791                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 792                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 793                 }
 794
 795 chip_reset:
 796
 797         ath_debug_stat_interrupt(sc, status);
 798
 799         if (sched) {
 800                 /* turn off every interrupt */
 801                 ath9k_hw_disable_interrupts(ah);
 802                 tasklet_schedule(&sc->intr_tq);
 803         }
 804
 805         return IRQ_HANDLED;
 806
 807 #undef SCHED_INTR
 808 }
 809
 810 static u32 ath_get_extchanmode(struct ath_softc *sc,
 811                                struct ieee80211_channel *chan,
 812                                enum nl80211_channel_type channel_type)
 813 {
 814         u32 chanmode = 0;
 815
 816         switch (chan->band) {
 817         case IEEE80211_BAND_2GHZ:
 818                 switch(channel_type) {
 819                 case NL80211_CHAN_NO_HT:
 820                 case NL80211_CHAN_HT20:
 821                         chanmode = CHANNEL_G_HT20;
 822                         break;
 823                 case NL80211_CHAN_HT40PLUS:
 824                         chanmode = CHANNEL_G_HT40PLUS;
 825                         break;
 826                 case NL80211_CHAN_HT40MINUS:
 827                         chanmode = CHANNEL_G_HT40MINUS;
 828                         break;
 829                 }
 830                 break;
 831         case IEEE80211_BAND_5GHZ:
 832                 switch(channel_type) {
 833                 case NL80211_CHAN_NO_HT:
 834                 case NL80211_CHAN_HT20:
 835                         chanmode = CHANNEL_A_HT20;
 836                         break;
 837                 case NL80211_CHAN_HT40PLUS:
 838                         chanmode = CHANNEL_A_HT40PLUS;
 839                         break;
 840                 case NL80211_CHAN_HT40MINUS:
 841                         chanmode = CHANNEL_A_HT40MINUS;
 842                         break;
 843                 }
 844                 break;
 845         default:
 846                 break;
 847         }
 848
 849         return chanmode;
 850 }
 851
 852 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 853                                  struct ieee80211_hw *hw,
 854                                  struct ieee80211_vif *vif,
 855                                  struct ieee80211_bss_conf *bss_conf)
 856 {
 857         struct ath_wiphy *aphy = hw->priv;
 858         struct ath_hw *ah = sc->sc_ah;
 859         struct ath_common *common = ath9k_hw_common(ah);
 860
 861         if (bss_conf->assoc) {
 862                 ath_dbg(common, ATH_DBG_CONFIG,
 863                         "Bss Info ASSOC %d, bssid: %pM\n",
 864                         bss_conf->aid, common->curbssid);
 865
 866                 /* New association, store aid */
 867                 common->curaid = bss_conf->aid;
 868                 ath9k_hw_write_associd(ah);
 869
 870                 /*
 871                  * Request a re-configuration of Beacon related timers
 872                  * on the receipt of the first Beacon frame (i.e.,
 873                  * after time sync with the AP).
 874                  */
 875                 sc->ps_flags |= PS_BEACON_SYNC;
 876
 877                 /* Configure the beacon */
 878                 ath_beacon_config(sc, vif);
 879
 880                 /* Reset rssi stats */
 881                 aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
 882                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 883
 884                 sc->sc_flags |= SC_OP_ANI_RUN;
 885                 ath_start_ani(common);
 886         } else {
 887                 ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 888                 common->curaid = 0;
 889                 /* Stop ANI */
 890                 sc->sc_flags &= ~SC_OP_ANI_RUN;
 891                 del_timer_sync(&common->ani.timer);
 892         }
 893 }
 894
 895 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 896 {
 897         struct ath_hw *ah = sc->sc_ah;
 898         struct ath_common *common = ath9k_hw_common(ah);
 899         struct ieee80211_channel *channel = hw->conf.channel;
 900         int r;
 901
 902         ath9k_ps_wakeup(sc);
 903         spin_lock_bh(&sc->sc_pcu_lock);
 904
 905         ath9k_hw_configpcipowersave(ah, 0, 0);
 906
 907         if (!ah->curchan)
 908                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 909
 910         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 911         if (r) {
 912                 ath_err(common,
 913                         "Unable to reset channel (%u MHz), reset status %d\n",
 914                         channel->center_freq, r);
 915         }
 916
 917         ath_update_txpow(sc);
 918         if (ath_startrecv(sc) != 0) {
 919                 ath_err(common, "Unable to restart recv logic\n");
 920                 goto out;
 921         }
 922         if (sc->sc_flags & SC_OP_BEACONS)
 923                 ath_beacon_config(sc, NULL);    /* restart beacons */
 924
 925         /* Re-Enable  interrupts */
 926         ath9k_hw_set_interrupts(ah, ah->imask);
 927
 928         /* Enable LED */
 929         ath9k_hw_cfg_output(ah, ah->led_pin,
 930                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 931         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 932
 933         ieee80211_wake_queues(hw);
 934 out:
 935         spin_unlock_bh(&sc->sc_pcu_lock);
 936
 937         ath9k_ps_restore(sc);
 938 }
 939
 940 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 941 {
 942         struct ath_hw *ah = sc->sc_ah;
 943         struct ieee80211_channel *channel = hw->conf.channel;
 944         int r;
 945
 946         ath9k_ps_wakeup(sc);
 947         spin_lock_bh(&sc->sc_pcu_lock);
 948
 949         ieee80211_stop_queues(hw);
 950
 951         /*
 952          * Keep the LED on when the radio is disabled
 953          * during idle unassociated state.
 954          */
 955         if (!sc->ps_idle) {
 956                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 957                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 958         }
 959
 960         /* Disable interrupts */
 961         ath9k_hw_disable_interrupts(ah);
 962
 963         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 964
 965         ath_stoprecv(sc);               /* turn off frame recv */
 966         ath_flushrecv(sc);              /* flush recv queue */
 967
 968         if (!ah->curchan)
 969                 ah->curchan = ath_get_curchannel(sc, hw);
 970
 971         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 972         if (r) {
 973                 ath_err(ath9k_hw_common(sc->sc_ah),
 974                         "Unable to reset channel (%u MHz), reset status %d\n",
 975                         channel->center_freq, r);
 976         }
 977
 978         ath9k_hw_phy_disable(ah);
 979
 980         ath9k_hw_configpcipowersave(ah, 1, 1);
 981
 982         spin_unlock_bh(&sc->sc_pcu_lock);
 983         ath9k_ps_restore(sc);
 984
 985         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 986 }
 987
 988 int ath_reset(struct ath_softc *sc, bool retry_tx)
 989 {
 990         struct ath_hw *ah = sc->sc_ah;
 991         struct ath_common *common = ath9k_hw_common(ah);
 992         struct ieee80211_hw *hw = sc->hw;
 993         int r;
 994
 995         /* Stop ANI */
 996         del_timer_sync(&common->ani.timer);
 997
 998         spin_lock_bh(&sc->sc_pcu_lock);
 999
1000         ieee80211_stop_queues(hw);
1001
1002         ath9k_hw_disable_interrupts(ah);
1003         ath_drain_all_txq(sc, retry_tx);
1004
1005         ath_stoprecv(sc);
1006         ath_flushrecv(sc);
1007
1008         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
1009         if (r)
1010                 ath_err(common,
1011                         "Unable to reset hardware; reset status %d\n", r);
1012
1013         if (ath_startrecv(sc) != 0)
1014                 ath_err(common, "Unable to start recv logic\n");
1015
1016         /*
1017          * We may be doing a reset in response to a request
1018          * that changes the channel so update any state that
1019          * might change as a result.
1020          */
1021         ath_update_txpow(sc);
1022
1023         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1024                 ath_beacon_config(sc, NULL);    /* restart beacons */
1025
1026         ath9k_hw_set_interrupts(ah, ah->imask);
1027
1028         if (retry_tx) {
1029                 int i;
1030                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1031                         if (ATH_TXQ_SETUP(sc, i)) {
1032                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1033                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1034                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1035                         }
1036                 }
1037         }
1038
1039         ieee80211_wake_queues(hw);
1040         spin_unlock_bh(&sc->sc_pcu_lock);
1041
1042         /* Start ANI */
1043         ath_start_ani(common);
1044
1045         return r;
1046 }
1047
1048 /* XXX: Remove me once we don't depend on ath9k_channel for all
1049  * this redundant data */
1050 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1051                            struct ath9k_channel *ichan)
1052 {
1053         struct ieee80211_channel *chan = hw->conf.channel;
1054         struct ieee80211_conf *conf = &hw->conf;
1055
1056         ichan->channel = chan->center_freq;
1057         ichan->chan = chan;
1058
1059         if (chan->band == IEEE80211_BAND_2GHZ) {
1060                 ichan->chanmode = CHANNEL_G;
1061                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1062         } else {
1063                 ichan->chanmode = CHANNEL_A;
1064                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1065         }
1066
1067         if (conf_is_ht(conf))
1068                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1069                                             conf->channel_type);
1070 }
1071
1072 /**********************/
1073 /* mac80211 callbacks */
1074 /**********************/
1075
1076 static int ath9k_start(struct ieee80211_hw *hw)
1077 {
1078         struct ath_wiphy *aphy = hw->priv;
1079         struct ath_softc *sc = aphy->sc;
1080         struct ath_hw *ah = sc->sc_ah;
1081         struct ath_common *common = ath9k_hw_common(ah);
1082         struct ieee80211_channel *curchan = hw->conf.channel;
1083         struct ath9k_channel *init_channel;
1084         int r;
1085
1086         ath_dbg(common, ATH_DBG_CONFIG,
1087                 "Starting driver with initial channel: %d MHz\n",
1088                 curchan->center_freq);
1089
1090         mutex_lock(&sc->mutex);
1091
1092         /* setup initial channel */
1093         sc->chan_idx = curchan->hw_value;
1094
1095         init_channel = ath_get_curchannel(sc, hw);
1096
1097         /* Reset SERDES registers */
1098         ath9k_hw_configpcipowersave(ah, 0, 0);
1099
1100         /*
1101          * The basic interface to setting the hardware in a good
1102          * state is ``reset''.  On return the hardware is known to
1103          * be powered up and with interrupts disabled.  This must
1104          * be followed by initialization of the appropriate bits
1105          * and then setup of the interrupt mask.
1106          */
1107         spin_lock_bh(&sc->sc_pcu_lock);
1108         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1109         if (r) {
1110                 ath_err(common,
1111                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1112                         r, curchan->center_freq);
1113                 spin_unlock_bh(&sc->sc_pcu_lock);
1114                 goto mutex_unlock;
1115         }
1116
1117         /*
1118          * This is needed only to setup initial state
1119          * but it's best done after a reset.
1120          */
1121         ath_update_txpow(sc);
1122
1123         /*
1124          * Setup the hardware after reset:
1125          * The receive engine is set going.
1126          * Frame transmit is handled entirely
1127          * in the frame output path; there's nothing to do
1128          * here except setup the interrupt mask.
1129          */
1130         if (ath_startrecv(sc) != 0) {
1131                 ath_err(common, "Unable to start recv logic\n");
1132                 r = -EIO;
1133                 spin_unlock_bh(&sc->sc_pcu_lock);
1134                 goto mutex_unlock;
1135         }
1136         spin_unlock_bh(&sc->sc_pcu_lock);
1137
1138         /* Setup our intr mask. */
1139         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1140                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1141                     ATH9K_INT_GLOBAL;
1142
1143         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1144                 ah->imask |= ATH9K_INT_RXHP |
1145                              ATH9K_INT_RXLP |
1146                              ATH9K_INT_BB_WATCHDOG;
1147         else
1148                 ah->imask |= ATH9K_INT_RX;
1149
1150         ah->imask |= ATH9K_INT_GTT;
1151
1152         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1153                 ah->imask |= ATH9K_INT_CST;
1154
1155         sc->sc_flags &= ~SC_OP_INVALID;
1156         sc->sc_ah->is_monitoring = false;
1157
1158         /* Disable BMISS interrupt when we're not associated */
1159         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1160         ath9k_hw_set_interrupts(ah, ah->imask);
1161
1162         ieee80211_wake_queues(hw);
1163
1164         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1165
1166         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1167             !ah->btcoex_hw.enabled) {
1168                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1169                                            AR_STOMP_LOW_WLAN_WGHT);
1170                 ath9k_hw_btcoex_enable(ah);
1171
1172                 if (common->bus_ops->bt_coex_prep)
1173                         common->bus_ops->bt_coex_prep(common);
1174                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1175                         ath9k_btcoex_timer_resume(sc);
1176         }
1177
1178         /* User has the option to provide pm-qos value as a module
1179          * parameter rather than using the default value of
1180          * 'ATH9K_PM_QOS_DEFAULT_VALUE'.
1181          */
1182         pm_qos_update_request(&sc->pm_qos_req, ath9k_pm_qos_value);
1183
1184         if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1185                 common->bus_ops->extn_synch_en(common);
1186
1187 mutex_unlock:
1188         mutex_unlock(&sc->mutex);
1189
1190         return r;
1191 }
1192
1193 static int ath9k_tx(struct ieee80211_hw *hw,
1194                     struct sk_buff *skb)
1195 {
1196         struct ath_wiphy *aphy = hw->priv;
1197         struct ath_softc *sc = aphy->sc;
1198         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1199         struct ath_tx_control txctl;
1200         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1201
1202         if (sc->ps_enabled) {
1203                 /*
1204                  * mac80211 does not set PM field for normal data frames, so we
1205                  * need to update that based on the current PS mode.
1206                  */
1207                 if (ieee80211_is_data(hdr->frame_control) &&
1208                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1209                     !ieee80211_has_pm(hdr->frame_control)) {
1210                         ath_dbg(common, ATH_DBG_PS,
1211                                 "Add PM=1 for a TX frame while in PS mode\n");
1212                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1213                 }
1214         }
1215
1216         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1217                 /*
1218                  * We are using PS-Poll and mac80211 can request TX while in
1219                  * power save mode. Need to wake up hardware for the TX to be
1220                  * completed and if needed, also for RX of buffered frames.
1221                  */
1222                 ath9k_ps_wakeup(sc);
1223                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1224                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1225                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1226                         ath_dbg(common, ATH_DBG_PS,
1227                                 "Sending PS-Poll to pick a buffered frame\n");
1228                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1229                 } else {
1230                         ath_dbg(common, ATH_DBG_PS,
1231                                 "Wake up to complete TX\n");
1232                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1233                 }
1234                 /*
1235                  * The actual restore operation will happen only after
1236                  * the sc_flags bit is cleared. We are just dropping
1237                  * the ps_usecount here.
1238                  */
1239                 ath9k_ps_restore(sc);
1240         }
1241
1242         memset(&txctl, 0, sizeof(struct ath_tx_control));
1243         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1244
1245         ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1246
1247         if (ath_tx_start(hw, skb, &txctl) != 0) {
1248                 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1249                 goto exit;
1250         }
1251
1252         return 0;
1253 exit:
1254         dev_kfree_skb_any(skb);
1255         return 0;
1256 }
1257
1258 static void ath9k_stop(struct ieee80211_hw *hw)
1259 {
1260         struct ath_wiphy *aphy = hw->priv;
1261         struct ath_softc *sc = aphy->sc;
1262         struct ath_hw *ah = sc->sc_ah;
1263         struct ath_common *common = ath9k_hw_common(ah);
1264
1265         mutex_lock(&sc->mutex);
1266
1267         if (led_blink)
1268                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1269
1270         cancel_delayed_work_sync(&sc->tx_complete_work);
1271         cancel_work_sync(&sc->paprd_work);
1272         cancel_work_sync(&sc->hw_check_work);
1273
1274         if (sc->sc_flags & SC_OP_INVALID) {
1275                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1276                 mutex_unlock(&sc->mutex);
1277                 return;
1278         }
1279
1280         /* Ensure HW is awake when we try to shut it down. */
1281         ath9k_ps_wakeup(sc);
1282
1283         if (ah->btcoex_hw.enabled) {
1284                 ath9k_hw_btcoex_disable(ah);
1285                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1286                         ath9k_btcoex_timer_pause(sc);
1287         }
1288
1289         spin_lock_bh(&sc->sc_pcu_lock);
1290
1291         /* make sure h/w will not generate any interrupt
1292          * before setting the invalid flag. */
1293         ath9k_hw_disable_interrupts(ah);
1294
1295         if (!(sc->sc_flags & SC_OP_INVALID)) {
1296                 ath_drain_all_txq(sc, false);
1297                 ath_stoprecv(sc);
1298                 ath9k_hw_phy_disable(ah);
1299         } else
1300                 sc->rx.rxlink = NULL;
1301
1302         /* disable HAL and put h/w to sleep */
1303         ath9k_hw_disable(ah);
1304         ath9k_hw_configpcipowersave(ah, 1, 1);
1305
1306         spin_unlock_bh(&sc->sc_pcu_lock);
1307
1308         ath9k_ps_restore(sc);
1309
1310         sc->ps_idle = true;
1311         ath_radio_disable(sc, hw);
1312
1313         sc->sc_flags |= SC_OP_INVALID;
1314
1315         pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
1316
1317         mutex_unlock(&sc->mutex);
1318
1319         ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1320 }
1321
1322 bool ath9k_uses_beacons(int type)
1323 {
1324         switch (type) {
1325         case NL80211_IFTYPE_AP:
1326         case NL80211_IFTYPE_ADHOC:
1327         case NL80211_IFTYPE_MESH_POINT:
1328                 return true;
1329         default:
1330                 return false;
1331         }
1332 }
1333
1334 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1335                                  struct ieee80211_vif *vif)
1336 {
1337         struct ath_vif *avp = (void *)vif->drv_priv;
1338
1339         /* Disable SWBA interrupt */
1340         sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
1341         ath9k_ps_wakeup(sc);
1342         ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1343         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1344         tasklet_kill(&sc->bcon_tasklet);
1345         ath9k_ps_restore(sc);
1346
1347         ath_beacon_return(sc, avp);
1348         sc->sc_flags &= ~SC_OP_BEACONS;
1349
1350         if (sc->nbcnvifs > 0) {
1351                 /* Re-enable beaconing */
1352                 sc->sc_ah->imask |= ATH9K_INT_SWBA;
1353                 ath9k_ps_wakeup(sc);
1354                 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1355                 ath9k_ps_restore(sc);
1356         }
1357 }
1358
1359 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1360 {
1361         struct ath9k_vif_iter_data *iter_data = data;
1362         int i;
1363
1364         if (iter_data->hw_macaddr)
1365                 for (i = 0; i < ETH_ALEN; i++)
1366                         iter_data->mask[i] &=
1367                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1368
1369         switch (vif->type) {
1370         case NL80211_IFTYPE_AP:
1371                 iter_data->naps++;
1372                 break;
1373         case NL80211_IFTYPE_STATION:
1374                 iter_data->nstations++;
1375                 break;
1376         case NL80211_IFTYPE_ADHOC:
1377                 iter_data->nadhocs++;
1378                 break;
1379         case NL80211_IFTYPE_MESH_POINT:
1380                 iter_data->nmeshes++;
1381                 break;
1382         case NL80211_IFTYPE_WDS:
1383                 iter_data->nwds++;
1384                 break;
1385         default:
1386                 iter_data->nothers++;
1387                 break;
1388         }
1389 }
1390
1391 /* Called with sc->mutex held. */
1392 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1393                                struct ieee80211_vif *vif,
1394                                struct ath9k_vif_iter_data *iter_data)
1395 {
1396         struct ath_wiphy *aphy = hw->priv;
1397         struct ath_softc *sc = aphy->sc;
1398         struct ath_hw *ah = sc->sc_ah;
1399         struct ath_common *common = ath9k_hw_common(ah);
1400
1401         /*
1402          * Use the hardware MAC address as reference, the hardware uses it
1403          * together with the BSSID mask when matching addresses.
1404          */
1405         memset(iter_data, 0, sizeof(*iter_data));
1406         iter_data->hw_macaddr = common->macaddr;
1407         memset(&iter_data->mask, 0xff, ETH_ALEN);
1408
1409         if (vif)
1410                 ath9k_vif_iter(iter_data, vif->addr, vif);
1411
1412         /* Get list of all active MAC addresses */
1413         ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1414                                                    iter_data);
1415 }
1416
1417 /* Called with sc->mutex held. */
1418 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1419                                           struct ieee80211_vif *vif)
1420 {
1421         struct ath_wiphy *aphy = hw->priv;
1422         struct ath_softc *sc = aphy->sc;
1423         struct ath_hw *ah = sc->sc_ah;
1424         struct ath_common *common = ath9k_hw_common(ah);
1425         struct ath9k_vif_iter_data iter_data;
1426
1427         ath9k_calculate_iter_data(hw, vif, &iter_data);
1428
1429         /* Set BSSID mask. */
1430         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1431         ath_hw_setbssidmask(common);
1432
1433         /* Set op-mode & TSF */
1434         if (iter_data.naps > 0) {
1435                 ath9k_hw_set_tsfadjust(ah, 1);
1436                 sc->sc_flags |= SC_OP_TSF_RESET;
1437                 ah->opmode = NL80211_IFTYPE_AP;
1438         } else {
1439                 ath9k_hw_set_tsfadjust(ah, 0);
1440                 sc->sc_flags &= ~SC_OP_TSF_RESET;
1441
1442                 if (iter_data.nwds + iter_data.nmeshes)
1443                         ah->opmode = NL80211_IFTYPE_AP;
1444                 else if (iter_data.nadhocs)
1445                         ah->opmode = NL80211_IFTYPE_ADHOC;
1446                 else
1447                         ah->opmode = NL80211_IFTYPE_STATION;
1448         }
1449
1450         /*
1451          * Enable MIB interrupts when there are hardware phy counters.
1452          */
1453         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1454                 if (ah->config.enable_ani)
1455                         ah->imask |= ATH9K_INT_MIB;
1456                 ah->imask |= ATH9K_INT_TSFOOR;
1457         } else {
1458                 ah->imask &= ~ATH9K_INT_MIB;
1459                 ah->imask &= ~ATH9K_INT_TSFOOR;
1460         }
1461
1462         ath9k_hw_set_interrupts(ah, ah->imask);
1463
1464         /* Set up ANI */
1465         if ((iter_data.naps + iter_data.nadhocs) > 0) {
1466                 sc->sc_flags |= SC_OP_ANI_RUN;
1467                 ath_start_ani(common);
1468         } else {
1469                 sc->sc_flags &= ~SC_OP_ANI_RUN;
1470                 del_timer_sync(&common->ani.timer);
1471         }
1472 }
1473
1474 /* Called with sc->mutex held, vif counts set up properly. */
1475 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1476                                    struct ieee80211_vif *vif)
1477 {
1478         struct ath_wiphy *aphy = hw->priv;
1479         struct ath_softc *sc = aphy->sc;
1480
1481         ath9k_calculate_summary_state(hw, vif);
1482
1483         if (ath9k_uses_beacons(vif->type)) {
1484                 int error;
1485                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1486                 /* This may fail because upper levels do not have beacons
1487                  * properly configured yet.  That's OK, we assume it
1488                  * will be properly configured and then we will be notified
1489                  * in the info_changed method and set up beacons properly
1490                  * there.
1491                  */
1492                 error = ath_beacon_alloc(aphy, vif);
1493                 if (error)
1494                         ath9k_reclaim_beacon(sc, vif);
1495                 else
1496                         ath_beacon_config(sc, vif);
1497         }
1498 }
1499
1500
1501 static int ath9k_add_interface(struct ieee80211_hw *hw,
1502                                struct ieee80211_vif *vif)
1503 {
1504         struct ath_wiphy *aphy = hw->priv;
1505         struct ath_softc *sc = aphy->sc;
1506         struct ath_hw *ah = sc->sc_ah;
1507         struct ath_common *common = ath9k_hw_common(ah);
1508         struct ath_vif *avp = (void *)vif->drv_priv;
1509         int ret = 0;
1510
1511         mutex_lock(&sc->mutex);
1512
1513         switch (vif->type) {
1514         case NL80211_IFTYPE_STATION:
1515         case NL80211_IFTYPE_WDS:
1516         case NL80211_IFTYPE_ADHOC:
1517         case NL80211_IFTYPE_AP:
1518         case NL80211_IFTYPE_MESH_POINT:
1519                 break;
1520         default:
1521                 ath_err(common, "Interface type %d not yet supported\n",
1522                         vif->type);
1523                 ret = -EOPNOTSUPP;
1524                 goto out;
1525         }
1526
1527         if (ath9k_uses_beacons(vif->type)) {
1528                 if (sc->nbcnvifs >= ATH_BCBUF) {
1529                         ath_err(common, "Not enough beacon buffers when adding"
1530                                 " new interface of type: %i\n",
1531                                 vif->type);
1532                         ret = -ENOBUFS;
1533                         goto out;
1534                 }
1535         }
1536
1537         if ((vif->type == NL80211_IFTYPE_ADHOC) &&
1538             sc->nvifs > 0) {
1539                 ath_err(common, "Cannot create ADHOC interface when other"
1540                         " interfaces already exist.\n");
1541                 ret = -EINVAL;
1542                 goto out;
1543         }
1544
1545         ath_dbg(common, ATH_DBG_CONFIG,
1546                 "Attach a VIF of type: %d\n", vif->type);
1547
1548         /* Set the VIF opmode */
1549         avp->av_opmode = vif->type;
1550         avp->av_bslot = -1;
1551
1552         sc->nvifs++;
1553
1554         ath9k_do_vif_add_setup(hw, vif);
1555 out:
1556         mutex_unlock(&sc->mutex);
1557         return ret;
1558 }
1559
1560 static int ath9k_change_interface(struct ieee80211_hw *hw,
1561                                   struct ieee80211_vif *vif,
1562                                   enum nl80211_iftype new_type,
1563                                   bool p2p)
1564 {
1565         struct ath_wiphy *aphy = hw->priv;
1566         struct ath_softc *sc = aphy->sc;
1567         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1568         int ret = 0;
1569
1570         ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1571         mutex_lock(&sc->mutex);
1572
1573         /* See if new interface type is valid. */
1574         if ((new_type == NL80211_IFTYPE_ADHOC) &&
1575             (sc->nvifs > 1)) {
1576                 ath_err(common, "When using ADHOC, it must be the only"
1577                         " interface.\n");
1578                 ret = -EINVAL;
1579                 goto out;
1580         }
1581
1582         if (ath9k_uses_beacons(new_type) &&
1583             !ath9k_uses_beacons(vif->type)) {
1584                 if (sc->nbcnvifs >= ATH_BCBUF) {
1585                         ath_err(common, "No beacon slot available\n");
1586                         ret = -ENOBUFS;
1587                         goto out;
1588                 }
1589         }
1590
1591         /* Clean up old vif stuff */
1592         if (ath9k_uses_beacons(vif->type))
1593                 ath9k_reclaim_beacon(sc, vif);
1594
1595         /* Add new settings */
1596         vif->type = new_type;
1597         vif->p2p = p2p;
1598
1599         ath9k_do_vif_add_setup(hw, vif);
1600 out:
1601         mutex_unlock(&sc->mutex);
1602         return ret;
1603 }
1604
1605 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1606                                    struct ieee80211_vif *vif)
1607 {
1608         struct ath_wiphy *aphy = hw->priv;
1609         struct ath_softc *sc = aphy->sc;
1610         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1611
1612         ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1613
1614         mutex_lock(&sc->mutex);
1615
1616         sc->nvifs--;
1617
1618         /* Reclaim beacon resources */
1619         if (ath9k_uses_beacons(vif->type))
1620                 ath9k_reclaim_beacon(sc, vif);
1621
1622         ath9k_calculate_summary_state(hw, NULL);
1623
1624         mutex_unlock(&sc->mutex);
1625 }
1626
1627 static void ath9k_enable_ps(struct ath_softc *sc)
1628 {
1629         struct ath_hw *ah = sc->sc_ah;
1630
1631         sc->ps_enabled = true;
1632         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1633                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1634                         ah->imask |= ATH9K_INT_TIM_TIMER;
1635                         ath9k_hw_set_interrupts(ah, ah->imask);
1636                 }
1637                 ath9k_hw_setrxabort(ah, 1);
1638         }
1639 }
1640
1641 static void ath9k_disable_ps(struct ath_softc *sc)
1642 {
1643         struct ath_hw *ah = sc->sc_ah;
1644
1645         sc->ps_enabled = false;
1646         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1647         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1648                 ath9k_hw_setrxabort(ah, 0);
1649                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1650                                   PS_WAIT_FOR_CAB |
1651                                   PS_WAIT_FOR_PSPOLL_DATA |
1652                                   PS_WAIT_FOR_TX_ACK);
1653                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1654                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1655                         ath9k_hw_set_interrupts(ah, ah->imask);
1656                 }
1657         }
1658
1659 }
1660
1661 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1662 {
1663         struct ath_wiphy *aphy = hw->priv;
1664         struct ath_softc *sc = aphy->sc;
1665         struct ath_hw *ah = sc->sc_ah;
1666         struct ath_common *common = ath9k_hw_common(ah);
1667         struct ieee80211_conf *conf = &hw->conf;
1668         bool disable_radio = false;
1669
1670         mutex_lock(&sc->mutex);
1671
1672         /*
1673          * Leave this as the first check because we need to turn on the
1674          * radio if it was disabled before prior to processing the rest
1675          * of the changes. Likewise we must only disable the radio towards
1676          * the end.
1677          */
1678         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1679                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1680                 if (!sc->ps_idle) {
1681                         ath_radio_enable(sc, hw);
1682                         ath_dbg(common, ATH_DBG_CONFIG,
1683                                 "not-idle: enabling radio\n");
1684                 } else {
1685                         disable_radio = true;
1686                 }
1687         }
1688
1689         /*
1690          * We just prepare to enable PS. We have to wait until our AP has
1691          * ACK'd our null data frame to disable RX otherwise we'll ignore
1692          * those ACKs and end up retransmitting the same null data frames.
1693          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1694          */
1695         if (changed & IEEE80211_CONF_CHANGE_PS) {
1696                 unsigned long flags;
1697                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1698                 if (conf->flags & IEEE80211_CONF_PS)
1699                         ath9k_enable_ps(sc);
1700                 else
1701                         ath9k_disable_ps(sc);
1702                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1703         }
1704
1705         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1706                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1707                         ath_dbg(common, ATH_DBG_CONFIG,
1708                                 "Monitor mode is enabled\n");
1709                         sc->sc_ah->is_monitoring = true;
1710                 } else {
1711                         ath_dbg(common, ATH_DBG_CONFIG,
1712                                 "Monitor mode is disabled\n");
1713                         sc->sc_ah->is_monitoring = false;
1714                 }
1715         }
1716
1717         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1718                 struct ieee80211_channel *curchan = hw->conf.channel;
1719                 int pos = curchan->hw_value;
1720                 int old_pos = -1;
1721                 unsigned long flags;
1722
1723                 if (ah->curchan)
1724                         old_pos = ah->curchan - &ah->channels[0];
1725
1726                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1727                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1728                 else
1729                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1730
1731                 ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1732                         curchan->center_freq);
1733
1734                 /* XXX: remove me eventualy */
1735                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1736
1737                 /* update survey stats for the old channel before switching */
1738                 spin_lock_irqsave(&common->cc_lock, flags);
1739                 ath_update_survey_stats(sc);
1740                 spin_unlock_irqrestore(&common->cc_lock, flags);
1741
1742                 /*
1743                  * If the operating channel changes, change the survey in-use flags
1744                  * along with it.
1745                  * Reset the survey data for the new channel, unless we're switching
1746                  * back to the operating channel from an off-channel operation.
1747                  */
1748                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1749                     sc->cur_survey != &sc->survey[pos]) {
1750
1751                         if (sc->cur_survey)
1752                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1753
1754                         sc->cur_survey = &sc->survey[pos];
1755
1756                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1757                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1758                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1759                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1760                 }
1761
1762                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1763                         ath_err(common, "Unable to set channel\n");
1764                         mutex_unlock(&sc->mutex);
1765                         return -EINVAL;
1766                 }
1767
1768                 /*
1769                  * The most recent snapshot of channel->noisefloor for the old
1770                  * channel is only available after the hardware reset. Copy it to
1771                  * the survey stats now.
1772                  */
1773                 if (old_pos >= 0)
1774                         ath_update_survey_nf(sc, old_pos);
1775         }
1776
1777         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1778                 sc->config.txpowlimit = 2 * conf->power_level;
1779                 ath_update_txpow(sc);
1780         }
1781
1782         if (disable_radio) {
1783                 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1784                 ath_radio_disable(sc, hw);
1785         }
1786
1787         mutex_unlock(&sc->mutex);
1788
1789         return 0;
1790 }
1791
1792 #define SUPPORTED_FILTERS                       \
1793         (FIF_PROMISC_IN_BSS |                   \
1794         FIF_ALLMULTI |                          \
1795         FIF_CONTROL |                           \
1796         FIF_PSPOLL |                            \
1797         FIF_OTHER_BSS |                         \
1798         FIF_BCN_PRBRESP_PROMISC |               \
1799         FIF_PROBE_REQ |                         \
1800         FIF_FCSFAIL)
1801
1802 /* FIXME: sc->sc_full_reset ? */
1803 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1804                                    unsigned int changed_flags,
1805                                    unsigned int *total_flags,
1806                                    u64 multicast)
1807 {
1808         struct ath_wiphy *aphy = hw->priv;
1809         struct ath_softc *sc = aphy->sc;
1810         u32 rfilt;
1811
1812         changed_flags &= SUPPORTED_FILTERS;
1813         *total_flags &= SUPPORTED_FILTERS;
1814
1815         sc->rx.rxfilter = *total_flags;
1816         ath9k_ps_wakeup(sc);
1817         rfilt = ath_calcrxfilter(sc);
1818         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1819         ath9k_ps_restore(sc);
1820
1821         ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1822                 "Set HW RX filter: 0x%x\n", rfilt);
1823 }
1824
1825 static int ath9k_sta_add(struct ieee80211_hw *hw,
1826                          struct ieee80211_vif *vif,
1827                          struct ieee80211_sta *sta)
1828 {
1829         struct ath_wiphy *aphy = hw->priv;
1830         struct ath_softc *sc = aphy->sc;
1831
1832         ath_node_attach(sc, sta);
1833
1834         return 0;
1835 }
1836
1837 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1838                             struct ieee80211_vif *vif,
1839                             struct ieee80211_sta *sta)
1840 {
1841         struct ath_wiphy *aphy = hw->priv;
1842         struct ath_softc *sc = aphy->sc;
1843
1844         ath_node_detach(sc, sta);
1845
1846         return 0;
1847 }
1848
1849 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1850                          const struct ieee80211_tx_queue_params *params)
1851 {
1852         struct ath_wiphy *aphy = hw->priv;
1853         struct ath_softc *sc = aphy->sc;
1854         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1855         struct ath_txq *txq;
1856         struct ath9k_tx_queue_info qi;
1857         int ret = 0;
1858
1859         if (queue >= WME_NUM_AC)
1860                 return 0;
1861
1862         txq = sc->tx.txq_map[queue];
1863
1864         mutex_lock(&sc->mutex);
1865
1866         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1867
1868         qi.tqi_aifs = params->aifs;
1869         qi.tqi_cwmin = params->cw_min;
1870         qi.tqi_cwmax = params->cw_max;
1871         qi.tqi_burstTime = params->txop;
1872
1873         ath_dbg(common, ATH_DBG_CONFIG,
1874                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1875                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1876                 params->cw_max, params->txop);
1877
1878         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1879         if (ret)
1880                 ath_err(common, "TXQ Update failed\n");
1881
1882         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1883                 if (queue == WME_AC_BE && !ret)
1884                         ath_beaconq_config(sc);
1885
1886         mutex_unlock(&sc->mutex);
1887
1888         return ret;
1889 }
1890
1891 static int ath9k_set_key(struct ieee80211_hw *hw,
1892                          enum set_key_cmd cmd,
1893                          struct ieee80211_vif *vif,
1894                          struct ieee80211_sta *sta,
1895                          struct ieee80211_key_conf *key)
1896 {
1897         struct ath_wiphy *aphy = hw->priv;
1898         struct ath_softc *sc = aphy->sc;
1899         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1900         int ret = 0;
1901
1902         if (ath9k_modparam_nohwcrypt)
1903                 return -ENOSPC;
1904
1905         mutex_lock(&sc->mutex);
1906         ath9k_ps_wakeup(sc);
1907         ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1908
1909         switch (cmd) {
1910         case SET_KEY:
1911                 ret = ath_key_config(common, vif, sta, key);
1912                 if (ret >= 0) {
1913                         key->hw_key_idx = ret;
1914                         /* push IV and Michael MIC generation to stack */
1915                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1916                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1917                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1918                         if (sc->sc_ah->sw_mgmt_crypto &&
1919                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1920                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1921                         ret = 0;
1922                 }
1923                 break;
1924         case DISABLE_KEY:
1925                 ath_key_delete(common, key);
1926                 break;
1927         default:
1928                 ret = -EINVAL;
1929         }
1930
1931         ath9k_ps_restore(sc);
1932         mutex_unlock(&sc->mutex);
1933
1934         return ret;
1935 }
1936
1937 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1938                                    struct ieee80211_vif *vif,
1939                                    struct ieee80211_bss_conf *bss_conf,
1940                                    u32 changed)
1941 {
1942         struct ath_wiphy *aphy = hw->priv;
1943         struct ath_softc *sc = aphy->sc;
1944         struct ath_hw *ah = sc->sc_ah;
1945         struct ath_common *common = ath9k_hw_common(ah);
1946         struct ath_vif *avp = (void *)vif->drv_priv;
1947         int slottime;
1948         int error;
1949
1950         mutex_lock(&sc->mutex);
1951
1952         if (changed & BSS_CHANGED_BSSID) {
1953                 /* Set BSSID */
1954                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1955                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1956                 common->curaid = 0;
1957                 ath9k_hw_write_associd(ah);
1958
1959                 /* Set aggregation protection mode parameters */
1960                 sc->config.ath_aggr_prot = 0;
1961
1962                 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
1963                         common->curbssid, common->curaid);
1964
1965                 /* need to reconfigure the beacon */
1966                 sc->sc_flags &= ~SC_OP_BEACONS ;
1967         }
1968
1969         /* Enable transmission of beacons (AP, IBSS, MESH) */
1970         if ((changed & BSS_CHANGED_BEACON) ||
1971             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1972                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1973                 error = ath_beacon_alloc(aphy, vif);
1974                 if (!error)
1975                         ath_beacon_config(sc, vif);
1976         }
1977
1978         if (changed & BSS_CHANGED_ERP_SLOT) {
1979                 if (bss_conf->use_short_slot)
1980                         slottime = 9;
1981                 else
1982                         slottime = 20;
1983                 if (vif->type == NL80211_IFTYPE_AP) {
1984                         /*
1985                          * Defer update, so that connected stations can adjust
1986                          * their settings at the same time.
1987                          * See beacon.c for more details
1988                          */
1989                         sc->beacon.slottime = slottime;
1990                         sc->beacon.updateslot = UPDATE;
1991                 } else {
1992                         ah->slottime = slottime;
1993                         ath9k_hw_init_global_settings(ah);
1994                 }
1995         }
1996
1997         /* Disable transmission of beacons */
1998         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1999                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
2000
2001         if (changed & BSS_CHANGED_BEACON_INT) {
2002                 sc->beacon_interval = bss_conf->beacon_int;
2003                 /*
2004                  * In case of AP mode, the HW TSF has to be reset
2005                  * when the beacon interval changes.
2006                  */
2007                 if (vif->type == NL80211_IFTYPE_AP) {
2008                         sc->sc_flags |= SC_OP_TSF_RESET;
2009                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
2010                         error = ath_beacon_alloc(aphy, vif);
2011                         if (!error)
2012                                 ath_beacon_config(sc, vif);
2013                 } else {
2014                         ath_beacon_config(sc, vif);
2015                 }
2016         }
2017
2018         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
2019                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
2020                         bss_conf->use_short_preamble);
2021                 if (bss_conf->use_short_preamble)
2022                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
2023                 else
2024                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
2025         }
2026
2027         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
2028                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
2029                         bss_conf->use_cts_prot);
2030                 if (bss_conf->use_cts_prot &&
2031                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
2032                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
2033                 else
2034                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
2035         }
2036
2037         if (changed & BSS_CHANGED_ASSOC) {
2038                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
2039                         bss_conf->assoc);
2040                 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
2041         }
2042
2043         mutex_unlock(&sc->mutex);
2044 }
2045
2046 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
2047 {
2048         u64 tsf;
2049         struct ath_wiphy *aphy = hw->priv;
2050         struct ath_softc *sc = aphy->sc;
2051
2052         mutex_lock(&sc->mutex);
2053         ath9k_ps_wakeup(sc);
2054         tsf = ath9k_hw_gettsf64(sc->sc_ah);
2055         ath9k_ps_restore(sc);
2056         mutex_unlock(&sc->mutex);
2057
2058         return tsf;
2059 }
2060
2061 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2062 {
2063         struct ath_wiphy *aphy = hw->priv;
2064         struct ath_softc *sc = aphy->sc;
2065
2066         mutex_lock(&sc->mutex);
2067         ath9k_ps_wakeup(sc);
2068         ath9k_hw_settsf64(sc->sc_ah, tsf);
2069         ath9k_ps_restore(sc);
2070         mutex_unlock(&sc->mutex);
2071 }
2072
2073 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2074 {
2075         struct ath_wiphy *aphy = hw->priv;
2076         struct ath_softc *sc = aphy->sc;
2077
2078         mutex_lock(&sc->mutex);
2079
2080         ath9k_ps_wakeup(sc);
2081         ath9k_hw_reset_tsf(sc->sc_ah);
2082         ath9k_ps_restore(sc);
2083
2084         mutex_unlock(&sc->mutex);
2085 }
2086
2087 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2088                               struct ieee80211_vif *vif,
2089                               enum ieee80211_ampdu_mlme_action action,
2090                               struct ieee80211_sta *sta,
2091                               u16 tid, u16 *ssn, u8 buf_size)
2092 {
2093         struct ath_wiphy *aphy = hw->priv;
2094         struct ath_softc *sc = aphy->sc;
2095         int ret = 0;
2096
2097         local_bh_disable();
2098
2099         switch (action) {
2100         case IEEE80211_AMPDU_RX_START:
2101                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2102                         ret = -ENOTSUPP;
2103                 break;
2104         case IEEE80211_AMPDU_RX_STOP:
2105                 break;
2106         case IEEE80211_AMPDU_TX_START:
2107                 if (!(sc->sc_flags & SC_OP_TXAGGR))
2108                         return -EOPNOTSUPP;
2109
2110                 ath9k_ps_wakeup(sc);
2111                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2112                 if (!ret)
2113                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2114                 ath9k_ps_restore(sc);
2115                 break;
2116         case IEEE80211_AMPDU_TX_STOP:
2117                 ath9k_ps_wakeup(sc);
2118                 ath_tx_aggr_stop(sc, sta, tid);
2119                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2120                 ath9k_ps_restore(sc);
2121                 break;
2122         case IEEE80211_AMPDU_TX_OPERATIONAL:
2123                 ath9k_ps_wakeup(sc);
2124                 ath_tx_aggr_resume(sc, sta, tid);
2125                 ath9k_ps_restore(sc);
2126                 break;
2127         default:
2128                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2129         }
2130
2131         local_bh_enable();
2132
2133         return ret;
2134 }
2135
2136 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2137                              struct survey_info *survey)
2138 {
2139         struct ath_wiphy *aphy = hw->priv;
2140         struct ath_softc *sc = aphy->sc;
2141         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2142         struct ieee80211_supported_band *sband;
2143         struct ieee80211_channel *chan;
2144         unsigned long flags;
2145         int pos;
2146
2147         spin_lock_irqsave(&common->cc_lock, flags);
2148         if (idx == 0)
2149                 ath_update_survey_stats(sc);
2150
2151         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2152         if (sband && idx >= sband->n_channels) {
2153                 idx -= sband->n_channels;
2154                 sband = NULL;
2155         }
2156
2157         if (!sband)
2158                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2159
2160         if (!sband || idx >= sband->n_channels) {
2161                 spin_unlock_irqrestore(&common->cc_lock, flags);
2162                 return -ENOENT;
2163         }
2164
2165         chan = &sband->channels[idx];
2166         pos = chan->hw_value;
2167         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2168         survey->channel = chan;
2169         spin_unlock_irqrestore(&common->cc_lock, flags);
2170
2171         return 0;
2172 }
2173
2174 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2175 {
2176         struct ath_wiphy *aphy = hw->priv;
2177         struct ath_softc *sc = aphy->sc;
2178         struct ath_hw *ah = sc->sc_ah;
2179
2180         mutex_lock(&sc->mutex);
2181         ah->coverage_class = coverage_class;
2182         ath9k_hw_init_global_settings(ah);
2183         mutex_unlock(&sc->mutex);
2184 }
2185
2186 struct ieee80211_ops ath9k_ops = {
2187         .tx                 = ath9k_tx,
2188         .start              = ath9k_start,
2189         .stop               = ath9k_stop,
2190         .add_interface      = ath9k_add_interface,
2191         .change_interface   = ath9k_change_interface,
2192         .remove_interface   = ath9k_remove_interface,
2193         .config             = ath9k_config,
2194         .configure_filter   = ath9k_configure_filter,
2195         .sta_add            = ath9k_sta_add,
2196         .sta_remove         = ath9k_sta_remove,
2197         .conf_tx            = ath9k_conf_tx,
2198         .bss_info_changed   = ath9k_bss_info_changed,
2199         .set_key            = ath9k_set_key,
2200         .get_tsf            = ath9k_get_tsf,
2201         .set_tsf            = ath9k_set_tsf,
2202         .reset_tsf          = ath9k_reset_tsf,
2203         .ampdu_action       = ath9k_ampdu_action,
2204         .get_survey         = ath9k_get_survey,
2205         .rfkill_poll        = ath9k_rfkill_poll_state,
2206         .set_coverage_class = ath9k_set_coverage_class,
2207 };