2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
21 static void ath_cache_conf_rate(struct ath_softc *sc,
22 struct ieee80211_conf *conf)
24 switch (conf->channel->band) {
25 case IEEE80211_BAND_2GHZ:
26 if (conf_is_ht20(conf))
27 sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
28 else if (conf_is_ht40_minus(conf))
29 sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
30 else if (conf_is_ht40_plus(conf))
31 sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
33 sc->cur_rate_mode = ATH9K_MODE_11G;
35 case IEEE80211_BAND_5GHZ:
36 if (conf_is_ht20(conf))
37 sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
38 else if (conf_is_ht40_minus(conf))
39 sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
40 else if (conf_is_ht40_plus(conf))
41 sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
43 sc->cur_rate_mode = ATH9K_MODE_11A;
51 static void ath_update_txpow(struct ath_softc *sc)
53 struct ath_hw *ah = sc->sc_ah;
56 if (sc->curtxpow != sc->config.txpowlimit) {
57 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
58 /* read back in case value is clamped */
59 ath9k_hw_getcapability(ah, ATH9K_CAP_TXPOW, 1, &txpow);
64 static u8 parse_mpdudensity(u8 mpdudensity)
67 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
68 * 0 for no restriction
77 switch (mpdudensity) {
83 /* Our lower layer calculations limit our precision to
99 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
100 struct ieee80211_hw *hw)
102 struct ieee80211_channel *curchan = hw->conf.channel;
103 struct ath9k_channel *channel;
106 chan_idx = curchan->hw_value;
107 channel = &sc->sc_ah->channels[chan_idx];
108 ath9k_update_ichannel(sc, hw, channel);
112 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
117 spin_lock_irqsave(&sc->sc_pm_lock, flags);
118 ret = ath9k_hw_setpower(sc->sc_ah, mode);
119 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
124 void ath9k_ps_wakeup(struct ath_softc *sc)
128 spin_lock_irqsave(&sc->sc_pm_lock, flags);
129 if (++sc->ps_usecount != 1)
132 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
135 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
138 void ath9k_ps_restore(struct ath_softc *sc)
142 spin_lock_irqsave(&sc->sc_pm_lock, flags);
143 if (--sc->ps_usecount != 0)
146 if (sc->ps_enabled &&
147 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
149 PS_WAIT_FOR_PSPOLL_DATA |
150 PS_WAIT_FOR_TX_ACK)))
151 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
154 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
158 * Set/change channels. If the channel is really being changed, it's done
159 * by reseting the chip. To accomplish this we must first cleanup any pending
160 * DMA, then restart stuff.
162 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
163 struct ath9k_channel *hchan)
165 struct ath_hw *ah = sc->sc_ah;
166 struct ath_common *common = ath9k_hw_common(ah);
167 struct ieee80211_conf *conf = &common->hw->conf;
168 bool fastcc = true, stopped;
169 struct ieee80211_channel *channel = hw->conf.channel;
172 if (sc->sc_flags & SC_OP_INVALID)
178 * This is only performed if the channel settings have
181 * To switch channels clear any pending DMA operations;
182 * wait long enough for the RX fifo to drain, reset the
183 * hardware at the new frequency, and then re-enable
184 * the relevant bits of the h/w.
186 ath9k_hw_set_interrupts(ah, 0);
187 ath_drain_all_txq(sc, false);
188 stopped = ath_stoprecv(sc);
190 /* XXX: do not flush receive queue here. We don't want
191 * to flush data frames already in queue because of
192 * changing channel. */
194 if (!stopped || (sc->sc_flags & SC_OP_FULL_RESET))
197 ath_print(common, ATH_DBG_CONFIG,
198 "(%u MHz) -> (%u MHz), conf_is_ht40: %d\n",
199 sc->sc_ah->curchan->channel,
200 channel->center_freq, conf_is_ht40(conf));
202 spin_lock_bh(&sc->sc_resetlock);
204 r = ath9k_hw_reset(ah, hchan, fastcc);
206 ath_print(common, ATH_DBG_FATAL,
207 "Unable to reset channel (%u Mhz) "
209 channel->center_freq, r);
210 spin_unlock_bh(&sc->sc_resetlock);
213 spin_unlock_bh(&sc->sc_resetlock);
215 sc->sc_flags &= ~SC_OP_FULL_RESET;
217 if (ath_startrecv(sc) != 0) {
218 ath_print(common, ATH_DBG_FATAL,
219 "Unable to restart recv logic\n");
224 ath_cache_conf_rate(sc, &hw->conf);
225 ath_update_txpow(sc);
226 ath9k_hw_set_interrupts(ah, sc->imask);
229 ath9k_ps_restore(sc);
234 * This routine performs the periodic noise floor calibration function
235 * that is used to adjust and optimize the chip performance. This
236 * takes environmental changes (location, temperature) into account.
237 * When the task is complete, it reschedules itself depending on the
238 * appropriate interval that was calculated.
240 void ath_ani_calibrate(unsigned long data)
242 struct ath_softc *sc = (struct ath_softc *)data;
243 struct ath_hw *ah = sc->sc_ah;
244 struct ath_common *common = ath9k_hw_common(ah);
245 bool longcal = false;
246 bool shortcal = false;
247 bool aniflag = false;
248 unsigned int timestamp = jiffies_to_msecs(jiffies);
249 u32 cal_interval, short_cal_interval;
251 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
252 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
254 /* Only calibrate if awake */
255 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
260 /* Long calibration runs independently of short calibration. */
261 if ((timestamp - common->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
263 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
264 common->ani.longcal_timer = timestamp;
267 /* Short calibration applies only while caldone is false */
268 if (!common->ani.caldone) {
269 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
271 ath_print(common, ATH_DBG_ANI,
272 "shortcal @%lu\n", jiffies);
273 common->ani.shortcal_timer = timestamp;
274 common->ani.resetcal_timer = timestamp;
277 if ((timestamp - common->ani.resetcal_timer) >=
278 ATH_RESTART_CALINTERVAL) {
279 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
280 if (common->ani.caldone)
281 common->ani.resetcal_timer = timestamp;
285 /* Verify whether we must check ANI */
286 if ((timestamp - common->ani.checkani_timer) >= ATH_ANI_POLLINTERVAL) {
288 common->ani.checkani_timer = timestamp;
291 /* Skip all processing if there's nothing to do. */
292 if (longcal || shortcal || aniflag) {
293 /* Call ANI routine if necessary */
295 ath9k_hw_ani_monitor(ah, ah->curchan);
297 /* Perform calibration if necessary */
298 if (longcal || shortcal) {
299 common->ani.caldone =
300 ath9k_hw_calibrate(ah,
302 common->rx_chainmask,
306 common->ani.noise_floor = ath9k_hw_getchan_noise(ah,
309 ath_print(common, ATH_DBG_ANI,
310 " calibrate chan %u/%x nf: %d\n",
311 ah->curchan->channel,
312 ah->curchan->channelFlags,
313 common->ani.noise_floor);
317 ath9k_ps_restore(sc);
321 * Set timer interval based on previous results.
322 * The interval must be the shortest necessary to satisfy ANI,
323 * short calibration and long calibration.
325 cal_interval = ATH_LONG_CALINTERVAL;
326 if (sc->sc_ah->config.enable_ani)
327 cal_interval = min(cal_interval, (u32)ATH_ANI_POLLINTERVAL);
328 if (!common->ani.caldone)
329 cal_interval = min(cal_interval, (u32)short_cal_interval);
331 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
334 static void ath_start_ani(struct ath_common *common)
336 unsigned long timestamp = jiffies_to_msecs(jiffies);
338 common->ani.longcal_timer = timestamp;
339 common->ani.shortcal_timer = timestamp;
340 common->ani.checkani_timer = timestamp;
342 mod_timer(&common->ani.timer,
343 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
347 * Update tx/rx chainmask. For legacy association,
348 * hard code chainmask to 1x1, for 11n association, use
349 * the chainmask configuration, for bt coexistence, use
350 * the chainmask configuration even in legacy mode.
352 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
354 struct ath_hw *ah = sc->sc_ah;
355 struct ath_common *common = ath9k_hw_common(ah);
357 if ((sc->sc_flags & SC_OP_SCANNING) || is_ht ||
358 (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
359 common->tx_chainmask = ah->caps.tx_chainmask;
360 common->rx_chainmask = ah->caps.rx_chainmask;
362 common->tx_chainmask = 1;
363 common->rx_chainmask = 1;
366 ath_print(common, ATH_DBG_CONFIG,
367 "tx chmask: %d, rx chmask: %d\n",
368 common->tx_chainmask,
369 common->rx_chainmask);
372 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
376 an = (struct ath_node *)sta->drv_priv;
378 if (sc->sc_flags & SC_OP_TXAGGR) {
379 ath_tx_node_init(sc, an);
380 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
381 sta->ht_cap.ampdu_factor);
382 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
383 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
387 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
389 struct ath_node *an = (struct ath_node *)sta->drv_priv;
391 if (sc->sc_flags & SC_OP_TXAGGR)
392 ath_tx_node_cleanup(sc, an);
395 void ath9k_tasklet(unsigned long data)
397 struct ath_softc *sc = (struct ath_softc *)data;
398 struct ath_hw *ah = sc->sc_ah;
399 struct ath_common *common = ath9k_hw_common(ah);
401 u32 status = sc->intrstatus;
405 if (status & ATH9K_INT_FATAL) {
406 ath_reset(sc, false);
407 ath9k_ps_restore(sc);
411 if (status & (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN)) {
412 spin_lock_bh(&sc->rx.rxflushlock);
413 ath_rx_tasklet(sc, 0);
414 spin_unlock_bh(&sc->rx.rxflushlock);
417 if (status & ATH9K_INT_TX)
420 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
422 * TSF sync does not look correct; remain awake to sync with
425 ath_print(common, ATH_DBG_PS,
426 "TSFOOR - Sync with next Beacon\n");
427 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
430 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
431 if (status & ATH9K_INT_GENTIMER)
432 ath_gen_timer_isr(sc->sc_ah);
434 /* re-enable hardware interrupt */
435 ath9k_hw_set_interrupts(ah, sc->imask);
436 ath9k_ps_restore(sc);
439 irqreturn_t ath_isr(int irq, void *dev)
441 #define SCHED_INTR ( \
452 struct ath_softc *sc = dev;
453 struct ath_hw *ah = sc->sc_ah;
454 enum ath9k_int status;
458 * The hardware is not ready/present, don't
459 * touch anything. Note this can happen early
460 * on if the IRQ is shared.
462 if (sc->sc_flags & SC_OP_INVALID)
466 /* shared irq, not for us */
468 if (!ath9k_hw_intrpend(ah))
472 * Figure out the reason(s) for the interrupt. Note
473 * that the hal returns a pseudo-ISR that may include
474 * bits we haven't explicitly enabled so we mask the
475 * value to insure we only process bits we requested.
477 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
478 status &= sc->imask; /* discard unasked-for bits */
481 * If there are no status bits set, then this interrupt was not
482 * for me (should have been caught above).
487 /* Cache the status */
488 sc->intrstatus = status;
490 if (status & SCHED_INTR)
494 * If a FATAL or RXORN interrupt is received, we have to reset the
497 if (status & (ATH9K_INT_FATAL | ATH9K_INT_RXORN))
500 if (status & ATH9K_INT_SWBA)
501 tasklet_schedule(&sc->bcon_tasklet);
503 if (status & ATH9K_INT_TXURN)
504 ath9k_hw_updatetxtriglevel(ah, true);
506 if (status & ATH9K_INT_MIB) {
508 * Disable interrupts until we service the MIB
509 * interrupt; otherwise it will continue to
512 ath9k_hw_set_interrupts(ah, 0);
514 * Let the hal handle the event. We assume
515 * it will clear whatever condition caused
518 ath9k_hw_procmibevent(ah);
519 ath9k_hw_set_interrupts(ah, sc->imask);
522 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
523 if (status & ATH9K_INT_TIM_TIMER) {
524 /* Clear RxAbort bit so that we can
526 ath9k_setpower(sc, ATH9K_PM_AWAKE);
527 ath9k_hw_setrxabort(sc->sc_ah, 0);
528 sc->ps_flags |= PS_WAIT_FOR_BEACON;
533 ath_debug_stat_interrupt(sc, status);
536 /* turn off every interrupt except SWBA */
537 ath9k_hw_set_interrupts(ah, (sc->imask & ATH9K_INT_SWBA));
538 tasklet_schedule(&sc->intr_tq);
546 static u32 ath_get_extchanmode(struct ath_softc *sc,
547 struct ieee80211_channel *chan,
548 enum nl80211_channel_type channel_type)
552 switch (chan->band) {
553 case IEEE80211_BAND_2GHZ:
554 switch(channel_type) {
555 case NL80211_CHAN_NO_HT:
556 case NL80211_CHAN_HT20:
557 chanmode = CHANNEL_G_HT20;
559 case NL80211_CHAN_HT40PLUS:
560 chanmode = CHANNEL_G_HT40PLUS;
562 case NL80211_CHAN_HT40MINUS:
563 chanmode = CHANNEL_G_HT40MINUS;
567 case IEEE80211_BAND_5GHZ:
568 switch(channel_type) {
569 case NL80211_CHAN_NO_HT:
570 case NL80211_CHAN_HT20:
571 chanmode = CHANNEL_A_HT20;
573 case NL80211_CHAN_HT40PLUS:
574 chanmode = CHANNEL_A_HT40PLUS;
576 case NL80211_CHAN_HT40MINUS:
577 chanmode = CHANNEL_A_HT40MINUS;
588 static int ath_setkey_tkip(struct ath_common *common, u16 keyix, const u8 *key,
589 struct ath9k_keyval *hk, const u8 *addr,
592 struct ath_hw *ah = common->ah;
596 key_txmic = key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
597 key_rxmic = key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
601 * Group key installation - only two key cache entries are used
602 * regardless of splitmic capability since group key is only
603 * used either for TX or RX.
606 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
607 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_mic));
609 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
610 memcpy(hk->kv_txmic, key_rxmic, sizeof(hk->kv_mic));
612 return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
614 if (!common->splitmic) {
615 /* TX and RX keys share the same key cache entry. */
616 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
617 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
618 return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
621 /* Separate key cache entries for TX and RX */
623 /* TX key goes at first index, RX key at +32. */
624 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
625 if (!ath9k_hw_set_keycache_entry(ah, keyix, hk, NULL)) {
626 /* TX MIC entry failed. No need to proceed further */
627 ath_print(common, ATH_DBG_FATAL,
628 "Setting TX MIC Key Failed\n");
632 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
633 /* XXX delete tx key on failure? */
634 return ath9k_hw_set_keycache_entry(ah, keyix + 32, hk, addr);
637 static int ath_reserve_key_cache_slot_tkip(struct ath_common *common)
641 for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
642 if (test_bit(i, common->keymap) ||
643 test_bit(i + 64, common->keymap))
644 continue; /* At least one part of TKIP key allocated */
645 if (common->splitmic &&
646 (test_bit(i + 32, common->keymap) ||
647 test_bit(i + 64 + 32, common->keymap)))
648 continue; /* At least one part of TKIP key allocated */
650 /* Found a free slot for a TKIP key */
656 static int ath_reserve_key_cache_slot(struct ath_common *common)
660 /* First, try to find slots that would not be available for TKIP. */
661 if (common->splitmic) {
662 for (i = IEEE80211_WEP_NKID; i < common->keymax / 4; i++) {
663 if (!test_bit(i, common->keymap) &&
664 (test_bit(i + 32, common->keymap) ||
665 test_bit(i + 64, common->keymap) ||
666 test_bit(i + 64 + 32, common->keymap)))
668 if (!test_bit(i + 32, common->keymap) &&
669 (test_bit(i, common->keymap) ||
670 test_bit(i + 64, common->keymap) ||
671 test_bit(i + 64 + 32, common->keymap)))
673 if (!test_bit(i + 64, common->keymap) &&
674 (test_bit(i , common->keymap) ||
675 test_bit(i + 32, common->keymap) ||
676 test_bit(i + 64 + 32, common->keymap)))
678 if (!test_bit(i + 64 + 32, common->keymap) &&
679 (test_bit(i, common->keymap) ||
680 test_bit(i + 32, common->keymap) ||
681 test_bit(i + 64, common->keymap)))
685 for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
686 if (!test_bit(i, common->keymap) &&
687 test_bit(i + 64, common->keymap))
689 if (test_bit(i, common->keymap) &&
690 !test_bit(i + 64, common->keymap))
695 /* No partially used TKIP slots, pick any available slot */
696 for (i = IEEE80211_WEP_NKID; i < common->keymax; i++) {
697 /* Do not allow slots that could be needed for TKIP group keys
698 * to be used. This limitation could be removed if we know that
699 * TKIP will not be used. */
700 if (i >= 64 && i < 64 + IEEE80211_WEP_NKID)
702 if (common->splitmic) {
703 if (i >= 32 && i < 32 + IEEE80211_WEP_NKID)
705 if (i >= 64 + 32 && i < 64 + 32 + IEEE80211_WEP_NKID)
709 if (!test_bit(i, common->keymap))
710 return i; /* Found a free slot for a key */
713 /* No free slot found */
717 static int ath_key_config(struct ath_common *common,
718 struct ieee80211_vif *vif,
719 struct ieee80211_sta *sta,
720 struct ieee80211_key_conf *key)
722 struct ath_hw *ah = common->ah;
723 struct ath9k_keyval hk;
724 const u8 *mac = NULL;
728 memset(&hk, 0, sizeof(hk));
732 hk.kv_type = ATH9K_CIPHER_WEP;
735 hk.kv_type = ATH9K_CIPHER_TKIP;
738 hk.kv_type = ATH9K_CIPHER_AES_CCM;
744 hk.kv_len = key->keylen;
745 memcpy(hk.kv_val, key->key, key->keylen);
747 if (!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
748 /* For now, use the default keys for broadcast keys. This may
749 * need to change with virtual interfaces. */
751 } else if (key->keyidx) {
756 if (vif->type != NL80211_IFTYPE_AP) {
757 /* Only keyidx 0 should be used with unicast key, but
758 * allow this for client mode for now. */
767 if (key->alg == ALG_TKIP)
768 idx = ath_reserve_key_cache_slot_tkip(common);
770 idx = ath_reserve_key_cache_slot(common);
772 return -ENOSPC; /* no free key cache entries */
775 if (key->alg == ALG_TKIP)
776 ret = ath_setkey_tkip(common, idx, key->key, &hk, mac,
777 vif->type == NL80211_IFTYPE_AP);
779 ret = ath9k_hw_set_keycache_entry(ah, idx, &hk, mac);
784 set_bit(idx, common->keymap);
785 if (key->alg == ALG_TKIP) {
786 set_bit(idx + 64, common->keymap);
787 if (common->splitmic) {
788 set_bit(idx + 32, common->keymap);
789 set_bit(idx + 64 + 32, common->keymap);
796 static void ath_key_delete(struct ath_common *common, struct ieee80211_key_conf *key)
798 struct ath_hw *ah = common->ah;
800 ath9k_hw_keyreset(ah, key->hw_key_idx);
801 if (key->hw_key_idx < IEEE80211_WEP_NKID)
804 clear_bit(key->hw_key_idx, common->keymap);
805 if (key->alg != ALG_TKIP)
808 clear_bit(key->hw_key_idx + 64, common->keymap);
809 if (common->splitmic) {
810 clear_bit(key->hw_key_idx + 32, common->keymap);
811 clear_bit(key->hw_key_idx + 64 + 32, common->keymap);
815 static void ath9k_bss_assoc_info(struct ath_softc *sc,
816 struct ieee80211_vif *vif,
817 struct ieee80211_bss_conf *bss_conf)
819 struct ath_hw *ah = sc->sc_ah;
820 struct ath_common *common = ath9k_hw_common(ah);
822 if (bss_conf->assoc) {
823 ath_print(common, ATH_DBG_CONFIG,
824 "Bss Info ASSOC %d, bssid: %pM\n",
825 bss_conf->aid, common->curbssid);
827 /* New association, store aid */
828 common->curaid = bss_conf->aid;
829 ath9k_hw_write_associd(ah);
832 * Request a re-configuration of Beacon related timers
833 * on the receipt of the first Beacon frame (i.e.,
834 * after time sync with the AP).
836 sc->ps_flags |= PS_BEACON_SYNC;
838 /* Configure the beacon */
839 ath_beacon_config(sc, vif);
841 /* Reset rssi stats */
842 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
844 ath_start_ani(common);
846 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
849 del_timer_sync(&common->ani.timer);
853 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
855 struct ath_hw *ah = sc->sc_ah;
856 struct ath_common *common = ath9k_hw_common(ah);
857 struct ieee80211_channel *channel = hw->conf.channel;
861 ath9k_hw_configpcipowersave(ah, 0, 0);
864 ah->curchan = ath_get_curchannel(sc, sc->hw);
866 spin_lock_bh(&sc->sc_resetlock);
867 r = ath9k_hw_reset(ah, ah->curchan, false);
869 ath_print(common, ATH_DBG_FATAL,
870 "Unable to reset channel %u (%uMhz) ",
872 channel->center_freq, r);
874 spin_unlock_bh(&sc->sc_resetlock);
876 ath_update_txpow(sc);
877 if (ath_startrecv(sc) != 0) {
878 ath_print(common, ATH_DBG_FATAL,
879 "Unable to restart recv logic\n");
883 if (sc->sc_flags & SC_OP_BEACONS)
884 ath_beacon_config(sc, NULL); /* restart beacons */
886 /* Re-Enable interrupts */
887 ath9k_hw_set_interrupts(ah, sc->imask);
890 ath9k_hw_cfg_output(ah, ah->led_pin,
891 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
892 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
894 ieee80211_wake_queues(hw);
895 ath9k_ps_restore(sc);
898 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
900 struct ath_hw *ah = sc->sc_ah;
901 struct ieee80211_channel *channel = hw->conf.channel;
905 ieee80211_stop_queues(hw);
908 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
909 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
911 /* Disable interrupts */
912 ath9k_hw_set_interrupts(ah, 0);
914 ath_drain_all_txq(sc, false); /* clear pending tx frames */
915 ath_stoprecv(sc); /* turn off frame recv */
916 ath_flushrecv(sc); /* flush recv queue */
919 ah->curchan = ath_get_curchannel(sc, hw);
921 spin_lock_bh(&sc->sc_resetlock);
922 r = ath9k_hw_reset(ah, ah->curchan, false);
924 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
925 "Unable to reset channel %u (%uMhz) "
927 channel->center_freq, r);
929 spin_unlock_bh(&sc->sc_resetlock);
931 ath9k_hw_phy_disable(ah);
932 ath9k_hw_configpcipowersave(ah, 1, 1);
933 ath9k_ps_restore(sc);
934 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
937 int ath_reset(struct ath_softc *sc, bool retry_tx)
939 struct ath_hw *ah = sc->sc_ah;
940 struct ath_common *common = ath9k_hw_common(ah);
941 struct ieee80211_hw *hw = sc->hw;
945 del_timer_sync(&common->ani.timer);
947 ath9k_hw_set_interrupts(ah, 0);
948 ath_drain_all_txq(sc, retry_tx);
952 spin_lock_bh(&sc->sc_resetlock);
953 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
955 ath_print(common, ATH_DBG_FATAL,
956 "Unable to reset hardware; reset status %d\n", r);
957 spin_unlock_bh(&sc->sc_resetlock);
959 if (ath_startrecv(sc) != 0)
960 ath_print(common, ATH_DBG_FATAL,
961 "Unable to start recv logic\n");
964 * We may be doing a reset in response to a request
965 * that changes the channel so update any state that
966 * might change as a result.
968 ath_cache_conf_rate(sc, &hw->conf);
970 ath_update_txpow(sc);
972 if (sc->sc_flags & SC_OP_BEACONS)
973 ath_beacon_config(sc, NULL); /* restart beacons */
975 ath9k_hw_set_interrupts(ah, sc->imask);
979 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
980 if (ATH_TXQ_SETUP(sc, i)) {
981 spin_lock_bh(&sc->tx.txq[i].axq_lock);
982 ath_txq_schedule(sc, &sc->tx.txq[i]);
983 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
989 ath_start_ani(common);
994 int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
1000 qnum = sc->tx.hwq_map[ATH9K_WME_AC_VO];
1003 qnum = sc->tx.hwq_map[ATH9K_WME_AC_VI];
1006 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
1009 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BK];
1012 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
1019 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1024 case ATH9K_WME_AC_VO:
1027 case ATH9K_WME_AC_VI:
1030 case ATH9K_WME_AC_BE:
1033 case ATH9K_WME_AC_BK:
1044 /* XXX: Remove me once we don't depend on ath9k_channel for all
1045 * this redundant data */
1046 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1047 struct ath9k_channel *ichan)
1049 struct ieee80211_channel *chan = hw->conf.channel;
1050 struct ieee80211_conf *conf = &hw->conf;
1052 ichan->channel = chan->center_freq;
1055 if (chan->band == IEEE80211_BAND_2GHZ) {
1056 ichan->chanmode = CHANNEL_G;
1057 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1059 ichan->chanmode = CHANNEL_A;
1060 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1063 if (conf_is_ht(conf))
1064 ichan->chanmode = ath_get_extchanmode(sc, chan,
1065 conf->channel_type);
1068 /**********************/
1069 /* mac80211 callbacks */
1070 /**********************/
1072 static int ath9k_start(struct ieee80211_hw *hw)
1074 struct ath_wiphy *aphy = hw->priv;
1075 struct ath_softc *sc = aphy->sc;
1076 struct ath_hw *ah = sc->sc_ah;
1077 struct ath_common *common = ath9k_hw_common(ah);
1078 struct ieee80211_channel *curchan = hw->conf.channel;
1079 struct ath9k_channel *init_channel;
1082 ath_print(common, ATH_DBG_CONFIG,
1083 "Starting driver with initial channel: %d MHz\n",
1084 curchan->center_freq);
1086 mutex_lock(&sc->mutex);
1088 if (ath9k_wiphy_started(sc)) {
1089 if (sc->chan_idx == curchan->hw_value) {
1091 * Already on the operational channel, the new wiphy
1092 * can be marked active.
1094 aphy->state = ATH_WIPHY_ACTIVE;
1095 ieee80211_wake_queues(hw);
1098 * Another wiphy is on another channel, start the new
1099 * wiphy in paused state.
1101 aphy->state = ATH_WIPHY_PAUSED;
1102 ieee80211_stop_queues(hw);
1104 mutex_unlock(&sc->mutex);
1107 aphy->state = ATH_WIPHY_ACTIVE;
1109 /* setup initial channel */
1111 sc->chan_idx = curchan->hw_value;
1113 init_channel = ath_get_curchannel(sc, hw);
1115 /* Reset SERDES registers */
1116 ath9k_hw_configpcipowersave(ah, 0, 0);
1119 * The basic interface to setting the hardware in a good
1120 * state is ``reset''. On return the hardware is known to
1121 * be powered up and with interrupts disabled. This must
1122 * be followed by initialization of the appropriate bits
1123 * and then setup of the interrupt mask.
1125 spin_lock_bh(&sc->sc_resetlock);
1126 r = ath9k_hw_reset(ah, init_channel, false);
1128 ath_print(common, ATH_DBG_FATAL,
1129 "Unable to reset hardware; reset status %d "
1130 "(freq %u MHz)\n", r,
1131 curchan->center_freq);
1132 spin_unlock_bh(&sc->sc_resetlock);
1135 spin_unlock_bh(&sc->sc_resetlock);
1138 * This is needed only to setup initial state
1139 * but it's best done after a reset.
1141 ath_update_txpow(sc);
1144 * Setup the hardware after reset:
1145 * The receive engine is set going.
1146 * Frame transmit is handled entirely
1147 * in the frame output path; there's nothing to do
1148 * here except setup the interrupt mask.
1150 if (ath_startrecv(sc) != 0) {
1151 ath_print(common, ATH_DBG_FATAL,
1152 "Unable to start recv logic\n");
1157 /* Setup our intr mask. */
1158 sc->imask = ATH9K_INT_RX | ATH9K_INT_TX
1159 | ATH9K_INT_RXEOL | ATH9K_INT_RXORN
1160 | ATH9K_INT_FATAL | ATH9K_INT_GLOBAL;
1162 if (ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
1163 sc->imask |= ATH9K_INT_GTT;
1165 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1166 sc->imask |= ATH9K_INT_CST;
1168 ath_cache_conf_rate(sc, &hw->conf);
1170 sc->sc_flags &= ~SC_OP_INVALID;
1172 /* Disable BMISS interrupt when we're not associated */
1173 sc->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1174 ath9k_hw_set_interrupts(ah, sc->imask);
1176 ieee80211_wake_queues(hw);
1178 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1180 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1181 !ah->btcoex_hw.enabled) {
1182 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1183 AR_STOMP_LOW_WLAN_WGHT);
1184 ath9k_hw_btcoex_enable(ah);
1186 if (common->bus_ops->bt_coex_prep)
1187 common->bus_ops->bt_coex_prep(common);
1188 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1189 ath9k_btcoex_timer_resume(sc);
1193 mutex_unlock(&sc->mutex);
1198 static int ath9k_tx(struct ieee80211_hw *hw,
1199 struct sk_buff *skb)
1201 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1202 struct ath_wiphy *aphy = hw->priv;
1203 struct ath_softc *sc = aphy->sc;
1204 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1205 struct ath_tx_control txctl;
1206 int padpos, padsize;
1207 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1209 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1210 ath_print(common, ATH_DBG_XMIT,
1211 "ath9k: %s: TX in unexpected wiphy state "
1212 "%d\n", wiphy_name(hw->wiphy), aphy->state);
1216 if (sc->ps_enabled) {
1218 * mac80211 does not set PM field for normal data frames, so we
1219 * need to update that based on the current PS mode.
1221 if (ieee80211_is_data(hdr->frame_control) &&
1222 !ieee80211_is_nullfunc(hdr->frame_control) &&
1223 !ieee80211_has_pm(hdr->frame_control)) {
1224 ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1225 "while in PS mode\n");
1226 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1230 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1232 * We are using PS-Poll and mac80211 can request TX while in
1233 * power save mode. Need to wake up hardware for the TX to be
1234 * completed and if needed, also for RX of buffered frames.
1236 ath9k_ps_wakeup(sc);
1237 ath9k_hw_setrxabort(sc->sc_ah, 0);
1238 if (ieee80211_is_pspoll(hdr->frame_control)) {
1239 ath_print(common, ATH_DBG_PS,
1240 "Sending PS-Poll to pick a buffered frame\n");
1241 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1243 ath_print(common, ATH_DBG_PS,
1244 "Wake up to complete TX\n");
1245 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1248 * The actual restore operation will happen only after
1249 * the sc_flags bit is cleared. We are just dropping
1250 * the ps_usecount here.
1252 ath9k_ps_restore(sc);
1255 memset(&txctl, 0, sizeof(struct ath_tx_control));
1258 * As a temporary workaround, assign seq# here; this will likely need
1259 * to be cleaned up to work better with Beacon transmission and virtual
1262 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1263 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1264 sc->tx.seq_no += 0x10;
1265 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1266 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1269 /* Add the padding after the header if this is not already done */
1270 padpos = ath9k_cmn_padpos(hdr->frame_control);
1271 padsize = padpos & 3;
1272 if (padsize && skb->len>padpos) {
1273 if (skb_headroom(skb) < padsize)
1275 skb_push(skb, padsize);
1276 memmove(skb->data, skb->data + padsize, padpos);
1279 /* Check if a tx queue is available */
1281 txctl.txq = ath_test_get_txq(sc, skb);
1285 ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1287 if (ath_tx_start(hw, skb, &txctl) != 0) {
1288 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1294 dev_kfree_skb_any(skb);
1298 static void ath9k_stop(struct ieee80211_hw *hw)
1300 struct ath_wiphy *aphy = hw->priv;
1301 struct ath_softc *sc = aphy->sc;
1302 struct ath_hw *ah = sc->sc_ah;
1303 struct ath_common *common = ath9k_hw_common(ah);
1305 mutex_lock(&sc->mutex);
1307 aphy->state = ATH_WIPHY_INACTIVE;
1309 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1310 cancel_delayed_work_sync(&sc->tx_complete_work);
1312 if (!sc->num_sec_wiphy) {
1313 cancel_delayed_work_sync(&sc->wiphy_work);
1314 cancel_work_sync(&sc->chan_work);
1317 if (sc->sc_flags & SC_OP_INVALID) {
1318 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1319 mutex_unlock(&sc->mutex);
1323 if (ath9k_wiphy_started(sc)) {
1324 mutex_unlock(&sc->mutex);
1325 return; /* another wiphy still in use */
1328 /* Ensure HW is awake when we try to shut it down. */
1329 ath9k_ps_wakeup(sc);
1331 if (ah->btcoex_hw.enabled) {
1332 ath9k_hw_btcoex_disable(ah);
1333 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1334 ath9k_btcoex_timer_pause(sc);
1337 /* make sure h/w will not generate any interrupt
1338 * before setting the invalid flag. */
1339 ath9k_hw_set_interrupts(ah, 0);
1341 if (!(sc->sc_flags & SC_OP_INVALID)) {
1342 ath_drain_all_txq(sc, false);
1344 ath9k_hw_phy_disable(ah);
1346 sc->rx.rxlink = NULL;
1348 /* disable HAL and put h/w to sleep */
1349 ath9k_hw_disable(ah);
1350 ath9k_hw_configpcipowersave(ah, 1, 1);
1351 ath9k_ps_restore(sc);
1353 /* Finally, put the chip in FULL SLEEP mode */
1354 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1356 sc->sc_flags |= SC_OP_INVALID;
1358 mutex_unlock(&sc->mutex);
1360 ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1363 static int ath9k_add_interface(struct ieee80211_hw *hw,
1364 struct ieee80211_vif *vif)
1366 struct ath_wiphy *aphy = hw->priv;
1367 struct ath_softc *sc = aphy->sc;
1368 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1369 struct ath_vif *avp = (void *)vif->drv_priv;
1370 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1373 mutex_lock(&sc->mutex);
1375 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) &&
1381 switch (vif->type) {
1382 case NL80211_IFTYPE_STATION:
1383 ic_opmode = NL80211_IFTYPE_STATION;
1385 case NL80211_IFTYPE_ADHOC:
1386 case NL80211_IFTYPE_AP:
1387 case NL80211_IFTYPE_MESH_POINT:
1388 if (sc->nbcnvifs >= ATH_BCBUF) {
1392 ic_opmode = vif->type;
1395 ath_print(common, ATH_DBG_FATAL,
1396 "Interface type %d not yet supported\n", vif->type);
1401 ath_print(common, ATH_DBG_CONFIG,
1402 "Attach a VIF of type: %d\n", ic_opmode);
1404 /* Set the VIF opmode */
1405 avp->av_opmode = ic_opmode;
1410 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
1411 ath9k_set_bssid_mask(hw);
1414 goto out; /* skip global settings for secondary vif */
1416 if (ic_opmode == NL80211_IFTYPE_AP) {
1417 ath9k_hw_set_tsfadjust(sc->sc_ah, 1);
1418 sc->sc_flags |= SC_OP_TSF_RESET;
1421 /* Set the device opmode */
1422 sc->sc_ah->opmode = ic_opmode;
1425 * Enable MIB interrupts when there are hardware phy counters.
1426 * Note we only do this (at the moment) for station mode.
1428 if ((vif->type == NL80211_IFTYPE_STATION) ||
1429 (vif->type == NL80211_IFTYPE_ADHOC) ||
1430 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1431 sc->imask |= ATH9K_INT_MIB;
1432 sc->imask |= ATH9K_INT_TSFOOR;
1435 ath9k_hw_set_interrupts(sc->sc_ah, sc->imask);
1437 if (vif->type == NL80211_IFTYPE_AP ||
1438 vif->type == NL80211_IFTYPE_ADHOC ||
1439 vif->type == NL80211_IFTYPE_MONITOR)
1440 ath_start_ani(common);
1443 mutex_unlock(&sc->mutex);
1447 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1448 struct ieee80211_vif *vif)
1450 struct ath_wiphy *aphy = hw->priv;
1451 struct ath_softc *sc = aphy->sc;
1452 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1453 struct ath_vif *avp = (void *)vif->drv_priv;
1456 ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1458 mutex_lock(&sc->mutex);
1461 del_timer_sync(&common->ani.timer);
1463 /* Reclaim beacon resources */
1464 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1465 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1466 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1467 ath9k_ps_wakeup(sc);
1468 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1469 ath_beacon_return(sc, avp);
1470 ath9k_ps_restore(sc);
1473 sc->sc_flags &= ~SC_OP_BEACONS;
1475 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1476 if (sc->beacon.bslot[i] == vif) {
1477 printk(KERN_DEBUG "%s: vif had allocated beacon "
1478 "slot\n", __func__);
1479 sc->beacon.bslot[i] = NULL;
1480 sc->beacon.bslot_aphy[i] = NULL;
1486 mutex_unlock(&sc->mutex);
1489 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1491 struct ath_wiphy *aphy = hw->priv;
1492 struct ath_softc *sc = aphy->sc;
1493 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1494 struct ieee80211_conf *conf = &hw->conf;
1495 struct ath_hw *ah = sc->sc_ah;
1498 mutex_lock(&sc->mutex);
1501 * Leave this as the first check because we need to turn on the
1502 * radio if it was disabled before prior to processing the rest
1503 * of the changes. Likewise we must only disable the radio towards
1506 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1508 bool all_wiphys_idle;
1509 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1511 spin_lock_bh(&sc->wiphy_lock);
1512 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
1513 ath9k_set_wiphy_idle(aphy, idle);
1515 if (!idle && all_wiphys_idle)
1516 enable_radio = true;
1519 * After we unlock here its possible another wiphy
1520 * can be re-renabled so to account for that we will
1521 * only disable the radio toward the end of this routine
1522 * if by then all wiphys are still idle.
1524 spin_unlock_bh(&sc->wiphy_lock);
1527 ath_radio_enable(sc, hw);
1528 ath_print(common, ATH_DBG_CONFIG,
1529 "not-idle: enabling radio\n");
1534 * We just prepare to enable PS. We have to wait until our AP has
1535 * ACK'd our null data frame to disable RX otherwise we'll ignore
1536 * those ACKs and end up retransmitting the same null data frames.
1537 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1539 if (changed & IEEE80211_CONF_CHANGE_PS) {
1540 if (conf->flags & IEEE80211_CONF_PS) {
1541 sc->ps_flags |= PS_ENABLED;
1542 if (!(ah->caps.hw_caps &
1543 ATH9K_HW_CAP_AUTOSLEEP)) {
1544 if ((sc->imask & ATH9K_INT_TIM_TIMER) == 0) {
1545 sc->imask |= ATH9K_INT_TIM_TIMER;
1546 ath9k_hw_set_interrupts(sc->sc_ah,
1551 * At this point we know hardware has received an ACK
1552 * of a previously sent null data frame.
1554 if ((sc->ps_flags & PS_NULLFUNC_COMPLETED)) {
1555 sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
1556 sc->ps_enabled = true;
1557 ath9k_hw_setrxabort(sc->sc_ah, 1);
1560 sc->ps_enabled = false;
1561 sc->ps_flags &= ~(PS_ENABLED |
1562 PS_NULLFUNC_COMPLETED);
1563 ath9k_setpower(sc, ATH9K_PM_AWAKE);
1564 if (!(ah->caps.hw_caps &
1565 ATH9K_HW_CAP_AUTOSLEEP)) {
1566 ath9k_hw_setrxabort(sc->sc_ah, 0);
1567 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1569 PS_WAIT_FOR_PSPOLL_DATA |
1570 PS_WAIT_FOR_TX_ACK);
1571 if (sc->imask & ATH9K_INT_TIM_TIMER) {
1572 sc->imask &= ~ATH9K_INT_TIM_TIMER;
1573 ath9k_hw_set_interrupts(sc->sc_ah,
1580 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1581 struct ieee80211_channel *curchan = hw->conf.channel;
1582 int pos = curchan->hw_value;
1584 aphy->chan_idx = pos;
1585 aphy->chan_is_ht = conf_is_ht(conf);
1587 if (aphy->state == ATH_WIPHY_SCAN ||
1588 aphy->state == ATH_WIPHY_ACTIVE)
1589 ath9k_wiphy_pause_all_forced(sc, aphy);
1592 * Do not change operational channel based on a paused
1595 goto skip_chan_change;
1598 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1599 curchan->center_freq);
1601 /* XXX: remove me eventualy */
1602 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1604 ath_update_chainmask(sc, conf_is_ht(conf));
1606 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1607 ath_print(common, ATH_DBG_FATAL,
1608 "Unable to set channel\n");
1609 mutex_unlock(&sc->mutex);
1615 if (changed & IEEE80211_CONF_CHANGE_POWER)
1616 sc->config.txpowlimit = 2 * conf->power_level;
1618 spin_lock_bh(&sc->wiphy_lock);
1619 disable_radio = ath9k_all_wiphys_idle(sc);
1620 spin_unlock_bh(&sc->wiphy_lock);
1622 if (disable_radio) {
1623 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1624 ath_radio_disable(sc, hw);
1627 mutex_unlock(&sc->mutex);
1632 #define SUPPORTED_FILTERS \
1633 (FIF_PROMISC_IN_BSS | \
1638 FIF_BCN_PRBRESP_PROMISC | \
1641 /* FIXME: sc->sc_full_reset ? */
1642 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1643 unsigned int changed_flags,
1644 unsigned int *total_flags,
1647 struct ath_wiphy *aphy = hw->priv;
1648 struct ath_softc *sc = aphy->sc;
1651 changed_flags &= SUPPORTED_FILTERS;
1652 *total_flags &= SUPPORTED_FILTERS;
1654 sc->rx.rxfilter = *total_flags;
1655 ath9k_ps_wakeup(sc);
1656 rfilt = ath_calcrxfilter(sc);
1657 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1658 ath9k_ps_restore(sc);
1660 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1661 "Set HW RX filter: 0x%x\n", rfilt);
1664 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1665 struct ieee80211_vif *vif,
1666 enum sta_notify_cmd cmd,
1667 struct ieee80211_sta *sta)
1669 struct ath_wiphy *aphy = hw->priv;
1670 struct ath_softc *sc = aphy->sc;
1673 case STA_NOTIFY_ADD:
1674 ath_node_attach(sc, sta);
1676 case STA_NOTIFY_REMOVE:
1677 ath_node_detach(sc, sta);
1684 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1685 const struct ieee80211_tx_queue_params *params)
1687 struct ath_wiphy *aphy = hw->priv;
1688 struct ath_softc *sc = aphy->sc;
1689 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1690 struct ath9k_tx_queue_info qi;
1693 if (queue >= WME_NUM_AC)
1696 mutex_lock(&sc->mutex);
1698 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1700 qi.tqi_aifs = params->aifs;
1701 qi.tqi_cwmin = params->cw_min;
1702 qi.tqi_cwmax = params->cw_max;
1703 qi.tqi_burstTime = params->txop;
1704 qnum = ath_get_hal_qnum(queue, sc);
1706 ath_print(common, ATH_DBG_CONFIG,
1707 "Configure tx [queue/halq] [%d/%d], "
1708 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1709 queue, qnum, params->aifs, params->cw_min,
1710 params->cw_max, params->txop);
1712 ret = ath_txq_update(sc, qnum, &qi);
1714 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1716 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1717 if ((qnum == sc->tx.hwq_map[ATH9K_WME_AC_BE]) && !ret)
1718 ath_beaconq_config(sc);
1720 mutex_unlock(&sc->mutex);
1725 static int ath9k_set_key(struct ieee80211_hw *hw,
1726 enum set_key_cmd cmd,
1727 struct ieee80211_vif *vif,
1728 struct ieee80211_sta *sta,
1729 struct ieee80211_key_conf *key)
1731 struct ath_wiphy *aphy = hw->priv;
1732 struct ath_softc *sc = aphy->sc;
1733 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1736 if (modparam_nohwcrypt)
1739 mutex_lock(&sc->mutex);
1740 ath9k_ps_wakeup(sc);
1741 ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1745 ret = ath_key_config(common, vif, sta, key);
1747 key->hw_key_idx = ret;
1748 /* push IV and Michael MIC generation to stack */
1749 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1750 if (key->alg == ALG_TKIP)
1751 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1752 if (sc->sc_ah->sw_mgmt_crypto && key->alg == ALG_CCMP)
1753 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1758 ath_key_delete(common, key);
1764 ath9k_ps_restore(sc);
1765 mutex_unlock(&sc->mutex);
1770 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1771 struct ieee80211_vif *vif,
1772 struct ieee80211_bss_conf *bss_conf,
1775 struct ath_wiphy *aphy = hw->priv;
1776 struct ath_softc *sc = aphy->sc;
1777 struct ath_hw *ah = sc->sc_ah;
1778 struct ath_common *common = ath9k_hw_common(ah);
1779 struct ath_vif *avp = (void *)vif->drv_priv;
1782 mutex_lock(&sc->mutex);
1784 if (changed & BSS_CHANGED_BSSID) {
1786 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1787 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1789 ath9k_hw_write_associd(ah);
1791 /* Set aggregation protection mode parameters */
1792 sc->config.ath_aggr_prot = 0;
1794 /* Only legacy IBSS for now */
1795 if (vif->type == NL80211_IFTYPE_ADHOC)
1796 ath_update_chainmask(sc, 0);
1798 ath_print(common, ATH_DBG_CONFIG,
1799 "BSSID: %pM aid: 0x%x\n",
1800 common->curbssid, common->curaid);
1802 /* need to reconfigure the beacon */
1803 sc->sc_flags &= ~SC_OP_BEACONS ;
1806 /* Enable transmission of beacons (AP, IBSS, MESH) */
1807 if ((changed & BSS_CHANGED_BEACON) ||
1808 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1809 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1810 error = ath_beacon_alloc(aphy, vif);
1812 ath_beacon_config(sc, vif);
1815 /* Disable transmission of beacons */
1816 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1817 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1819 if (changed & BSS_CHANGED_BEACON_INT) {
1820 sc->beacon_interval = bss_conf->beacon_int;
1822 * In case of AP mode, the HW TSF has to be reset
1823 * when the beacon interval changes.
1825 if (vif->type == NL80211_IFTYPE_AP) {
1826 sc->sc_flags |= SC_OP_TSF_RESET;
1827 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1828 error = ath_beacon_alloc(aphy, vif);
1830 ath_beacon_config(sc, vif);
1832 ath_beacon_config(sc, vif);
1836 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1837 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1838 bss_conf->use_short_preamble);
1839 if (bss_conf->use_short_preamble)
1840 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1842 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1845 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1846 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1847 bss_conf->use_cts_prot);
1848 if (bss_conf->use_cts_prot &&
1849 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1850 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1852 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1855 if (changed & BSS_CHANGED_ASSOC) {
1856 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1858 ath9k_bss_assoc_info(sc, vif, bss_conf);
1861 mutex_unlock(&sc->mutex);
1864 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1867 struct ath_wiphy *aphy = hw->priv;
1868 struct ath_softc *sc = aphy->sc;
1870 mutex_lock(&sc->mutex);
1871 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1872 mutex_unlock(&sc->mutex);
1877 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1879 struct ath_wiphy *aphy = hw->priv;
1880 struct ath_softc *sc = aphy->sc;
1882 mutex_lock(&sc->mutex);
1883 ath9k_hw_settsf64(sc->sc_ah, tsf);
1884 mutex_unlock(&sc->mutex);
1887 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1889 struct ath_wiphy *aphy = hw->priv;
1890 struct ath_softc *sc = aphy->sc;
1892 mutex_lock(&sc->mutex);
1894 ath9k_ps_wakeup(sc);
1895 ath9k_hw_reset_tsf(sc->sc_ah);
1896 ath9k_ps_restore(sc);
1898 mutex_unlock(&sc->mutex);
1901 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1902 struct ieee80211_vif *vif,
1903 enum ieee80211_ampdu_mlme_action action,
1904 struct ieee80211_sta *sta,
1907 struct ath_wiphy *aphy = hw->priv;
1908 struct ath_softc *sc = aphy->sc;
1912 case IEEE80211_AMPDU_RX_START:
1913 if (!(sc->sc_flags & SC_OP_RXAGGR))
1916 case IEEE80211_AMPDU_RX_STOP:
1918 case IEEE80211_AMPDU_TX_START:
1919 ath9k_ps_wakeup(sc);
1920 ath_tx_aggr_start(sc, sta, tid, ssn);
1921 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1922 ath9k_ps_restore(sc);
1924 case IEEE80211_AMPDU_TX_STOP:
1925 ath9k_ps_wakeup(sc);
1926 ath_tx_aggr_stop(sc, sta, tid);
1927 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1928 ath9k_ps_restore(sc);
1930 case IEEE80211_AMPDU_TX_OPERATIONAL:
1931 ath9k_ps_wakeup(sc);
1932 ath_tx_aggr_resume(sc, sta, tid);
1933 ath9k_ps_restore(sc);
1936 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1937 "Unknown AMPDU action\n");
1943 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
1945 struct ath_wiphy *aphy = hw->priv;
1946 struct ath_softc *sc = aphy->sc;
1947 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1949 mutex_lock(&sc->mutex);
1950 if (ath9k_wiphy_scanning(sc)) {
1951 printk(KERN_DEBUG "ath9k: Two wiphys trying to scan at the "
1954 * Do not allow the concurrent scanning state for now. This
1955 * could be improved with scanning control moved into ath9k.
1957 mutex_unlock(&sc->mutex);
1961 aphy->state = ATH_WIPHY_SCAN;
1962 ath9k_wiphy_pause_all_forced(sc, aphy);
1963 sc->sc_flags |= SC_OP_SCANNING;
1964 del_timer_sync(&common->ani.timer);
1965 cancel_delayed_work_sync(&sc->tx_complete_work);
1966 mutex_unlock(&sc->mutex);
1969 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
1971 struct ath_wiphy *aphy = hw->priv;
1972 struct ath_softc *sc = aphy->sc;
1973 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1975 mutex_lock(&sc->mutex);
1976 aphy->state = ATH_WIPHY_ACTIVE;
1977 sc->sc_flags &= ~SC_OP_SCANNING;
1978 sc->sc_flags |= SC_OP_FULL_RESET;
1979 ath_start_ani(common);
1980 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1981 ath_beacon_config(sc, NULL);
1982 mutex_unlock(&sc->mutex);
1985 struct ieee80211_ops ath9k_ops = {
1987 .start = ath9k_start,
1989 .add_interface = ath9k_add_interface,
1990 .remove_interface = ath9k_remove_interface,
1991 .config = ath9k_config,
1992 .configure_filter = ath9k_configure_filter,
1993 .sta_notify = ath9k_sta_notify,
1994 .conf_tx = ath9k_conf_tx,
1995 .bss_info_changed = ath9k_bss_info_changed,
1996 .set_key = ath9k_set_key,
1997 .get_tsf = ath9k_get_tsf,
1998 .set_tsf = ath9k_set_tsf,
1999 .reset_tsf = ath9k_reset_tsf,
2000 .ampdu_action = ath9k_ampdu_action,
2001 .sw_scan_start = ath9k_sw_scan_start,
2002 .sw_scan_complete = ath9k_sw_scan_complete,
2003 .rfkill_poll = ath9k_rfkill_poll_state,