2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
22 static u8 parse_mpdudensity(u8 mpdudensity)
25 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
26 * 0 for no restriction
35 switch (mpdudensity) {
41 /* Our lower layer calculations limit our precision to
57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
61 spin_lock_bh(&txq->axq_lock);
63 if (txq->axq_depth || !list_empty(&txq->axq_acq))
65 else if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
66 pending = !list_empty(&txq->txq_fifo_pending);
68 spin_unlock_bh(&txq->axq_lock);
72 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
77 spin_lock_irqsave(&sc->sc_pm_lock, flags);
78 ret = ath9k_hw_setpower(sc->sc_ah, mode);
79 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
84 void ath9k_ps_wakeup(struct ath_softc *sc)
86 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
88 enum ath9k_power_mode power_mode;
90 spin_lock_irqsave(&sc->sc_pm_lock, flags);
91 if (++sc->ps_usecount != 1)
94 power_mode = sc->sc_ah->power_mode;
95 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
98 * While the hardware is asleep, the cycle counters contain no
99 * useful data. Better clear them now so that they don't mess up
100 * survey data results.
102 if (power_mode != ATH9K_PM_AWAKE) {
103 spin_lock(&common->cc_lock);
104 ath_hw_cycle_counters_update(common);
105 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
106 spin_unlock(&common->cc_lock);
110 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
113 void ath9k_ps_restore(struct ath_softc *sc)
115 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
118 spin_lock_irqsave(&sc->sc_pm_lock, flags);
119 if (--sc->ps_usecount != 0)
122 spin_lock(&common->cc_lock);
123 ath_hw_cycle_counters_update(common);
124 spin_unlock(&common->cc_lock);
127 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
128 else if (sc->ps_enabled &&
129 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
131 PS_WAIT_FOR_PSPOLL_DATA |
132 PS_WAIT_FOR_TX_ACK)))
133 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
136 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
139 static void ath_start_ani(struct ath_common *common)
141 struct ath_hw *ah = common->ah;
142 unsigned long timestamp = jiffies_to_msecs(jiffies);
143 struct ath_softc *sc = (struct ath_softc *) common->priv;
145 if (!(sc->sc_flags & SC_OP_ANI_RUN))
148 if (sc->sc_flags & SC_OP_OFFCHANNEL)
151 common->ani.longcal_timer = timestamp;
152 common->ani.shortcal_timer = timestamp;
153 common->ani.checkani_timer = timestamp;
155 mod_timer(&common->ani.timer,
157 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
160 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
162 struct ath_hw *ah = sc->sc_ah;
163 struct ath9k_channel *chan = &ah->channels[channel];
164 struct survey_info *survey = &sc->survey[channel];
166 if (chan->noisefloor) {
167 survey->filled |= SURVEY_INFO_NOISE_DBM;
168 survey->noise = chan->noisefloor;
173 * Updates the survey statistics and returns the busy time since last
174 * update in %, if the measurement duration was long enough for the
175 * result to be useful, -1 otherwise.
177 static int ath_update_survey_stats(struct ath_softc *sc)
179 struct ath_hw *ah = sc->sc_ah;
180 struct ath_common *common = ath9k_hw_common(ah);
181 int pos = ah->curchan - &ah->channels[0];
182 struct survey_info *survey = &sc->survey[pos];
183 struct ath_cycle_counters *cc = &common->cc_survey;
184 unsigned int div = common->clockrate * 1000;
190 if (ah->power_mode == ATH9K_PM_AWAKE)
191 ath_hw_cycle_counters_update(common);
193 if (cc->cycles > 0) {
194 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
195 SURVEY_INFO_CHANNEL_TIME_BUSY |
196 SURVEY_INFO_CHANNEL_TIME_RX |
197 SURVEY_INFO_CHANNEL_TIME_TX;
198 survey->channel_time += cc->cycles / div;
199 survey->channel_time_busy += cc->rx_busy / div;
200 survey->channel_time_rx += cc->rx_frame / div;
201 survey->channel_time_tx += cc->tx_frame / div;
204 if (cc->cycles < div)
208 ret = cc->rx_busy * 100 / cc->cycles;
210 memset(cc, 0, sizeof(*cc));
212 ath_update_survey_nf(sc, pos);
218 * Set/change channels. If the channel is really being changed, it's done
219 * by reseting the chip. To accomplish this we must first cleanup any pending
220 * DMA, then restart stuff.
222 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
223 struct ath9k_channel *hchan)
225 struct ath_hw *ah = sc->sc_ah;
226 struct ath_common *common = ath9k_hw_common(ah);
227 struct ieee80211_conf *conf = &common->hw->conf;
228 bool fastcc = true, stopped;
229 struct ieee80211_channel *channel = hw->conf.channel;
230 struct ath9k_hw_cal_data *caldata = NULL;
233 if (sc->sc_flags & SC_OP_INVALID)
236 sc->hw_busy_count = 0;
238 del_timer_sync(&common->ani.timer);
239 cancel_work_sync(&sc->paprd_work);
240 cancel_work_sync(&sc->hw_check_work);
241 cancel_delayed_work_sync(&sc->tx_complete_work);
242 cancel_delayed_work_sync(&sc->hw_pll_work);
246 spin_lock_bh(&sc->sc_pcu_lock);
249 * This is only performed if the channel settings have
252 * To switch channels clear any pending DMA operations;
253 * wait long enough for the RX fifo to drain, reset the
254 * hardware at the new frequency, and then re-enable
255 * the relevant bits of the h/w.
257 ath9k_hw_disable_interrupts(ah);
258 stopped = ath_drain_all_txq(sc, false);
260 if (!ath_stoprecv(sc))
263 if (!ath9k_hw_check_alive(ah))
266 /* XXX: do not flush receive queue here. We don't want
267 * to flush data frames already in queue because of
268 * changing channel. */
270 if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
273 if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
274 caldata = &sc->caldata;
276 ath_dbg(common, ATH_DBG_CONFIG,
277 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
278 sc->sc_ah->curchan->channel,
279 channel->center_freq, conf_is_ht40(conf),
282 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
285 "Unable to reset channel (%u MHz), reset status %d\n",
286 channel->center_freq, r);
290 if (ath_startrecv(sc) != 0) {
291 ath_err(common, "Unable to restart recv logic\n");
296 ath9k_cmn_update_txpow(ah, sc->curtxpow,
297 sc->config.txpowlimit, &sc->curtxpow);
298 ath9k_hw_set_interrupts(ah, ah->imask);
300 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
301 if (sc->sc_flags & SC_OP_BEACONS)
302 ath_beacon_config(sc, NULL);
303 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
304 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
305 ath_start_ani(common);
309 ieee80211_wake_queues(hw);
311 spin_unlock_bh(&sc->sc_pcu_lock);
313 ath9k_ps_restore(sc);
317 static void ath_paprd_activate(struct ath_softc *sc)
319 struct ath_hw *ah = sc->sc_ah;
320 struct ath9k_hw_cal_data *caldata = ah->caldata;
321 struct ath_common *common = ath9k_hw_common(ah);
324 if (!caldata || !caldata->paprd_done)
328 ar9003_paprd_enable(ah, false);
329 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
330 if (!(common->tx_chainmask & BIT(chain)))
333 ar9003_paprd_populate_single_table(ah, caldata, chain);
336 ar9003_paprd_enable(ah, true);
337 ath9k_ps_restore(sc);
340 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
342 struct ieee80211_hw *hw = sc->hw;
343 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
344 struct ath_hw *ah = sc->sc_ah;
345 struct ath_common *common = ath9k_hw_common(ah);
346 struct ath_tx_control txctl;
349 memset(&txctl, 0, sizeof(txctl));
350 txctl.txq = sc->tx.txq_map[WME_AC_BE];
352 memset(tx_info, 0, sizeof(*tx_info));
353 tx_info->band = hw->conf.channel->band;
354 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
355 tx_info->control.rates[0].idx = 0;
356 tx_info->control.rates[0].count = 1;
357 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
358 tx_info->control.rates[1].idx = -1;
360 init_completion(&sc->paprd_complete);
361 txctl.paprd = BIT(chain);
363 if (ath_tx_start(hw, skb, &txctl) != 0) {
364 ath_dbg(common, ATH_DBG_XMIT, "PAPRD TX failed\n");
365 dev_kfree_skb_any(skb);
369 time_left = wait_for_completion_timeout(&sc->paprd_complete,
370 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
373 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
374 "Timeout waiting for paprd training on TX chain %d\n",
380 void ath_paprd_calibrate(struct work_struct *work)
382 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
383 struct ieee80211_hw *hw = sc->hw;
384 struct ath_hw *ah = sc->sc_ah;
385 struct ieee80211_hdr *hdr;
386 struct sk_buff *skb = NULL;
387 struct ath9k_hw_cal_data *caldata = ah->caldata;
388 struct ath_common *common = ath9k_hw_common(ah);
397 if (ar9003_paprd_init_table(ah) < 0)
400 skb = alloc_skb(len, GFP_KERNEL);
405 memset(skb->data, 0, len);
406 hdr = (struct ieee80211_hdr *)skb->data;
407 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
408 hdr->frame_control = cpu_to_le16(ftype);
409 hdr->duration_id = cpu_to_le16(10);
410 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
411 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
412 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
415 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
416 if (!(common->tx_chainmask & BIT(chain)))
421 ath_dbg(common, ATH_DBG_CALIBRATE,
422 "Sending PAPRD frame for thermal measurement "
423 "on chain %d\n", chain);
424 if (!ath_paprd_send_frame(sc, skb, chain))
427 ar9003_paprd_setup_gain_table(ah, chain);
429 ath_dbg(common, ATH_DBG_CALIBRATE,
430 "Sending PAPRD training frame on chain %d\n", chain);
431 if (!ath_paprd_send_frame(sc, skb, chain))
434 if (!ar9003_paprd_is_done(ah))
437 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
445 caldata->paprd_done = true;
446 ath_paprd_activate(sc);
450 ath9k_ps_restore(sc);
454 * This routine performs the periodic noise floor calibration function
455 * that is used to adjust and optimize the chip performance. This
456 * takes environmental changes (location, temperature) into account.
457 * When the task is complete, it reschedules itself depending on the
458 * appropriate interval that was calculated.
460 void ath_ani_calibrate(unsigned long data)
462 struct ath_softc *sc = (struct ath_softc *)data;
463 struct ath_hw *ah = sc->sc_ah;
464 struct ath_common *common = ath9k_hw_common(ah);
465 bool longcal = false;
466 bool shortcal = false;
467 bool aniflag = false;
468 unsigned int timestamp = jiffies_to_msecs(jiffies);
469 u32 cal_interval, short_cal_interval, long_cal_interval;
472 if (ah->caldata && ah->caldata->nfcal_interference)
473 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
475 long_cal_interval = ATH_LONG_CALINTERVAL;
477 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
478 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
480 /* Only calibrate if awake */
481 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
486 /* Long calibration runs independently of short calibration. */
487 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
489 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
490 common->ani.longcal_timer = timestamp;
493 /* Short calibration applies only while caldone is false */
494 if (!common->ani.caldone) {
495 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
497 ath_dbg(common, ATH_DBG_ANI,
498 "shortcal @%lu\n", jiffies);
499 common->ani.shortcal_timer = timestamp;
500 common->ani.resetcal_timer = timestamp;
503 if ((timestamp - common->ani.resetcal_timer) >=
504 ATH_RESTART_CALINTERVAL) {
505 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
506 if (common->ani.caldone)
507 common->ani.resetcal_timer = timestamp;
511 /* Verify whether we must check ANI */
512 if ((timestamp - common->ani.checkani_timer) >=
513 ah->config.ani_poll_interval) {
515 common->ani.checkani_timer = timestamp;
518 /* Skip all processing if there's nothing to do. */
519 if (longcal || shortcal || aniflag) {
520 /* Call ANI routine if necessary */
522 spin_lock_irqsave(&common->cc_lock, flags);
523 ath9k_hw_ani_monitor(ah, ah->curchan);
524 ath_update_survey_stats(sc);
525 spin_unlock_irqrestore(&common->cc_lock, flags);
528 /* Perform calibration if necessary */
529 if (longcal || shortcal) {
530 common->ani.caldone =
531 ath9k_hw_calibrate(ah,
533 common->rx_chainmask,
538 ath9k_ps_restore(sc);
542 * Set timer interval based on previous results.
543 * The interval must be the shortest necessary to satisfy ANI,
544 * short calibration and long calibration.
546 cal_interval = ATH_LONG_CALINTERVAL;
547 if (sc->sc_ah->config.enable_ani)
548 cal_interval = min(cal_interval,
549 (u32)ah->config.ani_poll_interval);
550 if (!common->ani.caldone)
551 cal_interval = min(cal_interval, (u32)short_cal_interval);
553 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
554 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
555 if (!ah->caldata->paprd_done)
556 ieee80211_queue_work(sc->hw, &sc->paprd_work);
557 else if (!ah->paprd_table_write_done)
558 ath_paprd_activate(sc);
562 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
565 struct ath_hw *ah = sc->sc_ah;
566 an = (struct ath_node *)sta->drv_priv;
568 #ifdef CONFIG_ATH9K_DEBUGFS
569 spin_lock(&sc->nodes_lock);
570 list_add(&an->list, &sc->nodes);
571 spin_unlock(&sc->nodes_lock);
574 if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
575 sc->sc_flags |= SC_OP_ENABLE_APM;
577 if (sc->sc_flags & SC_OP_TXAGGR) {
578 ath_tx_node_init(sc, an);
579 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
580 sta->ht_cap.ampdu_factor);
581 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
585 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
587 struct ath_node *an = (struct ath_node *)sta->drv_priv;
589 #ifdef CONFIG_ATH9K_DEBUGFS
590 spin_lock(&sc->nodes_lock);
592 spin_unlock(&sc->nodes_lock);
596 if (sc->sc_flags & SC_OP_TXAGGR)
597 ath_tx_node_cleanup(sc, an);
600 void ath_hw_check(struct work_struct *work)
602 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
603 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
608 if (ath9k_hw_check_alive(sc->sc_ah))
611 spin_lock_irqsave(&common->cc_lock, flags);
612 busy = ath_update_survey_stats(sc);
613 spin_unlock_irqrestore(&common->cc_lock, flags);
615 ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
616 "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
618 if (++sc->hw_busy_count >= 3)
620 } else if (busy >= 0)
621 sc->hw_busy_count = 0;
624 ath9k_ps_restore(sc);
627 void ath9k_tasklet(unsigned long data)
629 struct ath_softc *sc = (struct ath_softc *)data;
630 struct ath_hw *ah = sc->sc_ah;
631 struct ath_common *common = ath9k_hw_common(ah);
633 u32 status = sc->intrstatus;
636 if (status & ATH9K_INT_FATAL) {
642 spin_lock(&sc->sc_pcu_lock);
645 * Only run the baseband hang check if beacons stop working in AP or
646 * IBSS mode, because it has a high false positive rate. For station
647 * mode it should not be necessary, since the upper layers will detect
648 * this through a beacon miss automatically and the following channel
649 * change will trigger a hardware reset anyway
651 if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
652 !ath9k_hw_check_alive(ah))
653 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
655 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
656 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
659 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
661 if (status & rxmask) {
662 /* Check for high priority Rx first */
663 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
664 (status & ATH9K_INT_RXHP))
665 ath_rx_tasklet(sc, 0, true);
667 ath_rx_tasklet(sc, 0, false);
670 if (status & ATH9K_INT_TX) {
671 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
672 ath_tx_edma_tasklet(sc);
677 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
679 * TSF sync does not look correct; remain awake to sync with
682 ath_dbg(common, ATH_DBG_PS,
683 "TSFOOR - Sync with next Beacon\n");
684 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
687 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
688 if (status & ATH9K_INT_GENTIMER)
689 ath_gen_timer_isr(sc->sc_ah);
691 /* re-enable hardware interrupt */
692 ath9k_hw_enable_interrupts(ah);
694 spin_unlock(&sc->sc_pcu_lock);
695 ath9k_ps_restore(sc);
698 irqreturn_t ath_isr(int irq, void *dev)
700 #define SCHED_INTR ( \
713 struct ath_softc *sc = dev;
714 struct ath_hw *ah = sc->sc_ah;
715 struct ath_common *common = ath9k_hw_common(ah);
716 enum ath9k_int status;
720 * The hardware is not ready/present, don't
721 * touch anything. Note this can happen early
722 * on if the IRQ is shared.
724 if (sc->sc_flags & SC_OP_INVALID)
728 /* shared irq, not for us */
730 if (!ath9k_hw_intrpend(ah))
734 * Figure out the reason(s) for the interrupt. Note
735 * that the hal returns a pseudo-ISR that may include
736 * bits we haven't explicitly enabled so we mask the
737 * value to insure we only process bits we requested.
739 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
740 status &= ah->imask; /* discard unasked-for bits */
743 * If there are no status bits set, then this interrupt was not
744 * for me (should have been caught above).
749 /* Cache the status */
750 sc->intrstatus = status;
752 if (status & SCHED_INTR)
756 * If a FATAL or RXORN interrupt is received, we have to reset the
759 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
760 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
763 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
764 (status & ATH9K_INT_BB_WATCHDOG)) {
766 spin_lock(&common->cc_lock);
767 ath_hw_cycle_counters_update(common);
768 ar9003_hw_bb_watchdog_dbg_info(ah);
769 spin_unlock(&common->cc_lock);
774 if (status & ATH9K_INT_SWBA)
775 tasklet_schedule(&sc->bcon_tasklet);
777 if (status & ATH9K_INT_TXURN)
778 ath9k_hw_updatetxtriglevel(ah, true);
780 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
781 if (status & ATH9K_INT_RXEOL) {
782 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
783 ath9k_hw_set_interrupts(ah, ah->imask);
787 if (status & ATH9K_INT_MIB) {
789 * Disable interrupts until we service the MIB
790 * interrupt; otherwise it will continue to
793 ath9k_hw_disable_interrupts(ah);
795 * Let the hal handle the event. We assume
796 * it will clear whatever condition caused
799 spin_lock(&common->cc_lock);
800 ath9k_hw_proc_mib_event(ah);
801 spin_unlock(&common->cc_lock);
802 ath9k_hw_enable_interrupts(ah);
805 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
806 if (status & ATH9K_INT_TIM_TIMER) {
807 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
809 /* Clear RxAbort bit so that we can
811 ath9k_setpower(sc, ATH9K_PM_AWAKE);
812 ath9k_hw_setrxabort(sc->sc_ah, 0);
813 sc->ps_flags |= PS_WAIT_FOR_BEACON;
818 ath_debug_stat_interrupt(sc, status);
821 /* turn off every interrupt */
822 ath9k_hw_disable_interrupts(ah);
823 tasklet_schedule(&sc->intr_tq);
831 static void ath9k_bss_assoc_info(struct ath_softc *sc,
832 struct ieee80211_hw *hw,
833 struct ieee80211_vif *vif,
834 struct ieee80211_bss_conf *bss_conf)
836 struct ath_hw *ah = sc->sc_ah;
837 struct ath_common *common = ath9k_hw_common(ah);
839 if (bss_conf->assoc) {
840 ath_dbg(common, ATH_DBG_CONFIG,
841 "Bss Info ASSOC %d, bssid: %pM\n",
842 bss_conf->aid, common->curbssid);
844 /* New association, store aid */
845 common->curaid = bss_conf->aid;
846 ath9k_hw_write_associd(ah);
849 * Request a re-configuration of Beacon related timers
850 * on the receipt of the first Beacon frame (i.e.,
851 * after time sync with the AP).
853 sc->ps_flags |= PS_BEACON_SYNC;
855 /* Configure the beacon */
856 ath_beacon_config(sc, vif);
858 /* Reset rssi stats */
859 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
860 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
862 sc->sc_flags |= SC_OP_ANI_RUN;
863 ath_start_ani(common);
865 ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
868 sc->sc_flags &= ~SC_OP_ANI_RUN;
869 del_timer_sync(&common->ani.timer);
873 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
875 struct ath_hw *ah = sc->sc_ah;
876 struct ath_common *common = ath9k_hw_common(ah);
877 struct ieee80211_channel *channel = hw->conf.channel;
881 spin_lock_bh(&sc->sc_pcu_lock);
883 ath9k_hw_configpcipowersave(ah, 0, 0);
886 ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah);
888 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
891 "Unable to reset channel (%u MHz), reset status %d\n",
892 channel->center_freq, r);
895 ath9k_cmn_update_txpow(ah, sc->curtxpow,
896 sc->config.txpowlimit, &sc->curtxpow);
897 if (ath_startrecv(sc) != 0) {
898 ath_err(common, "Unable to restart recv logic\n");
901 if (sc->sc_flags & SC_OP_BEACONS)
902 ath_beacon_config(sc, NULL); /* restart beacons */
904 /* Re-Enable interrupts */
905 ath9k_hw_set_interrupts(ah, ah->imask);
908 ath9k_hw_cfg_output(ah, ah->led_pin,
909 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
910 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
912 ieee80211_wake_queues(hw);
913 ieee80211_queue_delayed_work(hw, &sc->hw_pll_work, HZ/2);
916 spin_unlock_bh(&sc->sc_pcu_lock);
918 ath9k_ps_restore(sc);
921 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
923 struct ath_hw *ah = sc->sc_ah;
924 struct ieee80211_channel *channel = hw->conf.channel;
928 cancel_delayed_work_sync(&sc->hw_pll_work);
930 spin_lock_bh(&sc->sc_pcu_lock);
932 ieee80211_stop_queues(hw);
935 * Keep the LED on when the radio is disabled
936 * during idle unassociated state.
939 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
940 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
943 /* Disable interrupts */
944 ath9k_hw_disable_interrupts(ah);
946 ath_drain_all_txq(sc, false); /* clear pending tx frames */
948 ath_stoprecv(sc); /* turn off frame recv */
949 ath_flushrecv(sc); /* flush recv queue */
952 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
954 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
956 ath_err(ath9k_hw_common(sc->sc_ah),
957 "Unable to reset channel (%u MHz), reset status %d\n",
958 channel->center_freq, r);
961 ath9k_hw_phy_disable(ah);
963 ath9k_hw_configpcipowersave(ah, 1, 1);
965 spin_unlock_bh(&sc->sc_pcu_lock);
966 ath9k_ps_restore(sc);
969 int ath_reset(struct ath_softc *sc, bool retry_tx)
971 struct ath_hw *ah = sc->sc_ah;
972 struct ath_common *common = ath9k_hw_common(ah);
973 struct ieee80211_hw *hw = sc->hw;
976 sc->hw_busy_count = 0;
979 del_timer_sync(&common->ani.timer);
982 spin_lock_bh(&sc->sc_pcu_lock);
984 ieee80211_stop_queues(hw);
986 ath9k_hw_disable_interrupts(ah);
987 ath_drain_all_txq(sc, retry_tx);
992 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
995 "Unable to reset hardware; reset status %d\n", r);
997 if (ath_startrecv(sc) != 0)
998 ath_err(common, "Unable to start recv logic\n");
1001 * We may be doing a reset in response to a request
1002 * that changes the channel so update any state that
1003 * might change as a result.
1005 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1006 sc->config.txpowlimit, &sc->curtxpow);
1008 if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1009 ath_beacon_config(sc, NULL); /* restart beacons */
1011 ath9k_hw_set_interrupts(ah, ah->imask);
1015 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1016 if (ATH_TXQ_SETUP(sc, i)) {
1017 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1018 ath_txq_schedule(sc, &sc->tx.txq[i]);
1019 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1024 ieee80211_wake_queues(hw);
1025 spin_unlock_bh(&sc->sc_pcu_lock);
1028 ath_start_ani(common);
1029 ath9k_ps_restore(sc);
1034 /**********************/
1035 /* mac80211 callbacks */
1036 /**********************/
1038 static int ath9k_start(struct ieee80211_hw *hw)
1040 struct ath_softc *sc = hw->priv;
1041 struct ath_hw *ah = sc->sc_ah;
1042 struct ath_common *common = ath9k_hw_common(ah);
1043 struct ieee80211_channel *curchan = hw->conf.channel;
1044 struct ath9k_channel *init_channel;
1047 ath_dbg(common, ATH_DBG_CONFIG,
1048 "Starting driver with initial channel: %d MHz\n",
1049 curchan->center_freq);
1051 mutex_lock(&sc->mutex);
1053 /* setup initial channel */
1054 sc->chan_idx = curchan->hw_value;
1056 init_channel = ath9k_cmn_get_curchannel(hw, ah);
1058 /* Reset SERDES registers */
1059 ath9k_hw_configpcipowersave(ah, 0, 0);
1062 * The basic interface to setting the hardware in a good
1063 * state is ``reset''. On return the hardware is known to
1064 * be powered up and with interrupts disabled. This must
1065 * be followed by initialization of the appropriate bits
1066 * and then setup of the interrupt mask.
1068 spin_lock_bh(&sc->sc_pcu_lock);
1069 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1072 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1073 r, curchan->center_freq);
1074 spin_unlock_bh(&sc->sc_pcu_lock);
1079 * This is needed only to setup initial state
1080 * but it's best done after a reset.
1082 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1083 sc->config.txpowlimit, &sc->curtxpow);
1086 * Setup the hardware after reset:
1087 * The receive engine is set going.
1088 * Frame transmit is handled entirely
1089 * in the frame output path; there's nothing to do
1090 * here except setup the interrupt mask.
1092 if (ath_startrecv(sc) != 0) {
1093 ath_err(common, "Unable to start recv logic\n");
1095 spin_unlock_bh(&sc->sc_pcu_lock);
1098 spin_unlock_bh(&sc->sc_pcu_lock);
1100 /* Setup our intr mask. */
1101 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1102 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1105 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1106 ah->imask |= ATH9K_INT_RXHP |
1108 ATH9K_INT_BB_WATCHDOG;
1110 ah->imask |= ATH9K_INT_RX;
1112 ah->imask |= ATH9K_INT_GTT;
1114 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1115 ah->imask |= ATH9K_INT_CST;
1117 sc->sc_flags &= ~SC_OP_INVALID;
1118 sc->sc_ah->is_monitoring = false;
1120 /* Disable BMISS interrupt when we're not associated */
1121 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1122 ath9k_hw_set_interrupts(ah, ah->imask);
1124 ieee80211_wake_queues(hw);
1126 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1128 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1129 !ah->btcoex_hw.enabled) {
1130 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1131 AR_STOMP_LOW_WLAN_WGHT);
1132 ath9k_hw_btcoex_enable(ah);
1134 if (common->bus_ops->bt_coex_prep)
1135 common->bus_ops->bt_coex_prep(common);
1136 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1137 ath9k_btcoex_timer_resume(sc);
1140 if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1141 common->bus_ops->extn_synch_en(common);
1144 mutex_unlock(&sc->mutex);
1149 static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1151 struct ath_softc *sc = hw->priv;
1152 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1153 struct ath_tx_control txctl;
1154 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1156 if (sc->ps_enabled) {
1158 * mac80211 does not set PM field for normal data frames, so we
1159 * need to update that based on the current PS mode.
1161 if (ieee80211_is_data(hdr->frame_control) &&
1162 !ieee80211_is_nullfunc(hdr->frame_control) &&
1163 !ieee80211_has_pm(hdr->frame_control)) {
1164 ath_dbg(common, ATH_DBG_PS,
1165 "Add PM=1 for a TX frame while in PS mode\n");
1166 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1170 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1172 * We are using PS-Poll and mac80211 can request TX while in
1173 * power save mode. Need to wake up hardware for the TX to be
1174 * completed and if needed, also for RX of buffered frames.
1176 ath9k_ps_wakeup(sc);
1177 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1178 ath9k_hw_setrxabort(sc->sc_ah, 0);
1179 if (ieee80211_is_pspoll(hdr->frame_control)) {
1180 ath_dbg(common, ATH_DBG_PS,
1181 "Sending PS-Poll to pick a buffered frame\n");
1182 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1184 ath_dbg(common, ATH_DBG_PS,
1185 "Wake up to complete TX\n");
1186 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1189 * The actual restore operation will happen only after
1190 * the sc_flags bit is cleared. We are just dropping
1191 * the ps_usecount here.
1193 ath9k_ps_restore(sc);
1196 memset(&txctl, 0, sizeof(struct ath_tx_control));
1197 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1199 ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1201 if (ath_tx_start(hw, skb, &txctl) != 0) {
1202 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1208 dev_kfree_skb_any(skb);
1211 static void ath9k_stop(struct ieee80211_hw *hw)
1213 struct ath_softc *sc = hw->priv;
1214 struct ath_hw *ah = sc->sc_ah;
1215 struct ath_common *common = ath9k_hw_common(ah);
1217 mutex_lock(&sc->mutex);
1220 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1222 cancel_delayed_work_sync(&sc->tx_complete_work);
1223 cancel_delayed_work_sync(&sc->hw_pll_work);
1224 cancel_work_sync(&sc->paprd_work);
1225 cancel_work_sync(&sc->hw_check_work);
1227 if (sc->sc_flags & SC_OP_INVALID) {
1228 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1229 mutex_unlock(&sc->mutex);
1233 /* Ensure HW is awake when we try to shut it down. */
1234 ath9k_ps_wakeup(sc);
1236 if (ah->btcoex_hw.enabled) {
1237 ath9k_hw_btcoex_disable(ah);
1238 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1239 ath9k_btcoex_timer_pause(sc);
1242 spin_lock_bh(&sc->sc_pcu_lock);
1244 /* prevent tasklets to enable interrupts once we disable them */
1245 ah->imask &= ~ATH9K_INT_GLOBAL;
1247 /* make sure h/w will not generate any interrupt
1248 * before setting the invalid flag. */
1249 ath9k_hw_disable_interrupts(ah);
1251 if (!(sc->sc_flags & SC_OP_INVALID)) {
1252 ath_drain_all_txq(sc, false);
1254 ath9k_hw_phy_disable(ah);
1256 sc->rx.rxlink = NULL;
1259 dev_kfree_skb_any(sc->rx.frag);
1263 /* disable HAL and put h/w to sleep */
1264 ath9k_hw_disable(ah);
1265 ath9k_hw_configpcipowersave(ah, 1, 1);
1267 spin_unlock_bh(&sc->sc_pcu_lock);
1269 /* we can now sync irq and kill any running tasklets, since we already
1270 * disabled interrupts and not holding a spin lock */
1271 synchronize_irq(sc->irq);
1272 tasklet_kill(&sc->intr_tq);
1273 tasklet_kill(&sc->bcon_tasklet);
1275 ath9k_ps_restore(sc);
1278 ath_radio_disable(sc, hw);
1280 sc->sc_flags |= SC_OP_INVALID;
1282 mutex_unlock(&sc->mutex);
1284 ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1287 bool ath9k_uses_beacons(int type)
1290 case NL80211_IFTYPE_AP:
1291 case NL80211_IFTYPE_ADHOC:
1292 case NL80211_IFTYPE_MESH_POINT:
1299 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1300 struct ieee80211_vif *vif)
1302 struct ath_vif *avp = (void *)vif->drv_priv;
1304 ath9k_set_beaconing_status(sc, false);
1305 ath_beacon_return(sc, avp);
1306 ath9k_set_beaconing_status(sc, true);
1307 sc->sc_flags &= ~SC_OP_BEACONS;
1310 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1312 struct ath9k_vif_iter_data *iter_data = data;
1315 if (iter_data->hw_macaddr)
1316 for (i = 0; i < ETH_ALEN; i++)
1317 iter_data->mask[i] &=
1318 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1320 switch (vif->type) {
1321 case NL80211_IFTYPE_AP:
1324 case NL80211_IFTYPE_STATION:
1325 iter_data->nstations++;
1327 case NL80211_IFTYPE_ADHOC:
1328 iter_data->nadhocs++;
1330 case NL80211_IFTYPE_MESH_POINT:
1331 iter_data->nmeshes++;
1333 case NL80211_IFTYPE_WDS:
1337 iter_data->nothers++;
1342 /* Called with sc->mutex held. */
1343 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1344 struct ieee80211_vif *vif,
1345 struct ath9k_vif_iter_data *iter_data)
1347 struct ath_softc *sc = hw->priv;
1348 struct ath_hw *ah = sc->sc_ah;
1349 struct ath_common *common = ath9k_hw_common(ah);
1352 * Use the hardware MAC address as reference, the hardware uses it
1353 * together with the BSSID mask when matching addresses.
1355 memset(iter_data, 0, sizeof(*iter_data));
1356 iter_data->hw_macaddr = common->macaddr;
1357 memset(&iter_data->mask, 0xff, ETH_ALEN);
1360 ath9k_vif_iter(iter_data, vif->addr, vif);
1362 /* Get list of all active MAC addresses */
1363 ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1367 /* Called with sc->mutex held. */
1368 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1369 struct ieee80211_vif *vif)
1371 struct ath_softc *sc = hw->priv;
1372 struct ath_hw *ah = sc->sc_ah;
1373 struct ath_common *common = ath9k_hw_common(ah);
1374 struct ath9k_vif_iter_data iter_data;
1376 ath9k_calculate_iter_data(hw, vif, &iter_data);
1378 ath9k_ps_wakeup(sc);
1379 /* Set BSSID mask. */
1380 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1381 ath_hw_setbssidmask(common);
1383 /* Set op-mode & TSF */
1384 if (iter_data.naps > 0) {
1385 ath9k_hw_set_tsfadjust(ah, 1);
1386 sc->sc_flags |= SC_OP_TSF_RESET;
1387 ah->opmode = NL80211_IFTYPE_AP;
1389 ath9k_hw_set_tsfadjust(ah, 0);
1390 sc->sc_flags &= ~SC_OP_TSF_RESET;
1392 if (iter_data.nwds + iter_data.nmeshes)
1393 ah->opmode = NL80211_IFTYPE_AP;
1394 else if (iter_data.nadhocs)
1395 ah->opmode = NL80211_IFTYPE_ADHOC;
1397 ah->opmode = NL80211_IFTYPE_STATION;
1401 * Enable MIB interrupts when there are hardware phy counters.
1403 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1404 if (ah->config.enable_ani)
1405 ah->imask |= ATH9K_INT_MIB;
1406 ah->imask |= ATH9K_INT_TSFOOR;
1408 ah->imask &= ~ATH9K_INT_MIB;
1409 ah->imask &= ~ATH9K_INT_TSFOOR;
1412 ath9k_hw_set_interrupts(ah, ah->imask);
1413 ath9k_ps_restore(sc);
1416 if ((iter_data.naps + iter_data.nadhocs) > 0) {
1417 sc->sc_flags |= SC_OP_ANI_RUN;
1418 ath_start_ani(common);
1420 sc->sc_flags &= ~SC_OP_ANI_RUN;
1421 del_timer_sync(&common->ani.timer);
1425 /* Called with sc->mutex held, vif counts set up properly. */
1426 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1427 struct ieee80211_vif *vif)
1429 struct ath_softc *sc = hw->priv;
1431 ath9k_calculate_summary_state(hw, vif);
1433 if (ath9k_uses_beacons(vif->type)) {
1435 /* This may fail because upper levels do not have beacons
1436 * properly configured yet. That's OK, we assume it
1437 * will be properly configured and then we will be notified
1438 * in the info_changed method and set up beacons properly
1441 ath9k_set_beaconing_status(sc, false);
1442 error = ath_beacon_alloc(sc, vif);
1444 ath_beacon_config(sc, vif);
1445 ath9k_set_beaconing_status(sc, true);
1450 static int ath9k_add_interface(struct ieee80211_hw *hw,
1451 struct ieee80211_vif *vif)
1453 struct ath_softc *sc = hw->priv;
1454 struct ath_hw *ah = sc->sc_ah;
1455 struct ath_common *common = ath9k_hw_common(ah);
1456 struct ath_vif *avp = (void *)vif->drv_priv;
1459 mutex_lock(&sc->mutex);
1461 switch (vif->type) {
1462 case NL80211_IFTYPE_STATION:
1463 case NL80211_IFTYPE_WDS:
1464 case NL80211_IFTYPE_ADHOC:
1465 case NL80211_IFTYPE_AP:
1466 case NL80211_IFTYPE_MESH_POINT:
1469 ath_err(common, "Interface type %d not yet supported\n",
1475 if (ath9k_uses_beacons(vif->type)) {
1476 if (sc->nbcnvifs >= ATH_BCBUF) {
1477 ath_err(common, "Not enough beacon buffers when adding"
1478 " new interface of type: %i\n",
1485 if ((vif->type == NL80211_IFTYPE_ADHOC) &&
1487 ath_err(common, "Cannot create ADHOC interface when other"
1488 " interfaces already exist.\n");
1493 ath_dbg(common, ATH_DBG_CONFIG,
1494 "Attach a VIF of type: %d\n", vif->type);
1496 /* Set the VIF opmode */
1497 avp->av_opmode = vif->type;
1502 ath9k_do_vif_add_setup(hw, vif);
1504 mutex_unlock(&sc->mutex);
1508 static int ath9k_change_interface(struct ieee80211_hw *hw,
1509 struct ieee80211_vif *vif,
1510 enum nl80211_iftype new_type,
1513 struct ath_softc *sc = hw->priv;
1514 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1517 ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1518 mutex_lock(&sc->mutex);
1520 /* See if new interface type is valid. */
1521 if ((new_type == NL80211_IFTYPE_ADHOC) &&
1523 ath_err(common, "When using ADHOC, it must be the only"
1529 if (ath9k_uses_beacons(new_type) &&
1530 !ath9k_uses_beacons(vif->type)) {
1531 if (sc->nbcnvifs >= ATH_BCBUF) {
1532 ath_err(common, "No beacon slot available\n");
1538 /* Clean up old vif stuff */
1539 if (ath9k_uses_beacons(vif->type))
1540 ath9k_reclaim_beacon(sc, vif);
1542 /* Add new settings */
1543 vif->type = new_type;
1546 ath9k_do_vif_add_setup(hw, vif);
1548 mutex_unlock(&sc->mutex);
1552 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1553 struct ieee80211_vif *vif)
1555 struct ath_softc *sc = hw->priv;
1556 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1558 ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1560 mutex_lock(&sc->mutex);
1564 /* Reclaim beacon resources */
1565 if (ath9k_uses_beacons(vif->type))
1566 ath9k_reclaim_beacon(sc, vif);
1568 ath9k_calculate_summary_state(hw, NULL);
1570 mutex_unlock(&sc->mutex);
1573 static void ath9k_enable_ps(struct ath_softc *sc)
1575 struct ath_hw *ah = sc->sc_ah;
1577 sc->ps_enabled = true;
1578 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1579 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1580 ah->imask |= ATH9K_INT_TIM_TIMER;
1581 ath9k_hw_set_interrupts(ah, ah->imask);
1583 ath9k_hw_setrxabort(ah, 1);
1587 static void ath9k_disable_ps(struct ath_softc *sc)
1589 struct ath_hw *ah = sc->sc_ah;
1591 sc->ps_enabled = false;
1592 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1593 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1594 ath9k_hw_setrxabort(ah, 0);
1595 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1597 PS_WAIT_FOR_PSPOLL_DATA |
1598 PS_WAIT_FOR_TX_ACK);
1599 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1600 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1601 ath9k_hw_set_interrupts(ah, ah->imask);
1607 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1609 struct ath_softc *sc = hw->priv;
1610 struct ath_hw *ah = sc->sc_ah;
1611 struct ath_common *common = ath9k_hw_common(ah);
1612 struct ieee80211_conf *conf = &hw->conf;
1613 bool disable_radio = false;
1615 mutex_lock(&sc->mutex);
1618 * Leave this as the first check because we need to turn on the
1619 * radio if it was disabled before prior to processing the rest
1620 * of the changes. Likewise we must only disable the radio towards
1623 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1624 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1626 ath_radio_enable(sc, hw);
1627 ath_dbg(common, ATH_DBG_CONFIG,
1628 "not-idle: enabling radio\n");
1630 disable_radio = true;
1635 * We just prepare to enable PS. We have to wait until our AP has
1636 * ACK'd our null data frame to disable RX otherwise we'll ignore
1637 * those ACKs and end up retransmitting the same null data frames.
1638 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1640 if (changed & IEEE80211_CONF_CHANGE_PS) {
1641 unsigned long flags;
1642 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1643 if (conf->flags & IEEE80211_CONF_PS)
1644 ath9k_enable_ps(sc);
1646 ath9k_disable_ps(sc);
1647 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1650 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1651 if (conf->flags & IEEE80211_CONF_MONITOR) {
1652 ath_dbg(common, ATH_DBG_CONFIG,
1653 "Monitor mode is enabled\n");
1654 sc->sc_ah->is_monitoring = true;
1656 ath_dbg(common, ATH_DBG_CONFIG,
1657 "Monitor mode is disabled\n");
1658 sc->sc_ah->is_monitoring = false;
1662 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1663 struct ieee80211_channel *curchan = hw->conf.channel;
1664 int pos = curchan->hw_value;
1666 unsigned long flags;
1669 old_pos = ah->curchan - &ah->channels[0];
1671 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1672 sc->sc_flags |= SC_OP_OFFCHANNEL;
1674 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1676 ath_dbg(common, ATH_DBG_CONFIG,
1677 "Set channel: %d MHz type: %d\n",
1678 curchan->center_freq, conf->channel_type);
1680 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1681 curchan, conf->channel_type);
1683 /* update survey stats for the old channel before switching */
1684 spin_lock_irqsave(&common->cc_lock, flags);
1685 ath_update_survey_stats(sc);
1686 spin_unlock_irqrestore(&common->cc_lock, flags);
1689 * If the operating channel changes, change the survey in-use flags
1691 * Reset the survey data for the new channel, unless we're switching
1692 * back to the operating channel from an off-channel operation.
1694 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1695 sc->cur_survey != &sc->survey[pos]) {
1698 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1700 sc->cur_survey = &sc->survey[pos];
1702 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1703 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1704 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1705 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1708 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1709 ath_err(common, "Unable to set channel\n");
1710 mutex_unlock(&sc->mutex);
1715 * The most recent snapshot of channel->noisefloor for the old
1716 * channel is only available after the hardware reset. Copy it to
1717 * the survey stats now.
1720 ath_update_survey_nf(sc, old_pos);
1723 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1724 ath_dbg(common, ATH_DBG_CONFIG,
1725 "Set power: %d\n", conf->power_level);
1726 sc->config.txpowlimit = 2 * conf->power_level;
1727 ath9k_ps_wakeup(sc);
1728 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1729 sc->config.txpowlimit, &sc->curtxpow);
1730 ath9k_ps_restore(sc);
1733 if (disable_radio) {
1734 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1735 ath_radio_disable(sc, hw);
1738 mutex_unlock(&sc->mutex);
1743 #define SUPPORTED_FILTERS \
1744 (FIF_PROMISC_IN_BSS | \
1749 FIF_BCN_PRBRESP_PROMISC | \
1753 /* FIXME: sc->sc_full_reset ? */
1754 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1755 unsigned int changed_flags,
1756 unsigned int *total_flags,
1759 struct ath_softc *sc = hw->priv;
1762 changed_flags &= SUPPORTED_FILTERS;
1763 *total_flags &= SUPPORTED_FILTERS;
1765 sc->rx.rxfilter = *total_flags;
1766 ath9k_ps_wakeup(sc);
1767 rfilt = ath_calcrxfilter(sc);
1768 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1769 ath9k_ps_restore(sc);
1771 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1772 "Set HW RX filter: 0x%x\n", rfilt);
1775 static int ath9k_sta_add(struct ieee80211_hw *hw,
1776 struct ieee80211_vif *vif,
1777 struct ieee80211_sta *sta)
1779 struct ath_softc *sc = hw->priv;
1781 ath_node_attach(sc, sta);
1786 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1787 struct ieee80211_vif *vif,
1788 struct ieee80211_sta *sta)
1790 struct ath_softc *sc = hw->priv;
1792 ath_node_detach(sc, sta);
1797 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1798 const struct ieee80211_tx_queue_params *params)
1800 struct ath_softc *sc = hw->priv;
1801 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1802 struct ath_txq *txq;
1803 struct ath9k_tx_queue_info qi;
1806 if (queue >= WME_NUM_AC)
1809 txq = sc->tx.txq_map[queue];
1811 mutex_lock(&sc->mutex);
1813 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1815 qi.tqi_aifs = params->aifs;
1816 qi.tqi_cwmin = params->cw_min;
1817 qi.tqi_cwmax = params->cw_max;
1818 qi.tqi_burstTime = params->txop;
1820 ath_dbg(common, ATH_DBG_CONFIG,
1821 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1822 queue, txq->axq_qnum, params->aifs, params->cw_min,
1823 params->cw_max, params->txop);
1825 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1827 ath_err(common, "TXQ Update failed\n");
1829 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1830 if (queue == WME_AC_BE && !ret)
1831 ath_beaconq_config(sc);
1833 mutex_unlock(&sc->mutex);
1838 static int ath9k_set_key(struct ieee80211_hw *hw,
1839 enum set_key_cmd cmd,
1840 struct ieee80211_vif *vif,
1841 struct ieee80211_sta *sta,
1842 struct ieee80211_key_conf *key)
1844 struct ath_softc *sc = hw->priv;
1845 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1848 if (ath9k_modparam_nohwcrypt)
1851 mutex_lock(&sc->mutex);
1852 ath9k_ps_wakeup(sc);
1853 ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1857 ret = ath_key_config(common, vif, sta, key);
1859 key->hw_key_idx = ret;
1860 /* push IV and Michael MIC generation to stack */
1861 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1862 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1863 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1864 if (sc->sc_ah->sw_mgmt_crypto &&
1865 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1866 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1871 ath_key_delete(common, key);
1877 ath9k_ps_restore(sc);
1878 mutex_unlock(&sc->mutex);
1883 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1884 struct ieee80211_vif *vif,
1885 struct ieee80211_bss_conf *bss_conf,
1888 struct ath_softc *sc = hw->priv;
1889 struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
1890 struct ath_hw *ah = sc->sc_ah;
1891 struct ath_common *common = ath9k_hw_common(ah);
1892 struct ath_vif *avp = (void *)vif->drv_priv;
1896 mutex_lock(&sc->mutex);
1898 if (changed & BSS_CHANGED_BSSID) {
1900 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1901 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1903 ath9k_hw_write_associd(ah);
1905 /* Set aggregation protection mode parameters */
1906 sc->config.ath_aggr_prot = 0;
1908 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
1909 common->curbssid, common->curaid);
1911 /* need to reconfigure the beacon */
1912 sc->sc_flags &= ~SC_OP_BEACONS ;
1915 /* Enable transmission of beacons (AP, IBSS, MESH) */
1916 if ((changed & BSS_CHANGED_BEACON) ||
1917 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1918 ath9k_set_beaconing_status(sc, false);
1919 error = ath_beacon_alloc(sc, vif);
1921 ath_beacon_config(sc, vif);
1922 ath9k_set_beaconing_status(sc, true);
1925 if (changed & BSS_CHANGED_ERP_SLOT) {
1926 if (bss_conf->use_short_slot)
1930 if (vif->type == NL80211_IFTYPE_AP) {
1932 * Defer update, so that connected stations can adjust
1933 * their settings at the same time.
1934 * See beacon.c for more details
1936 sc->beacon.slottime = slottime;
1937 sc->beacon.updateslot = UPDATE;
1939 ah->slottime = slottime;
1940 ath9k_hw_init_global_settings(ah);
1944 /* Disable transmission of beacons */
1945 if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
1946 !bss_conf->enable_beacon) {
1947 ath9k_set_beaconing_status(sc, false);
1948 avp->is_bslot_active = false;
1949 ath9k_set_beaconing_status(sc, true);
1952 if (changed & BSS_CHANGED_BEACON_INT) {
1953 cur_conf->beacon_interval = bss_conf->beacon_int;
1955 * In case of AP mode, the HW TSF has to be reset
1956 * when the beacon interval changes.
1958 if (vif->type == NL80211_IFTYPE_AP) {
1959 sc->sc_flags |= SC_OP_TSF_RESET;
1960 ath9k_set_beaconing_status(sc, false);
1961 error = ath_beacon_alloc(sc, vif);
1963 ath_beacon_config(sc, vif);
1964 ath9k_set_beaconing_status(sc, true);
1966 ath_beacon_config(sc, vif);
1970 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1971 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1972 bss_conf->use_short_preamble);
1973 if (bss_conf->use_short_preamble)
1974 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1976 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1979 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1980 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1981 bss_conf->use_cts_prot);
1982 if (bss_conf->use_cts_prot &&
1983 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1984 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1986 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1989 if (changed & BSS_CHANGED_ASSOC) {
1990 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1992 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1995 mutex_unlock(&sc->mutex);
1998 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
2000 struct ath_softc *sc = hw->priv;
2003 mutex_lock(&sc->mutex);
2004 ath9k_ps_wakeup(sc);
2005 tsf = ath9k_hw_gettsf64(sc->sc_ah);
2006 ath9k_ps_restore(sc);
2007 mutex_unlock(&sc->mutex);
2012 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2014 struct ath_softc *sc = hw->priv;
2016 mutex_lock(&sc->mutex);
2017 ath9k_ps_wakeup(sc);
2018 ath9k_hw_settsf64(sc->sc_ah, tsf);
2019 ath9k_ps_restore(sc);
2020 mutex_unlock(&sc->mutex);
2023 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2025 struct ath_softc *sc = hw->priv;
2027 mutex_lock(&sc->mutex);
2029 ath9k_ps_wakeup(sc);
2030 ath9k_hw_reset_tsf(sc->sc_ah);
2031 ath9k_ps_restore(sc);
2033 mutex_unlock(&sc->mutex);
2036 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2037 struct ieee80211_vif *vif,
2038 enum ieee80211_ampdu_mlme_action action,
2039 struct ieee80211_sta *sta,
2040 u16 tid, u16 *ssn, u8 buf_size)
2042 struct ath_softc *sc = hw->priv;
2048 case IEEE80211_AMPDU_RX_START:
2049 if (!(sc->sc_flags & SC_OP_RXAGGR))
2052 case IEEE80211_AMPDU_RX_STOP:
2054 case IEEE80211_AMPDU_TX_START:
2055 if (!(sc->sc_flags & SC_OP_TXAGGR))
2058 ath9k_ps_wakeup(sc);
2059 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2061 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2062 ath9k_ps_restore(sc);
2064 case IEEE80211_AMPDU_TX_STOP:
2065 ath9k_ps_wakeup(sc);
2066 ath_tx_aggr_stop(sc, sta, tid);
2067 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2068 ath9k_ps_restore(sc);
2070 case IEEE80211_AMPDU_TX_OPERATIONAL:
2071 ath9k_ps_wakeup(sc);
2072 ath_tx_aggr_resume(sc, sta, tid);
2073 ath9k_ps_restore(sc);
2076 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2084 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2085 struct survey_info *survey)
2087 struct ath_softc *sc = hw->priv;
2088 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2089 struct ieee80211_supported_band *sband;
2090 struct ieee80211_channel *chan;
2091 unsigned long flags;
2094 spin_lock_irqsave(&common->cc_lock, flags);
2096 ath_update_survey_stats(sc);
2098 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2099 if (sband && idx >= sband->n_channels) {
2100 idx -= sband->n_channels;
2105 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2107 if (!sband || idx >= sband->n_channels) {
2108 spin_unlock_irqrestore(&common->cc_lock, flags);
2112 chan = &sband->channels[idx];
2113 pos = chan->hw_value;
2114 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2115 survey->channel = chan;
2116 spin_unlock_irqrestore(&common->cc_lock, flags);
2121 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2123 struct ath_softc *sc = hw->priv;
2124 struct ath_hw *ah = sc->sc_ah;
2126 mutex_lock(&sc->mutex);
2127 ah->coverage_class = coverage_class;
2128 ath9k_hw_init_global_settings(ah);
2129 mutex_unlock(&sc->mutex);
2132 static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
2134 #define ATH_FLUSH_TIMEOUT 60 /* ms */
2135 struct ath_softc *sc = hw->priv;
2136 struct ath_txq *txq = NULL;
2137 struct ath_hw *ah = sc->sc_ah;
2138 struct ath_common *common = ath9k_hw_common(ah);
2139 int i, j, npend = 0;
2141 mutex_lock(&sc->mutex);
2143 cancel_delayed_work_sync(&sc->tx_complete_work);
2145 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2146 if (!ATH_TXQ_SETUP(sc, i))
2148 txq = &sc->tx.txq[i];
2151 for (j = 0; j < ATH_FLUSH_TIMEOUT; j++) {
2152 if (!ath9k_has_pending_frames(sc, txq))
2154 usleep_range(1000, 2000);
2158 if (drop || ath9k_has_pending_frames(sc, txq)) {
2159 ath_dbg(common, ATH_DBG_QUEUE, "Drop frames from hw queue:%d\n",
2161 spin_lock_bh(&txq->axq_lock);
2162 txq->txq_flush_inprogress = true;
2163 spin_unlock_bh(&txq->axq_lock);
2165 ath9k_ps_wakeup(sc);
2166 ath9k_hw_stoptxdma(ah, txq->axq_qnum);
2167 npend = ath9k_hw_numtxpending(ah, txq->axq_qnum);
2168 ath9k_ps_restore(sc);
2172 ath_draintxq(sc, txq, false);
2173 txq->txq_flush_inprogress = false;
2178 ath_reset(sc, false);
2179 txq->txq_flush_inprogress = false;
2182 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2183 mutex_unlock(&sc->mutex);
2186 struct ieee80211_ops ath9k_ops = {
2188 .start = ath9k_start,
2190 .add_interface = ath9k_add_interface,
2191 .change_interface = ath9k_change_interface,
2192 .remove_interface = ath9k_remove_interface,
2193 .config = ath9k_config,
2194 .configure_filter = ath9k_configure_filter,
2195 .sta_add = ath9k_sta_add,
2196 .sta_remove = ath9k_sta_remove,
2197 .conf_tx = ath9k_conf_tx,
2198 .bss_info_changed = ath9k_bss_info_changed,
2199 .set_key = ath9k_set_key,
2200 .get_tsf = ath9k_get_tsf,
2201 .set_tsf = ath9k_set_tsf,
2202 .reset_tsf = ath9k_reset_tsf,
2203 .ampdu_action = ath9k_ampdu_action,
2204 .get_survey = ath9k_get_survey,
2205 .rfkill_poll = ath9k_rfkill_poll_state,
2206 .set_coverage_class = ath9k_set_coverage_class,
2207 .flush = ath9k_flush,