drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_cache_conf_rate(struct ath_softc *sc,
  22                                 struct ieee80211_conf *conf)
  23 {
  24         switch (conf->channel->band) {
  25         case IEEE80211_BAND_2GHZ:
  26                 if (conf_is_ht20(conf))
  27                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
  28                 else if (conf_is_ht40_minus(conf))
  29                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
  30                 else if (conf_is_ht40_plus(conf))
  31                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
  32                 else
  33                         sc->cur_rate_mode = ATH9K_MODE_11G;
  34                 break;
  35         case IEEE80211_BAND_5GHZ:
  36                 if (conf_is_ht20(conf))
  37                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
  38                 else if (conf_is_ht40_minus(conf))
  39                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
  40                 else if (conf_is_ht40_plus(conf))
  41                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
  42                 else
  43                         sc->cur_rate_mode = ATH9K_MODE_11A;
  44                 break;
  45         default:
  46                 BUG_ON(1);
  47                 break;
  48         }
  49 }
  50
  51 static void ath_update_txpow(struct ath_softc *sc)
  52 {
  53         struct ath_hw *ah = sc->sc_ah;
  54         u32 txpow;
  55
  56         if (sc->curtxpow != sc->config.txpowlimit) {
  57                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
  58                 /* read back in case value is clamped */
  59                 ath9k_hw_getcapability(ah, ATH9K_CAP_TXPOW, 1, &txpow);
  60                 sc->curtxpow = txpow;
  61         }
  62 }
  63
  64 static u8 parse_mpdudensity(u8 mpdudensity)
  65 {
  66         /*
  67          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  68          *   0 for no restriction
  69          *   1 for 1/4 us
  70          *   2 for 1/2 us
  71          *   3 for 1 us
  72          *   4 for 2 us
  73          *   5 for 4 us
  74          *   6 for 8 us
  75          *   7 for 16 us
  76          */
  77         switch (mpdudensity) {
  78         case 0:
  79                 return 0;
  80         case 1:
  81         case 2:
  82         case 3:
  83                 /* Our lower layer calculations limit our precision to
  84                    1 microsecond */
  85                 return 1;
  86         case 4:
  87                 return 2;
  88         case 5:
  89                 return 4;
  90         case 6:
  91                 return 8;
  92         case 7:
  93                 return 16;
  94         default:
  95                 return 0;
  96         }
  97 }
  98
  99 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
 100                                                 struct ieee80211_hw *hw)
 101 {
 102         struct ieee80211_channel *curchan = hw->conf.channel;
 103         struct ath9k_channel *channel;
 104         u8 chan_idx;
 105
 106         chan_idx = curchan->hw_value;
 107         channel = &sc->sc_ah->channels[chan_idx];
 108         ath9k_update_ichannel(sc, hw, channel);
 109         return channel;
 110 }
 111
 112 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
 113 {
 114         unsigned long flags;
 115         bool ret;
 116
 117         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 118         ret = ath9k_hw_setpower(sc->sc_ah, mode);
 119         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 120
 121         return ret;
 122 }
 123
 124 void ath9k_ps_wakeup(struct ath_softc *sc)
 125 {
 126         unsigned long flags;
 127
 128         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 129         if (++sc->ps_usecount != 1)
 130                 goto unlock;
 131
 132         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 133
 134  unlock:
 135         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 136 }
 137
 138 void ath9k_ps_restore(struct ath_softc *sc)
 139 {
 140         unsigned long flags;
 141
 142         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 143         if (--sc->ps_usecount != 0)
 144                 goto unlock;
 145
 146         if (sc->ps_idle)
 147                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 148         else if (sc->ps_enabled &&
 149                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 150                               PS_WAIT_FOR_CAB |
 151                               PS_WAIT_FOR_PSPOLL_DATA |
 152                               PS_WAIT_FOR_TX_ACK)))
 153                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 154
 155  unlock:
 156         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 157 }
 158
 159 /*
 160  * Set/change channels.  If the channel is really being changed, it's done
 161  * by reseting the chip.  To accomplish this we must first cleanup any pending
 162  * DMA, then restart stuff.
 163 */
 164 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 165                     struct ath9k_channel *hchan)
 166 {
 167         struct ath_hw *ah = sc->sc_ah;
 168         struct ath_common *common = ath9k_hw_common(ah);
 169         struct ieee80211_conf *conf = &common->hw->conf;
 170         bool fastcc = true, stopped;
 171         struct ieee80211_channel *channel = hw->conf.channel;
 172         int r;
 173
 174         if (sc->sc_flags & SC_OP_INVALID)
 175                 return -EIO;
 176
 177         ath9k_ps_wakeup(sc);
 178
 179         /*
 180          * This is only performed if the channel settings have
 181          * actually changed.
 182          *
 183          * To switch channels clear any pending DMA operations;
 184          * wait long enough for the RX fifo to drain, reset the
 185          * hardware at the new frequency, and then re-enable
 186          * the relevant bits of the h/w.
 187          */
 188         ath9k_hw_set_interrupts(ah, 0);
 189         ath_drain_all_txq(sc, false);
 190         stopped = ath_stoprecv(sc);
 191
 192         /* XXX: do not flush receive queue here. We don't want
 193          * to flush data frames already in queue because of
 194          * changing channel. */
 195
 196         if (!stopped || (sc->sc_flags & SC_OP_FULL_RESET))
 197                 fastcc = false;
 198
 199         ath_print(common, ATH_DBG_CONFIG,
 200                   "(%u MHz) -> (%u MHz), conf_is_ht40: %d\n",
 201                   sc->sc_ah->curchan->channel,
 202                   channel->center_freq, conf_is_ht40(conf));
 203
 204         spin_lock_bh(&sc->sc_resetlock);
 205
 206         r = ath9k_hw_reset(ah, hchan, fastcc);
 207         if (r) {
 208                 ath_print(common, ATH_DBG_FATAL,
 209                           "Unable to reset channel (%u MHz), "
 210                           "reset status %d\n",
 211                           channel->center_freq, r);
 212                 spin_unlock_bh(&sc->sc_resetlock);
 213                 goto ps_restore;
 214         }
 215         spin_unlock_bh(&sc->sc_resetlock);
 216
 217         sc->sc_flags &= ~SC_OP_FULL_RESET;
 218
 219         if (ath_startrecv(sc) != 0) {
 220                 ath_print(common, ATH_DBG_FATAL,
 221                           "Unable to restart recv logic\n");
 222                 r = -EIO;
 223                 goto ps_restore;
 224         }
 225
 226         ath_cache_conf_rate(sc, &hw->conf);
 227         ath_update_txpow(sc);
 228         ath9k_hw_set_interrupts(ah, ah->imask);
 229
 230  ps_restore:
 231         ath9k_ps_restore(sc);
 232         return r;
 233 }
 234
 235 /*
 236  *  This routine performs the periodic noise floor calibration function
 237  *  that is used to adjust and optimize the chip performance.  This
 238  *  takes environmental changes (location, temperature) into account.
 239  *  When the task is complete, it reschedules itself depending on the
 240  *  appropriate interval that was calculated.
 241  */
 242 void ath_ani_calibrate(unsigned long data)
 243 {
 244         struct ath_softc *sc = (struct ath_softc *)data;
 245         struct ath_hw *ah = sc->sc_ah;
 246         struct ath_common *common = ath9k_hw_common(ah);
 247         bool longcal = false;
 248         bool shortcal = false;
 249         bool aniflag = false;
 250         unsigned int timestamp = jiffies_to_msecs(jiffies);
 251         u32 cal_interval, short_cal_interval;
 252
 253         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 254                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 255
 256         /* Only calibrate if awake */
 257         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 258                 goto set_timer;
 259
 260         ath9k_ps_wakeup(sc);
 261
 262         /* Long calibration runs independently of short calibration. */
 263         if ((timestamp - common->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
 264                 longcal = true;
 265                 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 266                 common->ani.longcal_timer = timestamp;
 267         }
 268
 269         /* Short calibration applies only while caldone is false */
 270         if (!common->ani.caldone) {
 271                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 272                         shortcal = true;
 273                         ath_print(common, ATH_DBG_ANI,
 274                                   "shortcal @%lu\n", jiffies);
 275                         common->ani.shortcal_timer = timestamp;
 276                         common->ani.resetcal_timer = timestamp;
 277                 }
 278         } else {
 279                 if ((timestamp - common->ani.resetcal_timer) >=
 280                     ATH_RESTART_CALINTERVAL) {
 281                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 282                         if (common->ani.caldone)
 283                                 common->ani.resetcal_timer = timestamp;
 284                 }
 285         }
 286
 287         /* Verify whether we must check ANI */
 288         if ((timestamp - common->ani.checkani_timer) >= ATH_ANI_POLLINTERVAL) {
 289                 aniflag = true;
 290                 common->ani.checkani_timer = timestamp;
 291         }
 292
 293         /* Skip all processing if there's nothing to do. */
 294         if (longcal || shortcal || aniflag) {
 295                 /* Call ANI routine if necessary */
 296                 if (aniflag)
 297                         ath9k_hw_ani_monitor(ah, ah->curchan);
 298
 299                 /* Perform calibration if necessary */
 300                 if (longcal || shortcal) {
 301                         common->ani.caldone =
 302                                 ath9k_hw_calibrate(ah,
 303                                                    ah->curchan,
 304                                                    common->rx_chainmask,
 305                                                    longcal);
 306
 307                         if (longcal)
 308                                 common->ani.noise_floor = ath9k_hw_getchan_noise(ah,
 309                                                                      ah->curchan);
 310
 311                         ath_print(common, ATH_DBG_ANI,
 312                                   " calibrate chan %u/%x nf: %d\n",
 313                                   ah->curchan->channel,
 314                                   ah->curchan->channelFlags,
 315                                   common->ani.noise_floor);
 316                 }
 317         }
 318
 319         ath9k_ps_restore(sc);
 320
 321 set_timer:
 322         /*
 323         * Set timer interval based on previous results.
 324         * The interval must be the shortest necessary to satisfy ANI,
 325         * short calibration and long calibration.
 326         */
 327         cal_interval = ATH_LONG_CALINTERVAL;
 328         if (sc->sc_ah->config.enable_ani)
 329                 cal_interval = min(cal_interval, (u32)ATH_ANI_POLLINTERVAL);
 330         if (!common->ani.caldone)
 331                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 332
 333         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 334 }
 335
 336 static void ath_start_ani(struct ath_common *common)
 337 {
 338         unsigned long timestamp = jiffies_to_msecs(jiffies);
 339
 340         common->ani.longcal_timer = timestamp;
 341         common->ani.shortcal_timer = timestamp;
 342         common->ani.checkani_timer = timestamp;
 343
 344         mod_timer(&common->ani.timer,
 345                   jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
 346 }
 347
 348 /*
 349  * Update tx/rx chainmask. For legacy association,
 350  * hard code chainmask to 1x1, for 11n association, use
 351  * the chainmask configuration, for bt coexistence, use
 352  * the chainmask configuration even in legacy mode.
 353  */
 354 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
 355 {
 356         struct ath_hw *ah = sc->sc_ah;
 357         struct ath_common *common = ath9k_hw_common(ah);
 358
 359         if ((sc->sc_flags & SC_OP_SCANNING) || is_ht ||
 360             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
 361                 common->tx_chainmask = ah->caps.tx_chainmask;
 362                 common->rx_chainmask = ah->caps.rx_chainmask;
 363         } else {
 364                 common->tx_chainmask = 1;
 365                 common->rx_chainmask = 1;
 366         }
 367
 368         ath_print(common, ATH_DBG_CONFIG,
 369                   "tx chmask: %d, rx chmask: %d\n",
 370                   common->tx_chainmask,
 371                   common->rx_chainmask);
 372 }
 373
 374 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 375 {
 376         struct ath_node *an;
 377
 378         an = (struct ath_node *)sta->drv_priv;
 379
 380         if (sc->sc_flags & SC_OP_TXAGGR) {
 381                 ath_tx_node_init(sc, an);
 382                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 383                                      sta->ht_cap.ampdu_factor);
 384                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 385                 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
 386         }
 387 }
 388
 389 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 390 {
 391         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 392
 393         if (sc->sc_flags & SC_OP_TXAGGR)
 394                 ath_tx_node_cleanup(sc, an);
 395 }
 396
 397 void ath9k_tasklet(unsigned long data)
 398 {
 399         struct ath_softc *sc = (struct ath_softc *)data;
 400         struct ath_hw *ah = sc->sc_ah;
 401         struct ath_common *common = ath9k_hw_common(ah);
 402
 403         u32 status = sc->intrstatus;
 404         u32 rxmask;
 405
 406         ath9k_ps_wakeup(sc);
 407
 408         if (status & ATH9K_INT_FATAL) {
 409                 ath_reset(sc, false);
 410                 ath9k_ps_restore(sc);
 411                 return;
 412         }
 413
 414         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 415                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 416                           ATH9K_INT_RXORN);
 417         else
 418                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 419
 420         if (status & rxmask) {
 421                 spin_lock_bh(&sc->rx.rxflushlock);
 422
 423                 /* Check for high priority Rx first */
 424                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 425                     (status & ATH9K_INT_RXHP))
 426                         ath_rx_tasklet(sc, 0, true);
 427
 428                 ath_rx_tasklet(sc, 0, false);
 429                 spin_unlock_bh(&sc->rx.rxflushlock);
 430         }
 431
 432         if (status & ATH9K_INT_TX) {
 433                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 434                         ath_tx_edma_tasklet(sc);
 435                 else
 436                         ath_tx_tasklet(sc);
 437         }
 438
 439         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 440                 /*
 441                  * TSF sync does not look correct; remain awake to sync with
 442                  * the next Beacon.
 443                  */
 444                 ath_print(common, ATH_DBG_PS,
 445                           "TSFOOR - Sync with next Beacon\n");
 446                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 447         }
 448
 449         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 450                 if (status & ATH9K_INT_GENTIMER)
 451                         ath_gen_timer_isr(sc->sc_ah);
 452
 453         /* re-enable hardware interrupt */
 454         ath9k_hw_set_interrupts(ah, ah->imask);
 455         ath9k_ps_restore(sc);
 456 }
 457
 458 irqreturn_t ath_isr(int irq, void *dev)
 459 {
 460 #define SCHED_INTR (                            \
 461                 ATH9K_INT_FATAL |               \
 462                 ATH9K_INT_RXORN |               \
 463                 ATH9K_INT_RXEOL |               \
 464                 ATH9K_INT_RX |                  \
 465                 ATH9K_INT_RXLP |                \
 466                 ATH9K_INT_RXHP |                \
 467                 ATH9K_INT_TX |                  \
 468                 ATH9K_INT_BMISS |               \
 469                 ATH9K_INT_CST |                 \
 470                 ATH9K_INT_TSFOOR |              \
 471                 ATH9K_INT_GENTIMER)
 472
 473         struct ath_softc *sc = dev;
 474         struct ath_hw *ah = sc->sc_ah;
 475         enum ath9k_int status;
 476         bool sched = false;
 477
 478         /*
 479          * The hardware is not ready/present, don't
 480          * touch anything. Note this can happen early
 481          * on if the IRQ is shared.
 482          */
 483         if (sc->sc_flags & SC_OP_INVALID)
 484                 return IRQ_NONE;
 485
 486
 487         /* shared irq, not for us */
 488
 489         if (!ath9k_hw_intrpend(ah))
 490                 return IRQ_NONE;
 491
 492         /*
 493          * Figure out the reason(s) for the interrupt.  Note
 494          * that the hal returns a pseudo-ISR that may include
 495          * bits we haven't explicitly enabled so we mask the
 496          * value to insure we only process bits we requested.
 497          */
 498         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 499         status &= ah->imask;    /* discard unasked-for bits */
 500
 501         /*
 502          * If there are no status bits set, then this interrupt was not
 503          * for me (should have been caught above).
 504          */
 505         if (!status)
 506                 return IRQ_NONE;
 507
 508         /* Cache the status */
 509         sc->intrstatus = status;
 510
 511         if (status & SCHED_INTR)
 512                 sched = true;
 513
 514         /*
 515          * If a FATAL or RXORN interrupt is received, we have to reset the
 516          * chip immediately.
 517          */
 518         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 519             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 520                 goto chip_reset;
 521
 522         if (status & ATH9K_INT_SWBA)
 523                 tasklet_schedule(&sc->bcon_tasklet);
 524
 525         if (status & ATH9K_INT_TXURN)
 526                 ath9k_hw_updatetxtriglevel(ah, true);
 527
 528         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 529                 if (status & ATH9K_INT_RXEOL) {
 530                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 531                         ath9k_hw_set_interrupts(ah, ah->imask);
 532                 }
 533         }
 534
 535         if (status & ATH9K_INT_MIB) {
 536                 /*
 537                  * Disable interrupts until we service the MIB
 538                  * interrupt; otherwise it will continue to
 539                  * fire.
 540                  */
 541                 ath9k_hw_set_interrupts(ah, 0);
 542                 /*
 543                  * Let the hal handle the event. We assume
 544                  * it will clear whatever condition caused
 545                  * the interrupt.
 546                  */
 547                 ath9k_hw_procmibevent(ah);
 548                 ath9k_hw_set_interrupts(ah, ah->imask);
 549         }
 550
 551         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 552                 if (status & ATH9K_INT_TIM_TIMER) {
 553                         /* Clear RxAbort bit so that we can
 554                          * receive frames */
 555                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 556                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 557                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 558                 }
 559
 560 chip_reset:
 561
 562         ath_debug_stat_interrupt(sc, status);
 563
 564         if (sched) {
 565                 /* turn off every interrupt except SWBA */
 566                 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
 567                 tasklet_schedule(&sc->intr_tq);
 568         }
 569
 570         return IRQ_HANDLED;
 571
 572 #undef SCHED_INTR
 573 }
 574
 575 static u32 ath_get_extchanmode(struct ath_softc *sc,
 576                                struct ieee80211_channel *chan,
 577                                enum nl80211_channel_type channel_type)
 578 {
 579         u32 chanmode = 0;
 580
 581         switch (chan->band) {
 582         case IEEE80211_BAND_2GHZ:
 583                 switch(channel_type) {
 584                 case NL80211_CHAN_NO_HT:
 585                 case NL80211_CHAN_HT20:
 586                         chanmode = CHANNEL_G_HT20;
 587                         break;
 588                 case NL80211_CHAN_HT40PLUS:
 589                         chanmode = CHANNEL_G_HT40PLUS;
 590                         break;
 591                 case NL80211_CHAN_HT40MINUS:
 592                         chanmode = CHANNEL_G_HT40MINUS;
 593                         break;
 594                 }
 595                 break;
 596         case IEEE80211_BAND_5GHZ:
 597                 switch(channel_type) {
 598                 case NL80211_CHAN_NO_HT:
 599                 case NL80211_CHAN_HT20:
 600                         chanmode = CHANNEL_A_HT20;
 601                         break;
 602                 case NL80211_CHAN_HT40PLUS:
 603                         chanmode = CHANNEL_A_HT40PLUS;
 604                         break;
 605                 case NL80211_CHAN_HT40MINUS:
 606                         chanmode = CHANNEL_A_HT40MINUS;
 607                         break;
 608                 }
 609                 break;
 610         default:
 611                 break;
 612         }
 613
 614         return chanmode;
 615 }
 616
 617 static int ath_setkey_tkip(struct ath_common *common, u16 keyix, const u8 *key,
 618                            struct ath9k_keyval *hk, const u8 *addr,
 619                            bool authenticator)
 620 {
 621         struct ath_hw *ah = common->ah;
 622         const u8 *key_rxmic;
 623         const u8 *key_txmic;
 624
 625         key_txmic = key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
 626         key_rxmic = key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
 627
 628         if (addr == NULL) {
 629                 /*
 630                  * Group key installation - only two key cache entries are used
 631                  * regardless of splitmic capability since group key is only
 632                  * used either for TX or RX.
 633                  */
 634                 if (authenticator) {
 635                         memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
 636                         memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_mic));
 637                 } else {
 638                         memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
 639                         memcpy(hk->kv_txmic, key_rxmic, sizeof(hk->kv_mic));
 640                 }
 641                 return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
 642         }
 643         if (!common->splitmic) {
 644                 /* TX and RX keys share the same key cache entry. */
 645                 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
 646                 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
 647                 return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
 648         }
 649
 650         /* Separate key cache entries for TX and RX */
 651
 652         /* TX key goes at first index, RX key at +32. */
 653         memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
 654         if (!ath9k_hw_set_keycache_entry(ah, keyix, hk, NULL)) {
 655                 /* TX MIC entry failed. No need to proceed further */
 656                 ath_print(common, ATH_DBG_FATAL,
 657                           "Setting TX MIC Key Failed\n");
 658                 return 0;
 659         }
 660
 661         memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
 662         /* XXX delete tx key on failure? */
 663         return ath9k_hw_set_keycache_entry(ah, keyix + 32, hk, addr);
 664 }
 665
 666 static int ath_reserve_key_cache_slot_tkip(struct ath_common *common)
 667 {
 668         int i;
 669
 670         for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
 671                 if (test_bit(i, common->keymap) ||
 672                     test_bit(i + 64, common->keymap))
 673                         continue; /* At least one part of TKIP key allocated */
 674                 if (common->splitmic &&
 675                     (test_bit(i + 32, common->keymap) ||
 676                      test_bit(i + 64 + 32, common->keymap)))
 677                         continue; /* At least one part of TKIP key allocated */
 678
 679                 /* Found a free slot for a TKIP key */
 680                 return i;
 681         }
 682         return -1;
 683 }
 684
 685 static int ath_reserve_key_cache_slot(struct ath_common *common)
 686 {
 687         int i;
 688
 689         /* First, try to find slots that would not be available for TKIP. */
 690         if (common->splitmic) {
 691                 for (i = IEEE80211_WEP_NKID; i < common->keymax / 4; i++) {
 692                         if (!test_bit(i, common->keymap) &&
 693                             (test_bit(i + 32, common->keymap) ||
 694                              test_bit(i + 64, common->keymap) ||
 695                              test_bit(i + 64 + 32, common->keymap)))
 696                                 return i;
 697                         if (!test_bit(i + 32, common->keymap) &&
 698                             (test_bit(i, common->keymap) ||
 699                              test_bit(i + 64, common->keymap) ||
 700                              test_bit(i + 64 + 32, common->keymap)))
 701                                 return i + 32;
 702                         if (!test_bit(i + 64, common->keymap) &&
 703                             (test_bit(i , common->keymap) ||
 704                              test_bit(i + 32, common->keymap) ||
 705                              test_bit(i + 64 + 32, common->keymap)))
 706                                 return i + 64;
 707                         if (!test_bit(i + 64 + 32, common->keymap) &&
 708                             (test_bit(i, common->keymap) ||
 709                              test_bit(i + 32, common->keymap) ||
 710                              test_bit(i + 64, common->keymap)))
 711                                 return i + 64 + 32;
 712                 }
 713         } else {
 714                 for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
 715                         if (!test_bit(i, common->keymap) &&
 716                             test_bit(i + 64, common->keymap))
 717                                 return i;
 718                         if (test_bit(i, common->keymap) &&
 719                             !test_bit(i + 64, common->keymap))
 720                                 return i + 64;
 721                 }
 722         }
 723
 724         /* No partially used TKIP slots, pick any available slot */
 725         for (i = IEEE80211_WEP_NKID; i < common->keymax; i++) {
 726                 /* Do not allow slots that could be needed for TKIP group keys
 727                  * to be used. This limitation could be removed if we know that
 728                  * TKIP will not be used. */
 729                 if (i >= 64 && i < 64 + IEEE80211_WEP_NKID)
 730                         continue;
 731                 if (common->splitmic) {
 732                         if (i >= 32 && i < 32 + IEEE80211_WEP_NKID)
 733                                 continue;
 734                         if (i >= 64 + 32 && i < 64 + 32 + IEEE80211_WEP_NKID)
 735                                 continue;
 736                 }
 737
 738                 if (!test_bit(i, common->keymap))
 739                         return i; /* Found a free slot for a key */
 740         }
 741
 742         /* No free slot found */
 743         return -1;
 744 }
 745
 746 static int ath_key_config(struct ath_common *common,
 747                           struct ieee80211_vif *vif,
 748                           struct ieee80211_sta *sta,
 749                           struct ieee80211_key_conf *key)
 750 {
 751         struct ath_hw *ah = common->ah;
 752         struct ath9k_keyval hk;
 753         const u8 *mac = NULL;
 754         u8 gmac[ETH_ALEN];
 755         int ret = 0;
 756         int idx;
 757
 758         memset(&hk, 0, sizeof(hk));
 759
 760         switch (key->alg) {
 761         case ALG_WEP:
 762                 hk.kv_type = ATH9K_CIPHER_WEP;
 763                 break;
 764         case ALG_TKIP:
 765                 hk.kv_type = ATH9K_CIPHER_TKIP;
 766                 break;
 767         case ALG_CCMP:
 768                 hk.kv_type = ATH9K_CIPHER_AES_CCM;
 769                 break;
 770         default:
 771                 return -EOPNOTSUPP;
 772         }
 773
 774         hk.kv_len = key->keylen;
 775         memcpy(hk.kv_val, key->key, key->keylen);
 776
 777         if (!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
 778
 779                 if (key->ap_addr) {
 780                         /*
 781                          * Group keys on hardware that supports multicast frame
 782                          * key search use a mac that is the sender's address with
 783                          * the high bit set instead of the app-specified address.
 784                          */
 785                         memcpy(gmac, key->ap_addr, ETH_ALEN);
 786                         gmac[0] |= 0x80;
 787                         mac = gmac;
 788
 789                         if (key->alg == ALG_TKIP)
 790                                 idx = ath_reserve_key_cache_slot_tkip(common);
 791                         else
 792                                 idx = ath_reserve_key_cache_slot(common);
 793                         if (idx < 0)
 794                                 mac = NULL; /* no free key cache entries */
 795                 }
 796
 797                 if (!mac) {
 798                         /* For now, use the default keys for broadcast keys. This may
 799                          * need to change with virtual interfaces. */
 800                         idx = key->keyidx;
 801                 }
 802         } else if (key->keyidx) {
 803                 if (WARN_ON(!sta))
 804                         return -EOPNOTSUPP;
 805                 mac = sta->addr;
 806
 807                 if (vif->type != NL80211_IFTYPE_AP) {
 808                         /* Only keyidx 0 should be used with unicast key, but
 809                          * allow this for client mode for now. */
 810                         idx = key->keyidx;
 811                 } else
 812                         return -EIO;
 813         } else {
 814                 if (WARN_ON(!sta))
 815                         return -EOPNOTSUPP;
 816                 mac = sta->addr;
 817
 818                 if (key->alg == ALG_TKIP)
 819                         idx = ath_reserve_key_cache_slot_tkip(common);
 820                 else
 821                         idx = ath_reserve_key_cache_slot(common);
 822                 if (idx < 0)
 823                         return -ENOSPC; /* no free key cache entries */
 824         }
 825
 826         if (key->alg == ALG_TKIP)
 827                 ret = ath_setkey_tkip(common, idx, key->key, &hk, mac,
 828                                       vif->type == NL80211_IFTYPE_AP);
 829         else
 830                 ret = ath9k_hw_set_keycache_entry(ah, idx, &hk, mac);
 831
 832         if (!ret)
 833                 return -EIO;
 834
 835         set_bit(idx, common->keymap);
 836         if (key->alg == ALG_TKIP) {
 837                 set_bit(idx + 64, common->keymap);
 838                 if (common->splitmic) {
 839                         set_bit(idx + 32, common->keymap);
 840                         set_bit(idx + 64 + 32, common->keymap);
 841                 }
 842         }
 843
 844         return idx;
 845 }
 846
 847 static void ath_key_delete(struct ath_common *common, struct ieee80211_key_conf *key)
 848 {
 849         struct ath_hw *ah = common->ah;
 850
 851         ath9k_hw_keyreset(ah, key->hw_key_idx);
 852         if (key->hw_key_idx < IEEE80211_WEP_NKID)
 853                 return;
 854
 855         clear_bit(key->hw_key_idx, common->keymap);
 856         if (key->alg != ALG_TKIP)
 857                 return;
 858
 859         clear_bit(key->hw_key_idx + 64, common->keymap);
 860         if (common->splitmic) {
 861                 ath9k_hw_keyreset(ah, key->hw_key_idx + 32);
 862                 clear_bit(key->hw_key_idx + 32, common->keymap);
 863                 clear_bit(key->hw_key_idx + 64 + 32, common->keymap);
 864         }
 865 }
 866
 867 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 868                                  struct ieee80211_vif *vif,
 869                                  struct ieee80211_bss_conf *bss_conf)
 870 {
 871         struct ath_hw *ah = sc->sc_ah;
 872         struct ath_common *common = ath9k_hw_common(ah);
 873
 874         if (bss_conf->assoc) {
 875                 ath_print(common, ATH_DBG_CONFIG,
 876                           "Bss Info ASSOC %d, bssid: %pM\n",
 877                            bss_conf->aid, common->curbssid);
 878
 879                 /* New association, store aid */
 880                 common->curaid = bss_conf->aid;
 881                 ath9k_hw_write_associd(ah);
 882
 883                 /*
 884                  * Request a re-configuration of Beacon related timers
 885                  * on the receipt of the first Beacon frame (i.e.,
 886                  * after time sync with the AP).
 887                  */
 888                 sc->ps_flags |= PS_BEACON_SYNC;
 889
 890                 /* Configure the beacon */
 891                 ath_beacon_config(sc, vif);
 892
 893                 /* Reset rssi stats */
 894                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 895
 896                 ath_start_ani(common);
 897         } else {
 898                 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 899                 common->curaid = 0;
 900                 /* Stop ANI */
 901                 del_timer_sync(&common->ani.timer);
 902         }
 903 }
 904
 905 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 906 {
 907         struct ath_hw *ah = sc->sc_ah;
 908         struct ath_common *common = ath9k_hw_common(ah);
 909         struct ieee80211_channel *channel = hw->conf.channel;
 910         int r;
 911
 912         ath9k_ps_wakeup(sc);
 913         ath9k_hw_configpcipowersave(ah, 0, 0);
 914
 915         if (!ah->curchan)
 916                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 917
 918         spin_lock_bh(&sc->sc_resetlock);
 919         r = ath9k_hw_reset(ah, ah->curchan, false);
 920         if (r) {
 921                 ath_print(common, ATH_DBG_FATAL,
 922                           "Unable to reset channel (%u MHz), "
 923                           "reset status %d\n",
 924                           channel->center_freq, r);
 925         }
 926         spin_unlock_bh(&sc->sc_resetlock);
 927
 928         ath_update_txpow(sc);
 929         if (ath_startrecv(sc) != 0) {
 930                 ath_print(common, ATH_DBG_FATAL,
 931                           "Unable to restart recv logic\n");
 932                 return;
 933         }
 934
 935         if (sc->sc_flags & SC_OP_BEACONS)
 936                 ath_beacon_config(sc, NULL);    /* restart beacons */
 937
 938         /* Re-Enable  interrupts */
 939         ath9k_hw_set_interrupts(ah, ah->imask);
 940
 941         /* Enable LED */
 942         ath9k_hw_cfg_output(ah, ah->led_pin,
 943                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 944         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 945
 946         ieee80211_wake_queues(hw);
 947         ath9k_ps_restore(sc);
 948 }
 949
 950 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 951 {
 952         struct ath_hw *ah = sc->sc_ah;
 953         struct ieee80211_channel *channel = hw->conf.channel;
 954         int r;
 955
 956         ath9k_ps_wakeup(sc);
 957         ieee80211_stop_queues(hw);
 958
 959         /* Disable LED */
 960         ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 961         ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 962
 963         /* Disable interrupts */
 964         ath9k_hw_set_interrupts(ah, 0);
 965
 966         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 967         ath_stoprecv(sc);               /* turn off frame recv */
 968         ath_flushrecv(sc);              /* flush recv queue */
 969
 970         if (!ah->curchan)
 971                 ah->curchan = ath_get_curchannel(sc, hw);
 972
 973         spin_lock_bh(&sc->sc_resetlock);
 974         r = ath9k_hw_reset(ah, ah->curchan, false);
 975         if (r) {
 976                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
 977                           "Unable to reset channel (%u MHz), "
 978                           "reset status %d\n",
 979                           channel->center_freq, r);
 980         }
 981         spin_unlock_bh(&sc->sc_resetlock);
 982
 983         ath9k_hw_phy_disable(ah);
 984         ath9k_hw_configpcipowersave(ah, 1, 1);
 985         ath9k_ps_restore(sc);
 986         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 987 }
 988
 989 int ath_reset(struct ath_softc *sc, bool retry_tx)
 990 {
 991         struct ath_hw *ah = sc->sc_ah;
 992         struct ath_common *common = ath9k_hw_common(ah);
 993         struct ieee80211_hw *hw = sc->hw;
 994         int r;
 995
 996         /* Stop ANI */
 997         del_timer_sync(&common->ani.timer);
 998
 999         ieee80211_stop_queues(hw);
1000
1001         ath9k_hw_set_interrupts(ah, 0);
1002         ath_drain_all_txq(sc, retry_tx);
1003         ath_stoprecv(sc);
1004         ath_flushrecv(sc);
1005
1006         spin_lock_bh(&sc->sc_resetlock);
1007         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
1008         if (r)
1009                 ath_print(common, ATH_DBG_FATAL,
1010                           "Unable to reset hardware; reset status %d\n", r);
1011         spin_unlock_bh(&sc->sc_resetlock);
1012
1013         if (ath_startrecv(sc) != 0)
1014                 ath_print(common, ATH_DBG_FATAL,
1015                           "Unable to start recv logic\n");
1016
1017         /*
1018          * We may be doing a reset in response to a request
1019          * that changes the channel so update any state that
1020          * might change as a result.
1021          */
1022         ath_cache_conf_rate(sc, &hw->conf);
1023
1024         ath_update_txpow(sc);
1025
1026         if (sc->sc_flags & SC_OP_BEACONS)
1027                 ath_beacon_config(sc, NULL);    /* restart beacons */
1028
1029         ath9k_hw_set_interrupts(ah, ah->imask);
1030
1031         if (retry_tx) {
1032                 int i;
1033                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1034                         if (ATH_TXQ_SETUP(sc, i)) {
1035                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1036                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1037                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1038                         }
1039                 }
1040         }
1041
1042         ieee80211_wake_queues(hw);
1043
1044         /* Start ANI */
1045         ath_start_ani(common);
1046
1047         return r;
1048 }
1049
1050 int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
1051 {
1052         int qnum;
1053
1054         switch (queue) {
1055         case 0:
1056                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_VO];
1057                 break;
1058         case 1:
1059                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_VI];
1060                 break;
1061         case 2:
1062                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
1063                 break;
1064         case 3:
1065                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BK];
1066                 break;
1067         default:
1068                 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
1069                 break;
1070         }
1071
1072         return qnum;
1073 }
1074
1075 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
1076 {
1077         int qnum;
1078
1079         switch (queue) {
1080         case ATH9K_WME_AC_VO:
1081                 qnum = 0;
1082                 break;
1083         case ATH9K_WME_AC_VI:
1084                 qnum = 1;
1085                 break;
1086         case ATH9K_WME_AC_BE:
1087                 qnum = 2;
1088                 break;
1089         case ATH9K_WME_AC_BK:
1090                 qnum = 3;
1091                 break;
1092         default:
1093                 qnum = -1;
1094                 break;
1095         }
1096
1097         return qnum;
1098 }
1099
1100 /* XXX: Remove me once we don't depend on ath9k_channel for all
1101  * this redundant data */
1102 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1103                            struct ath9k_channel *ichan)
1104 {
1105         struct ieee80211_channel *chan = hw->conf.channel;
1106         struct ieee80211_conf *conf = &hw->conf;
1107
1108         ichan->channel = chan->center_freq;
1109         ichan->chan = chan;
1110
1111         if (chan->band == IEEE80211_BAND_2GHZ) {
1112                 ichan->chanmode = CHANNEL_G;
1113                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1114         } else {
1115                 ichan->chanmode = CHANNEL_A;
1116                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1117         }
1118
1119         if (conf_is_ht(conf))
1120                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1121                                             conf->channel_type);
1122 }
1123
1124 /**********************/
1125 /* mac80211 callbacks */
1126 /**********************/
1127
1128 static int ath9k_start(struct ieee80211_hw *hw)
1129 {
1130         struct ath_wiphy *aphy = hw->priv;
1131         struct ath_softc *sc = aphy->sc;
1132         struct ath_hw *ah = sc->sc_ah;
1133         struct ath_common *common = ath9k_hw_common(ah);
1134         struct ieee80211_channel *curchan = hw->conf.channel;
1135         struct ath9k_channel *init_channel;
1136         int r;
1137
1138         ath_print(common, ATH_DBG_CONFIG,
1139                   "Starting driver with initial channel: %d MHz\n",
1140                   curchan->center_freq);
1141
1142         mutex_lock(&sc->mutex);
1143
1144         if (ath9k_wiphy_started(sc)) {
1145                 if (sc->chan_idx == curchan->hw_value) {
1146                         /*
1147                          * Already on the operational channel, the new wiphy
1148                          * can be marked active.
1149                          */
1150                         aphy->state = ATH_WIPHY_ACTIVE;
1151                         ieee80211_wake_queues(hw);
1152                 } else {
1153                         /*
1154                          * Another wiphy is on another channel, start the new
1155                          * wiphy in paused state.
1156                          */
1157                         aphy->state = ATH_WIPHY_PAUSED;
1158                         ieee80211_stop_queues(hw);
1159                 }
1160                 mutex_unlock(&sc->mutex);
1161                 return 0;
1162         }
1163         aphy->state = ATH_WIPHY_ACTIVE;
1164
1165         /* setup initial channel */
1166
1167         sc->chan_idx = curchan->hw_value;
1168
1169         init_channel = ath_get_curchannel(sc, hw);
1170
1171         /* Reset SERDES registers */
1172         ath9k_hw_configpcipowersave(ah, 0, 0);
1173
1174         /*
1175          * The basic interface to setting the hardware in a good
1176          * state is ``reset''.  On return the hardware is known to
1177          * be powered up and with interrupts disabled.  This must
1178          * be followed by initialization of the appropriate bits
1179          * and then setup of the interrupt mask.
1180          */
1181         spin_lock_bh(&sc->sc_resetlock);
1182         r = ath9k_hw_reset(ah, init_channel, false);
1183         if (r) {
1184                 ath_print(common, ATH_DBG_FATAL,
1185                           "Unable to reset hardware; reset status %d "
1186                           "(freq %u MHz)\n", r,
1187                           curchan->center_freq);
1188                 spin_unlock_bh(&sc->sc_resetlock);
1189                 goto mutex_unlock;
1190         }
1191         spin_unlock_bh(&sc->sc_resetlock);
1192
1193         /*
1194          * This is needed only to setup initial state
1195          * but it's best done after a reset.
1196          */
1197         ath_update_txpow(sc);
1198
1199         /*
1200          * Setup the hardware after reset:
1201          * The receive engine is set going.
1202          * Frame transmit is handled entirely
1203          * in the frame output path; there's nothing to do
1204          * here except setup the interrupt mask.
1205          */
1206         if (ath_startrecv(sc) != 0) {
1207                 ath_print(common, ATH_DBG_FATAL,
1208                           "Unable to start recv logic\n");
1209                 r = -EIO;
1210                 goto mutex_unlock;
1211         }
1212
1213         /* Setup our intr mask. */
1214         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1215                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1216                     ATH9K_INT_GLOBAL;
1217
1218         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1219                 ah->imask |= ATH9K_INT_RXHP | ATH9K_INT_RXLP;
1220         else
1221                 ah->imask |= ATH9K_INT_RX;
1222
1223         if (ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
1224                 ah->imask |= ATH9K_INT_GTT;
1225
1226         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1227                 ah->imask |= ATH9K_INT_CST;
1228
1229         ath_cache_conf_rate(sc, &hw->conf);
1230
1231         sc->sc_flags &= ~SC_OP_INVALID;
1232
1233         /* Disable BMISS interrupt when we're not associated */
1234         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1235         ath9k_hw_set_interrupts(ah, ah->imask);
1236
1237         ieee80211_wake_queues(hw);
1238
1239         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1240
1241         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1242             !ah->btcoex_hw.enabled) {
1243                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1244                                            AR_STOMP_LOW_WLAN_WGHT);
1245                 ath9k_hw_btcoex_enable(ah);
1246
1247                 if (common->bus_ops->bt_coex_prep)
1248                         common->bus_ops->bt_coex_prep(common);
1249                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1250                         ath9k_btcoex_timer_resume(sc);
1251         }
1252
1253 mutex_unlock:
1254         mutex_unlock(&sc->mutex);
1255
1256         return r;
1257 }
1258
1259 static int ath9k_tx(struct ieee80211_hw *hw,
1260                     struct sk_buff *skb)
1261 {
1262         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1263         struct ath_wiphy *aphy = hw->priv;
1264         struct ath_softc *sc = aphy->sc;
1265         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1266         struct ath_tx_control txctl;
1267         int padpos, padsize;
1268         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1269
1270         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1271                 ath_print(common, ATH_DBG_XMIT,
1272                           "ath9k: %s: TX in unexpected wiphy state "
1273                           "%d\n", wiphy_name(hw->wiphy), aphy->state);
1274                 goto exit;
1275         }
1276
1277         if (sc->ps_enabled) {
1278                 /*
1279                  * mac80211 does not set PM field for normal data frames, so we
1280                  * need to update that based on the current PS mode.
1281                  */
1282                 if (ieee80211_is_data(hdr->frame_control) &&
1283                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1284                     !ieee80211_has_pm(hdr->frame_control)) {
1285                         ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1286                                   "while in PS mode\n");
1287                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1288                 }
1289         }
1290
1291         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1292                 /*
1293                  * We are using PS-Poll and mac80211 can request TX while in
1294                  * power save mode. Need to wake up hardware for the TX to be
1295                  * completed and if needed, also for RX of buffered frames.
1296                  */
1297                 ath9k_ps_wakeup(sc);
1298                 ath9k_hw_setrxabort(sc->sc_ah, 0);
1299                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1300                         ath_print(common, ATH_DBG_PS,
1301                                   "Sending PS-Poll to pick a buffered frame\n");
1302                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1303                 } else {
1304                         ath_print(common, ATH_DBG_PS,
1305                                   "Wake up to complete TX\n");
1306                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1307                 }
1308                 /*
1309                  * The actual restore operation will happen only after
1310                  * the sc_flags bit is cleared. We are just dropping
1311                  * the ps_usecount here.
1312                  */
1313                 ath9k_ps_restore(sc);
1314         }
1315
1316         memset(&txctl, 0, sizeof(struct ath_tx_control));
1317
1318         /*
1319          * As a temporary workaround, assign seq# here; this will likely need
1320          * to be cleaned up to work better with Beacon transmission and virtual
1321          * BSSes.
1322          */
1323         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1324                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1325                         sc->tx.seq_no += 0x10;
1326                 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1327                 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1328         }
1329
1330         /* Add the padding after the header if this is not already done */
1331         padpos = ath9k_cmn_padpos(hdr->frame_control);
1332         padsize = padpos & 3;
1333         if (padsize && skb->len>padpos) {
1334                 if (skb_headroom(skb) < padsize)
1335                         return -1;
1336                 skb_push(skb, padsize);
1337                 memmove(skb->data, skb->data + padsize, padpos);
1338         }
1339
1340         /* Check if a tx queue is available */
1341
1342         txctl.txq = ath_test_get_txq(sc, skb);
1343         if (!txctl.txq)
1344                 goto exit;
1345
1346         ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1347
1348         if (ath_tx_start(hw, skb, &txctl) != 0) {
1349                 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1350                 goto exit;
1351         }
1352
1353         return 0;
1354 exit:
1355         dev_kfree_skb_any(skb);
1356         return 0;
1357 }
1358
1359 static void ath9k_stop(struct ieee80211_hw *hw)
1360 {
1361         struct ath_wiphy *aphy = hw->priv;
1362         struct ath_softc *sc = aphy->sc;
1363         struct ath_hw *ah = sc->sc_ah;
1364         struct ath_common *common = ath9k_hw_common(ah);
1365
1366         mutex_lock(&sc->mutex);
1367
1368         aphy->state = ATH_WIPHY_INACTIVE;
1369
1370         cancel_delayed_work_sync(&sc->ath_led_blink_work);
1371         cancel_delayed_work_sync(&sc->tx_complete_work);
1372
1373         if (!sc->num_sec_wiphy) {
1374                 cancel_delayed_work_sync(&sc->wiphy_work);
1375                 cancel_work_sync(&sc->chan_work);
1376         }
1377
1378         if (sc->sc_flags & SC_OP_INVALID) {
1379                 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1380                 mutex_unlock(&sc->mutex);
1381                 return;
1382         }
1383
1384         if (ath9k_wiphy_started(sc)) {
1385                 mutex_unlock(&sc->mutex);
1386                 return; /* another wiphy still in use */
1387         }
1388
1389         /* Ensure HW is awake when we try to shut it down. */
1390         ath9k_ps_wakeup(sc);
1391
1392         if (ah->btcoex_hw.enabled) {
1393                 ath9k_hw_btcoex_disable(ah);
1394                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1395                         ath9k_btcoex_timer_pause(sc);
1396         }
1397
1398         /* make sure h/w will not generate any interrupt
1399          * before setting the invalid flag. */
1400         ath9k_hw_set_interrupts(ah, 0);
1401
1402         if (!(sc->sc_flags & SC_OP_INVALID)) {
1403                 ath_drain_all_txq(sc, false);
1404                 ath_stoprecv(sc);
1405                 ath9k_hw_phy_disable(ah);
1406         } else
1407                 sc->rx.rxlink = NULL;
1408
1409         /* disable HAL and put h/w to sleep */
1410         ath9k_hw_disable(ah);
1411         ath9k_hw_configpcipowersave(ah, 1, 1);
1412         ath9k_ps_restore(sc);
1413
1414         /* Finally, put the chip in FULL SLEEP mode */
1415         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1416
1417         sc->sc_flags |= SC_OP_INVALID;
1418
1419         mutex_unlock(&sc->mutex);
1420
1421         ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1422 }
1423
1424 static int ath9k_add_interface(struct ieee80211_hw *hw,
1425                                struct ieee80211_vif *vif)
1426 {
1427         struct ath_wiphy *aphy = hw->priv;
1428         struct ath_softc *sc = aphy->sc;
1429         struct ath_hw *ah = sc->sc_ah;
1430         struct ath_common *common = ath9k_hw_common(ah);
1431         struct ath_vif *avp = (void *)vif->drv_priv;
1432         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1433         int ret = 0;
1434
1435         mutex_lock(&sc->mutex);
1436
1437         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) &&
1438             sc->nvifs > 0) {
1439                 ret = -ENOBUFS;
1440                 goto out;
1441         }
1442
1443         switch (vif->type) {
1444         case NL80211_IFTYPE_STATION:
1445                 ic_opmode = NL80211_IFTYPE_STATION;
1446                 break;
1447         case NL80211_IFTYPE_ADHOC:
1448         case NL80211_IFTYPE_AP:
1449         case NL80211_IFTYPE_MESH_POINT:
1450                 if (sc->nbcnvifs >= ATH_BCBUF) {
1451                         ret = -ENOBUFS;
1452                         goto out;
1453                 }
1454                 ic_opmode = vif->type;
1455                 break;
1456         default:
1457                 ath_print(common, ATH_DBG_FATAL,
1458                         "Interface type %d not yet supported\n", vif->type);
1459                 ret = -EOPNOTSUPP;
1460                 goto out;
1461         }
1462
1463         ath_print(common, ATH_DBG_CONFIG,
1464                   "Attach a VIF of type: %d\n", ic_opmode);
1465
1466         /* Set the VIF opmode */
1467         avp->av_opmode = ic_opmode;
1468         avp->av_bslot = -1;
1469
1470         sc->nvifs++;
1471
1472         if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
1473                 ath9k_set_bssid_mask(hw);
1474
1475         if (sc->nvifs > 1)
1476                 goto out; /* skip global settings for secondary vif */
1477
1478         if (ic_opmode == NL80211_IFTYPE_AP) {
1479                 ath9k_hw_set_tsfadjust(ah, 1);
1480                 sc->sc_flags |= SC_OP_TSF_RESET;
1481         }
1482
1483         /* Set the device opmode */
1484         ah->opmode = ic_opmode;
1485
1486         /*
1487          * Enable MIB interrupts when there are hardware phy counters.
1488          * Note we only do this (at the moment) for station mode.
1489          */
1490         if ((vif->type == NL80211_IFTYPE_STATION) ||
1491             (vif->type == NL80211_IFTYPE_ADHOC) ||
1492             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1493                 if (ah->config.enable_ani)
1494                         ah->imask |= ATH9K_INT_MIB;
1495                 ah->imask |= ATH9K_INT_TSFOOR;
1496         }
1497
1498         ath9k_hw_set_interrupts(ah, ah->imask);
1499
1500         if (vif->type == NL80211_IFTYPE_AP    ||
1501             vif->type == NL80211_IFTYPE_ADHOC ||
1502             vif->type == NL80211_IFTYPE_MONITOR)
1503                 ath_start_ani(common);
1504
1505 out:
1506         mutex_unlock(&sc->mutex);
1507         return ret;
1508 }
1509
1510 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1511                                    struct ieee80211_vif *vif)
1512 {
1513         struct ath_wiphy *aphy = hw->priv;
1514         struct ath_softc *sc = aphy->sc;
1515         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1516         struct ath_vif *avp = (void *)vif->drv_priv;
1517         int i;
1518
1519         ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1520
1521         mutex_lock(&sc->mutex);
1522
1523         /* Stop ANI */
1524         del_timer_sync(&common->ani.timer);
1525
1526         /* Reclaim beacon resources */
1527         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1528             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1529             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1530                 ath9k_ps_wakeup(sc);
1531                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1532                 ath9k_ps_restore(sc);
1533         }
1534
1535         ath_beacon_return(sc, avp);
1536         sc->sc_flags &= ~SC_OP_BEACONS;
1537
1538         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1539                 if (sc->beacon.bslot[i] == vif) {
1540                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1541                                "slot\n", __func__);
1542                         sc->beacon.bslot[i] = NULL;
1543                         sc->beacon.bslot_aphy[i] = NULL;
1544                 }
1545         }
1546
1547         sc->nvifs--;
1548
1549         mutex_unlock(&sc->mutex);
1550 }
1551
1552 void ath9k_enable_ps(struct ath_softc *sc)
1553 {
1554         struct ath_hw *ah = sc->sc_ah;
1555
1556         sc->ps_enabled = true;
1557         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1558                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1559                         ah->imask |= ATH9K_INT_TIM_TIMER;
1560                         ath9k_hw_set_interrupts(ah, ah->imask);
1561                 }
1562         }
1563         ath9k_hw_setrxabort(ah, 1);
1564 }
1565
1566 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1567 {
1568         struct ath_wiphy *aphy = hw->priv;
1569         struct ath_softc *sc = aphy->sc;
1570         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1571         struct ieee80211_conf *conf = &hw->conf;
1572         struct ath_hw *ah = sc->sc_ah;
1573         bool disable_radio;
1574
1575         mutex_lock(&sc->mutex);
1576
1577         /*
1578          * Leave this as the first check because we need to turn on the
1579          * radio if it was disabled before prior to processing the rest
1580          * of the changes. Likewise we must only disable the radio towards
1581          * the end.
1582          */
1583         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1584                 bool enable_radio;
1585                 bool all_wiphys_idle;
1586                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1587
1588                 spin_lock_bh(&sc->wiphy_lock);
1589                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1590                 ath9k_set_wiphy_idle(aphy, idle);
1591
1592                 enable_radio = (!idle && all_wiphys_idle);
1593
1594                 /*
1595                  * After we unlock here its possible another wiphy
1596                  * can be re-renabled so to account for that we will
1597                  * only disable the radio toward the end of this routine
1598                  * if by then all wiphys are still idle.
1599                  */
1600                 spin_unlock_bh(&sc->wiphy_lock);
1601
1602                 if (enable_radio) {
1603                         sc->ps_idle = false;
1604                         ath_radio_enable(sc, hw);
1605                         ath_print(common, ATH_DBG_CONFIG,
1606                                   "not-idle: enabling radio\n");
1607                 }
1608         }
1609
1610         /*
1611          * We just prepare to enable PS. We have to wait until our AP has
1612          * ACK'd our null data frame to disable RX otherwise we'll ignore
1613          * those ACKs and end up retransmitting the same null data frames.
1614          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1615          */
1616         if (changed & IEEE80211_CONF_CHANGE_PS) {
1617                 if (conf->flags & IEEE80211_CONF_PS) {
1618                         sc->ps_flags |= PS_ENABLED;
1619                         /*
1620                          * At this point we know hardware has received an ACK
1621                          * of a previously sent null data frame.
1622                          */
1623                         if ((sc->ps_flags & PS_NULLFUNC_COMPLETED)) {
1624                                 sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
1625                                 ath9k_enable_ps(sc);
1626                         }
1627                 } else {
1628                         sc->ps_enabled = false;
1629                         sc->ps_flags &= ~(PS_ENABLED |
1630                                           PS_NULLFUNC_COMPLETED);
1631                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
1632                         if (!(ah->caps.hw_caps &
1633                               ATH9K_HW_CAP_AUTOSLEEP)) {
1634                                 ath9k_hw_setrxabort(sc->sc_ah, 0);
1635                                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1636                                                   PS_WAIT_FOR_CAB |
1637                                                   PS_WAIT_FOR_PSPOLL_DATA |
1638                                                   PS_WAIT_FOR_TX_ACK);
1639                                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1640                                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1641                                         ath9k_hw_set_interrupts(sc->sc_ah,
1642                                                         ah->imask);
1643                                 }
1644                         }
1645                 }
1646         }
1647
1648         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1649                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1650                         ath_print(common, ATH_DBG_CONFIG,
1651                                   "HW opmode set to Monitor mode\n");
1652                         sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1653                 }
1654         }
1655
1656         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1657                 struct ieee80211_channel *curchan = hw->conf.channel;
1658                 int pos = curchan->hw_value;
1659
1660                 aphy->chan_idx = pos;
1661                 aphy->chan_is_ht = conf_is_ht(conf);
1662
1663                 if (aphy->state == ATH_WIPHY_SCAN ||
1664                     aphy->state == ATH_WIPHY_ACTIVE)
1665                         ath9k_wiphy_pause_all_forced(sc, aphy);
1666                 else {
1667                         /*
1668                          * Do not change operational channel based on a paused
1669                          * wiphy changes.
1670                          */
1671                         goto skip_chan_change;
1672                 }
1673
1674                 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1675                           curchan->center_freq);
1676
1677                 /* XXX: remove me eventualy */
1678                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1679
1680                 ath_update_chainmask(sc, conf_is_ht(conf));
1681
1682                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1683                         ath_print(common, ATH_DBG_FATAL,
1684                                   "Unable to set channel\n");
1685                         mutex_unlock(&sc->mutex);
1686                         return -EINVAL;
1687                 }
1688         }
1689
1690 skip_chan_change:
1691         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1692                 sc->config.txpowlimit = 2 * conf->power_level;
1693                 ath_update_txpow(sc);
1694         }
1695
1696         spin_lock_bh(&sc->wiphy_lock);
1697         disable_radio = ath9k_all_wiphys_idle(sc);
1698         spin_unlock_bh(&sc->wiphy_lock);
1699
1700         if (disable_radio) {
1701                 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1702                 sc->ps_idle = true;
1703                 ath_radio_disable(sc, hw);
1704         }
1705
1706         mutex_unlock(&sc->mutex);
1707
1708         return 0;
1709 }
1710
1711 #define SUPPORTED_FILTERS                       \
1712         (FIF_PROMISC_IN_BSS |                   \
1713         FIF_ALLMULTI |                          \
1714         FIF_CONTROL |                           \
1715         FIF_PSPOLL |                            \
1716         FIF_OTHER_BSS |                         \
1717         FIF_BCN_PRBRESP_PROMISC |               \
1718         FIF_FCSFAIL)
1719
1720 /* FIXME: sc->sc_full_reset ? */
1721 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1722                                    unsigned int changed_flags,
1723                                    unsigned int *total_flags,
1724                                    u64 multicast)
1725 {
1726         struct ath_wiphy *aphy = hw->priv;
1727         struct ath_softc *sc = aphy->sc;
1728         u32 rfilt;
1729
1730         changed_flags &= SUPPORTED_FILTERS;
1731         *total_flags &= SUPPORTED_FILTERS;
1732
1733         sc->rx.rxfilter = *total_flags;
1734         ath9k_ps_wakeup(sc);
1735         rfilt = ath_calcrxfilter(sc);
1736         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1737         ath9k_ps_restore(sc);
1738
1739         ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1740                   "Set HW RX filter: 0x%x\n", rfilt);
1741 }
1742
1743 static int ath9k_sta_add(struct ieee80211_hw *hw,
1744                          struct ieee80211_vif *vif,
1745                          struct ieee80211_sta *sta)
1746 {
1747         struct ath_wiphy *aphy = hw->priv;
1748         struct ath_softc *sc = aphy->sc;
1749
1750         ath_node_attach(sc, sta);
1751
1752         return 0;
1753 }
1754
1755 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1756                             struct ieee80211_vif *vif,
1757                             struct ieee80211_sta *sta)
1758 {
1759         struct ath_wiphy *aphy = hw->priv;
1760         struct ath_softc *sc = aphy->sc;
1761
1762         ath_node_detach(sc, sta);
1763
1764         return 0;
1765 }
1766
1767 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1768                          const struct ieee80211_tx_queue_params *params)
1769 {
1770         struct ath_wiphy *aphy = hw->priv;
1771         struct ath_softc *sc = aphy->sc;
1772         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1773         struct ath9k_tx_queue_info qi;
1774         int ret = 0, qnum;
1775
1776         if (queue >= WME_NUM_AC)
1777                 return 0;
1778
1779         mutex_lock(&sc->mutex);
1780
1781         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1782
1783         qi.tqi_aifs = params->aifs;
1784         qi.tqi_cwmin = params->cw_min;
1785         qi.tqi_cwmax = params->cw_max;
1786         qi.tqi_burstTime = params->txop;
1787         qnum = ath_get_hal_qnum(queue, sc);
1788
1789         ath_print(common, ATH_DBG_CONFIG,
1790                   "Configure tx [queue/halq] [%d/%d],  "
1791                   "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1792                   queue, qnum, params->aifs, params->cw_min,
1793                   params->cw_max, params->txop);
1794
1795         ret = ath_txq_update(sc, qnum, &qi);
1796         if (ret)
1797                 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1798
1799         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1800                 if ((qnum == sc->tx.hwq_map[ATH9K_WME_AC_BE]) && !ret)
1801                         ath_beaconq_config(sc);
1802
1803         mutex_unlock(&sc->mutex);
1804
1805         return ret;
1806 }
1807
1808 static int ath9k_set_key(struct ieee80211_hw *hw,
1809                          enum set_key_cmd cmd,
1810                          struct ieee80211_vif *vif,
1811                          struct ieee80211_sta *sta,
1812                          struct ieee80211_key_conf *key)
1813 {
1814         struct ath_wiphy *aphy = hw->priv;
1815         struct ath_softc *sc = aphy->sc;
1816         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1817         int ret = 0;
1818
1819         if (modparam_nohwcrypt)
1820                 return -ENOSPC;
1821
1822         mutex_lock(&sc->mutex);
1823         ath9k_ps_wakeup(sc);
1824         ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1825
1826         switch (cmd) {
1827         case SET_KEY:
1828                 ret = ath_key_config(common, vif, sta, key);
1829                 if (ret >= 0) {
1830                         key->hw_key_idx = ret;
1831                         /* push IV and Michael MIC generation to stack */
1832                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1833                         if (key->alg == ALG_TKIP)
1834                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1835                         if (sc->sc_ah->sw_mgmt_crypto && key->alg == ALG_CCMP)
1836                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1837                         ret = 0;
1838                 }
1839                 break;
1840         case DISABLE_KEY:
1841                 ath_key_delete(common, key);
1842                 break;
1843         default:
1844                 ret = -EINVAL;
1845         }
1846
1847         ath9k_ps_restore(sc);
1848         mutex_unlock(&sc->mutex);
1849
1850         return ret;
1851 }
1852
1853 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1854                                    struct ieee80211_vif *vif,
1855                                    struct ieee80211_bss_conf *bss_conf,
1856                                    u32 changed)
1857 {
1858         struct ath_wiphy *aphy = hw->priv;
1859         struct ath_softc *sc = aphy->sc;
1860         struct ath_hw *ah = sc->sc_ah;
1861         struct ath_common *common = ath9k_hw_common(ah);
1862         struct ath_vif *avp = (void *)vif->drv_priv;
1863         int slottime;
1864         int error;
1865
1866         mutex_lock(&sc->mutex);
1867
1868         if (changed & BSS_CHANGED_BSSID) {
1869                 /* Set BSSID */
1870                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1871                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1872                 common->curaid = 0;
1873                 ath9k_hw_write_associd(ah);
1874
1875                 /* Set aggregation protection mode parameters */
1876                 sc->config.ath_aggr_prot = 0;
1877
1878                 /* Only legacy IBSS for now */
1879                 if (vif->type == NL80211_IFTYPE_ADHOC)
1880                         ath_update_chainmask(sc, 0);
1881
1882                 ath_print(common, ATH_DBG_CONFIG,
1883                           "BSSID: %pM aid: 0x%x\n",
1884                           common->curbssid, common->curaid);
1885
1886                 /* need to reconfigure the beacon */
1887                 sc->sc_flags &= ~SC_OP_BEACONS ;
1888         }
1889
1890         /* Enable transmission of beacons (AP, IBSS, MESH) */
1891         if ((changed & BSS_CHANGED_BEACON) ||
1892             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1893                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1894                 error = ath_beacon_alloc(aphy, vif);
1895                 if (!error)
1896                         ath_beacon_config(sc, vif);
1897         }
1898
1899         if (changed & BSS_CHANGED_ERP_SLOT) {
1900                 if (bss_conf->use_short_slot)
1901                         slottime = 9;
1902                 else
1903                         slottime = 20;
1904                 if (vif->type == NL80211_IFTYPE_AP) {
1905                         /*
1906                          * Defer update, so that connected stations can adjust
1907                          * their settings at the same time.
1908                          * See beacon.c for more details
1909                          */
1910                         sc->beacon.slottime = slottime;
1911                         sc->beacon.updateslot = UPDATE;
1912                 } else {
1913                         ah->slottime = slottime;
1914                         ath9k_hw_init_global_settings(ah);
1915                 }
1916         }
1917
1918         /* Disable transmission of beacons */
1919         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1920                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1921
1922         if (changed & BSS_CHANGED_BEACON_INT) {
1923                 sc->beacon_interval = bss_conf->beacon_int;
1924                 /*
1925                  * In case of AP mode, the HW TSF has to be reset
1926                  * when the beacon interval changes.
1927                  */
1928                 if (vif->type == NL80211_IFTYPE_AP) {
1929                         sc->sc_flags |= SC_OP_TSF_RESET;
1930                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1931                         error = ath_beacon_alloc(aphy, vif);
1932                         if (!error)
1933                                 ath_beacon_config(sc, vif);
1934                 } else {
1935                         ath_beacon_config(sc, vif);
1936                 }
1937         }
1938
1939         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1940                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1941                           bss_conf->use_short_preamble);
1942                 if (bss_conf->use_short_preamble)
1943                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1944                 else
1945                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1946         }
1947
1948         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1949                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1950                           bss_conf->use_cts_prot);
1951                 if (bss_conf->use_cts_prot &&
1952                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1953                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1954                 else
1955                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1956         }
1957
1958         if (changed & BSS_CHANGED_ASSOC) {
1959                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1960                         bss_conf->assoc);
1961                 ath9k_bss_assoc_info(sc, vif, bss_conf);
1962         }
1963
1964         mutex_unlock(&sc->mutex);
1965 }
1966
1967 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1968 {
1969         u64 tsf;
1970         struct ath_wiphy *aphy = hw->priv;
1971         struct ath_softc *sc = aphy->sc;
1972
1973         mutex_lock(&sc->mutex);
1974         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1975         mutex_unlock(&sc->mutex);
1976
1977         return tsf;
1978 }
1979
1980 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1981 {
1982         struct ath_wiphy *aphy = hw->priv;
1983         struct ath_softc *sc = aphy->sc;
1984
1985         mutex_lock(&sc->mutex);
1986         ath9k_hw_settsf64(sc->sc_ah, tsf);
1987         mutex_unlock(&sc->mutex);
1988 }
1989
1990 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1991 {
1992         struct ath_wiphy *aphy = hw->priv;
1993         struct ath_softc *sc = aphy->sc;
1994
1995         mutex_lock(&sc->mutex);
1996
1997         ath9k_ps_wakeup(sc);
1998         ath9k_hw_reset_tsf(sc->sc_ah);
1999         ath9k_ps_restore(sc);
2000
2001         mutex_unlock(&sc->mutex);
2002 }
2003
2004 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2005                               struct ieee80211_vif *vif,
2006                               enum ieee80211_ampdu_mlme_action action,
2007                               struct ieee80211_sta *sta,
2008                               u16 tid, u16 *ssn)
2009 {
2010         struct ath_wiphy *aphy = hw->priv;
2011         struct ath_softc *sc = aphy->sc;
2012         int ret = 0;
2013
2014         switch (action) {
2015         case IEEE80211_AMPDU_RX_START:
2016                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2017                         ret = -ENOTSUPP;
2018                 break;
2019         case IEEE80211_AMPDU_RX_STOP:
2020                 break;
2021         case IEEE80211_AMPDU_TX_START:
2022                 ath9k_ps_wakeup(sc);
2023                 ath_tx_aggr_start(sc, sta, tid, ssn);
2024                 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2025                 ath9k_ps_restore(sc);
2026                 break;
2027         case IEEE80211_AMPDU_TX_STOP:
2028                 ath9k_ps_wakeup(sc);
2029                 ath_tx_aggr_stop(sc, sta, tid);
2030                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2031                 ath9k_ps_restore(sc);
2032                 break;
2033         case IEEE80211_AMPDU_TX_OPERATIONAL:
2034                 ath9k_ps_wakeup(sc);
2035                 ath_tx_aggr_resume(sc, sta, tid);
2036                 ath9k_ps_restore(sc);
2037                 break;
2038         default:
2039                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
2040                           "Unknown AMPDU action\n");
2041         }
2042
2043         return ret;
2044 }
2045
2046 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2047 {
2048         struct ath_wiphy *aphy = hw->priv;
2049         struct ath_softc *sc = aphy->sc;
2050         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2051
2052         mutex_lock(&sc->mutex);
2053         if (ath9k_wiphy_scanning(sc)) {
2054                 printk(KERN_DEBUG "ath9k: Two wiphys trying to scan at the "
2055                        "same time\n");
2056                 /*
2057                  * Do not allow the concurrent scanning state for now. This
2058                  * could be improved with scanning control moved into ath9k.
2059                  */
2060                 mutex_unlock(&sc->mutex);
2061                 return;
2062         }
2063
2064         aphy->state = ATH_WIPHY_SCAN;
2065         ath9k_wiphy_pause_all_forced(sc, aphy);
2066         sc->sc_flags |= SC_OP_SCANNING;
2067         del_timer_sync(&common->ani.timer);
2068         cancel_delayed_work_sync(&sc->tx_complete_work);
2069         mutex_unlock(&sc->mutex);
2070 }
2071
2072 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2073 {
2074         struct ath_wiphy *aphy = hw->priv;
2075         struct ath_softc *sc = aphy->sc;
2076         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2077
2078         mutex_lock(&sc->mutex);
2079         aphy->state = ATH_WIPHY_ACTIVE;
2080         sc->sc_flags &= ~SC_OP_SCANNING;
2081         sc->sc_flags |= SC_OP_FULL_RESET;
2082         ath_start_ani(common);
2083         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
2084         ath_beacon_config(sc, NULL);
2085         mutex_unlock(&sc->mutex);
2086 }
2087
2088 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2089 {
2090         struct ath_wiphy *aphy = hw->priv;
2091         struct ath_softc *sc = aphy->sc;
2092         struct ath_hw *ah = sc->sc_ah;
2093
2094         mutex_lock(&sc->mutex);
2095         ah->coverage_class = coverage_class;
2096         ath9k_hw_init_global_settings(ah);
2097         mutex_unlock(&sc->mutex);
2098 }
2099
2100 struct ieee80211_ops ath9k_ops = {
2101         .tx                 = ath9k_tx,
2102         .start              = ath9k_start,
2103         .stop               = ath9k_stop,
2104         .add_interface      = ath9k_add_interface,
2105         .remove_interface   = ath9k_remove_interface,
2106         .config             = ath9k_config,
2107         .configure_filter   = ath9k_configure_filter,
2108         .sta_add            = ath9k_sta_add,
2109         .sta_remove         = ath9k_sta_remove,
2110         .conf_tx            = ath9k_conf_tx,
2111         .bss_info_changed   = ath9k_bss_info_changed,
2112         .set_key            = ath9k_set_key,
2113         .get_tsf            = ath9k_get_tsf,
2114         .set_tsf            = ath9k_set_tsf,
2115         .reset_tsf          = ath9k_reset_tsf,
2116         .ampdu_action       = ath9k_ampdu_action,
2117         .sw_scan_start      = ath9k_sw_scan_start,
2118         .sw_scan_complete   = ath9k_sw_scan_complete,
2119         .rfkill_poll        = ath9k_rfkill_poll_state,
2120         .set_coverage_class = ath9k_set_coverage_class,
2121 };