Merge branch 'i2c-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jdelvar...
[pandora-kernel.git] / drivers / net / wireless / ath / ath9k / btcoex.c
1 /*
2  * Copyright (c) 2009-2011 Atheros Communications Inc.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16
17 #include "hw.h"
18
19 enum ath_bt_mode {
20         ATH_BT_COEX_MODE_LEGACY,        /* legacy rx_clear mode */
21         ATH_BT_COEX_MODE_UNSLOTTED,     /* untimed/unslotted mode */
22         ATH_BT_COEX_MODE_SLOTTED,       /* slotted mode */
23         ATH_BT_COEX_MODE_DISALBED,      /* coexistence disabled */
24 };
25
26 struct ath_btcoex_config {
27         u8 bt_time_extend;
28         bool bt_txstate_extend;
29         bool bt_txframe_extend;
30         enum ath_bt_mode bt_mode; /* coexistence mode */
31         bool bt_quiet_collision;
32         bool bt_rxclear_polarity; /* invert rx_clear as WLAN_ACTIVE*/
33         u8 bt_priority_time;
34         u8 bt_first_slot_time;
35         bool bt_hold_rx_clear;
36 };
37
38
39 void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum)
40 {
41         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
42         const struct ath_btcoex_config ath_bt_config = {
43                 .bt_time_extend = 0,
44                 .bt_txstate_extend = true,
45                 .bt_txframe_extend = true,
46                 .bt_mode = ATH_BT_COEX_MODE_SLOTTED,
47                 .bt_quiet_collision = true,
48                 .bt_rxclear_polarity = true,
49                 .bt_priority_time = 2,
50                 .bt_first_slot_time = 5,
51                 .bt_hold_rx_clear = true,
52         };
53         u32 i, idx;
54         bool rxclear_polarity = ath_bt_config.bt_rxclear_polarity;
55
56         if (AR_SREV_9300_20_OR_LATER(ah))
57                 rxclear_polarity = !ath_bt_config.bt_rxclear_polarity;
58
59         btcoex_hw->bt_coex_mode =
60                 (btcoex_hw->bt_coex_mode & AR_BT_QCU_THRESH) |
61                 SM(ath_bt_config.bt_time_extend, AR_BT_TIME_EXTEND) |
62                 SM(ath_bt_config.bt_txstate_extend, AR_BT_TXSTATE_EXTEND) |
63                 SM(ath_bt_config.bt_txframe_extend, AR_BT_TX_FRAME_EXTEND) |
64                 SM(ath_bt_config.bt_mode, AR_BT_MODE) |
65                 SM(ath_bt_config.bt_quiet_collision, AR_BT_QUIET) |
66                 SM(rxclear_polarity, AR_BT_RX_CLEAR_POLARITY) |
67                 SM(ath_bt_config.bt_priority_time, AR_BT_PRIORITY_TIME) |
68                 SM(ath_bt_config.bt_first_slot_time, AR_BT_FIRST_SLOT_TIME) |
69                 SM(qnum, AR_BT_QCU_THRESH);
70
71         btcoex_hw->bt_coex_mode2 =
72                 SM(ath_bt_config.bt_hold_rx_clear, AR_BT_HOLD_RX_CLEAR) |
73                 SM(ATH_BTCOEX_BMISS_THRESH, AR_BT_BCN_MISS_THRESH) |
74                 AR_BT_DISABLE_BT_ANT;
75
76         for (i = 0; i < 32; i++) {
77                 idx = (debruijn32 << i) >> 27;
78                 ah->hw_gen_timers.gen_timer_index[idx] = i;
79         }
80 }
81 EXPORT_SYMBOL(ath9k_hw_init_btcoex_hw);
82
83 void ath9k_hw_btcoex_init_2wire(struct ath_hw *ah)
84 {
85         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
86
87         /* connect bt_active to baseband */
88         REG_CLR_BIT(ah, AR_GPIO_INPUT_EN_VAL,
89                     (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_DEF |
90                      AR_GPIO_INPUT_EN_VAL_BT_FREQUENCY_DEF));
91
92         REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
93                     AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB);
94
95         /* Set input mux for bt_active to gpio pin */
96         REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
97                       AR_GPIO_INPUT_MUX1_BT_ACTIVE,
98                       btcoex_hw->btactive_gpio);
99
100         /* Configure the desired gpio port for input */
101         ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio);
102 }
103 EXPORT_SYMBOL(ath9k_hw_btcoex_init_2wire);
104
105 void ath9k_hw_btcoex_init_3wire(struct ath_hw *ah)
106 {
107         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
108
109         /* btcoex 3-wire */
110         REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
111                         (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB |
112                          AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB));
113
114         /* Set input mux for bt_prority_async and
115          *                  bt_active_async to GPIO pins */
116         REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
117                         AR_GPIO_INPUT_MUX1_BT_ACTIVE,
118                         btcoex_hw->btactive_gpio);
119
120         REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
121                         AR_GPIO_INPUT_MUX1_BT_PRIORITY,
122                         btcoex_hw->btpriority_gpio);
123
124         /* Configure the desired GPIO ports for input */
125
126         ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio);
127         ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btpriority_gpio);
128 }
129 EXPORT_SYMBOL(ath9k_hw_btcoex_init_3wire);
130
131 static void ath9k_hw_btcoex_enable_2wire(struct ath_hw *ah)
132 {
133         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
134
135         /* Configure the desired GPIO port for TX_FRAME output */
136         ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
137                             AR_GPIO_OUTPUT_MUX_AS_TX_FRAME);
138 }
139
140 void ath9k_hw_btcoex_set_weight(struct ath_hw *ah,
141                                 u32 bt_weight,
142                                 u32 wlan_weight)
143 {
144         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
145
146         btcoex_hw->bt_coex_weights = SM(bt_weight, AR_BTCOEX_BT_WGHT) |
147                                      SM(wlan_weight, AR_BTCOEX_WL_WGHT);
148 }
149 EXPORT_SYMBOL(ath9k_hw_btcoex_set_weight);
150
151
152 static void ath9k_hw_btcoex_enable_3wire(struct ath_hw *ah)
153 {
154         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
155         u32  val;
156
157         /*
158          * Program coex mode and weight registers to
159          * enable coex 3-wire
160          */
161         REG_WRITE(ah, AR_BT_COEX_MODE, btcoex_hw->bt_coex_mode);
162         REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex_hw->bt_coex_mode2);
163
164
165         if (AR_SREV_9300_20_OR_LATER(ah)) {
166                 REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, ah->bt_coex_wlan_weight[0]);
167                 REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, ah->bt_coex_wlan_weight[1]);
168                 REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS0, ah->bt_coex_bt_weight[0]);
169                 REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS1, ah->bt_coex_bt_weight[1]);
170                 REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS2, ah->bt_coex_bt_weight[2]);
171                 REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS3, ah->bt_coex_bt_weight[3]);
172
173         } else
174                 REG_WRITE(ah, AR_BT_COEX_WEIGHT, btcoex_hw->bt_coex_weights);
175
176
177
178         if (AR_SREV_9271(ah)) {
179                 val = REG_READ(ah, 0x50040);
180                 val &= 0xFFFFFEFF;
181                 REG_WRITE(ah, 0x50040, val);
182         }
183
184         REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
185         REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 0);
186
187         ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
188                             AR_GPIO_OUTPUT_MUX_AS_RX_CLEAR_EXTERNAL);
189 }
190
191 void ath9k_hw_btcoex_enable(struct ath_hw *ah)
192 {
193         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
194
195         switch (btcoex_hw->scheme) {
196         case ATH_BTCOEX_CFG_NONE:
197                 break;
198         case ATH_BTCOEX_CFG_2WIRE:
199                 ath9k_hw_btcoex_enable_2wire(ah);
200                 break;
201         case ATH_BTCOEX_CFG_3WIRE:
202                 ath9k_hw_btcoex_enable_3wire(ah);
203                 break;
204         }
205
206         REG_RMW(ah, AR_GPIO_PDPU,
207                 (0x2 << (btcoex_hw->btactive_gpio * 2)),
208                 (0x3 << (btcoex_hw->btactive_gpio * 2)));
209
210         ah->btcoex_hw.enabled = true;
211 }
212 EXPORT_SYMBOL(ath9k_hw_btcoex_enable);
213
214 void ath9k_hw_btcoex_disable(struct ath_hw *ah)
215 {
216         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
217
218         ath9k_hw_set_gpio(ah, btcoex_hw->wlanactive_gpio, 0);
219
220         ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
221                         AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
222
223         if (btcoex_hw->scheme == ATH_BTCOEX_CFG_3WIRE) {
224                 REG_WRITE(ah, AR_BT_COEX_MODE, AR_BT_QUIET | AR_BT_MODE);
225                 REG_WRITE(ah, AR_BT_COEX_MODE2, 0);
226
227                 if (AR_SREV_9300_20_OR_LATER(ah)) {
228                         REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, 0);
229                         REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, 0);
230                         REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS0, 0);
231                         REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS1, 0);
232                         REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS2, 0);
233                         REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS3, 0);
234                 } else
235                         REG_WRITE(ah, AR_BT_COEX_WEIGHT, 0);
236
237         }
238
239         ah->btcoex_hw.enabled = false;
240 }
241 EXPORT_SYMBOL(ath9k_hw_btcoex_disable);
242
243 static void ar9003_btcoex_bt_stomp(struct ath_hw *ah,
244                          enum ath_stomp_type stomp_type)
245 {
246         ah->bt_coex_bt_weight[0] = AR9300_BT_WGHT;
247         ah->bt_coex_bt_weight[1] = AR9300_BT_WGHT;
248         ah->bt_coex_bt_weight[2] = AR9300_BT_WGHT;
249         ah->bt_coex_bt_weight[3] = AR9300_BT_WGHT;
250
251
252         switch (stomp_type) {
253         case ATH_BTCOEX_STOMP_ALL:
254                 ah->bt_coex_wlan_weight[0] = AR9300_STOMP_ALL_WLAN_WGHT0;
255                 ah->bt_coex_wlan_weight[1] = AR9300_STOMP_ALL_WLAN_WGHT1;
256                 break;
257         case ATH_BTCOEX_STOMP_LOW:
258                 ah->bt_coex_wlan_weight[0] = AR9300_STOMP_LOW_WLAN_WGHT0;
259                 ah->bt_coex_wlan_weight[1] = AR9300_STOMP_LOW_WLAN_WGHT1;
260                 break;
261         case ATH_BTCOEX_STOMP_NONE:
262                 ah->bt_coex_wlan_weight[0] = AR9300_STOMP_NONE_WLAN_WGHT0;
263                 ah->bt_coex_wlan_weight[1] = AR9300_STOMP_NONE_WLAN_WGHT1;
264                 break;
265
266         default:
267                 ath_dbg(ath9k_hw_common(ah), ATH_DBG_BTCOEX,
268                                 "Invalid Stomptype\n");
269                 break;
270         }
271
272         ath9k_hw_btcoex_enable(ah);
273 }
274
275 /*
276  * Configures appropriate weight based on stomp type.
277  */
278 void ath9k_hw_btcoex_bt_stomp(struct ath_hw *ah,
279                               enum ath_stomp_type stomp_type)
280 {
281         if (AR_SREV_9300_20_OR_LATER(ah)) {
282                 ar9003_btcoex_bt_stomp(ah, stomp_type);
283                 return;
284         }
285
286         switch (stomp_type) {
287         case ATH_BTCOEX_STOMP_ALL:
288                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
289                                 AR_STOMP_ALL_WLAN_WGHT);
290                 break;
291         case ATH_BTCOEX_STOMP_LOW:
292                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
293                                 AR_STOMP_LOW_WLAN_WGHT);
294                 break;
295         case ATH_BTCOEX_STOMP_NONE:
296                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
297                                 AR_STOMP_NONE_WLAN_WGHT);
298                 break;
299         default:
300                 ath_dbg(ath9k_hw_common(ah), ATH_DBG_BTCOEX,
301                                 "Invalid Stomptype\n");
302                 break;
303         }
304
305         ath9k_hw_btcoex_enable(ah);
306 }
307 EXPORT_SYMBOL(ath9k_hw_btcoex_bt_stomp);