ath: fix coding style/readability in ath/ar9170
[pandora-kernel.git] / drivers / net / wireless / ath / ar9170 / eeprom.h
1 /*
2  * Atheros AR9170 driver
3  *
4  * EEPROM layout
5  *
6  * Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; see the file COPYING.  If not, see
20  * http://www.gnu.org/licenses/.
21  *
22  * This file incorporates work covered by the following copyright and
23  * permission notice:
24  *    Copyright (c) 2007-2008 Atheros Communications, Inc.
25  *
26  *    Permission to use, copy, modify, and/or distribute this software for any
27  *    purpose with or without fee is hereby granted, provided that the above
28  *    copyright notice and this permission notice appear in all copies.
29  *
30  *    THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
31  *    WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
32  *    MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
33  *    ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
34  *    WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
35  *    ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
36  *    OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
37  */
38 #ifndef __AR9170_EEPROM_H
39 #define __AR9170_EEPROM_H
40
41 #define AR5416_MAX_CHAINS               2
42 #define AR5416_MODAL_SPURS              5
43
44 struct ar9170_eeprom_modal {
45         __le32  antCtrlChain[AR5416_MAX_CHAINS];
46         __le32  antCtrlCommon;
47         s8      antennaGainCh[AR5416_MAX_CHAINS];
48         u8      switchSettling;
49         u8      txRxAttenCh[AR5416_MAX_CHAINS];
50         u8      rxTxMarginCh[AR5416_MAX_CHAINS];
51         s8      adcDesiredSize;
52         s8      pgaDesiredSize;
53         u8      xlnaGainCh[AR5416_MAX_CHAINS];
54         u8      txEndToXpaOff;
55         u8      txEndToRxOn;
56         u8      txFrameToXpaOn;
57         u8      thresh62;
58         s8      noiseFloorThreshCh[AR5416_MAX_CHAINS];
59         u8      xpdGain;
60         u8      xpd;
61         s8      iqCalICh[AR5416_MAX_CHAINS];
62         s8      iqCalQCh[AR5416_MAX_CHAINS];
63         u8      pdGainOverlap;
64         u8      ob;
65         u8      db;
66         u8      xpaBiasLvl;
67         u8      pwrDecreaseFor2Chain;
68         u8      pwrDecreaseFor3Chain;
69         u8      txFrameToDataStart;
70         u8      txFrameToPaOn;
71         u8      ht40PowerIncForPdadc;
72         u8      bswAtten[AR5416_MAX_CHAINS];
73         u8      bswMargin[AR5416_MAX_CHAINS];
74         u8      swSettleHt40;
75         u8      reserved[22];
76         struct spur_channel {
77                 __le16 spurChan;
78                 u8      spurRangeLow;
79                 u8      spurRangeHigh;
80         } __packed spur_channels[AR5416_MODAL_SPURS];
81 } __packed;
82
83 #define AR5416_NUM_PD_GAINS             4
84 #define AR5416_PD_GAIN_ICEPTS           5
85
86 struct ar9170_calibration_data_per_freq {
87         u8      pwr_pdg[AR5416_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS];
88         u8      vpd_pdg[AR5416_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS];
89 } __packed;
90
91 #define AR5416_NUM_5G_CAL_PIERS         8
92 #define AR5416_NUM_2G_CAL_PIERS         4
93
94 #define AR5416_NUM_5G_TARGET_PWRS       8
95 #define AR5416_NUM_2G_CCK_TARGET_PWRS   3
96 #define AR5416_NUM_2G_OFDM_TARGET_PWRS  4
97 #define AR5416_MAX_NUM_TGT_PWRS         8
98
99 struct ar9170_calibration_target_power_legacy {
100         u8      freq;
101         u8      power[4];
102 } __packed;
103
104 struct ar9170_calibration_target_power_ht {
105         u8      freq;
106         u8      power[8];
107 } __packed;
108
109 #define AR5416_NUM_CTLS                 24
110
111 struct ar9170_calctl_edges {
112         u8      channel;
113 #define AR9170_CALCTL_EDGE_FLAGS        0xC0
114         u8      power_flags;
115 } __packed;
116
117 #define AR5416_NUM_BAND_EDGES           8
118
119 struct ar9170_calctl_data {
120         struct ar9170_calctl_edges
121                 control_edges[AR5416_MAX_CHAINS][AR5416_NUM_BAND_EDGES];
122 } __packed;
123
124
125 struct ar9170_eeprom {
126         __le16  length;
127         __le16  checksum;
128         __le16  version;
129         u8      operating_flags;
130 #define AR9170_OPFLAG_5GHZ              1
131 #define AR9170_OPFLAG_2GHZ              2
132         u8      misc;
133         __le16  reg_domain[2];
134         u8      mac_address[6];
135         u8      rx_mask;
136         u8      tx_mask;
137         __le16  rf_silent;
138         __le16  bluetooth_options;
139         __le16  device_capabilities;
140         __le32  build_number;
141         u8      deviceType;
142         u8      reserved[33];
143
144         u8      customer_data[64];
145
146         struct ar9170_eeprom_modal
147                 modal_header[2];
148
149         u8      cal_freq_pier_5G[AR5416_NUM_5G_CAL_PIERS];
150         u8      cal_freq_pier_2G[AR5416_NUM_2G_CAL_PIERS];
151
152         struct ar9170_calibration_data_per_freq
153                 cal_pier_data_5G[AR5416_MAX_CHAINS][AR5416_NUM_5G_CAL_PIERS],
154                 cal_pier_data_2G[AR5416_MAX_CHAINS][AR5416_NUM_2G_CAL_PIERS];
155
156         /* power calibration data */
157         struct ar9170_calibration_target_power_legacy
158                 cal_tgt_pwr_5G[AR5416_NUM_5G_TARGET_PWRS];
159         struct ar9170_calibration_target_power_ht
160                 cal_tgt_pwr_5G_ht20[AR5416_NUM_5G_TARGET_PWRS],
161                 cal_tgt_pwr_5G_ht40[AR5416_NUM_5G_TARGET_PWRS];
162
163         struct ar9170_calibration_target_power_legacy
164                 cal_tgt_pwr_2G_cck[AR5416_NUM_2G_CCK_TARGET_PWRS],
165                 cal_tgt_pwr_2G_ofdm[AR5416_NUM_2G_OFDM_TARGET_PWRS];
166         struct ar9170_calibration_target_power_ht
167                 cal_tgt_pwr_2G_ht20[AR5416_NUM_2G_OFDM_TARGET_PWRS],
168                 cal_tgt_pwr_2G_ht40[AR5416_NUM_2G_OFDM_TARGET_PWRS];
169
170         /* conformance testing limits */
171         u8      ctl_index[AR5416_NUM_CTLS];
172         struct ar9170_calctl_data
173                 ctl_data[AR5416_NUM_CTLS];
174
175         u8      pad;
176         __le16  subsystem_id;
177 } __packed;
178
179 #endif /* __AR9170_EEPROM_H */