drivers/net/usb/smsc95xx.c

   1  /***************************************************************************
   2  *
   3  * Copyright (C) 2007-2008 SMSC
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License
   7  * as published by the Free Software Foundation; either version 2
   8  * of the License, or (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  18  *
  19  *****************************************************************************/
  20
  21 #include <linux/module.h>
  22 #include <linux/kmod.h>
  23 #include <linux/init.h>
  24 #include <linux/netdevice.h>
  25 #include <linux/etherdevice.h>
  26 #include <linux/ethtool.h>
  27 #include <linux/mii.h>
  28 #include <linux/usb.h>
  29 #include <linux/crc32.h>
  30 #include <linux/usb/usbnet.h>
  31 #include <linux/slab.h>
  32 #include "smsc95xx.h"
  33
  34 #define SMSC_CHIPNAME                   "smsc95xx"
  35 #define SMSC_DRIVER_VERSION             "1.0.4"
  36 #define HS_USB_PKT_SIZE                 (512)
  37 #define FS_USB_PKT_SIZE                 (64)
  38 #define DEFAULT_HS_BURST_CAP_SIZE       (16 * 1024 + 5 * HS_USB_PKT_SIZE)
  39 #define DEFAULT_FS_BURST_CAP_SIZE       (6 * 1024 + 33 * FS_USB_PKT_SIZE)
  40 #define DEFAULT_BULK_IN_DELAY           (0x00002000)
  41 #define MAX_SINGLE_PACKET_SIZE          (2048)
  42 #define LAN95XX_EEPROM_MAGIC            (0x9500)
  43 #define EEPROM_MAC_OFFSET               (0x01)
  44 #define DEFAULT_TX_CSUM_ENABLE          (true)
  45 #define DEFAULT_RX_CSUM_ENABLE          (true)
  46 #define SMSC95XX_INTERNAL_PHY_ID        (1)
  47 #define SMSC95XX_TX_OVERHEAD            (8)
  48 #define SMSC95XX_TX_OVERHEAD_CSUM       (12)
  49
  50 struct smsc95xx_priv {
  51         u32 mac_cr;
  52         u32 hash_hi;
  53         u32 hash_lo;
  54         spinlock_t mac_cr_lock;
  55 };
  56
  57 struct usb_context {
  58         struct usb_ctrlrequest req;
  59         struct usbnet *dev;
  60 };
  61
  62 static int turbo_mode = true;
  63 module_param(turbo_mode, bool, 0644);
  64 MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
  65
  66 static int smsc95xx_read_reg(struct usbnet *dev, u32 index, u32 *data)
  67 {
  68         u32 *buf = kmalloc(4, GFP_KERNEL);
  69         int ret;
  70
  71         BUG_ON(!dev);
  72
  73         if (!buf)
  74                 return -ENOMEM;
  75
  76         ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
  77                 USB_VENDOR_REQUEST_READ_REGISTER,
  78                 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  79                 00, index, buf, 4, USB_CTRL_GET_TIMEOUT);
  80
  81         if (unlikely(ret < 0))
  82                 netdev_warn(dev->net, "Failed to read register index 0x%08x\n", index);
  83
  84         le32_to_cpus(buf);
  85         *data = *buf;
  86         kfree(buf);
  87
  88         return ret;
  89 }
  90
  91 static int smsc95xx_write_reg(struct usbnet *dev, u32 index, u32 data)
  92 {
  93         u32 *buf = kmalloc(4, GFP_KERNEL);
  94         int ret;
  95
  96         BUG_ON(!dev);
  97
  98         if (!buf)
  99                 return -ENOMEM;
 100
 101         *buf = data;
 102         cpu_to_le32s(buf);
 103
 104         ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
 105                 USB_VENDOR_REQUEST_WRITE_REGISTER,
 106                 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 107                 00, index, buf, 4, USB_CTRL_SET_TIMEOUT);
 108
 109         if (unlikely(ret < 0))
 110                 netdev_warn(dev->net, "Failed to write register index 0x%08x\n", index);
 111
 112         kfree(buf);
 113
 114         return ret;
 115 }
 116
 117 /* Loop until the read is completed with timeout
 118  * called with phy_mutex held */
 119 static int smsc95xx_phy_wait_not_busy(struct usbnet *dev)
 120 {
 121         unsigned long start_time = jiffies;
 122         u32 val;
 123
 124         do {
 125                 smsc95xx_read_reg(dev, MII_ADDR, &val);
 126                 if (!(val & MII_BUSY_))
 127                         return 0;
 128         } while (!time_after(jiffies, start_time + HZ));
 129
 130         return -EIO;
 131 }
 132
 133 static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
 134 {
 135         struct usbnet *dev = netdev_priv(netdev);
 136         u32 val, addr;
 137
 138         mutex_lock(&dev->phy_mutex);
 139
 140         /* confirm MII not busy */
 141         if (smsc95xx_phy_wait_not_busy(dev)) {
 142                 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_read\n");
 143                 mutex_unlock(&dev->phy_mutex);
 144                 return -EIO;
 145         }
 146
 147         /* set the address, index & direction (read from PHY) */
 148         phy_id &= dev->mii.phy_id_mask;
 149         idx &= dev->mii.reg_num_mask;
 150         addr = (phy_id << 11) | (idx << 6) | MII_READ_;
 151         smsc95xx_write_reg(dev, MII_ADDR, addr);
 152
 153         if (smsc95xx_phy_wait_not_busy(dev)) {
 154                 netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx);
 155                 mutex_unlock(&dev->phy_mutex);
 156                 return -EIO;
 157         }
 158
 159         smsc95xx_read_reg(dev, MII_DATA, &val);
 160
 161         mutex_unlock(&dev->phy_mutex);
 162
 163         return (u16)(val & 0xFFFF);
 164 }
 165
 166 static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
 167                                 int regval)
 168 {
 169         struct usbnet *dev = netdev_priv(netdev);
 170         u32 val, addr;
 171
 172         mutex_lock(&dev->phy_mutex);
 173
 174         /* confirm MII not busy */
 175         if (smsc95xx_phy_wait_not_busy(dev)) {
 176                 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_write\n");
 177                 mutex_unlock(&dev->phy_mutex);
 178                 return;
 179         }
 180
 181         val = regval;
 182         smsc95xx_write_reg(dev, MII_DATA, val);
 183
 184         /* set the address, index & direction (write to PHY) */
 185         phy_id &= dev->mii.phy_id_mask;
 186         idx &= dev->mii.reg_num_mask;
 187         addr = (phy_id << 11) | (idx << 6) | MII_WRITE_;
 188         smsc95xx_write_reg(dev, MII_ADDR, addr);
 189
 190         if (smsc95xx_phy_wait_not_busy(dev))
 191                 netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx);
 192
 193         mutex_unlock(&dev->phy_mutex);
 194 }
 195
 196 static int smsc95xx_wait_eeprom(struct usbnet *dev)
 197 {
 198         unsigned long start_time = jiffies;
 199         u32 val;
 200
 201         do {
 202                 smsc95xx_read_reg(dev, E2P_CMD, &val);
 203                 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
 204                         break;
 205                 udelay(40);
 206         } while (!time_after(jiffies, start_time + HZ));
 207
 208         if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
 209                 netdev_warn(dev->net, "EEPROM read operation timeout\n");
 210                 return -EIO;
 211         }
 212
 213         return 0;
 214 }
 215
 216 static int smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev)
 217 {
 218         unsigned long start_time = jiffies;
 219         u32 val;
 220
 221         do {
 222                 smsc95xx_read_reg(dev, E2P_CMD, &val);
 223
 224                 if (!(val & E2P_CMD_BUSY_))
 225                         return 0;
 226
 227                 udelay(40);
 228         } while (!time_after(jiffies, start_time + HZ));
 229
 230         netdev_warn(dev->net, "EEPROM is busy\n");
 231         return -EIO;
 232 }
 233
 234 static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
 235                                 u8 *data)
 236 {
 237         u32 val;
 238         int i, ret;
 239
 240         BUG_ON(!dev);
 241         BUG_ON(!data);
 242
 243         ret = smsc95xx_eeprom_confirm_not_busy(dev);
 244         if (ret)
 245                 return ret;
 246
 247         for (i = 0; i < length; i++) {
 248                 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
 249                 smsc95xx_write_reg(dev, E2P_CMD, val);
 250
 251                 ret = smsc95xx_wait_eeprom(dev);
 252                 if (ret < 0)
 253                         return ret;
 254
 255                 smsc95xx_read_reg(dev, E2P_DATA, &val);
 256
 257                 data[i] = val & 0xFF;
 258                 offset++;
 259         }
 260
 261         return 0;
 262 }
 263
 264 static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
 265                                  u8 *data)
 266 {
 267         u32 val;
 268         int i, ret;
 269
 270         BUG_ON(!dev);
 271         BUG_ON(!data);
 272
 273         ret = smsc95xx_eeprom_confirm_not_busy(dev);
 274         if (ret)
 275                 return ret;
 276
 277         /* Issue write/erase enable command */
 278         val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_;
 279         smsc95xx_write_reg(dev, E2P_CMD, val);
 280
 281         ret = smsc95xx_wait_eeprom(dev);
 282         if (ret < 0)
 283                 return ret;
 284
 285         for (i = 0; i < length; i++) {
 286
 287                 /* Fill data register */
 288                 val = data[i];
 289                 smsc95xx_write_reg(dev, E2P_DATA, val);
 290
 291                 /* Send "write" command */
 292                 val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_);
 293                 smsc95xx_write_reg(dev, E2P_CMD, val);
 294
 295                 ret = smsc95xx_wait_eeprom(dev);
 296                 if (ret < 0)
 297                         return ret;
 298
 299                 offset++;
 300         }
 301
 302         return 0;
 303 }
 304
 305 static void smsc95xx_async_cmd_callback(struct urb *urb)
 306 {
 307         struct usb_context *usb_context = urb->context;
 308         struct usbnet *dev = usb_context->dev;
 309         int status = urb->status;
 310
 311         if (status < 0)
 312                 netdev_warn(dev->net, "async callback failed with %d\n", status);
 313
 314         kfree(usb_context);
 315         usb_free_urb(urb);
 316 }
 317
 318 static int smsc95xx_write_reg_async(struct usbnet *dev, u16 index, u32 *data)
 319 {
 320         struct usb_context *usb_context;
 321         int status;
 322         struct urb *urb;
 323         const u16 size = 4;
 324
 325         urb = usb_alloc_urb(0, GFP_ATOMIC);
 326         if (!urb) {
 327                 netdev_warn(dev->net, "Error allocating URB\n");
 328                 return -ENOMEM;
 329         }
 330
 331         usb_context = kmalloc(sizeof(struct usb_context), GFP_ATOMIC);
 332         if (usb_context == NULL) {
 333                 netdev_warn(dev->net, "Error allocating control msg\n");
 334                 usb_free_urb(urb);
 335                 return -ENOMEM;
 336         }
 337
 338         usb_context->req.bRequestType =
 339                 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
 340         usb_context->req.bRequest = USB_VENDOR_REQUEST_WRITE_REGISTER;
 341         usb_context->req.wValue = 00;
 342         usb_context->req.wIndex = cpu_to_le16(index);
 343         usb_context->req.wLength = cpu_to_le16(size);
 344
 345         usb_fill_control_urb(urb, dev->udev, usb_sndctrlpipe(dev->udev, 0),
 346                 (void *)&usb_context->req, data, size,
 347                 smsc95xx_async_cmd_callback,
 348                 (void *)usb_context);
 349
 350         status = usb_submit_urb(urb, GFP_ATOMIC);
 351         if (status < 0) {
 352                 netdev_warn(dev->net, "Error submitting control msg, sts=%d\n",
 353                             status);
 354                 kfree(usb_context);
 355                 usb_free_urb(urb);
 356         }
 357
 358         return status;
 359 }
 360
 361 /* returns hash bit number for given MAC address
 362  * example:
 363  * 01 00 5E 00 00 01 -> returns bit number 31 */
 364 static unsigned int smsc95xx_hash(char addr[ETH_ALEN])
 365 {
 366         return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
 367 }
 368
 369 static void smsc95xx_set_multicast(struct net_device *netdev)
 370 {
 371         struct usbnet *dev = netdev_priv(netdev);
 372         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 373         unsigned long flags;
 374
 375         pdata->hash_hi = 0;
 376         pdata->hash_lo = 0;
 377
 378         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
 379
 380         if (dev->net->flags & IFF_PROMISC) {
 381                 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n");
 382                 pdata->mac_cr |= MAC_CR_PRMS_;
 383                 pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
 384         } else if (dev->net->flags & IFF_ALLMULTI) {
 385                 netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n");
 386                 pdata->mac_cr |= MAC_CR_MCPAS_;
 387                 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_);
 388         } else if (!netdev_mc_empty(dev->net)) {
 389                 struct netdev_hw_addr *ha;
 390
 391                 pdata->mac_cr |= MAC_CR_HPFILT_;
 392                 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
 393
 394                 netdev_for_each_mc_addr(ha, netdev) {
 395                         u32 bitnum = smsc95xx_hash(ha->addr);
 396                         u32 mask = 0x01 << (bitnum & 0x1F);
 397                         if (bitnum & 0x20)
 398                                 pdata->hash_hi |= mask;
 399                         else
 400                                 pdata->hash_lo |= mask;
 401                 }
 402
 403                 netif_dbg(dev, drv, dev->net, "HASHH=0x%08X, HASHL=0x%08X\n",
 404                                    pdata->hash_hi, pdata->hash_lo);
 405         } else {
 406                 netif_dbg(dev, drv, dev->net, "receive own packets only\n");
 407                 pdata->mac_cr &=
 408                         ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
 409         }
 410
 411         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
 412
 413         /* Initiate async writes, as we can't wait for completion here */
 414         smsc95xx_write_reg_async(dev, HASHH, &pdata->hash_hi);
 415         smsc95xx_write_reg_async(dev, HASHL, &pdata->hash_lo);
 416         smsc95xx_write_reg_async(dev, MAC_CR, &pdata->mac_cr);
 417 }
 418
 419 static void smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex,
 420                                             u16 lcladv, u16 rmtadv)
 421 {
 422         u32 flow = 0, afc_cfg;
 423
 424         int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg);
 425         if (ret < 0) {
 426                 netdev_warn(dev->net, "error reading AFC_CFG\n");
 427                 return;
 428         }
 429
 430         if (duplex == DUPLEX_FULL) {
 431                 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
 432
 433                 if (cap & FLOW_CTRL_RX)
 434                         flow = 0xFFFF0002;
 435
 436                 if (cap & FLOW_CTRL_TX) {
 437                         afc_cfg |= 0xF;
 438                         flow |= 0xFFFF0000;
 439                 } else {
 440                         afc_cfg &= ~0xF;
 441                 }
 442
 443                 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n",
 444                                    cap & FLOW_CTRL_RX ? "enabled" : "disabled",
 445                                    cap & FLOW_CTRL_TX ? "enabled" : "disabled");
 446         } else {
 447                 netif_dbg(dev, link, dev->net, "half duplex\n");
 448                 afc_cfg |= 0xF;
 449         }
 450
 451         smsc95xx_write_reg(dev, FLOW, flow);
 452         smsc95xx_write_reg(dev, AFC_CFG, afc_cfg);
 453 }
 454
 455 static int smsc95xx_link_reset(struct usbnet *dev)
 456 {
 457         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 458         struct mii_if_info *mii = &dev->mii;
 459         struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
 460         unsigned long flags;
 461         u16 lcladv, rmtadv;
 462         u32 intdata;
 463
 464         /* clear interrupt status */
 465         smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC);
 466         intdata = 0xFFFFFFFF;
 467         smsc95xx_write_reg(dev, INT_STS, intdata);
 468
 469         mii_check_media(mii, 1, 1);
 470         mii_ethtool_gset(&dev->mii, &ecmd);
 471         lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
 472         rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
 473
 474         netif_dbg(dev, link, dev->net,
 475                   "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n",
 476                   ethtool_cmd_speed(&ecmd), ecmd.duplex, lcladv, rmtadv);
 477
 478         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
 479         if (ecmd.duplex != DUPLEX_FULL) {
 480                 pdata->mac_cr &= ~MAC_CR_FDPX_;
 481                 pdata->mac_cr |= MAC_CR_RCVOWN_;
 482         } else {
 483                 pdata->mac_cr &= ~MAC_CR_RCVOWN_;
 484                 pdata->mac_cr |= MAC_CR_FDPX_;
 485         }
 486         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
 487
 488         smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
 489
 490         smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
 491
 492         return 0;
 493 }
 494
 495 static void smsc95xx_status(struct usbnet *dev, struct urb *urb)
 496 {
 497         u32 intdata;
 498
 499         if (urb->actual_length != 4) {
 500                 netdev_warn(dev->net, "unexpected urb length %d\n",
 501                             urb->actual_length);
 502                 return;
 503         }
 504
 505         memcpy(&intdata, urb->transfer_buffer, 4);
 506         le32_to_cpus(&intdata);
 507
 508         netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata);
 509
 510         if (intdata & INT_ENP_PHY_INT_)
 511                 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
 512         else
 513                 netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n",
 514                             intdata);
 515 }
 516
 517 /* Enable or disable Tx & Rx checksum offload engines */
 518 static int smsc95xx_set_features(struct net_device *netdev, u32 features)
 519 {
 520         struct usbnet *dev = netdev_priv(netdev);
 521         u32 read_buf;
 522         int ret;
 523
 524         ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);
 525         if (ret < 0) {
 526                 netdev_warn(dev->net, "Failed to read COE_CR: %d\n", ret);
 527                 return ret;
 528         }
 529
 530         if (features & NETIF_F_HW_CSUM)
 531                 read_buf |= Tx_COE_EN_;
 532         else
 533                 read_buf &= ~Tx_COE_EN_;
 534
 535         if (features & NETIF_F_RXCSUM)
 536                 read_buf |= Rx_COE_EN_;
 537         else
 538                 read_buf &= ~Rx_COE_EN_;
 539
 540         ret = smsc95xx_write_reg(dev, COE_CR, read_buf);
 541         if (ret < 0) {
 542                 netdev_warn(dev->net, "Failed to write COE_CR: %d\n", ret);
 543                 return ret;
 544         }
 545
 546         netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf);
 547         return 0;
 548 }
 549
 550 static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net)
 551 {
 552         return MAX_EEPROM_SIZE;
 553 }
 554
 555 static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev,
 556                                        struct ethtool_eeprom *ee, u8 *data)
 557 {
 558         struct usbnet *dev = netdev_priv(netdev);
 559
 560         ee->magic = LAN95XX_EEPROM_MAGIC;
 561
 562         return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data);
 563 }
 564
 565 static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev,
 566                                        struct ethtool_eeprom *ee, u8 *data)
 567 {
 568         struct usbnet *dev = netdev_priv(netdev);
 569
 570         if (ee->magic != LAN95XX_EEPROM_MAGIC) {
 571                 netdev_warn(dev->net, "EEPROM: magic value mismatch, magic = 0x%x\n",
 572                             ee->magic);
 573                 return -EINVAL;
 574         }
 575
 576         return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data);
 577 }
 578
 579 static const struct ethtool_ops smsc95xx_ethtool_ops = {
 580         .get_link       = usbnet_get_link,
 581         .nway_reset     = usbnet_nway_reset,
 582         .get_drvinfo    = usbnet_get_drvinfo,
 583         .get_msglevel   = usbnet_get_msglevel,
 584         .set_msglevel   = usbnet_set_msglevel,
 585         .get_settings   = usbnet_get_settings,
 586         .set_settings   = usbnet_set_settings,
 587         .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len,
 588         .get_eeprom     = smsc95xx_ethtool_get_eeprom,
 589         .set_eeprom     = smsc95xx_ethtool_set_eeprom,
 590 };
 591
 592 static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
 593 {
 594         struct usbnet *dev = netdev_priv(netdev);
 595
 596         if (!netif_running(netdev))
 597                 return -EINVAL;
 598
 599         return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
 600 }
 601
 602 static void smsc95xx_init_mac_address(struct usbnet *dev)
 603 {
 604         /* try reading mac address from EEPROM */
 605         if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
 606                         dev->net->dev_addr) == 0) {
 607                 if (is_valid_ether_addr(dev->net->dev_addr)) {
 608                         /* eeprom values are valid so use them */
 609                         netif_dbg(dev, ifup, dev->net, "MAC address read from EEPROM\n");
 610                         return;
 611                 }
 612         }
 613
 614         /* no eeprom, or eeprom values are invalid. generate random MAC */
 615         random_ether_addr(dev->net->dev_addr);
 616         netif_dbg(dev, ifup, dev->net, "MAC address set to random_ether_addr\n");
 617 }
 618
 619 static int smsc95xx_set_mac_address(struct usbnet *dev)
 620 {
 621         u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
 622                 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
 623         u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
 624         int ret;
 625
 626         ret = smsc95xx_write_reg(dev, ADDRL, addr_lo);
 627         if (ret < 0) {
 628                 netdev_warn(dev->net, "Failed to write ADDRL: %d\n", ret);
 629                 return ret;
 630         }
 631
 632         ret = smsc95xx_write_reg(dev, ADDRH, addr_hi);
 633         if (ret < 0) {
 634                 netdev_warn(dev->net, "Failed to write ADDRH: %d\n", ret);
 635                 return ret;
 636         }
 637
 638         return 0;
 639 }
 640
 641 /* starts the TX path */
 642 static void smsc95xx_start_tx_path(struct usbnet *dev)
 643 {
 644         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 645         unsigned long flags;
 646         u32 reg_val;
 647
 648         /* Enable Tx at MAC */
 649         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
 650         pdata->mac_cr |= MAC_CR_TXEN_;
 651         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
 652
 653         smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
 654
 655         /* Enable Tx at SCSRs */
 656         reg_val = TX_CFG_ON_;
 657         smsc95xx_write_reg(dev, TX_CFG, reg_val);
 658 }
 659
 660 /* Starts the Receive path */
 661 static void smsc95xx_start_rx_path(struct usbnet *dev)
 662 {
 663         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 664         unsigned long flags;
 665
 666         spin_lock_irqsave(&pdata->mac_cr_lock, flags);
 667         pdata->mac_cr |= MAC_CR_RXEN_;
 668         spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
 669
 670         smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
 671 }
 672
 673 static int smsc95xx_phy_initialize(struct usbnet *dev)
 674 {
 675         int bmcr, timeout = 0;
 676
 677         /* Initialize MII structure */
 678         dev->mii.dev = dev->net;
 679         dev->mii.mdio_read = smsc95xx_mdio_read;
 680         dev->mii.mdio_write = smsc95xx_mdio_write;
 681         dev->mii.phy_id_mask = 0x1f;
 682         dev->mii.reg_num_mask = 0x1f;
 683         dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID;
 684
 685         /* reset phy and wait for reset to complete */
 686         smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
 687
 688         do {
 689                 msleep(10);
 690                 bmcr = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR);
 691                 timeout++;
 692         } while ((bmcr & BMCR_RESET) && (timeout < 100));
 693
 694         if (timeout >= 100) {
 695                 netdev_warn(dev->net, "timeout on PHY Reset");
 696                 return -EIO;
 697         }
 698
 699         smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
 700                 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
 701                 ADVERTISE_PAUSE_ASYM);
 702
 703         /* read to clear */
 704         smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
 705
 706         smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
 707                 PHY_INT_MASK_DEFAULT_);
 708         mii_nway_restart(&dev->mii);
 709
 710         netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n");
 711         return 0;
 712 }
 713
 714 static int smsc95xx_reset(struct usbnet *dev)
 715 {
 716         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
 717         u32 read_buf, write_buf, burst_cap;
 718         int ret = 0, timeout;
 719
 720         netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n");
 721
 722         write_buf = HW_CFG_LRST_;
 723         ret = smsc95xx_write_reg(dev, HW_CFG, write_buf);
 724         if (ret < 0) {
 725                 netdev_warn(dev->net, "Failed to write HW_CFG_LRST_ bit in HW_CFG register, ret = %d\n",
 726                             ret);
 727                 return ret;
 728         }
 729
 730         timeout = 0;
 731         do {
 732                 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 733                 if (ret < 0) {
 734                         netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
 735                         return ret;
 736                 }
 737                 msleep(10);
 738                 timeout++;
 739         } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
 740
 741         if (timeout >= 100) {
 742                 netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n");
 743                 return ret;
 744         }
 745
 746         write_buf = PM_CTL_PHY_RST_;
 747         ret = smsc95xx_write_reg(dev, PM_CTRL, write_buf);
 748         if (ret < 0) {
 749                 netdev_warn(dev->net, "Failed to write PM_CTRL: %d\n", ret);
 750                 return ret;
 751         }
 752
 753         timeout = 0;
 754         do {
 755                 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf);
 756                 if (ret < 0) {
 757                         netdev_warn(dev->net, "Failed to read PM_CTRL: %d\n", ret);
 758                         return ret;
 759                 }
 760                 msleep(10);
 761                 timeout++;
 762         } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
 763
 764         if (timeout >= 100) {
 765                 netdev_warn(dev->net, "timeout waiting for PHY Reset\n");
 766                 return ret;
 767         }
 768
 769         ret = smsc95xx_set_mac_address(dev);
 770         if (ret < 0)
 771                 return ret;
 772
 773         netif_dbg(dev, ifup, dev->net,
 774                   "MAC Address: %pM\n", dev->net->dev_addr);
 775
 776         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 777         if (ret < 0) {
 778                 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
 779                 return ret;
 780         }
 781
 782         netif_dbg(dev, ifup, dev->net,
 783                   "Read Value from HW_CFG : 0x%08x\n", read_buf);
 784
 785         read_buf |= HW_CFG_BIR_;
 786
 787         ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
 788         if (ret < 0) {
 789                 netdev_warn(dev->net, "Failed to write HW_CFG_BIR_ bit in HW_CFG register, ret = %d\n",
 790                             ret);
 791                 return ret;
 792         }
 793
 794         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 795         if (ret < 0) {
 796                 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
 797                 return ret;
 798         }
 799         netif_dbg(dev, ifup, dev->net,
 800                   "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n",
 801                   read_buf);
 802
 803         if (!turbo_mode) {
 804                 burst_cap = 0;
 805                 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
 806         } else if (dev->udev->speed == USB_SPEED_HIGH) {
 807                 burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
 808                 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
 809         } else {
 810                 burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
 811                 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
 812         }
 813
 814         netif_dbg(dev, ifup, dev->net,
 815                   "rx_urb_size=%ld\n", (ulong)dev->rx_urb_size);
 816
 817         ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap);
 818         if (ret < 0) {
 819                 netdev_warn(dev->net, "Failed to write BURST_CAP: %d\n", ret);
 820                 return ret;
 821         }
 822
 823         ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);
 824         if (ret < 0) {
 825                 netdev_warn(dev->net, "Failed to read BURST_CAP: %d\n", ret);
 826                 return ret;
 827         }
 828         netif_dbg(dev, ifup, dev->net,
 829                   "Read Value from BURST_CAP after writing: 0x%08x\n",
 830                   read_buf);
 831
 832         read_buf = DEFAULT_BULK_IN_DELAY;
 833         ret = smsc95xx_write_reg(dev, BULK_IN_DLY, read_buf);
 834         if (ret < 0) {
 835                 netdev_warn(dev->net, "ret = %d\n", ret);
 836                 return ret;
 837         }
 838
 839         ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);
 840         if (ret < 0) {
 841                 netdev_warn(dev->net, "Failed to read BULK_IN_DLY: %d\n", ret);
 842                 return ret;
 843         }
 844         netif_dbg(dev, ifup, dev->net,
 845                   "Read Value from BULK_IN_DLY after writing: 0x%08x\n",
 846                   read_buf);
 847
 848         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 849         if (ret < 0) {
 850                 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
 851                 return ret;
 852         }
 853         netif_dbg(dev, ifup, dev->net,
 854                   "Read Value from HW_CFG: 0x%08x\n", read_buf);
 855
 856         if (turbo_mode)
 857                 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
 858
 859         read_buf &= ~HW_CFG_RXDOFF_;
 860
 861         /* set Rx data offset=2, Make IP header aligns on word boundary. */
 862         read_buf |= NET_IP_ALIGN << 9;
 863
 864         ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
 865         if (ret < 0) {
 866                 netdev_warn(dev->net, "Failed to write HW_CFG register, ret=%d\n",
 867                             ret);
 868                 return ret;
 869         }
 870
 871         ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
 872         if (ret < 0) {
 873                 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
 874                 return ret;
 875         }
 876         netif_dbg(dev, ifup, dev->net,
 877                   "Read Value from HW_CFG after writing: 0x%08x\n", read_buf);
 878
 879         write_buf = 0xFFFFFFFF;
 880         ret = smsc95xx_write_reg(dev, INT_STS, write_buf);
 881         if (ret < 0) {
 882                 netdev_warn(dev->net, "Failed to write INT_STS register, ret=%d\n",
 883                             ret);
 884                 return ret;
 885         }
 886
 887         ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);
 888         if (ret < 0) {
 889                 netdev_warn(dev->net, "Failed to read ID_REV: %d\n", ret);
 890                 return ret;
 891         }
 892         netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf);
 893
 894         /* Configure GPIO pins as LED outputs */
 895         write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED |
 896                 LED_GPIO_CFG_FDX_LED;
 897         ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf);
 898         if (ret < 0) {
 899                 netdev_warn(dev->net, "Failed to write LED_GPIO_CFG register, ret=%d\n",
 900                             ret);
 901                 return ret;
 902         }
 903
 904         /* Init Tx */
 905         write_buf = 0;
 906         ret = smsc95xx_write_reg(dev, FLOW, write_buf);
 907         if (ret < 0) {
 908                 netdev_warn(dev->net, "Failed to write FLOW: %d\n", ret);
 909                 return ret;
 910         }
 911
 912         read_buf = AFC_CFG_DEFAULT;
 913         ret = smsc95xx_write_reg(dev, AFC_CFG, read_buf);
 914         if (ret < 0) {
 915                 netdev_warn(dev->net, "Failed to write AFC_CFG: %d\n", ret);
 916                 return ret;
 917         }
 918
 919         /* Don't need mac_cr_lock during initialisation */
 920         ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr);
 921         if (ret < 0) {
 922                 netdev_warn(dev->net, "Failed to read MAC_CR: %d\n", ret);
 923                 return ret;
 924         }
 925
 926         /* Init Rx */
 927         /* Set Vlan */
 928         write_buf = (u32)ETH_P_8021Q;
 929         ret = smsc95xx_write_reg(dev, VLAN1, write_buf);
 930         if (ret < 0) {
 931                 netdev_warn(dev->net, "Failed to write VAN1: %d\n", ret);
 932                 return ret;
 933         }
 934
 935         /* Enable or disable checksum offload engines */
 936         smsc95xx_set_features(dev->net, dev->net->features);
 937
 938         smsc95xx_set_multicast(dev->net);
 939
 940         if (smsc95xx_phy_initialize(dev) < 0)
 941                 return -EIO;
 942
 943         ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);
 944         if (ret < 0) {
 945                 netdev_warn(dev->net, "Failed to read INT_EP_CTL: %d\n", ret);
 946                 return ret;
 947         }
 948
 949         /* enable PHY interrupts */
 950         read_buf |= INT_EP_CTL_PHY_INT_;
 951
 952         ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);
 953         if (ret < 0) {
 954                 netdev_warn(dev->net, "Failed to write INT_EP_CTL: %d\n", ret);
 955                 return ret;
 956         }
 957
 958         smsc95xx_start_tx_path(dev);
 959         smsc95xx_start_rx_path(dev);
 960
 961         netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n");
 962         return 0;
 963 }
 964
 965 static const struct net_device_ops smsc95xx_netdev_ops = {
 966         .ndo_open               = usbnet_open,
 967         .ndo_stop               = usbnet_stop,
 968         .ndo_start_xmit         = usbnet_start_xmit,
 969         .ndo_tx_timeout         = usbnet_tx_timeout,
 970         .ndo_change_mtu         = usbnet_change_mtu,
 971         .ndo_set_mac_address    = eth_mac_addr,
 972         .ndo_validate_addr      = eth_validate_addr,
 973         .ndo_do_ioctl           = smsc95xx_ioctl,
 974         .ndo_set_rx_mode        = smsc95xx_set_multicast,
 975         .ndo_set_features       = smsc95xx_set_features,
 976 };
 977
 978 static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf)
 979 {
 980         struct smsc95xx_priv *pdata = NULL;
 981         int ret;
 982
 983         printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
 984
 985         ret = usbnet_get_endpoints(dev, intf);
 986         if (ret < 0) {
 987                 netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret);
 988                 return ret;
 989         }
 990
 991         dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv),
 992                 GFP_KERNEL);
 993
 994         pdata = (struct smsc95xx_priv *)(dev->data[0]);
 995         if (!pdata) {
 996                 netdev_warn(dev->net, "Unable to allocate struct smsc95xx_priv\n");
 997                 return -ENOMEM;
 998         }
 999
1000         spin_lock_init(&pdata->mac_cr_lock);
1001
1002         if (DEFAULT_TX_CSUM_ENABLE)
1003                 dev->net->features |= NETIF_F_HW_CSUM;
1004         if (DEFAULT_RX_CSUM_ENABLE)
1005                 dev->net->features |= NETIF_F_RXCSUM;
1006
1007         dev->net->hw_features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM;
1008
1009         smsc95xx_init_mac_address(dev);
1010
1011         /* Init all registers */
1012         ret = smsc95xx_reset(dev);
1013
1014         dev->net->netdev_ops = &smsc95xx_netdev_ops;
1015         dev->net->ethtool_ops = &smsc95xx_ethtool_ops;
1016         dev->net->flags |= IFF_MULTICAST;
1017         dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD_CSUM;
1018         return 0;
1019 }
1020
1021 static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1022 {
1023         struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1024         if (pdata) {
1025                 netif_dbg(dev, ifdown, dev->net, "free pdata\n");
1026                 kfree(pdata);
1027                 pdata = NULL;
1028                 dev->data[0] = 0;
1029         }
1030 }
1031
1032 static void smsc95xx_rx_csum_offload(struct sk_buff *skb)
1033 {
1034         skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2);
1035         skb->ip_summed = CHECKSUM_COMPLETE;
1036         skb_trim(skb, skb->len - 2);
1037 }
1038
1039 static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1040 {
1041         /* This check is no longer done by usbnet */
1042         if (skb->len < dev->net->hard_header_len)
1043                 return 0;
1044
1045         while (skb->len > 0) {
1046                 u32 header, align_count;
1047                 struct sk_buff *ax_skb;
1048                 unsigned char *packet;
1049                 u16 size;
1050
1051                 memcpy(&header, skb->data, sizeof(header));
1052                 le32_to_cpus(&header);
1053                 skb_pull(skb, 4 + NET_IP_ALIGN);
1054                 packet = skb->data;
1055
1056                 /* get the packet length */
1057                 size = (u16)((header & RX_STS_FL_) >> 16);
1058                 align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4;
1059
1060                 if (unlikely(header & RX_STS_ES_)) {
1061                         netif_dbg(dev, rx_err, dev->net,
1062                                   "Error header=0x%08x\n", header);
1063                         dev->net->stats.rx_errors++;
1064                         dev->net->stats.rx_dropped++;
1065
1066                         if (header & RX_STS_CRC_) {
1067                                 dev->net->stats.rx_crc_errors++;
1068                         } else {
1069                                 if (header & (RX_STS_TL_ | RX_STS_RF_))
1070                                         dev->net->stats.rx_frame_errors++;
1071
1072                                 if ((header & RX_STS_LE_) &&
1073                                         (!(header & RX_STS_FT_)))
1074                                         dev->net->stats.rx_length_errors++;
1075                         }
1076                 } else {
1077                         /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
1078                         if (unlikely(size > (ETH_FRAME_LEN + 12))) {
1079                                 netif_dbg(dev, rx_err, dev->net,
1080                                           "size err header=0x%08x\n", header);
1081                                 return 0;
1082                         }
1083
1084                         /* last frame in this batch */
1085                         if (skb->len == size) {
1086                                 if (dev->net->features & NETIF_F_RXCSUM)
1087                                         smsc95xx_rx_csum_offload(skb);
1088                                 skb_trim(skb, skb->len - 4); /* remove fcs */
1089                                 skb->truesize = size + sizeof(struct sk_buff);
1090
1091                                 return 1;
1092                         }
1093
1094                         ax_skb = skb_clone(skb, GFP_ATOMIC);
1095                         if (unlikely(!ax_skb)) {
1096                                 netdev_warn(dev->net, "Error allocating skb\n");
1097                                 return 0;
1098                         }
1099
1100                         ax_skb->len = size;
1101                         ax_skb->data = packet;
1102                         skb_set_tail_pointer(ax_skb, size);
1103
1104                         if (dev->net->features & NETIF_F_RXCSUM)
1105                                 smsc95xx_rx_csum_offload(ax_skb);
1106                         skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
1107                         ax_skb->truesize = size + sizeof(struct sk_buff);
1108
1109                         usbnet_skb_return(dev, ax_skb);
1110                 }
1111
1112                 skb_pull(skb, size);
1113
1114                 /* padding bytes before the next frame starts */
1115                 if (skb->len)
1116                         skb_pull(skb, align_count);
1117         }
1118
1119         if (unlikely(skb->len < 0)) {
1120                 netdev_warn(dev->net, "invalid rx length<0 %d\n", skb->len);
1121                 return 0;
1122         }
1123
1124         return 1;
1125 }
1126
1127 static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb)
1128 {
1129         u16 low_16 = (u16)skb_checksum_start_offset(skb);
1130         u16 high_16 = low_16 + skb->csum_offset;
1131         return (high_16 << 16) | low_16;
1132 }
1133
1134 static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev,
1135                                          struct sk_buff *skb, gfp_t flags)
1136 {
1137         bool csum = skb->ip_summed == CHECKSUM_PARTIAL;
1138         int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD;
1139         u32 tx_cmd_a, tx_cmd_b;
1140
1141         /* We do not advertise SG, so skbs should be already linearized */
1142         BUG_ON(skb_shinfo(skb)->nr_frags);
1143
1144         if (skb_headroom(skb) < overhead) {
1145                 struct sk_buff *skb2 = skb_copy_expand(skb,
1146                         overhead, 0, flags);
1147                 dev_kfree_skb_any(skb);
1148                 skb = skb2;
1149                 if (!skb)
1150                         return NULL;
1151         }
1152
1153         if (csum) {
1154                 if (skb->len <= 45) {
1155                         /* workaround - hardware tx checksum does not work
1156                          * properly with extremely small packets */
1157                         long csstart = skb_checksum_start_offset(skb);
1158                         __wsum calc = csum_partial(skb->data + csstart,
1159                                 skb->len - csstart, 0);
1160                         *((__sum16 *)(skb->data + csstart
1161                                 + skb->csum_offset)) = csum_fold(calc);
1162
1163                         csum = false;
1164                 } else {
1165                         u32 csum_preamble = smsc95xx_calc_csum_preamble(skb);
1166                         skb_push(skb, 4);
1167                         memcpy(skb->data, &csum_preamble, 4);
1168                 }
1169         }
1170
1171         skb_push(skb, 4);
1172         tx_cmd_b = (u32)(skb->len - 4);
1173         if (csum)
1174                 tx_cmd_b |= TX_CMD_B_CSUM_ENABLE;
1175         cpu_to_le32s(&tx_cmd_b);
1176         memcpy(skb->data, &tx_cmd_b, 4);
1177
1178         skb_push(skb, 4);
1179         tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ |
1180                 TX_CMD_A_LAST_SEG_;
1181         cpu_to_le32s(&tx_cmd_a);
1182         memcpy(skb->data, &tx_cmd_a, 4);
1183
1184         return skb;
1185 }
1186
1187 static const struct driver_info smsc95xx_info = {
1188         .description    = "smsc95xx USB 2.0 Ethernet",
1189         .bind           = smsc95xx_bind,
1190         .unbind         = smsc95xx_unbind,
1191         .link_reset     = smsc95xx_link_reset,
1192         .reset          = smsc95xx_reset,
1193         .rx_fixup       = smsc95xx_rx_fixup,
1194         .tx_fixup       = smsc95xx_tx_fixup,
1195         .status         = smsc95xx_status,
1196         .flags          = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR,
1197 };
1198
1199 static const struct usb_device_id products[] = {
1200         {
1201                 /* SMSC9500 USB Ethernet Device */
1202                 USB_DEVICE(0x0424, 0x9500),
1203                 .driver_info = (unsigned long) &smsc95xx_info,
1204         },
1205         {
1206                 /* SMSC9505 USB Ethernet Device */
1207                 USB_DEVICE(0x0424, 0x9505),
1208                 .driver_info = (unsigned long) &smsc95xx_info,
1209         },
1210         {
1211                 /* SMSC9500A USB Ethernet Device */
1212                 USB_DEVICE(0x0424, 0x9E00),
1213                 .driver_info = (unsigned long) &smsc95xx_info,
1214         },
1215         {
1216                 /* SMSC9505A USB Ethernet Device */
1217                 USB_DEVICE(0x0424, 0x9E01),
1218                 .driver_info = (unsigned long) &smsc95xx_info,
1219         },
1220         {
1221                 /* SMSC9512/9514 USB Hub & Ethernet Device */
1222                 USB_DEVICE(0x0424, 0xec00),
1223                 .driver_info = (unsigned long) &smsc95xx_info,
1224         },
1225         {
1226                 /* SMSC9500 USB Ethernet Device (SAL10) */
1227                 USB_DEVICE(0x0424, 0x9900),
1228                 .driver_info = (unsigned long) &smsc95xx_info,
1229         },
1230         {
1231                 /* SMSC9505 USB Ethernet Device (SAL10) */
1232                 USB_DEVICE(0x0424, 0x9901),
1233                 .driver_info = (unsigned long) &smsc95xx_info,
1234         },
1235         {
1236                 /* SMSC9500A USB Ethernet Device (SAL10) */
1237                 USB_DEVICE(0x0424, 0x9902),
1238                 .driver_info = (unsigned long) &smsc95xx_info,
1239         },
1240         {
1241                 /* SMSC9505A USB Ethernet Device (SAL10) */
1242                 USB_DEVICE(0x0424, 0x9903),
1243                 .driver_info = (unsigned long) &smsc95xx_info,
1244         },
1245         {
1246                 /* SMSC9512/9514 USB Hub & Ethernet Device (SAL10) */
1247                 USB_DEVICE(0x0424, 0x9904),
1248                 .driver_info = (unsigned long) &smsc95xx_info,
1249         },
1250         {
1251                 /* SMSC9500A USB Ethernet Device (HAL) */
1252                 USB_DEVICE(0x0424, 0x9905),
1253                 .driver_info = (unsigned long) &smsc95xx_info,
1254         },
1255         {
1256                 /* SMSC9505A USB Ethernet Device (HAL) */
1257                 USB_DEVICE(0x0424, 0x9906),
1258                 .driver_info = (unsigned long) &smsc95xx_info,
1259         },
1260         {
1261                 /* SMSC9500 USB Ethernet Device (Alternate ID) */
1262                 USB_DEVICE(0x0424, 0x9907),
1263                 .driver_info = (unsigned long) &smsc95xx_info,
1264         },
1265         {
1266                 /* SMSC9500A USB Ethernet Device (Alternate ID) */
1267                 USB_DEVICE(0x0424, 0x9908),
1268                 .driver_info = (unsigned long) &smsc95xx_info,
1269         },
1270         {
1271                 /* SMSC9512/9514 USB Hub & Ethernet Device (Alternate ID) */
1272                 USB_DEVICE(0x0424, 0x9909),
1273                 .driver_info = (unsigned long) &smsc95xx_info,
1274         },
1275         {
1276                 /* SMSC LAN9530 USB Ethernet Device */
1277                 USB_DEVICE(0x0424, 0x9530),
1278                 .driver_info = (unsigned long) &smsc95xx_info,
1279         },
1280         {
1281                 /* SMSC LAN9730 USB Ethernet Device */
1282                 USB_DEVICE(0x0424, 0x9730),
1283                 .driver_info = (unsigned long) &smsc95xx_info,
1284         },
1285         {
1286                 /* SMSC LAN89530 USB Ethernet Device */
1287                 USB_DEVICE(0x0424, 0x9E08),
1288                 .driver_info = (unsigned long) &smsc95xx_info,
1289         },
1290         { },            /* END */
1291 };
1292 MODULE_DEVICE_TABLE(usb, products);
1293
1294 static struct usb_driver smsc95xx_driver = {
1295         .name           = "smsc95xx",
1296         .id_table       = products,
1297         .probe          = usbnet_probe,
1298         .suspend        = usbnet_suspend,
1299         .resume         = usbnet_resume,
1300         .disconnect     = usbnet_disconnect,
1301 };
1302
1303 static int __init smsc95xx_init(void)
1304 {
1305         return usb_register(&smsc95xx_driver);
1306 }
1307 module_init(smsc95xx_init);
1308
1309 static void __exit smsc95xx_exit(void)
1310 {
1311         usb_deregister(&smsc95xx_driver);
1312 }
1313 module_exit(smsc95xx_exit);
1314
1315 MODULE_AUTHOR("Nancy Lin");
1316 MODULE_AUTHOR("Steve Glendinning <steve.glendinning@smsc.com>");
1317 MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices");
1318 MODULE_LICENSE("GPL");