drivers/net/usb/asix.c

   1 /*
   2  * ASIX AX8817X based USB 2.0 Ethernet Devices
   3  * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
   4  * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
   5  * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
   6  * Copyright (c) 2002-2003 TiVo Inc.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  21  */
  22
  23 // #define      DEBUG                   // error path messages, extra info
  24 // #define      VERBOSE                 // more; success messages
  25
  26 #include <linux/module.h>
  27 #include <linux/kmod.h>
  28 #include <linux/init.h>
  29 #include <linux/netdevice.h>
  30 #include <linux/etherdevice.h>
  31 #include <linux/ethtool.h>
  32 #include <linux/workqueue.h>
  33 #include <linux/mii.h>
  34 #include <linux/usb.h>
  35 #include <linux/crc32.h>
  36 #include <linux/usb/usbnet.h>
  37 #include <linux/slab.h>
  38 #include <linux/if_vlan.h>
  39
  40 #define DRIVER_VERSION "08-Nov-2011"
  41 #define DRIVER_NAME "asix"
  42
  43 /* ASIX AX8817X based USB 2.0 Ethernet Devices */
  44
  45 #define AX_CMD_SET_SW_MII               0x06
  46 #define AX_CMD_READ_MII_REG             0x07
  47 #define AX_CMD_WRITE_MII_REG            0x08
  48 #define AX_CMD_SET_HW_MII               0x0a
  49 #define AX_CMD_READ_EEPROM              0x0b
  50 #define AX_CMD_WRITE_EEPROM             0x0c
  51 #define AX_CMD_WRITE_ENABLE             0x0d
  52 #define AX_CMD_WRITE_DISABLE            0x0e
  53 #define AX_CMD_READ_RX_CTL              0x0f
  54 #define AX_CMD_WRITE_RX_CTL             0x10
  55 #define AX_CMD_READ_IPG012              0x11
  56 #define AX_CMD_WRITE_IPG0               0x12
  57 #define AX_CMD_WRITE_IPG1               0x13
  58 #define AX_CMD_READ_NODE_ID             0x13
  59 #define AX_CMD_WRITE_NODE_ID            0x14
  60 #define AX_CMD_WRITE_IPG2               0x14
  61 #define AX_CMD_WRITE_MULTI_FILTER       0x16
  62 #define AX88172_CMD_READ_NODE_ID        0x17
  63 #define AX_CMD_READ_PHY_ID              0x19
  64 #define AX_CMD_READ_MEDIUM_STATUS       0x1a
  65 #define AX_CMD_WRITE_MEDIUM_MODE        0x1b
  66 #define AX_CMD_READ_MONITOR_MODE        0x1c
  67 #define AX_CMD_WRITE_MONITOR_MODE       0x1d
  68 #define AX_CMD_READ_GPIOS               0x1e
  69 #define AX_CMD_WRITE_GPIOS              0x1f
  70 #define AX_CMD_SW_RESET                 0x20
  71 #define AX_CMD_SW_PHY_STATUS            0x21
  72 #define AX_CMD_SW_PHY_SELECT            0x22
  73
  74 #define AX_MONITOR_MODE                 0x01
  75 #define AX_MONITOR_LINK                 0x02
  76 #define AX_MONITOR_MAGIC                0x04
  77 #define AX_MONITOR_HSFS                 0x10
  78
  79 /* AX88172 Medium Status Register values */
  80 #define AX88172_MEDIUM_FD               0x02
  81 #define AX88172_MEDIUM_TX               0x04
  82 #define AX88172_MEDIUM_FC               0x10
  83 #define AX88172_MEDIUM_DEFAULT \
  84                 ( AX88172_MEDIUM_FD | AX88172_MEDIUM_TX | AX88172_MEDIUM_FC )
  85
  86 #define AX_MCAST_FILTER_SIZE            8
  87 #define AX_MAX_MCAST                    64
  88
  89 #define AX_SWRESET_CLEAR                0x00
  90 #define AX_SWRESET_RR                   0x01
  91 #define AX_SWRESET_RT                   0x02
  92 #define AX_SWRESET_PRTE                 0x04
  93 #define AX_SWRESET_PRL                  0x08
  94 #define AX_SWRESET_BZ                   0x10
  95 #define AX_SWRESET_IPRL                 0x20
  96 #define AX_SWRESET_IPPD                 0x40
  97
  98 #define AX88772_IPG0_DEFAULT            0x15
  99 #define AX88772_IPG1_DEFAULT            0x0c
 100 #define AX88772_IPG2_DEFAULT            0x12
 101
 102 /* AX88772 & AX88178 Medium Mode Register */
 103 #define AX_MEDIUM_PF            0x0080
 104 #define AX_MEDIUM_JFE           0x0040
 105 #define AX_MEDIUM_TFC           0x0020
 106 #define AX_MEDIUM_RFC           0x0010
 107 #define AX_MEDIUM_ENCK          0x0008
 108 #define AX_MEDIUM_AC            0x0004
 109 #define AX_MEDIUM_FD            0x0002
 110 #define AX_MEDIUM_GM            0x0001
 111 #define AX_MEDIUM_SM            0x1000
 112 #define AX_MEDIUM_SBP           0x0800
 113 #define AX_MEDIUM_PS            0x0200
 114 #define AX_MEDIUM_RE            0x0100
 115
 116 #define AX88178_MEDIUM_DEFAULT  \
 117         (AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \
 118          AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \
 119          AX_MEDIUM_RE)
 120
 121 #define AX88772_MEDIUM_DEFAULT  \
 122         (AX_MEDIUM_FD | AX_MEDIUM_RFC | \
 123          AX_MEDIUM_TFC | AX_MEDIUM_PS | \
 124          AX_MEDIUM_AC | AX_MEDIUM_RE)
 125
 126 /* AX88772 & AX88178 RX_CTL values */
 127 #define AX_RX_CTL_SO            0x0080
 128 #define AX_RX_CTL_AP            0x0020
 129 #define AX_RX_CTL_AM            0x0010
 130 #define AX_RX_CTL_AB            0x0008
 131 #define AX_RX_CTL_SEP           0x0004
 132 #define AX_RX_CTL_AMALL         0x0002
 133 #define AX_RX_CTL_PRO           0x0001
 134 #define AX_RX_CTL_MFB_2048      0x0000
 135 #define AX_RX_CTL_MFB_4096      0x0100
 136 #define AX_RX_CTL_MFB_8192      0x0200
 137 #define AX_RX_CTL_MFB_16384     0x0300
 138
 139 #define AX_DEFAULT_RX_CTL       (AX_RX_CTL_SO | AX_RX_CTL_AB)
 140
 141 /* GPIO 0 .. 2 toggles */
 142 #define AX_GPIO_GPO0EN          0x01    /* GPIO0 Output enable */
 143 #define AX_GPIO_GPO_0           0x02    /* GPIO0 Output value */
 144 #define AX_GPIO_GPO1EN          0x04    /* GPIO1 Output enable */
 145 #define AX_GPIO_GPO_1           0x08    /* GPIO1 Output value */
 146 #define AX_GPIO_GPO2EN          0x10    /* GPIO2 Output enable */
 147 #define AX_GPIO_GPO_2           0x20    /* GPIO2 Output value */
 148 #define AX_GPIO_RESERVED        0x40    /* Reserved */
 149 #define AX_GPIO_RSE             0x80    /* Reload serial EEPROM */
 150
 151 #define AX_EEPROM_MAGIC         0xdeadbeef
 152 #define AX88172_EEPROM_LEN      0x40
 153 #define AX88772_EEPROM_LEN      0xff
 154
 155 #define PHY_MODE_MARVELL        0x0000
 156 #define MII_MARVELL_LED_CTRL    0x0018
 157 #define MII_MARVELL_STATUS      0x001b
 158 #define MII_MARVELL_CTRL        0x0014
 159
 160 #define MARVELL_LED_MANUAL      0x0019
 161
 162 #define MARVELL_STATUS_HWCFG    0x0004
 163
 164 #define MARVELL_CTRL_TXDELAY    0x0002
 165 #define MARVELL_CTRL_RXDELAY    0x0080
 166
 167 #define PHY_MODE_RTL8211CL      0x000C
 168
 169 /* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */
 170 struct asix_data {
 171         u8 multi_filter[AX_MCAST_FILTER_SIZE];
 172         u8 mac_addr[ETH_ALEN];
 173         u8 phymode;
 174         u8 ledmode;
 175         u8 eeprom_len;
 176 };
 177
 178 struct ax88172_int_data {
 179         __le16 res1;
 180         u8 link;
 181         __le16 res2;
 182         u8 status;
 183         __le16 res3;
 184 } __packed;
 185
 186 struct asix_rx_fixup_info {
 187         struct sk_buff *ax_skb;
 188         u32 header;
 189         u16 size;
 190         bool split_head;
 191 };
 192
 193 struct asix_common_private {
 194         struct asix_rx_fixup_info rx_fixup_info;
 195 };
 196
 197 static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
 198                             u16 size, void *data)
 199 {
 200         void *buf;
 201         int err = -ENOMEM;
 202
 203         netdev_dbg(dev->net, "asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
 204                    cmd, value, index, size);
 205
 206         buf = kmalloc(size, GFP_KERNEL);
 207         if (!buf)
 208                 goto out;
 209
 210         err = usb_control_msg(
 211                 dev->udev,
 212                 usb_rcvctrlpipe(dev->udev, 0),
 213                 cmd,
 214                 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 215                 value,
 216                 index,
 217                 buf,
 218                 size,
 219                 USB_CTRL_GET_TIMEOUT);
 220         if (err == size)
 221                 memcpy(data, buf, size);
 222         else if (err >= 0)
 223                 err = -EINVAL;
 224         kfree(buf);
 225
 226 out:
 227         return err;
 228 }
 229
 230 static int asix_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
 231                              u16 size, void *data)
 232 {
 233         void *buf = NULL;
 234         int err = -ENOMEM;
 235
 236         netdev_dbg(dev->net, "asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
 237                    cmd, value, index, size);
 238
 239         if (data) {
 240                 buf = kmemdup(data, size, GFP_KERNEL);
 241                 if (!buf)
 242                         goto out;
 243         }
 244
 245         err = usb_control_msg(
 246                 dev->udev,
 247                 usb_sndctrlpipe(dev->udev, 0),
 248                 cmd,
 249                 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 250                 value,
 251                 index,
 252                 buf,
 253                 size,
 254                 USB_CTRL_SET_TIMEOUT);
 255         kfree(buf);
 256
 257 out:
 258         return err;
 259 }
 260
 261 static void asix_async_cmd_callback(struct urb *urb)
 262 {
 263         struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)urb->context;
 264         int status = urb->status;
 265
 266         if (status < 0)
 267                 printk(KERN_DEBUG "asix_async_cmd_callback() failed with %d",
 268                         status);
 269
 270         kfree(req);
 271         usb_free_urb(urb);
 272 }
 273
 274 static void
 275 asix_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index,
 276                                     u16 size, void *data)
 277 {
 278         struct usb_ctrlrequest *req;
 279         int status;
 280         struct urb *urb;
 281
 282         netdev_dbg(dev->net, "asix_write_cmd_async() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
 283                    cmd, value, index, size);
 284
 285         urb = usb_alloc_urb(0, GFP_ATOMIC);
 286         if (!urb) {
 287                 netdev_err(dev->net, "Error allocating URB in write_cmd_async!\n");
 288                 return;
 289         }
 290
 291         req = kmalloc(sizeof(struct usb_ctrlrequest), GFP_ATOMIC);
 292         if (!req) {
 293                 netdev_err(dev->net, "Failed to allocate memory for control request\n");
 294                 usb_free_urb(urb);
 295                 return;
 296         }
 297
 298         req->bRequestType = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
 299         req->bRequest = cmd;
 300         req->wValue = cpu_to_le16(value);
 301         req->wIndex = cpu_to_le16(index);
 302         req->wLength = cpu_to_le16(size);
 303
 304         usb_fill_control_urb(urb, dev->udev,
 305                              usb_sndctrlpipe(dev->udev, 0),
 306                              (void *)req, data, size,
 307                              asix_async_cmd_callback, req);
 308
 309         status = usb_submit_urb(urb, GFP_ATOMIC);
 310         if (status < 0) {
 311                 netdev_err(dev->net, "Error submitting the control message: status=%d\n",
 312                            status);
 313                 kfree(req);
 314                 usb_free_urb(urb);
 315         }
 316 }
 317
 318 static int asix_rx_fixup_internal(struct usbnet *dev, struct sk_buff *skb,
 319                                   struct asix_rx_fixup_info *rx)
 320 {
 321         int offset = 0;
 322
 323         while (offset + sizeof(u16) <= skb->len) {
 324                 u16 remaining = 0;
 325                 unsigned char *data;
 326
 327                 if (!rx->size) {
 328                         if ((skb->len - offset == sizeof(u16)) ||
 329                             rx->split_head) {
 330                                 if(!rx->split_head) {
 331                                         rx->header = get_unaligned_le16(
 332                                                         skb->data + offset);
 333                                         rx->split_head = true;
 334                                         offset += sizeof(u16);
 335                                         break;
 336                                 } else {
 337                                         rx->header |= (get_unaligned_le16(
 338                                                         skb->data + offset)
 339                                                         << 16);
 340                                         rx->split_head = false;
 341                                         offset += sizeof(u16);
 342                                 }
 343                         } else {
 344                                 rx->header = get_unaligned_le32(skb->data +
 345                                                                 offset);
 346                                 offset += sizeof(u32);
 347                         }
 348
 349                         /* get the packet length */
 350                         rx->size = (u16) (rx->header & 0x7ff);
 351                         if (rx->size != ((~rx->header >> 16) & 0x7ff)) {
 352                                 netdev_err(dev->net, "asix_rx_fixup() Bad Header Length 0x%x, offset %d\n",
 353                                            rx->header, offset);
 354                                 rx->size = 0;
 355                                 return 0;
 356                         }
 357                         rx->ax_skb = netdev_alloc_skb_ip_align(dev->net,
 358                                                                rx->size);
 359                         if (!rx->ax_skb)
 360                                 return 0;
 361                 }
 362
 363                 if (rx->size > dev->net->mtu + ETH_HLEN + VLAN_HLEN) {
 364                         netdev_err(dev->net, "asix_rx_fixup() Bad RX Length %d\n",
 365                                    rx->size);
 366                         kfree_skb(rx->ax_skb);
 367                         return 0;
 368                 }
 369
 370                 if (rx->size > skb->len - offset) {
 371                         remaining = rx->size - (skb->len - offset);
 372                         rx->size = skb->len - offset;
 373                 }
 374
 375                 data = skb_put(rx->ax_skb, rx->size);
 376                 memcpy(data, skb->data + offset, rx->size);
 377                 if (!remaining)
 378                         usbnet_skb_return(dev, rx->ax_skb);
 379
 380                 offset += (rx->size + 1) & 0xfffe;
 381                 rx->size = remaining;
 382         }
 383
 384         if (skb->len != offset) {
 385                 netdev_err(dev->net, "asix_rx_fixup() Bad SKB Length %d, %d\n",
 386                            skb->len, offset);
 387                 return 0;
 388         }
 389
 390         return 1;
 391 }
 392
 393 static int asix_rx_fixup_common(struct usbnet *dev, struct sk_buff *skb)
 394 {
 395         struct asix_common_private *dp = dev->driver_priv;
 396         struct asix_rx_fixup_info *rx = &dp->rx_fixup_info;
 397
 398         return asix_rx_fixup_internal(dev, skb, rx);
 399 }
 400
 401 static struct sk_buff *asix_tx_fixup(struct usbnet *dev, struct sk_buff *skb,
 402                                         gfp_t flags)
 403 {
 404         int padlen;
 405         int headroom = skb_headroom(skb);
 406         int tailroom = skb_tailroom(skb);
 407         u32 packet_len;
 408         u32 padbytes = 0xffff0000;
 409
 410         padlen = ((skb->len + 4) & (dev->maxpacket - 1)) ? 0 : 4;
 411
 412         if ((!skb_cloned(skb)) &&
 413             ((headroom + tailroom) >= (4 + padlen))) {
 414                 if ((headroom < 4) || (tailroom < padlen)) {
 415                         skb->data = memmove(skb->head + 4, skb->data, skb->len);
 416                         skb_set_tail_pointer(skb, skb->len);
 417                 }
 418         } else {
 419                 struct sk_buff *skb2;
 420                 skb2 = skb_copy_expand(skb, 4, padlen, flags);
 421                 dev_kfree_skb_any(skb);
 422                 skb = skb2;
 423                 if (!skb)
 424                         return NULL;
 425         }
 426
 427         skb_push(skb, 4);
 428         packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4);
 429         cpu_to_le32s(&packet_len);
 430         skb_copy_to_linear_data(skb, &packet_len, sizeof(packet_len));
 431
 432         if (padlen) {
 433                 cpu_to_le32s(&padbytes);
 434                 memcpy(skb_tail_pointer(skb), &padbytes, sizeof(padbytes));
 435                 skb_put(skb, sizeof(padbytes));
 436         }
 437         return skb;
 438 }
 439
 440 static void asix_status(struct usbnet *dev, struct urb *urb)
 441 {
 442         struct ax88172_int_data *event;
 443         int link;
 444
 445         if (urb->actual_length < 8)
 446                 return;
 447
 448         event = urb->transfer_buffer;
 449         link = event->link & 0x01;
 450         if (netif_carrier_ok(dev->net) != link) {
 451                 if (link) {
 452                         netif_carrier_on(dev->net);
 453                         usbnet_defer_kevent (dev, EVENT_LINK_RESET );
 454                 } else
 455                         netif_carrier_off(dev->net);
 456                 netdev_dbg(dev->net, "Link Status is: %d\n", link);
 457         }
 458 }
 459
 460 static inline int asix_set_sw_mii(struct usbnet *dev)
 461 {
 462         int ret;
 463         ret = asix_write_cmd(dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL);
 464         if (ret < 0)
 465                 netdev_err(dev->net, "Failed to enable software MII access\n");
 466         return ret;
 467 }
 468
 469 static inline int asix_set_hw_mii(struct usbnet *dev)
 470 {
 471         int ret;
 472         ret = asix_write_cmd(dev, AX_CMD_SET_HW_MII, 0x0000, 0, 0, NULL);
 473         if (ret < 0)
 474                 netdev_err(dev->net, "Failed to enable hardware MII access\n");
 475         return ret;
 476 }
 477
 478 static inline int asix_get_phy_addr(struct usbnet *dev)
 479 {
 480         u8 buf[2];
 481         int ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID, 0, 0, 2, buf);
 482
 483         netdev_dbg(dev->net, "asix_get_phy_addr()\n");
 484
 485         if (ret < 0) {
 486                 netdev_err(dev->net, "Error reading PHYID register: %02x\n", ret);
 487                 goto out;
 488         }
 489         netdev_dbg(dev->net, "asix_get_phy_addr() returning 0x%04x\n",
 490                    *((__le16 *)buf));
 491         ret = buf[1];
 492
 493 out:
 494         return ret;
 495 }
 496
 497 static int asix_sw_reset(struct usbnet *dev, u8 flags)
 498 {
 499         int ret;
 500
 501         ret = asix_write_cmd(dev, AX_CMD_SW_RESET, flags, 0, 0, NULL);
 502         if (ret < 0)
 503                 netdev_err(dev->net, "Failed to send software reset: %02x\n", ret);
 504
 505         return ret;
 506 }
 507
 508 static u16 asix_read_rx_ctl(struct usbnet *dev)
 509 {
 510         __le16 v;
 511         int ret = asix_read_cmd(dev, AX_CMD_READ_RX_CTL, 0, 0, 2, &v);
 512
 513         if (ret < 0) {
 514                 netdev_err(dev->net, "Error reading RX_CTL register: %02x\n", ret);
 515                 goto out;
 516         }
 517         ret = le16_to_cpu(v);
 518 out:
 519         return ret;
 520 }
 521
 522 static int asix_write_rx_ctl(struct usbnet *dev, u16 mode)
 523 {
 524         int ret;
 525
 526         netdev_dbg(dev->net, "asix_write_rx_ctl() - mode = 0x%04x\n", mode);
 527         ret = asix_write_cmd(dev, AX_CMD_WRITE_RX_CTL, mode, 0, 0, NULL);
 528         if (ret < 0)
 529                 netdev_err(dev->net, "Failed to write RX_CTL mode to 0x%04x: %02x\n",
 530                            mode, ret);
 531
 532         return ret;
 533 }
 534
 535 static u16 asix_read_medium_status(struct usbnet *dev)
 536 {
 537         __le16 v;
 538         int ret = asix_read_cmd(dev, AX_CMD_READ_MEDIUM_STATUS, 0, 0, 2, &v);
 539
 540         if (ret < 0) {
 541                 netdev_err(dev->net, "Error reading Medium Status register: %02x\n",
 542                            ret);
 543                 return ret;     /* TODO: callers not checking for error ret */
 544         }
 545
 546         return le16_to_cpu(v);
 547
 548 }
 549
 550 static int asix_write_medium_mode(struct usbnet *dev, u16 mode)
 551 {
 552         int ret;
 553
 554         netdev_dbg(dev->net, "asix_write_medium_mode() - mode = 0x%04x\n", mode);
 555         ret = asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL);
 556         if (ret < 0)
 557                 netdev_err(dev->net, "Failed to write Medium Mode mode to 0x%04x: %02x\n",
 558                            mode, ret);
 559
 560         return ret;
 561 }
 562
 563 static int asix_write_gpio(struct usbnet *dev, u16 value, int sleep)
 564 {
 565         int ret;
 566
 567         netdev_dbg(dev->net, "asix_write_gpio() - value = 0x%04x\n", value);
 568         ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, value, 0, 0, NULL);
 569         if (ret < 0)
 570                 netdev_err(dev->net, "Failed to write GPIO value 0x%04x: %02x\n",
 571                            value, ret);
 572
 573         if (sleep)
 574                 msleep(sleep);
 575
 576         return ret;
 577 }
 578
 579 /*
 580  * AX88772 & AX88178 have a 16-bit RX_CTL value
 581  */
 582 static void asix_set_multicast(struct net_device *net)
 583 {
 584         struct usbnet *dev = netdev_priv(net);
 585         struct asix_data *data = (struct asix_data *)&dev->data;
 586         u16 rx_ctl = AX_DEFAULT_RX_CTL;
 587
 588         if (net->flags & IFF_PROMISC) {
 589                 rx_ctl |= AX_RX_CTL_PRO;
 590         } else if (net->flags & IFF_ALLMULTI ||
 591                    netdev_mc_count(net) > AX_MAX_MCAST) {
 592                 rx_ctl |= AX_RX_CTL_AMALL;
 593         } else if (netdev_mc_empty(net)) {
 594                 /* just broadcast and directed */
 595         } else {
 596                 /* We use the 20 byte dev->data
 597                  * for our 8 byte filter buffer
 598                  * to avoid allocating memory that
 599                  * is tricky to free later */
 600                 struct netdev_hw_addr *ha;
 601                 u32 crc_bits;
 602
 603                 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
 604
 605                 /* Build the multicast hash filter. */
 606                 netdev_for_each_mc_addr(ha, net) {
 607                         crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
 608                         data->multi_filter[crc_bits >> 3] |=
 609                             1 << (crc_bits & 7);
 610                 }
 611
 612                 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
 613                                    AX_MCAST_FILTER_SIZE, data->multi_filter);
 614
 615                 rx_ctl |= AX_RX_CTL_AM;
 616         }
 617
 618         asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
 619 }
 620
 621 static int asix_mdio_read(struct net_device *netdev, int phy_id, int loc)
 622 {
 623         struct usbnet *dev = netdev_priv(netdev);
 624         __le16 res;
 625
 626         mutex_lock(&dev->phy_mutex);
 627         asix_set_sw_mii(dev);
 628         asix_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id,
 629                                 (__u16)loc, 2, &res);
 630         asix_set_hw_mii(dev);
 631         mutex_unlock(&dev->phy_mutex);
 632
 633         netdev_dbg(dev->net, "asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x\n",
 634                    phy_id, loc, le16_to_cpu(res));
 635
 636         return le16_to_cpu(res);
 637 }
 638
 639 static void
 640 asix_mdio_write(struct net_device *netdev, int phy_id, int loc, int val)
 641 {
 642         struct usbnet *dev = netdev_priv(netdev);
 643         __le16 res = cpu_to_le16(val);
 644
 645         netdev_dbg(dev->net, "asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x\n",
 646                    phy_id, loc, val);
 647         mutex_lock(&dev->phy_mutex);
 648         asix_set_sw_mii(dev);
 649         asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, &res);
 650         asix_set_hw_mii(dev);
 651         mutex_unlock(&dev->phy_mutex);
 652 }
 653
 654 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
 655 static u32 asix_get_phyid(struct usbnet *dev)
 656 {
 657         int phy_reg;
 658         u32 phy_id;
 659         int i;
 660
 661         /* Poll for the rare case the FW or phy isn't ready yet.  */
 662         for (i = 0; i < 100; i++) {
 663                 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
 664                 if (phy_reg != 0 && phy_reg != 0xFFFF)
 665                         break;
 666                 mdelay(1);
 667         }
 668
 669         if (phy_reg <= 0 || phy_reg == 0xFFFF)
 670                 return 0;
 671
 672         phy_id = (phy_reg & 0xffff) << 16;
 673
 674         phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
 675         if (phy_reg < 0)
 676                 return 0;
 677
 678         phy_id |= (phy_reg & 0xffff);
 679
 680         return phy_id;
 681 }
 682
 683 static void
 684 asix_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
 685 {
 686         struct usbnet *dev = netdev_priv(net);
 687         u8 opt;
 688
 689         if (asix_read_cmd(dev, AX_CMD_READ_MONITOR_MODE, 0, 0, 1, &opt) < 0) {
 690                 wolinfo->supported = 0;
 691                 wolinfo->wolopts = 0;
 692                 return;
 693         }
 694         wolinfo->supported = WAKE_PHY | WAKE_MAGIC;
 695         wolinfo->wolopts = 0;
 696 }
 697
 698 static int
 699 asix_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
 700 {
 701         struct usbnet *dev = netdev_priv(net);
 702         u8 opt = 0;
 703
 704         if (wolinfo->wolopts & WAKE_PHY)
 705                 opt |= AX_MONITOR_LINK;
 706         if (wolinfo->wolopts & WAKE_MAGIC)
 707                 opt |= AX_MONITOR_MAGIC;
 708
 709         if (asix_write_cmd(dev, AX_CMD_WRITE_MONITOR_MODE,
 710                               opt, 0, 0, NULL) < 0)
 711                 return -EINVAL;
 712
 713         return 0;
 714 }
 715
 716 static int asix_get_eeprom_len(struct net_device *net)
 717 {
 718         struct usbnet *dev = netdev_priv(net);
 719         struct asix_data *data = (struct asix_data *)&dev->data;
 720
 721         return data->eeprom_len;
 722 }
 723
 724 static int asix_get_eeprom(struct net_device *net,
 725                               struct ethtool_eeprom *eeprom, u8 *data)
 726 {
 727         struct usbnet *dev = netdev_priv(net);
 728         __le16 *ebuf = (__le16 *)data;
 729         int i;
 730
 731         /* Crude hack to ensure that we don't overwrite memory
 732          * if an odd length is supplied
 733          */
 734         if (eeprom->len % 2)
 735                 return -EINVAL;
 736
 737         eeprom->magic = AX_EEPROM_MAGIC;
 738
 739         /* ax8817x returns 2 bytes from eeprom on read */
 740         for (i=0; i < eeprom->len / 2; i++) {
 741                 if (asix_read_cmd(dev, AX_CMD_READ_EEPROM,
 742                         eeprom->offset + i, 0, 2, &ebuf[i]) < 0)
 743                         return -EINVAL;
 744         }
 745         return 0;
 746 }
 747
 748 static void asix_get_drvinfo (struct net_device *net,
 749                                  struct ethtool_drvinfo *info)
 750 {
 751         struct usbnet *dev = netdev_priv(net);
 752         struct asix_data *data = (struct asix_data *)&dev->data;
 753
 754         /* Inherit standard device info */
 755         usbnet_get_drvinfo(net, info);
 756         strncpy (info->driver, DRIVER_NAME, sizeof info->driver);
 757         strncpy (info->version, DRIVER_VERSION, sizeof info->version);
 758         info->eedump_len = data->eeprom_len;
 759 }
 760
 761 static u32 asix_get_link(struct net_device *net)
 762 {
 763         struct usbnet *dev = netdev_priv(net);
 764
 765         return mii_link_ok(&dev->mii);
 766 }
 767
 768 static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
 769 {
 770         struct usbnet *dev = netdev_priv(net);
 771
 772         return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
 773 }
 774
 775 static int asix_set_mac_address(struct net_device *net, void *p)
 776 {
 777         struct usbnet *dev = netdev_priv(net);
 778         struct asix_data *data = (struct asix_data *)&dev->data;
 779         struct sockaddr *addr = p;
 780
 781         if (netif_running(net))
 782                 return -EBUSY;
 783         if (!is_valid_ether_addr(addr->sa_data))
 784                 return -EADDRNOTAVAIL;
 785
 786         memcpy(net->dev_addr, addr->sa_data, ETH_ALEN);
 787
 788         /* We use the 20 byte dev->data
 789          * for our 6 byte mac buffer
 790          * to avoid allocating memory that
 791          * is tricky to free later */
 792         memcpy(data->mac_addr, addr->sa_data, ETH_ALEN);
 793         asix_write_cmd_async(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
 794                                                         data->mac_addr);
 795
 796         return 0;
 797 }
 798
 799 /* We need to override some ethtool_ops so we require our
 800    own structure so we don't interfere with other usbnet
 801    devices that may be connected at the same time. */
 802 static const struct ethtool_ops ax88172_ethtool_ops = {
 803         .get_drvinfo            = asix_get_drvinfo,
 804         .get_link               = asix_get_link,
 805         .get_msglevel           = usbnet_get_msglevel,
 806         .set_msglevel           = usbnet_set_msglevel,
 807         .get_wol                = asix_get_wol,
 808         .set_wol                = asix_set_wol,
 809         .get_eeprom_len         = asix_get_eeprom_len,
 810         .get_eeprom             = asix_get_eeprom,
 811         .get_settings           = usbnet_get_settings,
 812         .set_settings           = usbnet_set_settings,
 813         .nway_reset             = usbnet_nway_reset,
 814 };
 815
 816 static void ax88172_set_multicast(struct net_device *net)
 817 {
 818         struct usbnet *dev = netdev_priv(net);
 819         struct asix_data *data = (struct asix_data *)&dev->data;
 820         u8 rx_ctl = 0x8c;
 821
 822         if (net->flags & IFF_PROMISC) {
 823                 rx_ctl |= 0x01;
 824         } else if (net->flags & IFF_ALLMULTI ||
 825                    netdev_mc_count(net) > AX_MAX_MCAST) {
 826                 rx_ctl |= 0x02;
 827         } else if (netdev_mc_empty(net)) {
 828                 /* just broadcast and directed */
 829         } else {
 830                 /* We use the 20 byte dev->data
 831                  * for our 8 byte filter buffer
 832                  * to avoid allocating memory that
 833                  * is tricky to free later */
 834                 struct netdev_hw_addr *ha;
 835                 u32 crc_bits;
 836
 837                 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
 838
 839                 /* Build the multicast hash filter. */
 840                 netdev_for_each_mc_addr(ha, net) {
 841                         crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
 842                         data->multi_filter[crc_bits >> 3] |=
 843                             1 << (crc_bits & 7);
 844                 }
 845
 846                 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
 847                                    AX_MCAST_FILTER_SIZE, data->multi_filter);
 848
 849                 rx_ctl |= 0x10;
 850         }
 851
 852         asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
 853 }
 854
 855 static int ax88172_link_reset(struct usbnet *dev)
 856 {
 857         u8 mode;
 858         struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
 859
 860         mii_check_media(&dev->mii, 1, 1);
 861         mii_ethtool_gset(&dev->mii, &ecmd);
 862         mode = AX88172_MEDIUM_DEFAULT;
 863
 864         if (ecmd.duplex != DUPLEX_FULL)
 865                 mode |= ~AX88172_MEDIUM_FD;
 866
 867         netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
 868                    ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
 869
 870         asix_write_medium_mode(dev, mode);
 871
 872         return 0;
 873 }
 874
 875 static const struct net_device_ops ax88172_netdev_ops = {
 876         .ndo_open               = usbnet_open,
 877         .ndo_stop               = usbnet_stop,
 878         .ndo_start_xmit         = usbnet_start_xmit,
 879         .ndo_tx_timeout         = usbnet_tx_timeout,
 880         .ndo_change_mtu         = usbnet_change_mtu,
 881         .ndo_set_mac_address    = eth_mac_addr,
 882         .ndo_validate_addr      = eth_validate_addr,
 883         .ndo_do_ioctl           = asix_ioctl,
 884         .ndo_set_rx_mode        = ax88172_set_multicast,
 885 };
 886
 887 static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
 888 {
 889         int ret = 0;
 890         u8 buf[ETH_ALEN];
 891         int i;
 892         unsigned long gpio_bits = dev->driver_info->data;
 893         struct asix_data *data = (struct asix_data *)&dev->data;
 894
 895         data->eeprom_len = AX88172_EEPROM_LEN;
 896
 897         usbnet_get_endpoints(dev,intf);
 898
 899         /* Toggle the GPIOs in a manufacturer/model specific way */
 900         for (i = 2; i >= 0; i--) {
 901                 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
 902                                 (gpio_bits >> (i * 8)) & 0xff, 0, 0, NULL);
 903                 if (ret < 0)
 904                         goto out;
 905                 msleep(5);
 906         }
 907
 908         ret = asix_write_rx_ctl(dev, 0x80);
 909         if (ret < 0)
 910                 goto out;
 911
 912         /* Get the MAC address */
 913         ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
 914         if (ret < 0) {
 915                 dbg("read AX_CMD_READ_NODE_ID failed: %d", ret);
 916                 goto out;
 917         }
 918         memcpy(dev->net->dev_addr, buf, ETH_ALEN);
 919
 920         /* Initialize MII structure */
 921         dev->mii.dev = dev->net;
 922         dev->mii.mdio_read = asix_mdio_read;
 923         dev->mii.mdio_write = asix_mdio_write;
 924         dev->mii.phy_id_mask = 0x3f;
 925         dev->mii.reg_num_mask = 0x1f;
 926         dev->mii.phy_id = asix_get_phy_addr(dev);
 927
 928         dev->net->netdev_ops = &ax88172_netdev_ops;
 929         dev->net->ethtool_ops = &ax88172_ethtool_ops;
 930
 931         asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
 932         asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
 933                 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
 934         mii_nway_restart(&dev->mii);
 935
 936         return 0;
 937
 938 out:
 939         return ret;
 940 }
 941
 942 static const struct ethtool_ops ax88772_ethtool_ops = {
 943         .get_drvinfo            = asix_get_drvinfo,
 944         .get_link               = asix_get_link,
 945         .get_msglevel           = usbnet_get_msglevel,
 946         .set_msglevel           = usbnet_set_msglevel,
 947         .get_wol                = asix_get_wol,
 948         .set_wol                = asix_set_wol,
 949         .get_eeprom_len         = asix_get_eeprom_len,
 950         .get_eeprom             = asix_get_eeprom,
 951         .get_settings           = usbnet_get_settings,
 952         .set_settings           = usbnet_set_settings,
 953         .nway_reset             = usbnet_nway_reset,
 954 };
 955
 956 static int ax88772_link_reset(struct usbnet *dev)
 957 {
 958         u16 mode;
 959         struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
 960
 961         mii_check_media(&dev->mii, 1, 1);
 962         mii_ethtool_gset(&dev->mii, &ecmd);
 963         mode = AX88772_MEDIUM_DEFAULT;
 964
 965         if (ethtool_cmd_speed(&ecmd) != SPEED_100)
 966                 mode &= ~AX_MEDIUM_PS;
 967
 968         if (ecmd.duplex != DUPLEX_FULL)
 969                 mode &= ~AX_MEDIUM_FD;
 970
 971         netdev_dbg(dev->net, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
 972                    ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
 973
 974         asix_write_medium_mode(dev, mode);
 975
 976         return 0;
 977 }
 978
 979 static int ax88772_reset(struct usbnet *dev)
 980 {
 981         struct asix_data *data = (struct asix_data *)&dev->data;
 982         int ret, embd_phy;
 983         u16 rx_ctl;
 984
 985         ret = asix_write_gpio(dev,
 986                         AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5);
 987         if (ret < 0)
 988                 goto out;
 989
 990         embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);
 991
 992         ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
 993         if (ret < 0) {
 994                 dbg("Select PHY #1 failed: %d", ret);
 995                 goto out;
 996         }
 997
 998         ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL);
 999         if (ret < 0)
1000                 goto out;
1001
1002         msleep(150);
1003
1004         ret = asix_sw_reset(dev, AX_SWRESET_CLEAR);
1005         if (ret < 0)
1006                 goto out;
1007
1008         msleep(150);
1009
1010         if (embd_phy) {
1011                 ret = asix_sw_reset(dev, AX_SWRESET_IPRL);
1012                 if (ret < 0)
1013                         goto out;
1014         } else {
1015                 ret = asix_sw_reset(dev, AX_SWRESET_PRTE);
1016                 if (ret < 0)
1017                         goto out;
1018         }
1019
1020         msleep(150);
1021         rx_ctl = asix_read_rx_ctl(dev);
1022         dbg("RX_CTL is 0x%04x after software reset", rx_ctl);
1023         ret = asix_write_rx_ctl(dev, 0x0000);
1024         if (ret < 0)
1025                 goto out;
1026
1027         rx_ctl = asix_read_rx_ctl(dev);
1028         dbg("RX_CTL is 0x%04x setting to 0x0000", rx_ctl);
1029
1030         ret = asix_sw_reset(dev, AX_SWRESET_PRL);
1031         if (ret < 0)
1032                 goto out;
1033
1034         msleep(150);
1035
1036         ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL);
1037         if (ret < 0)
1038                 goto out;
1039
1040         msleep(150);
1041
1042         asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
1043         asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1044                         ADVERTISE_ALL | ADVERTISE_CSMA);
1045         mii_nway_restart(&dev->mii);
1046
1047         ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT);
1048         if (ret < 0)
1049                 goto out;
1050
1051         ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
1052                                 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
1053                                 AX88772_IPG2_DEFAULT, 0, NULL);
1054         if (ret < 0) {
1055                 dbg("Write IPG,IPG1,IPG2 failed: %d", ret);
1056                 goto out;
1057         }
1058
1059         /* Rewrite MAC address */
1060         memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
1061         ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
1062                                                         data->mac_addr);
1063         if (ret < 0)
1064                 goto out;
1065
1066         /* Set RX_CTL to default values with 2k buffer, and enable cactus */
1067         ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
1068         if (ret < 0)
1069                 goto out;
1070
1071         rx_ctl = asix_read_rx_ctl(dev);
1072         dbg("RX_CTL is 0x%04x after all initializations", rx_ctl);
1073
1074         rx_ctl = asix_read_medium_status(dev);
1075         dbg("Medium Status is 0x%04x after all initializations", rx_ctl);
1076
1077         return 0;
1078
1079 out:
1080         return ret;
1081
1082 }
1083
1084 static const struct net_device_ops ax88772_netdev_ops = {
1085         .ndo_open               = usbnet_open,
1086         .ndo_stop               = usbnet_stop,
1087         .ndo_start_xmit         = usbnet_start_xmit,
1088         .ndo_tx_timeout         = usbnet_tx_timeout,
1089         .ndo_change_mtu         = usbnet_change_mtu,
1090         .ndo_set_mac_address    = asix_set_mac_address,
1091         .ndo_validate_addr      = eth_validate_addr,
1092         .ndo_do_ioctl           = asix_ioctl,
1093         .ndo_set_rx_mode        = asix_set_multicast,
1094 };
1095
1096 static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
1097 {
1098         int ret, embd_phy;
1099         struct asix_data *data = (struct asix_data *)&dev->data;
1100         u8 buf[ETH_ALEN];
1101         u32 phyid;
1102
1103         data->eeprom_len = AX88772_EEPROM_LEN;
1104
1105         usbnet_get_endpoints(dev,intf);
1106
1107         /* Get the MAC address */
1108         ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
1109         if (ret < 0) {
1110                 dbg("Failed to read MAC address: %d", ret);
1111                 return ret;
1112         }
1113         memcpy(dev->net->dev_addr, buf, ETH_ALEN);
1114
1115         /* Initialize MII structure */
1116         dev->mii.dev = dev->net;
1117         dev->mii.mdio_read = asix_mdio_read;
1118         dev->mii.mdio_write = asix_mdio_write;
1119         dev->mii.phy_id_mask = 0x1f;
1120         dev->mii.reg_num_mask = 0x1f;
1121         dev->mii.phy_id = asix_get_phy_addr(dev);
1122
1123         dev->net->netdev_ops = &ax88772_netdev_ops;
1124         dev->net->ethtool_ops = &ax88772_ethtool_ops;
1125
1126         embd_phy = ((dev->mii.phy_id & 0x1f) == 0x10 ? 1 : 0);
1127
1128         /* Reset the PHY to normal operation mode */
1129         ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
1130         if (ret < 0) {
1131                 dbg("Select PHY #1 failed: %d", ret);
1132                 return ret;
1133         }
1134
1135         ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL);
1136         if (ret < 0)
1137                 return ret;
1138
1139         msleep(150);
1140
1141         ret = asix_sw_reset(dev, AX_SWRESET_CLEAR);
1142         if (ret < 0)
1143                 return ret;
1144
1145         msleep(150);
1146
1147         ret = asix_sw_reset(dev, embd_phy ? AX_SWRESET_IPRL : AX_SWRESET_PRTE);
1148
1149         /* Read PHYID register *AFTER* the PHY was reset properly */
1150         phyid = asix_get_phyid(dev);
1151         dbg("PHYID=0x%08x", phyid);
1152
1153         /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1154         if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1155                 /* hard_mtu  is still the default - the device does not support
1156                    jumbo eth frames */
1157                 dev->rx_urb_size = 2048;
1158         }
1159
1160         dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL);
1161         if (!dev->driver_priv)
1162                 return -ENOMEM;
1163
1164         return 0;
1165 }
1166
1167 static void ax88772_unbind(struct usbnet *dev, struct usb_interface *intf)
1168 {
1169         if (dev->driver_priv)
1170                 kfree(dev->driver_priv);
1171 }
1172
1173 static struct ethtool_ops ax88178_ethtool_ops = {
1174         .get_drvinfo            = asix_get_drvinfo,
1175         .get_link               = asix_get_link,
1176         .get_msglevel           = usbnet_get_msglevel,
1177         .set_msglevel           = usbnet_set_msglevel,
1178         .get_wol                = asix_get_wol,
1179         .set_wol                = asix_set_wol,
1180         .get_eeprom_len         = asix_get_eeprom_len,
1181         .get_eeprom             = asix_get_eeprom,
1182         .get_settings           = usbnet_get_settings,
1183         .set_settings           = usbnet_set_settings,
1184         .nway_reset             = usbnet_nway_reset,
1185 };
1186
1187 static int marvell_phy_init(struct usbnet *dev)
1188 {
1189         struct asix_data *data = (struct asix_data *)&dev->data;
1190         u16 reg;
1191
1192         netdev_dbg(dev->net, "marvell_phy_init()\n");
1193
1194         reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
1195         netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg);
1196
1197         asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
1198                         MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
1199
1200         if (data->ledmode) {
1201                 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1202                         MII_MARVELL_LED_CTRL);
1203                 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg);
1204
1205                 reg &= 0xf8ff;
1206                 reg |= (1 + 0x0100);
1207                 asix_mdio_write(dev->net, dev->mii.phy_id,
1208                         MII_MARVELL_LED_CTRL, reg);
1209
1210                 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1211                         MII_MARVELL_LED_CTRL);
1212                 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg);
1213                 reg &= 0xfc0f;
1214         }
1215
1216         return 0;
1217 }
1218
1219 static int rtl8211cl_phy_init(struct usbnet *dev)
1220 {
1221         struct asix_data *data = (struct asix_data *)&dev->data;
1222
1223         netdev_dbg(dev->net, "rtl8211cl_phy_init()\n");
1224
1225         asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005);
1226         asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0);
1227         asix_mdio_write (dev->net, dev->mii.phy_id, 0x01,
1228                 asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080);
1229         asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
1230
1231         if (data->ledmode == 12) {
1232                 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002);
1233                 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb);
1234                 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
1235         }
1236
1237         return 0;
1238 }
1239
1240 static int marvell_led_status(struct usbnet *dev, u16 speed)
1241 {
1242         u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
1243
1244         netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg);
1245
1246         /* Clear out the center LED bits - 0x03F0 */
1247         reg &= 0xfc0f;
1248
1249         switch (speed) {
1250                 case SPEED_1000:
1251                         reg |= 0x03e0;
1252                         break;
1253                 case SPEED_100:
1254                         reg |= 0x03b0;
1255                         break;
1256                 default:
1257                         reg |= 0x02f0;
1258         }
1259
1260         netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg);
1261         asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
1262
1263         return 0;
1264 }
1265
1266 static int ax88178_reset(struct usbnet *dev)
1267 {
1268         struct asix_data *data = (struct asix_data *)&dev->data;
1269         int ret;
1270         __le16 eeprom;
1271         u8 status;
1272         int gpio0 = 0;
1273         u32 phyid;
1274
1275         asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status);
1276         dbg("GPIO Status: 0x%04x", status);
1277
1278         asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL);
1279         asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom);
1280         asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL);
1281
1282         dbg("EEPROM index 0x17 is 0x%04x", eeprom);
1283
1284         if (eeprom == cpu_to_le16(0xffff)) {
1285                 data->phymode = PHY_MODE_MARVELL;
1286                 data->ledmode = 0;
1287                 gpio0 = 1;
1288         } else {
1289                 data->phymode = le16_to_cpu(eeprom) & 0x7F;
1290                 data->ledmode = le16_to_cpu(eeprom) >> 8;
1291                 gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
1292         }
1293         dbg("GPIO0: %d, PhyMode: %d", gpio0, data->phymode);
1294
1295         /* Power up external GigaPHY through AX88178 GPIO pin */
1296         asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40);
1297         if ((le16_to_cpu(eeprom) >> 8) != 1) {
1298                 asix_write_gpio(dev, 0x003c, 30);
1299                 asix_write_gpio(dev, 0x001c, 300);
1300                 asix_write_gpio(dev, 0x003c, 30);
1301         } else {
1302                 dbg("gpio phymode == 1 path");
1303                 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30);
1304                 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30);
1305         }
1306
1307         /* Read PHYID register *AFTER* powering up PHY */
1308         phyid = asix_get_phyid(dev);
1309         dbg("PHYID=0x%08x", phyid);
1310
1311         /* Set AX88178 to enable MII/GMII/RGMII interface for external PHY */
1312         asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, 0, 0, 0, NULL);
1313
1314         asix_sw_reset(dev, 0);
1315         msleep(150);
1316
1317         asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
1318         msleep(150);
1319
1320         asix_write_rx_ctl(dev, 0);
1321
1322         if (data->phymode == PHY_MODE_MARVELL) {
1323                 marvell_phy_init(dev);
1324                 msleep(60);
1325         } else if (data->phymode == PHY_MODE_RTL8211CL)
1326                 rtl8211cl_phy_init(dev);
1327
1328         asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR,
1329                         BMCR_RESET | BMCR_ANENABLE);
1330         asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1331                         ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
1332         asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
1333                         ADVERTISE_1000FULL);
1334
1335         mii_nway_restart(&dev->mii);
1336
1337         ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT);
1338         if (ret < 0)
1339                 return ret;
1340
1341         /* Rewrite MAC address */
1342         memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
1343         ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
1344                                                         data->mac_addr);
1345         if (ret < 0)
1346                 return ret;
1347
1348         ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
1349         if (ret < 0)
1350                 return ret;
1351
1352         return 0;
1353 }
1354
1355 static int ax88178_link_reset(struct usbnet *dev)
1356 {
1357         u16 mode;
1358         struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
1359         struct asix_data *data = (struct asix_data *)&dev->data;
1360         u32 speed;
1361
1362         netdev_dbg(dev->net, "ax88178_link_reset()\n");
1363
1364         mii_check_media(&dev->mii, 1, 1);
1365         mii_ethtool_gset(&dev->mii, &ecmd);
1366         mode = AX88178_MEDIUM_DEFAULT;
1367         speed = ethtool_cmd_speed(&ecmd);
1368
1369         if (speed == SPEED_1000)
1370                 mode |= AX_MEDIUM_GM;
1371         else if (speed == SPEED_100)
1372                 mode |= AX_MEDIUM_PS;
1373         else
1374                 mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
1375
1376         mode |= AX_MEDIUM_ENCK;
1377
1378         if (ecmd.duplex == DUPLEX_FULL)
1379                 mode |= AX_MEDIUM_FD;
1380         else
1381                 mode &= ~AX_MEDIUM_FD;
1382
1383         netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
1384                    speed, ecmd.duplex, mode);
1385
1386         asix_write_medium_mode(dev, mode);
1387
1388         if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
1389                 marvell_led_status(dev, speed);
1390
1391         return 0;
1392 }
1393
1394 static void ax88178_set_mfb(struct usbnet *dev)
1395 {
1396         u16 mfb = AX_RX_CTL_MFB_16384;
1397         u16 rxctl;
1398         u16 medium;
1399         int old_rx_urb_size = dev->rx_urb_size;
1400
1401         if (dev->hard_mtu < 2048) {
1402                 dev->rx_urb_size = 2048;
1403                 mfb = AX_RX_CTL_MFB_2048;
1404         } else if (dev->hard_mtu < 4096) {
1405                 dev->rx_urb_size = 4096;
1406                 mfb = AX_RX_CTL_MFB_4096;
1407         } else if (dev->hard_mtu < 8192) {
1408                 dev->rx_urb_size = 8192;
1409                 mfb = AX_RX_CTL_MFB_8192;
1410         } else if (dev->hard_mtu < 16384) {
1411                 dev->rx_urb_size = 16384;
1412                 mfb = AX_RX_CTL_MFB_16384;
1413         }
1414
1415         rxctl = asix_read_rx_ctl(dev);
1416         asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb);
1417
1418         medium = asix_read_medium_status(dev);
1419         if (dev->net->mtu > 1500)
1420                 medium |= AX_MEDIUM_JFE;
1421         else
1422                 medium &= ~AX_MEDIUM_JFE;
1423         asix_write_medium_mode(dev, medium);
1424
1425         if (dev->rx_urb_size > old_rx_urb_size)
1426                 usbnet_unlink_rx_urbs(dev);
1427 }
1428
1429 static int ax88178_change_mtu(struct net_device *net, int new_mtu)
1430 {
1431         struct usbnet *dev = netdev_priv(net);
1432         int ll_mtu = new_mtu + net->hard_header_len + 4;
1433
1434         netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu);
1435
1436         if (new_mtu <= 0 || ll_mtu > 16384)
1437                 return -EINVAL;
1438
1439         if ((ll_mtu % dev->maxpacket) == 0)
1440                 return -EDOM;
1441
1442         net->mtu = new_mtu;
1443         dev->hard_mtu = net->mtu + net->hard_header_len;
1444         ax88178_set_mfb(dev);
1445
1446         return 0;
1447 }
1448
1449 static const struct net_device_ops ax88178_netdev_ops = {
1450         .ndo_open               = usbnet_open,
1451         .ndo_stop               = usbnet_stop,
1452         .ndo_start_xmit         = usbnet_start_xmit,
1453         .ndo_tx_timeout         = usbnet_tx_timeout,
1454         .ndo_set_mac_address    = asix_set_mac_address,
1455         .ndo_validate_addr      = eth_validate_addr,
1456         .ndo_set_rx_mode        = asix_set_multicast,
1457         .ndo_do_ioctl           = asix_ioctl,
1458         .ndo_change_mtu         = ax88178_change_mtu,
1459 };
1460
1461 static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
1462 {
1463         int ret;
1464         u8 buf[ETH_ALEN];
1465         struct asix_data *data = (struct asix_data *)&dev->data;
1466
1467         data->eeprom_len = AX88772_EEPROM_LEN;
1468
1469         usbnet_get_endpoints(dev,intf);
1470
1471         /* Get the MAC address */
1472         ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
1473         if (ret < 0) {
1474                 dbg("Failed to read MAC address: %d", ret);
1475                 return ret;
1476         }
1477         memcpy(dev->net->dev_addr, buf, ETH_ALEN);
1478
1479         /* Initialize MII structure */
1480         dev->mii.dev = dev->net;
1481         dev->mii.mdio_read = asix_mdio_read;
1482         dev->mii.mdio_write = asix_mdio_write;
1483         dev->mii.phy_id_mask = 0x1f;
1484         dev->mii.reg_num_mask = 0xff;
1485         dev->mii.supports_gmii = 1;
1486         dev->mii.phy_id = asix_get_phy_addr(dev);
1487
1488         dev->net->netdev_ops = &ax88178_netdev_ops;
1489         dev->net->ethtool_ops = &ax88178_ethtool_ops;
1490
1491         /* Blink LEDS so users know driver saw dongle */
1492         asix_sw_reset(dev, 0);
1493         msleep(150);
1494
1495         asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
1496         msleep(150);
1497
1498         /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1499         if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1500                 /* hard_mtu  is still the default - the device does not support
1501                    jumbo eth frames */
1502                 dev->rx_urb_size = 2048;
1503         }
1504
1505         dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL);
1506         if (!dev->driver_priv)
1507                         return -ENOMEM;
1508
1509         return 0;
1510 }
1511
1512 static const struct driver_info ax8817x_info = {
1513         .description = "ASIX AX8817x USB 2.0 Ethernet",
1514         .bind = ax88172_bind,
1515         .status = asix_status,
1516         .link_reset = ax88172_link_reset,
1517         .reset = ax88172_link_reset,
1518         .flags =  FLAG_ETHER | FLAG_LINK_INTR,
1519         .data = 0x00130103,
1520 };
1521
1522 static const struct driver_info dlink_dub_e100_info = {
1523         .description = "DLink DUB-E100 USB Ethernet",
1524         .bind = ax88172_bind,
1525         .status = asix_status,
1526         .link_reset = ax88172_link_reset,
1527         .reset = ax88172_link_reset,
1528         .flags =  FLAG_ETHER | FLAG_LINK_INTR,
1529         .data = 0x009f9d9f,
1530 };
1531
1532 static const struct driver_info netgear_fa120_info = {
1533         .description = "Netgear FA-120 USB Ethernet",
1534         .bind = ax88172_bind,
1535         .status = asix_status,
1536         .link_reset = ax88172_link_reset,
1537         .reset = ax88172_link_reset,
1538         .flags =  FLAG_ETHER | FLAG_LINK_INTR,
1539         .data = 0x00130103,
1540 };
1541
1542 static const struct driver_info hawking_uf200_info = {
1543         .description = "Hawking UF200 USB Ethernet",
1544         .bind = ax88172_bind,
1545         .status = asix_status,
1546         .link_reset = ax88172_link_reset,
1547         .reset = ax88172_link_reset,
1548         .flags =  FLAG_ETHER | FLAG_LINK_INTR,
1549         .data = 0x001f1d1f,
1550 };
1551
1552 static const struct driver_info ax88772_info = {
1553         .description = "ASIX AX88772 USB 2.0 Ethernet",
1554         .bind = ax88772_bind,
1555         .unbind = ax88772_unbind,
1556         .status = asix_status,
1557         .link_reset = ax88772_link_reset,
1558         .reset = ax88772_reset,
1559         .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR | FLAG_MULTI_PACKET,
1560         .rx_fixup = asix_rx_fixup_common,
1561         .tx_fixup = asix_tx_fixup,
1562 };
1563
1564 static const struct driver_info hg20f9_info = {
1565         .description = "HG20F9 USB 2.0 Ethernet",
1566         .bind = ax88772_bind,
1567         .status = asix_status,
1568         .link_reset = ax88772_link_reset,
1569         .reset = ax88772_reset,
1570         .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR,
1571         .rx_fixup = asix_rx_fixup,
1572         .tx_fixup = asix_tx_fixup,
1573 };
1574
1575 static const struct driver_info ax88178_info = {
1576         .description = "ASIX AX88178 USB 2.0 Ethernet",
1577         .bind = ax88178_bind,
1578         .unbind = ax88772_unbind,
1579         .status = asix_status,
1580         .link_reset = ax88178_link_reset,
1581         .reset = ax88178_reset,
1582         .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
1583                  FLAG_MULTI_PACKET,
1584         .rx_fixup = asix_rx_fixup_common,
1585         .tx_fixup = asix_tx_fixup,
1586 };
1587
1588 static const struct usb_device_id       products [] = {
1589 {
1590         // Linksys USB200M
1591         USB_DEVICE (0x077b, 0x2226),
1592         .driver_info =  (unsigned long) &ax8817x_info,
1593 }, {
1594         // Netgear FA120
1595         USB_DEVICE (0x0846, 0x1040),
1596         .driver_info =  (unsigned long) &netgear_fa120_info,
1597 }, {
1598         // DLink DUB-E100
1599         USB_DEVICE (0x2001, 0x1a00),
1600         .driver_info =  (unsigned long) &dlink_dub_e100_info,
1601 }, {
1602         // Intellinet, ST Lab USB Ethernet
1603         USB_DEVICE (0x0b95, 0x1720),
1604         .driver_info =  (unsigned long) &ax8817x_info,
1605 }, {
1606         // Hawking UF200, TrendNet TU2-ET100
1607         USB_DEVICE (0x07b8, 0x420a),
1608         .driver_info =  (unsigned long) &hawking_uf200_info,
1609 }, {
1610         // Billionton Systems, USB2AR
1611         USB_DEVICE (0x08dd, 0x90ff),
1612         .driver_info =  (unsigned long) &ax8817x_info,
1613 }, {
1614         // ATEN UC210T
1615         USB_DEVICE (0x0557, 0x2009),
1616         .driver_info =  (unsigned long) &ax8817x_info,
1617 }, {
1618         // Buffalo LUA-U2-KTX
1619         USB_DEVICE (0x0411, 0x003d),
1620         .driver_info =  (unsigned long) &ax8817x_info,
1621 }, {
1622         // Buffalo LUA-U2-GT 10/100/1000
1623         USB_DEVICE (0x0411, 0x006e),
1624         .driver_info =  (unsigned long) &ax88178_info,
1625 }, {
1626         // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
1627         USB_DEVICE (0x6189, 0x182d),
1628         .driver_info =  (unsigned long) &ax8817x_info,
1629 }, {
1630         // Sitecom LN-031 "USB 2.0 10/100/1000 Ethernet adapter"
1631         USB_DEVICE (0x0df6, 0x0056),
1632         .driver_info =  (unsigned long) &ax88178_info,
1633 }, {
1634         // corega FEther USB2-TX
1635         USB_DEVICE (0x07aa, 0x0017),
1636         .driver_info =  (unsigned long) &ax8817x_info,
1637 }, {
1638         // Surecom EP-1427X-2
1639         USB_DEVICE (0x1189, 0x0893),
1640         .driver_info = (unsigned long) &ax8817x_info,
1641 }, {
1642         // goodway corp usb gwusb2e
1643         USB_DEVICE (0x1631, 0x6200),
1644         .driver_info = (unsigned long) &ax8817x_info,
1645 }, {
1646         // JVC MP-PRX1 Port Replicator
1647         USB_DEVICE (0x04f1, 0x3008),
1648         .driver_info = (unsigned long) &ax8817x_info,
1649 }, {
1650         // ASIX AX88772B 10/100
1651         USB_DEVICE (0x0b95, 0x772b),
1652         .driver_info = (unsigned long) &ax88772_info,
1653 }, {
1654         // ASIX AX88772 10/100
1655         USB_DEVICE (0x0b95, 0x7720),
1656         .driver_info = (unsigned long) &ax88772_info,
1657 }, {
1658         // ASIX AX88178 10/100/1000
1659         USB_DEVICE (0x0b95, 0x1780),
1660         .driver_info = (unsigned long) &ax88178_info,
1661 }, {
1662         // Logitec LAN-GTJ/U2A
1663         USB_DEVICE (0x0789, 0x0160),
1664         .driver_info = (unsigned long) &ax88178_info,
1665 }, {
1666         // Linksys USB200M Rev 2
1667         USB_DEVICE (0x13b1, 0x0018),
1668         .driver_info = (unsigned long) &ax88772_info,
1669 }, {
1670         // 0Q0 cable ethernet
1671         USB_DEVICE (0x1557, 0x7720),
1672         .driver_info = (unsigned long) &ax88772_info,
1673 }, {
1674         // DLink DUB-E100 H/W Ver B1
1675         USB_DEVICE (0x07d1, 0x3c05),
1676         .driver_info = (unsigned long) &ax88772_info,
1677 }, {
1678         // DLink DUB-E100 H/W Ver B1 Alternate
1679         USB_DEVICE (0x2001, 0x3c05),
1680         .driver_info = (unsigned long) &ax88772_info,
1681 }, {
1682        // DLink DUB-E100 H/W Ver C1
1683        USB_DEVICE (0x2001, 0x1a02),
1684        .driver_info = (unsigned long) &ax88772_info,
1685 }, {
1686         // Linksys USB1000
1687         USB_DEVICE (0x1737, 0x0039),
1688         .driver_info = (unsigned long) &ax88178_info,
1689 }, {
1690         // IO-DATA ETG-US2
1691         USB_DEVICE (0x04bb, 0x0930),
1692         .driver_info = (unsigned long) &ax88178_info,
1693 }, {
1694         // Belkin F5D5055
1695         USB_DEVICE(0x050d, 0x5055),
1696         .driver_info = (unsigned long) &ax88178_info,
1697 }, {
1698         // Apple USB Ethernet Adapter
1699         USB_DEVICE(0x05ac, 0x1402),
1700         .driver_info = (unsigned long) &ax88772_info,
1701 }, {
1702         // Cables-to-Go USB Ethernet Adapter
1703         USB_DEVICE(0x0b95, 0x772a),
1704         .driver_info = (unsigned long) &ax88772_info,
1705 }, {
1706         // ABOCOM for pci
1707         USB_DEVICE(0x14ea, 0xab11),
1708         .driver_info = (unsigned long) &ax88178_info,
1709 }, {
1710         // ASIX 88772a
1711         USB_DEVICE(0x0db0, 0xa877),
1712         .driver_info = (unsigned long) &ax88772_info,
1713 }, {
1714         // HG20F9
1715         USB_DEVICE(0x066B, 0x20F9),
1716         .driver_info = (unsigned long) &hg20f9_info,
1717 }, {
1718         // Asus USB Ethernet Adapter
1719         USB_DEVICE (0x0b95, 0x7e2b),
1720         .driver_info = (unsigned long) &ax88772_info,
1721 },
1722         { },            // END
1723 };
1724 MODULE_DEVICE_TABLE(usb, products);
1725
1726 static struct usb_driver asix_driver = {
1727         .name =         DRIVER_NAME,
1728         .id_table =     products,
1729         .probe =        usbnet_probe,
1730         .suspend =      usbnet_suspend,
1731         .resume =       usbnet_resume,
1732         .disconnect =   usbnet_disconnect,
1733         .supports_autosuspend = 1,
1734 };
1735
1736 static int __init asix_init(void)
1737 {
1738         return usb_register(&asix_driver);
1739 }
1740 module_init(asix_init);
1741
1742 static void __exit asix_exit(void)
1743 {
1744         usb_deregister(&asix_driver);
1745 }
1746 module_exit(asix_exit);
1747
1748 MODULE_AUTHOR("David Hollis");
1749 MODULE_VERSION(DRIVER_VERSION);
1750 MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1751 MODULE_LICENSE("GPL");
1752