drivers/net/tulip/media.c

   1 /*
   2         drivers/net/tulip/media.c
   3
   4         Copyright 2000,2001  The Linux Kernel Team
   5         Written/copyright 1994-2001 by Donald Becker.
   6
   7         This software may be used and distributed according to the terms
   8         of the GNU General Public License, incorporated herein by reference.
   9
  10         Please refer to Documentation/DocBook/tulip-user.{pdf,ps,html}
  11         for more information on this driver.
  12
  13         Please submit bugs to http://bugzilla.kernel.org/ .
  14 */
  15
  16 #include <linux/kernel.h>
  17 #include <linux/mii.h>
  18 #include <linux/init.h>
  19 #include <linux/delay.h>
  20 #include <linux/pci.h>
  21 #include "tulip.h"
  22
  23
  24 /* The maximum data clock rate is 2.5 Mhz.  The minimum timing is usually
  25    met by back-to-back PCI I/O cycles, but we insert a delay to avoid
  26    "overclocking" issues or future 66Mhz PCI. */
  27 #define mdio_delay() ioread32(mdio_addr)
  28
  29 /* Read and write the MII registers using software-generated serial
  30    MDIO protocol.  It is just different enough from the EEPROM protocol
  31    to not share code.  The maxium data clock rate is 2.5 Mhz. */
  32 #define MDIO_SHIFT_CLK          0x10000
  33 #define MDIO_DATA_WRITE0        0x00000
  34 #define MDIO_DATA_WRITE1        0x20000
  35 #define MDIO_ENB                0x00000 /* Ignore the 0x02000 databook setting. */
  36 #define MDIO_ENB_IN             0x40000
  37 #define MDIO_DATA_READ          0x80000
  38
  39 static const unsigned char comet_miireg2offset[32] = {
  40         0xB4, 0xB8, 0xBC, 0xC0,  0xC4, 0xC8, 0xCC, 0,  0,0,0,0,  0,0,0,0,
  41         0,0xD0,0,0,  0,0,0,0,  0,0,0,0, 0, 0xD4, 0xD8, 0xDC, };
  42
  43
  44 /* MII transceiver control section.
  45    Read and write the MII registers using software-generated serial
  46    MDIO protocol.
  47    See IEEE 802.3-2002.pdf (Section 2, Chapter "22.2.4 Management functions")
  48    or DP83840A data sheet for more details.
  49    */
  50
  51 int tulip_mdio_read(struct net_device *dev, int phy_id, int location)
  52 {
  53         struct tulip_private *tp = netdev_priv(dev);
  54         int i;
  55         int read_cmd = (0xf6 << 10) | ((phy_id & 0x1f) << 5) | location;
  56         int retval = 0;
  57         void __iomem *ioaddr = tp->base_addr;
  58         void __iomem *mdio_addr = ioaddr + CSR9;
  59         unsigned long flags;
  60
  61         if (location & ~0x1f)
  62                 return 0xffff;
  63
  64         if (tp->chip_id == COMET  &&  phy_id == 30) {
  65                 if (comet_miireg2offset[location])
  66                         return ioread32(ioaddr + comet_miireg2offset[location]);
  67                 return 0xffff;
  68         }
  69
  70         spin_lock_irqsave(&tp->mii_lock, flags);
  71         if (tp->chip_id == LC82C168) {
  72                 int i = 1000;
  73                 iowrite32(0x60020000 + (phy_id<<23) + (location<<18), ioaddr + 0xA0);
  74                 ioread32(ioaddr + 0xA0);
  75                 ioread32(ioaddr + 0xA0);
  76                 while (--i > 0) {
  77                         barrier();
  78                         if ( ! ((retval = ioread32(ioaddr + 0xA0)) & 0x80000000))
  79                                 break;
  80                 }
  81                 spin_unlock_irqrestore(&tp->mii_lock, flags);
  82                 return retval & 0xffff;
  83         }
  84
  85         /* Establish sync by sending at least 32 logic ones. */
  86         for (i = 32; i >= 0; i--) {
  87                 iowrite32(MDIO_ENB | MDIO_DATA_WRITE1, mdio_addr);
  88                 mdio_delay();
  89                 iowrite32(MDIO_ENB | MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, mdio_addr);
  90                 mdio_delay();
  91         }
  92         /* Shift the read command bits out. */
  93         for (i = 15; i >= 0; i--) {
  94                 int dataval = (read_cmd & (1 << i)) ? MDIO_DATA_WRITE1 : 0;
  95
  96                 iowrite32(MDIO_ENB | dataval, mdio_addr);
  97                 mdio_delay();
  98                 iowrite32(MDIO_ENB | dataval | MDIO_SHIFT_CLK, mdio_addr);
  99                 mdio_delay();
 100         }
 101         /* Read the two transition, 16 data, and wire-idle bits. */
 102         for (i = 19; i > 0; i--) {
 103                 iowrite32(MDIO_ENB_IN, mdio_addr);
 104                 mdio_delay();
 105                 retval = (retval << 1) | ((ioread32(mdio_addr) & MDIO_DATA_READ) ? 1 : 0);
 106                 iowrite32(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
 107                 mdio_delay();
 108         }
 109
 110         spin_unlock_irqrestore(&tp->mii_lock, flags);
 111         return (retval>>1) & 0xffff;
 112 }
 113
 114 void tulip_mdio_write(struct net_device *dev, int phy_id, int location, int val)
 115 {
 116         struct tulip_private *tp = netdev_priv(dev);
 117         int i;
 118         int cmd = (0x5002 << 16) | ((phy_id & 0x1f) << 23) | (location<<18) | (val & 0xffff);
 119         void __iomem *ioaddr = tp->base_addr;
 120         void __iomem *mdio_addr = ioaddr + CSR9;
 121         unsigned long flags;
 122
 123         if (location & ~0x1f)
 124                 return;
 125
 126         if (tp->chip_id == COMET && phy_id == 30) {
 127                 if (comet_miireg2offset[location])
 128                         iowrite32(val, ioaddr + comet_miireg2offset[location]);
 129                 return;
 130         }
 131
 132         spin_lock_irqsave(&tp->mii_lock, flags);
 133         if (tp->chip_id == LC82C168) {
 134                 int i = 1000;
 135                 iowrite32(cmd, ioaddr + 0xA0);
 136                 do {
 137                         barrier();
 138                         if ( ! (ioread32(ioaddr + 0xA0) & 0x80000000))
 139                                 break;
 140                 } while (--i > 0);
 141                 spin_unlock_irqrestore(&tp->mii_lock, flags);
 142                 return;
 143         }
 144
 145         /* Establish sync by sending 32 logic ones. */
 146         for (i = 32; i >= 0; i--) {
 147                 iowrite32(MDIO_ENB | MDIO_DATA_WRITE1, mdio_addr);
 148                 mdio_delay();
 149                 iowrite32(MDIO_ENB | MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, mdio_addr);
 150                 mdio_delay();
 151         }
 152         /* Shift the command bits out. */
 153         for (i = 31; i >= 0; i--) {
 154                 int dataval = (cmd & (1 << i)) ? MDIO_DATA_WRITE1 : 0;
 155                 iowrite32(MDIO_ENB | dataval, mdio_addr);
 156                 mdio_delay();
 157                 iowrite32(MDIO_ENB | dataval | MDIO_SHIFT_CLK, mdio_addr);
 158                 mdio_delay();
 159         }
 160         /* Clear out extra bits. */
 161         for (i = 2; i > 0; i--) {
 162                 iowrite32(MDIO_ENB_IN, mdio_addr);
 163                 mdio_delay();
 164                 iowrite32(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
 165                 mdio_delay();
 166         }
 167
 168         spin_unlock_irqrestore(&tp->mii_lock, flags);
 169 }
 170
 171
 172 /* Set up the transceiver control registers for the selected media type. */
 173 void tulip_select_media(struct net_device *dev, int startup)
 174 {
 175         struct tulip_private *tp = netdev_priv(dev);
 176         void __iomem *ioaddr = tp->base_addr;
 177         struct mediatable *mtable = tp->mtable;
 178         u32 new_csr6;
 179         int i;
 180
 181         if (mtable) {
 182                 struct medialeaf *mleaf = &mtable->mleaf[tp->cur_index];
 183                 unsigned char *p = mleaf->leafdata;
 184                 switch (mleaf->type) {
 185                 case 0:                                 /* 21140 non-MII xcvr. */
 186                         if (tulip_debug > 1)
 187                                 printk(KERN_DEBUG "%s: Using a 21140 non-MII transceiver"
 188                                            " with control setting %2.2x.\n",
 189                                            dev->name, p[1]);
 190                         dev->if_port = p[0];
 191                         if (startup)
 192                                 iowrite32(mtable->csr12dir | 0x100, ioaddr + CSR12);
 193                         iowrite32(p[1], ioaddr + CSR12);
 194                         new_csr6 = 0x02000000 | ((p[2] & 0x71) << 18);
 195                         break;
 196                 case 2: case 4: {
 197                         u16 setup[5];
 198                         u32 csr13val, csr14val, csr15dir, csr15val;
 199                         for (i = 0; i < 5; i++)
 200                                 setup[i] = get_u16(&p[i*2 + 1]);
 201
 202                         dev->if_port = p[0] & MEDIA_MASK;
 203                         if (tulip_media_cap[dev->if_port] & MediaAlwaysFD)
 204                                 tp->full_duplex = 1;
 205
 206                         if (startup && mtable->has_reset) {
 207                                 struct medialeaf *rleaf = &mtable->mleaf[mtable->has_reset];
 208                                 unsigned char *rst = rleaf->leafdata;
 209                                 if (tulip_debug > 1)
 210                                         printk(KERN_DEBUG "%s: Resetting the transceiver.\n",
 211                                                    dev->name);
 212                                 for (i = 0; i < rst[0]; i++)
 213                                         iowrite32(get_u16(rst + 1 + (i<<1)) << 16, ioaddr + CSR15);
 214                         }
 215                         if (tulip_debug > 1)
 216                                 printk(KERN_DEBUG "%s: 21143 non-MII %s transceiver control "
 217                                            "%4.4x/%4.4x.\n",
 218                                            dev->name, medianame[dev->if_port], setup[0], setup[1]);
 219                         if (p[0] & 0x40) {      /* SIA (CSR13-15) setup values are provided. */
 220                                 csr13val = setup[0];
 221                                 csr14val = setup[1];
 222                                 csr15dir = (setup[3]<<16) | setup[2];
 223                                 csr15val = (setup[4]<<16) | setup[2];
 224                                 iowrite32(0, ioaddr + CSR13);
 225                                 iowrite32(csr14val, ioaddr + CSR14);
 226                                 iowrite32(csr15dir, ioaddr + CSR15);    /* Direction */
 227                                 iowrite32(csr15val, ioaddr + CSR15);    /* Data */
 228                                 iowrite32(csr13val, ioaddr + CSR13);
 229                         } else {
 230                                 csr13val = 1;
 231                                 csr14val = 0;
 232                                 csr15dir = (setup[0]<<16) | 0x0008;
 233                                 csr15val = (setup[1]<<16) | 0x0008;
 234                                 if (dev->if_port <= 4)
 235                                         csr14val = t21142_csr14[dev->if_port];
 236                                 if (startup) {
 237                                         iowrite32(0, ioaddr + CSR13);
 238                                         iowrite32(csr14val, ioaddr + CSR14);
 239                                 }
 240                                 iowrite32(csr15dir, ioaddr + CSR15);    /* Direction */
 241                                 iowrite32(csr15val, ioaddr + CSR15);    /* Data */
 242                                 if (startup) iowrite32(csr13val, ioaddr + CSR13);
 243                         }
 244                         if (tulip_debug > 1)
 245                                 printk(KERN_DEBUG "%s:  Setting CSR15 to %8.8x/%8.8x.\n",
 246                                            dev->name, csr15dir, csr15val);
 247                         if (mleaf->type == 4)
 248                                 new_csr6 = 0x82020000 | ((setup[2] & 0x71) << 18);
 249                         else
 250                                 new_csr6 = 0x82420000;
 251                         break;
 252                 }
 253                 case 1: case 3: {
 254                         int phy_num = p[0];
 255                         int init_length = p[1];
 256                         u16 *misc_info, tmp_info;
 257
 258                         dev->if_port = 11;
 259                         new_csr6 = 0x020E0000;
 260                         if (mleaf->type == 3) { /* 21142 */
 261                                 u16 *init_sequence = (u16*)(p+2);
 262                                 u16 *reset_sequence = &((u16*)(p+3))[init_length];
 263                                 int reset_length = p[2 + init_length*2];
 264                                 misc_info = reset_sequence + reset_length;
 265                                 if (startup) {
 266                                         int timeout = 10;       /* max 1 ms */
 267                                         for (i = 0; i < reset_length; i++)
 268                                                 iowrite32(get_u16(&reset_sequence[i]) << 16, ioaddr + CSR15);
 269
 270                                         /* flush posted writes */
 271                                         ioread32(ioaddr + CSR15);
 272
 273                                         /* Sect 3.10.3 in DP83840A.pdf (p39) */
 274                                         udelay(500);
 275
 276                                         /* Section 4.2 in DP83840A.pdf (p43) */
 277                                         /* and IEEE 802.3 "22.2.4.1.1 Reset" */
 278                                         while (timeout-- &&
 279                                                 (tulip_mdio_read (dev, phy_num, MII_BMCR) & BMCR_RESET))
 280                                                 udelay(100);
 281                                 }
 282                                 for (i = 0; i < init_length; i++)
 283                                         iowrite32(get_u16(&init_sequence[i]) << 16, ioaddr + CSR15);
 284
 285                                 ioread32(ioaddr + CSR15);       /* flush posted writes */
 286                         } else {
 287                                 u8 *init_sequence = p + 2;
 288                                 u8 *reset_sequence = p + 3 + init_length;
 289                                 int reset_length = p[2 + init_length];
 290                                 misc_info = (u16*)(reset_sequence + reset_length);
 291                                 if (startup) {
 292                                         int timeout = 10;       /* max 1 ms */
 293                                         iowrite32(mtable->csr12dir | 0x100, ioaddr + CSR12);
 294                                         for (i = 0; i < reset_length; i++)
 295                                                 iowrite32(reset_sequence[i], ioaddr + CSR12);
 296
 297                                         /* flush posted writes */
 298                                         ioread32(ioaddr + CSR12);
 299
 300                                         /* Sect 3.10.3 in DP83840A.pdf (p39) */
 301                                         udelay(500);
 302
 303                                         /* Section 4.2 in DP83840A.pdf (p43) */
 304                                         /* and IEEE 802.3 "22.2.4.1.1 Reset" */
 305                                         while (timeout-- &&
 306                                                 (tulip_mdio_read (dev, phy_num, MII_BMCR) & BMCR_RESET))
 307                                                 udelay(100);
 308                                 }
 309                                 for (i = 0; i < init_length; i++)
 310                                         iowrite32(init_sequence[i], ioaddr + CSR12);
 311
 312                                 ioread32(ioaddr + CSR12);       /* flush posted writes */
 313                         }
 314
 315                         tmp_info = get_u16(&misc_info[1]);
 316                         if (tmp_info)
 317                                 tp->advertising[phy_num] = tmp_info | 1;
 318                         if (tmp_info && startup < 2) {
 319                                 if (tp->mii_advertise == 0)
 320                                         tp->mii_advertise = tp->advertising[phy_num];
 321                                 if (tulip_debug > 1)
 322                                         printk(KERN_DEBUG "%s:  Advertising %4.4x on MII %d.\n",
 323                                                dev->name, tp->mii_advertise, tp->phys[phy_num]);
 324                                 tulip_mdio_write(dev, tp->phys[phy_num], 4, tp->mii_advertise);
 325                         }
 326                         break;
 327                 }
 328                 case 5: case 6: {
 329                         u16 setup[5];
 330
 331                         new_csr6 = 0; /* FIXME */
 332
 333                         for (i = 0; i < 5; i++)
 334                                 setup[i] = get_u16(&p[i*2 + 1]);
 335
 336                         if (startup && mtable->has_reset) {
 337                                 struct medialeaf *rleaf = &mtable->mleaf[mtable->has_reset];
 338                                 unsigned char *rst = rleaf->leafdata;
 339                                 if (tulip_debug > 1)
 340                                         printk(KERN_DEBUG "%s: Resetting the transceiver.\n",
 341                                                    dev->name);
 342                                 for (i = 0; i < rst[0]; i++)
 343                                         iowrite32(get_u16(rst + 1 + (i<<1)) << 16, ioaddr + CSR15);
 344                         }
 345
 346                         break;
 347                 }
 348                 default:
 349                         printk(KERN_DEBUG "%s:  Invalid media table selection %d.\n",
 350                                            dev->name, mleaf->type);
 351                         new_csr6 = 0x020E0000;
 352                 }
 353                 if (tulip_debug > 1)
 354                         printk(KERN_DEBUG "%s: Using media type %s, CSR12 is %2.2x.\n",
 355                                    dev->name, medianame[dev->if_port],
 356                                    ioread32(ioaddr + CSR12) & 0xff);
 357         } else if (tp->chip_id == LC82C168) {
 358                 if (startup && ! tp->medialock)
 359                         dev->if_port = tp->mii_cnt ? 11 : 0;
 360                 if (tulip_debug > 1)
 361                         printk(KERN_DEBUG "%s: PNIC PHY status is %3.3x, media %s.\n",
 362                                    dev->name, ioread32(ioaddr + 0xB8), medianame[dev->if_port]);
 363                 if (tp->mii_cnt) {
 364                         new_csr6 = 0x810C0000;
 365                         iowrite32(0x0001, ioaddr + CSR15);
 366                         iowrite32(0x0201B07A, ioaddr + 0xB8);
 367                 } else if (startup) {
 368                         /* Start with 10mbps to do autonegotiation. */
 369                         iowrite32(0x32, ioaddr + CSR12);
 370                         new_csr6 = 0x00420000;
 371                         iowrite32(0x0001B078, ioaddr + 0xB8);
 372                         iowrite32(0x0201B078, ioaddr + 0xB8);
 373                 } else if (dev->if_port == 3  ||  dev->if_port == 5) {
 374                         iowrite32(0x33, ioaddr + CSR12);
 375                         new_csr6 = 0x01860000;
 376                         /* Trigger autonegotiation. */
 377                         iowrite32(startup ? 0x0201F868 : 0x0001F868, ioaddr + 0xB8);
 378                 } else {
 379                         iowrite32(0x32, ioaddr + CSR12);
 380                         new_csr6 = 0x00420000;
 381                         iowrite32(0x1F078, ioaddr + 0xB8);
 382                 }
 383         } else {                                        /* Unknown chip type with no media table. */
 384                 if (tp->default_port == 0)
 385                         dev->if_port = tp->mii_cnt ? 11 : 3;
 386                 if (tulip_media_cap[dev->if_port] & MediaIsMII) {
 387                         new_csr6 = 0x020E0000;
 388                 } else if (tulip_media_cap[dev->if_port] & MediaIsFx) {
 389                         new_csr6 = 0x02860000;
 390                 } else
 391                         new_csr6 = 0x03860000;
 392                 if (tulip_debug > 1)
 393                         printk(KERN_DEBUG "%s: No media description table, assuming "
 394                                    "%s transceiver, CSR12 %2.2x.\n",
 395                                    dev->name, medianame[dev->if_port],
 396                                    ioread32(ioaddr + CSR12));
 397         }
 398
 399         tp->csr6 = new_csr6 | (tp->csr6 & 0xfdff) | (tp->full_duplex ? 0x0200 : 0);
 400
 401         mdelay(1);
 402
 403         return;
 404 }
 405
 406 /*
 407   Check the MII negotiated duplex and change the CSR6 setting if
 408   required.
 409   Return 0 if everything is OK.
 410   Return < 0 if the transceiver is missing or has no link beat.
 411   */
 412 int tulip_check_duplex(struct net_device *dev)
 413 {
 414         struct tulip_private *tp = netdev_priv(dev);
 415         unsigned int bmsr, lpa, negotiated, new_csr6;
 416
 417         bmsr = tulip_mdio_read(dev, tp->phys[0], MII_BMSR);
 418         lpa = tulip_mdio_read(dev, tp->phys[0], MII_LPA);
 419         if (tulip_debug > 1)
 420                 printk(KERN_INFO "%s: MII status %4.4x, Link partner report "
 421                            "%4.4x.\n", dev->name, bmsr, lpa);
 422         if (bmsr == 0xffff)
 423                 return -2;
 424         if ((bmsr & BMSR_LSTATUS) == 0) {
 425                 int new_bmsr = tulip_mdio_read(dev, tp->phys[0], MII_BMSR);
 426                 if ((new_bmsr & BMSR_LSTATUS) == 0) {
 427                         if (tulip_debug  > 1)
 428                                 printk(KERN_INFO "%s: No link beat on the MII interface,"
 429                                            " status %4.4x.\n", dev->name, new_bmsr);
 430                         return -1;
 431                 }
 432         }
 433         negotiated = lpa & tp->advertising[0];
 434         tp->full_duplex = mii_duplex(tp->full_duplex_lock, negotiated);
 435
 436         new_csr6 = tp->csr6;
 437
 438         if (negotiated & LPA_100) new_csr6 &= ~TxThreshold;
 439         else                      new_csr6 |= TxThreshold;
 440         if (tp->full_duplex) new_csr6 |= FullDuplex;
 441         else                 new_csr6 &= ~FullDuplex;
 442
 443         if (new_csr6 != tp->csr6) {
 444                 tp->csr6 = new_csr6;
 445                 tulip_restart_rxtx(tp);
 446
 447                 if (tulip_debug > 0)
 448                         printk(KERN_INFO "%s: Setting %s-duplex based on MII"
 449                                    "#%d link partner capability of %4.4x.\n",
 450                                    dev->name, tp->full_duplex ? "full" : "half",
 451                                    tp->phys[0], lpa);
 452                 return 1;
 453         }
 454
 455         return 0;
 456 }
 457
 458 void __devinit tulip_find_mii (struct net_device *dev, int board_idx)
 459 {
 460         struct tulip_private *tp = netdev_priv(dev);
 461         int phyn, phy_idx = 0;
 462         int mii_reg0;
 463         int mii_advert;
 464         unsigned int to_advert, new_bmcr, ane_switch;
 465
 466         /* Find the connected MII xcvrs.
 467            Doing this in open() would allow detecting external xcvrs later,
 468            but takes much time. */
 469         for (phyn = 1; phyn <= 32 && phy_idx < sizeof (tp->phys); phyn++) {
 470                 int phy = phyn & 0x1f;
 471                 int mii_status = tulip_mdio_read (dev, phy, MII_BMSR);
 472                 if ((mii_status & 0x8301) == 0x8001 ||
 473                     ((mii_status & BMSR_100BASE4) == 0
 474                      && (mii_status & 0x7800) != 0)) {
 475                         /* preserve Becker logic, gain indentation level */
 476                 } else {
 477                         continue;
 478                 }
 479
 480                 mii_reg0 = tulip_mdio_read (dev, phy, MII_BMCR);
 481                 mii_advert = tulip_mdio_read (dev, phy, MII_ADVERTISE);
 482                 ane_switch = 0;
 483
 484                 /* if not advertising at all, gen an
 485                  * advertising value from the capability
 486                  * bits in BMSR
 487                  */
 488                 if ((mii_advert & ADVERTISE_ALL) == 0) {
 489                         unsigned int tmpadv = tulip_mdio_read (dev, phy, MII_BMSR);
 490                         mii_advert = ((tmpadv >> 6) & 0x3e0) | 1;
 491                 }
 492
 493                 if (tp->mii_advertise) {
 494                         tp->advertising[phy_idx] =
 495                         to_advert = tp->mii_advertise;
 496                 } else if (tp->advertising[phy_idx]) {
 497                         to_advert = tp->advertising[phy_idx];
 498                 } else {
 499                         tp->advertising[phy_idx] =
 500                         tp->mii_advertise =
 501                         to_advert = mii_advert;
 502                 }
 503
 504                 tp->phys[phy_idx++] = phy;
 505
 506                 printk (KERN_INFO "tulip%d:  MII transceiver #%d "
 507                         "config %4.4x status %4.4x advertising %4.4x.\n",
 508                         board_idx, phy, mii_reg0, mii_status, mii_advert);
 509
 510                 /* Fixup for DLink with miswired PHY. */
 511                 if (mii_advert != to_advert) {
 512                         printk (KERN_DEBUG "tulip%d:  Advertising %4.4x on PHY %d,"
 513                                 " previously advertising %4.4x.\n",
 514                                 board_idx, to_advert, phy, mii_advert);
 515                         tulip_mdio_write (dev, phy, 4, to_advert);
 516                 }
 517
 518                 /* Enable autonegotiation: some boards default to off. */
 519                 if (tp->default_port == 0) {
 520                         new_bmcr = mii_reg0 | BMCR_ANENABLE;
 521                         if (new_bmcr != mii_reg0) {
 522                                 new_bmcr |= BMCR_ANRESTART;
 523                                 ane_switch = 1;
 524                         }
 525                 }
 526                 /* ...or disable nway, if forcing media */
 527                 else {
 528                         new_bmcr = mii_reg0 & ~BMCR_ANENABLE;
 529                         if (new_bmcr != mii_reg0)
 530                                 ane_switch = 1;
 531                 }
 532
 533                 /* clear out bits we never want at this point */
 534                 new_bmcr &= ~(BMCR_CTST | BMCR_FULLDPLX | BMCR_ISOLATE |
 535                               BMCR_PDOWN | BMCR_SPEED100 | BMCR_LOOPBACK |
 536                               BMCR_RESET);
 537
 538                 if (tp->full_duplex)
 539                         new_bmcr |= BMCR_FULLDPLX;
 540                 if (tulip_media_cap[tp->default_port] & MediaIs100)
 541                         new_bmcr |= BMCR_SPEED100;
 542
 543                 if (new_bmcr != mii_reg0) {
 544                         /* some phys need the ANE switch to
 545                          * happen before forced media settings
 546                          * will "take."  However, we write the
 547                          * same value twice in order not to
 548                          * confuse the sane phys.
 549                          */
 550                         if (ane_switch) {
 551                                 tulip_mdio_write (dev, phy, MII_BMCR, new_bmcr);
 552                                 udelay (10);
 553                         }
 554                         tulip_mdio_write (dev, phy, MII_BMCR, new_bmcr);
 555                 }
 556         }
 557         tp->mii_cnt = phy_idx;
 558         if (tp->mtable && tp->mtable->has_mii && phy_idx == 0) {
 559                 printk (KERN_INFO "tulip%d: ***WARNING***: No MII transceiver found!\n",
 560                         board_idx);
 561                 tp->phys[0] = 1;
 562         }
 563 }