drivers/net/sunhme.c

   1 /* $Id: sunhme.c,v 1.124 2002/01/15 06:25:51 davem Exp $
   2  * sunhme.c: Sparc HME/BigMac 10/100baseT half/full duplex auto switching,
   3  *           auto carrier detecting ethernet driver.  Also known as the
   4  *           "Happy Meal Ethernet" found on SunSwift SBUS cards.
   5  *
   6  * Copyright (C) 1996, 1998, 1999, 2002, 2003 David S. Miller (davem@redhat.com)
   7  *
   8  * Changes :
   9  * 2000/11/11 Willy Tarreau <willy AT meta-x.org>
  10  *   - port to non-sparc architectures. Tested only on x86 and
  11  *     only currently works with QFE PCI cards.
  12  *   - ability to specify the MAC address at module load time by passing this
  13  *     argument : macaddr=0x00,0x10,0x20,0x30,0x40,0x50
  14  */
  15
  16 #include <linux/config.h>
  17 #include <linux/module.h>
  18 #include <linux/kernel.h>
  19 #include <linux/types.h>
  20 #include <linux/fcntl.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/ioport.h>
  23 #include <linux/in.h>
  24 #include <linux/slab.h>
  25 #include <linux/string.h>
  26 #include <linux/delay.h>
  27 #include <linux/init.h>
  28 #include <linux/ethtool.h>
  29 #include <linux/mii.h>
  30 #include <linux/crc32.h>
  31 #include <linux/random.h>
  32 #include <linux/errno.h>
  33 #include <linux/netdevice.h>
  34 #include <linux/etherdevice.h>
  35 #include <linux/skbuff.h>
  36 #include <linux/bitops.h>
  37
  38 #include <asm/system.h>
  39 #include <asm/io.h>
  40 #include <asm/dma.h>
  41 #include <asm/byteorder.h>
  42
  43 #ifdef __sparc__
  44 #include <asm/idprom.h>
  45 #include <asm/sbus.h>
  46 #include <asm/openprom.h>
  47 #include <asm/oplib.h>
  48 #include <asm/auxio.h>
  49 #ifndef __sparc_v9__
  50 #include <asm/io-unit.h>
  51 #endif
  52 #endif
  53 #include <asm/uaccess.h>
  54
  55 #include <asm/pgtable.h>
  56 #include <asm/irq.h>
  57
  58 #ifdef CONFIG_PCI
  59 #include <linux/pci.h>
  60 #ifdef __sparc__
  61 #include <asm/pbm.h>
  62 #endif
  63 #endif
  64
  65 #include "sunhme.h"
  66
  67 #define DRV_NAME        "sunhme"
  68 #define DRV_VERSION     "2.02"
  69 #define DRV_RELDATE     "8/24/03"
  70 #define DRV_AUTHOR      "David S. Miller (davem@redhat.com)"
  71
  72 static char version[] =
  73         DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " " DRV_AUTHOR "\n";
  74
  75 MODULE_VERSION(DRV_VERSION);
  76 MODULE_AUTHOR(DRV_AUTHOR);
  77 MODULE_DESCRIPTION("Sun HappyMealEthernet(HME) 10/100baseT ethernet driver");
  78 MODULE_LICENSE("GPL");
  79
  80 static int macaddr[6];
  81
  82 /* accept MAC address of the form macaddr=0x08,0x00,0x20,0x30,0x40,0x50 */
  83 module_param_array(macaddr, int, NULL, 0);
  84 MODULE_PARM_DESC(macaddr, "Happy Meal MAC address to set");
  85
  86 static struct happy_meal *root_happy_dev;
  87
  88 #ifdef CONFIG_SBUS
  89 static struct quattro *qfe_sbus_list;
  90 #endif
  91
  92 #ifdef CONFIG_PCI
  93 static struct quattro *qfe_pci_list;
  94 #endif
  95
  96 #undef HMEDEBUG
  97 #undef SXDEBUG
  98 #undef RXDEBUG
  99 #undef TXDEBUG
 100 #undef TXLOGGING
 101
 102 #ifdef TXLOGGING
 103 struct hme_tx_logent {
 104         unsigned int tstamp;
 105         int tx_new, tx_old;
 106         unsigned int action;
 107 #define TXLOG_ACTION_IRQ        0x01
 108 #define TXLOG_ACTION_TXMIT      0x02
 109 #define TXLOG_ACTION_TBUSY      0x04
 110 #define TXLOG_ACTION_NBUFS      0x08
 111         unsigned int status;
 112 };
 113 #define TX_LOG_LEN      128
 114 static struct hme_tx_logent tx_log[TX_LOG_LEN];
 115 static int txlog_cur_entry;
 116 static __inline__ void tx_add_log(struct happy_meal *hp, unsigned int a, unsigned int s)
 117 {
 118         struct hme_tx_logent *tlp;
 119         unsigned long flags;
 120
 121         save_and_cli(flags);
 122         tlp = &tx_log[txlog_cur_entry];
 123         tlp->tstamp = (unsigned int)jiffies;
 124         tlp->tx_new = hp->tx_new;
 125         tlp->tx_old = hp->tx_old;
 126         tlp->action = a;
 127         tlp->status = s;
 128         txlog_cur_entry = (txlog_cur_entry + 1) & (TX_LOG_LEN - 1);
 129         restore_flags(flags);
 130 }
 131 static __inline__ void tx_dump_log(void)
 132 {
 133         int i, this;
 134
 135         this = txlog_cur_entry;
 136         for (i = 0; i < TX_LOG_LEN; i++) {
 137                 printk("TXLOG[%d]: j[%08x] tx[N(%d)O(%d)] action[%08x] stat[%08x]\n", i,
 138                        tx_log[this].tstamp,
 139                        tx_log[this].tx_new, tx_log[this].tx_old,
 140                        tx_log[this].action, tx_log[this].status);
 141                 this = (this + 1) & (TX_LOG_LEN - 1);
 142         }
 143 }
 144 static __inline__ void tx_dump_ring(struct happy_meal *hp)
 145 {
 146         struct hmeal_init_block *hb = hp->happy_block;
 147         struct happy_meal_txd *tp = &hb->happy_meal_txd[0];
 148         int i;
 149
 150         for (i = 0; i < TX_RING_SIZE; i+=4) {
 151                 printk("TXD[%d..%d]: [%08x:%08x] [%08x:%08x] [%08x:%08x] [%08x:%08x]\n",
 152                        i, i + 4,
 153                        le32_to_cpu(tp[i].tx_flags), le32_to_cpu(tp[i].tx_addr),
 154                        le32_to_cpu(tp[i + 1].tx_flags), le32_to_cpu(tp[i + 1].tx_addr),
 155                        le32_to_cpu(tp[i + 2].tx_flags), le32_to_cpu(tp[i + 2].tx_addr),
 156                        le32_to_cpu(tp[i + 3].tx_flags), le32_to_cpu(tp[i + 3].tx_addr));
 157         }
 158 }
 159 #else
 160 #define tx_add_log(hp, a, s)            do { } while(0)
 161 #define tx_dump_log()                   do { } while(0)
 162 #define tx_dump_ring(hp)                do { } while(0)
 163 #endif
 164
 165 #ifdef HMEDEBUG
 166 #define HMD(x)  printk x
 167 #else
 168 #define HMD(x)
 169 #endif
 170
 171 /* #define AUTO_SWITCH_DEBUG */
 172
 173 #ifdef AUTO_SWITCH_DEBUG
 174 #define ASD(x)  printk x
 175 #else
 176 #define ASD(x)
 177 #endif
 178
 179 #define DEFAULT_IPG0      16 /* For lance-mode only */
 180 #define DEFAULT_IPG1       8 /* For all modes */
 181 #define DEFAULT_IPG2       4 /* For all modes */
 182 #define DEFAULT_JAMSIZE    4 /* Toe jam */
 183
 184 #if defined(CONFIG_PCI) && defined(MODULE)
 185 /* This happy_pci_ids is declared __initdata because it is only used
 186    as an advisory to depmod.  If this is ported to the new PCI interface
 187    where it could be referenced at any time due to hot plugging,
 188    the __initdata reference should be removed. */
 189
 190 static struct pci_device_id happymeal_pci_ids[] = {
 191         {
 192           .vendor       = PCI_VENDOR_ID_SUN,
 193           .device       = PCI_DEVICE_ID_SUN_HAPPYMEAL,
 194           .subvendor    = PCI_ANY_ID,
 195           .subdevice    = PCI_ANY_ID,
 196         },
 197         { }                     /* Terminating entry */
 198 };
 199
 200 MODULE_DEVICE_TABLE(pci, happymeal_pci_ids);
 201
 202 #endif
 203
 204 /* NOTE: In the descriptor writes one _must_ write the address
 205  *       member _first_.  The card must not be allowed to see
 206  *       the updated descriptor flags until the address is
 207  *       correct.  I've added a write memory barrier between
 208  *       the two stores so that I can sleep well at night... -DaveM
 209  */
 210
 211 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
 212 static void sbus_hme_write32(void __iomem *reg, u32 val)
 213 {
 214         sbus_writel(val, reg);
 215 }
 216
 217 static u32 sbus_hme_read32(void __iomem *reg)
 218 {
 219         return sbus_readl(reg);
 220 }
 221
 222 static void sbus_hme_write_rxd(struct happy_meal_rxd *rxd, u32 flags, u32 addr)
 223 {
 224         rxd->rx_addr = addr;
 225         wmb();
 226         rxd->rx_flags = flags;
 227 }
 228
 229 static void sbus_hme_write_txd(struct happy_meal_txd *txd, u32 flags, u32 addr)
 230 {
 231         txd->tx_addr = addr;
 232         wmb();
 233         txd->tx_flags = flags;
 234 }
 235
 236 static u32 sbus_hme_read_desc32(u32 *p)
 237 {
 238         return *p;
 239 }
 240
 241 static void pci_hme_write32(void __iomem *reg, u32 val)
 242 {
 243         writel(val, reg);
 244 }
 245
 246 static u32 pci_hme_read32(void __iomem *reg)
 247 {
 248         return readl(reg);
 249 }
 250
 251 static void pci_hme_write_rxd(struct happy_meal_rxd *rxd, u32 flags, u32 addr)
 252 {
 253         rxd->rx_addr = cpu_to_le32(addr);
 254         wmb();
 255         rxd->rx_flags = cpu_to_le32(flags);
 256 }
 257
 258 static void pci_hme_write_txd(struct happy_meal_txd *txd, u32 flags, u32 addr)
 259 {
 260         txd->tx_addr = cpu_to_le32(addr);
 261         wmb();
 262         txd->tx_flags = cpu_to_le32(flags);
 263 }
 264
 265 static u32 pci_hme_read_desc32(u32 *p)
 266 {
 267         return cpu_to_le32p(p);
 268 }
 269
 270 #define hme_write32(__hp, __reg, __val) \
 271         ((__hp)->write32((__reg), (__val)))
 272 #define hme_read32(__hp, __reg) \
 273         ((__hp)->read32(__reg))
 274 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
 275         ((__hp)->write_rxd((__rxd), (__flags), (__addr)))
 276 #define hme_write_txd(__hp, __txd, __flags, __addr) \
 277         ((__hp)->write_txd((__txd), (__flags), (__addr)))
 278 #define hme_read_desc32(__hp, __p) \
 279         ((__hp)->read_desc32(__p))
 280 #define hme_dma_map(__hp, __ptr, __size, __dir) \
 281         ((__hp)->dma_map((__hp)->happy_dev, (__ptr), (__size), (__dir)))
 282 #define hme_dma_unmap(__hp, __addr, __size, __dir) \
 283         ((__hp)->dma_unmap((__hp)->happy_dev, (__addr), (__size), (__dir)))
 284 #define hme_dma_sync_for_cpu(__hp, __addr, __size, __dir) \
 285         ((__hp)->dma_sync_for_cpu((__hp)->happy_dev, (__addr), (__size), (__dir)))
 286 #define hme_dma_sync_for_device(__hp, __addr, __size, __dir) \
 287         ((__hp)->dma_sync_for_device((__hp)->happy_dev, (__addr), (__size), (__dir)))
 288 #else
 289 #ifdef CONFIG_SBUS
 290 /* SBUS only compilation */
 291 #define hme_write32(__hp, __reg, __val) \
 292         sbus_writel((__val), (__reg))
 293 #define hme_read32(__hp, __reg) \
 294         sbus_readl(__reg)
 295 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
 296 do {    (__rxd)->rx_addr = (__addr); \
 297         wmb(); \
 298         (__rxd)->rx_flags = (__flags); \
 299 } while(0)
 300 #define hme_write_txd(__hp, __txd, __flags, __addr) \
 301 do {    (__txd)->tx_addr = (__addr); \
 302         wmb(); \
 303         (__txd)->tx_flags = (__flags); \
 304 } while(0)
 305 #define hme_read_desc32(__hp, __p)      (*(__p))
 306 #define hme_dma_map(__hp, __ptr, __size, __dir) \
 307         sbus_map_single((__hp)->happy_dev, (__ptr), (__size), (__dir))
 308 #define hme_dma_unmap(__hp, __addr, __size, __dir) \
 309         sbus_unmap_single((__hp)->happy_dev, (__addr), (__size), (__dir))
 310 #define hme_dma_sync_for_cpu(__hp, __addr, __size, __dir) \
 311         sbus_dma_sync_single_for_cpu((__hp)->happy_dev, (__addr), (__size), (__dir))
 312 #define hme_dma_sync_for_device(__hp, __addr, __size, __dir) \
 313         sbus_dma_sync_single_for_device((__hp)->happy_dev, (__addr), (__size), (__dir))
 314 #else
 315 /* PCI only compilation */
 316 #define hme_write32(__hp, __reg, __val) \
 317         writel((__val), (__reg))
 318 #define hme_read32(__hp, __reg) \
 319         readl(__reg)
 320 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
 321 do {    (__rxd)->rx_addr = cpu_to_le32(__addr); \
 322         wmb(); \
 323         (__rxd)->rx_flags = cpu_to_le32(__flags); \
 324 } while(0)
 325 #define hme_write_txd(__hp, __txd, __flags, __addr) \
 326 do {    (__txd)->tx_addr = cpu_to_le32(__addr); \
 327         wmb(); \
 328         (__txd)->tx_flags = cpu_to_le32(__flags); \
 329 } while(0)
 330 #define hme_read_desc32(__hp, __p)      cpu_to_le32p(__p)
 331 #define hme_dma_map(__hp, __ptr, __size, __dir) \
 332         pci_map_single((__hp)->happy_dev, (__ptr), (__size), (__dir))
 333 #define hme_dma_unmap(__hp, __addr, __size, __dir) \
 334         pci_unmap_single((__hp)->happy_dev, (__addr), (__size), (__dir))
 335 #define hme_dma_sync_for_cpu(__hp, __addr, __size, __dir) \
 336         pci_dma_sync_single_for_cpu((__hp)->happy_dev, (__addr), (__size), (__dir))
 337 #define hme_dma_sync_for_device(__hp, __addr, __size, __dir) \
 338         pci_dma_sync_single_for_device((__hp)->happy_dev, (__addr), (__size), (__dir))
 339 #endif
 340 #endif
 341
 342
 343 #ifdef SBUS_DMA_BIDIRECTIONAL
 344 #       define DMA_BIDIRECTIONAL        SBUS_DMA_BIDIRECTIONAL
 345 #else
 346 #       define DMA_BIDIRECTIONAL        0
 347 #endif
 348
 349 #ifdef SBUS_DMA_FROMDEVICE
 350 #       define DMA_FROMDEVICE           SBUS_DMA_FROMDEVICE
 351 #else
 352 #       define DMA_TODEVICE             1
 353 #endif
 354
 355 #ifdef SBUS_DMA_TODEVICE
 356 #       define DMA_TODEVICE             SBUS_DMA_TODEVICE
 357 #else
 358 #       define DMA_FROMDEVICE           2
 359 #endif
 360
 361
 362 /* Oh yes, the MIF BitBang is mighty fun to program.  BitBucket is more like it. */
 363 static void BB_PUT_BIT(struct happy_meal *hp, void __iomem *tregs, int bit)
 364 {
 365         hme_write32(hp, tregs + TCVR_BBDATA, bit);
 366         hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
 367         hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
 368 }
 369
 370 #if 0
 371 static u32 BB_GET_BIT(struct happy_meal *hp, void __iomem *tregs, int internal)
 372 {
 373         u32 ret;
 374
 375         hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
 376         hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
 377         ret = hme_read32(hp, tregs + TCVR_CFG);
 378         if (internal)
 379                 ret &= TCV_CFG_MDIO0;
 380         else
 381                 ret &= TCV_CFG_MDIO1;
 382
 383         return ret;
 384 }
 385 #endif
 386
 387 static u32 BB_GET_BIT2(struct happy_meal *hp, void __iomem *tregs, int internal)
 388 {
 389         u32 retval;
 390
 391         hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
 392         udelay(1);
 393         retval = hme_read32(hp, tregs + TCVR_CFG);
 394         if (internal)
 395                 retval &= TCV_CFG_MDIO0;
 396         else
 397                 retval &= TCV_CFG_MDIO1;
 398         hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
 399
 400         return retval;
 401 }
 402
 403 #define TCVR_FAILURE      0x80000000     /* Impossible MIF read value */
 404
 405 static int happy_meal_bb_read(struct happy_meal *hp,
 406                               void __iomem *tregs, int reg)
 407 {
 408         u32 tmp;
 409         int retval = 0;
 410         int i;
 411
 412         ASD(("happy_meal_bb_read: reg=%d ", reg));
 413
 414         /* Enable the MIF BitBang outputs. */
 415         hme_write32(hp, tregs + TCVR_BBOENAB, 1);
 416
 417         /* Force BitBang into the idle state. */
 418         for (i = 0; i < 32; i++)
 419                 BB_PUT_BIT(hp, tregs, 1);
 420
 421         /* Give it the read sequence. */
 422         BB_PUT_BIT(hp, tregs, 0);
 423         BB_PUT_BIT(hp, tregs, 1);
 424         BB_PUT_BIT(hp, tregs, 1);
 425         BB_PUT_BIT(hp, tregs, 0);
 426
 427         /* Give it the PHY address. */
 428         tmp = hp->paddr & 0xff;
 429         for (i = 4; i >= 0; i--)
 430                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
 431
 432         /* Tell it what register we want to read. */
 433         tmp = (reg & 0xff);
 434         for (i = 4; i >= 0; i--)
 435                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
 436
 437         /* Close down the MIF BitBang outputs. */
 438         hme_write32(hp, tregs + TCVR_BBOENAB, 0);
 439
 440         /* Now read in the value. */
 441         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
 442         for (i = 15; i >= 0; i--)
 443                 retval |= BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
 444         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
 445         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
 446         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
 447         ASD(("value=%x\n", retval));
 448         return retval;
 449 }
 450
 451 static void happy_meal_bb_write(struct happy_meal *hp,
 452                                 void __iomem *tregs, int reg,
 453                                 unsigned short value)
 454 {
 455         u32 tmp;
 456         int i;
 457
 458         ASD(("happy_meal_bb_write: reg=%d value=%x\n", reg, value));
 459
 460         /* Enable the MIF BitBang outputs. */
 461         hme_write32(hp, tregs + TCVR_BBOENAB, 1);
 462
 463         /* Force BitBang into the idle state. */
 464         for (i = 0; i < 32; i++)
 465                 BB_PUT_BIT(hp, tregs, 1);
 466
 467         /* Give it write sequence. */
 468         BB_PUT_BIT(hp, tregs, 0);
 469         BB_PUT_BIT(hp, tregs, 1);
 470         BB_PUT_BIT(hp, tregs, 0);
 471         BB_PUT_BIT(hp, tregs, 1);
 472
 473         /* Give it the PHY address. */
 474         tmp = (hp->paddr & 0xff);
 475         for (i = 4; i >= 0; i--)
 476                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
 477
 478         /* Tell it what register we will be writing. */
 479         tmp = (reg & 0xff);
 480         for (i = 4; i >= 0; i--)
 481                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
 482
 483         /* Tell it to become ready for the bits. */
 484         BB_PUT_BIT(hp, tregs, 1);
 485         BB_PUT_BIT(hp, tregs, 0);
 486
 487         for (i = 15; i >= 0; i--)
 488                 BB_PUT_BIT(hp, tregs, ((value >> i) & 1));
 489
 490         /* Close down the MIF BitBang outputs. */
 491         hme_write32(hp, tregs + TCVR_BBOENAB, 0);
 492 }
 493
 494 #define TCVR_READ_TRIES   16
 495
 496 static int happy_meal_tcvr_read(struct happy_meal *hp,
 497                                 void __iomem *tregs, int reg)
 498 {
 499         int tries = TCVR_READ_TRIES;
 500         int retval;
 501
 502         ASD(("happy_meal_tcvr_read: reg=0x%02x ", reg));
 503         if (hp->tcvr_type == none) {
 504                 ASD(("no transceiver, value=TCVR_FAILURE\n"));
 505                 return TCVR_FAILURE;
 506         }
 507
 508         if (!(hp->happy_flags & HFLAG_FENABLE)) {
 509                 ASD(("doing bit bang\n"));
 510                 return happy_meal_bb_read(hp, tregs, reg);
 511         }
 512
 513         hme_write32(hp, tregs + TCVR_FRAME,
 514                     (FRAME_READ | (hp->paddr << 23) | ((reg & 0xff) << 18)));
 515         while (!(hme_read32(hp, tregs + TCVR_FRAME) & 0x10000) && --tries)
 516                 udelay(20);
 517         if (!tries) {
 518                 printk(KERN_ERR "happy meal: Aieee, transceiver MIF read bolixed\n");
 519                 return TCVR_FAILURE;
 520         }
 521         retval = hme_read32(hp, tregs + TCVR_FRAME) & 0xffff;
 522         ASD(("value=%04x\n", retval));
 523         return retval;
 524 }
 525
 526 #define TCVR_WRITE_TRIES  16
 527
 528 static void happy_meal_tcvr_write(struct happy_meal *hp,
 529                                   void __iomem *tregs, int reg,
 530                                   unsigned short value)
 531 {
 532         int tries = TCVR_WRITE_TRIES;
 533
 534         ASD(("happy_meal_tcvr_write: reg=0x%02x value=%04x\n", reg, value));
 535
 536         /* Welcome to Sun Microsystems, can I take your order please? */
 537         if (!(hp->happy_flags & HFLAG_FENABLE)) {
 538                 happy_meal_bb_write(hp, tregs, reg, value);
 539                 return;
 540         }
 541
 542         /* Would you like fries with that? */
 543         hme_write32(hp, tregs + TCVR_FRAME,
 544                     (FRAME_WRITE | (hp->paddr << 23) |
 545                      ((reg & 0xff) << 18) | (value & 0xffff)));
 546         while (!(hme_read32(hp, tregs + TCVR_FRAME) & 0x10000) && --tries)
 547                 udelay(20);
 548
 549         /* Anything else? */
 550         if (!tries)
 551                 printk(KERN_ERR "happy meal: Aieee, transceiver MIF write bolixed\n");
 552
 553         /* Fifty-two cents is your change, have a nice day. */
 554 }
 555
 556 /* Auto negotiation.  The scheme is very simple.  We have a timer routine
 557  * that keeps watching the auto negotiation process as it progresses.
 558  * The DP83840 is first told to start doing it's thing, we set up the time
 559  * and place the timer state machine in it's initial state.
 560  *
 561  * Here the timer peeks at the DP83840 status registers at each click to see
 562  * if the auto negotiation has completed, we assume here that the DP83840 PHY
 563  * will time out at some point and just tell us what (didn't) happen.  For
 564  * complete coverage we only allow so many of the ticks at this level to run,
 565  * when this has expired we print a warning message and try another strategy.
 566  * This "other" strategy is to force the interface into various speed/duplex
 567  * configurations and we stop when we see a link-up condition before the
 568  * maximum number of "peek" ticks have occurred.
 569  *
 570  * Once a valid link status has been detected we configure the BigMAC and
 571  * the rest of the Happy Meal to speak the most efficient protocol we could
 572  * get a clean link for.  The priority for link configurations, highest first
 573  * is:
 574  *                 100 Base-T Full Duplex
 575  *                 100 Base-T Half Duplex
 576  *                 10 Base-T Full Duplex
 577  *                 10 Base-T Half Duplex
 578  *
 579  * We start a new timer now, after a successful auto negotiation status has
 580  * been detected.  This timer just waits for the link-up bit to get set in
 581  * the BMCR of the DP83840.  When this occurs we print a kernel log message
 582  * describing the link type in use and the fact that it is up.
 583  *
 584  * If a fatal error of some sort is signalled and detected in the interrupt
 585  * service routine, and the chip is reset, or the link is ifconfig'd down
 586  * and then back up, this entire process repeats itself all over again.
 587  */
 588 static int try_next_permutation(struct happy_meal *hp, void __iomem *tregs)
 589 {
 590         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
 591
 592         /* Downgrade from full to half duplex.  Only possible
 593          * via ethtool.
 594          */
 595         if (hp->sw_bmcr & BMCR_FULLDPLX) {
 596                 hp->sw_bmcr &= ~(BMCR_FULLDPLX);
 597                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
 598                 return 0;
 599         }
 600
 601         /* Downgrade from 100 to 10. */
 602         if (hp->sw_bmcr & BMCR_SPEED100) {
 603                 hp->sw_bmcr &= ~(BMCR_SPEED100);
 604                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
 605                 return 0;
 606         }
 607
 608         /* We've tried everything. */
 609         return -1;
 610 }
 611
 612 static void display_link_mode(struct happy_meal *hp, void __iomem *tregs)
 613 {
 614         printk(KERN_INFO "%s: Link is up using ", hp->dev->name);
 615         if (hp->tcvr_type == external)
 616                 printk("external ");
 617         else
 618                 printk("internal ");
 619         printk("transceiver at ");
 620         hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
 621         if (hp->sw_lpa & (LPA_100HALF | LPA_100FULL)) {
 622                 if (hp->sw_lpa & LPA_100FULL)
 623                         printk("100Mb/s, Full Duplex.\n");
 624                 else
 625                         printk("100Mb/s, Half Duplex.\n");
 626         } else {
 627                 if (hp->sw_lpa & LPA_10FULL)
 628                         printk("10Mb/s, Full Duplex.\n");
 629                 else
 630                         printk("10Mb/s, Half Duplex.\n");
 631         }
 632 }
 633
 634 static void display_forced_link_mode(struct happy_meal *hp, void __iomem *tregs)
 635 {
 636         printk(KERN_INFO "%s: Link has been forced up using ", hp->dev->name);
 637         if (hp->tcvr_type == external)
 638                 printk("external ");
 639         else
 640                 printk("internal ");
 641         printk("transceiver at ");
 642         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
 643         if (hp->sw_bmcr & BMCR_SPEED100)
 644                 printk("100Mb/s, ");
 645         else
 646                 printk("10Mb/s, ");
 647         if (hp->sw_bmcr & BMCR_FULLDPLX)
 648                 printk("Full Duplex.\n");
 649         else
 650                 printk("Half Duplex.\n");
 651 }
 652
 653 static int set_happy_link_modes(struct happy_meal *hp, void __iomem *tregs)
 654 {
 655         int full;
 656
 657         /* All we care about is making sure the bigmac tx_cfg has a
 658          * proper duplex setting.
 659          */
 660         if (hp->timer_state == arbwait) {
 661                 hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
 662                 if (!(hp->sw_lpa & (LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL)))
 663                         goto no_response;
 664                 if (hp->sw_lpa & LPA_100FULL)
 665                         full = 1;
 666                 else if (hp->sw_lpa & LPA_100HALF)
 667                         full = 0;
 668                 else if (hp->sw_lpa & LPA_10FULL)
 669                         full = 1;
 670                 else
 671                         full = 0;
 672         } else {
 673                 /* Forcing a link mode. */
 674                 hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
 675                 if (hp->sw_bmcr & BMCR_FULLDPLX)
 676                         full = 1;
 677                 else
 678                         full = 0;
 679         }
 680
 681         /* Before changing other bits in the tx_cfg register, and in
 682          * general any of other the TX config registers too, you
 683          * must:
 684          * 1) Clear Enable
 685          * 2) Poll with reads until that bit reads back as zero
 686          * 3) Make TX configuration changes
 687          * 4) Set Enable once more
 688          */
 689         hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
 690                     hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) &
 691                     ~(BIGMAC_TXCFG_ENABLE));
 692         while (hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) & BIGMAC_TXCFG_ENABLE)
 693                 barrier();
 694         if (full) {
 695                 hp->happy_flags |= HFLAG_FULL;
 696                 hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
 697                             hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) |
 698                             BIGMAC_TXCFG_FULLDPLX);
 699         } else {
 700                 hp->happy_flags &= ~(HFLAG_FULL);
 701                 hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
 702                             hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) &
 703                             ~(BIGMAC_TXCFG_FULLDPLX));
 704         }
 705         hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
 706                     hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) |
 707                     BIGMAC_TXCFG_ENABLE);
 708         return 0;
 709 no_response:
 710         return 1;
 711 }
 712
 713 static int happy_meal_init(struct happy_meal *hp);
 714
 715 static int is_lucent_phy(struct happy_meal *hp)
 716 {
 717         void __iomem *tregs = hp->tcvregs;
 718         unsigned short mr2, mr3;
 719         int ret = 0;
 720
 721         mr2 = happy_meal_tcvr_read(hp, tregs, 2);
 722         mr3 = happy_meal_tcvr_read(hp, tregs, 3);
 723         if ((mr2 & 0xffff) == 0x0180 &&
 724             ((mr3 & 0xffff) >> 10) == 0x1d)
 725                 ret = 1;
 726
 727         return ret;
 728 }
 729
 730 static void happy_meal_timer(unsigned long data)
 731 {
 732         struct happy_meal *hp = (struct happy_meal *) data;
 733         void __iomem *tregs = hp->tcvregs;
 734         int restart_timer = 0;
 735
 736         spin_lock_irq(&hp->happy_lock);
 737
 738         hp->timer_ticks++;
 739         switch(hp->timer_state) {
 740         case arbwait:
 741                 /* Only allow for 5 ticks, thats 10 seconds and much too
 742                  * long to wait for arbitration to complete.
 743                  */
 744                 if (hp->timer_ticks >= 10) {
 745                         /* Enter force mode. */
 746         do_force_mode:
 747                         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
 748                         printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful, trying force link mode\n",
 749                                hp->dev->name);
 750                         hp->sw_bmcr = BMCR_SPEED100;
 751                         happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
 752
 753                         if (!is_lucent_phy(hp)) {
 754                                 /* OK, seems we need do disable the transceiver for the first
 755                                  * tick to make sure we get an accurate link state at the
 756                                  * second tick.
 757                                  */
 758                                 hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs, DP83840_CSCONFIG);
 759                                 hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
 760                                 happy_meal_tcvr_write(hp, tregs, DP83840_CSCONFIG, hp->sw_csconfig);
 761                         }
 762                         hp->timer_state = ltrywait;
 763                         hp->timer_ticks = 0;
 764                         restart_timer = 1;
 765                 } else {
 766                         /* Anything interesting happen? */
 767                         hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
 768                         if (hp->sw_bmsr & BMSR_ANEGCOMPLETE) {
 769                                 int ret;
 770
 771                                 /* Just what we've been waiting for... */
 772                                 ret = set_happy_link_modes(hp, tregs);
 773                                 if (ret) {
 774                                         /* Ooops, something bad happened, go to force
 775                                          * mode.
 776                                          *
 777                                          * XXX Broken hubs which don't support 802.3u
 778                                          * XXX auto-negotiation make this happen as well.
 779                                          */
 780                                         goto do_force_mode;
 781                                 }
 782
 783                                 /* Success, at least so far, advance our state engine. */
 784                                 hp->timer_state = lupwait;
 785                                 restart_timer = 1;
 786                         } else {
 787                                 restart_timer = 1;
 788                         }
 789                 }
 790                 break;
 791
 792         case lupwait:
 793                 /* Auto negotiation was successful and we are awaiting a
 794                  * link up status.  I have decided to let this timer run
 795                  * forever until some sort of error is signalled, reporting
 796                  * a message to the user at 10 second intervals.
 797                  */
 798                 hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
 799                 if (hp->sw_bmsr & BMSR_LSTATUS) {
 800                         /* Wheee, it's up, display the link mode in use and put
 801                          * the timer to sleep.
 802                          */
 803                         display_link_mode(hp, tregs);
 804                         hp->timer_state = asleep;
 805                         restart_timer = 0;
 806                 } else {
 807                         if (hp->timer_ticks >= 10) {
 808                                 printk(KERN_NOTICE "%s: Auto negotiation successful, link still "
 809                                        "not completely up.\n", hp->dev->name);
 810                                 hp->timer_ticks = 0;
 811                                 restart_timer = 1;
 812                         } else {
 813                                 restart_timer = 1;
 814                         }
 815                 }
 816                 break;
 817
 818         case ltrywait:
 819                 /* Making the timeout here too long can make it take
 820                  * annoyingly long to attempt all of the link mode
 821                  * permutations, but then again this is essentially
 822                  * error recovery code for the most part.
 823                  */
 824                 hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
 825                 hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs, DP83840_CSCONFIG);
 826                 if (hp->timer_ticks == 1) {
 827                         if (!is_lucent_phy(hp)) {
 828                                 /* Re-enable transceiver, we'll re-enable the transceiver next
 829                                  * tick, then check link state on the following tick.
 830                                  */
 831                                 hp->sw_csconfig |= CSCONFIG_TCVDISAB;
 832                                 happy_meal_tcvr_write(hp, tregs,
 833                                                       DP83840_CSCONFIG, hp->sw_csconfig);
 834                         }
 835                         restart_timer = 1;
 836                         break;
 837                 }
 838                 if (hp->timer_ticks == 2) {
 839                         if (!is_lucent_phy(hp)) {
 840                                 hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
 841                                 happy_meal_tcvr_write(hp, tregs,
 842                                                       DP83840_CSCONFIG, hp->sw_csconfig);
 843                         }
 844                         restart_timer = 1;
 845                         break;
 846                 }
 847                 if (hp->sw_bmsr & BMSR_LSTATUS) {
 848                         /* Force mode selection success. */
 849                         display_forced_link_mode(hp, tregs);
 850                         set_happy_link_modes(hp, tregs); /* XXX error? then what? */
 851                         hp->timer_state = asleep;
 852                         restart_timer = 0;
 853                 } else {
 854                         if (hp->timer_ticks >= 4) { /* 6 seconds or so... */
 855                                 int ret;
 856
 857                                 ret = try_next_permutation(hp, tregs);
 858                                 if (ret == -1) {
 859                                         /* Aieee, tried them all, reset the
 860                                          * chip and try all over again.
 861                                          */
 862
 863                                         /* Let the user know... */
 864                                         printk(KERN_NOTICE "%s: Link down, cable problem?\n",
 865                                                hp->dev->name);
 866
 867                                         ret = happy_meal_init(hp);
 868                                         if (ret) {
 869                                                 /* ho hum... */
 870                                                 printk(KERN_ERR "%s: Error, cannot re-init the "
 871                                                        "Happy Meal.\n", hp->dev->name);
 872                                         }
 873                                         goto out;
 874                                 }
 875                                 if (!is_lucent_phy(hp)) {
 876                                         hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs,
 877                                                                                DP83840_CSCONFIG);
 878                                         hp->sw_csconfig |= CSCONFIG_TCVDISAB;
 879                                         happy_meal_tcvr_write(hp, tregs,
 880                                                               DP83840_CSCONFIG, hp->sw_csconfig);
 881                                 }
 882                                 hp->timer_ticks = 0;
 883                                 restart_timer = 1;
 884                         } else {
 885                                 restart_timer = 1;
 886                         }
 887                 }
 888                 break;
 889
 890         case asleep:
 891         default:
 892                 /* Can't happens.... */
 893                 printk(KERN_ERR "%s: Aieee, link timer is asleep but we got one anyways!\n",
 894                        hp->dev->name);
 895                 restart_timer = 0;
 896                 hp->timer_ticks = 0;
 897                 hp->timer_state = asleep; /* foo on you */
 898                 break;
 899         };
 900
 901         if (restart_timer) {
 902                 hp->happy_timer.expires = jiffies + ((12 * HZ)/10); /* 1.2 sec. */
 903                 add_timer(&hp->happy_timer);
 904         }
 905
 906 out:
 907         spin_unlock_irq(&hp->happy_lock);
 908 }
 909
 910 #define TX_RESET_TRIES     32
 911 #define RX_RESET_TRIES     32
 912
 913 /* hp->happy_lock must be held */
 914 static void happy_meal_tx_reset(struct happy_meal *hp, void __iomem *bregs)
 915 {
 916         int tries = TX_RESET_TRIES;
 917
 918         HMD(("happy_meal_tx_reset: reset, "));
 919
 920         /* Would you like to try our SMCC Delux? */
 921         hme_write32(hp, bregs + BMAC_TXSWRESET, 0);
 922         while ((hme_read32(hp, bregs + BMAC_TXSWRESET) & 1) && --tries)
 923                 udelay(20);
 924
 925         /* Lettuce, tomato, buggy hardware (no extra charge)? */
 926         if (!tries)
 927                 printk(KERN_ERR "happy meal: Transceiver BigMac ATTACK!");
 928
 929         /* Take care. */
 930         HMD(("done\n"));
 931 }
 932
 933 /* hp->happy_lock must be held */
 934 static void happy_meal_rx_reset(struct happy_meal *hp, void __iomem *bregs)
 935 {
 936         int tries = RX_RESET_TRIES;
 937
 938         HMD(("happy_meal_rx_reset: reset, "));
 939
 940         /* We have a special on GNU/Viking hardware bugs today. */
 941         hme_write32(hp, bregs + BMAC_RXSWRESET, 0);
 942         while ((hme_read32(hp, bregs + BMAC_RXSWRESET) & 1) && --tries)
 943                 udelay(20);
 944
 945         /* Will that be all? */
 946         if (!tries)
 947                 printk(KERN_ERR "happy meal: Receiver BigMac ATTACK!");
 948
 949         /* Don't forget your vik_1137125_wa.  Have a nice day. */
 950         HMD(("done\n"));
 951 }
 952
 953 #define STOP_TRIES         16
 954
 955 /* hp->happy_lock must be held */
 956 static void happy_meal_stop(struct happy_meal *hp, void __iomem *gregs)
 957 {
 958         int tries = STOP_TRIES;
 959
 960         HMD(("happy_meal_stop: reset, "));
 961
 962         /* We're consolidating our STB products, it's your lucky day. */
 963         hme_write32(hp, gregs + GREG_SWRESET, GREG_RESET_ALL);
 964         while (hme_read32(hp, gregs + GREG_SWRESET) && --tries)
 965                 udelay(20);
 966
 967         /* Come back next week when we are "Sun Microelectronics". */
 968         if (!tries)
 969                 printk(KERN_ERR "happy meal: Fry guys.");
 970
 971         /* Remember: "Different name, same old buggy as shit hardware." */
 972         HMD(("done\n"));
 973 }
 974
 975 /* hp->happy_lock must be held */
 976 static void happy_meal_get_counters(struct happy_meal *hp, void __iomem *bregs)
 977 {
 978         struct net_device_stats *stats = &hp->net_stats;
 979
 980         stats->rx_crc_errors += hme_read32(hp, bregs + BMAC_RCRCECTR);
 981         hme_write32(hp, bregs + BMAC_RCRCECTR, 0);
 982
 983         stats->rx_frame_errors += hme_read32(hp, bregs + BMAC_UNALECTR);
 984         hme_write32(hp, bregs + BMAC_UNALECTR, 0);
 985
 986         stats->rx_length_errors += hme_read32(hp, bregs + BMAC_GLECTR);
 987         hme_write32(hp, bregs + BMAC_GLECTR, 0);
 988
 989         stats->tx_aborted_errors += hme_read32(hp, bregs + BMAC_EXCTR);
 990
 991         stats->collisions +=
 992                 (hme_read32(hp, bregs + BMAC_EXCTR) +
 993                  hme_read32(hp, bregs + BMAC_LTCTR));
 994         hme_write32(hp, bregs + BMAC_EXCTR, 0);
 995         hme_write32(hp, bregs + BMAC_LTCTR, 0);
 996 }
 997
 998 /* hp->happy_lock must be held */
 999 static void happy_meal_poll_stop(struct happy_meal *hp, void __iomem *tregs)
1000 {
1001         ASD(("happy_meal_poll_stop: "));
1002
1003         /* If polling disabled or not polling already, nothing to do. */
1004         if ((hp->happy_flags & (HFLAG_POLLENABLE | HFLAG_POLL)) !=
1005            (HFLAG_POLLENABLE | HFLAG_POLL)) {
1006                 HMD(("not polling, return\n"));
1007                 return;
1008         }
1009
1010         /* Shut up the MIF. */
1011         ASD(("were polling, mif ints off, "));
1012         hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
1013
1014         /* Turn off polling. */
1015         ASD(("polling off, "));
1016         hme_write32(hp, tregs + TCVR_CFG,
1017                     hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_PENABLE));
1018
1019         /* We are no longer polling. */
1020         hp->happy_flags &= ~(HFLAG_POLL);
1021
1022         /* Let the bits set. */
1023         udelay(200);
1024         ASD(("done\n"));
1025 }
1026
1027 /* Only Sun can take such nice parts and fuck up the programming interface
1028  * like this.  Good job guys...
1029  */
1030 #define TCVR_RESET_TRIES       16 /* It should reset quickly        */
1031 #define TCVR_UNISOLATE_TRIES   32 /* Dis-isolation can take longer. */
1032
1033 /* hp->happy_lock must be held */
1034 static int happy_meal_tcvr_reset(struct happy_meal *hp, void __iomem *tregs)
1035 {
1036         u32 tconfig;
1037         int result, tries = TCVR_RESET_TRIES;
1038
1039         tconfig = hme_read32(hp, tregs + TCVR_CFG);
1040         ASD(("happy_meal_tcvr_reset: tcfg<%08lx> ", tconfig));
1041         if (hp->tcvr_type == external) {
1042                 ASD(("external<"));
1043                 hme_write32(hp, tregs + TCVR_CFG, tconfig & ~(TCV_CFG_PSELECT));
1044                 hp->tcvr_type = internal;
1045                 hp->paddr = TCV_PADDR_ITX;
1046                 ASD(("ISOLATE,"));
1047                 happy_meal_tcvr_write(hp, tregs, MII_BMCR,
1048                                       (BMCR_LOOPBACK|BMCR_PDOWN|BMCR_ISOLATE));
1049                 result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1050                 if (result == TCVR_FAILURE) {
1051                         ASD(("phyread_fail>\n"));
1052                         return -1;
1053                 }
1054                 ASD(("phyread_ok,PSELECT>"));
1055                 hme_write32(hp, tregs + TCVR_CFG, tconfig | TCV_CFG_PSELECT);
1056                 hp->tcvr_type = external;
1057                 hp->paddr = TCV_PADDR_ETX;
1058         } else {
1059                 if (tconfig & TCV_CFG_MDIO1) {
1060                         ASD(("internal<PSELECT,"));
1061                         hme_write32(hp, tregs + TCVR_CFG, (tconfig | TCV_CFG_PSELECT));
1062                         ASD(("ISOLATE,"));
1063                         happy_meal_tcvr_write(hp, tregs, MII_BMCR,
1064                                               (BMCR_LOOPBACK|BMCR_PDOWN|BMCR_ISOLATE));
1065                         result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1066                         if (result == TCVR_FAILURE) {
1067                                 ASD(("phyread_fail>\n"));
1068                                 return -1;
1069                         }
1070                         ASD(("phyread_ok,~PSELECT>"));
1071                         hme_write32(hp, tregs + TCVR_CFG, (tconfig & ~(TCV_CFG_PSELECT)));
1072                         hp->tcvr_type = internal;
1073                         hp->paddr = TCV_PADDR_ITX;
1074                 }
1075         }
1076
1077         ASD(("BMCR_RESET "));
1078         happy_meal_tcvr_write(hp, tregs, MII_BMCR, BMCR_RESET);
1079
1080         while (--tries) {
1081                 result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1082                 if (result == TCVR_FAILURE)
1083                         return -1;
1084                 hp->sw_bmcr = result;
1085                 if (!(result & BMCR_RESET))
1086                         break;
1087                 udelay(20);
1088         }
1089         if (!tries) {
1090                 ASD(("BMCR RESET FAILED!\n"));
1091                 return -1;
1092         }
1093         ASD(("RESET_OK\n"));
1094
1095         /* Get fresh copies of the PHY registers. */
1096         hp->sw_bmsr      = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1097         hp->sw_physid1   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID1);
1098         hp->sw_physid2   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID2);
1099         hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1100
1101         ASD(("UNISOLATE"));
1102         hp->sw_bmcr &= ~(BMCR_ISOLATE);
1103         happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1104
1105         tries = TCVR_UNISOLATE_TRIES;
1106         while (--tries) {
1107                 result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1108                 if (result == TCVR_FAILURE)
1109                         return -1;
1110                 if (!(result & BMCR_ISOLATE))
1111                         break;
1112                 udelay(20);
1113         }
1114         if (!tries) {
1115                 ASD((" FAILED!\n"));
1116                 return -1;
1117         }
1118         ASD((" SUCCESS and CSCONFIG_DFBYPASS\n"));
1119         if (!is_lucent_phy(hp)) {
1120                 result = happy_meal_tcvr_read(hp, tregs,
1121                                               DP83840_CSCONFIG);
1122                 happy_meal_tcvr_write(hp, tregs,
1123                                       DP83840_CSCONFIG, (result | CSCONFIG_DFBYPASS));
1124         }
1125         return 0;
1126 }
1127
1128 /* Figure out whether we have an internal or external transceiver.
1129  *
1130  * hp->happy_lock must be held
1131  */
1132 static void happy_meal_transceiver_check(struct happy_meal *hp, void __iomem *tregs)
1133 {
1134         unsigned long tconfig = hme_read32(hp, tregs + TCVR_CFG);
1135
1136         ASD(("happy_meal_transceiver_check: tcfg=%08lx ", tconfig));
1137         if (hp->happy_flags & HFLAG_POLL) {
1138                 /* If we are polling, we must stop to get the transceiver type. */
1139                 ASD(("<polling> "));
1140                 if (hp->tcvr_type == internal) {
1141                         if (tconfig & TCV_CFG_MDIO1) {
1142                                 ASD(("<internal> <poll stop> "));
1143                                 happy_meal_poll_stop(hp, tregs);
1144                                 hp->paddr = TCV_PADDR_ETX;
1145                                 hp->tcvr_type = external;
1146                                 ASD(("<external>\n"));
1147                                 tconfig &= ~(TCV_CFG_PENABLE);
1148                                 tconfig |= TCV_CFG_PSELECT;
1149                                 hme_write32(hp, tregs + TCVR_CFG, tconfig);
1150                         }
1151                 } else {
1152                         if (hp->tcvr_type == external) {
1153                                 ASD(("<external> "));
1154                                 if (!(hme_read32(hp, tregs + TCVR_STATUS) >> 16)) {
1155                                         ASD(("<poll stop> "));
1156                                         happy_meal_poll_stop(hp, tregs);
1157                                         hp->paddr = TCV_PADDR_ITX;
1158                                         hp->tcvr_type = internal;
1159                                         ASD(("<internal>\n"));
1160                                         hme_write32(hp, tregs + TCVR_CFG,
1161                                                     hme_read32(hp, tregs + TCVR_CFG) &
1162                                                     ~(TCV_CFG_PSELECT));
1163                                 }
1164                                 ASD(("\n"));
1165                         } else {
1166                                 ASD(("<none>\n"));
1167                         }
1168                 }
1169         } else {
1170                 u32 reread = hme_read32(hp, tregs + TCVR_CFG);
1171
1172                 /* Else we can just work off of the MDIO bits. */
1173                 ASD(("<not polling> "));
1174                 if (reread & TCV_CFG_MDIO1) {
1175                         hme_write32(hp, tregs + TCVR_CFG, tconfig | TCV_CFG_PSELECT);
1176                         hp->paddr = TCV_PADDR_ETX;
1177                         hp->tcvr_type = external;
1178                         ASD(("<external>\n"));
1179                 } else {
1180                         if (reread & TCV_CFG_MDIO0) {
1181                                 hme_write32(hp, tregs + TCVR_CFG,
1182                                             tconfig & ~(TCV_CFG_PSELECT));
1183                                 hp->paddr = TCV_PADDR_ITX;
1184                                 hp->tcvr_type = internal;
1185                                 ASD(("<internal>\n"));
1186                         } else {
1187                                 printk(KERN_ERR "happy meal: Transceiver and a coke please.");
1188                                 hp->tcvr_type = none; /* Grrr... */
1189                                 ASD(("<none>\n"));
1190                         }
1191                 }
1192         }
1193 }
1194
1195 /* The receive ring buffers are a bit tricky to get right.  Here goes...
1196  *
1197  * The buffers we dma into must be 64 byte aligned.  So we use a special
1198  * alloc_skb() routine for the happy meal to allocate 64 bytes more than
1199  * we really need.
1200  *
1201  * We use skb_reserve() to align the data block we get in the skb.  We
1202  * also program the etxregs->cfg register to use an offset of 2.  This
1203  * imperical constant plus the ethernet header size will always leave
1204  * us with a nicely aligned ip header once we pass things up to the
1205  * protocol layers.
1206  *
1207  * The numbers work out to:
1208  *
1209  *         Max ethernet frame size         1518
1210  *         Ethernet header size              14
1211  *         Happy Meal base offset             2
1212  *
1213  * Say a skb data area is at 0xf001b010, and its size alloced is
1214  * (ETH_FRAME_LEN + 64 + 2) = (1514 + 64 + 2) = 1580 bytes.
1215  *
1216  * First our alloc_skb() routine aligns the data base to a 64 byte
1217  * boundary.  We now have 0xf001b040 as our skb data address.  We
1218  * plug this into the receive descriptor address.
1219  *
1220  * Next, we skb_reserve() 2 bytes to account for the Happy Meal offset.
1221  * So now the data we will end up looking at starts at 0xf001b042.  When
1222  * the packet arrives, we will check out the size received and subtract
1223  * this from the skb->length.  Then we just pass the packet up to the
1224  * protocols as is, and allocate a new skb to replace this slot we have
1225  * just received from.
1226  *
1227  * The ethernet layer will strip the ether header from the front of the
1228  * skb we just sent to it, this leaves us with the ip header sitting
1229  * nicely aligned at 0xf001b050.  Also, for tcp and udp packets the
1230  * Happy Meal has even checksummed the tcp/udp data for us.  The 16
1231  * bit checksum is obtained from the low bits of the receive descriptor
1232  * flags, thus:
1233  *
1234  *      skb->csum = rxd->rx_flags & 0xffff;
1235  *      skb->ip_summed = CHECKSUM_HW;
1236  *
1237  * before sending off the skb to the protocols, and we are good as gold.
1238  */
1239 static void happy_meal_clean_rings(struct happy_meal *hp)
1240 {
1241         int i;
1242
1243         for (i = 0; i < RX_RING_SIZE; i++) {
1244                 if (hp->rx_skbs[i] != NULL) {
1245                         struct sk_buff *skb = hp->rx_skbs[i];
1246                         struct happy_meal_rxd *rxd;
1247                         u32 dma_addr;
1248
1249                         rxd = &hp->happy_block->happy_meal_rxd[i];
1250                         dma_addr = hme_read_desc32(hp, &rxd->rx_addr);
1251                         hme_dma_unmap(hp, dma_addr, RX_BUF_ALLOC_SIZE, DMA_FROMDEVICE);
1252                         dev_kfree_skb_any(skb);
1253                         hp->rx_skbs[i] = NULL;
1254                 }
1255         }
1256
1257         for (i = 0; i < TX_RING_SIZE; i++) {
1258                 if (hp->tx_skbs[i] != NULL) {
1259                         struct sk_buff *skb = hp->tx_skbs[i];
1260                         struct happy_meal_txd *txd;
1261                         u32 dma_addr;
1262                         int frag;
1263
1264                         hp->tx_skbs[i] = NULL;
1265
1266                         for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) {
1267                                 txd = &hp->happy_block->happy_meal_txd[i];
1268                                 dma_addr = hme_read_desc32(hp, &txd->tx_addr);
1269                                 hme_dma_unmap(hp, dma_addr,
1270                                               (hme_read_desc32(hp, &txd->tx_flags)
1271                                                & TXFLAG_SIZE),
1272                                               DMA_TODEVICE);
1273
1274                                 if (frag != skb_shinfo(skb)->nr_frags)
1275                                         i++;
1276                         }
1277
1278                         dev_kfree_skb_any(skb);
1279                 }
1280         }
1281 }
1282
1283 /* hp->happy_lock must be held */
1284 static void happy_meal_init_rings(struct happy_meal *hp)
1285 {
1286         struct hmeal_init_block *hb = hp->happy_block;
1287         struct net_device *dev = hp->dev;
1288         int i;
1289
1290         HMD(("happy_meal_init_rings: counters to zero, "));
1291         hp->rx_new = hp->rx_old = hp->tx_new = hp->tx_old = 0;
1292
1293         /* Free any skippy bufs left around in the rings. */
1294         HMD(("clean, "));
1295         happy_meal_clean_rings(hp);
1296
1297         /* Now get new skippy bufs for the receive ring. */
1298         HMD(("init rxring, "));
1299         for (i = 0; i < RX_RING_SIZE; i++) {
1300                 struct sk_buff *skb;
1301
1302                 skb = happy_meal_alloc_skb(RX_BUF_ALLOC_SIZE, GFP_ATOMIC);
1303                 if (!skb) {
1304                         hme_write_rxd(hp, &hb->happy_meal_rxd[i], 0, 0);
1305                         continue;
1306                 }
1307                 hp->rx_skbs[i] = skb;
1308                 skb->dev = dev;
1309
1310                 /* Because we reserve afterwards. */
1311                 skb_put(skb, (ETH_FRAME_LEN + RX_OFFSET));
1312                 hme_write_rxd(hp, &hb->happy_meal_rxd[i],
1313                               (RXFLAG_OWN | ((RX_BUF_ALLOC_SIZE - RX_OFFSET) << 16)),
1314                               hme_dma_map(hp, skb->data, RX_BUF_ALLOC_SIZE, DMA_FROMDEVICE));
1315                 skb_reserve(skb, RX_OFFSET);
1316         }
1317
1318         HMD(("init txring, "));
1319         for (i = 0; i < TX_RING_SIZE; i++)
1320                 hme_write_txd(hp, &hb->happy_meal_txd[i], 0, 0);
1321
1322         HMD(("done\n"));
1323 }
1324
1325 /* hp->happy_lock must be held */
1326 static void happy_meal_begin_auto_negotiation(struct happy_meal *hp,
1327                                               void __iomem *tregs,
1328                                               struct ethtool_cmd *ep)
1329 {
1330         int timeout;
1331
1332         /* Read all of the registers we are interested in now. */
1333         hp->sw_bmsr      = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1334         hp->sw_bmcr      = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1335         hp->sw_physid1   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID1);
1336         hp->sw_physid2   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID2);
1337
1338         /* XXX Check BMSR_ANEGCAPABLE, should not be necessary though. */
1339
1340         hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1341         if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
1342                 /* Advertise everything we can support. */
1343                 if (hp->sw_bmsr & BMSR_10HALF)
1344                         hp->sw_advertise |= (ADVERTISE_10HALF);
1345                 else
1346                         hp->sw_advertise &= ~(ADVERTISE_10HALF);
1347
1348                 if (hp->sw_bmsr & BMSR_10FULL)
1349                         hp->sw_advertise |= (ADVERTISE_10FULL);
1350                 else
1351                         hp->sw_advertise &= ~(ADVERTISE_10FULL);
1352                 if (hp->sw_bmsr & BMSR_100HALF)
1353                         hp->sw_advertise |= (ADVERTISE_100HALF);
1354                 else
1355                         hp->sw_advertise &= ~(ADVERTISE_100HALF);
1356                 if (hp->sw_bmsr & BMSR_100FULL)
1357                         hp->sw_advertise |= (ADVERTISE_100FULL);
1358                 else
1359                         hp->sw_advertise &= ~(ADVERTISE_100FULL);
1360                 happy_meal_tcvr_write(hp, tregs, MII_ADVERTISE, hp->sw_advertise);
1361
1362                 /* XXX Currently no Happy Meal cards I know off support 100BaseT4,
1363                  * XXX and this is because the DP83840 does not support it, changes
1364                  * XXX would need to be made to the tx/rx logic in the driver as well
1365                  * XXX so I completely skip checking for it in the BMSR for now.
1366                  */
1367
1368 #ifdef AUTO_SWITCH_DEBUG
1369                 ASD(("%s: Advertising [ ", hp->dev->name));
1370                 if (hp->sw_advertise & ADVERTISE_10HALF)
1371                         ASD(("10H "));
1372                 if (hp->sw_advertise & ADVERTISE_10FULL)
1373                         ASD(("10F "));
1374                 if (hp->sw_advertise & ADVERTISE_100HALF)
1375                         ASD(("100H "));
1376                 if (hp->sw_advertise & ADVERTISE_100FULL)
1377                         ASD(("100F "));
1378 #endif
1379
1380                 /* Enable Auto-Negotiation, this is usually on already... */
1381                 hp->sw_bmcr |= BMCR_ANENABLE;
1382                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1383
1384                 /* Restart it to make sure it is going. */
1385                 hp->sw_bmcr |= BMCR_ANRESTART;
1386                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1387
1388                 /* BMCR_ANRESTART self clears when the process has begun. */
1389
1390                 timeout = 64;  /* More than enough. */
1391                 while (--timeout) {
1392                         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1393                         if (!(hp->sw_bmcr & BMCR_ANRESTART))
1394                                 break; /* got it. */
1395                         udelay(10);
1396                 }
1397                 if (!timeout) {
1398                         printk(KERN_ERR "%s: Happy Meal would not start auto negotiation "
1399                                "BMCR=0x%04x\n", hp->dev->name, hp->sw_bmcr);
1400                         printk(KERN_NOTICE "%s: Performing force link detection.\n",
1401                                hp->dev->name);
1402                         goto force_link;
1403                 } else {
1404                         hp->timer_state = arbwait;
1405                 }
1406         } else {
1407 force_link:
1408                 /* Force the link up, trying first a particular mode.
1409                  * Either we are here at the request of ethtool or
1410                  * because the Happy Meal would not start to autoneg.
1411                  */
1412
1413                 /* Disable auto-negotiation in BMCR, enable the duplex and
1414                  * speed setting, init the timer state machine, and fire it off.
1415                  */
1416                 if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
1417                         hp->sw_bmcr = BMCR_SPEED100;
1418                 } else {
1419                         if (ep->speed == SPEED_100)
1420                                 hp->sw_bmcr = BMCR_SPEED100;
1421                         else
1422                                 hp->sw_bmcr = 0;
1423                         if (ep->duplex == DUPLEX_FULL)
1424                                 hp->sw_bmcr |= BMCR_FULLDPLX;
1425                 }
1426                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1427
1428                 if (!is_lucent_phy(hp)) {
1429                         /* OK, seems we need do disable the transceiver for the first
1430                          * tick to make sure we get an accurate link state at the
1431                          * second tick.
1432                          */
1433                         hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs,
1434                                                                DP83840_CSCONFIG);
1435                         hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
1436                         happy_meal_tcvr_write(hp, tregs, DP83840_CSCONFIG,
1437                                               hp->sw_csconfig);
1438                 }
1439                 hp->timer_state = ltrywait;
1440         }
1441
1442         hp->timer_ticks = 0;
1443         hp->happy_timer.expires = jiffies + (12 * HZ)/10;  /* 1.2 sec. */
1444         hp->happy_timer.data = (unsigned long) hp;
1445         hp->happy_timer.function = &happy_meal_timer;
1446         add_timer(&hp->happy_timer);
1447 }
1448
1449 /* hp->happy_lock must be held */
1450 static int happy_meal_init(struct happy_meal *hp)
1451 {
1452         void __iomem *gregs        = hp->gregs;
1453         void __iomem *etxregs      = hp->etxregs;
1454         void __iomem *erxregs      = hp->erxregs;
1455         void __iomem *bregs        = hp->bigmacregs;
1456         void __iomem *tregs        = hp->tcvregs;
1457         u32 regtmp, rxcfg;
1458         unsigned char *e = &hp->dev->dev_addr[0];
1459
1460         /* If auto-negotiation timer is running, kill it. */
1461         del_timer(&hp->happy_timer);
1462
1463         HMD(("happy_meal_init: happy_flags[%08x] ",
1464              hp->happy_flags));
1465         if (!(hp->happy_flags & HFLAG_INIT)) {
1466                 HMD(("set HFLAG_INIT, "));
1467                 hp->happy_flags |= HFLAG_INIT;
1468                 happy_meal_get_counters(hp, bregs);
1469         }
1470
1471         /* Stop polling. */
1472         HMD(("to happy_meal_poll_stop\n"));
1473         happy_meal_poll_stop(hp, tregs);
1474
1475         /* Stop transmitter and receiver. */
1476         HMD(("happy_meal_init: to happy_meal_stop\n"));
1477         happy_meal_stop(hp, gregs);
1478
1479         /* Alloc and reset the tx/rx descriptor chains. */
1480         HMD(("happy_meal_init: to happy_meal_init_rings\n"));
1481         happy_meal_init_rings(hp);
1482
1483         /* Shut up the MIF. */
1484         HMD(("happy_meal_init: Disable all MIF irqs (old[%08x]), ",
1485              hme_read32(hp, tregs + TCVR_IMASK)));
1486         hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
1487
1488         /* See if we can enable the MIF frame on this card to speak to the DP83840. */
1489         if (hp->happy_flags & HFLAG_FENABLE) {
1490                 HMD(("use frame old[%08x], ",
1491                      hme_read32(hp, tregs + TCVR_CFG)));
1492                 hme_write32(hp, tregs + TCVR_CFG,
1493                             hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_BENABLE));
1494         } else {
1495                 HMD(("use bitbang old[%08x], ",
1496                      hme_read32(hp, tregs + TCVR_CFG)));
1497                 hme_write32(hp, tregs + TCVR_CFG,
1498                             hme_read32(hp, tregs + TCVR_CFG) | TCV_CFG_BENABLE);
1499         }
1500
1501         /* Check the state of the transceiver. */
1502         HMD(("to happy_meal_transceiver_check\n"));
1503         happy_meal_transceiver_check(hp, tregs);
1504
1505         /* Put the Big Mac into a sane state. */
1506         HMD(("happy_meal_init: "));
1507         switch(hp->tcvr_type) {
1508         case none:
1509                 /* Cannot operate if we don't know the transceiver type! */
1510                 HMD(("AAIEEE no transceiver type, EAGAIN"));
1511                 return -EAGAIN;
1512
1513         case internal:
1514                 /* Using the MII buffers. */
1515                 HMD(("internal, using MII, "));
1516                 hme_write32(hp, bregs + BMAC_XIFCFG, 0);
1517                 break;
1518
1519         case external:
1520                 /* Not using the MII, disable it. */
1521                 HMD(("external, disable MII, "));
1522                 hme_write32(hp, bregs + BMAC_XIFCFG, BIGMAC_XCFG_MIIDISAB);
1523                 break;
1524         };
1525
1526         if (happy_meal_tcvr_reset(hp, tregs))
1527                 return -EAGAIN;
1528
1529         /* Reset the Happy Meal Big Mac transceiver and the receiver. */
1530         HMD(("tx/rx reset, "));
1531         happy_meal_tx_reset(hp, bregs);
1532         happy_meal_rx_reset(hp, bregs);
1533
1534         /* Set jam size and inter-packet gaps to reasonable defaults. */
1535         HMD(("jsize/ipg1/ipg2, "));
1536         hme_write32(hp, bregs + BMAC_JSIZE, DEFAULT_JAMSIZE);
1537         hme_write32(hp, bregs + BMAC_IGAP1, DEFAULT_IPG1);
1538         hme_write32(hp, bregs + BMAC_IGAP2, DEFAULT_IPG2);
1539
1540         /* Load up the MAC address and random seed. */
1541         HMD(("rseed/macaddr, "));
1542
1543         /* The docs recommend to use the 10LSB of our MAC here. */
1544         hme_write32(hp, bregs + BMAC_RSEED, ((e[5] | e[4]<<8)&0x3ff));
1545
1546         hme_write32(hp, bregs + BMAC_MACADDR2, ((e[4] << 8) | e[5]));
1547         hme_write32(hp, bregs + BMAC_MACADDR1, ((e[2] << 8) | e[3]));
1548         hme_write32(hp, bregs + BMAC_MACADDR0, ((e[0] << 8) | e[1]));
1549
1550         HMD(("htable, "));
1551         if ((hp->dev->flags & IFF_ALLMULTI) ||
1552             (hp->dev->mc_count > 64)) {
1553                 hme_write32(hp, bregs + BMAC_HTABLE0, 0xffff);
1554                 hme_write32(hp, bregs + BMAC_HTABLE1, 0xffff);
1555                 hme_write32(hp, bregs + BMAC_HTABLE2, 0xffff);
1556                 hme_write32(hp, bregs + BMAC_HTABLE3, 0xffff);
1557         } else if ((hp->dev->flags & IFF_PROMISC) == 0) {
1558                 u16 hash_table[4];
1559                 struct dev_mc_list *dmi = hp->dev->mc_list;
1560                 char *addrs;
1561                 int i;
1562                 u32 crc;
1563
1564                 for (i = 0; i < 4; i++)
1565                         hash_table[i] = 0;
1566
1567                 for (i = 0; i < hp->dev->mc_count; i++) {
1568                         addrs = dmi->dmi_addr;
1569                         dmi = dmi->next;
1570
1571                         if (!(*addrs & 1))
1572                                 continue;
1573
1574                         crc = ether_crc_le(6, addrs);
1575                         crc >>= 26;
1576                         hash_table[crc >> 4] |= 1 << (crc & 0xf);
1577                 }
1578                 hme_write32(hp, bregs + BMAC_HTABLE0, hash_table[0]);
1579                 hme_write32(hp, bregs + BMAC_HTABLE1, hash_table[1]);
1580                 hme_write32(hp, bregs + BMAC_HTABLE2, hash_table[2]);
1581                 hme_write32(hp, bregs + BMAC_HTABLE3, hash_table[3]);
1582         } else {
1583                 hme_write32(hp, bregs + BMAC_HTABLE3, 0);
1584                 hme_write32(hp, bregs + BMAC_HTABLE2, 0);
1585                 hme_write32(hp, bregs + BMAC_HTABLE1, 0);
1586                 hme_write32(hp, bregs + BMAC_HTABLE0, 0);
1587         }
1588
1589         /* Set the RX and TX ring ptrs. */
1590         HMD(("ring ptrs rxr[%08x] txr[%08x]\n",
1591              ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)),
1592              ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_txd, 0))));
1593         hme_write32(hp, erxregs + ERX_RING,
1594                     ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)));
1595         hme_write32(hp, etxregs + ETX_RING,
1596                     ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_txd, 0)));
1597
1598         /* Parity issues in the ERX unit of some HME revisions can cause some
1599          * registers to not be written unless their parity is even.  Detect such
1600          * lost writes and simply rewrite with a low bit set (which will be ignored
1601          * since the rxring needs to be 2K aligned).
1602          */
1603         if (hme_read32(hp, erxregs + ERX_RING) !=
1604             ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)))
1605                 hme_write32(hp, erxregs + ERX_RING,
1606                             ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0))
1607                             | 0x4);
1608
1609         /* Set the supported burst sizes. */
1610         HMD(("happy_meal_init: old[%08x] bursts<",
1611              hme_read32(hp, gregs + GREG_CFG)));
1612
1613 #ifndef __sparc__
1614         /* It is always PCI and can handle 64byte bursts. */
1615         hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST64);
1616 #else
1617         if ((hp->happy_bursts & DMA_BURST64) &&
1618             ((hp->happy_flags & HFLAG_PCI) != 0
1619 #ifdef CONFIG_SBUS
1620              || sbus_can_burst64(hp->happy_dev)
1621 #endif
1622              || 0)) {
1623                 u32 gcfg = GREG_CFG_BURST64;
1624
1625                 /* I have no idea if I should set the extended
1626                  * transfer mode bit for Cheerio, so for now I
1627                  * do not.  -DaveM
1628                  */
1629 #ifdef CONFIG_SBUS
1630                 if ((hp->happy_flags & HFLAG_PCI) == 0 &&
1631                     sbus_can_dma_64bit(hp->happy_dev)) {
1632                         sbus_set_sbus64(hp->happy_dev,
1633                                         hp->happy_bursts);
1634                         gcfg |= GREG_CFG_64BIT;
1635                 }
1636 #endif
1637
1638                 HMD(("64>"));
1639                 hme_write32(hp, gregs + GREG_CFG, gcfg);
1640         } else if (hp->happy_bursts & DMA_BURST32) {
1641                 HMD(("32>"));
1642                 hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST32);
1643         } else if (hp->happy_bursts & DMA_BURST16) {
1644                 HMD(("16>"));
1645                 hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST16);
1646         } else {
1647                 HMD(("XXX>"));
1648                 hme_write32(hp, gregs + GREG_CFG, 0);
1649         }
1650 #endif /* __sparc__ */
1651
1652         /* Turn off interrupts we do not want to hear. */
1653         HMD((", enable global interrupts, "));
1654         hme_write32(hp, gregs + GREG_IMASK,
1655                     (GREG_IMASK_GOTFRAME | GREG_IMASK_RCNTEXP |
1656                      GREG_IMASK_SENTFRAME | GREG_IMASK_TXPERR));
1657
1658         /* Set the transmit ring buffer size. */
1659         HMD(("tx rsize=%d oreg[%08x], ", (int)TX_RING_SIZE,
1660              hme_read32(hp, etxregs + ETX_RSIZE)));
1661         hme_write32(hp, etxregs + ETX_RSIZE, (TX_RING_SIZE >> ETX_RSIZE_SHIFT) - 1);
1662
1663         /* Enable transmitter DVMA. */
1664         HMD(("tx dma enable old[%08x], ",
1665              hme_read32(hp, etxregs + ETX_CFG)));
1666         hme_write32(hp, etxregs + ETX_CFG,
1667                     hme_read32(hp, etxregs + ETX_CFG) | ETX_CFG_DMAENABLE);
1668
1669         /* This chip really rots, for the receiver sometimes when you
1670          * write to its control registers not all the bits get there
1671          * properly.  I cannot think of a sane way to provide complete
1672          * coverage for this hardware bug yet.
1673          */
1674         HMD(("erx regs bug old[%08x]\n",
1675              hme_read32(hp, erxregs + ERX_CFG)));
1676         hme_write32(hp, erxregs + ERX_CFG, ERX_CFG_DEFAULT(RX_OFFSET));
1677         regtmp = hme_read32(hp, erxregs + ERX_CFG);
1678         hme_write32(hp, erxregs + ERX_CFG, ERX_CFG_DEFAULT(RX_OFFSET));
1679         if (hme_read32(hp, erxregs + ERX_CFG) != ERX_CFG_DEFAULT(RX_OFFSET)) {
1680                 printk(KERN_ERR "happy meal: Eieee, rx config register gets greasy fries.\n");
1681                 printk(KERN_ERR "happy meal: Trying to set %08x, reread gives %08x\n",
1682                        ERX_CFG_DEFAULT(RX_OFFSET), regtmp);
1683                 /* XXX Should return failure here... */
1684         }
1685
1686         /* Enable Big Mac hash table filter. */
1687         HMD(("happy_meal_init: enable hash rx_cfg_old[%08x], ",
1688              hme_read32(hp, bregs + BMAC_RXCFG)));
1689         rxcfg = BIGMAC_RXCFG_HENABLE | BIGMAC_RXCFG_REJME;
1690         if (hp->dev->flags & IFF_PROMISC)
1691                 rxcfg |= BIGMAC_RXCFG_PMISC;
1692         hme_write32(hp, bregs + BMAC_RXCFG, rxcfg);
1693
1694         /* Let the bits settle in the chip. */
1695         udelay(10);
1696
1697         /* Ok, configure the Big Mac transmitter. */
1698         HMD(("BIGMAC init, "));
1699         regtmp = 0;
1700         if (hp->happy_flags & HFLAG_FULL)
1701                 regtmp |= BIGMAC_TXCFG_FULLDPLX;
1702
1703         /* Don't turn on the "don't give up" bit for now.  It could cause hme
1704          * to deadlock with the PHY if a Jabber occurs.
1705          */
1706         hme_write32(hp, bregs + BMAC_TXCFG, regtmp /*| BIGMAC_TXCFG_DGIVEUP*/);
1707
1708         /* Give up after 16 TX attempts. */
1709         hme_write32(hp, bregs + BMAC_ALIMIT, 16);
1710
1711         /* Enable the output drivers no matter what. */
1712         regtmp = BIGMAC_XCFG_ODENABLE;
1713
1714         /* If card can do lance mode, enable it. */
1715         if (hp->happy_flags & HFLAG_LANCE)
1716                 regtmp |= (DEFAULT_IPG0 << 5) | BIGMAC_XCFG_LANCE;
1717
1718         /* Disable the MII buffers if using external transceiver. */
1719         if (hp->tcvr_type == external)
1720                 regtmp |= BIGMAC_XCFG_MIIDISAB;
1721
1722         HMD(("XIF config old[%08x], ",
1723              hme_read32(hp, bregs + BMAC_XIFCFG)));
1724         hme_write32(hp, bregs + BMAC_XIFCFG, regtmp);
1725
1726         /* Start things up. */
1727         HMD(("tx old[%08x] and rx [%08x] ON!\n",
1728              hme_read32(hp, bregs + BMAC_TXCFG),
1729              hme_read32(hp, bregs + BMAC_RXCFG)));
1730         hme_write32(hp, bregs + BMAC_TXCFG,
1731                     hme_read32(hp, bregs + BMAC_TXCFG) | BIGMAC_TXCFG_ENABLE);
1732         hme_write32(hp, bregs + BMAC_RXCFG,
1733                     hme_read32(hp, bregs + BMAC_RXCFG) | BIGMAC_RXCFG_ENABLE);
1734
1735         /* Get the autonegotiation started, and the watch timer ticking. */
1736         happy_meal_begin_auto_negotiation(hp, tregs, NULL);
1737
1738         /* Success. */
1739         return 0;
1740 }
1741
1742 /* hp->happy_lock must be held */
1743 static void happy_meal_set_initial_advertisement(struct happy_meal *hp)
1744 {
1745         void __iomem *tregs     = hp->tcvregs;
1746         void __iomem *bregs     = hp->bigmacregs;
1747         void __iomem *gregs     = hp->gregs;
1748
1749         happy_meal_stop(hp, gregs);
1750         hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
1751         if (hp->happy_flags & HFLAG_FENABLE)
1752                 hme_write32(hp, tregs + TCVR_CFG,
1753                             hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_BENABLE));
1754         else
1755                 hme_write32(hp, tregs + TCVR_CFG,
1756                             hme_read32(hp, tregs + TCVR_CFG) | TCV_CFG_BENABLE);
1757         happy_meal_transceiver_check(hp, tregs);
1758         switch(hp->tcvr_type) {
1759         case none:
1760                 return;
1761         case internal:
1762                 hme_write32(hp, bregs + BMAC_XIFCFG, 0);
1763                 break;
1764         case external:
1765                 hme_write32(hp, bregs + BMAC_XIFCFG, BIGMAC_XCFG_MIIDISAB);
1766                 break;
1767         };
1768         if (happy_meal_tcvr_reset(hp, tregs))
1769                 return;
1770
1771         /* Latch PHY registers as of now. */
1772         hp->sw_bmsr      = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1773         hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1774
1775         /* Advertise everything we can support. */
1776         if (hp->sw_bmsr & BMSR_10HALF)
1777                 hp->sw_advertise |= (ADVERTISE_10HALF);
1778         else
1779                 hp->sw_advertise &= ~(ADVERTISE_10HALF);
1780
1781         if (hp->sw_bmsr & BMSR_10FULL)
1782                 hp->sw_advertise |= (ADVERTISE_10FULL);
1783         else
1784                 hp->sw_advertise &= ~(ADVERTISE_10FULL);
1785         if (hp->sw_bmsr & BMSR_100HALF)
1786                 hp->sw_advertise |= (ADVERTISE_100HALF);
1787         else
1788                 hp->sw_advertise &= ~(ADVERTISE_100HALF);
1789         if (hp->sw_bmsr & BMSR_100FULL)
1790                 hp->sw_advertise |= (ADVERTISE_100FULL);
1791         else
1792                 hp->sw_advertise &= ~(ADVERTISE_100FULL);
1793
1794         /* Update the PHY advertisement register. */
1795         happy_meal_tcvr_write(hp, tregs, MII_ADVERTISE, hp->sw_advertise);
1796 }
1797
1798 /* Once status is latched (by happy_meal_interrupt) it is cleared by
1799  * the hardware, so we cannot re-read it and get a correct value.
1800  *
1801  * hp->happy_lock must be held
1802  */
1803 static int happy_meal_is_not_so_happy(struct happy_meal *hp, u32 status)
1804 {
1805         int reset = 0;
1806
1807         /* Only print messages for non-counter related interrupts. */
1808         if (status & (GREG_STAT_STSTERR | GREG_STAT_TFIFO_UND |
1809                       GREG_STAT_MAXPKTERR | GREG_STAT_RXERR |
1810                       GREG_STAT_RXPERR | GREG_STAT_RXTERR | GREG_STAT_EOPERR |
1811                       GREG_STAT_MIFIRQ | GREG_STAT_TXEACK | GREG_STAT_TXLERR |
1812                       GREG_STAT_TXPERR | GREG_STAT_TXTERR | GREG_STAT_SLVERR |
1813                       GREG_STAT_SLVPERR))
1814                 printk(KERN_ERR "%s: Error interrupt for happy meal, status = %08x\n",
1815                        hp->dev->name, status);
1816
1817         if (status & GREG_STAT_RFIFOVF) {
1818                 /* Receive FIFO overflow is harmless and the hardware will take
1819                    care of it, just some packets are lost. Who cares. */
1820                 printk(KERN_DEBUG "%s: Happy Meal receive FIFO overflow.\n", hp->dev->name);
1821         }
1822
1823         if (status & GREG_STAT_STSTERR) {
1824                 /* BigMAC SQE link test failed. */
1825                 printk(KERN_ERR "%s: Happy Meal BigMAC SQE test failed.\n", hp->dev->name);
1826                 reset = 1;
1827         }
1828
1829         if (status & GREG_STAT_TFIFO_UND) {
1830                 /* Transmit FIFO underrun, again DMA error likely. */
1831                 printk(KERN_ERR "%s: Happy Meal transmitter FIFO underrun, DMA error.\n",
1832                        hp->dev->name);
1833                 reset = 1;
1834         }
1835
1836         if (status & GREG_STAT_MAXPKTERR) {
1837                 /* Driver error, tried to transmit something larger
1838                  * than ethernet max mtu.
1839                  */
1840                 printk(KERN_ERR "%s: Happy Meal MAX Packet size error.\n", hp->dev->name);
1841                 reset = 1;
1842         }
1843
1844         if (status & GREG_STAT_NORXD) {
1845                 /* This is harmless, it just means the system is
1846                  * quite loaded and the incoming packet rate was
1847                  * faster than the interrupt handler could keep up
1848                  * with.
1849                  */
1850                 printk(KERN_INFO "%s: Happy Meal out of receive "
1851                        "descriptors, packet dropped.\n",
1852                        hp->dev->name);
1853         }
1854
1855         if (status & (GREG_STAT_RXERR|GREG_STAT_RXPERR|GREG_STAT_RXTERR)) {
1856                 /* All sorts of DMA receive errors. */
1857                 printk(KERN_ERR "%s: Happy Meal rx DMA errors [ ", hp->dev->name);
1858                 if (status & GREG_STAT_RXERR)
1859                         printk("GenericError ");
1860                 if (status & GREG_STAT_RXPERR)
1861                         printk("ParityError ");
1862                 if (status & GREG_STAT_RXTERR)
1863                         printk("RxTagBotch ");
1864                 printk("]\n");
1865                 reset = 1;
1866         }
1867
1868         if (status & GREG_STAT_EOPERR) {
1869                 /* Driver bug, didn't set EOP bit in tx descriptor given
1870                  * to the happy meal.
1871                  */
1872                 printk(KERN_ERR "%s: EOP not set in happy meal transmit descriptor!\n",
1873                        hp->dev->name);
1874                 reset = 1;
1875         }
1876
1877         if (status & GREG_STAT_MIFIRQ) {
1878                 /* MIF signalled an interrupt, were we polling it? */
1879                 printk(KERN_ERR "%s: Happy Meal MIF interrupt.\n", hp->dev->name);
1880         }
1881
1882         if (status &
1883             (GREG_STAT_TXEACK|GREG_STAT_TXLERR|GREG_STAT_TXPERR|GREG_STAT_TXTERR)) {
1884                 /* All sorts of transmit DMA errors. */
1885                 printk(KERN_ERR "%s: Happy Meal tx DMA errors [ ", hp->dev->name);
1886                 if (status & GREG_STAT_TXEACK)
1887                         printk("GenericError ");
1888                 if (status & GREG_STAT_TXLERR)
1889                         printk("LateError ");
1890                 if (status & GREG_STAT_TXPERR)
1891                         printk("ParityErro ");
1892                 if (status & GREG_STAT_TXTERR)
1893                         printk("TagBotch ");
1894                 printk("]\n");
1895                 reset = 1;
1896         }
1897
1898         if (status & (GREG_STAT_SLVERR|GREG_STAT_SLVPERR)) {
1899                 /* Bus or parity error when cpu accessed happy meal registers
1900                  * or it's internal FIFO's.  Should never see this.
1901                  */
1902                 printk(KERN_ERR "%s: Happy Meal register access SBUS slave (%s) error.\n",
1903                        hp->dev->name,
1904                        (status & GREG_STAT_SLVPERR) ? "parity" : "generic");
1905                 reset = 1;
1906         }
1907
1908         if (reset) {
1909                 printk(KERN_NOTICE "%s: Resetting...\n", hp->dev->name);
1910                 happy_meal_init(hp);
1911                 return 1;
1912         }
1913         return 0;
1914 }
1915
1916 /* hp->happy_lock must be held */
1917 static void happy_meal_mif_interrupt(struct happy_meal *hp)
1918 {
1919         void __iomem *tregs = hp->tcvregs;
1920
1921         printk(KERN_INFO "%s: Link status change.\n", hp->dev->name);
1922         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1923         hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
1924
1925         /* Use the fastest transmission protocol possible. */
1926         if (hp->sw_lpa & LPA_100FULL) {
1927                 printk(KERN_INFO "%s: Switching to 100Mbps at full duplex.", hp->dev->name);
1928                 hp->sw_bmcr |= (BMCR_FULLDPLX | BMCR_SPEED100);
1929         } else if (hp->sw_lpa & LPA_100HALF) {
1930                 printk(KERN_INFO "%s: Switching to 100MBps at half duplex.", hp->dev->name);
1931                 hp->sw_bmcr |= BMCR_SPEED100;
1932         } else if (hp->sw_lpa & LPA_10FULL) {
1933                 printk(KERN_INFO "%s: Switching to 10MBps at full duplex.", hp->dev->name);
1934                 hp->sw_bmcr |= BMCR_FULLDPLX;
1935         } else {
1936                 printk(KERN_INFO "%s: Using 10Mbps at half duplex.", hp->dev->name);
1937         }
1938         happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1939
1940         /* Finally stop polling and shut up the MIF. */
1941         happy_meal_poll_stop(hp, tregs);
1942 }
1943
1944 #ifdef TXDEBUG
1945 #define TXD(x) printk x
1946 #else
1947 #define TXD(x)
1948 #endif
1949
1950 /* hp->happy_lock must be held */
1951 static void happy_meal_tx(struct happy_meal *hp)
1952 {
1953         struct happy_meal_txd *txbase = &hp->happy_block->happy_meal_txd[0];
1954         struct happy_meal_txd *this;
1955         struct net_device *dev = hp->dev;
1956         int elem;
1957
1958         elem = hp->tx_old;
1959         TXD(("TX<"));
1960         while (elem != hp->tx_new) {
1961                 struct sk_buff *skb;
1962                 u32 flags, dma_addr, dma_len;
1963                 int frag;
1964
1965                 TXD(("[%d]", elem));
1966                 this = &txbase[elem];
1967                 flags = hme_read_desc32(hp, &this->tx_flags);
1968                 if (flags & TXFLAG_OWN)
1969                         break;
1970                 skb = hp->tx_skbs[elem];
1971                 if (skb_shinfo(skb)->nr_frags) {
1972                         int last;
1973
1974                         last = elem + skb_shinfo(skb)->nr_frags;
1975                         last &= (TX_RING_SIZE - 1);
1976                         flags = hme_read_desc32(hp, &txbase[last].tx_flags);
1977                         if (flags & TXFLAG_OWN)
1978                                 break;
1979                 }
1980                 hp->tx_skbs[elem] = NULL;
1981                 hp->net_stats.tx_bytes += skb->len;
1982
1983                 for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) {
1984                         dma_addr = hme_read_desc32(hp, &this->tx_addr);
1985                         dma_len = hme_read_desc32(hp, &this->tx_flags);
1986
1987                         dma_len &= TXFLAG_SIZE;
1988                         hme_dma_unmap(hp, dma_addr, dma_len, DMA_TODEVICE);
1989
1990                         elem = NEXT_TX(elem);
1991                         this = &txbase[elem];
1992                 }
1993
1994                 dev_kfree_skb_irq(skb);
1995                 hp->net_stats.tx_packets++;
1996         }
1997         hp->tx_old = elem;
1998         TXD((">"));
1999
2000         if (netif_queue_stopped(dev) &&
2001             TX_BUFFS_AVAIL(hp) > (MAX_SKB_FRAGS + 1))
2002                 netif_wake_queue(dev);
2003 }
2004
2005 #ifdef RXDEBUG
2006 #define RXD(x) printk x
2007 #else
2008 #define RXD(x)
2009 #endif
2010
2011 /* Originally I used to handle the allocation failure by just giving back just
2012  * that one ring buffer to the happy meal.  Problem is that usually when that
2013  * condition is triggered, the happy meal expects you to do something reasonable
2014  * with all of the packets it has DMA'd in.  So now I just drop the entire
2015  * ring when we cannot get a new skb and give them all back to the happy meal,
2016  * maybe things will be "happier" now.
2017  *
2018  * hp->happy_lock must be held
2019  */
2020 static void happy_meal_rx(struct happy_meal *hp, struct net_device *dev)
2021 {
2022         struct happy_meal_rxd *rxbase = &hp->happy_block->happy_meal_rxd[0];
2023         struct happy_meal_rxd *this;
2024         int elem = hp->rx_new, drops = 0;
2025         u32 flags;
2026
2027         RXD(("RX<"));
2028         this = &rxbase[elem];
2029         while (!((flags = hme_read_desc32(hp, &this->rx_flags)) & RXFLAG_OWN)) {
2030                 struct sk_buff *skb;
2031                 int len = flags >> 16;
2032                 u16 csum = flags & RXFLAG_CSUM;
2033                 u32 dma_addr = hme_read_desc32(hp, &this->rx_addr);
2034
2035                 RXD(("[%d ", elem));
2036
2037                 /* Check for errors. */
2038                 if ((len < ETH_ZLEN) || (flags & RXFLAG_OVERFLOW)) {
2039                         RXD(("ERR(%08x)]", flags));
2040                         hp->net_stats.rx_errors++;
2041                         if (len < ETH_ZLEN)
2042                                 hp->net_stats.rx_length_errors++;
2043                         if (len & (RXFLAG_OVERFLOW >> 16)) {
2044                                 hp->net_stats.rx_over_errors++;
2045                                 hp->net_stats.rx_fifo_errors++;
2046                         }
2047
2048                         /* Return it to the Happy meal. */
2049         drop_it:
2050                         hp->net_stats.rx_dropped++;
2051                         hme_write_rxd(hp, this,
2052                                       (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2053                                       dma_addr);
2054                         goto next;
2055                 }
2056                 skb = hp->rx_skbs[elem];
2057                 if (len > RX_COPY_THRESHOLD) {
2058                         struct sk_buff *new_skb;
2059
2060                         /* Now refill the entry, if we can. */
2061                         new_skb = happy_meal_alloc_skb(RX_BUF_ALLOC_SIZE, GFP_ATOMIC);
2062                         if (new_skb == NULL) {
2063                                 drops++;
2064                                 goto drop_it;
2065                         }
2066                         hme_dma_unmap(hp, dma_addr, RX_BUF_ALLOC_SIZE, DMA_FROMDEVICE);
2067                         hp->rx_skbs[elem] = new_skb;
2068                         new_skb->dev = dev;
2069                         skb_put(new_skb, (ETH_FRAME_LEN + RX_OFFSET));
2070                         hme_write_rxd(hp, this,
2071                                       (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2072                                       hme_dma_map(hp, new_skb->data, RX_BUF_ALLOC_SIZE, DMA_FROMDEVICE));
2073                         skb_reserve(new_skb, RX_OFFSET);
2074
2075                         /* Trim the original skb for the netif. */
2076                         skb_trim(skb, len);
2077                 } else {
2078                         struct sk_buff *copy_skb = dev_alloc_skb(len + 2);
2079
2080                         if (copy_skb == NULL) {
2081                                 drops++;
2082                                 goto drop_it;
2083                         }
2084
2085                         copy_skb->dev = dev;
2086                         skb_reserve(copy_skb, 2);
2087                         skb_put(copy_skb, len);
2088                         hme_dma_sync_for_cpu(hp, dma_addr, len, DMA_FROMDEVICE);
2089                         memcpy(copy_skb->data, skb->data, len);
2090                         hme_dma_sync_for_device(hp, dma_addr, len, DMA_FROMDEVICE);
2091
2092                         /* Reuse original ring buffer. */
2093                         hme_write_rxd(hp, this,
2094                                       (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2095                                       dma_addr);
2096
2097                         skb = copy_skb;
2098                 }
2099
2100                 /* This card is _fucking_ hot... */
2101                 skb->csum = ntohs(csum ^ 0xffff);
2102                 skb->ip_summed = CHECKSUM_HW;
2103
2104                 RXD(("len=%d csum=%4x]", len, csum));
2105                 skb->protocol = eth_type_trans(skb, dev);
2106                 netif_rx(skb);
2107
2108                 dev->last_rx = jiffies;
2109                 hp->net_stats.rx_packets++;
2110                 hp->net_stats.rx_bytes += len;
2111         next:
2112                 elem = NEXT_RX(elem);
2113                 this = &rxbase[elem];
2114         }
2115         hp->rx_new = elem;
2116         if (drops)
2117                 printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n", hp->dev->name);
2118         RXD((">"));
2119 }
2120
2121 static irqreturn_t happy_meal_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2122 {
2123         struct net_device *dev = (struct net_device *) dev_id;
2124         struct happy_meal *hp  = dev->priv;
2125         u32 happy_status       = hme_read32(hp, hp->gregs + GREG_STAT);
2126
2127         HMD(("happy_meal_interrupt: status=%08x ", happy_status));
2128
2129         spin_lock(&hp->happy_lock);
2130
2131         if (happy_status & GREG_STAT_ERRORS) {
2132                 HMD(("ERRORS "));
2133                 if (happy_meal_is_not_so_happy(hp, /* un- */ happy_status))
2134                         goto out;
2135         }
2136
2137         if (happy_status & GREG_STAT_MIFIRQ) {
2138                 HMD(("MIFIRQ "));
2139                 happy_meal_mif_interrupt(hp);
2140         }
2141
2142         if (happy_status & GREG_STAT_TXALL) {
2143                 HMD(("TXALL "));
2144                 happy_meal_tx(hp);
2145         }
2146
2147         if (happy_status & GREG_STAT_RXTOHOST) {
2148                 HMD(("RXTOHOST "));
2149                 happy_meal_rx(hp, dev);
2150         }
2151
2152         HMD(("done\n"));
2153 out:
2154         spin_unlock(&hp->happy_lock);
2155
2156         return IRQ_HANDLED;
2157 }
2158
2159 #ifdef CONFIG_SBUS
2160 static irqreturn_t quattro_sbus_interrupt(int irq, void *cookie, struct pt_regs *ptregs)
2161 {
2162         struct quattro *qp = (struct quattro *) cookie;
2163         int i;
2164
2165         for (i = 0; i < 4; i++) {
2166                 struct net_device *dev = qp->happy_meals[i];
2167                 struct happy_meal *hp  = dev->priv;
2168                 u32 happy_status       = hme_read32(hp, hp->gregs + GREG_STAT);
2169
2170                 HMD(("quattro_interrupt: status=%08x ", happy_status));
2171
2172                 if (!(happy_status & (GREG_STAT_ERRORS |
2173                                       GREG_STAT_MIFIRQ |
2174                                       GREG_STAT_TXALL |
2175                                       GREG_STAT_RXTOHOST)))
2176                         continue;
2177
2178                 spin_lock(&hp->happy_lock);
2179
2180                 if (happy_status & GREG_STAT_ERRORS) {
2181                         HMD(("ERRORS "));
2182                         if (happy_meal_is_not_so_happy(hp, happy_status))
2183                                 goto next;
2184                 }
2185
2186                 if (happy_status & GREG_STAT_MIFIRQ) {
2187                         HMD(("MIFIRQ "));
2188                         happy_meal_mif_interrupt(hp);
2189                 }
2190
2191                 if (happy_status & GREG_STAT_TXALL) {
2192                         HMD(("TXALL "));
2193                         happy_meal_tx(hp);
2194                 }
2195
2196                 if (happy_status & GREG_STAT_RXTOHOST) {
2197                         HMD(("RXTOHOST "));
2198                         happy_meal_rx(hp, dev);
2199                 }
2200
2201         next:
2202                 spin_unlock(&hp->happy_lock);
2203         }
2204         HMD(("done\n"));
2205
2206         return IRQ_HANDLED;
2207 }
2208 #endif
2209
2210 static int happy_meal_open(struct net_device *dev)
2211 {
2212         struct happy_meal *hp = dev->priv;
2213         int res;
2214
2215         HMD(("happy_meal_open: "));
2216
2217         /* On SBUS Quattro QFE cards, all hme interrupts are concentrated
2218          * into a single source which we register handling at probe time.
2219          */
2220         if ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO) {
2221                 if (request_irq(dev->irq, &happy_meal_interrupt,
2222                                 SA_SHIRQ, dev->name, (void *)dev)) {
2223                         HMD(("EAGAIN\n"));
2224                         printk(KERN_ERR "happy_meal(SBUS): Can't order irq %d to go.\n",
2225                                dev->irq);
2226
2227                         return -EAGAIN;
2228                 }
2229         }
2230
2231         HMD(("to happy_meal_init\n"));
2232
2233         spin_lock_irq(&hp->happy_lock);
2234         res = happy_meal_init(hp);
2235         spin_unlock_irq(&hp->happy_lock);
2236
2237         if (res && ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO))
2238                 free_irq(dev->irq, dev);
2239         return res;
2240 }
2241
2242 static int happy_meal_close(struct net_device *dev)
2243 {
2244         struct happy_meal *hp = dev->priv;
2245
2246         spin_lock_irq(&hp->happy_lock);
2247         happy_meal_stop(hp, hp->gregs);
2248         happy_meal_clean_rings(hp);
2249
2250         /* If auto-negotiation timer is running, kill it. */
2251         del_timer(&hp->happy_timer);
2252
2253         spin_unlock_irq(&hp->happy_lock);
2254
2255         /* On Quattro QFE cards, all hme interrupts are concentrated
2256          * into a single source which we register handling at probe
2257          * time and never unregister.
2258          */
2259         if ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO)
2260                 free_irq(dev->irq, dev);
2261
2262         return 0;
2263 }
2264
2265 #ifdef SXDEBUG
2266 #define SXD(x) printk x
2267 #else
2268 #define SXD(x)
2269 #endif
2270
2271 static void happy_meal_tx_timeout(struct net_device *dev)
2272 {
2273         struct happy_meal *hp = dev->priv;
2274
2275         printk (KERN_ERR "%s: transmit timed out, resetting\n", dev->name);
2276         tx_dump_log();
2277         printk (KERN_ERR "%s: Happy Status %08x TX[%08x:%08x]\n", dev->name,
2278                 hme_read32(hp, hp->gregs + GREG_STAT),
2279                 hme_read32(hp, hp->etxregs + ETX_CFG),
2280                 hme_read32(hp, hp->bigmacregs + BMAC_TXCFG));
2281
2282         spin_lock_irq(&hp->happy_lock);
2283         happy_meal_init(hp);
2284         spin_unlock_irq(&hp->happy_lock);
2285
2286         netif_wake_queue(dev);
2287 }
2288
2289 static int happy_meal_start_xmit(struct sk_buff *skb, struct net_device *dev)
2290 {
2291         struct happy_meal *hp = dev->priv;
2292         int entry;
2293         u32 tx_flags;
2294
2295         tx_flags = TXFLAG_OWN;
2296         if (skb->ip_summed == CHECKSUM_HW) {
2297                 u32 csum_start_off, csum_stuff_off;
2298
2299                 csum_start_off = (u32) (skb->h.raw - skb->data);
2300                 csum_stuff_off = (u32) ((skb->h.raw + skb->csum) - skb->data);
2301
2302                 tx_flags = (TXFLAG_OWN | TXFLAG_CSENABLE |
2303                             ((csum_start_off << 14) & TXFLAG_CSBUFBEGIN) |
2304                             ((csum_stuff_off << 20) & TXFLAG_CSLOCATION));
2305         }
2306
2307         spin_lock_irq(&hp->happy_lock);
2308
2309         if (TX_BUFFS_AVAIL(hp) <= (skb_shinfo(skb)->nr_frags + 1)) {
2310                 netif_stop_queue(dev);
2311                 spin_unlock_irq(&hp->happy_lock);
2312                 printk(KERN_ERR "%s: BUG! Tx Ring full when queue awake!\n",
2313                        dev->name);
2314                 return 1;
2315         }
2316
2317         entry = hp->tx_new;
2318         SXD(("SX<l[%d]e[%d]>", len, entry));
2319         hp->tx_skbs[entry] = skb;
2320
2321         if (skb_shinfo(skb)->nr_frags == 0) {
2322                 u32 mapping, len;
2323
2324                 len = skb->len;
2325                 mapping = hme_dma_map(hp, skb->data, len, DMA_TODEVICE);
2326                 tx_flags |= (TXFLAG_SOP | TXFLAG_EOP);
2327                 hme_write_txd(hp, &hp->happy_block->happy_meal_txd[entry],
2328                               (tx_flags | (len & TXFLAG_SIZE)),
2329                               mapping);
2330                 entry = NEXT_TX(entry);
2331         } else {
2332                 u32 first_len, first_mapping;
2333                 int frag, first_entry = entry;
2334
2335                 /* We must give this initial chunk to the device last.
2336                  * Otherwise we could race with the device.
2337                  */
2338                 first_len = skb_headlen(skb);
2339                 first_mapping = hme_dma_map(hp, skb->data, first_len, DMA_TODEVICE);
2340                 entry = NEXT_TX(entry);
2341
2342                 for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) {
2343                         skb_frag_t *this_frag = &skb_shinfo(skb)->frags[frag];
2344                         u32 len, mapping, this_txflags;
2345
2346                         len = this_frag->size;
2347                         mapping = hme_dma_map(hp,
2348                                               ((void *) page_address(this_frag->page) +
2349                                                this_frag->page_offset),
2350                                               len, DMA_TODEVICE);
2351                         this_txflags = tx_flags;
2352                         if (frag == skb_shinfo(skb)->nr_frags - 1)
2353                                 this_txflags |= TXFLAG_EOP;
2354                         hme_write_txd(hp, &hp->happy_block->happy_meal_txd[entry],
2355                                       (this_txflags | (len & TXFLAG_SIZE)),
2356                                       mapping);
2357                         entry = NEXT_TX(entry);
2358                 }
2359                 hme_write_txd(hp, &hp->happy_block->happy_meal_txd[first_entry],
2360                               (tx_flags | TXFLAG_SOP | (first_len & TXFLAG_SIZE)),
2361                               first_mapping);
2362         }
2363
2364         hp->tx_new = entry;
2365
2366         if (TX_BUFFS_AVAIL(hp) <= (MAX_SKB_FRAGS + 1))
2367                 netif_stop_queue(dev);
2368
2369         /* Get it going. */
2370         hme_write32(hp, hp->etxregs + ETX_PENDING, ETX_TP_DMAWAKEUP);
2371
2372         spin_unlock_irq(&hp->happy_lock);
2373
2374         dev->trans_start = jiffies;
2375
2376         tx_add_log(hp, TXLOG_ACTION_TXMIT, 0);
2377         return 0;
2378 }
2379
2380 static struct net_device_stats *happy_meal_get_stats(struct net_device *dev)
2381 {
2382         struct happy_meal *hp = dev->priv;
2383
2384         spin_lock_irq(&hp->happy_lock);
2385         happy_meal_get_counters(hp, hp->bigmacregs);
2386         spin_unlock_irq(&hp->happy_lock);
2387
2388         return &hp->net_stats;
2389 }
2390
2391 static void happy_meal_set_multicast(struct net_device *dev)
2392 {
2393         struct happy_meal *hp = dev->priv;
2394         void __iomem *bregs = hp->bigmacregs;
2395         struct dev_mc_list *dmi = dev->mc_list;
2396         char *addrs;
2397         int i;
2398         u32 crc;
2399
2400         spin_lock_irq(&hp->happy_lock);
2401
2402         netif_stop_queue(dev);
2403
2404         if ((dev->flags & IFF_ALLMULTI) || (dev->mc_count > 64)) {
2405                 hme_write32(hp, bregs + BMAC_HTABLE0, 0xffff);
2406                 hme_write32(hp, bregs + BMAC_HTABLE1, 0xffff);
2407                 hme_write32(hp, bregs + BMAC_HTABLE2, 0xffff);
2408                 hme_write32(hp, bregs + BMAC_HTABLE3, 0xffff);
2409         } else if (dev->flags & IFF_PROMISC) {
2410                 hme_write32(hp, bregs + BMAC_RXCFG,
2411                             hme_read32(hp, bregs + BMAC_RXCFG) | BIGMAC_RXCFG_PMISC);
2412         } else {
2413                 u16 hash_table[4];
2414
2415                 for (i = 0; i < 4; i++)
2416                         hash_table[i] = 0;
2417
2418                 for (i = 0; i < dev->mc_count; i++) {
2419                         addrs = dmi->dmi_addr;
2420                         dmi = dmi->next;
2421
2422                         if (!(*addrs & 1))
2423                                 continue;
2424
2425                         crc = ether_crc_le(6, addrs);
2426                         crc >>= 26;
2427                         hash_table[crc >> 4] |= 1 << (crc & 0xf);
2428                 }
2429                 hme_write32(hp, bregs + BMAC_HTABLE0, hash_table[0]);
2430                 hme_write32(hp, bregs + BMAC_HTABLE1, hash_table[1]);
2431                 hme_write32(hp, bregs + BMAC_HTABLE2, hash_table[2]);
2432                 hme_write32(hp, bregs + BMAC_HTABLE3, hash_table[3]);
2433         }
2434
2435         netif_wake_queue(dev);
2436
2437         spin_unlock_irq(&hp->happy_lock);
2438 }
2439
2440 /* Ethtool support... */
2441 static int hme_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2442 {
2443         struct happy_meal *hp = dev->priv;
2444
2445         cmd->supported =
2446                 (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
2447                  SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
2448                  SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII);
2449
2450         /* XXX hardcoded stuff for now */
2451         cmd->port = PORT_TP; /* XXX no MII support */
2452         cmd->transceiver = XCVR_INTERNAL; /* XXX no external xcvr support */
2453         cmd->phy_address = 0; /* XXX fixed PHYAD */
2454
2455         /* Record PHY settings. */
2456         spin_lock_irq(&hp->happy_lock);
2457         hp->sw_bmcr = happy_meal_tcvr_read(hp, hp->tcvregs, MII_BMCR);
2458         hp->sw_lpa = happy_meal_tcvr_read(hp, hp->tcvregs, MII_LPA);
2459         spin_unlock_irq(&hp->happy_lock);
2460
2461         if (hp->sw_bmcr & BMCR_ANENABLE) {
2462                 cmd->autoneg = AUTONEG_ENABLE;
2463                 cmd->speed =
2464                         (hp->sw_lpa & (LPA_100HALF | LPA_100FULL)) ?
2465                         SPEED_100 : SPEED_10;
2466                 if (cmd->speed == SPEED_100)
2467                         cmd->duplex =
2468                                 (hp->sw_lpa & (LPA_100FULL)) ?
2469                                 DUPLEX_FULL : DUPLEX_HALF;
2470                 else
2471                         cmd->duplex =
2472                                 (hp->sw_lpa & (LPA_10FULL)) ?
2473                                 DUPLEX_FULL : DUPLEX_HALF;
2474         } else {
2475                 cmd->autoneg = AUTONEG_DISABLE;
2476                 cmd->speed =
2477                         (hp->sw_bmcr & BMCR_SPEED100) ?
2478                         SPEED_100 : SPEED_10;
2479                 cmd->duplex =
2480                         (hp->sw_bmcr & BMCR_FULLDPLX) ?
2481                         DUPLEX_FULL : DUPLEX_HALF;
2482         }
2483         return 0;
2484 }
2485
2486 static int hme_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
2487 {
2488         struct happy_meal *hp = dev->priv;
2489
2490         /* Verify the settings we care about. */
2491         if (cmd->autoneg != AUTONEG_ENABLE &&
2492             cmd->autoneg != AUTONEG_DISABLE)
2493                 return -EINVAL;
2494         if (cmd->autoneg == AUTONEG_DISABLE &&
2495             ((cmd->speed != SPEED_100 &&
2496               cmd->speed != SPEED_10) ||
2497              (cmd->duplex != DUPLEX_HALF &&
2498               cmd->duplex != DUPLEX_FULL)))
2499                 return -EINVAL;
2500
2501         /* Ok, do it to it. */
2502         spin_lock_irq(&hp->happy_lock);
2503         del_timer(&hp->happy_timer);
2504         happy_meal_begin_auto_negotiation(hp, hp->tcvregs, cmd);
2505         spin_unlock_irq(&hp->happy_lock);
2506
2507         return 0;
2508 }
2509
2510 static void hme_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
2511 {
2512         struct happy_meal *hp = dev->priv;
2513
2514         strcpy(info->driver, "sunhme");
2515         strcpy(info->version, "2.02");
2516         if (hp->happy_flags & HFLAG_PCI) {
2517                 struct pci_dev *pdev = hp->happy_dev;
2518                 strcpy(info->bus_info, pci_name(pdev));
2519         }
2520 #ifdef CONFIG_SBUS
2521         else {
2522                 struct sbus_dev *sdev = hp->happy_dev;
2523                 sprintf(info->bus_info, "SBUS:%d",
2524                         sdev->slot);
2525         }
2526 #endif
2527 }
2528
2529 static u32 hme_get_link(struct net_device *dev)
2530 {
2531         struct happy_meal *hp = dev->priv;
2532
2533         spin_lock_irq(&hp->happy_lock);
2534         hp->sw_bmcr = happy_meal_tcvr_read(hp, hp->tcvregs, MII_BMCR);
2535         spin_unlock_irq(&hp->happy_lock);
2536
2537         return (hp->sw_bmsr & BMSR_LSTATUS);
2538 }
2539
2540 static struct ethtool_ops hme_ethtool_ops = {
2541         .get_settings           = hme_get_settings,
2542         .set_settings           = hme_set_settings,
2543         .get_drvinfo            = hme_get_drvinfo,
2544         .get_link               = hme_get_link,
2545 };
2546
2547 static int hme_version_printed;
2548
2549 #ifdef CONFIG_SBUS
2550 void __init quattro_get_ranges(struct quattro *qp)
2551 {
2552         struct sbus_dev *sdev = qp->quattro_dev;
2553         int err;
2554
2555         err = prom_getproperty(sdev->prom_node,
2556                                "ranges",
2557                                (char *)&qp->ranges[0],
2558                                sizeof(qp->ranges));
2559         if (err == 0 || err == -1) {
2560                 qp->nranges = 0;
2561                 return;
2562         }
2563         qp->nranges = (err / sizeof(struct linux_prom_ranges));
2564 }
2565
2566 static void __init quattro_apply_ranges(struct quattro *qp, struct happy_meal *hp)
2567 {
2568         struct sbus_dev *sdev = hp->happy_dev;
2569         int rng;
2570
2571         for (rng = 0; rng < qp->nranges; rng++) {
2572                 struct linux_prom_ranges *rngp = &qp->ranges[rng];
2573                 int reg;
2574
2575                 for (reg = 0; reg < 5; reg++) {
2576                         if (sdev->reg_addrs[reg].which_io ==
2577                             rngp->ot_child_space)
2578                                 break;
2579                 }
2580                 if (reg == 5)
2581                         continue;
2582
2583                 sdev->reg_addrs[reg].which_io = rngp->ot_parent_space;
2584                 sdev->reg_addrs[reg].phys_addr += rngp->ot_parent_base;
2585         }
2586 }
2587
2588 /* Given a happy meal sbus device, find it's quattro parent.
2589  * If none exist, allocate and return a new one.
2590  *
2591  * Return NULL on failure.
2592  */
2593 static struct quattro * __init quattro_sbus_find(struct sbus_dev *goal_sdev)
2594 {
2595         struct sbus_bus *sbus;
2596         struct sbus_dev *sdev;
2597         struct quattro *qp;
2598         int i;
2599
2600         if (qfe_sbus_list == NULL)
2601                 goto found;
2602
2603         for (qp = qfe_sbus_list; qp != NULL; qp = qp->next) {
2604                 for (i = 0, sdev = qp->quattro_dev;
2605                      (sdev != NULL) && (i < 4);
2606                      sdev = sdev->next, i++) {
2607                         if (sdev == goal_sdev)
2608                                 return qp;
2609                 }
2610         }
2611         for_each_sbus(sbus) {
2612                 for_each_sbusdev(sdev, sbus) {
2613                         if (sdev == goal_sdev)
2614                                 goto found;
2615                 }
2616         }
2617
2618         /* Cannot find quattro parent, fail. */
2619         return NULL;
2620
2621 found:
2622         qp = kmalloc(sizeof(struct quattro), GFP_KERNEL);
2623         if (qp != NULL) {
2624                 int i;
2625
2626                 for (i = 0; i < 4; i++)
2627                         qp->happy_meals[i] = NULL;
2628
2629                 qp->quattro_dev = goal_sdev;
2630                 qp->next = qfe_sbus_list;
2631                 qfe_sbus_list = qp;
2632                 quattro_get_ranges(qp);
2633         }
2634         return qp;
2635 }
2636
2637 /* After all quattro cards have been probed, we call these functions
2638  * to register the IRQ handlers.
2639  */
2640 static void __init quattro_sbus_register_irqs(void)
2641 {
2642         struct quattro *qp;
2643
2644         for (qp = qfe_sbus_list; qp != NULL; qp = qp->next) {
2645                 struct sbus_dev *sdev = qp->quattro_dev;
2646                 int err;
2647
2648                 err = request_irq(sdev->irqs[0],
2649                                   quattro_sbus_interrupt,
2650                                   SA_SHIRQ, "Quattro",
2651                                   qp);
2652                 if (err != 0) {
2653                         printk(KERN_ERR "Quattro: Fatal IRQ registery error %d.\n", err);
2654                         panic("QFE request irq");
2655                 }
2656         }
2657 }
2658 #endif /* CONFIG_SBUS */
2659
2660 #ifdef CONFIG_PCI
2661 static struct quattro * __init quattro_pci_find(struct pci_dev *pdev)
2662 {
2663         struct pci_dev *bdev = pdev->bus->self;
2664         struct quattro *qp;
2665
2666         if (!bdev) return NULL;
2667         for (qp = qfe_pci_list; qp != NULL; qp = qp->next) {
2668                 struct pci_dev *qpdev = qp->quattro_dev;
2669
2670                 if (qpdev == bdev)
2671                         return qp;
2672         }
2673         qp = kmalloc(sizeof(struct quattro), GFP_KERNEL);
2674         if (qp != NULL) {
2675                 int i;
2676
2677                 for (i = 0; i < 4; i++)
2678                         qp->happy_meals[i] = NULL;
2679
2680                 qp->quattro_dev = bdev;
2681                 qp->next = qfe_pci_list;
2682                 qfe_pci_list = qp;
2683
2684                 /* No range tricks necessary on PCI. */
2685                 qp->nranges = 0;
2686         }
2687         return qp;
2688 }
2689 #endif /* CONFIG_PCI */
2690
2691 #ifdef CONFIG_SBUS
2692 static int __init happy_meal_sbus_init(struct sbus_dev *sdev, int is_qfe)
2693 {
2694         struct quattro *qp = NULL;
2695         struct happy_meal *hp;
2696         struct net_device *dev;
2697         int i, qfe_slot = -1;
2698         int err = -ENODEV;
2699
2700         if (is_qfe) {
2701                 qp = quattro_sbus_find(sdev);
2702                 if (qp == NULL)
2703                         goto err_out;
2704                 for (qfe_slot = 0; qfe_slot < 4; qfe_slot++)
2705                         if (qp->happy_meals[qfe_slot] == NULL)
2706                                 break;
2707                 if (qfe_slot == 4)
2708                         goto err_out;
2709         }
2710
2711         err = -ENOMEM;
2712         dev = alloc_etherdev(sizeof(struct happy_meal));
2713         if (!dev)
2714                 goto err_out;
2715         SET_MODULE_OWNER(dev);
2716
2717         if (hme_version_printed++ == 0)
2718                 printk(KERN_INFO "%s", version);
2719
2720         /* If user did not specify a MAC address specifically, use
2721          * the Quattro local-mac-address property...
2722          */
2723         for (i = 0; i < 6; i++) {
2724                 if (macaddr[i] != 0)
2725                         break;
2726         }
2727         if (i < 6) { /* a mac address was given */
2728                 for (i = 0; i < 6; i++)
2729                         dev->dev_addr[i] = macaddr[i];
2730                 macaddr[5]++;
2731         } else if (qfe_slot != -1 &&
2732                    prom_getproplen(sdev->prom_node,
2733                                    "local-mac-address") == 6) {
2734                 prom_getproperty(sdev->prom_node, "local-mac-address",
2735                                  dev->dev_addr, 6);
2736         } else {
2737                 memcpy(dev->dev_addr, idprom->id_ethaddr, 6);
2738         }
2739
2740         hp = dev->priv;
2741
2742         hp->happy_dev = sdev;
2743
2744         spin_lock_init(&hp->happy_lock);
2745
2746         err = -ENODEV;
2747         if (sdev->num_registers != 5) {
2748                 printk(KERN_ERR "happymeal: Device does not have 5 regs, it has %d.\n",
2749                        sdev->num_registers);
2750                 printk(KERN_ERR "happymeal: Would you like that for here or to go?\n");
2751                 goto err_out_free_netdev;
2752         }
2753
2754         if (qp != NULL) {
2755                 hp->qfe_parent = qp;
2756                 hp->qfe_ent = qfe_slot;
2757                 qp->happy_meals[qfe_slot] = dev;
2758                 quattro_apply_ranges(qp, hp);
2759         }
2760
2761         hp->gregs = sbus_ioremap(&sdev->resource[0], 0,
2762                                  GREG_REG_SIZE, "HME Global Regs");
2763         if (!hp->gregs) {
2764                 printk(KERN_ERR "happymeal: Cannot map Happy Meal global registers.\n");
2765                 goto err_out_free_netdev;
2766         }
2767
2768         hp->etxregs = sbus_ioremap(&sdev->resource[1], 0,
2769                                    ETX_REG_SIZE, "HME TX Regs");
2770         if (!hp->etxregs) {
2771                 printk(KERN_ERR "happymeal: Cannot map Happy Meal MAC Transmit registers.\n");
2772                 goto err_out_iounmap;
2773         }
2774
2775         hp->erxregs = sbus_ioremap(&sdev->resource[2], 0,
2776                                    ERX_REG_SIZE, "HME RX Regs");
2777         if (!hp->erxregs) {
2778                 printk(KERN_ERR "happymeal: Cannot map Happy Meal MAC Receive registers.\n");
2779                 goto err_out_iounmap;
2780         }
2781
2782         hp->bigmacregs = sbus_ioremap(&sdev->resource[3], 0,
2783                                       BMAC_REG_SIZE, "HME BIGMAC Regs");
2784         if (!hp->bigmacregs) {
2785                 printk(KERN_ERR "happymeal: Cannot map Happy Meal BIGMAC registers.\n");
2786                 goto err_out_iounmap;
2787         }
2788
2789         hp->tcvregs = sbus_ioremap(&sdev->resource[4], 0,
2790                                    TCVR_REG_SIZE, "HME Tranceiver Regs");
2791         if (!hp->tcvregs) {
2792                 printk(KERN_ERR "happymeal: Cannot map Happy Meal Tranceiver registers.\n");
2793                 goto err_out_iounmap;
2794         }
2795
2796         hp->hm_revision = prom_getintdefault(sdev->prom_node, "hm-rev", 0xff);
2797         if (hp->hm_revision == 0xff)
2798                 hp->hm_revision = 0xa0;
2799
2800         /* Now enable the feature flags we can. */
2801         if (hp->hm_revision == 0x20 || hp->hm_revision == 0x21)
2802                 hp->happy_flags = HFLAG_20_21;
2803         else if (hp->hm_revision != 0xa0)
2804                 hp->happy_flags = HFLAG_NOT_A0;
2805
2806         if (qp != NULL)
2807                 hp->happy_flags |= HFLAG_QUATTRO;
2808
2809         /* Get the supported DVMA burst sizes from our Happy SBUS. */
2810         hp->happy_bursts = prom_getintdefault(sdev->bus->prom_node,
2811                                               "burst-sizes", 0x00);
2812
2813         hp->happy_block = sbus_alloc_consistent(hp->happy_dev,
2814                                                 PAGE_SIZE,
2815                                                 &hp->hblock_dvma);
2816         err = -ENOMEM;
2817         if (!hp->happy_block) {
2818                 printk(KERN_ERR "happymeal: Cannot allocate descriptors.\n");
2819                 goto err_out_iounmap;
2820         }
2821
2822         /* Force check of the link first time we are brought up. */
2823         hp->linkcheck = 0;
2824
2825         /* Force timer state to 'asleep' with count of zero. */
2826         hp->timer_state = asleep;
2827         hp->timer_ticks = 0;
2828
2829         init_timer(&hp->happy_timer);
2830
2831         hp->dev = dev;
2832         dev->open = &happy_meal_open;
2833         dev->stop = &happy_meal_close;
2834         dev->hard_start_xmit = &happy_meal_start_xmit;
2835         dev->get_stats = &happy_meal_get_stats;
2836         dev->set_multicast_list = &happy_meal_set_multicast;
2837         dev->tx_timeout = &happy_meal_tx_timeout;
2838         dev->watchdog_timeo = 5*HZ;
2839         dev->ethtool_ops = &hme_ethtool_ops;
2840
2841         /* Happy Meal can do it all... except VLAN. */
2842         dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_VLAN_CHALLENGED;
2843
2844         dev->irq = sdev->irqs[0];
2845
2846 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
2847         /* Hook up PCI register/dma accessors. */
2848         hp->read_desc32 = sbus_hme_read_desc32;
2849         hp->write_txd = sbus_hme_write_txd;
2850         hp->write_rxd = sbus_hme_write_rxd;
2851         hp->dma_map = (u32 (*)(void *, void *, long, int))sbus_map_single;
2852         hp->dma_unmap = (void (*)(void *, u32, long, int))sbus_unmap_single;
2853         hp->dma_sync_for_cpu = (void (*)(void *, u32, long, int))
2854                 sbus_dma_sync_single_for_cpu;
2855         hp->dma_sync_for_device = (void (*)(void *, u32, long, int))
2856                 sbus_dma_sync_single_for_device;
2857         hp->read32 = sbus_hme_read32;
2858         hp->write32 = sbus_hme_write32;
2859 #endif
2860
2861         /* Grrr, Happy Meal comes up by default not advertising
2862          * full duplex 100baseT capabilities, fix this.
2863          */
2864         spin_lock_irq(&hp->happy_lock);
2865         happy_meal_set_initial_advertisement(hp);
2866         spin_unlock_irq(&hp->happy_lock);
2867
2868         if (register_netdev(hp->dev)) {
2869                 printk(KERN_ERR "happymeal: Cannot register net device, "
2870                        "aborting.\n");
2871                 goto err_out_free_consistent;
2872         }
2873
2874         if (qfe_slot != -1)
2875                 printk(KERN_INFO "%s: Quattro HME slot %d (SBUS) 10/100baseT Ethernet ",
2876                        dev->name, qfe_slot);
2877         else
2878                 printk(KERN_INFO "%s: HAPPY MEAL (SBUS) 10/100baseT Ethernet ",
2879                        dev->name);
2880
2881         for (i = 0; i < 6; i++)
2882                 printk("%2.2x%c",
2883                        dev->dev_addr[i], i == 5 ? ' ' : ':');
2884         printk("\n");
2885
2886         /* We are home free at this point, link us in to the happy
2887          * device list.
2888          */
2889         hp->next_module = root_happy_dev;
2890         root_happy_dev = hp;
2891
2892         return 0;
2893
2894 err_out_free_consistent:
2895         sbus_free_consistent(hp->happy_dev,
2896                              PAGE_SIZE,
2897                              hp->happy_block,
2898                              hp->hblock_dvma);
2899
2900 err_out_iounmap:
2901         if (hp->gregs)
2902                 sbus_iounmap(hp->gregs, GREG_REG_SIZE);
2903         if (hp->etxregs)
2904                 sbus_iounmap(hp->etxregs, ETX_REG_SIZE);
2905         if (hp->erxregs)
2906                 sbus_iounmap(hp->erxregs, ERX_REG_SIZE);
2907         if (hp->bigmacregs)
2908                 sbus_iounmap(hp->bigmacregs, BMAC_REG_SIZE);
2909         if (hp->tcvregs)
2910                 sbus_iounmap(hp->tcvregs, TCVR_REG_SIZE);
2911
2912 err_out_free_netdev:
2913         free_netdev(dev);
2914
2915 err_out:
2916         return err;
2917 }
2918 #endif
2919
2920 #ifdef CONFIG_PCI
2921 #ifndef __sparc__
2922 static int is_quattro_p(struct pci_dev *pdev)
2923 {
2924         struct pci_dev *busdev = pdev->bus->self;
2925         struct list_head *tmp;
2926         int n_hmes;
2927
2928         if (busdev == NULL ||
2929             busdev->vendor != PCI_VENDOR_ID_DEC ||
2930             busdev->device != PCI_DEVICE_ID_DEC_21153)
2931                 return 0;
2932
2933         n_hmes = 0;
2934         tmp = pdev->bus->devices.next;
2935         while (tmp != &pdev->bus->devices) {
2936                 struct pci_dev *this_pdev = pci_dev_b(tmp);
2937
2938                 if (this_pdev->vendor == PCI_VENDOR_ID_SUN &&
2939                     this_pdev->device == PCI_DEVICE_ID_SUN_HAPPYMEAL)
2940                         n_hmes++;
2941
2942                 tmp = tmp->next;
2943         }
2944
2945         if (n_hmes != 4)
2946                 return 0;
2947
2948         return 1;
2949 }
2950
2951 /* Fetch MAC address from vital product data of PCI ROM. */
2952 static int find_eth_addr_in_vpd(void __iomem *rom_base, int len, int index, unsigned char *dev_addr)
2953 {
2954         int this_offset;
2955
2956         for (this_offset = 0x20; this_offset < len; this_offset++) {
2957                 void __iomem *p = rom_base + this_offset;
2958
2959                 if (readb(p + 0) != 0x90 ||
2960                     readb(p + 1) != 0x00 ||
2961                     readb(p + 2) != 0x09 ||
2962                     readb(p + 3) != 0x4e ||
2963                     readb(p + 4) != 0x41 ||
2964                     readb(p + 5) != 0x06)
2965                         continue;
2966
2967                 this_offset += 6;
2968                 p += 6;
2969
2970                 if (index == 0) {
2971                         int i;
2972
2973                         for (i = 0; i < 6; i++)
2974                                 dev_addr[i] = readb(p + i);
2975                         return 1;
2976                 }
2977                 index--;
2978         }
2979         return 0;
2980 }
2981
2982 static void get_hme_mac_nonsparc(struct pci_dev *pdev, unsigned char *dev_addr)
2983 {
2984         size_t size;
2985         void __iomem *p = pci_map_rom(pdev, &size);
2986
2987         if (p) {
2988                 int index = 0;
2989                 int found;
2990
2991                 if (is_quattro_p(pdev))
2992                         index = PCI_SLOT(pdev->devfn);
2993
2994                 found = readb(p) == 0x55 &&
2995                         readb(p + 1) == 0xaa &&
2996                         find_eth_addr_in_vpd(p, (64 * 1024), index, dev_addr);
2997                 pci_unmap_rom(pdev, p);
2998                 if (found)
2999                         return;
3000         }
3001
3002         /* Sun MAC prefix then 3 random bytes. */
3003         dev_addr[0] = 0x08;
3004         dev_addr[1] = 0x00;
3005         dev_addr[2] = 0x20;
3006         get_random_bytes(&dev_addr[3], 3);
3007         return;
3008 }
3009 #endif /* !(__sparc__) */
3010
3011 static int __init happy_meal_pci_init(struct pci_dev *pdev)
3012 {
3013         struct quattro *qp = NULL;
3014 #ifdef __sparc__
3015         struct pcidev_cookie *pcp;
3016         int node;
3017 #endif
3018         struct happy_meal *hp;
3019         struct net_device *dev;
3020         void __iomem *hpreg_base;
3021         unsigned long hpreg_res;
3022         int i, qfe_slot = -1;
3023         char prom_name[64];
3024         int err;
3025
3026         /* Now make sure pci_dev cookie is there. */
3027 #ifdef __sparc__
3028         pcp = pdev->sysdata;
3029         if (pcp == NULL || pcp->prom_node == -1) {
3030                 printk(KERN_ERR "happymeal(PCI): Some PCI device info missing\n");
3031                 return -ENODEV;
3032         }
3033         node = pcp->prom_node;
3034
3035         prom_getstring(node, "name", prom_name, sizeof(prom_name));
3036 #else
3037         if (is_quattro_p(pdev))
3038                 strcpy(prom_name, "SUNW,qfe");
3039         else
3040                 strcpy(prom_name, "SUNW,hme");
3041 #endif
3042
3043         err = -ENODEV;
3044         if (!strcmp(prom_name, "SUNW,qfe") || !strcmp(prom_name, "qfe")) {
3045                 qp = quattro_pci_find(pdev);
3046                 if (qp == NULL)
3047                         goto err_out;
3048                 for (qfe_slot = 0; qfe_slot < 4; qfe_slot++)
3049                         if (qp->happy_meals[qfe_slot] == NULL)
3050                                 break;
3051                 if (qfe_slot == 4)
3052                         goto err_out;
3053         }
3054
3055         dev = alloc_etherdev(sizeof(struct happy_meal));
3056         err = -ENOMEM;
3057         if (!dev)
3058                 goto err_out;
3059         SET_MODULE_OWNER(dev);
3060         SET_NETDEV_DEV(dev, &pdev->dev);
3061
3062         if (hme_version_printed++ == 0)
3063                 printk(KERN_INFO "%s", version);
3064
3065         dev->base_addr = (long) pdev;
3066
3067         hp = (struct happy_meal *)dev->priv;
3068         memset(hp, 0, sizeof(*hp));
3069
3070         hp->happy_dev = pdev;
3071
3072         spin_lock_init(&hp->happy_lock);
3073
3074         if (qp != NULL) {
3075                 hp->qfe_parent = qp;
3076                 hp->qfe_ent = qfe_slot;
3077                 qp->happy_meals[qfe_slot] = dev;
3078         }
3079
3080         hpreg_res = pci_resource_start(pdev, 0);
3081         err = -ENODEV;
3082         if ((pci_resource_flags(pdev, 0) & IORESOURCE_IO) != 0) {
3083                 printk(KERN_ERR "happymeal(PCI): Cannot find proper PCI device base address.\n");
3084                 goto err_out_clear_quattro;
3085         }
3086         if (pci_request_regions(pdev, DRV_NAME)) {
3087                 printk(KERN_ERR "happymeal(PCI): Cannot obtain PCI resources, "
3088                        "aborting.\n");
3089                 goto err_out_clear_quattro;
3090         }
3091
3092         if ((hpreg_base = ioremap(hpreg_res, 0x8000)) == 0) {
3093                 printk(KERN_ERR "happymeal(PCI): Unable to remap card memory.\n");
3094                 goto err_out_free_res;
3095         }
3096
3097         for (i = 0; i < 6; i++) {
3098                 if (macaddr[i] != 0)
3099                         break;
3100         }
3101         if (i < 6) { /* a mac address was given */
3102                 for (i = 0; i < 6; i++)
3103                         dev->dev_addr[i] = macaddr[i];
3104                 macaddr[5]++;
3105         } else {
3106 #ifdef __sparc__
3107                 if (qfe_slot != -1 &&
3108                     prom_getproplen(node, "local-mac-address") == 6) {
3109                         prom_getproperty(node, "local-mac-address",
3110                                          dev->dev_addr, 6);
3111                 } else {
3112                         memcpy(dev->dev_addr, idprom->id_ethaddr, 6);
3113                 }
3114 #else
3115                 get_hme_mac_nonsparc(pdev, &dev->dev_addr[0]);
3116 #endif
3117         }
3118
3119         /* Layout registers. */
3120         hp->gregs      = (hpreg_base + 0x0000UL);
3121         hp->etxregs    = (hpreg_base + 0x2000UL);
3122         hp->erxregs    = (hpreg_base + 0x4000UL);
3123         hp->bigmacregs = (hpreg_base + 0x6000UL);
3124         hp->tcvregs    = (hpreg_base + 0x7000UL);
3125
3126 #ifdef __sparc__
3127         hp->hm_revision = prom_getintdefault(node, "hm-rev", 0xff);
3128         if (hp->hm_revision == 0xff) {
3129                 unsigned char prev;
3130
3131                 pci_read_config_byte(pdev, PCI_REVISION_ID, &prev);
3132                 hp->hm_revision = 0xc0 | (prev & 0x0f);
3133         }
3134 #else
3135         /* works with this on non-sparc hosts */
3136         hp->hm_revision = 0x20;
3137 #endif
3138
3139         /* Now enable the feature flags we can. */
3140         if (hp->hm_revision == 0x20 || hp->hm_revision == 0x21)
3141                 hp->happy_flags = HFLAG_20_21;
3142         else if (hp->hm_revision != 0xa0 && hp->hm_revision != 0xc0)
3143                 hp->happy_flags = HFLAG_NOT_A0;
3144
3145         if (qp != NULL)
3146                 hp->happy_flags |= HFLAG_QUATTRO;
3147
3148         /* And of course, indicate this is PCI. */
3149         hp->happy_flags |= HFLAG_PCI;
3150
3151 #ifdef __sparc__
3152         /* Assume PCI happy meals can handle all burst sizes. */
3153         hp->happy_bursts = DMA_BURSTBITS;
3154 #endif
3155
3156         hp->happy_block = (struct hmeal_init_block *)
3157                 pci_alloc_consistent(pdev, PAGE_SIZE, &hp->hblock_dvma);
3158
3159         err = -ENODEV;
3160         if (!hp->happy_block) {
3161                 printk(KERN_ERR "happymeal(PCI): Cannot get hme init block.\n");
3162                 goto err_out_iounmap;
3163         }
3164
3165         hp->linkcheck = 0;
3166         hp->timer_state = asleep;
3167         hp->timer_ticks = 0;
3168
3169         init_timer(&hp->happy_timer);
3170
3171         hp->dev = dev;
3172         dev->open = &happy_meal_open;
3173         dev->stop = &happy_meal_close;
3174         dev->hard_start_xmit = &happy_meal_start_xmit;
3175         dev->get_stats = &happy_meal_get_stats;
3176         dev->set_multicast_list = &happy_meal_set_multicast;
3177         dev->tx_timeout = &happy_meal_tx_timeout;
3178         dev->watchdog_timeo = 5*HZ;
3179         dev->ethtool_ops = &hme_ethtool_ops;
3180         dev->irq = pdev->irq;
3181         dev->dma = 0;
3182
3183         /* Happy Meal can do it all... */
3184         dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM;
3185
3186 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
3187         /* Hook up PCI register/dma accessors. */
3188         hp->read_desc32 = pci_hme_read_desc32;
3189         hp->write_txd = pci_hme_write_txd;
3190         hp->write_rxd = pci_hme_write_rxd;
3191         hp->dma_map = (u32 (*)(void *, void *, long, int))pci_map_single;
3192         hp->dma_unmap = (void (*)(void *, u32, long, int))pci_unmap_single;
3193         hp->dma_sync_for_cpu = (void (*)(void *, u32, long, int))
3194                 pci_dma_sync_single_for_cpu;
3195         hp->dma_sync_for_device = (void (*)(void *, u32, long, int))
3196                 pci_dma_sync_single_for_device;
3197         hp->read32 = pci_hme_read32;
3198         hp->write32 = pci_hme_write32;
3199 #endif
3200
3201         /* Grrr, Happy Meal comes up by default not advertising
3202          * full duplex 100baseT capabilities, fix this.
3203          */
3204         spin_lock_irq(&hp->happy_lock);
3205         happy_meal_set_initial_advertisement(hp);
3206         spin_unlock_irq(&hp->happy_lock);
3207
3208         if (register_netdev(hp->dev)) {
3209                 printk(KERN_ERR "happymeal(PCI): Cannot register net device, "
3210                        "aborting.\n");
3211                 goto err_out_iounmap;
3212         }
3213
3214         if (!qfe_slot) {
3215                 struct pci_dev *qpdev = qp->quattro_dev;
3216
3217                 prom_name[0] = 0;
3218                 if (!strncmp(dev->name, "eth", 3)) {
3219                         int i = simple_strtoul(dev->name + 3, NULL, 10);
3220                         sprintf(prom_name, "-%d", i + 3);
3221                 }
3222                 printk(KERN_INFO "%s%s: Quattro HME (PCI/CheerIO) 10/100baseT Ethernet ", dev->name, prom_name);
3223                 if (qpdev->vendor == PCI_VENDOR_ID_DEC &&
3224                     qpdev->device == PCI_DEVICE_ID_DEC_21153)
3225                         printk("DEC 21153 PCI Bridge\n");
3226                 else
3227                         printk("unknown bridge %04x.%04x\n",
3228                                 qpdev->vendor, qpdev->device);
3229         }
3230
3231         if (qfe_slot != -1)
3232                 printk(KERN_INFO "%s: Quattro HME slot %d (PCI/CheerIO) 10/100baseT Ethernet ",
3233                        dev->name, qfe_slot);
3234         else
3235                 printk(KERN_INFO "%s: HAPPY MEAL (PCI/CheerIO) 10/100BaseT Ethernet ",
3236                        dev->name);
3237
3238         for (i = 0; i < 6; i++)
3239                 printk("%2.2x%c", dev->dev_addr[i], i == 5 ? ' ' : ':');
3240
3241         printk("\n");
3242
3243         /* We are home free at this point, link us in to the happy
3244          * device list.
3245          */
3246         hp->next_module = root_happy_dev;
3247         root_happy_dev = hp;
3248
3249         return 0;
3250
3251 err_out_iounmap:
3252         iounmap(hp->gregs);
3253
3254 err_out_free_res:
3255         pci_release_regions(pdev);
3256
3257 err_out_clear_quattro:
3258         if (qp != NULL)
3259                 qp->happy_meals[qfe_slot] = NULL;
3260
3261         free_netdev(dev);
3262
3263 err_out:
3264         return err;
3265 }
3266 #endif
3267
3268 #ifdef CONFIG_SBUS
3269 static int __init happy_meal_sbus_probe(void)
3270 {
3271         struct sbus_bus *sbus;
3272         struct sbus_dev *sdev;
3273         int cards = 0;
3274         char model[128];
3275
3276         for_each_sbus(sbus) {
3277                 for_each_sbusdev(sdev, sbus) {
3278                         char *name = sdev->prom_name;
3279
3280                         if (!strcmp(name, "SUNW,hme")) {
3281                                 cards++;
3282                                 prom_getstring(sdev->prom_node, "model",
3283                                                model, sizeof(model));
3284                                 if (!strcmp(model, "SUNW,sbus-qfe"))
3285                                         happy_meal_sbus_init(sdev, 1);
3286                                 else
3287                                         happy_meal_sbus_init(sdev, 0);
3288                         } else if (!strcmp(name, "qfe") ||
3289                                    !strcmp(name, "SUNW,qfe")) {
3290                                 cards++;
3291                                 happy_meal_sbus_init(sdev, 1);
3292                         }
3293                 }
3294         }
3295         if (cards != 0)
3296                 quattro_sbus_register_irqs();
3297         return cards;
3298 }
3299 #endif
3300
3301 #ifdef CONFIG_PCI
3302 static int __init happy_meal_pci_probe(void)
3303 {
3304         struct pci_dev *pdev = NULL;
3305         int cards = 0;
3306
3307         while ((pdev = pci_find_device(PCI_VENDOR_ID_SUN,
3308                                        PCI_DEVICE_ID_SUN_HAPPYMEAL, pdev)) != NULL) {
3309                 if (pci_enable_device(pdev))
3310                         continue;
3311                 pci_set_master(pdev);
3312                 cards++;
3313                 happy_meal_pci_init(pdev);
3314         }
3315         return cards;
3316 }
3317 #endif
3318
3319 static int __init happy_meal_probe(void)
3320 {
3321         static int called = 0;
3322         int cards;
3323
3324         root_happy_dev = NULL;
3325
3326         if (called)
3327                 return -ENODEV;
3328         called++;
3329
3330         cards = 0;
3331 #ifdef CONFIG_SBUS
3332         cards += happy_meal_sbus_probe();
3333 #endif
3334 #ifdef CONFIG_PCI
3335         cards += happy_meal_pci_probe();
3336 #endif
3337         if (!cards)
3338                 return -ENODEV;
3339         return 0;
3340 }
3341
3342
3343 static void __exit happy_meal_cleanup_module(void)
3344 {
3345 #ifdef CONFIG_SBUS
3346         struct quattro *last_seen_qfe = NULL;
3347 #endif
3348
3349         while (root_happy_dev) {
3350                 struct happy_meal *hp = root_happy_dev;
3351                 struct happy_meal *next = root_happy_dev->next_module;
3352                 struct net_device *dev = hp->dev;
3353
3354                 /* Unregister netdev before unmapping registers as this
3355                  * call can end up trying to access those registers.
3356                  */
3357                 unregister_netdev(dev);
3358
3359 #ifdef CONFIG_SBUS
3360                 if (!(hp->happy_flags & HFLAG_PCI)) {
3361                         if (hp->happy_flags & HFLAG_QUATTRO) {
3362                                 if (hp->qfe_parent != last_seen_qfe) {
3363                                         free_irq(dev->irq, hp->qfe_parent);
3364                                         last_seen_qfe = hp->qfe_parent;
3365                                 }
3366                         }
3367
3368                         sbus_iounmap(hp->gregs, GREG_REG_SIZE);
3369                         sbus_iounmap(hp->etxregs, ETX_REG_SIZE);
3370                         sbus_iounmap(hp->erxregs, ERX_REG_SIZE);
3371                         sbus_iounmap(hp->bigmacregs, BMAC_REG_SIZE);
3372                         sbus_iounmap(hp->tcvregs, TCVR_REG_SIZE);
3373                         sbus_free_consistent(hp->happy_dev,
3374                                              PAGE_SIZE,
3375                                              hp->happy_block,
3376                                              hp->hblock_dvma);
3377                 }
3378 #endif
3379 #ifdef CONFIG_PCI
3380                 if ((hp->happy_flags & HFLAG_PCI)) {
3381                         pci_free_consistent(hp->happy_dev,
3382                                             PAGE_SIZE,
3383                                             hp->happy_block,
3384                                             hp->hblock_dvma);
3385                         iounmap(hp->gregs);
3386                         pci_release_regions(hp->happy_dev);
3387                 }
3388 #endif
3389                 free_netdev(dev);
3390
3391                 root_happy_dev = next;
3392         }
3393
3394         /* Now cleanup the quattro lists. */
3395 #ifdef CONFIG_SBUS
3396         while (qfe_sbus_list) {
3397                 struct quattro *qfe = qfe_sbus_list;
3398                 struct quattro *next = qfe->next;
3399
3400                 kfree(qfe);
3401
3402                 qfe_sbus_list = next;
3403         }
3404 #endif
3405 #ifdef CONFIG_PCI
3406         while (qfe_pci_list) {
3407                 struct quattro *qfe = qfe_pci_list;
3408                 struct quattro *next = qfe->next;
3409
3410                 kfree(qfe);
3411
3412                 qfe_pci_list = next;
3413         }
3414 #endif
3415 }
3416
3417 module_init(happy_meal_probe);
3418 module_exit(happy_meal_cleanup_module);