drivers/net/stmmac/stmmac_main.c

   1 /*******************************************************************************
   2   This is the driver for the ST MAC 10/100/1000 on-chip Ethernet controllers.
   3   ST Ethernet IPs are built around a Synopsys IP Core.
   4
   5   Copyright (C) 2007-2009  STMicroelectronics Ltd
   6
   7   This program is free software; you can redistribute it and/or modify it
   8   under the terms and conditions of the GNU General Public License,
   9   version 2, as published by the Free Software Foundation.
  10
  11   This program is distributed in the hope it will be useful, but WITHOUT
  12   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14   more details.
  15
  16   You should have received a copy of the GNU General Public License along with
  17   this program; if not, write to the Free Software Foundation, Inc.,
  18   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  19
  20   The full GNU General Public License is included in this distribution in
  21   the file called "COPYING".
  22
  23   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
  24
  25   Documentation available at:
  26         http://www.stlinux.com
  27   Support available at:
  28         https://bugzilla.stlinux.com/
  29 *******************************************************************************/
  30
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/kernel.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/etherdevice.h>
  36 #include <linux/platform_device.h>
  37 #include <linux/ip.h>
  38 #include <linux/tcp.h>
  39 #include <linux/skbuff.h>
  40 #include <linux/ethtool.h>
  41 #include <linux/if_ether.h>
  42 #include <linux/crc32.h>
  43 #include <linux/mii.h>
  44 #include <linux/phy.h>
  45 #include <linux/if_vlan.h>
  46 #include <linux/dma-mapping.h>
  47 #include <linux/slab.h>
  48 #include "stmmac.h"
  49
  50 #define STMMAC_RESOURCE_NAME    "stmmaceth"
  51 #define PHY_RESOURCE_NAME       "stmmacphy"
  52
  53 #undef STMMAC_DEBUG
  54 /*#define STMMAC_DEBUG*/
  55 #ifdef STMMAC_DEBUG
  56 #define DBG(nlevel, klevel, fmt, args...) \
  57                 ((void)(netif_msg_##nlevel(priv) && \
  58                 printk(KERN_##klevel fmt, ## args)))
  59 #else
  60 #define DBG(nlevel, klevel, fmt, args...) do { } while (0)
  61 #endif
  62
  63 #undef STMMAC_RX_DEBUG
  64 /*#define STMMAC_RX_DEBUG*/
  65 #ifdef STMMAC_RX_DEBUG
  66 #define RX_DBG(fmt, args...)  printk(fmt, ## args)
  67 #else
  68 #define RX_DBG(fmt, args...)  do { } while (0)
  69 #endif
  70
  71 #undef STMMAC_XMIT_DEBUG
  72 /*#define STMMAC_XMIT_DEBUG*/
  73 #ifdef STMMAC_TX_DEBUG
  74 #define TX_DBG(fmt, args...)  printk(fmt, ## args)
  75 #else
  76 #define TX_DBG(fmt, args...)  do { } while (0)
  77 #endif
  78
  79 #define STMMAC_ALIGN(x) L1_CACHE_ALIGN(x)
  80 #define JUMBO_LEN       9000
  81
  82 /* Module parameters */
  83 #define TX_TIMEO 5000 /* default 5 seconds */
  84 static int watchdog = TX_TIMEO;
  85 module_param(watchdog, int, S_IRUGO | S_IWUSR);
  86 MODULE_PARM_DESC(watchdog, "Transmit timeout in milliseconds");
  87
  88 static int debug = -1;          /* -1: default, 0: no output, 16:  all */
  89 module_param(debug, int, S_IRUGO | S_IWUSR);
  90 MODULE_PARM_DESC(debug, "Message Level (0: no output, 16: all)");
  91
  92 static int phyaddr = -1;
  93 module_param(phyaddr, int, S_IRUGO);
  94 MODULE_PARM_DESC(phyaddr, "Physical device address");
  95
  96 #define DMA_TX_SIZE 256
  97 static int dma_txsize = DMA_TX_SIZE;
  98 module_param(dma_txsize, int, S_IRUGO | S_IWUSR);
  99 MODULE_PARM_DESC(dma_txsize, "Number of descriptors in the TX list");
 100
 101 #define DMA_RX_SIZE 256
 102 static int dma_rxsize = DMA_RX_SIZE;
 103 module_param(dma_rxsize, int, S_IRUGO | S_IWUSR);
 104 MODULE_PARM_DESC(dma_rxsize, "Number of descriptors in the RX list");
 105
 106 static int flow_ctrl = FLOW_OFF;
 107 module_param(flow_ctrl, int, S_IRUGO | S_IWUSR);
 108 MODULE_PARM_DESC(flow_ctrl, "Flow control ability [on/off]");
 109
 110 static int pause = PAUSE_TIME;
 111 module_param(pause, int, S_IRUGO | S_IWUSR);
 112 MODULE_PARM_DESC(pause, "Flow Control Pause Time");
 113
 114 #define TC_DEFAULT 64
 115 static int tc = TC_DEFAULT;
 116 module_param(tc, int, S_IRUGO | S_IWUSR);
 117 MODULE_PARM_DESC(tc, "DMA threshold control value");
 118
 119 /* Pay attention to tune this parameter; take care of both
 120  * hardware capability and network stabitily/performance impact.
 121  * Many tests showed that ~4ms latency seems to be good enough. */
 122 #ifdef CONFIG_STMMAC_TIMER
 123 #define DEFAULT_PERIODIC_RATE   256
 124 static int tmrate = DEFAULT_PERIODIC_RATE;
 125 module_param(tmrate, int, S_IRUGO | S_IWUSR);
 126 MODULE_PARM_DESC(tmrate, "External timer freq. (default: 256Hz)");
 127 #endif
 128
 129 #define DMA_BUFFER_SIZE BUF_SIZE_2KiB
 130 static int buf_sz = DMA_BUFFER_SIZE;
 131 module_param(buf_sz, int, S_IRUGO | S_IWUSR);
 132 MODULE_PARM_DESC(buf_sz, "DMA buffer size");
 133
 134 static const u32 default_msg_level = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
 135                                       NETIF_MSG_LINK | NETIF_MSG_IFUP |
 136                                       NETIF_MSG_IFDOWN | NETIF_MSG_TIMER);
 137
 138 static irqreturn_t stmmac_interrupt(int irq, void *dev_id);
 139
 140 /**
 141  * stmmac_verify_args - verify the driver parameters.
 142  * Description: it verifies if some wrong parameter is passed to the driver.
 143  * Note that wrong parameters are replaced with the default values.
 144  */
 145 static void stmmac_verify_args(void)
 146 {
 147         if (unlikely(watchdog < 0))
 148                 watchdog = TX_TIMEO;
 149         if (unlikely(dma_rxsize < 0))
 150                 dma_rxsize = DMA_RX_SIZE;
 151         if (unlikely(dma_txsize < 0))
 152                 dma_txsize = DMA_TX_SIZE;
 153         if (unlikely((buf_sz < DMA_BUFFER_SIZE) || (buf_sz > BUF_SIZE_16KiB)))
 154                 buf_sz = DMA_BUFFER_SIZE;
 155         if (unlikely(flow_ctrl > 1))
 156                 flow_ctrl = FLOW_AUTO;
 157         else if (likely(flow_ctrl < 0))
 158                 flow_ctrl = FLOW_OFF;
 159         if (unlikely((pause < 0) || (pause > 0xffff)))
 160                 pause = PAUSE_TIME;
 161 }
 162
 163 #if defined(STMMAC_XMIT_DEBUG) || defined(STMMAC_RX_DEBUG)
 164 static void print_pkt(unsigned char *buf, int len)
 165 {
 166         int j;
 167         pr_info("len = %d byte, buf addr: 0x%p", len, buf);
 168         for (j = 0; j < len; j++) {
 169                 if ((j % 16) == 0)
 170                         pr_info("\n %03x:", j);
 171                 pr_info(" %02x", buf[j]);
 172         }
 173         pr_info("\n");
 174 }
 175 #endif
 176
 177 /* minimum number of free TX descriptors required to wake up TX process */
 178 #define STMMAC_TX_THRESH(x)     (x->dma_tx_size/4)
 179
 180 static inline u32 stmmac_tx_avail(struct stmmac_priv *priv)
 181 {
 182         return priv->dirty_tx + priv->dma_tx_size - priv->cur_tx - 1;
 183 }
 184
 185 /* On some ST platforms, some HW system configuraton registers have to be
 186  * set according to the link speed negotiated.
 187  */
 188 static inline void stmmac_hw_fix_mac_speed(struct stmmac_priv *priv)
 189 {
 190         struct phy_device *phydev = priv->phydev;
 191
 192         if (likely(priv->plat->fix_mac_speed))
 193                 priv->plat->fix_mac_speed(priv->plat->bsp_priv,
 194                                           phydev->speed);
 195 }
 196
 197 /**
 198  * stmmac_adjust_link
 199  * @dev: net device structure
 200  * Description: it adjusts the link parameters.
 201  */
 202 static void stmmac_adjust_link(struct net_device *dev)
 203 {
 204         struct stmmac_priv *priv = netdev_priv(dev);
 205         struct phy_device *phydev = priv->phydev;
 206         unsigned long flags;
 207         int new_state = 0;
 208         unsigned int fc = priv->flow_ctrl, pause_time = priv->pause;
 209
 210         if (phydev == NULL)
 211                 return;
 212
 213         DBG(probe, DEBUG, "stmmac_adjust_link: called.  address %d link %d\n",
 214             phydev->addr, phydev->link);
 215
 216         spin_lock_irqsave(&priv->lock, flags);
 217         if (phydev->link) {
 218                 u32 ctrl = readl(priv->ioaddr + MAC_CTRL_REG);
 219
 220                 /* Now we make sure that we can be in full duplex mode.
 221                  * If not, we operate in half-duplex mode. */
 222                 if (phydev->duplex != priv->oldduplex) {
 223                         new_state = 1;
 224                         if (!(phydev->duplex))
 225                                 ctrl &= ~priv->hw->link.duplex;
 226                         else
 227                                 ctrl |= priv->hw->link.duplex;
 228                         priv->oldduplex = phydev->duplex;
 229                 }
 230                 /* Flow Control operation */
 231                 if (phydev->pause)
 232                         priv->hw->mac->flow_ctrl(priv->ioaddr, phydev->duplex,
 233                                                  fc, pause_time);
 234
 235                 if (phydev->speed != priv->speed) {
 236                         new_state = 1;
 237                         switch (phydev->speed) {
 238                         case 1000:
 239                                 if (likely(priv->plat->has_gmac))
 240                                         ctrl &= ~priv->hw->link.port;
 241                                 stmmac_hw_fix_mac_speed(priv);
 242                                 break;
 243                         case 100:
 244                         case 10:
 245                                 if (priv->plat->has_gmac) {
 246                                         ctrl |= priv->hw->link.port;
 247                                         if (phydev->speed == SPEED_100) {
 248                                                 ctrl |= priv->hw->link.speed;
 249                                         } else {
 250                                                 ctrl &= ~(priv->hw->link.speed);
 251                                         }
 252                                 } else {
 253                                         ctrl &= ~priv->hw->link.port;
 254                                 }
 255                                 stmmac_hw_fix_mac_speed(priv);
 256                                 break;
 257                         default:
 258                                 if (netif_msg_link(priv))
 259                                         pr_warning("%s: Speed (%d) is not 10"
 260                                        " or 100!\n", dev->name, phydev->speed);
 261                                 break;
 262                         }
 263
 264                         priv->speed = phydev->speed;
 265                 }
 266
 267                 writel(ctrl, priv->ioaddr + MAC_CTRL_REG);
 268
 269                 if (!priv->oldlink) {
 270                         new_state = 1;
 271                         priv->oldlink = 1;
 272                 }
 273         } else if (priv->oldlink) {
 274                 new_state = 1;
 275                 priv->oldlink = 0;
 276                 priv->speed = 0;
 277                 priv->oldduplex = -1;
 278         }
 279
 280         if (new_state && netif_msg_link(priv))
 281                 phy_print_status(phydev);
 282
 283         spin_unlock_irqrestore(&priv->lock, flags);
 284
 285         DBG(probe, DEBUG, "stmmac_adjust_link: exiting\n");
 286 }
 287
 288 /**
 289  * stmmac_init_phy - PHY initialization
 290  * @dev: net device structure
 291  * Description: it initializes the driver's PHY state, and attaches the PHY
 292  * to the mac driver.
 293  *  Return value:
 294  *  0 on success
 295  */
 296 static int stmmac_init_phy(struct net_device *dev)
 297 {
 298         struct stmmac_priv *priv = netdev_priv(dev);
 299         struct phy_device *phydev;
 300         char phy_id[MII_BUS_ID_SIZE + 3];
 301         char bus_id[MII_BUS_ID_SIZE];
 302
 303         priv->oldlink = 0;
 304         priv->speed = 0;
 305         priv->oldduplex = -1;
 306
 307         if (priv->phy_addr == -1) {
 308                 /* We don't have a PHY, so do nothing */
 309                 return 0;
 310         }
 311
 312         snprintf(bus_id, MII_BUS_ID_SIZE, "%x", priv->plat->bus_id);
 313         snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, bus_id,
 314                  priv->phy_addr);
 315         pr_debug("stmmac_init_phy:  trying to attach to %s\n", phy_id);
 316
 317         phydev = phy_connect(dev, phy_id, &stmmac_adjust_link, 0,
 318                         priv->phy_interface);
 319
 320         if (IS_ERR(phydev)) {
 321                 pr_err("%s: Could not attach to PHY\n", dev->name);
 322                 return PTR_ERR(phydev);
 323         }
 324
 325         /*
 326          * Broken HW is sometimes missing the pull-up resistor on the
 327          * MDIO line, which results in reads to non-existent devices returning
 328          * 0 rather than 0xffff. Catch this here and treat 0 as a non-existent
 329          * device as well.
 330          * Note: phydev->phy_id is the result of reading the UID PHY registers.
 331          */
 332         if (phydev->phy_id == 0) {
 333                 phy_disconnect(phydev);
 334                 return -ENODEV;
 335         }
 336         pr_debug("stmmac_init_phy:  %s: attached to PHY (UID 0x%x)"
 337                " Link = %d\n", dev->name, phydev->phy_id, phydev->link);
 338
 339         priv->phydev = phydev;
 340
 341         return 0;
 342 }
 343
 344 static inline void stmmac_enable_mac(void __iomem *ioaddr)
 345 {
 346         u32 value = readl(ioaddr + MAC_CTRL_REG);
 347
 348         value |= MAC_RNABLE_RX | MAC_ENABLE_TX;
 349         writel(value, ioaddr + MAC_CTRL_REG);
 350 }
 351
 352 static inline void stmmac_disable_mac(void __iomem *ioaddr)
 353 {
 354         u32 value = readl(ioaddr + MAC_CTRL_REG);
 355
 356         value &= ~(MAC_ENABLE_TX | MAC_RNABLE_RX);
 357         writel(value, ioaddr + MAC_CTRL_REG);
 358 }
 359
 360 /**
 361  * display_ring
 362  * @p: pointer to the ring.
 363  * @size: size of the ring.
 364  * Description: display all the descriptors within the ring.
 365  */
 366 static void display_ring(struct dma_desc *p, int size)
 367 {
 368         struct tmp_s {
 369                 u64 a;
 370                 unsigned int b;
 371                 unsigned int c;
 372         };
 373         int i;
 374         for (i = 0; i < size; i++) {
 375                 struct tmp_s *x = (struct tmp_s *)(p + i);
 376                 pr_info("\t%d [0x%x]: DES0=0x%x DES1=0x%x BUF1=0x%x BUF2=0x%x",
 377                        i, (unsigned int)virt_to_phys(&p[i]),
 378                        (unsigned int)(x->a), (unsigned int)((x->a) >> 32),
 379                        x->b, x->c);
 380                 pr_info("\n");
 381         }
 382 }
 383
 384 /**
 385  * init_dma_desc_rings - init the RX/TX descriptor rings
 386  * @dev: net device structure
 387  * Description:  this function initializes the DMA RX/TX descriptors
 388  * and allocates the socket buffers.
 389  */
 390 static void init_dma_desc_rings(struct net_device *dev)
 391 {
 392         int i;
 393         struct stmmac_priv *priv = netdev_priv(dev);
 394         struct sk_buff *skb;
 395         unsigned int txsize = priv->dma_tx_size;
 396         unsigned int rxsize = priv->dma_rx_size;
 397         unsigned int bfsize = priv->dma_buf_sz;
 398         int buff2_needed = 0, dis_ic = 0;
 399
 400         /* Set the Buffer size according to the MTU;
 401          * indeed, in case of jumbo we need to bump-up the buffer sizes.
 402          */
 403         if (unlikely(dev->mtu >= BUF_SIZE_8KiB))
 404                 bfsize = BUF_SIZE_16KiB;
 405         else if (unlikely(dev->mtu >= BUF_SIZE_4KiB))
 406                 bfsize = BUF_SIZE_8KiB;
 407         else if (unlikely(dev->mtu >= BUF_SIZE_2KiB))
 408                 bfsize = BUF_SIZE_4KiB;
 409         else if (unlikely(dev->mtu >= DMA_BUFFER_SIZE))
 410                 bfsize = BUF_SIZE_2KiB;
 411         else
 412                 bfsize = DMA_BUFFER_SIZE;
 413
 414 #ifdef CONFIG_STMMAC_TIMER
 415         /* Disable interrupts on completion for the reception if timer is on */
 416         if (likely(priv->tm->enable))
 417                 dis_ic = 1;
 418 #endif
 419         /* If the MTU exceeds 8k so use the second buffer in the chain */
 420         if (bfsize >= BUF_SIZE_8KiB)
 421                 buff2_needed = 1;
 422
 423         DBG(probe, INFO, "stmmac: txsize %d, rxsize %d, bfsize %d\n",
 424             txsize, rxsize, bfsize);
 425
 426         priv->rx_skbuff_dma = kmalloc(rxsize * sizeof(dma_addr_t), GFP_KERNEL);
 427         priv->rx_skbuff =
 428             kmalloc(sizeof(struct sk_buff *) * rxsize, GFP_KERNEL);
 429         priv->dma_rx =
 430             (struct dma_desc *)dma_alloc_coherent(priv->device,
 431                                                   rxsize *
 432                                                   sizeof(struct dma_desc),
 433                                                   &priv->dma_rx_phy,
 434                                                   GFP_KERNEL);
 435         priv->tx_skbuff = kmalloc(sizeof(struct sk_buff *) * txsize,
 436                                        GFP_KERNEL);
 437         priv->dma_tx =
 438             (struct dma_desc *)dma_alloc_coherent(priv->device,
 439                                                   txsize *
 440                                                   sizeof(struct dma_desc),
 441                                                   &priv->dma_tx_phy,
 442                                                   GFP_KERNEL);
 443
 444         if ((priv->dma_rx == NULL) || (priv->dma_tx == NULL)) {
 445                 pr_err("%s:ERROR allocating the DMA Tx/Rx desc\n", __func__);
 446                 return;
 447         }
 448
 449         DBG(probe, INFO, "stmmac (%s) DMA desc rings: virt addr (Rx %p, "
 450             "Tx %p)\n\tDMA phy addr (Rx 0x%08x, Tx 0x%08x)\n",
 451             dev->name, priv->dma_rx, priv->dma_tx,
 452             (unsigned int)priv->dma_rx_phy, (unsigned int)priv->dma_tx_phy);
 453
 454         /* RX INITIALIZATION */
 455         DBG(probe, INFO, "stmmac: SKB addresses:\n"
 456                          "skb\t\tskb data\tdma data\n");
 457
 458         for (i = 0; i < rxsize; i++) {
 459                 struct dma_desc *p = priv->dma_rx + i;
 460
 461                 skb = netdev_alloc_skb_ip_align(dev, bfsize);
 462                 if (unlikely(skb == NULL)) {
 463                         pr_err("%s: Rx init fails; skb is NULL\n", __func__);
 464                         break;
 465                 }
 466                 priv->rx_skbuff[i] = skb;
 467                 priv->rx_skbuff_dma[i] = dma_map_single(priv->device, skb->data,
 468                                                 bfsize, DMA_FROM_DEVICE);
 469
 470                 p->des2 = priv->rx_skbuff_dma[i];
 471                 if (unlikely(buff2_needed))
 472                         p->des3 = p->des2 + BUF_SIZE_8KiB;
 473                 DBG(probe, INFO, "[%p]\t[%p]\t[%x]\n", priv->rx_skbuff[i],
 474                         priv->rx_skbuff[i]->data, priv->rx_skbuff_dma[i]);
 475         }
 476         priv->cur_rx = 0;
 477         priv->dirty_rx = (unsigned int)(i - rxsize);
 478         priv->dma_buf_sz = bfsize;
 479         buf_sz = bfsize;
 480
 481         /* TX INITIALIZATION */
 482         for (i = 0; i < txsize; i++) {
 483                 priv->tx_skbuff[i] = NULL;
 484                 priv->dma_tx[i].des2 = 0;
 485         }
 486         priv->dirty_tx = 0;
 487         priv->cur_tx = 0;
 488
 489         /* Clear the Rx/Tx descriptors */
 490         priv->hw->desc->init_rx_desc(priv->dma_rx, rxsize, dis_ic);
 491         priv->hw->desc->init_tx_desc(priv->dma_tx, txsize);
 492
 493         if (netif_msg_hw(priv)) {
 494                 pr_info("RX descriptor ring:\n");
 495                 display_ring(priv->dma_rx, rxsize);
 496                 pr_info("TX descriptor ring:\n");
 497                 display_ring(priv->dma_tx, txsize);
 498         }
 499 }
 500
 501 static void dma_free_rx_skbufs(struct stmmac_priv *priv)
 502 {
 503         int i;
 504
 505         for (i = 0; i < priv->dma_rx_size; i++) {
 506                 if (priv->rx_skbuff[i]) {
 507                         dma_unmap_single(priv->device, priv->rx_skbuff_dma[i],
 508                                          priv->dma_buf_sz, DMA_FROM_DEVICE);
 509                         dev_kfree_skb_any(priv->rx_skbuff[i]);
 510                 }
 511                 priv->rx_skbuff[i] = NULL;
 512         }
 513 }
 514
 515 static void dma_free_tx_skbufs(struct stmmac_priv *priv)
 516 {
 517         int i;
 518
 519         for (i = 0; i < priv->dma_tx_size; i++) {
 520                 if (priv->tx_skbuff[i] != NULL) {
 521                         struct dma_desc *p = priv->dma_tx + i;
 522                         if (p->des2)
 523                                 dma_unmap_single(priv->device, p->des2,
 524                                                  priv->hw->desc->get_tx_len(p),
 525                                                  DMA_TO_DEVICE);
 526                         dev_kfree_skb_any(priv->tx_skbuff[i]);
 527                         priv->tx_skbuff[i] = NULL;
 528                 }
 529         }
 530 }
 531
 532 static void free_dma_desc_resources(struct stmmac_priv *priv)
 533 {
 534         /* Release the DMA TX/RX socket buffers */
 535         dma_free_rx_skbufs(priv);
 536         dma_free_tx_skbufs(priv);
 537
 538         /* Free the region of consistent memory previously allocated for
 539          * the DMA */
 540         dma_free_coherent(priv->device,
 541                           priv->dma_tx_size * sizeof(struct dma_desc),
 542                           priv->dma_tx, priv->dma_tx_phy);
 543         dma_free_coherent(priv->device,
 544                           priv->dma_rx_size * sizeof(struct dma_desc),
 545                           priv->dma_rx, priv->dma_rx_phy);
 546         kfree(priv->rx_skbuff_dma);
 547         kfree(priv->rx_skbuff);
 548         kfree(priv->tx_skbuff);
 549 }
 550
 551 /**
 552  *  stmmac_dma_operation_mode - HW DMA operation mode
 553  *  @priv : pointer to the private device structure.
 554  *  Description: it sets the DMA operation mode: tx/rx DMA thresholds
 555  *  or Store-And-Forward capability.
 556  */
 557 static void stmmac_dma_operation_mode(struct stmmac_priv *priv)
 558 {
 559         if (likely((priv->plat->tx_coe) && (!priv->no_csum_insertion))) {
 560                 /* In case of GMAC, SF mode has to be enabled
 561                  * to perform the TX COE. This depends on:
 562                  * 1) TX COE if actually supported
 563                  * 2) There is no bugged Jumbo frame support
 564                  *    that needs to not insert csum in the TDES.
 565                  */
 566                 priv->hw->dma->dma_mode(priv->ioaddr,
 567                                         SF_DMA_MODE, SF_DMA_MODE);
 568                 tc = SF_DMA_MODE;
 569         } else
 570                 priv->hw->dma->dma_mode(priv->ioaddr, tc, SF_DMA_MODE);
 571 }
 572
 573 /**
 574  * stmmac_tx:
 575  * @priv: private driver structure
 576  * Description: it reclaims resources after transmission completes.
 577  */
 578 static void stmmac_tx(struct stmmac_priv *priv)
 579 {
 580         unsigned int txsize = priv->dma_tx_size;
 581
 582         while (priv->dirty_tx != priv->cur_tx) {
 583                 int last;
 584                 unsigned int entry = priv->dirty_tx % txsize;
 585                 struct sk_buff *skb = priv->tx_skbuff[entry];
 586                 struct dma_desc *p = priv->dma_tx + entry;
 587
 588                 /* Check if the descriptor is owned by the DMA. */
 589                 if (priv->hw->desc->get_tx_owner(p))
 590                         break;
 591
 592                 /* Verify tx error by looking at the last segment */
 593                 last = priv->hw->desc->get_tx_ls(p);
 594                 if (likely(last)) {
 595                         int tx_error =
 596                                 priv->hw->desc->tx_status(&priv->dev->stats,
 597                                                           &priv->xstats, p,
 598                                                           priv->ioaddr);
 599                         if (likely(tx_error == 0)) {
 600                                 priv->dev->stats.tx_packets++;
 601                                 priv->xstats.tx_pkt_n++;
 602                         } else
 603                                 priv->dev->stats.tx_errors++;
 604                 }
 605                 TX_DBG("%s: curr %d, dirty %d\n", __func__,
 606                         priv->cur_tx, priv->dirty_tx);
 607
 608                 if (likely(p->des2))
 609                         dma_unmap_single(priv->device, p->des2,
 610                                          priv->hw->desc->get_tx_len(p),
 611                                          DMA_TO_DEVICE);
 612                 if (unlikely(p->des3))
 613                         p->des3 = 0;
 614
 615                 if (likely(skb != NULL)) {
 616                         /*
 617                          * If there's room in the queue (limit it to size)
 618                          * we add this skb back into the pool,
 619                          * if it's the right size.
 620                          */
 621                         if ((skb_queue_len(&priv->rx_recycle) <
 622                                 priv->dma_rx_size) &&
 623                                 skb_recycle_check(skb, priv->dma_buf_sz))
 624                                 __skb_queue_head(&priv->rx_recycle, skb);
 625                         else
 626                                 dev_kfree_skb(skb);
 627
 628                         priv->tx_skbuff[entry] = NULL;
 629                 }
 630
 631                 priv->hw->desc->release_tx_desc(p);
 632
 633                 entry = (++priv->dirty_tx) % txsize;
 634         }
 635         if (unlikely(netif_queue_stopped(priv->dev) &&
 636                      stmmac_tx_avail(priv) > STMMAC_TX_THRESH(priv))) {
 637                 netif_tx_lock(priv->dev);
 638                 if (netif_queue_stopped(priv->dev) &&
 639                      stmmac_tx_avail(priv) > STMMAC_TX_THRESH(priv)) {
 640                         TX_DBG("%s: restart transmit\n", __func__);
 641                         netif_wake_queue(priv->dev);
 642                 }
 643                 netif_tx_unlock(priv->dev);
 644         }
 645 }
 646
 647 static inline void stmmac_enable_irq(struct stmmac_priv *priv)
 648 {
 649 #ifdef CONFIG_STMMAC_TIMER
 650         if (likely(priv->tm->enable))
 651                 priv->tm->timer_start(tmrate);
 652         else
 653 #endif
 654                 priv->hw->dma->enable_dma_irq(priv->ioaddr);
 655 }
 656
 657 static inline void stmmac_disable_irq(struct stmmac_priv *priv)
 658 {
 659 #ifdef CONFIG_STMMAC_TIMER
 660         if (likely(priv->tm->enable))
 661                 priv->tm->timer_stop();
 662         else
 663 #endif
 664                 priv->hw->dma->disable_dma_irq(priv->ioaddr);
 665 }
 666
 667 static int stmmac_has_work(struct stmmac_priv *priv)
 668 {
 669         unsigned int has_work = 0;
 670         int rxret, tx_work = 0;
 671
 672         rxret = priv->hw->desc->get_rx_owner(priv->dma_rx +
 673                 (priv->cur_rx % priv->dma_rx_size));
 674
 675         if (priv->dirty_tx != priv->cur_tx)
 676                 tx_work = 1;
 677
 678         if (likely(!rxret || tx_work))
 679                 has_work = 1;
 680
 681         return has_work;
 682 }
 683
 684 static inline void _stmmac_schedule(struct stmmac_priv *priv)
 685 {
 686         if (likely(stmmac_has_work(priv))) {
 687                 stmmac_disable_irq(priv);
 688                 napi_schedule(&priv->napi);
 689         }
 690 }
 691
 692 #ifdef CONFIG_STMMAC_TIMER
 693 void stmmac_schedule(struct net_device *dev)
 694 {
 695         struct stmmac_priv *priv = netdev_priv(dev);
 696
 697         priv->xstats.sched_timer_n++;
 698
 699         _stmmac_schedule(priv);
 700 }
 701
 702 static void stmmac_no_timer_started(unsigned int x)
 703 {;
 704 };
 705
 706 static void stmmac_no_timer_stopped(void)
 707 {;
 708 };
 709 #endif
 710
 711 /**
 712  * stmmac_tx_err:
 713  * @priv: pointer to the private device structure
 714  * Description: it cleans the descriptors and restarts the transmission
 715  * in case of errors.
 716  */
 717 static void stmmac_tx_err(struct stmmac_priv *priv)
 718 {
 719
 720         netif_stop_queue(priv->dev);
 721
 722         priv->hw->dma->stop_tx(priv->ioaddr);
 723         dma_free_tx_skbufs(priv);
 724         priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
 725         priv->dirty_tx = 0;
 726         priv->cur_tx = 0;
 727         priv->hw->dma->start_tx(priv->ioaddr);
 728
 729         priv->dev->stats.tx_errors++;
 730         netif_wake_queue(priv->dev);
 731 }
 732
 733
 734 static void stmmac_dma_interrupt(struct stmmac_priv *priv)
 735 {
 736         int status;
 737
 738         status = priv->hw->dma->dma_interrupt(priv->ioaddr, &priv->xstats);
 739         if (likely(status == handle_tx_rx))
 740                 _stmmac_schedule(priv);
 741
 742         else if (unlikely(status == tx_hard_error_bump_tc)) {
 743                 /* Try to bump up the dma threshold on this failure */
 744                 if (unlikely(tc != SF_DMA_MODE) && (tc <= 256)) {
 745                         tc += 64;
 746                         priv->hw->dma->dma_mode(priv->ioaddr, tc, SF_DMA_MODE);
 747                         priv->xstats.threshold = tc;
 748                 }
 749         } else if (unlikely(status == tx_hard_error))
 750                 stmmac_tx_err(priv);
 751 }
 752
 753 /**
 754  *  stmmac_open - open entry point of the driver
 755  *  @dev : pointer to the device structure.
 756  *  Description:
 757  *  This function is the open entry point of the driver.
 758  *  Return value:
 759  *  0 on success and an appropriate (-)ve integer as defined in errno.h
 760  *  file on failure.
 761  */
 762 static int stmmac_open(struct net_device *dev)
 763 {
 764         struct stmmac_priv *priv = netdev_priv(dev);
 765         int ret;
 766
 767         /* Check that the MAC address is valid.  If its not, refuse
 768          * to bring the device up. The user must specify an
 769          * address using the following linux command:
 770          *      ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx  */
 771         if (!is_valid_ether_addr(dev->dev_addr)) {
 772                 random_ether_addr(dev->dev_addr);
 773                 pr_warning("%s: generated random MAC address %pM\n", dev->name,
 774                         dev->dev_addr);
 775         }
 776
 777         stmmac_verify_args();
 778
 779 #ifdef CONFIG_STMMAC_TIMER
 780         priv->tm = kzalloc(sizeof(struct stmmac_timer *), GFP_KERNEL);
 781         if (unlikely(priv->tm == NULL)) {
 782                 pr_err("%s: ERROR: timer memory alloc failed\n", __func__);
 783                 return -ENOMEM;
 784         }
 785         priv->tm->freq = tmrate;
 786
 787         /* Test if the external timer can be actually used.
 788          * In case of failure continue without timer. */
 789         if (unlikely((stmmac_open_ext_timer(dev, priv->tm)) < 0)) {
 790                 pr_warning("stmmaceth: cannot attach the external timer.\n");
 791                 priv->tm->freq = 0;
 792                 priv->tm->timer_start = stmmac_no_timer_started;
 793                 priv->tm->timer_stop = stmmac_no_timer_stopped;
 794         } else
 795                 priv->tm->enable = 1;
 796 #endif
 797         ret = stmmac_init_phy(dev);
 798         if (unlikely(ret)) {
 799                 pr_err("%s: Cannot attach to PHY (error: %d)\n", __func__, ret);
 800                 goto open_error;
 801         }
 802
 803         /* Create and initialize the TX/RX descriptors chains. */
 804         priv->dma_tx_size = STMMAC_ALIGN(dma_txsize);
 805         priv->dma_rx_size = STMMAC_ALIGN(dma_rxsize);
 806         priv->dma_buf_sz = STMMAC_ALIGN(buf_sz);
 807         init_dma_desc_rings(dev);
 808
 809         /* DMA initialization and SW reset */
 810         ret = priv->hw->dma->init(priv->ioaddr, priv->plat->pbl,
 811                                   priv->dma_tx_phy, priv->dma_rx_phy);
 812         if (ret < 0) {
 813                 pr_err("%s: DMA initialization failed\n", __func__);
 814                 goto open_error;
 815         }
 816
 817         /* Copy the MAC addr into the HW  */
 818         priv->hw->mac->set_umac_addr(priv->ioaddr, dev->dev_addr, 0);
 819         /* If required, perform hw setup of the bus. */
 820         if (priv->plat->bus_setup)
 821                 priv->plat->bus_setup(priv->ioaddr);
 822         /* Initialize the MAC Core */
 823         priv->hw->mac->core_init(priv->ioaddr);
 824
 825         priv->rx_coe = priv->hw->mac->rx_coe(priv->ioaddr);
 826         if (priv->rx_coe)
 827                 pr_info("stmmac: Rx Checksum Offload Engine supported\n");
 828         if (priv->plat->tx_coe)
 829                 pr_info("\tTX Checksum insertion supported\n");
 830         netdev_update_features(dev);
 831
 832         /* Initialise the MMC (if present) to disable all interrupts. */
 833         writel(0xffffffff, priv->ioaddr + MMC_HIGH_INTR_MASK);
 834         writel(0xffffffff, priv->ioaddr + MMC_LOW_INTR_MASK);
 835
 836         /* Request the IRQ lines */
 837         ret = request_irq(dev->irq, stmmac_interrupt,
 838                          IRQF_SHARED, dev->name, dev);
 839         if (unlikely(ret < 0)) {
 840                 pr_err("%s: ERROR: allocating the IRQ %d (error: %d)\n",
 841                        __func__, dev->irq, ret);
 842                 goto open_error;
 843         }
 844
 845         /* Enable the MAC Rx/Tx */
 846         stmmac_enable_mac(priv->ioaddr);
 847
 848         /* Set the HW DMA mode and the COE */
 849         stmmac_dma_operation_mode(priv);
 850
 851         /* Extra statistics */
 852         memset(&priv->xstats, 0, sizeof(struct stmmac_extra_stats));
 853         priv->xstats.threshold = tc;
 854
 855         /* Start the ball rolling... */
 856         DBG(probe, DEBUG, "%s: DMA RX/TX processes started...\n", dev->name);
 857         priv->hw->dma->start_tx(priv->ioaddr);
 858         priv->hw->dma->start_rx(priv->ioaddr);
 859
 860 #ifdef CONFIG_STMMAC_TIMER
 861         priv->tm->timer_start(tmrate);
 862 #endif
 863         /* Dump DMA/MAC registers */
 864         if (netif_msg_hw(priv)) {
 865                 priv->hw->mac->dump_regs(priv->ioaddr);
 866                 priv->hw->dma->dump_regs(priv->ioaddr);
 867         }
 868
 869         if (priv->phydev)
 870                 phy_start(priv->phydev);
 871
 872         napi_enable(&priv->napi);
 873         skb_queue_head_init(&priv->rx_recycle);
 874         netif_start_queue(dev);
 875
 876         return 0;
 877
 878 open_error:
 879 #ifdef CONFIG_STMMAC_TIMER
 880         kfree(priv->tm);
 881 #endif
 882         if (priv->phydev)
 883                 phy_disconnect(priv->phydev);
 884
 885         return ret;
 886 }
 887
 888 /**
 889  *  stmmac_release - close entry point of the driver
 890  *  @dev : device pointer.
 891  *  Description:
 892  *  This is the stop entry point of the driver.
 893  */
 894 static int stmmac_release(struct net_device *dev)
 895 {
 896         struct stmmac_priv *priv = netdev_priv(dev);
 897
 898         /* Stop and disconnect the PHY */
 899         if (priv->phydev) {
 900                 phy_stop(priv->phydev);
 901                 phy_disconnect(priv->phydev);
 902                 priv->phydev = NULL;
 903         }
 904
 905         netif_stop_queue(dev);
 906
 907 #ifdef CONFIG_STMMAC_TIMER
 908         /* Stop and release the timer */
 909         stmmac_close_ext_timer();
 910         if (priv->tm != NULL)
 911                 kfree(priv->tm);
 912 #endif
 913         napi_disable(&priv->napi);
 914         skb_queue_purge(&priv->rx_recycle);
 915
 916         /* Free the IRQ lines */
 917         free_irq(dev->irq, dev);
 918
 919         /* Stop TX/RX DMA and clear the descriptors */
 920         priv->hw->dma->stop_tx(priv->ioaddr);
 921         priv->hw->dma->stop_rx(priv->ioaddr);
 922
 923         /* Release and free the Rx/Tx resources */
 924         free_dma_desc_resources(priv);
 925
 926         /* Disable the MAC Rx/Tx */
 927         stmmac_disable_mac(priv->ioaddr);
 928
 929         netif_carrier_off(dev);
 930
 931         return 0;
 932 }
 933
 934 static unsigned int stmmac_handle_jumbo_frames(struct sk_buff *skb,
 935                                                struct net_device *dev,
 936                                                int csum_insertion)
 937 {
 938         struct stmmac_priv *priv = netdev_priv(dev);
 939         unsigned int nopaged_len = skb_headlen(skb);
 940         unsigned int txsize = priv->dma_tx_size;
 941         unsigned int entry = priv->cur_tx % txsize;
 942         struct dma_desc *desc = priv->dma_tx + entry;
 943
 944         if (nopaged_len > BUF_SIZE_8KiB) {
 945
 946                 int buf2_size = nopaged_len - BUF_SIZE_8KiB;
 947
 948                 desc->des2 = dma_map_single(priv->device, skb->data,
 949                                             BUF_SIZE_8KiB, DMA_TO_DEVICE);
 950                 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
 951                 priv->hw->desc->prepare_tx_desc(desc, 1, BUF_SIZE_8KiB,
 952                                                 csum_insertion);
 953
 954                 entry = (++priv->cur_tx) % txsize;
 955                 desc = priv->dma_tx + entry;
 956
 957                 desc->des2 = dma_map_single(priv->device,
 958                                         skb->data + BUF_SIZE_8KiB,
 959                                         buf2_size, DMA_TO_DEVICE);
 960                 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
 961                 priv->hw->desc->prepare_tx_desc(desc, 0, buf2_size,
 962                                                 csum_insertion);
 963                 priv->hw->desc->set_tx_owner(desc);
 964                 priv->tx_skbuff[entry] = NULL;
 965         } else {
 966                 desc->des2 = dma_map_single(priv->device, skb->data,
 967                                         nopaged_len, DMA_TO_DEVICE);
 968                 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
 969                 priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len,
 970                                                 csum_insertion);
 971         }
 972         return entry;
 973 }
 974
 975 /**
 976  *  stmmac_xmit:
 977  *  @skb : the socket buffer
 978  *  @dev : device pointer
 979  *  Description : Tx entry point of the driver.
 980  */
 981 static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
 982 {
 983         struct stmmac_priv *priv = netdev_priv(dev);
 984         unsigned int txsize = priv->dma_tx_size;
 985         unsigned int entry;
 986         int i, csum_insertion = 0;
 987         int nfrags = skb_shinfo(skb)->nr_frags;
 988         struct dma_desc *desc, *first;
 989
 990         if (unlikely(stmmac_tx_avail(priv) < nfrags + 1)) {
 991                 if (!netif_queue_stopped(dev)) {
 992                         netif_stop_queue(dev);
 993                         /* This is a hard error, log it. */
 994                         pr_err("%s: BUG! Tx Ring full when queue awake\n",
 995                                 __func__);
 996                 }
 997                 return NETDEV_TX_BUSY;
 998         }
 999
1000         entry = priv->cur_tx % txsize;
1001
1002 #ifdef STMMAC_XMIT_DEBUG
1003         if ((skb->len > ETH_FRAME_LEN) || nfrags)
1004                 pr_info("stmmac xmit:\n"
1005                        "\tskb addr %p - len: %d - nopaged_len: %d\n"
1006                        "\tn_frags: %d - ip_summed: %d - %s gso\n",
1007                        skb, skb->len, skb_headlen(skb), nfrags, skb->ip_summed,
1008                        !skb_is_gso(skb) ? "isn't" : "is");
1009 #endif
1010
1011         csum_insertion = (skb->ip_summed == CHECKSUM_PARTIAL);
1012
1013         desc = priv->dma_tx + entry;
1014         first = desc;
1015
1016 #ifdef STMMAC_XMIT_DEBUG
1017         if ((nfrags > 0) || (skb->len > ETH_FRAME_LEN))
1018                 pr_debug("stmmac xmit: skb len: %d, nopaged_len: %d,\n"
1019                        "\t\tn_frags: %d, ip_summed: %d\n",
1020                        skb->len, skb_headlen(skb), nfrags, skb->ip_summed);
1021 #endif
1022         priv->tx_skbuff[entry] = skb;
1023         if (unlikely(skb->len >= BUF_SIZE_4KiB)) {
1024                 entry = stmmac_handle_jumbo_frames(skb, dev, csum_insertion);
1025                 desc = priv->dma_tx + entry;
1026         } else {
1027                 unsigned int nopaged_len = skb_headlen(skb);
1028                 desc->des2 = dma_map_single(priv->device, skb->data,
1029                                         nopaged_len, DMA_TO_DEVICE);
1030                 priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len,
1031                                                 csum_insertion);
1032         }
1033
1034         for (i = 0; i < nfrags; i++) {
1035                 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1036                 int len = frag->size;
1037
1038                 entry = (++priv->cur_tx) % txsize;
1039                 desc = priv->dma_tx + entry;
1040
1041                 TX_DBG("\t[entry %d] segment len: %d\n", entry, len);
1042                 desc->des2 = dma_map_page(priv->device, frag->page,
1043                                           frag->page_offset,
1044                                           len, DMA_TO_DEVICE);
1045                 priv->tx_skbuff[entry] = NULL;
1046                 priv->hw->desc->prepare_tx_desc(desc, 0, len, csum_insertion);
1047                 priv->hw->desc->set_tx_owner(desc);
1048         }
1049
1050         /* Interrupt on completition only for the latest segment */
1051         priv->hw->desc->close_tx_desc(desc);
1052
1053 #ifdef CONFIG_STMMAC_TIMER
1054         /* Clean IC while using timer */
1055         if (likely(priv->tm->enable))
1056                 priv->hw->desc->clear_tx_ic(desc);
1057 #endif
1058         /* To avoid raise condition */
1059         priv->hw->desc->set_tx_owner(first);
1060
1061         priv->cur_tx++;
1062
1063 #ifdef STMMAC_XMIT_DEBUG
1064         if (netif_msg_pktdata(priv)) {
1065                 pr_info("stmmac xmit: current=%d, dirty=%d, entry=%d, "
1066                        "first=%p, nfrags=%d\n",
1067                        (priv->cur_tx % txsize), (priv->dirty_tx % txsize),
1068                        entry, first, nfrags);
1069                 display_ring(priv->dma_tx, txsize);
1070                 pr_info(">>> frame to be transmitted: ");
1071                 print_pkt(skb->data, skb->len);
1072         }
1073 #endif
1074         if (unlikely(stmmac_tx_avail(priv) <= (MAX_SKB_FRAGS + 1))) {
1075                 TX_DBG("%s: stop transmitted packets\n", __func__);
1076                 netif_stop_queue(dev);
1077         }
1078
1079         dev->stats.tx_bytes += skb->len;
1080
1081         priv->hw->dma->enable_dma_transmission(priv->ioaddr);
1082
1083         return NETDEV_TX_OK;
1084 }
1085
1086 static inline void stmmac_rx_refill(struct stmmac_priv *priv)
1087 {
1088         unsigned int rxsize = priv->dma_rx_size;
1089         int bfsize = priv->dma_buf_sz;
1090         struct dma_desc *p = priv->dma_rx;
1091
1092         for (; priv->cur_rx - priv->dirty_rx > 0; priv->dirty_rx++) {
1093                 unsigned int entry = priv->dirty_rx % rxsize;
1094                 if (likely(priv->rx_skbuff[entry] == NULL)) {
1095                         struct sk_buff *skb;
1096
1097                         skb = __skb_dequeue(&priv->rx_recycle);
1098                         if (skb == NULL)
1099                                 skb = netdev_alloc_skb_ip_align(priv->dev,
1100                                                                 bfsize);
1101
1102                         if (unlikely(skb == NULL))
1103                                 break;
1104
1105                         priv->rx_skbuff[entry] = skb;
1106                         priv->rx_skbuff_dma[entry] =
1107                             dma_map_single(priv->device, skb->data, bfsize,
1108                                            DMA_FROM_DEVICE);
1109
1110                         (p + entry)->des2 = priv->rx_skbuff_dma[entry];
1111                         if (unlikely(priv->plat->has_gmac)) {
1112                                 if (bfsize >= BUF_SIZE_8KiB)
1113                                         (p + entry)->des3 =
1114                                             (p + entry)->des2 + BUF_SIZE_8KiB;
1115                         }
1116                         RX_DBG(KERN_INFO "\trefill entry #%d\n", entry);
1117                 }
1118                 priv->hw->desc->set_rx_owner(p + entry);
1119         }
1120 }
1121
1122 static int stmmac_rx(struct stmmac_priv *priv, int limit)
1123 {
1124         unsigned int rxsize = priv->dma_rx_size;
1125         unsigned int entry = priv->cur_rx % rxsize;
1126         unsigned int next_entry;
1127         unsigned int count = 0;
1128         struct dma_desc *p = priv->dma_rx + entry;
1129         struct dma_desc *p_next;
1130
1131 #ifdef STMMAC_RX_DEBUG
1132         if (netif_msg_hw(priv)) {
1133                 pr_debug(">>> stmmac_rx: descriptor ring:\n");
1134                 display_ring(priv->dma_rx, rxsize);
1135         }
1136 #endif
1137         count = 0;
1138         while (!priv->hw->desc->get_rx_owner(p)) {
1139                 int status;
1140
1141                 if (count >= limit)
1142                         break;
1143
1144                 count++;
1145
1146                 next_entry = (++priv->cur_rx) % rxsize;
1147                 p_next = priv->dma_rx + next_entry;
1148                 prefetch(p_next);
1149
1150                 /* read the status of the incoming frame */
1151                 status = (priv->hw->desc->rx_status(&priv->dev->stats,
1152                                                     &priv->xstats, p));
1153                 if (unlikely(status == discard_frame))
1154                         priv->dev->stats.rx_errors++;
1155                 else {
1156                         struct sk_buff *skb;
1157                         int frame_len;
1158
1159                         frame_len = priv->hw->desc->get_rx_frame_len(p);
1160                         /* ACS is set; GMAC core strips PAD/FCS for IEEE 802.3
1161                          * Type frames (LLC/LLC-SNAP) */
1162                         if (unlikely(status != llc_snap))
1163                                 frame_len -= ETH_FCS_LEN;
1164 #ifdef STMMAC_RX_DEBUG
1165                         if (frame_len > ETH_FRAME_LEN)
1166                                 pr_debug("\tRX frame size %d, COE status: %d\n",
1167                                         frame_len, status);
1168
1169                         if (netif_msg_hw(priv))
1170                                 pr_debug("\tdesc: %p [entry %d] buff=0x%x\n",
1171                                         p, entry, p->des2);
1172 #endif
1173                         skb = priv->rx_skbuff[entry];
1174                         if (unlikely(!skb)) {
1175                                 pr_err("%s: Inconsistent Rx descriptor chain\n",
1176                                         priv->dev->name);
1177                                 priv->dev->stats.rx_dropped++;
1178                                 break;
1179                         }
1180                         prefetch(skb->data - NET_IP_ALIGN);
1181                         priv->rx_skbuff[entry] = NULL;
1182
1183                         skb_put(skb, frame_len);
1184                         dma_unmap_single(priv->device,
1185                                          priv->rx_skbuff_dma[entry],
1186                                          priv->dma_buf_sz, DMA_FROM_DEVICE);
1187 #ifdef STMMAC_RX_DEBUG
1188                         if (netif_msg_pktdata(priv)) {
1189                                 pr_info(" frame received (%dbytes)", frame_len);
1190                                 print_pkt(skb->data, frame_len);
1191                         }
1192 #endif
1193                         skb->protocol = eth_type_trans(skb, priv->dev);
1194
1195                         if (unlikely(status == csum_none)) {
1196                                 /* always for the old mac 10/100 */
1197                                 skb_checksum_none_assert(skb);
1198                                 netif_receive_skb(skb);
1199                         } else {
1200                                 skb->ip_summed = CHECKSUM_UNNECESSARY;
1201                                 napi_gro_receive(&priv->napi, skb);
1202                         }
1203
1204                         priv->dev->stats.rx_packets++;
1205                         priv->dev->stats.rx_bytes += frame_len;
1206                 }
1207                 entry = next_entry;
1208                 p = p_next;     /* use prefetched values */
1209         }
1210
1211         stmmac_rx_refill(priv);
1212
1213         priv->xstats.rx_pkt_n += count;
1214
1215         return count;
1216 }
1217
1218 /**
1219  *  stmmac_poll - stmmac poll method (NAPI)
1220  *  @napi : pointer to the napi structure.
1221  *  @budget : maximum number of packets that the current CPU can receive from
1222  *            all interfaces.
1223  *  Description :
1224  *   This function implements the the reception process.
1225  *   Also it runs the TX completion thread
1226  */
1227 static int stmmac_poll(struct napi_struct *napi, int budget)
1228 {
1229         struct stmmac_priv *priv = container_of(napi, struct stmmac_priv, napi);
1230         int work_done = 0;
1231
1232         priv->xstats.poll_n++;
1233         stmmac_tx(priv);
1234         work_done = stmmac_rx(priv, budget);
1235
1236         if (work_done < budget) {
1237                 napi_complete(napi);
1238                 stmmac_enable_irq(priv);
1239         }
1240         return work_done;
1241 }
1242
1243 /**
1244  *  stmmac_tx_timeout
1245  *  @dev : Pointer to net device structure
1246  *  Description: this function is called when a packet transmission fails to
1247  *   complete within a reasonable tmrate. The driver will mark the error in the
1248  *   netdev structure and arrange for the device to be reset to a sane state
1249  *   in order to transmit a new packet.
1250  */
1251 static void stmmac_tx_timeout(struct net_device *dev)
1252 {
1253         struct stmmac_priv *priv = netdev_priv(dev);
1254
1255         /* Clear Tx resources and restart transmitting again */
1256         stmmac_tx_err(priv);
1257 }
1258
1259 /* Configuration changes (passed on by ifconfig) */
1260 static int stmmac_config(struct net_device *dev, struct ifmap *map)
1261 {
1262         if (dev->flags & IFF_UP)        /* can't act on a running interface */
1263                 return -EBUSY;
1264
1265         /* Don't allow changing the I/O address */
1266         if (map->base_addr != dev->base_addr) {
1267                 pr_warning("%s: can't change I/O address\n", dev->name);
1268                 return -EOPNOTSUPP;
1269         }
1270
1271         /* Don't allow changing the IRQ */
1272         if (map->irq != dev->irq) {
1273                 pr_warning("%s: can't change IRQ number %d\n",
1274                        dev->name, dev->irq);
1275                 return -EOPNOTSUPP;
1276         }
1277
1278         /* ignore other fields */
1279         return 0;
1280 }
1281
1282 /**
1283  *  stmmac_multicast_list - entry point for multicast addressing
1284  *  @dev : pointer to the device structure
1285  *  Description:
1286  *  This function is a driver entry point which gets called by the kernel
1287  *  whenever multicast addresses must be enabled/disabled.
1288  *  Return value:
1289  *  void.
1290  */
1291 static void stmmac_multicast_list(struct net_device *dev)
1292 {
1293         struct stmmac_priv *priv = netdev_priv(dev);
1294
1295         spin_lock(&priv->lock);
1296         priv->hw->mac->set_filter(dev);
1297         spin_unlock(&priv->lock);
1298 }
1299
1300 /**
1301  *  stmmac_change_mtu - entry point to change MTU size for the device.
1302  *  @dev : device pointer.
1303  *  @new_mtu : the new MTU size for the device.
1304  *  Description: the Maximum Transfer Unit (MTU) is used by the network layer
1305  *  to drive packet transmission. Ethernet has an MTU of 1500 octets
1306  *  (ETH_DATA_LEN). This value can be changed with ifconfig.
1307  *  Return value:
1308  *  0 on success and an appropriate (-)ve integer as defined in errno.h
1309  *  file on failure.
1310  */
1311 static int stmmac_change_mtu(struct net_device *dev, int new_mtu)
1312 {
1313         struct stmmac_priv *priv = netdev_priv(dev);
1314         int max_mtu;
1315
1316         if (netif_running(dev)) {
1317                 pr_err("%s: must be stopped to change its MTU\n", dev->name);
1318                 return -EBUSY;
1319         }
1320
1321         if (priv->plat->has_gmac)
1322                 max_mtu = JUMBO_LEN;
1323         else
1324                 max_mtu = ETH_DATA_LEN;
1325
1326         if ((new_mtu < 46) || (new_mtu > max_mtu)) {
1327                 pr_err("%s: invalid MTU, max MTU is: %d\n", dev->name, max_mtu);
1328                 return -EINVAL;
1329         }
1330
1331         dev->mtu = new_mtu;
1332         netdev_update_features(dev);
1333
1334         return 0;
1335 }
1336
1337 static u32 stmmac_fix_features(struct net_device *dev, u32 features)
1338 {
1339         struct stmmac_priv *priv = netdev_priv(dev);
1340
1341         if (!priv->rx_coe)
1342                 features &= ~NETIF_F_RXCSUM;
1343         if (!priv->plat->tx_coe)
1344                 features &= ~NETIF_F_ALL_CSUM;
1345
1346         /* Some GMAC devices have a bugged Jumbo frame support that
1347          * needs to have the Tx COE disabled for oversized frames
1348          * (due to limited buffer sizes). In this case we disable
1349          * the TX csum insertionin the TDES and not use SF. */
1350         if (priv->plat->bugged_jumbo && (dev->mtu > ETH_DATA_LEN))
1351                 features &= ~NETIF_F_ALL_CSUM;
1352
1353         return features;
1354 }
1355
1356 static irqreturn_t stmmac_interrupt(int irq, void *dev_id)
1357 {
1358         struct net_device *dev = (struct net_device *)dev_id;
1359         struct stmmac_priv *priv = netdev_priv(dev);
1360
1361         if (unlikely(!dev)) {
1362                 pr_err("%s: invalid dev pointer\n", __func__);
1363                 return IRQ_NONE;
1364         }
1365
1366         if (priv->plat->has_gmac)
1367                 /* To handle GMAC own interrupts */
1368                 priv->hw->mac->host_irq_status((void __iomem *) dev->base_addr);
1369
1370         stmmac_dma_interrupt(priv);
1371
1372         return IRQ_HANDLED;
1373 }
1374
1375 #ifdef CONFIG_NET_POLL_CONTROLLER
1376 /* Polling receive - used by NETCONSOLE and other diagnostic tools
1377  * to allow network I/O with interrupts disabled. */
1378 static void stmmac_poll_controller(struct net_device *dev)
1379 {
1380         disable_irq(dev->irq);
1381         stmmac_interrupt(dev->irq, dev);
1382         enable_irq(dev->irq);
1383 }
1384 #endif
1385
1386 /**
1387  *  stmmac_ioctl - Entry point for the Ioctl
1388  *  @dev: Device pointer.
1389  *  @rq: An IOCTL specefic structure, that can contain a pointer to
1390  *  a proprietary structure used to pass information to the driver.
1391  *  @cmd: IOCTL command
1392  *  Description:
1393  *  Currently there are no special functionality supported in IOCTL, just the
1394  *  phy_mii_ioctl(...) can be invoked.
1395  */
1396 static int stmmac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1397 {
1398         struct stmmac_priv *priv = netdev_priv(dev);
1399         int ret;
1400
1401         if (!netif_running(dev))
1402                 return -EINVAL;
1403
1404         if (!priv->phydev)
1405                 return -EINVAL;
1406
1407         spin_lock(&priv->lock);
1408         ret = phy_mii_ioctl(priv->phydev, rq, cmd);
1409         spin_unlock(&priv->lock);
1410
1411         return ret;
1412 }
1413
1414 #ifdef STMMAC_VLAN_TAG_USED
1415 static void stmmac_vlan_rx_register(struct net_device *dev,
1416                                     struct vlan_group *grp)
1417 {
1418         struct stmmac_priv *priv = netdev_priv(dev);
1419
1420         DBG(probe, INFO, "%s: Setting vlgrp to %p\n", dev->name, grp);
1421
1422         spin_lock(&priv->lock);
1423         priv->vlgrp = grp;
1424         spin_unlock(&priv->lock);
1425 }
1426 #endif
1427
1428 static const struct net_device_ops stmmac_netdev_ops = {
1429         .ndo_open = stmmac_open,
1430         .ndo_start_xmit = stmmac_xmit,
1431         .ndo_stop = stmmac_release,
1432         .ndo_change_mtu = stmmac_change_mtu,
1433         .ndo_fix_features = stmmac_fix_features,
1434         .ndo_set_multicast_list = stmmac_multicast_list,
1435         .ndo_tx_timeout = stmmac_tx_timeout,
1436         .ndo_do_ioctl = stmmac_ioctl,
1437         .ndo_set_config = stmmac_config,
1438 #ifdef STMMAC_VLAN_TAG_USED
1439         .ndo_vlan_rx_register = stmmac_vlan_rx_register,
1440 #endif
1441 #ifdef CONFIG_NET_POLL_CONTROLLER
1442         .ndo_poll_controller = stmmac_poll_controller,
1443 #endif
1444         .ndo_set_mac_address = eth_mac_addr,
1445 };
1446
1447 /**
1448  * stmmac_probe - Initialization of the adapter .
1449  * @dev : device pointer
1450  * Description: The function initializes the network device structure for
1451  * the STMMAC driver. It also calls the low level routines
1452  * in order to init the HW (i.e. the DMA engine)
1453  */
1454 static int stmmac_probe(struct net_device *dev)
1455 {
1456         int ret = 0;
1457         struct stmmac_priv *priv = netdev_priv(dev);
1458
1459         ether_setup(dev);
1460
1461         dev->netdev_ops = &stmmac_netdev_ops;
1462         stmmac_set_ethtool_ops(dev);
1463
1464         dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1465         dev->features |= dev->hw_features | NETIF_F_HIGHDMA;
1466         dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1467 #ifdef STMMAC_VLAN_TAG_USED
1468         /* Both mac100 and gmac support receive VLAN tag detection */
1469         dev->features |= NETIF_F_HW_VLAN_RX;
1470 #endif
1471         priv->msg_enable = netif_msg_init(debug, default_msg_level);
1472
1473         if (flow_ctrl)
1474                 priv->flow_ctrl = FLOW_AUTO;    /* RX/TX pause on */
1475
1476         priv->pause = pause;
1477         netif_napi_add(dev, &priv->napi, stmmac_poll, 64);
1478
1479         /* Get the MAC address */
1480         priv->hw->mac->get_umac_addr((void __iomem *) dev->base_addr,
1481                                      dev->dev_addr, 0);
1482
1483         if (!is_valid_ether_addr(dev->dev_addr))
1484                 pr_warning("\tno valid MAC address;"
1485                         "please, use ifconfig or nwhwconfig!\n");
1486
1487         spin_lock_init(&priv->lock);
1488
1489         ret = register_netdev(dev);
1490         if (ret) {
1491                 pr_err("%s: ERROR %i registering the device\n",
1492                        __func__, ret);
1493                 return -ENODEV;
1494         }
1495
1496         DBG(probe, DEBUG, "%s: Scatter/Gather: %s - HW checksums: %s\n",
1497             dev->name, (dev->features & NETIF_F_SG) ? "on" : "off",
1498             (dev->features & NETIF_F_IP_CSUM) ? "on" : "off");
1499
1500         return ret;
1501 }
1502
1503 /**
1504  * stmmac_mac_device_setup
1505  * @dev : device pointer
1506  * Description: select and initialise the mac device (mac100 or Gmac).
1507  */
1508 static int stmmac_mac_device_setup(struct net_device *dev)
1509 {
1510         struct stmmac_priv *priv = netdev_priv(dev);
1511
1512         struct mac_device_info *device;
1513
1514         if (priv->plat->has_gmac)
1515                 device = dwmac1000_setup(priv->ioaddr);
1516         else
1517                 device = dwmac100_setup(priv->ioaddr);
1518
1519         if (!device)
1520                 return -ENOMEM;
1521
1522         if (priv->plat->enh_desc) {
1523                 device->desc = &enh_desc_ops;
1524                 pr_info("\tEnhanced descriptor structure\n");
1525         } else
1526                 device->desc = &ndesc_ops;
1527
1528         priv->hw = device;
1529
1530         if (device_can_wakeup(priv->device)) {
1531                 priv->wolopts = WAKE_MAGIC; /* Magic Frame as default */
1532                 enable_irq_wake(dev->irq);
1533         }
1534
1535         return 0;
1536 }
1537
1538 static int stmmacphy_dvr_probe(struct platform_device *pdev)
1539 {
1540         struct plat_stmmacphy_data *plat_dat = pdev->dev.platform_data;
1541
1542         pr_debug("stmmacphy_dvr_probe: added phy for bus %d\n",
1543                plat_dat->bus_id);
1544
1545         return 0;
1546 }
1547
1548 static int stmmacphy_dvr_remove(struct platform_device *pdev)
1549 {
1550         return 0;
1551 }
1552
1553 static struct platform_driver stmmacphy_driver = {
1554         .driver = {
1555                    .name = PHY_RESOURCE_NAME,
1556                    },
1557         .probe = stmmacphy_dvr_probe,
1558         .remove = stmmacphy_dvr_remove,
1559 };
1560
1561 /**
1562  * stmmac_associate_phy
1563  * @dev: pointer to device structure
1564  * @data: points to the private structure.
1565  * Description: Scans through all the PHYs we have registered and checks if
1566  * any are associated with our MAC.  If so, then just fill in
1567  * the blanks in our local context structure
1568  */
1569 static int stmmac_associate_phy(struct device *dev, void *data)
1570 {
1571         struct stmmac_priv *priv = (struct stmmac_priv *)data;
1572         struct plat_stmmacphy_data *plat_dat = dev->platform_data;
1573
1574         DBG(probe, DEBUG, "%s: checking phy for bus %d\n", __func__,
1575                 plat_dat->bus_id);
1576
1577         /* Check that this phy is for the MAC being initialised */
1578         if (priv->plat->bus_id != plat_dat->bus_id)
1579                 return 0;
1580
1581         /* OK, this PHY is connected to the MAC.
1582            Go ahead and get the parameters */
1583         DBG(probe, DEBUG, "%s: OK. Found PHY config\n", __func__);
1584         priv->phy_irq =
1585             platform_get_irq_byname(to_platform_device(dev), "phyirq");
1586         DBG(probe, DEBUG, "%s: PHY irq on bus %d is %d\n", __func__,
1587             plat_dat->bus_id, priv->phy_irq);
1588
1589         /* Override with kernel parameters if supplied XXX CRS XXX
1590          * this needs to have multiple instances */
1591         if ((phyaddr >= 0) && (phyaddr <= 31))
1592                 plat_dat->phy_addr = phyaddr;
1593
1594         priv->phy_addr = plat_dat->phy_addr;
1595         priv->phy_mask = plat_dat->phy_mask;
1596         priv->phy_interface = plat_dat->interface;
1597         priv->phy_reset = plat_dat->phy_reset;
1598
1599         DBG(probe, DEBUG, "%s: exiting\n", __func__);
1600         return 1;       /* forces exit of driver_for_each_device() */
1601 }
1602
1603 /**
1604  * stmmac_dvr_probe
1605  * @pdev: platform device pointer
1606  * Description: the driver is initialized through platform_device.
1607  */
1608 static int stmmac_dvr_probe(struct platform_device *pdev)
1609 {
1610         int ret = 0;
1611         struct resource *res;
1612         void __iomem *addr = NULL;
1613         struct net_device *ndev = NULL;
1614         struct stmmac_priv *priv = NULL;
1615         struct plat_stmmacenet_data *plat_dat;
1616
1617         pr_info("STMMAC driver:\n\tplatform registration... ");
1618         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1619         if (!res)
1620                 return -ENODEV;
1621         pr_info("\tdone!\n");
1622
1623         if (!request_mem_region(res->start, resource_size(res),
1624                                 pdev->name)) {
1625                 pr_err("%s: ERROR: memory allocation failed"
1626                        "cannot get the I/O addr 0x%x\n",
1627                        __func__, (unsigned int)res->start);
1628                 return -EBUSY;
1629         }
1630
1631         addr = ioremap(res->start, resource_size(res));
1632         if (!addr) {
1633                 pr_err("%s: ERROR: memory mapping failed\n", __func__);
1634                 ret = -ENOMEM;
1635                 goto out_release_region;
1636         }
1637
1638         ndev = alloc_etherdev(sizeof(struct stmmac_priv));
1639         if (!ndev) {
1640                 pr_err("%s: ERROR: allocating the device\n", __func__);
1641                 ret = -ENOMEM;
1642                 goto out_unmap;
1643         }
1644
1645         SET_NETDEV_DEV(ndev, &pdev->dev);
1646
1647         /* Get the MAC information */
1648         ndev->irq = platform_get_irq_byname(pdev, "macirq");
1649         if (ndev->irq == -ENXIO) {
1650                 pr_err("%s: ERROR: MAC IRQ configuration "
1651                        "information not found\n", __func__);
1652                 ret = -ENXIO;
1653                 goto out_free_ndev;
1654         }
1655
1656         priv = netdev_priv(ndev);
1657         priv->device = &(pdev->dev);
1658         priv->dev = ndev;
1659         plat_dat = pdev->dev.platform_data;
1660
1661         priv->plat = plat_dat;
1662
1663         priv->ioaddr = addr;
1664
1665         /* PMT module is not integrated in all the MAC devices. */
1666         if (plat_dat->pmt) {
1667                 pr_info("\tPMT module supported\n");
1668                 device_set_wakeup_capable(&pdev->dev, 1);
1669         }
1670
1671         platform_set_drvdata(pdev, ndev);
1672
1673         /* Set the I/O base addr */
1674         ndev->base_addr = (unsigned long)addr;
1675
1676         /* Custom initialisation */
1677         if (priv->plat->init) {
1678                 ret = priv->plat->init(pdev);
1679                 if (unlikely(ret))
1680                         goto out_free_ndev;
1681         }
1682
1683         /* MAC HW revice detection */
1684         ret = stmmac_mac_device_setup(ndev);
1685         if (ret < 0)
1686                 goto out_plat_exit;
1687
1688         /* Network Device Registration */
1689         ret = stmmac_probe(ndev);
1690         if (ret < 0)
1691                 goto out_plat_exit;
1692
1693         /* associate a PHY - it is provided by another platform bus */
1694         if (!driver_for_each_device
1695             (&(stmmacphy_driver.driver), NULL, (void *)priv,
1696              stmmac_associate_phy)) {
1697                 pr_err("No PHY device is associated with this MAC!\n");
1698                 ret = -ENODEV;
1699                 goto out_unregister;
1700         }
1701
1702         pr_info("\t%s - (dev. name: %s - id: %d, IRQ #%d\n"
1703                "\tIO base addr: 0x%p)\n", ndev->name, pdev->name,
1704                pdev->id, ndev->irq, addr);
1705
1706         /* MDIO bus Registration */
1707         pr_debug("\tMDIO bus (id: %d)...", priv->plat->bus_id);
1708         ret = stmmac_mdio_register(ndev);
1709         if (ret < 0)
1710                 goto out_unregister;
1711         pr_debug("registered!\n");
1712         return 0;
1713
1714 out_unregister:
1715         unregister_netdev(ndev);
1716 out_plat_exit:
1717         if (priv->plat->exit)
1718                 priv->plat->exit(pdev);
1719 out_free_ndev:
1720         free_netdev(ndev);
1721         platform_set_drvdata(pdev, NULL);
1722 out_unmap:
1723         iounmap(addr);
1724 out_release_region:
1725         release_mem_region(res->start, resource_size(res));
1726
1727         return ret;
1728 }
1729
1730 /**
1731  * stmmac_dvr_remove
1732  * @pdev: platform device pointer
1733  * Description: this function resets the TX/RX processes, disables the MAC RX/TX
1734  * changes the link status, releases the DMA descriptor rings,
1735  * unregisters the MDIO bus and unmaps the allocated memory.
1736  */
1737 static int stmmac_dvr_remove(struct platform_device *pdev)
1738 {
1739         struct net_device *ndev = platform_get_drvdata(pdev);
1740         struct stmmac_priv *priv = netdev_priv(ndev);
1741         struct resource *res;
1742
1743         pr_info("%s:\n\tremoving driver", __func__);
1744
1745         priv->hw->dma->stop_rx(priv->ioaddr);
1746         priv->hw->dma->stop_tx(priv->ioaddr);
1747
1748         stmmac_disable_mac(priv->ioaddr);
1749
1750         netif_carrier_off(ndev);
1751
1752         stmmac_mdio_unregister(ndev);
1753
1754         if (priv->plat->exit)
1755                 priv->plat->exit(pdev);
1756
1757         platform_set_drvdata(pdev, NULL);
1758         unregister_netdev(ndev);
1759
1760         iounmap((void *)priv->ioaddr);
1761         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1762         release_mem_region(res->start, resource_size(res));
1763
1764         free_netdev(ndev);
1765
1766         return 0;
1767 }
1768
1769 #ifdef CONFIG_PM
1770 static int stmmac_suspend(struct device *dev)
1771 {
1772         struct net_device *ndev = dev_get_drvdata(dev);
1773         struct stmmac_priv *priv = netdev_priv(ndev);
1774         int dis_ic = 0;
1775
1776         if (!ndev || !netif_running(ndev))
1777                 return 0;
1778
1779         spin_lock(&priv->lock);
1780
1781         netif_device_detach(ndev);
1782         netif_stop_queue(ndev);
1783         if (priv->phydev)
1784                 phy_stop(priv->phydev);
1785
1786 #ifdef CONFIG_STMMAC_TIMER
1787         priv->tm->timer_stop();
1788         if (likely(priv->tm->enable))
1789                 dis_ic = 1;
1790 #endif
1791         napi_disable(&priv->napi);
1792
1793         /* Stop TX/RX DMA */
1794         priv->hw->dma->stop_tx(priv->ioaddr);
1795         priv->hw->dma->stop_rx(priv->ioaddr);
1796         /* Clear the Rx/Tx descriptors */
1797         priv->hw->desc->init_rx_desc(priv->dma_rx, priv->dma_rx_size,
1798                                      dis_ic);
1799         priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
1800
1801         /* Enable Power down mode by programming the PMT regs */
1802         if (device_may_wakeup(priv->device))
1803                 priv->hw->mac->pmt(priv->ioaddr, priv->wolopts);
1804         else
1805                 stmmac_disable_mac(priv->ioaddr);
1806
1807         spin_unlock(&priv->lock);
1808         return 0;
1809 }
1810
1811 static int stmmac_resume(struct device *dev)
1812 {
1813         struct net_device *ndev = dev_get_drvdata(dev);
1814         struct stmmac_priv *priv = netdev_priv(ndev);
1815
1816         if (!netif_running(ndev))
1817                 return 0;
1818
1819         spin_lock(&priv->lock);
1820
1821         /* Power Down bit, into the PM register, is cleared
1822          * automatically as soon as a magic packet or a Wake-up frame
1823          * is received. Anyway, it's better to manually clear
1824          * this bit because it can generate problems while resuming
1825          * from another devices (e.g. serial console). */
1826         if (device_may_wakeup(priv->device))
1827                 priv->hw->mac->pmt(priv->ioaddr, 0);
1828
1829         netif_device_attach(ndev);
1830
1831         /* Enable the MAC and DMA */
1832         stmmac_enable_mac(priv->ioaddr);
1833         priv->hw->dma->start_tx(priv->ioaddr);
1834         priv->hw->dma->start_rx(priv->ioaddr);
1835
1836 #ifdef CONFIG_STMMAC_TIMER
1837         if (likely(priv->tm->enable))
1838                 priv->tm->timer_start(tmrate);
1839 #endif
1840         napi_enable(&priv->napi);
1841
1842         if (priv->phydev)
1843                 phy_start(priv->phydev);
1844
1845         netif_start_queue(ndev);
1846
1847         spin_unlock(&priv->lock);
1848         return 0;
1849 }
1850
1851 static int stmmac_freeze(struct device *dev)
1852 {
1853         struct net_device *ndev = dev_get_drvdata(dev);
1854
1855         if (!ndev || !netif_running(ndev))
1856                 return 0;
1857
1858         return stmmac_release(ndev);
1859 }
1860
1861 static int stmmac_restore(struct device *dev)
1862 {
1863         struct net_device *ndev = dev_get_drvdata(dev);
1864
1865         if (!ndev || !netif_running(ndev))
1866                 return 0;
1867
1868         return stmmac_open(ndev);
1869 }
1870
1871 static const struct dev_pm_ops stmmac_pm_ops = {
1872         .suspend = stmmac_suspend,
1873         .resume = stmmac_resume,
1874         .freeze = stmmac_freeze,
1875         .thaw = stmmac_restore,
1876         .restore = stmmac_restore,
1877 };
1878 #else
1879 static const struct dev_pm_ops stmmac_pm_ops;
1880 #endif /* CONFIG_PM */
1881
1882 static struct platform_driver stmmac_driver = {
1883         .probe = stmmac_dvr_probe,
1884         .remove = stmmac_dvr_remove,
1885         .driver = {
1886                 .name = STMMAC_RESOURCE_NAME,
1887                 .owner = THIS_MODULE,
1888                 .pm = &stmmac_pm_ops,
1889         },
1890 };
1891
1892 /**
1893  * stmmac_init_module - Entry point for the driver
1894  * Description: This function is the entry point for the driver.
1895  */
1896 static int __init stmmac_init_module(void)
1897 {
1898         int ret;
1899
1900         if (platform_driver_register(&stmmacphy_driver)) {
1901                 pr_err("No PHY devices registered!\n");
1902                 return -ENODEV;
1903         }
1904
1905         ret = platform_driver_register(&stmmac_driver);
1906         return ret;
1907 }
1908
1909 /**
1910  * stmmac_cleanup_module - Cleanup routine for the driver
1911  * Description: This function is the cleanup routine for the driver.
1912  */
1913 static void __exit stmmac_cleanup_module(void)
1914 {
1915         platform_driver_unregister(&stmmacphy_driver);
1916         platform_driver_unregister(&stmmac_driver);
1917 }
1918
1919 #ifndef MODULE
1920 static int __init stmmac_cmdline_opt(char *str)
1921 {
1922         char *opt;
1923
1924         if (!str || !*str)
1925                 return -EINVAL;
1926         while ((opt = strsep(&str, ",")) != NULL) {
1927                 if (!strncmp(opt, "debug:", 6))
1928                         strict_strtoul(opt + 6, 0, (unsigned long *)&debug);
1929                 else if (!strncmp(opt, "phyaddr:", 8))
1930                         strict_strtoul(opt + 8, 0, (unsigned long *)&phyaddr);
1931                 else if (!strncmp(opt, "dma_txsize:", 11))
1932                         strict_strtoul(opt + 11, 0,
1933                                        (unsigned long *)&dma_txsize);
1934                 else if (!strncmp(opt, "dma_rxsize:", 11))
1935                         strict_strtoul(opt + 11, 0,
1936                                        (unsigned long *)&dma_rxsize);
1937                 else if (!strncmp(opt, "buf_sz:", 7))
1938                         strict_strtoul(opt + 7, 0, (unsigned long *)&buf_sz);
1939                 else if (!strncmp(opt, "tc:", 3))
1940                         strict_strtoul(opt + 3, 0, (unsigned long *)&tc);
1941                 else if (!strncmp(opt, "watchdog:", 9))
1942                         strict_strtoul(opt + 9, 0, (unsigned long *)&watchdog);
1943                 else if (!strncmp(opt, "flow_ctrl:", 10))
1944                         strict_strtoul(opt + 10, 0,
1945                                        (unsigned long *)&flow_ctrl);
1946                 else if (!strncmp(opt, "pause:", 6))
1947                         strict_strtoul(opt + 6, 0, (unsigned long *)&pause);
1948 #ifdef CONFIG_STMMAC_TIMER
1949                 else if (!strncmp(opt, "tmrate:", 7))
1950                         strict_strtoul(opt + 7, 0, (unsigned long *)&tmrate);
1951 #endif
1952         }
1953         return 0;
1954 }
1955
1956 __setup("stmmaceth=", stmmac_cmdline_opt);
1957 #endif
1958
1959 module_init(stmmac_init_module);
1960 module_exit(stmmac_cleanup_module);
1961
1962 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet driver");
1963 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
1964 MODULE_LICENSE("GPL");