Merge branches 'msm-fixes' and 'msm-video' of git://codeaurora.org/quic/kernel/dwalke...
[pandora-kernel.git] / drivers / net / stmmac / stmmac_main.c
1 /*******************************************************************************
2   This is the driver for the ST MAC 10/100/1000 on-chip Ethernet controllers.
3   ST Ethernet IPs are built around a Synopsys IP Core.
4
5   Copyright (C) 2007-2009  STMicroelectronics Ltd
6
7   This program is free software; you can redistribute it and/or modify it
8   under the terms and conditions of the GNU General Public License,
9   version 2, as published by the Free Software Foundation.
10
11   This program is distributed in the hope it will be useful, but WITHOUT
12   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14   more details.
15
16   You should have received a copy of the GNU General Public License along with
17   this program; if not, write to the Free Software Foundation, Inc.,
18   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19
20   The full GNU General Public License is included in this distribution in
21   the file called "COPYING".
22
23   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
24
25   Documentation available at:
26         http://www.stlinux.com
27   Support available at:
28         https://bugzilla.stlinux.com/
29 *******************************************************************************/
30
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/kernel.h>
34 #include <linux/interrupt.h>
35 #include <linux/etherdevice.h>
36 #include <linux/platform_device.h>
37 #include <linux/ip.h>
38 #include <linux/tcp.h>
39 #include <linux/skbuff.h>
40 #include <linux/ethtool.h>
41 #include <linux/if_ether.h>
42 #include <linux/crc32.h>
43 #include <linux/mii.h>
44 #include <linux/phy.h>
45 #include <linux/if_vlan.h>
46 #include <linux/dma-mapping.h>
47 #include <linux/slab.h>
48 #include "stmmac.h"
49
50 #define STMMAC_RESOURCE_NAME    "stmmaceth"
51 #define PHY_RESOURCE_NAME       "stmmacphy"
52
53 #undef STMMAC_DEBUG
54 /*#define STMMAC_DEBUG*/
55 #ifdef STMMAC_DEBUG
56 #define DBG(nlevel, klevel, fmt, args...) \
57                 ((void)(netif_msg_##nlevel(priv) && \
58                 printk(KERN_##klevel fmt, ## args)))
59 #else
60 #define DBG(nlevel, klevel, fmt, args...) do { } while (0)
61 #endif
62
63 #undef STMMAC_RX_DEBUG
64 /*#define STMMAC_RX_DEBUG*/
65 #ifdef STMMAC_RX_DEBUG
66 #define RX_DBG(fmt, args...)  printk(fmt, ## args)
67 #else
68 #define RX_DBG(fmt, args...)  do { } while (0)
69 #endif
70
71 #undef STMMAC_XMIT_DEBUG
72 /*#define STMMAC_XMIT_DEBUG*/
73 #ifdef STMMAC_TX_DEBUG
74 #define TX_DBG(fmt, args...)  printk(fmt, ## args)
75 #else
76 #define TX_DBG(fmt, args...)  do { } while (0)
77 #endif
78
79 #define STMMAC_ALIGN(x) L1_CACHE_ALIGN(x)
80 #define JUMBO_LEN       9000
81
82 /* Module parameters */
83 #define TX_TIMEO 5000 /* default 5 seconds */
84 static int watchdog = TX_TIMEO;
85 module_param(watchdog, int, S_IRUGO | S_IWUSR);
86 MODULE_PARM_DESC(watchdog, "Transmit timeout in milliseconds");
87
88 static int debug = -1;          /* -1: default, 0: no output, 16:  all */
89 module_param(debug, int, S_IRUGO | S_IWUSR);
90 MODULE_PARM_DESC(debug, "Message Level (0: no output, 16: all)");
91
92 static int phyaddr = -1;
93 module_param(phyaddr, int, S_IRUGO);
94 MODULE_PARM_DESC(phyaddr, "Physical device address");
95
96 #define DMA_TX_SIZE 256
97 static int dma_txsize = DMA_TX_SIZE;
98 module_param(dma_txsize, int, S_IRUGO | S_IWUSR);
99 MODULE_PARM_DESC(dma_txsize, "Number of descriptors in the TX list");
100
101 #define DMA_RX_SIZE 256
102 static int dma_rxsize = DMA_RX_SIZE;
103 module_param(dma_rxsize, int, S_IRUGO | S_IWUSR);
104 MODULE_PARM_DESC(dma_rxsize, "Number of descriptors in the RX list");
105
106 static int flow_ctrl = FLOW_OFF;
107 module_param(flow_ctrl, int, S_IRUGO | S_IWUSR);
108 MODULE_PARM_DESC(flow_ctrl, "Flow control ability [on/off]");
109
110 static int pause = PAUSE_TIME;
111 module_param(pause, int, S_IRUGO | S_IWUSR);
112 MODULE_PARM_DESC(pause, "Flow Control Pause Time");
113
114 #define TC_DEFAULT 64
115 static int tc = TC_DEFAULT;
116 module_param(tc, int, S_IRUGO | S_IWUSR);
117 MODULE_PARM_DESC(tc, "DMA threshold control value");
118
119 #define RX_NO_COALESCE  1       /* Always interrupt on completion */
120 #define TX_NO_COALESCE  -1      /* No moderation by default */
121
122 /* Pay attention to tune this parameter; take care of both
123  * hardware capability and network stabitily/performance impact.
124  * Many tests showed that ~4ms latency seems to be good enough. */
125 #ifdef CONFIG_STMMAC_TIMER
126 #define DEFAULT_PERIODIC_RATE   256
127 static int tmrate = DEFAULT_PERIODIC_RATE;
128 module_param(tmrate, int, S_IRUGO | S_IWUSR);
129 MODULE_PARM_DESC(tmrate, "External timer freq. (default: 256Hz)");
130 #endif
131
132 #define DMA_BUFFER_SIZE BUF_SIZE_2KiB
133 static int buf_sz = DMA_BUFFER_SIZE;
134 module_param(buf_sz, int, S_IRUGO | S_IWUSR);
135 MODULE_PARM_DESC(buf_sz, "DMA buffer size");
136
137 static const u32 default_msg_level = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
138                                       NETIF_MSG_LINK | NETIF_MSG_IFUP |
139                                       NETIF_MSG_IFDOWN | NETIF_MSG_TIMER);
140
141 static irqreturn_t stmmac_interrupt(int irq, void *dev_id);
142 static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev);
143
144 /**
145  * stmmac_verify_args - verify the driver parameters.
146  * Description: it verifies if some wrong parameter is passed to the driver.
147  * Note that wrong parameters are replaced with the default values.
148  */
149 static void stmmac_verify_args(void)
150 {
151         if (unlikely(watchdog < 0))
152                 watchdog = TX_TIMEO;
153         if (unlikely(dma_rxsize < 0))
154                 dma_rxsize = DMA_RX_SIZE;
155         if (unlikely(dma_txsize < 0))
156                 dma_txsize = DMA_TX_SIZE;
157         if (unlikely((buf_sz < DMA_BUFFER_SIZE) || (buf_sz > BUF_SIZE_16KiB)))
158                 buf_sz = DMA_BUFFER_SIZE;
159         if (unlikely(flow_ctrl > 1))
160                 flow_ctrl = FLOW_AUTO;
161         else if (likely(flow_ctrl < 0))
162                 flow_ctrl = FLOW_OFF;
163         if (unlikely((pause < 0) || (pause > 0xffff)))
164                 pause = PAUSE_TIME;
165 }
166
167 #if defined(STMMAC_XMIT_DEBUG) || defined(STMMAC_RX_DEBUG)
168 static void print_pkt(unsigned char *buf, int len)
169 {
170         int j;
171         pr_info("len = %d byte, buf addr: 0x%p", len, buf);
172         for (j = 0; j < len; j++) {
173                 if ((j % 16) == 0)
174                         pr_info("\n %03x:", j);
175                 pr_info(" %02x", buf[j]);
176         }
177         pr_info("\n");
178 }
179 #endif
180
181 /* minimum number of free TX descriptors required to wake up TX process */
182 #define STMMAC_TX_THRESH(x)     (x->dma_tx_size/4)
183
184 static inline u32 stmmac_tx_avail(struct stmmac_priv *priv)
185 {
186         return priv->dirty_tx + priv->dma_tx_size - priv->cur_tx - 1;
187 }
188
189 /**
190  * stmmac_adjust_link
191  * @dev: net device structure
192  * Description: it adjusts the link parameters.
193  */
194 static void stmmac_adjust_link(struct net_device *dev)
195 {
196         struct stmmac_priv *priv = netdev_priv(dev);
197         struct phy_device *phydev = priv->phydev;
198         unsigned long flags;
199         int new_state = 0;
200         unsigned int fc = priv->flow_ctrl, pause_time = priv->pause;
201
202         if (phydev == NULL)
203                 return;
204
205         DBG(probe, DEBUG, "stmmac_adjust_link: called.  address %d link %d\n",
206             phydev->addr, phydev->link);
207
208         spin_lock_irqsave(&priv->lock, flags);
209         if (phydev->link) {
210                 u32 ctrl = readl(priv->ioaddr + MAC_CTRL_REG);
211
212                 /* Now we make sure that we can be in full duplex mode.
213                  * If not, we operate in half-duplex mode. */
214                 if (phydev->duplex != priv->oldduplex) {
215                         new_state = 1;
216                         if (!(phydev->duplex))
217                                 ctrl &= ~priv->hw->link.duplex;
218                         else
219                                 ctrl |= priv->hw->link.duplex;
220                         priv->oldduplex = phydev->duplex;
221                 }
222                 /* Flow Control operation */
223                 if (phydev->pause)
224                         priv->hw->mac->flow_ctrl(priv->ioaddr, phydev->duplex,
225                                                  fc, pause_time);
226
227                 if (phydev->speed != priv->speed) {
228                         new_state = 1;
229                         switch (phydev->speed) {
230                         case 1000:
231                                 if (likely(priv->is_gmac))
232                                         ctrl &= ~priv->hw->link.port;
233                                 if (likely(priv->fix_mac_speed))
234                                         priv->fix_mac_speed(priv->bsp_priv,
235                                                             phydev->speed);
236                                 break;
237                         case 100:
238                         case 10:
239                                 if (priv->is_gmac) {
240                                         ctrl |= priv->hw->link.port;
241                                         if (phydev->speed == SPEED_100) {
242                                                 ctrl |= priv->hw->link.speed;
243                                         } else {
244                                                 ctrl &= ~(priv->hw->link.speed);
245                                         }
246                                 } else {
247                                         ctrl &= ~priv->hw->link.port;
248                                 }
249                                 if (likely(priv->fix_mac_speed))
250                                         priv->fix_mac_speed(priv->bsp_priv,
251                                                             phydev->speed);
252                                 break;
253                         default:
254                                 if (netif_msg_link(priv))
255                                         pr_warning("%s: Speed (%d) is not 10"
256                                        " or 100!\n", dev->name, phydev->speed);
257                                 break;
258                         }
259
260                         priv->speed = phydev->speed;
261                 }
262
263                 writel(ctrl, priv->ioaddr + MAC_CTRL_REG);
264
265                 if (!priv->oldlink) {
266                         new_state = 1;
267                         priv->oldlink = 1;
268                 }
269         } else if (priv->oldlink) {
270                 new_state = 1;
271                 priv->oldlink = 0;
272                 priv->speed = 0;
273                 priv->oldduplex = -1;
274         }
275
276         if (new_state && netif_msg_link(priv))
277                 phy_print_status(phydev);
278
279         spin_unlock_irqrestore(&priv->lock, flags);
280
281         DBG(probe, DEBUG, "stmmac_adjust_link: exiting\n");
282 }
283
284 /**
285  * stmmac_init_phy - PHY initialization
286  * @dev: net device structure
287  * Description: it initializes the driver's PHY state, and attaches the PHY
288  * to the mac driver.
289  *  Return value:
290  *  0 on success
291  */
292 static int stmmac_init_phy(struct net_device *dev)
293 {
294         struct stmmac_priv *priv = netdev_priv(dev);
295         struct phy_device *phydev;
296         char phy_id[MII_BUS_ID_SIZE + 3];
297         char bus_id[MII_BUS_ID_SIZE];
298
299         priv->oldlink = 0;
300         priv->speed = 0;
301         priv->oldduplex = -1;
302
303         if (priv->phy_addr == -1) {
304                 /* We don't have a PHY, so do nothing */
305                 return 0;
306         }
307
308         snprintf(bus_id, MII_BUS_ID_SIZE, "%x", priv->bus_id);
309         snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, bus_id,
310                  priv->phy_addr);
311         pr_debug("stmmac_init_phy:  trying to attach to %s\n", phy_id);
312
313         phydev = phy_connect(dev, phy_id, &stmmac_adjust_link, 0,
314                         priv->phy_interface);
315
316         if (IS_ERR(phydev)) {
317                 pr_err("%s: Could not attach to PHY\n", dev->name);
318                 return PTR_ERR(phydev);
319         }
320
321         /*
322          * Broken HW is sometimes missing the pull-up resistor on the
323          * MDIO line, which results in reads to non-existent devices returning
324          * 0 rather than 0xffff. Catch this here and treat 0 as a non-existent
325          * device as well.
326          * Note: phydev->phy_id is the result of reading the UID PHY registers.
327          */
328         if (phydev->phy_id == 0) {
329                 phy_disconnect(phydev);
330                 return -ENODEV;
331         }
332         pr_debug("stmmac_init_phy:  %s: attached to PHY (UID 0x%x)"
333                " Link = %d\n", dev->name, phydev->phy_id, phydev->link);
334
335         priv->phydev = phydev;
336
337         return 0;
338 }
339
340 static inline void stmmac_enable_mac(void __iomem *ioaddr)
341 {
342         u32 value = readl(ioaddr + MAC_CTRL_REG);
343
344         value |= MAC_RNABLE_RX | MAC_ENABLE_TX;
345         writel(value, ioaddr + MAC_CTRL_REG);
346 }
347
348 static inline void stmmac_disable_mac(void __iomem *ioaddr)
349 {
350         u32 value = readl(ioaddr + MAC_CTRL_REG);
351
352         value &= ~(MAC_ENABLE_TX | MAC_RNABLE_RX);
353         writel(value, ioaddr + MAC_CTRL_REG);
354 }
355
356 /**
357  * display_ring
358  * @p: pointer to the ring.
359  * @size: size of the ring.
360  * Description: display all the descriptors within the ring.
361  */
362 static void display_ring(struct dma_desc *p, int size)
363 {
364         struct tmp_s {
365                 u64 a;
366                 unsigned int b;
367                 unsigned int c;
368         };
369         int i;
370         for (i = 0; i < size; i++) {
371                 struct tmp_s *x = (struct tmp_s *)(p + i);
372                 pr_info("\t%d [0x%x]: DES0=0x%x DES1=0x%x BUF1=0x%x BUF2=0x%x",
373                        i, (unsigned int)virt_to_phys(&p[i]),
374                        (unsigned int)(x->a), (unsigned int)((x->a) >> 32),
375                        x->b, x->c);
376                 pr_info("\n");
377         }
378 }
379
380 /**
381  * init_dma_desc_rings - init the RX/TX descriptor rings
382  * @dev: net device structure
383  * Description:  this function initializes the DMA RX/TX descriptors
384  * and allocates the socket buffers.
385  */
386 static void init_dma_desc_rings(struct net_device *dev)
387 {
388         int i;
389         struct stmmac_priv *priv = netdev_priv(dev);
390         struct sk_buff *skb;
391         unsigned int txsize = priv->dma_tx_size;
392         unsigned int rxsize = priv->dma_rx_size;
393         unsigned int bfsize = priv->dma_buf_sz;
394         int buff2_needed = 0, dis_ic = 0;
395
396         /* Set the Buffer size according to the MTU;
397          * indeed, in case of jumbo we need to bump-up the buffer sizes.
398          */
399         if (unlikely(dev->mtu >= BUF_SIZE_8KiB))
400                 bfsize = BUF_SIZE_16KiB;
401         else if (unlikely(dev->mtu >= BUF_SIZE_4KiB))
402                 bfsize = BUF_SIZE_8KiB;
403         else if (unlikely(dev->mtu >= BUF_SIZE_2KiB))
404                 bfsize = BUF_SIZE_4KiB;
405         else if (unlikely(dev->mtu >= DMA_BUFFER_SIZE))
406                 bfsize = BUF_SIZE_2KiB;
407         else
408                 bfsize = DMA_BUFFER_SIZE;
409
410 #ifdef CONFIG_STMMAC_TIMER
411         /* Disable interrupts on completion for the reception if timer is on */
412         if (likely(priv->tm->enable))
413                 dis_ic = 1;
414 #endif
415         /* If the MTU exceeds 8k so use the second buffer in the chain */
416         if (bfsize >= BUF_SIZE_8KiB)
417                 buff2_needed = 1;
418
419         DBG(probe, INFO, "stmmac: txsize %d, rxsize %d, bfsize %d\n",
420             txsize, rxsize, bfsize);
421
422         priv->rx_skbuff_dma = kmalloc(rxsize * sizeof(dma_addr_t), GFP_KERNEL);
423         priv->rx_skbuff =
424             kmalloc(sizeof(struct sk_buff *) * rxsize, GFP_KERNEL);
425         priv->dma_rx =
426             (struct dma_desc *)dma_alloc_coherent(priv->device,
427                                                   rxsize *
428                                                   sizeof(struct dma_desc),
429                                                   &priv->dma_rx_phy,
430                                                   GFP_KERNEL);
431         priv->tx_skbuff = kmalloc(sizeof(struct sk_buff *) * txsize,
432                                        GFP_KERNEL);
433         priv->dma_tx =
434             (struct dma_desc *)dma_alloc_coherent(priv->device,
435                                                   txsize *
436                                                   sizeof(struct dma_desc),
437                                                   &priv->dma_tx_phy,
438                                                   GFP_KERNEL);
439
440         if ((priv->dma_rx == NULL) || (priv->dma_tx == NULL)) {
441                 pr_err("%s:ERROR allocating the DMA Tx/Rx desc\n", __func__);
442                 return;
443         }
444
445         DBG(probe, INFO, "stmmac (%s) DMA desc rings: virt addr (Rx %p, "
446             "Tx %p)\n\tDMA phy addr (Rx 0x%08x, Tx 0x%08x)\n",
447             dev->name, priv->dma_rx, priv->dma_tx,
448             (unsigned int)priv->dma_rx_phy, (unsigned int)priv->dma_tx_phy);
449
450         /* RX INITIALIZATION */
451         DBG(probe, INFO, "stmmac: SKB addresses:\n"
452                          "skb\t\tskb data\tdma data\n");
453
454         for (i = 0; i < rxsize; i++) {
455                 struct dma_desc *p = priv->dma_rx + i;
456
457                 skb = netdev_alloc_skb_ip_align(dev, bfsize);
458                 if (unlikely(skb == NULL)) {
459                         pr_err("%s: Rx init fails; skb is NULL\n", __func__);
460                         break;
461                 }
462                 priv->rx_skbuff[i] = skb;
463                 priv->rx_skbuff_dma[i] = dma_map_single(priv->device, skb->data,
464                                                 bfsize, DMA_FROM_DEVICE);
465
466                 p->des2 = priv->rx_skbuff_dma[i];
467                 if (unlikely(buff2_needed))
468                         p->des3 = p->des2 + BUF_SIZE_8KiB;
469                 DBG(probe, INFO, "[%p]\t[%p]\t[%x]\n", priv->rx_skbuff[i],
470                         priv->rx_skbuff[i]->data, priv->rx_skbuff_dma[i]);
471         }
472         priv->cur_rx = 0;
473         priv->dirty_rx = (unsigned int)(i - rxsize);
474         priv->dma_buf_sz = bfsize;
475         buf_sz = bfsize;
476
477         /* TX INITIALIZATION */
478         for (i = 0; i < txsize; i++) {
479                 priv->tx_skbuff[i] = NULL;
480                 priv->dma_tx[i].des2 = 0;
481         }
482         priv->dirty_tx = 0;
483         priv->cur_tx = 0;
484
485         /* Clear the Rx/Tx descriptors */
486         priv->hw->desc->init_rx_desc(priv->dma_rx, rxsize, dis_ic);
487         priv->hw->desc->init_tx_desc(priv->dma_tx, txsize);
488
489         if (netif_msg_hw(priv)) {
490                 pr_info("RX descriptor ring:\n");
491                 display_ring(priv->dma_rx, rxsize);
492                 pr_info("TX descriptor ring:\n");
493                 display_ring(priv->dma_tx, txsize);
494         }
495 }
496
497 static void dma_free_rx_skbufs(struct stmmac_priv *priv)
498 {
499         int i;
500
501         for (i = 0; i < priv->dma_rx_size; i++) {
502                 if (priv->rx_skbuff[i]) {
503                         dma_unmap_single(priv->device, priv->rx_skbuff_dma[i],
504                                          priv->dma_buf_sz, DMA_FROM_DEVICE);
505                         dev_kfree_skb_any(priv->rx_skbuff[i]);
506                 }
507                 priv->rx_skbuff[i] = NULL;
508         }
509 }
510
511 static void dma_free_tx_skbufs(struct stmmac_priv *priv)
512 {
513         int i;
514
515         for (i = 0; i < priv->dma_tx_size; i++) {
516                 if (priv->tx_skbuff[i] != NULL) {
517                         struct dma_desc *p = priv->dma_tx + i;
518                         if (p->des2)
519                                 dma_unmap_single(priv->device, p->des2,
520                                                  priv->hw->desc->get_tx_len(p),
521                                                  DMA_TO_DEVICE);
522                         dev_kfree_skb_any(priv->tx_skbuff[i]);
523                         priv->tx_skbuff[i] = NULL;
524                 }
525         }
526 }
527
528 static void free_dma_desc_resources(struct stmmac_priv *priv)
529 {
530         /* Release the DMA TX/RX socket buffers */
531         dma_free_rx_skbufs(priv);
532         dma_free_tx_skbufs(priv);
533
534         /* Free the region of consistent memory previously allocated for
535          * the DMA */
536         dma_free_coherent(priv->device,
537                           priv->dma_tx_size * sizeof(struct dma_desc),
538                           priv->dma_tx, priv->dma_tx_phy);
539         dma_free_coherent(priv->device,
540                           priv->dma_rx_size * sizeof(struct dma_desc),
541                           priv->dma_rx, priv->dma_rx_phy);
542         kfree(priv->rx_skbuff_dma);
543         kfree(priv->rx_skbuff);
544         kfree(priv->tx_skbuff);
545 }
546
547 /**
548  *  stmmac_dma_operation_mode - HW DMA operation mode
549  *  @priv : pointer to the private device structure.
550  *  Description: it sets the DMA operation mode: tx/rx DMA thresholds
551  *  or Store-And-Forward capability.
552  */
553 static void stmmac_dma_operation_mode(struct stmmac_priv *priv)
554 {
555         if (likely((priv->tx_coe) && (!priv->no_csum_insertion))) {
556                 /* In case of GMAC, SF mode has to be enabled
557                  * to perform the TX COE. This depends on:
558                  * 1) TX COE if actually supported
559                  * 2) There is no bugged Jumbo frame support
560                  *    that needs to not insert csum in the TDES.
561                  */
562                 priv->hw->dma->dma_mode(priv->ioaddr,
563                                         SF_DMA_MODE, SF_DMA_MODE);
564                 tc = SF_DMA_MODE;
565         } else
566                 priv->hw->dma->dma_mode(priv->ioaddr, tc, SF_DMA_MODE);
567 }
568
569 /**
570  * stmmac_tx:
571  * @priv: private driver structure
572  * Description: it reclaims resources after transmission completes.
573  */
574 static void stmmac_tx(struct stmmac_priv *priv)
575 {
576         unsigned int txsize = priv->dma_tx_size;
577
578         while (priv->dirty_tx != priv->cur_tx) {
579                 int last;
580                 unsigned int entry = priv->dirty_tx % txsize;
581                 struct sk_buff *skb = priv->tx_skbuff[entry];
582                 struct dma_desc *p = priv->dma_tx + entry;
583
584                 /* Check if the descriptor is owned by the DMA. */
585                 if (priv->hw->desc->get_tx_owner(p))
586                         break;
587
588                 /* Verify tx error by looking at the last segment */
589                 last = priv->hw->desc->get_tx_ls(p);
590                 if (likely(last)) {
591                         int tx_error =
592                                 priv->hw->desc->tx_status(&priv->dev->stats,
593                                                           &priv->xstats, p,
594                                                           priv->ioaddr);
595                         if (likely(tx_error == 0)) {
596                                 priv->dev->stats.tx_packets++;
597                                 priv->xstats.tx_pkt_n++;
598                         } else
599                                 priv->dev->stats.tx_errors++;
600                 }
601                 TX_DBG("%s: curr %d, dirty %d\n", __func__,
602                         priv->cur_tx, priv->dirty_tx);
603
604                 if (likely(p->des2))
605                         dma_unmap_single(priv->device, p->des2,
606                                          priv->hw->desc->get_tx_len(p),
607                                          DMA_TO_DEVICE);
608                 if (unlikely(p->des3))
609                         p->des3 = 0;
610
611                 if (likely(skb != NULL)) {
612                         /*
613                          * If there's room in the queue (limit it to size)
614                          * we add this skb back into the pool,
615                          * if it's the right size.
616                          */
617                         if ((skb_queue_len(&priv->rx_recycle) <
618                                 priv->dma_rx_size) &&
619                                 skb_recycle_check(skb, priv->dma_buf_sz))
620                                 __skb_queue_head(&priv->rx_recycle, skb);
621                         else
622                                 dev_kfree_skb(skb);
623
624                         priv->tx_skbuff[entry] = NULL;
625                 }
626
627                 priv->hw->desc->release_tx_desc(p);
628
629                 entry = (++priv->dirty_tx) % txsize;
630         }
631         if (unlikely(netif_queue_stopped(priv->dev) &&
632                      stmmac_tx_avail(priv) > STMMAC_TX_THRESH(priv))) {
633                 netif_tx_lock(priv->dev);
634                 if (netif_queue_stopped(priv->dev) &&
635                      stmmac_tx_avail(priv) > STMMAC_TX_THRESH(priv)) {
636                         TX_DBG("%s: restart transmit\n", __func__);
637                         netif_wake_queue(priv->dev);
638                 }
639                 netif_tx_unlock(priv->dev);
640         }
641 }
642
643 static inline void stmmac_enable_irq(struct stmmac_priv *priv)
644 {
645 #ifdef CONFIG_STMMAC_TIMER
646         if (likely(priv->tm->enable))
647                 priv->tm->timer_start(tmrate);
648         else
649 #endif
650                 priv->hw->dma->enable_dma_irq(priv->ioaddr);
651 }
652
653 static inline void stmmac_disable_irq(struct stmmac_priv *priv)
654 {
655 #ifdef CONFIG_STMMAC_TIMER
656         if (likely(priv->tm->enable))
657                 priv->tm->timer_stop();
658         else
659 #endif
660                 priv->hw->dma->disable_dma_irq(priv->ioaddr);
661 }
662
663 static int stmmac_has_work(struct stmmac_priv *priv)
664 {
665         unsigned int has_work = 0;
666         int rxret, tx_work = 0;
667
668         rxret = priv->hw->desc->get_rx_owner(priv->dma_rx +
669                 (priv->cur_rx % priv->dma_rx_size));
670
671         if (priv->dirty_tx != priv->cur_tx)
672                 tx_work = 1;
673
674         if (likely(!rxret || tx_work))
675                 has_work = 1;
676
677         return has_work;
678 }
679
680 static inline void _stmmac_schedule(struct stmmac_priv *priv)
681 {
682         if (likely(stmmac_has_work(priv))) {
683                 stmmac_disable_irq(priv);
684                 napi_schedule(&priv->napi);
685         }
686 }
687
688 #ifdef CONFIG_STMMAC_TIMER
689 void stmmac_schedule(struct net_device *dev)
690 {
691         struct stmmac_priv *priv = netdev_priv(dev);
692
693         priv->xstats.sched_timer_n++;
694
695         _stmmac_schedule(priv);
696 }
697
698 static void stmmac_no_timer_started(unsigned int x)
699 {;
700 };
701
702 static void stmmac_no_timer_stopped(void)
703 {;
704 };
705 #endif
706
707 /**
708  * stmmac_tx_err:
709  * @priv: pointer to the private device structure
710  * Description: it cleans the descriptors and restarts the transmission
711  * in case of errors.
712  */
713 static void stmmac_tx_err(struct stmmac_priv *priv)
714 {
715
716         netif_stop_queue(priv->dev);
717
718         priv->hw->dma->stop_tx(priv->ioaddr);
719         dma_free_tx_skbufs(priv);
720         priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
721         priv->dirty_tx = 0;
722         priv->cur_tx = 0;
723         priv->hw->dma->start_tx(priv->ioaddr);
724
725         priv->dev->stats.tx_errors++;
726         netif_wake_queue(priv->dev);
727 }
728
729
730 static void stmmac_dma_interrupt(struct stmmac_priv *priv)
731 {
732         int status;
733
734         status = priv->hw->dma->dma_interrupt(priv->ioaddr, &priv->xstats);
735         if (likely(status == handle_tx_rx))
736                 _stmmac_schedule(priv);
737
738         else if (unlikely(status == tx_hard_error_bump_tc)) {
739                 /* Try to bump up the dma threshold on this failure */
740                 if (unlikely(tc != SF_DMA_MODE) && (tc <= 256)) {
741                         tc += 64;
742                         priv->hw->dma->dma_mode(priv->ioaddr, tc, SF_DMA_MODE);
743                         priv->xstats.threshold = tc;
744                 }
745                 stmmac_tx_err(priv);
746         } else if (unlikely(status == tx_hard_error))
747                 stmmac_tx_err(priv);
748 }
749
750 /**
751  *  stmmac_open - open entry point of the driver
752  *  @dev : pointer to the device structure.
753  *  Description:
754  *  This function is the open entry point of the driver.
755  *  Return value:
756  *  0 on success and an appropriate (-)ve integer as defined in errno.h
757  *  file on failure.
758  */
759 static int stmmac_open(struct net_device *dev)
760 {
761         struct stmmac_priv *priv = netdev_priv(dev);
762         int ret;
763
764         /* Check that the MAC address is valid.  If its not, refuse
765          * to bring the device up. The user must specify an
766          * address using the following linux command:
767          *      ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx  */
768         if (!is_valid_ether_addr(dev->dev_addr)) {
769                 random_ether_addr(dev->dev_addr);
770                 pr_warning("%s: generated random MAC address %pM\n", dev->name,
771                         dev->dev_addr);
772         }
773
774         stmmac_verify_args();
775
776         ret = stmmac_init_phy(dev);
777         if (unlikely(ret)) {
778                 pr_err("%s: Cannot attach to PHY (error: %d)\n", __func__, ret);
779                 return ret;
780         }
781
782         /* Request the IRQ lines */
783         ret = request_irq(dev->irq, stmmac_interrupt,
784                           IRQF_SHARED, dev->name, dev);
785         if (unlikely(ret < 0)) {
786                 pr_err("%s: ERROR: allocating the IRQ %d (error: %d)\n",
787                        __func__, dev->irq, ret);
788                 return ret;
789         }
790
791 #ifdef CONFIG_STMMAC_TIMER
792         priv->tm = kzalloc(sizeof(struct stmmac_timer *), GFP_KERNEL);
793         if (unlikely(priv->tm == NULL)) {
794                 pr_err("%s: ERROR: timer memory alloc failed\n", __func__);
795                 return -ENOMEM;
796         }
797         priv->tm->freq = tmrate;
798
799         /* Test if the external timer can be actually used.
800          * In case of failure continue without timer. */
801         if (unlikely((stmmac_open_ext_timer(dev, priv->tm)) < 0)) {
802                 pr_warning("stmmaceth: cannot attach the external timer.\n");
803                 priv->tm->freq = 0;
804                 priv->tm->timer_start = stmmac_no_timer_started;
805                 priv->tm->timer_stop = stmmac_no_timer_stopped;
806         } else
807                 priv->tm->enable = 1;
808 #endif
809
810         /* Create and initialize the TX/RX descriptors chains. */
811         priv->dma_tx_size = STMMAC_ALIGN(dma_txsize);
812         priv->dma_rx_size = STMMAC_ALIGN(dma_rxsize);
813         priv->dma_buf_sz = STMMAC_ALIGN(buf_sz);
814         init_dma_desc_rings(dev);
815
816         /* DMA initialization and SW reset */
817         if (unlikely(priv->hw->dma->init(priv->ioaddr, priv->pbl,
818                                          priv->dma_tx_phy,
819                                          priv->dma_rx_phy) < 0)) {
820
821                 pr_err("%s: DMA initialization failed\n", __func__);
822                 return -1;
823         }
824
825         /* Copy the MAC addr into the HW  */
826         priv->hw->mac->set_umac_addr(priv->ioaddr, dev->dev_addr, 0);
827         /* If required, perform hw setup of the bus. */
828         if (priv->bus_setup)
829                 priv->bus_setup(priv->ioaddr);
830         /* Initialize the MAC Core */
831         priv->hw->mac->core_init(priv->ioaddr);
832
833         priv->rx_coe = priv->hw->mac->rx_coe(priv->ioaddr);
834         if (priv->rx_coe)
835                 pr_info("stmmac: Rx Checksum Offload Engine supported\n");
836         if (priv->tx_coe)
837                 pr_info("\tTX Checksum insertion supported\n");
838
839         priv->shutdown = 0;
840
841         /* Initialise the MMC (if present) to disable all interrupts. */
842         writel(0xffffffff, priv->ioaddr + MMC_HIGH_INTR_MASK);
843         writel(0xffffffff, priv->ioaddr + MMC_LOW_INTR_MASK);
844
845         /* Enable the MAC Rx/Tx */
846         stmmac_enable_mac(priv->ioaddr);
847
848         /* Set the HW DMA mode and the COE */
849         stmmac_dma_operation_mode(priv);
850
851         /* Extra statistics */
852         memset(&priv->xstats, 0, sizeof(struct stmmac_extra_stats));
853         priv->xstats.threshold = tc;
854
855         /* Start the ball rolling... */
856         DBG(probe, DEBUG, "%s: DMA RX/TX processes started...\n", dev->name);
857         priv->hw->dma->start_tx(priv->ioaddr);
858         priv->hw->dma->start_rx(priv->ioaddr);
859
860 #ifdef CONFIG_STMMAC_TIMER
861         priv->tm->timer_start(tmrate);
862 #endif
863         /* Dump DMA/MAC registers */
864         if (netif_msg_hw(priv)) {
865                 priv->hw->mac->dump_regs(priv->ioaddr);
866                 priv->hw->dma->dump_regs(priv->ioaddr);
867         }
868
869         if (priv->phydev)
870                 phy_start(priv->phydev);
871
872         napi_enable(&priv->napi);
873         skb_queue_head_init(&priv->rx_recycle);
874         netif_start_queue(dev);
875         return 0;
876 }
877
878 /**
879  *  stmmac_release - close entry point of the driver
880  *  @dev : device pointer.
881  *  Description:
882  *  This is the stop entry point of the driver.
883  */
884 static int stmmac_release(struct net_device *dev)
885 {
886         struct stmmac_priv *priv = netdev_priv(dev);
887
888         /* Stop and disconnect the PHY */
889         if (priv->phydev) {
890                 phy_stop(priv->phydev);
891                 phy_disconnect(priv->phydev);
892                 priv->phydev = NULL;
893         }
894
895         netif_stop_queue(dev);
896
897 #ifdef CONFIG_STMMAC_TIMER
898         /* Stop and release the timer */
899         stmmac_close_ext_timer();
900         if (priv->tm != NULL)
901                 kfree(priv->tm);
902 #endif
903         napi_disable(&priv->napi);
904         skb_queue_purge(&priv->rx_recycle);
905
906         /* Free the IRQ lines */
907         free_irq(dev->irq, dev);
908
909         /* Stop TX/RX DMA and clear the descriptors */
910         priv->hw->dma->stop_tx(priv->ioaddr);
911         priv->hw->dma->stop_rx(priv->ioaddr);
912
913         /* Release and free the Rx/Tx resources */
914         free_dma_desc_resources(priv);
915
916         /* Disable the MAC Rx/Tx */
917         stmmac_disable_mac(priv->ioaddr);
918
919         netif_carrier_off(dev);
920
921         return 0;
922 }
923
924 /*
925  * To perform emulated hardware segmentation on skb.
926  */
927 static int stmmac_sw_tso(struct stmmac_priv *priv, struct sk_buff *skb)
928 {
929         struct sk_buff *segs, *curr_skb;
930         int gso_segs = skb_shinfo(skb)->gso_segs;
931
932         /* Estimate the number of fragments in the worst case */
933         if (unlikely(stmmac_tx_avail(priv) < gso_segs)) {
934                 netif_stop_queue(priv->dev);
935                 TX_DBG(KERN_ERR "%s: TSO BUG! Tx Ring full when queue awake\n",
936                        __func__);
937                 if (stmmac_tx_avail(priv) < gso_segs)
938                         return NETDEV_TX_BUSY;
939
940                 netif_wake_queue(priv->dev);
941         }
942         TX_DBG("\tstmmac_sw_tso: segmenting: skb %p (len %d)\n",
943                skb, skb->len);
944
945         segs = skb_gso_segment(skb, priv->dev->features & ~NETIF_F_TSO);
946         if (unlikely(IS_ERR(segs)))
947                 goto sw_tso_end;
948
949         do {
950                 curr_skb = segs;
951                 segs = segs->next;
952                 TX_DBG("\t\tcurrent skb->len: %d, *curr %p,"
953                        "*next %p\n", curr_skb->len, curr_skb, segs);
954                 curr_skb->next = NULL;
955                 stmmac_xmit(curr_skb, priv->dev);
956         } while (segs);
957
958 sw_tso_end:
959         dev_kfree_skb(skb);
960
961         return NETDEV_TX_OK;
962 }
963
964 static unsigned int stmmac_handle_jumbo_frames(struct sk_buff *skb,
965                                                struct net_device *dev,
966                                                int csum_insertion)
967 {
968         struct stmmac_priv *priv = netdev_priv(dev);
969         unsigned int nopaged_len = skb_headlen(skb);
970         unsigned int txsize = priv->dma_tx_size;
971         unsigned int entry = priv->cur_tx % txsize;
972         struct dma_desc *desc = priv->dma_tx + entry;
973
974         if (nopaged_len > BUF_SIZE_8KiB) {
975
976                 int buf2_size = nopaged_len - BUF_SIZE_8KiB;
977
978                 desc->des2 = dma_map_single(priv->device, skb->data,
979                                             BUF_SIZE_8KiB, DMA_TO_DEVICE);
980                 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
981                 priv->hw->desc->prepare_tx_desc(desc, 1, BUF_SIZE_8KiB,
982                                                 csum_insertion);
983
984                 entry = (++priv->cur_tx) % txsize;
985                 desc = priv->dma_tx + entry;
986
987                 desc->des2 = dma_map_single(priv->device,
988                                         skb->data + BUF_SIZE_8KiB,
989                                         buf2_size, DMA_TO_DEVICE);
990                 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
991                 priv->hw->desc->prepare_tx_desc(desc, 0, buf2_size,
992                                                 csum_insertion);
993                 priv->hw->desc->set_tx_owner(desc);
994                 priv->tx_skbuff[entry] = NULL;
995         } else {
996                 desc->des2 = dma_map_single(priv->device, skb->data,
997                                         nopaged_len, DMA_TO_DEVICE);
998                 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
999                 priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len,
1000                                                 csum_insertion);
1001         }
1002         return entry;
1003 }
1004
1005 /**
1006  *  stmmac_xmit:
1007  *  @skb : the socket buffer
1008  *  @dev : device pointer
1009  *  Description : Tx entry point of the driver.
1010  */
1011 static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
1012 {
1013         struct stmmac_priv *priv = netdev_priv(dev);
1014         unsigned int txsize = priv->dma_tx_size;
1015         unsigned int entry;
1016         int i, csum_insertion = 0;
1017         int nfrags = skb_shinfo(skb)->nr_frags;
1018         struct dma_desc *desc, *first;
1019
1020         if (unlikely(stmmac_tx_avail(priv) < nfrags + 1)) {
1021                 if (!netif_queue_stopped(dev)) {
1022                         netif_stop_queue(dev);
1023                         /* This is a hard error, log it. */
1024                         pr_err("%s: BUG! Tx Ring full when queue awake\n",
1025                                 __func__);
1026                 }
1027                 return NETDEV_TX_BUSY;
1028         }
1029
1030         entry = priv->cur_tx % txsize;
1031
1032 #ifdef STMMAC_XMIT_DEBUG
1033         if ((skb->len > ETH_FRAME_LEN) || nfrags)
1034                 pr_info("stmmac xmit:\n"
1035                        "\tskb addr %p - len: %d - nopaged_len: %d\n"
1036                        "\tn_frags: %d - ip_summed: %d - %s gso\n",
1037                        skb, skb->len, skb_headlen(skb), nfrags, skb->ip_summed,
1038                        !skb_is_gso(skb) ? "isn't" : "is");
1039 #endif
1040
1041         if (unlikely(skb_is_gso(skb)))
1042                 return stmmac_sw_tso(priv, skb);
1043
1044         if (likely((skb->ip_summed == CHECKSUM_PARTIAL))) {
1045                 if (unlikely((!priv->tx_coe) || (priv->no_csum_insertion)))
1046                         skb_checksum_help(skb);
1047                 else
1048                         csum_insertion = 1;
1049         }
1050
1051         desc = priv->dma_tx + entry;
1052         first = desc;
1053
1054 #ifdef STMMAC_XMIT_DEBUG
1055         if ((nfrags > 0) || (skb->len > ETH_FRAME_LEN))
1056                 pr_debug("stmmac xmit: skb len: %d, nopaged_len: %d,\n"
1057                        "\t\tn_frags: %d, ip_summed: %d\n",
1058                        skb->len, skb_headlen(skb), nfrags, skb->ip_summed);
1059 #endif
1060         priv->tx_skbuff[entry] = skb;
1061         if (unlikely(skb->len >= BUF_SIZE_4KiB)) {
1062                 entry = stmmac_handle_jumbo_frames(skb, dev, csum_insertion);
1063                 desc = priv->dma_tx + entry;
1064         } else {
1065                 unsigned int nopaged_len = skb_headlen(skb);
1066                 desc->des2 = dma_map_single(priv->device, skb->data,
1067                                         nopaged_len, DMA_TO_DEVICE);
1068                 priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len,
1069                                                 csum_insertion);
1070         }
1071
1072         for (i = 0; i < nfrags; i++) {
1073                 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1074                 int len = frag->size;
1075
1076                 entry = (++priv->cur_tx) % txsize;
1077                 desc = priv->dma_tx + entry;
1078
1079                 TX_DBG("\t[entry %d] segment len: %d\n", entry, len);
1080                 desc->des2 = dma_map_page(priv->device, frag->page,
1081                                           frag->page_offset,
1082                                           len, DMA_TO_DEVICE);
1083                 priv->tx_skbuff[entry] = NULL;
1084                 priv->hw->desc->prepare_tx_desc(desc, 0, len, csum_insertion);
1085                 priv->hw->desc->set_tx_owner(desc);
1086         }
1087
1088         /* Interrupt on completition only for the latest segment */
1089         priv->hw->desc->close_tx_desc(desc);
1090
1091 #ifdef CONFIG_STMMAC_TIMER
1092         /* Clean IC while using timer */
1093         if (likely(priv->tm->enable))
1094                 priv->hw->desc->clear_tx_ic(desc);
1095 #endif
1096         /* To avoid raise condition */
1097         priv->hw->desc->set_tx_owner(first);
1098
1099         priv->cur_tx++;
1100
1101 #ifdef STMMAC_XMIT_DEBUG
1102         if (netif_msg_pktdata(priv)) {
1103                 pr_info("stmmac xmit: current=%d, dirty=%d, entry=%d, "
1104                        "first=%p, nfrags=%d\n",
1105                        (priv->cur_tx % txsize), (priv->dirty_tx % txsize),
1106                        entry, first, nfrags);
1107                 display_ring(priv->dma_tx, txsize);
1108                 pr_info(">>> frame to be transmitted: ");
1109                 print_pkt(skb->data, skb->len);
1110         }
1111 #endif
1112         if (unlikely(stmmac_tx_avail(priv) <= (MAX_SKB_FRAGS + 1))) {
1113                 TX_DBG("%s: stop transmitted packets\n", __func__);
1114                 netif_stop_queue(dev);
1115         }
1116
1117         dev->stats.tx_bytes += skb->len;
1118
1119         priv->hw->dma->enable_dma_transmission(priv->ioaddr);
1120
1121         return NETDEV_TX_OK;
1122 }
1123
1124 static inline void stmmac_rx_refill(struct stmmac_priv *priv)
1125 {
1126         unsigned int rxsize = priv->dma_rx_size;
1127         int bfsize = priv->dma_buf_sz;
1128         struct dma_desc *p = priv->dma_rx;
1129
1130         for (; priv->cur_rx - priv->dirty_rx > 0; priv->dirty_rx++) {
1131                 unsigned int entry = priv->dirty_rx % rxsize;
1132                 if (likely(priv->rx_skbuff[entry] == NULL)) {
1133                         struct sk_buff *skb;
1134
1135                         skb = __skb_dequeue(&priv->rx_recycle);
1136                         if (skb == NULL)
1137                                 skb = netdev_alloc_skb_ip_align(priv->dev,
1138                                                                 bfsize);
1139
1140                         if (unlikely(skb == NULL))
1141                                 break;
1142
1143                         priv->rx_skbuff[entry] = skb;
1144                         priv->rx_skbuff_dma[entry] =
1145                             dma_map_single(priv->device, skb->data, bfsize,
1146                                            DMA_FROM_DEVICE);
1147
1148                         (p + entry)->des2 = priv->rx_skbuff_dma[entry];
1149                         if (unlikely(priv->is_gmac)) {
1150                                 if (bfsize >= BUF_SIZE_8KiB)
1151                                         (p + entry)->des3 =
1152                                             (p + entry)->des2 + BUF_SIZE_8KiB;
1153                         }
1154                         RX_DBG(KERN_INFO "\trefill entry #%d\n", entry);
1155                 }
1156                 priv->hw->desc->set_rx_owner(p + entry);
1157         }
1158 }
1159
1160 static int stmmac_rx(struct stmmac_priv *priv, int limit)
1161 {
1162         unsigned int rxsize = priv->dma_rx_size;
1163         unsigned int entry = priv->cur_rx % rxsize;
1164         unsigned int next_entry;
1165         unsigned int count = 0;
1166         struct dma_desc *p = priv->dma_rx + entry;
1167         struct dma_desc *p_next;
1168
1169 #ifdef STMMAC_RX_DEBUG
1170         if (netif_msg_hw(priv)) {
1171                 pr_debug(">>> stmmac_rx: descriptor ring:\n");
1172                 display_ring(priv->dma_rx, rxsize);
1173         }
1174 #endif
1175         count = 0;
1176         while (!priv->hw->desc->get_rx_owner(p)) {
1177                 int status;
1178
1179                 if (count >= limit)
1180                         break;
1181
1182                 count++;
1183
1184                 next_entry = (++priv->cur_rx) % rxsize;
1185                 p_next = priv->dma_rx + next_entry;
1186                 prefetch(p_next);
1187
1188                 /* read the status of the incoming frame */
1189                 status = (priv->hw->desc->rx_status(&priv->dev->stats,
1190                                                     &priv->xstats, p));
1191                 if (unlikely(status == discard_frame))
1192                         priv->dev->stats.rx_errors++;
1193                 else {
1194                         struct sk_buff *skb;
1195                         int frame_len;
1196
1197                         frame_len = priv->hw->desc->get_rx_frame_len(p);
1198                         /* ACS is set; GMAC core strips PAD/FCS for IEEE 802.3
1199                          * Type frames (LLC/LLC-SNAP) */
1200                         if (unlikely(status != llc_snap))
1201                                 frame_len -= ETH_FCS_LEN;
1202 #ifdef STMMAC_RX_DEBUG
1203                         if (frame_len > ETH_FRAME_LEN)
1204                                 pr_debug("\tRX frame size %d, COE status: %d\n",
1205                                         frame_len, status);
1206
1207                         if (netif_msg_hw(priv))
1208                                 pr_debug("\tdesc: %p [entry %d] buff=0x%x\n",
1209                                         p, entry, p->des2);
1210 #endif
1211                         skb = priv->rx_skbuff[entry];
1212                         if (unlikely(!skb)) {
1213                                 pr_err("%s: Inconsistent Rx descriptor chain\n",
1214                                         priv->dev->name);
1215                                 priv->dev->stats.rx_dropped++;
1216                                 break;
1217                         }
1218                         prefetch(skb->data - NET_IP_ALIGN);
1219                         priv->rx_skbuff[entry] = NULL;
1220
1221                         skb_put(skb, frame_len);
1222                         dma_unmap_single(priv->device,
1223                                          priv->rx_skbuff_dma[entry],
1224                                          priv->dma_buf_sz, DMA_FROM_DEVICE);
1225 #ifdef STMMAC_RX_DEBUG
1226                         if (netif_msg_pktdata(priv)) {
1227                                 pr_info(" frame received (%dbytes)", frame_len);
1228                                 print_pkt(skb->data, frame_len);
1229                         }
1230 #endif
1231                         skb->protocol = eth_type_trans(skb, priv->dev);
1232
1233                         if (unlikely(status == csum_none)) {
1234                                 /* always for the old mac 10/100 */
1235                                 skb_checksum_none_assert(skb);
1236                                 netif_receive_skb(skb);
1237                         } else {
1238                                 skb->ip_summed = CHECKSUM_UNNECESSARY;
1239                                 napi_gro_receive(&priv->napi, skb);
1240                         }
1241
1242                         priv->dev->stats.rx_packets++;
1243                         priv->dev->stats.rx_bytes += frame_len;
1244                 }
1245                 entry = next_entry;
1246                 p = p_next;     /* use prefetched values */
1247         }
1248
1249         stmmac_rx_refill(priv);
1250
1251         priv->xstats.rx_pkt_n += count;
1252
1253         return count;
1254 }
1255
1256 /**
1257  *  stmmac_poll - stmmac poll method (NAPI)
1258  *  @napi : pointer to the napi structure.
1259  *  @budget : maximum number of packets that the current CPU can receive from
1260  *            all interfaces.
1261  *  Description :
1262  *   This function implements the the reception process.
1263  *   Also it runs the TX completion thread
1264  */
1265 static int stmmac_poll(struct napi_struct *napi, int budget)
1266 {
1267         struct stmmac_priv *priv = container_of(napi, struct stmmac_priv, napi);
1268         int work_done = 0;
1269
1270         priv->xstats.poll_n++;
1271         stmmac_tx(priv);
1272         work_done = stmmac_rx(priv, budget);
1273
1274         if (work_done < budget) {
1275                 napi_complete(napi);
1276                 stmmac_enable_irq(priv);
1277         }
1278         return work_done;
1279 }
1280
1281 /**
1282  *  stmmac_tx_timeout
1283  *  @dev : Pointer to net device structure
1284  *  Description: this function is called when a packet transmission fails to
1285  *   complete within a reasonable tmrate. The driver will mark the error in the
1286  *   netdev structure and arrange for the device to be reset to a sane state
1287  *   in order to transmit a new packet.
1288  */
1289 static void stmmac_tx_timeout(struct net_device *dev)
1290 {
1291         struct stmmac_priv *priv = netdev_priv(dev);
1292
1293         /* Clear Tx resources and restart transmitting again */
1294         stmmac_tx_err(priv);
1295 }
1296
1297 /* Configuration changes (passed on by ifconfig) */
1298 static int stmmac_config(struct net_device *dev, struct ifmap *map)
1299 {
1300         if (dev->flags & IFF_UP)        /* can't act on a running interface */
1301                 return -EBUSY;
1302
1303         /* Don't allow changing the I/O address */
1304         if (map->base_addr != dev->base_addr) {
1305                 pr_warning("%s: can't change I/O address\n", dev->name);
1306                 return -EOPNOTSUPP;
1307         }
1308
1309         /* Don't allow changing the IRQ */
1310         if (map->irq != dev->irq) {
1311                 pr_warning("%s: can't change IRQ number %d\n",
1312                        dev->name, dev->irq);
1313                 return -EOPNOTSUPP;
1314         }
1315
1316         /* ignore other fields */
1317         return 0;
1318 }
1319
1320 /**
1321  *  stmmac_multicast_list - entry point for multicast addressing
1322  *  @dev : pointer to the device structure
1323  *  Description:
1324  *  This function is a driver entry point which gets called by the kernel
1325  *  whenever multicast addresses must be enabled/disabled.
1326  *  Return value:
1327  *  void.
1328  */
1329 static void stmmac_multicast_list(struct net_device *dev)
1330 {
1331         struct stmmac_priv *priv = netdev_priv(dev);
1332
1333         spin_lock(&priv->lock);
1334         priv->hw->mac->set_filter(dev);
1335         spin_unlock(&priv->lock);
1336 }
1337
1338 /**
1339  *  stmmac_change_mtu - entry point to change MTU size for the device.
1340  *  @dev : device pointer.
1341  *  @new_mtu : the new MTU size for the device.
1342  *  Description: the Maximum Transfer Unit (MTU) is used by the network layer
1343  *  to drive packet transmission. Ethernet has an MTU of 1500 octets
1344  *  (ETH_DATA_LEN). This value can be changed with ifconfig.
1345  *  Return value:
1346  *  0 on success and an appropriate (-)ve integer as defined in errno.h
1347  *  file on failure.
1348  */
1349 static int stmmac_change_mtu(struct net_device *dev, int new_mtu)
1350 {
1351         struct stmmac_priv *priv = netdev_priv(dev);
1352         int max_mtu;
1353
1354         if (netif_running(dev)) {
1355                 pr_err("%s: must be stopped to change its MTU\n", dev->name);
1356                 return -EBUSY;
1357         }
1358
1359         if (priv->is_gmac)
1360                 max_mtu = JUMBO_LEN;
1361         else
1362                 max_mtu = ETH_DATA_LEN;
1363
1364         if ((new_mtu < 46) || (new_mtu > max_mtu)) {
1365                 pr_err("%s: invalid MTU, max MTU is: %d\n", dev->name, max_mtu);
1366                 return -EINVAL;
1367         }
1368
1369         /* Some GMAC devices have a bugged Jumbo frame support that
1370          * needs to have the Tx COE disabled for oversized frames
1371          * (due to limited buffer sizes). In this case we disable
1372          * the TX csum insertionin the TDES and not use SF. */
1373         if ((priv->bugged_jumbo) && (priv->dev->mtu > ETH_DATA_LEN))
1374                 priv->no_csum_insertion = 1;
1375         else
1376                 priv->no_csum_insertion = 0;
1377
1378         dev->mtu = new_mtu;
1379
1380         return 0;
1381 }
1382
1383 static irqreturn_t stmmac_interrupt(int irq, void *dev_id)
1384 {
1385         struct net_device *dev = (struct net_device *)dev_id;
1386         struct stmmac_priv *priv = netdev_priv(dev);
1387
1388         if (unlikely(!dev)) {
1389                 pr_err("%s: invalid dev pointer\n", __func__);
1390                 return IRQ_NONE;
1391         }
1392
1393         if (priv->is_gmac)
1394                 /* To handle GMAC own interrupts */
1395                 priv->hw->mac->host_irq_status((void __iomem *) dev->base_addr);
1396
1397         stmmac_dma_interrupt(priv);
1398
1399         return IRQ_HANDLED;
1400 }
1401
1402 #ifdef CONFIG_NET_POLL_CONTROLLER
1403 /* Polling receive - used by NETCONSOLE and other diagnostic tools
1404  * to allow network I/O with interrupts disabled. */
1405 static void stmmac_poll_controller(struct net_device *dev)
1406 {
1407         disable_irq(dev->irq);
1408         stmmac_interrupt(dev->irq, dev);
1409         enable_irq(dev->irq);
1410 }
1411 #endif
1412
1413 /**
1414  *  stmmac_ioctl - Entry point for the Ioctl
1415  *  @dev: Device pointer.
1416  *  @rq: An IOCTL specefic structure, that can contain a pointer to
1417  *  a proprietary structure used to pass information to the driver.
1418  *  @cmd: IOCTL command
1419  *  Description:
1420  *  Currently there are no special functionality supported in IOCTL, just the
1421  *  phy_mii_ioctl(...) can be invoked.
1422  */
1423 static int stmmac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1424 {
1425         struct stmmac_priv *priv = netdev_priv(dev);
1426         int ret;
1427
1428         if (!netif_running(dev))
1429                 return -EINVAL;
1430
1431         if (!priv->phydev)
1432                 return -EINVAL;
1433
1434         spin_lock(&priv->lock);
1435         ret = phy_mii_ioctl(priv->phydev, rq, cmd);
1436         spin_unlock(&priv->lock);
1437
1438         return ret;
1439 }
1440
1441 #ifdef STMMAC_VLAN_TAG_USED
1442 static void stmmac_vlan_rx_register(struct net_device *dev,
1443                                     struct vlan_group *grp)
1444 {
1445         struct stmmac_priv *priv = netdev_priv(dev);
1446
1447         DBG(probe, INFO, "%s: Setting vlgrp to %p\n", dev->name, grp);
1448
1449         spin_lock(&priv->lock);
1450         priv->vlgrp = grp;
1451         spin_unlock(&priv->lock);
1452 }
1453 #endif
1454
1455 static const struct net_device_ops stmmac_netdev_ops = {
1456         .ndo_open = stmmac_open,
1457         .ndo_start_xmit = stmmac_xmit,
1458         .ndo_stop = stmmac_release,
1459         .ndo_change_mtu = stmmac_change_mtu,
1460         .ndo_set_multicast_list = stmmac_multicast_list,
1461         .ndo_tx_timeout = stmmac_tx_timeout,
1462         .ndo_do_ioctl = stmmac_ioctl,
1463         .ndo_set_config = stmmac_config,
1464 #ifdef STMMAC_VLAN_TAG_USED
1465         .ndo_vlan_rx_register = stmmac_vlan_rx_register,
1466 #endif
1467 #ifdef CONFIG_NET_POLL_CONTROLLER
1468         .ndo_poll_controller = stmmac_poll_controller,
1469 #endif
1470         .ndo_set_mac_address = eth_mac_addr,
1471 };
1472
1473 /**
1474  * stmmac_probe - Initialization of the adapter .
1475  * @dev : device pointer
1476  * Description: The function initializes the network device structure for
1477  * the STMMAC driver. It also calls the low level routines
1478  * in order to init the HW (i.e. the DMA engine)
1479  */
1480 static int stmmac_probe(struct net_device *dev)
1481 {
1482         int ret = 0;
1483         struct stmmac_priv *priv = netdev_priv(dev);
1484
1485         ether_setup(dev);
1486
1487         dev->netdev_ops = &stmmac_netdev_ops;
1488         stmmac_set_ethtool_ops(dev);
1489
1490         dev->features |= (NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_HIGHDMA);
1491         dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1492 #ifdef STMMAC_VLAN_TAG_USED
1493         /* Both mac100 and gmac support receive VLAN tag detection */
1494         dev->features |= NETIF_F_HW_VLAN_RX;
1495 #endif
1496         priv->msg_enable = netif_msg_init(debug, default_msg_level);
1497
1498         if (flow_ctrl)
1499                 priv->flow_ctrl = FLOW_AUTO;    /* RX/TX pause on */
1500
1501         priv->pause = pause;
1502         netif_napi_add(dev, &priv->napi, stmmac_poll, 64);
1503
1504         /* Get the MAC address */
1505         priv->hw->mac->get_umac_addr((void __iomem *) dev->base_addr,
1506                                      dev->dev_addr, 0);
1507
1508         if (!is_valid_ether_addr(dev->dev_addr))
1509                 pr_warning("\tno valid MAC address;"
1510                         "please, use ifconfig or nwhwconfig!\n");
1511
1512         ret = register_netdev(dev);
1513         if (ret) {
1514                 pr_err("%s: ERROR %i registering the device\n",
1515                        __func__, ret);
1516                 return -ENODEV;
1517         }
1518
1519         DBG(probe, DEBUG, "%s: Scatter/Gather: %s - HW checksums: %s\n",
1520             dev->name, (dev->features & NETIF_F_SG) ? "on" : "off",
1521             (dev->features & NETIF_F_HW_CSUM) ? "on" : "off");
1522
1523         spin_lock_init(&priv->lock);
1524
1525         return ret;
1526 }
1527
1528 /**
1529  * stmmac_mac_device_setup
1530  * @dev : device pointer
1531  * Description: select and initialise the mac device (mac100 or Gmac).
1532  */
1533 static int stmmac_mac_device_setup(struct net_device *dev)
1534 {
1535         struct stmmac_priv *priv = netdev_priv(dev);
1536
1537         struct mac_device_info *device;
1538
1539         if (priv->is_gmac)
1540                 device = dwmac1000_setup(priv->ioaddr);
1541         else
1542                 device = dwmac100_setup(priv->ioaddr);
1543
1544         if (!device)
1545                 return -ENOMEM;
1546
1547         if (priv->enh_desc) {
1548                 device->desc = &enh_desc_ops;
1549                 pr_info("\tEnhanced descriptor structure\n");
1550         } else
1551                 device->desc = &ndesc_ops;
1552
1553         priv->hw = device;
1554
1555         if (device_can_wakeup(priv->device))
1556                 priv->wolopts = WAKE_MAGIC; /* Magic Frame as default */
1557
1558         return 0;
1559 }
1560
1561 static int stmmacphy_dvr_probe(struct platform_device *pdev)
1562 {
1563         struct plat_stmmacphy_data *plat_dat = pdev->dev.platform_data;
1564
1565         pr_debug("stmmacphy_dvr_probe: added phy for bus %d\n",
1566                plat_dat->bus_id);
1567
1568         return 0;
1569 }
1570
1571 static int stmmacphy_dvr_remove(struct platform_device *pdev)
1572 {
1573         return 0;
1574 }
1575
1576 static struct platform_driver stmmacphy_driver = {
1577         .driver = {
1578                    .name = PHY_RESOURCE_NAME,
1579                    },
1580         .probe = stmmacphy_dvr_probe,
1581         .remove = stmmacphy_dvr_remove,
1582 };
1583
1584 /**
1585  * stmmac_associate_phy
1586  * @dev: pointer to device structure
1587  * @data: points to the private structure.
1588  * Description: Scans through all the PHYs we have registered and checks if
1589  * any are associated with our MAC.  If so, then just fill in
1590  * the blanks in our local context structure
1591  */
1592 static int stmmac_associate_phy(struct device *dev, void *data)
1593 {
1594         struct stmmac_priv *priv = (struct stmmac_priv *)data;
1595         struct plat_stmmacphy_data *plat_dat = dev->platform_data;
1596
1597         DBG(probe, DEBUG, "%s: checking phy for bus %d\n", __func__,
1598                 plat_dat->bus_id);
1599
1600         /* Check that this phy is for the MAC being initialised */
1601         if (priv->bus_id != plat_dat->bus_id)
1602                 return 0;
1603
1604         /* OK, this PHY is connected to the MAC.
1605            Go ahead and get the parameters */
1606         DBG(probe, DEBUG, "%s: OK. Found PHY config\n", __func__);
1607         priv->phy_irq =
1608             platform_get_irq_byname(to_platform_device(dev), "phyirq");
1609         DBG(probe, DEBUG, "%s: PHY irq on bus %d is %d\n", __func__,
1610             plat_dat->bus_id, priv->phy_irq);
1611
1612         /* Override with kernel parameters if supplied XXX CRS XXX
1613          * this needs to have multiple instances */
1614         if ((phyaddr >= 0) && (phyaddr <= 31))
1615                 plat_dat->phy_addr = phyaddr;
1616
1617         priv->phy_addr = plat_dat->phy_addr;
1618         priv->phy_mask = plat_dat->phy_mask;
1619         priv->phy_interface = plat_dat->interface;
1620         priv->phy_reset = plat_dat->phy_reset;
1621
1622         DBG(probe, DEBUG, "%s: exiting\n", __func__);
1623         return 1;       /* forces exit of driver_for_each_device() */
1624 }
1625
1626 /**
1627  * stmmac_dvr_probe
1628  * @pdev: platform device pointer
1629  * Description: the driver is initialized through platform_device.
1630  */
1631 static int stmmac_dvr_probe(struct platform_device *pdev)
1632 {
1633         int ret = 0;
1634         struct resource *res;
1635         void __iomem *addr = NULL;
1636         struct net_device *ndev = NULL;
1637         struct stmmac_priv *priv;
1638         struct plat_stmmacenet_data *plat_dat;
1639
1640         pr_info("STMMAC driver:\n\tplatform registration... ");
1641         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1642         if (!res) {
1643                 ret = -ENODEV;
1644                 goto out;
1645         }
1646         pr_info("\tdone!\n");
1647
1648         if (!request_mem_region(res->start, resource_size(res),
1649                                 pdev->name)) {
1650                 pr_err("%s: ERROR: memory allocation failed"
1651                        "cannot get the I/O addr 0x%x\n",
1652                        __func__, (unsigned int)res->start);
1653                 ret = -EBUSY;
1654                 goto out;
1655         }
1656
1657         addr = ioremap(res->start, resource_size(res));
1658         if (!addr) {
1659                 pr_err("%s: ERROR: memory mapping failed\n", __func__);
1660                 ret = -ENOMEM;
1661                 goto out;
1662         }
1663
1664         ndev = alloc_etherdev(sizeof(struct stmmac_priv));
1665         if (!ndev) {
1666                 pr_err("%s: ERROR: allocating the device\n", __func__);
1667                 ret = -ENOMEM;
1668                 goto out;
1669         }
1670
1671         SET_NETDEV_DEV(ndev, &pdev->dev);
1672
1673         /* Get the MAC information */
1674         ndev->irq = platform_get_irq_byname(pdev, "macirq");
1675         if (ndev->irq == -ENXIO) {
1676                 pr_err("%s: ERROR: MAC IRQ configuration "
1677                        "information not found\n", __func__);
1678                 ret = -ENODEV;
1679                 goto out;
1680         }
1681
1682         priv = netdev_priv(ndev);
1683         priv->device = &(pdev->dev);
1684         priv->dev = ndev;
1685         plat_dat = pdev->dev.platform_data;
1686         priv->bus_id = plat_dat->bus_id;
1687         priv->pbl = plat_dat->pbl;      /* TLI */
1688         priv->mii_clk_csr = plat_dat->clk_csr;
1689         priv->tx_coe = plat_dat->tx_coe;
1690         priv->bugged_jumbo = plat_dat->bugged_jumbo;
1691         priv->is_gmac = plat_dat->has_gmac;     /* GMAC is on board */
1692         priv->enh_desc = plat_dat->enh_desc;
1693         priv->ioaddr = addr;
1694
1695         /* PMT module is not integrated in all the MAC devices. */
1696         if (plat_dat->pmt) {
1697                 pr_info("\tPMT module supported\n");
1698                 device_set_wakeup_capable(&pdev->dev, 1);
1699         }
1700
1701         platform_set_drvdata(pdev, ndev);
1702
1703         /* Set the I/O base addr */
1704         ndev->base_addr = (unsigned long)addr;
1705
1706         /* Verify embedded resource for the platform */
1707         ret = stmmac_claim_resource(pdev);
1708         if (ret < 0)
1709                 goto out;
1710
1711         /* MAC HW revice detection */
1712         ret = stmmac_mac_device_setup(ndev);
1713         if (ret < 0)
1714                 goto out;
1715
1716         /* Network Device Registration */
1717         ret = stmmac_probe(ndev);
1718         if (ret < 0)
1719                 goto out;
1720
1721         /* associate a PHY - it is provided by another platform bus */
1722         if (!driver_for_each_device
1723             (&(stmmacphy_driver.driver), NULL, (void *)priv,
1724              stmmac_associate_phy)) {
1725                 pr_err("No PHY device is associated with this MAC!\n");
1726                 ret = -ENODEV;
1727                 goto out;
1728         }
1729
1730         priv->fix_mac_speed = plat_dat->fix_mac_speed;
1731         priv->bus_setup = plat_dat->bus_setup;
1732         priv->bsp_priv = plat_dat->bsp_priv;
1733
1734         pr_info("\t%s - (dev. name: %s - id: %d, IRQ #%d\n"
1735                "\tIO base addr: 0x%p)\n", ndev->name, pdev->name,
1736                pdev->id, ndev->irq, addr);
1737
1738         /* MDIO bus Registration */
1739         pr_debug("\tMDIO bus (id: %d)...", priv->bus_id);
1740         ret = stmmac_mdio_register(ndev);
1741         if (ret < 0)
1742                 goto out;
1743         pr_debug("registered!\n");
1744
1745 out:
1746         if (ret < 0) {
1747                 platform_set_drvdata(pdev, NULL);
1748                 release_mem_region(res->start, resource_size(res));
1749                 if (addr != NULL)
1750                         iounmap(addr);
1751         }
1752
1753         return ret;
1754 }
1755
1756 /**
1757  * stmmac_dvr_remove
1758  * @pdev: platform device pointer
1759  * Description: this function resets the TX/RX processes, disables the MAC RX/TX
1760  * changes the link status, releases the DMA descriptor rings,
1761  * unregisters the MDIO bus and unmaps the allocated memory.
1762  */
1763 static int stmmac_dvr_remove(struct platform_device *pdev)
1764 {
1765         struct net_device *ndev = platform_get_drvdata(pdev);
1766         struct stmmac_priv *priv = netdev_priv(ndev);
1767         struct resource *res;
1768
1769         pr_info("%s:\n\tremoving driver", __func__);
1770
1771         priv->hw->dma->stop_rx(priv->ioaddr);
1772         priv->hw->dma->stop_tx(priv->ioaddr);
1773
1774         stmmac_disable_mac(priv->ioaddr);
1775
1776         netif_carrier_off(ndev);
1777
1778         stmmac_mdio_unregister(ndev);
1779
1780         platform_set_drvdata(pdev, NULL);
1781         unregister_netdev(ndev);
1782
1783         iounmap((void *)priv->ioaddr);
1784         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1785         release_mem_region(res->start, resource_size(res));
1786
1787         free_netdev(ndev);
1788
1789         return 0;
1790 }
1791
1792 #ifdef CONFIG_PM
1793 static int stmmac_suspend(struct platform_device *pdev, pm_message_t state)
1794 {
1795         struct net_device *dev = platform_get_drvdata(pdev);
1796         struct stmmac_priv *priv = netdev_priv(dev);
1797         int dis_ic = 0;
1798
1799         if (!dev || !netif_running(dev))
1800                 return 0;
1801
1802         spin_lock(&priv->lock);
1803
1804         if (state.event == PM_EVENT_SUSPEND) {
1805                 netif_device_detach(dev);
1806                 netif_stop_queue(dev);
1807                 if (priv->phydev)
1808                         phy_stop(priv->phydev);
1809
1810 #ifdef CONFIG_STMMAC_TIMER
1811                 priv->tm->timer_stop();
1812                 if (likely(priv->tm->enable))
1813                         dis_ic = 1;
1814 #endif
1815                 napi_disable(&priv->napi);
1816
1817                 /* Stop TX/RX DMA */
1818                 priv->hw->dma->stop_tx(priv->ioaddr);
1819                 priv->hw->dma->stop_rx(priv->ioaddr);
1820                 /* Clear the Rx/Tx descriptors */
1821                 priv->hw->desc->init_rx_desc(priv->dma_rx, priv->dma_rx_size,
1822                                              dis_ic);
1823                 priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
1824
1825                 /* Enable Power down mode by programming the PMT regs */
1826                 if (device_can_wakeup(priv->device))
1827                         priv->hw->mac->pmt(priv->ioaddr, priv->wolopts);
1828                 else
1829                         stmmac_disable_mac(priv->ioaddr);
1830         } else {
1831                 priv->shutdown = 1;
1832                 /* Although this can appear slightly redundant it actually
1833                  * makes fast the standby operation and guarantees the driver
1834                  * working if hibernation is on media. */
1835                 stmmac_release(dev);
1836         }
1837
1838         spin_unlock(&priv->lock);
1839         return 0;
1840 }
1841
1842 static int stmmac_resume(struct platform_device *pdev)
1843 {
1844         struct net_device *dev = platform_get_drvdata(pdev);
1845         struct stmmac_priv *priv = netdev_priv(dev);
1846
1847         if (!netif_running(dev))
1848                 return 0;
1849
1850         if (priv->shutdown) {
1851                 /* Re-open the interface and re-init the MAC/DMA
1852                    and the rings (i.e. on hibernation stage) */
1853                 stmmac_open(dev);
1854                 return 0;
1855         }
1856
1857         spin_lock(&priv->lock);
1858
1859         /* Power Down bit, into the PM register, is cleared
1860          * automatically as soon as a magic packet or a Wake-up frame
1861          * is received. Anyway, it's better to manually clear
1862          * this bit because it can generate problems while resuming
1863          * from another devices (e.g. serial console). */
1864         if (device_can_wakeup(priv->device))
1865                 priv->hw->mac->pmt(priv->ioaddr, 0);
1866
1867         netif_device_attach(dev);
1868
1869         /* Enable the MAC and DMA */
1870         stmmac_enable_mac(priv->ioaddr);
1871         priv->hw->dma->start_tx(priv->ioaddr);
1872         priv->hw->dma->start_rx(priv->ioaddr);
1873
1874 #ifdef CONFIG_STMMAC_TIMER
1875         priv->tm->timer_start(tmrate);
1876 #endif
1877         napi_enable(&priv->napi);
1878
1879         if (priv->phydev)
1880                 phy_start(priv->phydev);
1881
1882         netif_start_queue(dev);
1883
1884         spin_unlock(&priv->lock);
1885         return 0;
1886 }
1887 #endif
1888
1889 static struct platform_driver stmmac_driver = {
1890         .driver = {
1891                    .name = STMMAC_RESOURCE_NAME,
1892                    },
1893         .probe = stmmac_dvr_probe,
1894         .remove = stmmac_dvr_remove,
1895 #ifdef CONFIG_PM
1896         .suspend = stmmac_suspend,
1897         .resume = stmmac_resume,
1898 #endif
1899
1900 };
1901
1902 /**
1903  * stmmac_init_module - Entry point for the driver
1904  * Description: This function is the entry point for the driver.
1905  */
1906 static int __init stmmac_init_module(void)
1907 {
1908         int ret;
1909
1910         if (platform_driver_register(&stmmacphy_driver)) {
1911                 pr_err("No PHY devices registered!\n");
1912                 return -ENODEV;
1913         }
1914
1915         ret = platform_driver_register(&stmmac_driver);
1916         return ret;
1917 }
1918
1919 /**
1920  * stmmac_cleanup_module - Cleanup routine for the driver
1921  * Description: This function is the cleanup routine for the driver.
1922  */
1923 static void __exit stmmac_cleanup_module(void)
1924 {
1925         platform_driver_unregister(&stmmacphy_driver);
1926         platform_driver_unregister(&stmmac_driver);
1927 }
1928
1929 #ifndef MODULE
1930 static int __init stmmac_cmdline_opt(char *str)
1931 {
1932         char *opt;
1933
1934         if (!str || !*str)
1935                 return -EINVAL;
1936         while ((opt = strsep(&str, ",")) != NULL) {
1937                 if (!strncmp(opt, "debug:", 6))
1938                         strict_strtoul(opt + 6, 0, (unsigned long *)&debug);
1939                 else if (!strncmp(opt, "phyaddr:", 8))
1940                         strict_strtoul(opt + 8, 0, (unsigned long *)&phyaddr);
1941                 else if (!strncmp(opt, "dma_txsize:", 11))
1942                         strict_strtoul(opt + 11, 0,
1943                                        (unsigned long *)&dma_txsize);
1944                 else if (!strncmp(opt, "dma_rxsize:", 11))
1945                         strict_strtoul(opt + 11, 0,
1946                                        (unsigned long *)&dma_rxsize);
1947                 else if (!strncmp(opt, "buf_sz:", 7))
1948                         strict_strtoul(opt + 7, 0, (unsigned long *)&buf_sz);
1949                 else if (!strncmp(opt, "tc:", 3))
1950                         strict_strtoul(opt + 3, 0, (unsigned long *)&tc);
1951                 else if (!strncmp(opt, "watchdog:", 9))
1952                         strict_strtoul(opt + 9, 0, (unsigned long *)&watchdog);
1953                 else if (!strncmp(opt, "flow_ctrl:", 10))
1954                         strict_strtoul(opt + 10, 0,
1955                                        (unsigned long *)&flow_ctrl);
1956                 else if (!strncmp(opt, "pause:", 6))
1957                         strict_strtoul(opt + 6, 0, (unsigned long *)&pause);
1958 #ifdef CONFIG_STMMAC_TIMER
1959                 else if (!strncmp(opt, "tmrate:", 7))
1960                         strict_strtoul(opt + 7, 0, (unsigned long *)&tmrate);
1961 #endif
1962         }
1963         return 0;
1964 }
1965
1966 __setup("stmmaceth=", stmmac_cmdline_opt);
1967 #endif
1968
1969 module_init(stmmac_init_module);
1970 module_exit(stmmac_cleanup_module);
1971
1972 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet driver");
1973 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
1974 MODULE_LICENSE("GPL");