drivers/net/myri10ge/myri10ge.c

   1 /*************************************************************************
   2  * myri10ge.c: Myricom Myri-10G Ethernet driver.
   3  *
   4  * Copyright (C) 2005 - 2007 Myricom, Inc.
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  * 3. Neither the name of Myricom, Inc. nor the names of its contributors
  16  *    may be used to endorse or promote products derived from this software
  17  *    without specific prior written permission.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  20  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  22  * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  23  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29  * POSSIBILITY OF SUCH DAMAGE.
  30  *
  31  *
  32  * If the eeprom on your board is not recent enough, you will need to get a
  33  * newer firmware image at:
  34  *   http://www.myri.com/scs/download-Myri10GE.html
  35  *
  36  * Contact Information:
  37  *   <help@myri.com>
  38  *   Myricom, Inc., 325N Santa Anita Avenue, Arcadia, CA 91006
  39  *************************************************************************/
  40
  41 #include <linux/tcp.h>
  42 #include <linux/netdevice.h>
  43 #include <linux/skbuff.h>
  44 #include <linux/string.h>
  45 #include <linux/module.h>
  46 #include <linux/pci.h>
  47 #include <linux/dma-mapping.h>
  48 #include <linux/etherdevice.h>
  49 #include <linux/if_ether.h>
  50 #include <linux/if_vlan.h>
  51 #include <linux/inet_lro.h>
  52 #include <linux/ip.h>
  53 #include <linux/inet.h>
  54 #include <linux/in.h>
  55 #include <linux/ethtool.h>
  56 #include <linux/firmware.h>
  57 #include <linux/delay.h>
  58 #include <linux/version.h>
  59 #include <linux/timer.h>
  60 #include <linux/vmalloc.h>
  61 #include <linux/crc32.h>
  62 #include <linux/moduleparam.h>
  63 #include <linux/io.h>
  64 #include <linux/log2.h>
  65 #include <net/checksum.h>
  66 #include <net/ip.h>
  67 #include <net/tcp.h>
  68 #include <asm/byteorder.h>
  69 #include <asm/io.h>
  70 #include <asm/processor.h>
  71 #ifdef CONFIG_MTRR
  72 #include <asm/mtrr.h>
  73 #endif
  74
  75 #include "myri10ge_mcp.h"
  76 #include "myri10ge_mcp_gen_header.h"
  77
  78 #define MYRI10GE_VERSION_STR "1.3.2-1.287"
  79
  80 MODULE_DESCRIPTION("Myricom 10G driver (10GbE)");
  81 MODULE_AUTHOR("Maintainer: help@myri.com");
  82 MODULE_VERSION(MYRI10GE_VERSION_STR);
  83 MODULE_LICENSE("Dual BSD/GPL");
  84
  85 #define MYRI10GE_MAX_ETHER_MTU 9014
  86
  87 #define MYRI10GE_ETH_STOPPED 0
  88 #define MYRI10GE_ETH_STOPPING 1
  89 #define MYRI10GE_ETH_STARTING 2
  90 #define MYRI10GE_ETH_RUNNING 3
  91 #define MYRI10GE_ETH_OPEN_FAILED 4
  92
  93 #define MYRI10GE_EEPROM_STRINGS_SIZE 256
  94 #define MYRI10GE_MAX_SEND_DESC_TSO ((65536 / 2048) * 2)
  95 #define MYRI10GE_MAX_LRO_DESCRIPTORS 8
  96 #define MYRI10GE_LRO_MAX_PKTS 64
  97
  98 #define MYRI10GE_NO_CONFIRM_DATA htonl(0xffffffff)
  99 #define MYRI10GE_NO_RESPONSE_RESULT 0xffffffff
 100
 101 #define MYRI10GE_ALLOC_ORDER 0
 102 #define MYRI10GE_ALLOC_SIZE ((1 << MYRI10GE_ALLOC_ORDER) * PAGE_SIZE)
 103 #define MYRI10GE_MAX_FRAGS_PER_FRAME (MYRI10GE_MAX_ETHER_MTU/MYRI10GE_ALLOC_SIZE + 1)
 104
 105 struct myri10ge_rx_buffer_state {
 106         struct page *page;
 107         int page_offset;
 108          DECLARE_PCI_UNMAP_ADDR(bus)
 109          DECLARE_PCI_UNMAP_LEN(len)
 110 };
 111
 112 struct myri10ge_tx_buffer_state {
 113         struct sk_buff *skb;
 114         int last;
 115          DECLARE_PCI_UNMAP_ADDR(bus)
 116          DECLARE_PCI_UNMAP_LEN(len)
 117 };
 118
 119 struct myri10ge_cmd {
 120         u32 data0;
 121         u32 data1;
 122         u32 data2;
 123 };
 124
 125 struct myri10ge_rx_buf {
 126         struct mcp_kreq_ether_recv __iomem *lanai;      /* lanai ptr for recv ring */
 127         u8 __iomem *wc_fifo;    /* w/c rx dma addr fifo address */
 128         struct mcp_kreq_ether_recv *shadow;     /* host shadow of recv ring */
 129         struct myri10ge_rx_buffer_state *info;
 130         struct page *page;
 131         dma_addr_t bus;
 132         int page_offset;
 133         int cnt;
 134         int fill_cnt;
 135         int alloc_fail;
 136         int mask;               /* number of rx slots -1 */
 137         int watchdog_needed;
 138 };
 139
 140 struct myri10ge_tx_buf {
 141         struct mcp_kreq_ether_send __iomem *lanai;      /* lanai ptr for sendq */
 142         u8 __iomem *wc_fifo;    /* w/c send fifo address */
 143         struct mcp_kreq_ether_send *req_list;   /* host shadow of sendq */
 144         char *req_bytes;
 145         struct myri10ge_tx_buffer_state *info;
 146         int mask;               /* number of transmit slots -1  */
 147         int req ____cacheline_aligned;  /* transmit slots submitted     */
 148         int pkt_start;          /* packets started */
 149         int stop_queue;
 150         int linearized;
 151         int done ____cacheline_aligned; /* transmit slots completed     */
 152         int pkt_done;           /* packets completed */
 153         int wake_queue;
 154 };
 155
 156 struct myri10ge_rx_done {
 157         struct mcp_slot *entry;
 158         dma_addr_t bus;
 159         int cnt;
 160         int idx;
 161         struct net_lro_mgr lro_mgr;
 162         struct net_lro_desc lro_desc[MYRI10GE_MAX_LRO_DESCRIPTORS];
 163 };
 164
 165 struct myri10ge_slice_netstats {
 166         unsigned long rx_packets;
 167         unsigned long tx_packets;
 168         unsigned long rx_bytes;
 169         unsigned long tx_bytes;
 170         unsigned long rx_dropped;
 171         unsigned long tx_dropped;
 172 };
 173
 174 struct myri10ge_slice_state {
 175         struct myri10ge_tx_buf tx;      /* transmit ring        */
 176         struct myri10ge_rx_buf rx_small;
 177         struct myri10ge_rx_buf rx_big;
 178         struct myri10ge_rx_done rx_done;
 179         struct net_device *dev;
 180         struct napi_struct napi;
 181         struct myri10ge_priv *mgp;
 182         struct myri10ge_slice_netstats stats;
 183         __be32 __iomem *irq_claim;
 184         struct mcp_irq_data *fw_stats;
 185         dma_addr_t fw_stats_bus;
 186         int watchdog_tx_done;
 187         int watchdog_tx_req;
 188         char irq_desc[32];
 189 };
 190
 191 struct myri10ge_priv {
 192         struct myri10ge_slice_state *ss;
 193         int tx_boundary;        /* boundary transmits cannot cross */
 194         int num_slices;
 195         int running;            /* running?             */
 196         int csum_flag;          /* rx_csums?            */
 197         int small_bytes;
 198         int big_bytes;
 199         int max_intr_slots;
 200         struct net_device *dev;
 201         struct net_device_stats stats;
 202         spinlock_t stats_lock;
 203         u8 __iomem *sram;
 204         int sram_size;
 205         unsigned long board_span;
 206         unsigned long iomem_base;
 207         __be32 __iomem *irq_deassert;
 208         char *mac_addr_string;
 209         struct mcp_cmd_response *cmd;
 210         dma_addr_t cmd_bus;
 211         struct pci_dev *pdev;
 212         int msi_enabled;
 213         int msix_enabled;
 214         struct msix_entry *msix_vectors;
 215         u32 link_state;
 216         unsigned int rdma_tags_available;
 217         int intr_coal_delay;
 218         __be32 __iomem *intr_coal_delay_ptr;
 219         int mtrr;
 220         int wc_enabled;
 221         int down_cnt;
 222         wait_queue_head_t down_wq;
 223         struct work_struct watchdog_work;
 224         struct timer_list watchdog_timer;
 225         int watchdog_resets;
 226         int watchdog_pause;
 227         int pause;
 228         char *fw_name;
 229         char eeprom_strings[MYRI10GE_EEPROM_STRINGS_SIZE];
 230         char *product_code_string;
 231         char fw_version[128];
 232         int fw_ver_major;
 233         int fw_ver_minor;
 234         int fw_ver_tiny;
 235         int adopted_rx_filter_bug;
 236         u8 mac_addr[6];         /* eeprom mac address */
 237         unsigned long serial_number;
 238         int vendor_specific_offset;
 239         int fw_multicast_support;
 240         unsigned long features;
 241         u32 max_tso6;
 242         u32 read_dma;
 243         u32 write_dma;
 244         u32 read_write_dma;
 245         u32 link_changes;
 246         u32 msg_enable;
 247 };
 248
 249 static char *myri10ge_fw_unaligned = "myri10ge_ethp_z8e.dat";
 250 static char *myri10ge_fw_aligned = "myri10ge_eth_z8e.dat";
 251 static char *myri10ge_fw_rss_unaligned = "myri10ge_rss_ethp_z8e.dat";
 252 static char *myri10ge_fw_rss_aligned = "myri10ge_rss_eth_z8e.dat";
 253
 254 static char *myri10ge_fw_name = NULL;
 255 module_param(myri10ge_fw_name, charp, S_IRUGO | S_IWUSR);
 256 MODULE_PARM_DESC(myri10ge_fw_name, "Firmware image name");
 257
 258 static int myri10ge_ecrc_enable = 1;
 259 module_param(myri10ge_ecrc_enable, int, S_IRUGO);
 260 MODULE_PARM_DESC(myri10ge_ecrc_enable, "Enable Extended CRC on PCI-E");
 261
 262 static int myri10ge_small_bytes = -1;   /* -1 == auto */
 263 module_param(myri10ge_small_bytes, int, S_IRUGO | S_IWUSR);
 264 MODULE_PARM_DESC(myri10ge_small_bytes, "Threshold of small packets");
 265
 266 static int myri10ge_msi = 1;    /* enable msi by default */
 267 module_param(myri10ge_msi, int, S_IRUGO | S_IWUSR);
 268 MODULE_PARM_DESC(myri10ge_msi, "Enable Message Signalled Interrupts");
 269
 270 static int myri10ge_intr_coal_delay = 75;
 271 module_param(myri10ge_intr_coal_delay, int, S_IRUGO);
 272 MODULE_PARM_DESC(myri10ge_intr_coal_delay, "Interrupt coalescing delay");
 273
 274 static int myri10ge_flow_control = 1;
 275 module_param(myri10ge_flow_control, int, S_IRUGO);
 276 MODULE_PARM_DESC(myri10ge_flow_control, "Pause parameter");
 277
 278 static int myri10ge_deassert_wait = 1;
 279 module_param(myri10ge_deassert_wait, int, S_IRUGO | S_IWUSR);
 280 MODULE_PARM_DESC(myri10ge_deassert_wait,
 281                  "Wait when deasserting legacy interrupts");
 282
 283 static int myri10ge_force_firmware = 0;
 284 module_param(myri10ge_force_firmware, int, S_IRUGO);
 285 MODULE_PARM_DESC(myri10ge_force_firmware,
 286                  "Force firmware to assume aligned completions");
 287
 288 static int myri10ge_initial_mtu = MYRI10GE_MAX_ETHER_MTU - ETH_HLEN;
 289 module_param(myri10ge_initial_mtu, int, S_IRUGO);
 290 MODULE_PARM_DESC(myri10ge_initial_mtu, "Initial MTU");
 291
 292 static int myri10ge_napi_weight = 64;
 293 module_param(myri10ge_napi_weight, int, S_IRUGO);
 294 MODULE_PARM_DESC(myri10ge_napi_weight, "Set NAPI weight");
 295
 296 static int myri10ge_watchdog_timeout = 1;
 297 module_param(myri10ge_watchdog_timeout, int, S_IRUGO);
 298 MODULE_PARM_DESC(myri10ge_watchdog_timeout, "Set watchdog timeout");
 299
 300 static int myri10ge_max_irq_loops = 1048576;
 301 module_param(myri10ge_max_irq_loops, int, S_IRUGO);
 302 MODULE_PARM_DESC(myri10ge_max_irq_loops,
 303                  "Set stuck legacy IRQ detection threshold");
 304
 305 #define MYRI10GE_MSG_DEFAULT NETIF_MSG_LINK
 306
 307 static int myri10ge_debug = -1; /* defaults above */
 308 module_param(myri10ge_debug, int, 0);
 309 MODULE_PARM_DESC(myri10ge_debug, "Debug level (0=none,...,16=all)");
 310
 311 static int myri10ge_lro = 1;
 312 module_param(myri10ge_lro, int, S_IRUGO);
 313 MODULE_PARM_DESC(myri10ge_lro, "Enable large receive offload");
 314
 315 static int myri10ge_lro_max_pkts = MYRI10GE_LRO_MAX_PKTS;
 316 module_param(myri10ge_lro_max_pkts, int, S_IRUGO);
 317 MODULE_PARM_DESC(myri10ge_lro_max_pkts,
 318                  "Number of LRO packets to be aggregated");
 319
 320 static int myri10ge_fill_thresh = 256;
 321 module_param(myri10ge_fill_thresh, int, S_IRUGO | S_IWUSR);
 322 MODULE_PARM_DESC(myri10ge_fill_thresh, "Number of empty rx slots allowed");
 323
 324 static int myri10ge_reset_recover = 1;
 325
 326 static int myri10ge_wcfifo = 0;
 327 module_param(myri10ge_wcfifo, int, S_IRUGO);
 328 MODULE_PARM_DESC(myri10ge_wcfifo, "Enable WC Fifo when WC is enabled");
 329
 330 static int myri10ge_max_slices = 1;
 331 module_param(myri10ge_max_slices, int, S_IRUGO);
 332 MODULE_PARM_DESC(myri10ge_max_slices, "Max tx/rx queues");
 333
 334 static int myri10ge_rss_hash = MXGEFW_RSS_HASH_TYPE_SRC_PORT;
 335 module_param(myri10ge_rss_hash, int, S_IRUGO);
 336 MODULE_PARM_DESC(myri10ge_rss_hash, "Type of RSS hashing to do");
 337
 338 #define MYRI10GE_FW_OFFSET 1024*1024
 339 #define MYRI10GE_HIGHPART_TO_U32(X) \
 340 (sizeof (X) == 8) ? ((u32)((u64)(X) >> 32)) : (0)
 341 #define MYRI10GE_LOWPART_TO_U32(X) ((u32)(X))
 342
 343 #define myri10ge_pio_copy(to,from,size) __iowrite64_copy(to,from,size/8)
 344
 345 static void myri10ge_set_multicast_list(struct net_device *dev);
 346 static int myri10ge_sw_tso(struct sk_buff *skb, struct net_device *dev);
 347
 348 static inline void put_be32(__be32 val, __be32 __iomem * p)
 349 {
 350         __raw_writel((__force __u32) val, (__force void __iomem *)p);
 351 }
 352
 353 static int
 354 myri10ge_send_cmd(struct myri10ge_priv *mgp, u32 cmd,
 355                   struct myri10ge_cmd *data, int atomic)
 356 {
 357         struct mcp_cmd *buf;
 358         char buf_bytes[sizeof(*buf) + 8];
 359         struct mcp_cmd_response *response = mgp->cmd;
 360         char __iomem *cmd_addr = mgp->sram + MXGEFW_ETH_CMD;
 361         u32 dma_low, dma_high, result, value;
 362         int sleep_total = 0;
 363
 364         /* ensure buf is aligned to 8 bytes */
 365         buf = (struct mcp_cmd *)ALIGN((unsigned long)buf_bytes, 8);
 366
 367         buf->data0 = htonl(data->data0);
 368         buf->data1 = htonl(data->data1);
 369         buf->data2 = htonl(data->data2);
 370         buf->cmd = htonl(cmd);
 371         dma_low = MYRI10GE_LOWPART_TO_U32(mgp->cmd_bus);
 372         dma_high = MYRI10GE_HIGHPART_TO_U32(mgp->cmd_bus);
 373
 374         buf->response_addr.low = htonl(dma_low);
 375         buf->response_addr.high = htonl(dma_high);
 376         response->result = htonl(MYRI10GE_NO_RESPONSE_RESULT);
 377         mb();
 378         myri10ge_pio_copy(cmd_addr, buf, sizeof(*buf));
 379
 380         /* wait up to 15ms. Longest command is the DMA benchmark,
 381          * which is capped at 5ms, but runs from a timeout handler
 382          * that runs every 7.8ms. So a 15ms timeout leaves us with
 383          * a 2.2ms margin
 384          */
 385         if (atomic) {
 386                 /* if atomic is set, do not sleep,
 387                  * and try to get the completion quickly
 388                  * (1ms will be enough for those commands) */
 389                 for (sleep_total = 0;
 390                      sleep_total < 1000
 391                      && response->result == htonl(MYRI10GE_NO_RESPONSE_RESULT);
 392                      sleep_total += 10) {
 393                         udelay(10);
 394                         mb();
 395                 }
 396         } else {
 397                 /* use msleep for most command */
 398                 for (sleep_total = 0;
 399                      sleep_total < 15
 400                      && response->result == htonl(MYRI10GE_NO_RESPONSE_RESULT);
 401                      sleep_total++)
 402                         msleep(1);
 403         }
 404
 405         result = ntohl(response->result);
 406         value = ntohl(response->data);
 407         if (result != MYRI10GE_NO_RESPONSE_RESULT) {
 408                 if (result == 0) {
 409                         data->data0 = value;
 410                         return 0;
 411                 } else if (result == MXGEFW_CMD_UNKNOWN) {
 412                         return -ENOSYS;
 413                 } else if (result == MXGEFW_CMD_ERROR_UNALIGNED) {
 414                         return -E2BIG;
 415                 } else {
 416                         dev_err(&mgp->pdev->dev,
 417                                 "command %d failed, result = %d\n",
 418                                 cmd, result);
 419                         return -ENXIO;
 420                 }
 421         }
 422
 423         dev_err(&mgp->pdev->dev, "command %d timed out, result = %d\n",
 424                 cmd, result);
 425         return -EAGAIN;
 426 }
 427
 428 /*
 429  * The eeprom strings on the lanaiX have the format
 430  * SN=x\0
 431  * MAC=x:x:x:x:x:x\0
 432  * PT:ddd mmm xx xx:xx:xx xx\0
 433  * PV:ddd mmm xx xx:xx:xx xx\0
 434  */
 435 static int myri10ge_read_mac_addr(struct myri10ge_priv *mgp)
 436 {
 437         char *ptr, *limit;
 438         int i;
 439
 440         ptr = mgp->eeprom_strings;
 441         limit = mgp->eeprom_strings + MYRI10GE_EEPROM_STRINGS_SIZE;
 442
 443         while (*ptr != '\0' && ptr < limit) {
 444                 if (memcmp(ptr, "MAC=", 4) == 0) {
 445                         ptr += 4;
 446                         mgp->mac_addr_string = ptr;
 447                         for (i = 0; i < 6; i++) {
 448                                 if ((ptr + 2) > limit)
 449                                         goto abort;
 450                                 mgp->mac_addr[i] =
 451                                     simple_strtoul(ptr, &ptr, 16);
 452                                 ptr += 1;
 453                         }
 454                 }
 455                 if (memcmp(ptr, "PC=", 3) == 0) {
 456                         ptr += 3;
 457                         mgp->product_code_string = ptr;
 458                 }
 459                 if (memcmp((const void *)ptr, "SN=", 3) == 0) {
 460                         ptr += 3;
 461                         mgp->serial_number = simple_strtoul(ptr, &ptr, 10);
 462                 }
 463                 while (ptr < limit && *ptr++) ;
 464         }
 465
 466         return 0;
 467
 468 abort:
 469         dev_err(&mgp->pdev->dev, "failed to parse eeprom_strings\n");
 470         return -ENXIO;
 471 }
 472
 473 /*
 474  * Enable or disable periodic RDMAs from the host to make certain
 475  * chipsets resend dropped PCIe messages
 476  */
 477
 478 static void myri10ge_dummy_rdma(struct myri10ge_priv *mgp, int enable)
 479 {
 480         char __iomem *submit;
 481         __be32 buf[16] __attribute__ ((__aligned__(8)));
 482         u32 dma_low, dma_high;
 483         int i;
 484
 485         /* clear confirmation addr */
 486         mgp->cmd->data = 0;
 487         mb();
 488
 489         /* send a rdma command to the PCIe engine, and wait for the
 490          * response in the confirmation address.  The firmware should
 491          * write a -1 there to indicate it is alive and well
 492          */
 493         dma_low = MYRI10GE_LOWPART_TO_U32(mgp->cmd_bus);
 494         dma_high = MYRI10GE_HIGHPART_TO_U32(mgp->cmd_bus);
 495
 496         buf[0] = htonl(dma_high);       /* confirm addr MSW */
 497         buf[1] = htonl(dma_low);        /* confirm addr LSW */
 498         buf[2] = MYRI10GE_NO_CONFIRM_DATA;      /* confirm data */
 499         buf[3] = htonl(dma_high);       /* dummy addr MSW */
 500         buf[4] = htonl(dma_low);        /* dummy addr LSW */
 501         buf[5] = htonl(enable); /* enable? */
 502
 503         submit = mgp->sram + MXGEFW_BOOT_DUMMY_RDMA;
 504
 505         myri10ge_pio_copy(submit, &buf, sizeof(buf));
 506         for (i = 0; mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA && i < 20; i++)
 507                 msleep(1);
 508         if (mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA)
 509                 dev_err(&mgp->pdev->dev, "dummy rdma %s failed\n",
 510                         (enable ? "enable" : "disable"));
 511 }
 512
 513 static int
 514 myri10ge_validate_firmware(struct myri10ge_priv *mgp,
 515                            struct mcp_gen_header *hdr)
 516 {
 517         struct device *dev = &mgp->pdev->dev;
 518
 519         /* check firmware type */
 520         if (ntohl(hdr->mcp_type) != MCP_TYPE_ETH) {
 521                 dev_err(dev, "Bad firmware type: 0x%x\n", ntohl(hdr->mcp_type));
 522                 return -EINVAL;
 523         }
 524
 525         /* save firmware version for ethtool */
 526         strncpy(mgp->fw_version, hdr->version, sizeof(mgp->fw_version));
 527
 528         sscanf(mgp->fw_version, "%d.%d.%d", &mgp->fw_ver_major,
 529                &mgp->fw_ver_minor, &mgp->fw_ver_tiny);
 530
 531         if (!(mgp->fw_ver_major == MXGEFW_VERSION_MAJOR
 532               && mgp->fw_ver_minor == MXGEFW_VERSION_MINOR)) {
 533                 dev_err(dev, "Found firmware version %s\n", mgp->fw_version);
 534                 dev_err(dev, "Driver needs %d.%d\n", MXGEFW_VERSION_MAJOR,
 535                         MXGEFW_VERSION_MINOR);
 536                 return -EINVAL;
 537         }
 538         return 0;
 539 }
 540
 541 static int myri10ge_load_hotplug_firmware(struct myri10ge_priv *mgp, u32 * size)
 542 {
 543         unsigned crc, reread_crc;
 544         const struct firmware *fw;
 545         struct device *dev = &mgp->pdev->dev;
 546         struct mcp_gen_header *hdr;
 547         size_t hdr_offset;
 548         int status;
 549         unsigned i;
 550
 551         if ((status = request_firmware(&fw, mgp->fw_name, dev)) < 0) {
 552                 dev_err(dev, "Unable to load %s firmware image via hotplug\n",
 553                         mgp->fw_name);
 554                 status = -EINVAL;
 555                 goto abort_with_nothing;
 556         }
 557
 558         /* check size */
 559
 560         if (fw->size >= mgp->sram_size - MYRI10GE_FW_OFFSET ||
 561             fw->size < MCP_HEADER_PTR_OFFSET + 4) {
 562                 dev_err(dev, "Firmware size invalid:%d\n", (int)fw->size);
 563                 status = -EINVAL;
 564                 goto abort_with_fw;
 565         }
 566
 567         /* check id */
 568         hdr_offset = ntohl(*(__be32 *) (fw->data + MCP_HEADER_PTR_OFFSET));
 569         if ((hdr_offset & 3) || hdr_offset + sizeof(*hdr) > fw->size) {
 570                 dev_err(dev, "Bad firmware file\n");
 571                 status = -EINVAL;
 572                 goto abort_with_fw;
 573         }
 574         hdr = (void *)(fw->data + hdr_offset);
 575
 576         status = myri10ge_validate_firmware(mgp, hdr);
 577         if (status != 0)
 578                 goto abort_with_fw;
 579
 580         crc = crc32(~0, fw->data, fw->size);
 581         for (i = 0; i < fw->size; i += 256) {
 582                 myri10ge_pio_copy(mgp->sram + MYRI10GE_FW_OFFSET + i,
 583                                   fw->data + i,
 584                                   min(256U, (unsigned)(fw->size - i)));
 585                 mb();
 586                 readb(mgp->sram);
 587         }
 588         /* corruption checking is good for parity recovery and buggy chipset */
 589         memcpy_fromio(fw->data, mgp->sram + MYRI10GE_FW_OFFSET, fw->size);
 590         reread_crc = crc32(~0, fw->data, fw->size);
 591         if (crc != reread_crc) {
 592                 dev_err(dev, "CRC failed(fw-len=%u), got 0x%x (expect 0x%x)\n",
 593                         (unsigned)fw->size, reread_crc, crc);
 594                 status = -EIO;
 595                 goto abort_with_fw;
 596         }
 597         *size = (u32) fw->size;
 598
 599 abort_with_fw:
 600         release_firmware(fw);
 601
 602 abort_with_nothing:
 603         return status;
 604 }
 605
 606 static int myri10ge_adopt_running_firmware(struct myri10ge_priv *mgp)
 607 {
 608         struct mcp_gen_header *hdr;
 609         struct device *dev = &mgp->pdev->dev;
 610         const size_t bytes = sizeof(struct mcp_gen_header);
 611         size_t hdr_offset;
 612         int status;
 613
 614         /* find running firmware header */
 615         hdr_offset = swab32(readl(mgp->sram + MCP_HEADER_PTR_OFFSET));
 616
 617         if ((hdr_offset & 3) || hdr_offset + sizeof(*hdr) > mgp->sram_size) {
 618                 dev_err(dev, "Running firmware has bad header offset (%d)\n",
 619                         (int)hdr_offset);
 620                 return -EIO;
 621         }
 622
 623         /* copy header of running firmware from SRAM to host memory to
 624          * validate firmware */
 625         hdr = kmalloc(bytes, GFP_KERNEL);
 626         if (hdr == NULL) {
 627                 dev_err(dev, "could not malloc firmware hdr\n");
 628                 return -ENOMEM;
 629         }
 630         memcpy_fromio(hdr, mgp->sram + hdr_offset, bytes);
 631         status = myri10ge_validate_firmware(mgp, hdr);
 632         kfree(hdr);
 633
 634         /* check to see if adopted firmware has bug where adopting
 635          * it will cause broadcasts to be filtered unless the NIC
 636          * is kept in ALLMULTI mode */
 637         if (mgp->fw_ver_major == 1 && mgp->fw_ver_minor == 4 &&
 638             mgp->fw_ver_tiny >= 4 && mgp->fw_ver_tiny <= 11) {
 639                 mgp->adopted_rx_filter_bug = 1;
 640                 dev_warn(dev, "Adopting fw %d.%d.%d: "
 641                          "working around rx filter bug\n",
 642                          mgp->fw_ver_major, mgp->fw_ver_minor,
 643                          mgp->fw_ver_tiny);
 644         }
 645         return status;
 646 }
 647
 648 static int myri10ge_get_firmware_capabilities(struct myri10ge_priv *mgp)
 649 {
 650         struct myri10ge_cmd cmd;
 651         int status;
 652
 653         /* probe for IPv6 TSO support */
 654         mgp->features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_TSO;
 655         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_MAX_TSO6_HDR_SIZE,
 656                                    &cmd, 0);
 657         if (status == 0) {
 658                 mgp->max_tso6 = cmd.data0;
 659                 mgp->features |= NETIF_F_TSO6;
 660         }
 661
 662         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_RX_RING_SIZE, &cmd, 0);
 663         if (status != 0) {
 664                 dev_err(&mgp->pdev->dev,
 665                         "failed MXGEFW_CMD_GET_RX_RING_SIZE\n");
 666                 return -ENXIO;
 667         }
 668
 669         mgp->max_intr_slots = 2 * (cmd.data0 / sizeof(struct mcp_dma_addr));
 670
 671         return 0;
 672 }
 673
 674 static int myri10ge_load_firmware(struct myri10ge_priv *mgp, int adopt)
 675 {
 676         char __iomem *submit;
 677         __be32 buf[16] __attribute__ ((__aligned__(8)));
 678         u32 dma_low, dma_high, size;
 679         int status, i;
 680
 681         size = 0;
 682         status = myri10ge_load_hotplug_firmware(mgp, &size);
 683         if (status) {
 684                 if (!adopt)
 685                         return status;
 686                 dev_warn(&mgp->pdev->dev, "hotplug firmware loading failed\n");
 687
 688                 /* Do not attempt to adopt firmware if there
 689                  * was a bad crc */
 690                 if (status == -EIO)
 691                         return status;
 692
 693                 status = myri10ge_adopt_running_firmware(mgp);
 694                 if (status != 0) {
 695                         dev_err(&mgp->pdev->dev,
 696                                 "failed to adopt running firmware\n");
 697                         return status;
 698                 }
 699                 dev_info(&mgp->pdev->dev,
 700                          "Successfully adopted running firmware\n");
 701                 if (mgp->tx_boundary == 4096) {
 702                         dev_warn(&mgp->pdev->dev,
 703                                  "Using firmware currently running on NIC"
 704                                  ".  For optimal\n");
 705                         dev_warn(&mgp->pdev->dev,
 706                                  "performance consider loading optimized "
 707                                  "firmware\n");
 708                         dev_warn(&mgp->pdev->dev, "via hotplug\n");
 709                 }
 710
 711                 mgp->fw_name = "adopted";
 712                 mgp->tx_boundary = 2048;
 713                 myri10ge_dummy_rdma(mgp, 1);
 714                 status = myri10ge_get_firmware_capabilities(mgp);
 715                 return status;
 716         }
 717
 718         /* clear confirmation addr */
 719         mgp->cmd->data = 0;
 720         mb();
 721
 722         /* send a reload command to the bootstrap MCP, and wait for the
 723          *  response in the confirmation address.  The firmware should
 724          * write a -1 there to indicate it is alive and well
 725          */
 726         dma_low = MYRI10GE_LOWPART_TO_U32(mgp->cmd_bus);
 727         dma_high = MYRI10GE_HIGHPART_TO_U32(mgp->cmd_bus);
 728
 729         buf[0] = htonl(dma_high);       /* confirm addr MSW */
 730         buf[1] = htonl(dma_low);        /* confirm addr LSW */
 731         buf[2] = MYRI10GE_NO_CONFIRM_DATA;      /* confirm data */
 732
 733         /* FIX: All newest firmware should un-protect the bottom of
 734          * the sram before handoff. However, the very first interfaces
 735          * do not. Therefore the handoff copy must skip the first 8 bytes
 736          */
 737         buf[3] = htonl(MYRI10GE_FW_OFFSET + 8); /* where the code starts */
 738         buf[4] = htonl(size - 8);       /* length of code */
 739         buf[5] = htonl(8);      /* where to copy to */
 740         buf[6] = htonl(0);      /* where to jump to */
 741
 742         submit = mgp->sram + MXGEFW_BOOT_HANDOFF;
 743
 744         myri10ge_pio_copy(submit, &buf, sizeof(buf));
 745         mb();
 746         msleep(1);
 747         mb();
 748         i = 0;
 749         while (mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA && i < 9) {
 750                 msleep(1 << i);
 751                 i++;
 752         }
 753         if (mgp->cmd->data != MYRI10GE_NO_CONFIRM_DATA) {
 754                 dev_err(&mgp->pdev->dev, "handoff failed\n");
 755                 return -ENXIO;
 756         }
 757         myri10ge_dummy_rdma(mgp, 1);
 758         status = myri10ge_get_firmware_capabilities(mgp);
 759
 760         return status;
 761 }
 762
 763 static int myri10ge_update_mac_address(struct myri10ge_priv *mgp, u8 * addr)
 764 {
 765         struct myri10ge_cmd cmd;
 766         int status;
 767
 768         cmd.data0 = ((addr[0] << 24) | (addr[1] << 16)
 769                      | (addr[2] << 8) | addr[3]);
 770
 771         cmd.data1 = ((addr[4] << 8) | (addr[5]));
 772
 773         status = myri10ge_send_cmd(mgp, MXGEFW_SET_MAC_ADDRESS, &cmd, 0);
 774         return status;
 775 }
 776
 777 static int myri10ge_change_pause(struct myri10ge_priv *mgp, int pause)
 778 {
 779         struct myri10ge_cmd cmd;
 780         int status, ctl;
 781
 782         ctl = pause ? MXGEFW_ENABLE_FLOW_CONTROL : MXGEFW_DISABLE_FLOW_CONTROL;
 783         status = myri10ge_send_cmd(mgp, ctl, &cmd, 0);
 784
 785         if (status) {
 786                 printk(KERN_ERR
 787                        "myri10ge: %s: Failed to set flow control mode\n",
 788                        mgp->dev->name);
 789                 return status;
 790         }
 791         mgp->pause = pause;
 792         return 0;
 793 }
 794
 795 static void
 796 myri10ge_change_promisc(struct myri10ge_priv *mgp, int promisc, int atomic)
 797 {
 798         struct myri10ge_cmd cmd;
 799         int status, ctl;
 800
 801         ctl = promisc ? MXGEFW_ENABLE_PROMISC : MXGEFW_DISABLE_PROMISC;
 802         status = myri10ge_send_cmd(mgp, ctl, &cmd, atomic);
 803         if (status)
 804                 printk(KERN_ERR "myri10ge: %s: Failed to set promisc mode\n",
 805                        mgp->dev->name);
 806 }
 807
 808 static int myri10ge_dma_test(struct myri10ge_priv *mgp, int test_type)
 809 {
 810         struct myri10ge_cmd cmd;
 811         int status;
 812         u32 len;
 813         struct page *dmatest_page;
 814         dma_addr_t dmatest_bus;
 815         char *test = " ";
 816
 817         dmatest_page = alloc_page(GFP_KERNEL);
 818         if (!dmatest_page)
 819                 return -ENOMEM;
 820         dmatest_bus = pci_map_page(mgp->pdev, dmatest_page, 0, PAGE_SIZE,
 821                                    DMA_BIDIRECTIONAL);
 822
 823         /* Run a small DMA test.
 824          * The magic multipliers to the length tell the firmware
 825          * to do DMA read, write, or read+write tests.  The
 826          * results are returned in cmd.data0.  The upper 16
 827          * bits or the return is the number of transfers completed.
 828          * The lower 16 bits is the time in 0.5us ticks that the
 829          * transfers took to complete.
 830          */
 831
 832         len = mgp->tx_boundary;
 833
 834         cmd.data0 = MYRI10GE_LOWPART_TO_U32(dmatest_bus);
 835         cmd.data1 = MYRI10GE_HIGHPART_TO_U32(dmatest_bus);
 836         cmd.data2 = len * 0x10000;
 837         status = myri10ge_send_cmd(mgp, test_type, &cmd, 0);
 838         if (status != 0) {
 839                 test = "read";
 840                 goto abort;
 841         }
 842         mgp->read_dma = ((cmd.data0 >> 16) * len * 2) / (cmd.data0 & 0xffff);
 843         cmd.data0 = MYRI10GE_LOWPART_TO_U32(dmatest_bus);
 844         cmd.data1 = MYRI10GE_HIGHPART_TO_U32(dmatest_bus);
 845         cmd.data2 = len * 0x1;
 846         status = myri10ge_send_cmd(mgp, test_type, &cmd, 0);
 847         if (status != 0) {
 848                 test = "write";
 849                 goto abort;
 850         }
 851         mgp->write_dma = ((cmd.data0 >> 16) * len * 2) / (cmd.data0 & 0xffff);
 852
 853         cmd.data0 = MYRI10GE_LOWPART_TO_U32(dmatest_bus);
 854         cmd.data1 = MYRI10GE_HIGHPART_TO_U32(dmatest_bus);
 855         cmd.data2 = len * 0x10001;
 856         status = myri10ge_send_cmd(mgp, test_type, &cmd, 0);
 857         if (status != 0) {
 858                 test = "read/write";
 859                 goto abort;
 860         }
 861         mgp->read_write_dma = ((cmd.data0 >> 16) * len * 2 * 2) /
 862             (cmd.data0 & 0xffff);
 863
 864 abort:
 865         pci_unmap_page(mgp->pdev, dmatest_bus, PAGE_SIZE, DMA_BIDIRECTIONAL);
 866         put_page(dmatest_page);
 867
 868         if (status != 0 && test_type != MXGEFW_CMD_UNALIGNED_TEST)
 869                 dev_warn(&mgp->pdev->dev, "DMA %s benchmark failed: %d\n",
 870                          test, status);
 871
 872         return status;
 873 }
 874
 875 static int myri10ge_reset(struct myri10ge_priv *mgp)
 876 {
 877         struct myri10ge_cmd cmd;
 878         struct myri10ge_slice_state *ss;
 879         int i, status;
 880         size_t bytes;
 881
 882         /* try to send a reset command to the card to see if it
 883          * is alive */
 884         memset(&cmd, 0, sizeof(cmd));
 885         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_RESET, &cmd, 0);
 886         if (status != 0) {
 887                 dev_err(&mgp->pdev->dev, "failed reset\n");
 888                 return -ENXIO;
 889         }
 890
 891         (void)myri10ge_dma_test(mgp, MXGEFW_DMA_TEST);
 892         /*
 893          * Use non-ndis mcp_slot (eg, 4 bytes total,
 894          * no toeplitz hash value returned.  Older firmware will
 895          * not understand this command, but will use the correct
 896          * sized mcp_slot, so we ignore error returns
 897          */
 898         cmd.data0 = MXGEFW_RSS_MCP_SLOT_TYPE_MIN;
 899         (void)myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_RSS_MCP_SLOT_TYPE, &cmd, 0);
 900
 901         /* Now exchange information about interrupts  */
 902
 903         bytes = mgp->max_intr_slots * sizeof(*mgp->ss[0].rx_done.entry);
 904         cmd.data0 = (u32) bytes;
 905         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_INTRQ_SIZE, &cmd, 0);
 906
 907         /*
 908          * Even though we already know how many slices are supported
 909          * via myri10ge_probe_slices() MXGEFW_CMD_GET_MAX_RSS_QUEUES
 910          * has magic side effects, and must be called after a reset.
 911          * It must be called prior to calling any RSS related cmds,
 912          * including assigning an interrupt queue for anything but
 913          * slice 0.  It must also be called *after*
 914          * MXGEFW_CMD_SET_INTRQ_SIZE, since the intrq size is used by
 915          * the firmware to compute offsets.
 916          */
 917
 918         if (mgp->num_slices > 1) {
 919
 920                 /* ask the maximum number of slices it supports */
 921                 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_MAX_RSS_QUEUES,
 922                                            &cmd, 0);
 923                 if (status != 0) {
 924                         dev_err(&mgp->pdev->dev,
 925                                 "failed to get number of slices\n");
 926                 }
 927
 928                 /*
 929                  * MXGEFW_CMD_ENABLE_RSS_QUEUES must be called prior
 930                  * to setting up the interrupt queue DMA
 931                  */
 932
 933                 cmd.data0 = mgp->num_slices;
 934                 cmd.data1 = 1;  /* use MSI-X */
 935                 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_ENABLE_RSS_QUEUES,
 936                                            &cmd, 0);
 937                 if (status != 0) {
 938                         dev_err(&mgp->pdev->dev,
 939                                 "failed to set number of slices\n");
 940
 941                         return status;
 942                 }
 943         }
 944         for (i = 0; i < mgp->num_slices; i++) {
 945                 ss = &mgp->ss[i];
 946                 cmd.data0 = MYRI10GE_LOWPART_TO_U32(ss->rx_done.bus);
 947                 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(ss->rx_done.bus);
 948                 cmd.data2 = i;
 949                 status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_INTRQ_DMA,
 950                                             &cmd, 0);
 951         };
 952
 953         status |=
 954             myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_IRQ_ACK_OFFSET, &cmd, 0);
 955         for (i = 0; i < mgp->num_slices; i++) {
 956                 ss = &mgp->ss[i];
 957                 ss->irq_claim =
 958                     (__iomem __be32 *) (mgp->sram + cmd.data0 + 8 * i);
 959         }
 960         status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_IRQ_DEASSERT_OFFSET,
 961                                     &cmd, 0);
 962         mgp->irq_deassert = (__iomem __be32 *) (mgp->sram + cmd.data0);
 963
 964         status |= myri10ge_send_cmd
 965             (mgp, MXGEFW_CMD_GET_INTR_COAL_DELAY_OFFSET, &cmd, 0);
 966         mgp->intr_coal_delay_ptr = (__iomem __be32 *) (mgp->sram + cmd.data0);
 967         if (status != 0) {
 968                 dev_err(&mgp->pdev->dev, "failed set interrupt parameters\n");
 969                 return status;
 970         }
 971         put_be32(htonl(mgp->intr_coal_delay), mgp->intr_coal_delay_ptr);
 972
 973         /* reset mcp/driver shared state back to 0 */
 974
 975         mgp->link_changes = 0;
 976         for (i = 0; i < mgp->num_slices; i++) {
 977                 ss = &mgp->ss[i];
 978
 979                 memset(ss->rx_done.entry, 0, bytes);
 980                 ss->tx.req = 0;
 981                 ss->tx.done = 0;
 982                 ss->tx.pkt_start = 0;
 983                 ss->tx.pkt_done = 0;
 984                 ss->rx_big.cnt = 0;
 985                 ss->rx_small.cnt = 0;
 986                 ss->rx_done.idx = 0;
 987                 ss->rx_done.cnt = 0;
 988                 ss->tx.wake_queue = 0;
 989                 ss->tx.stop_queue = 0;
 990         }
 991
 992         status = myri10ge_update_mac_address(mgp, mgp->dev->dev_addr);
 993         myri10ge_change_pause(mgp, mgp->pause);
 994         myri10ge_set_multicast_list(mgp->dev);
 995         return status;
 996 }
 997
 998 static inline void
 999 myri10ge_submit_8rx(struct mcp_kreq_ether_recv __iomem * dst,
1000                     struct mcp_kreq_ether_recv *src)
1001 {
1002         __be32 low;
1003
1004         low = src->addr_low;
1005         src->addr_low = htonl(DMA_32BIT_MASK);
1006         myri10ge_pio_copy(dst, src, 4 * sizeof(*src));
1007         mb();
1008         myri10ge_pio_copy(dst + 4, src + 4, 4 * sizeof(*src));
1009         mb();
1010         src->addr_low = low;
1011         put_be32(low, &dst->addr_low);
1012         mb();
1013 }
1014
1015 static inline void myri10ge_vlan_ip_csum(struct sk_buff *skb, __wsum hw_csum)
1016 {
1017         struct vlan_hdr *vh = (struct vlan_hdr *)(skb->data);
1018
1019         if ((skb->protocol == htons(ETH_P_8021Q)) &&
1020             (vh->h_vlan_encapsulated_proto == htons(ETH_P_IP) ||
1021              vh->h_vlan_encapsulated_proto == htons(ETH_P_IPV6))) {
1022                 skb->csum = hw_csum;
1023                 skb->ip_summed = CHECKSUM_COMPLETE;
1024         }
1025 }
1026
1027 static inline void
1028 myri10ge_rx_skb_build(struct sk_buff *skb, u8 * va,
1029                       struct skb_frag_struct *rx_frags, int len, int hlen)
1030 {
1031         struct skb_frag_struct *skb_frags;
1032
1033         skb->len = skb->data_len = len;
1034         skb->truesize = len + sizeof(struct sk_buff);
1035         /* attach the page(s) */
1036
1037         skb_frags = skb_shinfo(skb)->frags;
1038         while (len > 0) {
1039                 memcpy(skb_frags, rx_frags, sizeof(*skb_frags));
1040                 len -= rx_frags->size;
1041                 skb_frags++;
1042                 rx_frags++;
1043                 skb_shinfo(skb)->nr_frags++;
1044         }
1045
1046         /* pskb_may_pull is not available in irq context, but
1047          * skb_pull() (for ether_pad and eth_type_trans()) requires
1048          * the beginning of the packet in skb_headlen(), move it
1049          * manually */
1050         skb_copy_to_linear_data(skb, va, hlen);
1051         skb_shinfo(skb)->frags[0].page_offset += hlen;
1052         skb_shinfo(skb)->frags[0].size -= hlen;
1053         skb->data_len -= hlen;
1054         skb->tail += hlen;
1055         skb_pull(skb, MXGEFW_PAD);
1056 }
1057
1058 static void
1059 myri10ge_alloc_rx_pages(struct myri10ge_priv *mgp, struct myri10ge_rx_buf *rx,
1060                         int bytes, int watchdog)
1061 {
1062         struct page *page;
1063         int idx;
1064
1065         if (unlikely(rx->watchdog_needed && !watchdog))
1066                 return;
1067
1068         /* try to refill entire ring */
1069         while (rx->fill_cnt != (rx->cnt + rx->mask + 1)) {
1070                 idx = rx->fill_cnt & rx->mask;
1071                 if (rx->page_offset + bytes <= MYRI10GE_ALLOC_SIZE) {
1072                         /* we can use part of previous page */
1073                         get_page(rx->page);
1074                 } else {
1075                         /* we need a new page */
1076                         page =
1077                             alloc_pages(GFP_ATOMIC | __GFP_COMP,
1078                                         MYRI10GE_ALLOC_ORDER);
1079                         if (unlikely(page == NULL)) {
1080                                 if (rx->fill_cnt - rx->cnt < 16)
1081                                         rx->watchdog_needed = 1;
1082                                 return;
1083                         }
1084                         rx->page = page;
1085                         rx->page_offset = 0;
1086                         rx->bus = pci_map_page(mgp->pdev, page, 0,
1087                                                MYRI10GE_ALLOC_SIZE,
1088                                                PCI_DMA_FROMDEVICE);
1089                 }
1090                 rx->info[idx].page = rx->page;
1091                 rx->info[idx].page_offset = rx->page_offset;
1092                 /* note that this is the address of the start of the
1093                  * page */
1094                 pci_unmap_addr_set(&rx->info[idx], bus, rx->bus);
1095                 rx->shadow[idx].addr_low =
1096                     htonl(MYRI10GE_LOWPART_TO_U32(rx->bus) + rx->page_offset);
1097                 rx->shadow[idx].addr_high =
1098                     htonl(MYRI10GE_HIGHPART_TO_U32(rx->bus));
1099
1100                 /* start next packet on a cacheline boundary */
1101                 rx->page_offset += SKB_DATA_ALIGN(bytes);
1102
1103 #if MYRI10GE_ALLOC_SIZE > 4096
1104                 /* don't cross a 4KB boundary */
1105                 if ((rx->page_offset >> 12) !=
1106                     ((rx->page_offset + bytes - 1) >> 12))
1107                         rx->page_offset = (rx->page_offset + 4096) & ~4095;
1108 #endif
1109                 rx->fill_cnt++;
1110
1111                 /* copy 8 descriptors to the firmware at a time */
1112                 if ((idx & 7) == 7) {
1113                         if (rx->wc_fifo == NULL)
1114                                 myri10ge_submit_8rx(&rx->lanai[idx - 7],
1115                                                     &rx->shadow[idx - 7]);
1116                         else {
1117                                 mb();
1118                                 myri10ge_pio_copy(rx->wc_fifo,
1119                                                   &rx->shadow[idx - 7], 64);
1120                         }
1121                 }
1122         }
1123 }
1124
1125 static inline void
1126 myri10ge_unmap_rx_page(struct pci_dev *pdev,
1127                        struct myri10ge_rx_buffer_state *info, int bytes)
1128 {
1129         /* unmap the recvd page if we're the only or last user of it */
1130         if (bytes >= MYRI10GE_ALLOC_SIZE / 2 ||
1131             (info->page_offset + 2 * bytes) > MYRI10GE_ALLOC_SIZE) {
1132                 pci_unmap_page(pdev, (pci_unmap_addr(info, bus)
1133                                       & ~(MYRI10GE_ALLOC_SIZE - 1)),
1134                                MYRI10GE_ALLOC_SIZE, PCI_DMA_FROMDEVICE);
1135         }
1136 }
1137
1138 #define MYRI10GE_HLEN 64        /* The number of bytes to copy from a
1139                                  * page into an skb */
1140
1141 static inline int
1142 myri10ge_rx_done(struct myri10ge_slice_state *ss, struct myri10ge_rx_buf *rx,
1143                  int bytes, int len, __wsum csum)
1144 {
1145         struct myri10ge_priv *mgp = ss->mgp;
1146         struct sk_buff *skb;
1147         struct skb_frag_struct rx_frags[MYRI10GE_MAX_FRAGS_PER_FRAME];
1148         int i, idx, hlen, remainder;
1149         struct pci_dev *pdev = mgp->pdev;
1150         struct net_device *dev = mgp->dev;
1151         u8 *va;
1152
1153         len += MXGEFW_PAD;
1154         idx = rx->cnt & rx->mask;
1155         va = page_address(rx->info[idx].page) + rx->info[idx].page_offset;
1156         prefetch(va);
1157         /* Fill skb_frag_struct(s) with data from our receive */
1158         for (i = 0, remainder = len; remainder > 0; i++) {
1159                 myri10ge_unmap_rx_page(pdev, &rx->info[idx], bytes);
1160                 rx_frags[i].page = rx->info[idx].page;
1161                 rx_frags[i].page_offset = rx->info[idx].page_offset;
1162                 if (remainder < MYRI10GE_ALLOC_SIZE)
1163                         rx_frags[i].size = remainder;
1164                 else
1165                         rx_frags[i].size = MYRI10GE_ALLOC_SIZE;
1166                 rx->cnt++;
1167                 idx = rx->cnt & rx->mask;
1168                 remainder -= MYRI10GE_ALLOC_SIZE;
1169         }
1170
1171         if (mgp->csum_flag && myri10ge_lro) {
1172                 rx_frags[0].page_offset += MXGEFW_PAD;
1173                 rx_frags[0].size -= MXGEFW_PAD;
1174                 len -= MXGEFW_PAD;
1175                 lro_receive_frags(&ss->rx_done.lro_mgr, rx_frags,
1176                                   /* opaque, will come back in get_frag_header */
1177                                   len, len,
1178                                   (void *)(__force unsigned long)csum, csum);
1179
1180                 return 1;
1181         }
1182
1183         hlen = MYRI10GE_HLEN > len ? len : MYRI10GE_HLEN;
1184
1185         /* allocate an skb to attach the page(s) to. This is done
1186          * after trying LRO, so as to avoid skb allocation overheads */
1187
1188         skb = netdev_alloc_skb(dev, MYRI10GE_HLEN + 16);
1189         if (unlikely(skb == NULL)) {
1190                 mgp->stats.rx_dropped++;
1191                 do {
1192                         i--;
1193                         put_page(rx_frags[i].page);
1194                 } while (i != 0);
1195                 return 0;
1196         }
1197
1198         /* Attach the pages to the skb, and trim off any padding */
1199         myri10ge_rx_skb_build(skb, va, rx_frags, len, hlen);
1200         if (skb_shinfo(skb)->frags[0].size <= 0) {
1201                 put_page(skb_shinfo(skb)->frags[0].page);
1202                 skb_shinfo(skb)->nr_frags = 0;
1203         }
1204         skb->protocol = eth_type_trans(skb, dev);
1205
1206         if (mgp->csum_flag) {
1207                 if ((skb->protocol == htons(ETH_P_IP)) ||
1208                     (skb->protocol == htons(ETH_P_IPV6))) {
1209                         skb->csum = csum;
1210                         skb->ip_summed = CHECKSUM_COMPLETE;
1211                 } else
1212                         myri10ge_vlan_ip_csum(skb, csum);
1213         }
1214         netif_receive_skb(skb);
1215         dev->last_rx = jiffies;
1216         return 1;
1217 }
1218
1219 static inline void
1220 myri10ge_tx_done(struct myri10ge_slice_state *ss, int mcp_index)
1221 {
1222         struct pci_dev *pdev = ss->mgp->pdev;
1223         struct myri10ge_tx_buf *tx = &ss->tx;
1224         struct sk_buff *skb;
1225         int idx, len;
1226
1227         while (tx->pkt_done != mcp_index) {
1228                 idx = tx->done & tx->mask;
1229                 skb = tx->info[idx].skb;
1230
1231                 /* Mark as free */
1232                 tx->info[idx].skb = NULL;
1233                 if (tx->info[idx].last) {
1234                         tx->pkt_done++;
1235                         tx->info[idx].last = 0;
1236                 }
1237                 tx->done++;
1238                 len = pci_unmap_len(&tx->info[idx], len);
1239                 pci_unmap_len_set(&tx->info[idx], len, 0);
1240                 if (skb) {
1241                         ss->stats.tx_bytes += skb->len;
1242                         ss->stats.tx_packets++;
1243                         dev_kfree_skb_irq(skb);
1244                         if (len)
1245                                 pci_unmap_single(pdev,
1246                                                  pci_unmap_addr(&tx->info[idx],
1247                                                                 bus), len,
1248                                                  PCI_DMA_TODEVICE);
1249                 } else {
1250                         if (len)
1251                                 pci_unmap_page(pdev,
1252                                                pci_unmap_addr(&tx->info[idx],
1253                                                               bus), len,
1254                                                PCI_DMA_TODEVICE);
1255                 }
1256         }
1257         /* start the queue if we've stopped it */
1258         if (netif_queue_stopped(ss->dev)
1259             && tx->req - tx->done < (tx->mask >> 1)) {
1260                 tx->wake_queue++;
1261                 netif_wake_queue(ss->dev);
1262         }
1263 }
1264
1265 static inline int
1266 myri10ge_clean_rx_done(struct myri10ge_slice_state *ss, int budget)
1267 {
1268         struct myri10ge_rx_done *rx_done = &ss->rx_done;
1269         struct myri10ge_priv *mgp = ss->mgp;
1270         unsigned long rx_bytes = 0;
1271         unsigned long rx_packets = 0;
1272         unsigned long rx_ok;
1273
1274         int idx = rx_done->idx;
1275         int cnt = rx_done->cnt;
1276         int work_done = 0;
1277         u16 length;
1278         __wsum checksum;
1279
1280         while (rx_done->entry[idx].length != 0 && work_done < budget) {
1281                 length = ntohs(rx_done->entry[idx].length);
1282                 rx_done->entry[idx].length = 0;
1283                 checksum = csum_unfold(rx_done->entry[idx].checksum);
1284                 if (length <= mgp->small_bytes)
1285                         rx_ok = myri10ge_rx_done(ss, &ss->rx_small,
1286                                                  mgp->small_bytes,
1287                                                  length, checksum);
1288                 else
1289                         rx_ok = myri10ge_rx_done(ss, &ss->rx_big,
1290                                                  mgp->big_bytes,
1291                                                  length, checksum);
1292                 rx_packets += rx_ok;
1293                 rx_bytes += rx_ok * (unsigned long)length;
1294                 cnt++;
1295                 idx = cnt & (mgp->max_intr_slots - 1);
1296                 work_done++;
1297         }
1298         rx_done->idx = idx;
1299         rx_done->cnt = cnt;
1300         ss->stats.rx_packets += rx_packets;
1301         ss->stats.rx_bytes += rx_bytes;
1302
1303         if (myri10ge_lro)
1304                 lro_flush_all(&rx_done->lro_mgr);
1305
1306         /* restock receive rings if needed */
1307         if (ss->rx_small.fill_cnt - ss->rx_small.cnt < myri10ge_fill_thresh)
1308                 myri10ge_alloc_rx_pages(mgp, &ss->rx_small,
1309                                         mgp->small_bytes + MXGEFW_PAD, 0);
1310         if (ss->rx_big.fill_cnt - ss->rx_big.cnt < myri10ge_fill_thresh)
1311                 myri10ge_alloc_rx_pages(mgp, &ss->rx_big, mgp->big_bytes, 0);
1312
1313         return work_done;
1314 }
1315
1316 static inline void myri10ge_check_statblock(struct myri10ge_priv *mgp)
1317 {
1318         struct mcp_irq_data *stats = mgp->ss[0].fw_stats;
1319
1320         if (unlikely(stats->stats_updated)) {
1321                 unsigned link_up = ntohl(stats->link_up);
1322                 if (mgp->link_state != link_up) {
1323                         mgp->link_state = link_up;
1324
1325                         if (mgp->link_state == MXGEFW_LINK_UP) {
1326                                 if (netif_msg_link(mgp))
1327                                         printk(KERN_INFO
1328                                                "myri10ge: %s: link up\n",
1329                                                mgp->dev->name);
1330                                 netif_carrier_on(mgp->dev);
1331                                 mgp->link_changes++;
1332                         } else {
1333                                 if (netif_msg_link(mgp))
1334                                         printk(KERN_INFO
1335                                                "myri10ge: %s: link %s\n",
1336                                                mgp->dev->name,
1337                                                (link_up == MXGEFW_LINK_MYRINET ?
1338                                                 "mismatch (Myrinet detected)" :
1339                                                 "down"));
1340                                 netif_carrier_off(mgp->dev);
1341                                 mgp->link_changes++;
1342                         }
1343                 }
1344                 if (mgp->rdma_tags_available !=
1345                     ntohl(stats->rdma_tags_available)) {
1346                         mgp->rdma_tags_available =
1347                             ntohl(stats->rdma_tags_available);
1348                         printk(KERN_WARNING "myri10ge: %s: RDMA timed out! "
1349                                "%d tags left\n", mgp->dev->name,
1350                                mgp->rdma_tags_available);
1351                 }
1352                 mgp->down_cnt += stats->link_down;
1353                 if (stats->link_down)
1354                         wake_up(&mgp->down_wq);
1355         }
1356 }
1357
1358 static int myri10ge_poll(struct napi_struct *napi, int budget)
1359 {
1360         struct myri10ge_slice_state *ss =
1361             container_of(napi, struct myri10ge_slice_state, napi);
1362         struct net_device *netdev = ss->mgp->dev;
1363         int work_done;
1364
1365         /* process as many rx events as NAPI will allow */
1366         work_done = myri10ge_clean_rx_done(ss, budget);
1367
1368         if (work_done < budget) {
1369                 netif_rx_complete(netdev, napi);
1370                 put_be32(htonl(3), ss->irq_claim);
1371         }
1372         return work_done;
1373 }
1374
1375 static irqreturn_t myri10ge_intr(int irq, void *arg)
1376 {
1377         struct myri10ge_slice_state *ss = arg;
1378         struct myri10ge_priv *mgp = ss->mgp;
1379         struct mcp_irq_data *stats = ss->fw_stats;
1380         struct myri10ge_tx_buf *tx = &ss->tx;
1381         u32 send_done_count;
1382         int i;
1383
1384         /* an interrupt on a non-zero slice is implicitly valid
1385          * since MSI-X irqs are not shared */
1386         if (ss != mgp->ss) {
1387                 netif_rx_schedule(ss->dev, &ss->napi);
1388                 return (IRQ_HANDLED);
1389         }
1390
1391         /* make sure it is our IRQ, and that the DMA has finished */
1392         if (unlikely(!stats->valid))
1393                 return (IRQ_NONE);
1394
1395         /* low bit indicates receives are present, so schedule
1396          * napi poll handler */
1397         if (stats->valid & 1)
1398                 netif_rx_schedule(ss->dev, &ss->napi);
1399
1400         if (!mgp->msi_enabled && !mgp->msix_enabled) {
1401                 put_be32(0, mgp->irq_deassert);
1402                 if (!myri10ge_deassert_wait)
1403                         stats->valid = 0;
1404                 mb();
1405         } else
1406                 stats->valid = 0;
1407
1408         /* Wait for IRQ line to go low, if using INTx */
1409         i = 0;
1410         while (1) {
1411                 i++;
1412                 /* check for transmit completes and receives */
1413                 send_done_count = ntohl(stats->send_done_count);
1414                 if (send_done_count != tx->pkt_done)
1415                         myri10ge_tx_done(ss, (int)send_done_count);
1416                 if (unlikely(i > myri10ge_max_irq_loops)) {
1417                         printk(KERN_WARNING "myri10ge: %s: irq stuck?\n",
1418                                mgp->dev->name);
1419                         stats->valid = 0;
1420                         schedule_work(&mgp->watchdog_work);
1421                 }
1422                 if (likely(stats->valid == 0))
1423                         break;
1424                 cpu_relax();
1425                 barrier();
1426         }
1427
1428         myri10ge_check_statblock(mgp);
1429
1430         put_be32(htonl(3), ss->irq_claim + 1);
1431         return (IRQ_HANDLED);
1432 }
1433
1434 static int
1435 myri10ge_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
1436 {
1437         struct myri10ge_priv *mgp = netdev_priv(netdev);
1438         char *ptr;
1439         int i;
1440
1441         cmd->autoneg = AUTONEG_DISABLE;
1442         cmd->speed = SPEED_10000;
1443         cmd->duplex = DUPLEX_FULL;
1444
1445         /*
1446          * parse the product code to deterimine the interface type
1447          * (CX4, XFP, Quad Ribbon Fiber) by looking at the character
1448          * after the 3rd dash in the driver's cached copy of the
1449          * EEPROM's product code string.
1450          */
1451         ptr = mgp->product_code_string;
1452         if (ptr == NULL) {
1453                 printk(KERN_ERR "myri10ge: %s: Missing product code\n",
1454                        netdev->name);
1455                 return 0;
1456         }
1457         for (i = 0; i < 3; i++, ptr++) {
1458                 ptr = strchr(ptr, '-');
1459                 if (ptr == NULL) {
1460                         printk(KERN_ERR "myri10ge: %s: Invalid product "
1461                                "code %s\n", netdev->name,
1462                                mgp->product_code_string);
1463                         return 0;
1464                 }
1465         }
1466         if (*ptr == 'R' || *ptr == 'Q') {
1467                 /* We've found either an XFP or quad ribbon fiber */
1468                 cmd->port = PORT_FIBRE;
1469         }
1470         return 0;
1471 }
1472
1473 static void
1474 myri10ge_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *info)
1475 {
1476         struct myri10ge_priv *mgp = netdev_priv(netdev);
1477
1478         strlcpy(info->driver, "myri10ge", sizeof(info->driver));
1479         strlcpy(info->version, MYRI10GE_VERSION_STR, sizeof(info->version));
1480         strlcpy(info->fw_version, mgp->fw_version, sizeof(info->fw_version));
1481         strlcpy(info->bus_info, pci_name(mgp->pdev), sizeof(info->bus_info));
1482 }
1483
1484 static int
1485 myri10ge_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *coal)
1486 {
1487         struct myri10ge_priv *mgp = netdev_priv(netdev);
1488
1489         coal->rx_coalesce_usecs = mgp->intr_coal_delay;
1490         return 0;
1491 }
1492
1493 static int
1494 myri10ge_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *coal)
1495 {
1496         struct myri10ge_priv *mgp = netdev_priv(netdev);
1497
1498         mgp->intr_coal_delay = coal->rx_coalesce_usecs;
1499         put_be32(htonl(mgp->intr_coal_delay), mgp->intr_coal_delay_ptr);
1500         return 0;
1501 }
1502
1503 static void
1504 myri10ge_get_pauseparam(struct net_device *netdev,
1505                         struct ethtool_pauseparam *pause)
1506 {
1507         struct myri10ge_priv *mgp = netdev_priv(netdev);
1508
1509         pause->autoneg = 0;
1510         pause->rx_pause = mgp->pause;
1511         pause->tx_pause = mgp->pause;
1512 }
1513
1514 static int
1515 myri10ge_set_pauseparam(struct net_device *netdev,
1516                         struct ethtool_pauseparam *pause)
1517 {
1518         struct myri10ge_priv *mgp = netdev_priv(netdev);
1519
1520         if (pause->tx_pause != mgp->pause)
1521                 return myri10ge_change_pause(mgp, pause->tx_pause);
1522         if (pause->rx_pause != mgp->pause)
1523                 return myri10ge_change_pause(mgp, pause->tx_pause);
1524         if (pause->autoneg != 0)
1525                 return -EINVAL;
1526         return 0;
1527 }
1528
1529 static void
1530 myri10ge_get_ringparam(struct net_device *netdev,
1531                        struct ethtool_ringparam *ring)
1532 {
1533         struct myri10ge_priv *mgp = netdev_priv(netdev);
1534
1535         ring->rx_mini_max_pending = mgp->ss[0].rx_small.mask + 1;
1536         ring->rx_max_pending = mgp->ss[0].rx_big.mask + 1;
1537         ring->rx_jumbo_max_pending = 0;
1538         ring->tx_max_pending = mgp->ss[0].rx_small.mask + 1;
1539         ring->rx_mini_pending = ring->rx_mini_max_pending;
1540         ring->rx_pending = ring->rx_max_pending;
1541         ring->rx_jumbo_pending = ring->rx_jumbo_max_pending;
1542         ring->tx_pending = ring->tx_max_pending;
1543 }
1544
1545 static u32 myri10ge_get_rx_csum(struct net_device *netdev)
1546 {
1547         struct myri10ge_priv *mgp = netdev_priv(netdev);
1548
1549         if (mgp->csum_flag)
1550                 return 1;
1551         else
1552                 return 0;
1553 }
1554
1555 static int myri10ge_set_rx_csum(struct net_device *netdev, u32 csum_enabled)
1556 {
1557         struct myri10ge_priv *mgp = netdev_priv(netdev);
1558
1559         if (csum_enabled)
1560                 mgp->csum_flag = MXGEFW_FLAGS_CKSUM;
1561         else
1562                 mgp->csum_flag = 0;
1563         return 0;
1564 }
1565
1566 static int myri10ge_set_tso(struct net_device *netdev, u32 tso_enabled)
1567 {
1568         struct myri10ge_priv *mgp = netdev_priv(netdev);
1569         unsigned long flags = mgp->features & (NETIF_F_TSO6 | NETIF_F_TSO);
1570
1571         if (tso_enabled)
1572                 netdev->features |= flags;
1573         else
1574                 netdev->features &= ~flags;
1575         return 0;
1576 }
1577
1578 static const char myri10ge_gstrings_main_stats[][ETH_GSTRING_LEN] = {
1579         "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
1580         "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
1581         "rx_length_errors", "rx_over_errors", "rx_crc_errors",
1582         "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
1583         "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
1584         "tx_heartbeat_errors", "tx_window_errors",
1585         /* device-specific stats */
1586         "tx_boundary", "WC", "irq", "MSI", "MSIX",
1587         "read_dma_bw_MBs", "write_dma_bw_MBs", "read_write_dma_bw_MBs",
1588         "serial_number", "watchdog_resets",
1589         "link_changes", "link_up", "dropped_link_overflow",
1590         "dropped_link_error_or_filtered",
1591         "dropped_pause", "dropped_bad_phy", "dropped_bad_crc32",
1592         "dropped_unicast_filtered", "dropped_multicast_filtered",
1593         "dropped_runt", "dropped_overrun", "dropped_no_small_buffer",
1594         "dropped_no_big_buffer"
1595 };
1596
1597 static const char myri10ge_gstrings_slice_stats[][ETH_GSTRING_LEN] = {
1598         "----------- slice ---------",
1599         "tx_pkt_start", "tx_pkt_done", "tx_req", "tx_done",
1600         "rx_small_cnt", "rx_big_cnt",
1601         "wake_queue", "stop_queue", "tx_linearized", "LRO aggregated",
1602             "LRO flushed",
1603         "LRO avg aggr", "LRO no_desc"
1604 };
1605
1606 #define MYRI10GE_NET_STATS_LEN      21
1607 #define MYRI10GE_MAIN_STATS_LEN  ARRAY_SIZE(myri10ge_gstrings_main_stats)
1608 #define MYRI10GE_SLICE_STATS_LEN  ARRAY_SIZE(myri10ge_gstrings_slice_stats)
1609
1610 static void
1611 myri10ge_get_strings(struct net_device *netdev, u32 stringset, u8 * data)
1612 {
1613         struct myri10ge_priv *mgp = netdev_priv(netdev);
1614         int i;
1615
1616         switch (stringset) {
1617         case ETH_SS_STATS:
1618                 memcpy(data, *myri10ge_gstrings_main_stats,
1619                        sizeof(myri10ge_gstrings_main_stats));
1620                 data += sizeof(myri10ge_gstrings_main_stats);
1621                 for (i = 0; i < mgp->num_slices; i++) {
1622                         memcpy(data, *myri10ge_gstrings_slice_stats,
1623                                sizeof(myri10ge_gstrings_slice_stats));
1624                         data += sizeof(myri10ge_gstrings_slice_stats);
1625                 }
1626                 break;
1627         }
1628 }
1629
1630 static int myri10ge_get_sset_count(struct net_device *netdev, int sset)
1631 {
1632         struct myri10ge_priv *mgp = netdev_priv(netdev);
1633
1634         switch (sset) {
1635         case ETH_SS_STATS:
1636                 return MYRI10GE_MAIN_STATS_LEN +
1637                     mgp->num_slices * MYRI10GE_SLICE_STATS_LEN;
1638         default:
1639                 return -EOPNOTSUPP;
1640         }
1641 }
1642
1643 static void
1644 myri10ge_get_ethtool_stats(struct net_device *netdev,
1645                            struct ethtool_stats *stats, u64 * data)
1646 {
1647         struct myri10ge_priv *mgp = netdev_priv(netdev);
1648         struct myri10ge_slice_state *ss;
1649         int slice;
1650         int i;
1651
1652         for (i = 0; i < MYRI10GE_NET_STATS_LEN; i++)
1653                 data[i] = ((unsigned long *)&mgp->stats)[i];
1654
1655         data[i++] = (unsigned int)mgp->tx_boundary;
1656         data[i++] = (unsigned int)mgp->wc_enabled;
1657         data[i++] = (unsigned int)mgp->pdev->irq;
1658         data[i++] = (unsigned int)mgp->msi_enabled;
1659         data[i++] = (unsigned int)mgp->msix_enabled;
1660         data[i++] = (unsigned int)mgp->read_dma;
1661         data[i++] = (unsigned int)mgp->write_dma;
1662         data[i++] = (unsigned int)mgp->read_write_dma;
1663         data[i++] = (unsigned int)mgp->serial_number;
1664         data[i++] = (unsigned int)mgp->watchdog_resets;
1665         data[i++] = (unsigned int)mgp->link_changes;
1666
1667         /* firmware stats are useful only in the first slice */
1668         ss = &mgp->ss[0];
1669         data[i++] = (unsigned int)ntohl(ss->fw_stats->link_up);
1670         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_link_overflow);
1671         data[i++] =
1672             (unsigned int)ntohl(ss->fw_stats->dropped_link_error_or_filtered);
1673         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_pause);
1674         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_bad_phy);
1675         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_bad_crc32);
1676         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_unicast_filtered);
1677         data[i++] =
1678             (unsigned int)ntohl(ss->fw_stats->dropped_multicast_filtered);
1679         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_runt);
1680         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_overrun);
1681         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_no_small_buffer);
1682         data[i++] = (unsigned int)ntohl(ss->fw_stats->dropped_no_big_buffer);
1683
1684         for (slice = 0; slice < mgp->num_slices; slice++) {
1685                 ss = &mgp->ss[slice];
1686                 data[i++] = slice;
1687                 data[i++] = (unsigned int)ss->tx.pkt_start;
1688                 data[i++] = (unsigned int)ss->tx.pkt_done;
1689                 data[i++] = (unsigned int)ss->tx.req;
1690                 data[i++] = (unsigned int)ss->tx.done;
1691                 data[i++] = (unsigned int)ss->rx_small.cnt;
1692                 data[i++] = (unsigned int)ss->rx_big.cnt;
1693                 data[i++] = (unsigned int)ss->tx.wake_queue;
1694                 data[i++] = (unsigned int)ss->tx.stop_queue;
1695                 data[i++] = (unsigned int)ss->tx.linearized;
1696                 data[i++] = ss->rx_done.lro_mgr.stats.aggregated;
1697                 data[i++] = ss->rx_done.lro_mgr.stats.flushed;
1698                 if (ss->rx_done.lro_mgr.stats.flushed)
1699                         data[i++] = ss->rx_done.lro_mgr.stats.aggregated /
1700                             ss->rx_done.lro_mgr.stats.flushed;
1701                 else
1702                         data[i++] = 0;
1703                 data[i++] = ss->rx_done.lro_mgr.stats.no_desc;
1704         }
1705 }
1706
1707 static void myri10ge_set_msglevel(struct net_device *netdev, u32 value)
1708 {
1709         struct myri10ge_priv *mgp = netdev_priv(netdev);
1710         mgp->msg_enable = value;
1711 }
1712
1713 static u32 myri10ge_get_msglevel(struct net_device *netdev)
1714 {
1715         struct myri10ge_priv *mgp = netdev_priv(netdev);
1716         return mgp->msg_enable;
1717 }
1718
1719 static const struct ethtool_ops myri10ge_ethtool_ops = {
1720         .get_settings = myri10ge_get_settings,
1721         .get_drvinfo = myri10ge_get_drvinfo,
1722         .get_coalesce = myri10ge_get_coalesce,
1723         .set_coalesce = myri10ge_set_coalesce,
1724         .get_pauseparam = myri10ge_get_pauseparam,
1725         .set_pauseparam = myri10ge_set_pauseparam,
1726         .get_ringparam = myri10ge_get_ringparam,
1727         .get_rx_csum = myri10ge_get_rx_csum,
1728         .set_rx_csum = myri10ge_set_rx_csum,
1729         .set_tx_csum = ethtool_op_set_tx_hw_csum,
1730         .set_sg = ethtool_op_set_sg,
1731         .set_tso = myri10ge_set_tso,
1732         .get_link = ethtool_op_get_link,
1733         .get_strings = myri10ge_get_strings,
1734         .get_sset_count = myri10ge_get_sset_count,
1735         .get_ethtool_stats = myri10ge_get_ethtool_stats,
1736         .set_msglevel = myri10ge_set_msglevel,
1737         .get_msglevel = myri10ge_get_msglevel
1738 };
1739
1740 static int myri10ge_allocate_rings(struct myri10ge_slice_state *ss)
1741 {
1742         struct myri10ge_priv *mgp = ss->mgp;
1743         struct myri10ge_cmd cmd;
1744         struct net_device *dev = mgp->dev;
1745         int tx_ring_size, rx_ring_size;
1746         int tx_ring_entries, rx_ring_entries;
1747         int i, slice, status;
1748         size_t bytes;
1749
1750         /* get ring sizes */
1751         slice = ss - mgp->ss;
1752         cmd.data0 = slice;
1753         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SEND_RING_SIZE, &cmd, 0);
1754         tx_ring_size = cmd.data0;
1755         cmd.data0 = slice;
1756         status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_RX_RING_SIZE, &cmd, 0);
1757         if (status != 0)
1758                 return status;
1759         rx_ring_size = cmd.data0;
1760
1761         tx_ring_entries = tx_ring_size / sizeof(struct mcp_kreq_ether_send);
1762         rx_ring_entries = rx_ring_size / sizeof(struct mcp_dma_addr);
1763         ss->tx.mask = tx_ring_entries - 1;
1764         ss->rx_small.mask = ss->rx_big.mask = rx_ring_entries - 1;
1765
1766         status = -ENOMEM;
1767
1768         /* allocate the host shadow rings */
1769
1770         bytes = 8 + (MYRI10GE_MAX_SEND_DESC_TSO + 4)
1771             * sizeof(*ss->tx.req_list);
1772         ss->tx.req_bytes = kzalloc(bytes, GFP_KERNEL);
1773         if (ss->tx.req_bytes == NULL)
1774                 goto abort_with_nothing;
1775
1776         /* ensure req_list entries are aligned to 8 bytes */
1777         ss->tx.req_list = (struct mcp_kreq_ether_send *)
1778             ALIGN((unsigned long)ss->tx.req_bytes, 8);
1779
1780         bytes = rx_ring_entries * sizeof(*ss->rx_small.shadow);
1781         ss->rx_small.shadow = kzalloc(bytes, GFP_KERNEL);
1782         if (ss->rx_small.shadow == NULL)
1783                 goto abort_with_tx_req_bytes;
1784
1785         bytes = rx_ring_entries * sizeof(*ss->rx_big.shadow);
1786         ss->rx_big.shadow = kzalloc(bytes, GFP_KERNEL);
1787         if (ss->rx_big.shadow == NULL)
1788                 goto abort_with_rx_small_shadow;
1789
1790         /* allocate the host info rings */
1791
1792         bytes = tx_ring_entries * sizeof(*ss->tx.info);
1793         ss->tx.info = kzalloc(bytes, GFP_KERNEL);
1794         if (ss->tx.info == NULL)
1795                 goto abort_with_rx_big_shadow;
1796
1797         bytes = rx_ring_entries * sizeof(*ss->rx_small.info);
1798         ss->rx_small.info = kzalloc(bytes, GFP_KERNEL);
1799         if (ss->rx_small.info == NULL)
1800                 goto abort_with_tx_info;
1801
1802         bytes = rx_ring_entries * sizeof(*ss->rx_big.info);
1803         ss->rx_big.info = kzalloc(bytes, GFP_KERNEL);
1804         if (ss->rx_big.info == NULL)
1805                 goto abort_with_rx_small_info;
1806
1807         /* Fill the receive rings */
1808         ss->rx_big.cnt = 0;
1809         ss->rx_small.cnt = 0;
1810         ss->rx_big.fill_cnt = 0;
1811         ss->rx_small.fill_cnt = 0;
1812         ss->rx_small.page_offset = MYRI10GE_ALLOC_SIZE;
1813         ss->rx_big.page_offset = MYRI10GE_ALLOC_SIZE;
1814         ss->rx_small.watchdog_needed = 0;
1815         ss->rx_big.watchdog_needed = 0;
1816         myri10ge_alloc_rx_pages(mgp, &ss->rx_small,
1817                                 mgp->small_bytes + MXGEFW_PAD, 0);
1818
1819         if (ss->rx_small.fill_cnt < ss->rx_small.mask + 1) {
1820                 printk(KERN_ERR
1821                        "myri10ge: %s:slice-%d: alloced only %d small bufs\n",
1822                        dev->name, slice, ss->rx_small.fill_cnt);
1823                 goto abort_with_rx_small_ring;
1824         }
1825
1826         myri10ge_alloc_rx_pages(mgp, &ss->rx_big, mgp->big_bytes, 0);
1827         if (ss->rx_big.fill_cnt < ss->rx_big.mask + 1) {
1828                 printk(KERN_ERR
1829                        "myri10ge: %s:slice-%d: alloced only %d big bufs\n",
1830                        dev->name, slice, ss->rx_big.fill_cnt);
1831                 goto abort_with_rx_big_ring;
1832         }
1833
1834         return 0;
1835
1836 abort_with_rx_big_ring:
1837         for (i = ss->rx_big.cnt; i < ss->rx_big.fill_cnt; i++) {
1838                 int idx = i & ss->rx_big.mask;
1839                 myri10ge_unmap_rx_page(mgp->pdev, &ss->rx_big.info[idx],
1840                                        mgp->big_bytes);
1841                 put_page(ss->rx_big.info[idx].page);
1842         }
1843
1844 abort_with_rx_small_ring:
1845         for (i = ss->rx_small.cnt; i < ss->rx_small.fill_cnt; i++) {
1846                 int idx = i & ss->rx_small.mask;
1847                 myri10ge_unmap_rx_page(mgp->pdev, &ss->rx_small.info[idx],
1848                                        mgp->small_bytes + MXGEFW_PAD);
1849                 put_page(ss->rx_small.info[idx].page);
1850         }
1851
1852         kfree(ss->rx_big.info);
1853
1854 abort_with_rx_small_info:
1855         kfree(ss->rx_small.info);
1856
1857 abort_with_tx_info:
1858         kfree(ss->tx.info);
1859
1860 abort_with_rx_big_shadow:
1861         kfree(ss->rx_big.shadow);
1862
1863 abort_with_rx_small_shadow:
1864         kfree(ss->rx_small.shadow);
1865
1866 abort_with_tx_req_bytes:
1867         kfree(ss->tx.req_bytes);
1868         ss->tx.req_bytes = NULL;
1869         ss->tx.req_list = NULL;
1870
1871 abort_with_nothing:
1872         return status;
1873 }
1874
1875 static void myri10ge_free_rings(struct myri10ge_slice_state *ss)
1876 {
1877         struct myri10ge_priv *mgp = ss->mgp;
1878         struct sk_buff *skb;
1879         struct myri10ge_tx_buf *tx;
1880         int i, len, idx;
1881
1882         /* If not allocated, skip it */
1883         if (ss->tx.req_list == NULL)
1884                 return;
1885
1886         for (i = ss->rx_big.cnt; i < ss->rx_big.fill_cnt; i++) {
1887                 idx = i & ss->rx_big.mask;
1888                 if (i == ss->rx_big.fill_cnt - 1)
1889                         ss->rx_big.info[idx].page_offset = MYRI10GE_ALLOC_SIZE;
1890                 myri10ge_unmap_rx_page(mgp->pdev, &ss->rx_big.info[idx],
1891                                        mgp->big_bytes);
1892                 put_page(ss->rx_big.info[idx].page);
1893         }
1894
1895         for (i = ss->rx_small.cnt; i < ss->rx_small.fill_cnt; i++) {
1896                 idx = i & ss->rx_small.mask;
1897                 if (i == ss->rx_small.fill_cnt - 1)
1898                         ss->rx_small.info[idx].page_offset =
1899                             MYRI10GE_ALLOC_SIZE;
1900                 myri10ge_unmap_rx_page(mgp->pdev, &ss->rx_small.info[idx],
1901                                        mgp->small_bytes + MXGEFW_PAD);
1902                 put_page(ss->rx_small.info[idx].page);
1903         }
1904         tx = &ss->tx;
1905         while (tx->done != tx->req) {
1906                 idx = tx->done & tx->mask;
1907                 skb = tx->info[idx].skb;
1908
1909                 /* Mark as free */
1910                 tx->info[idx].skb = NULL;
1911                 tx->done++;
1912                 len = pci_unmap_len(&tx->info[idx], len);
1913                 pci_unmap_len_set(&tx->info[idx], len, 0);
1914                 if (skb) {
1915                         ss->stats.tx_dropped++;
1916                         dev_kfree_skb_any(skb);
1917                         if (len)
1918                                 pci_unmap_single(mgp->pdev,
1919                                                  pci_unmap_addr(&tx->info[idx],
1920                                                                 bus), len,
1921                                                  PCI_DMA_TODEVICE);
1922                 } else {
1923                         if (len)
1924                                 pci_unmap_page(mgp->pdev,
1925                                                pci_unmap_addr(&tx->info[idx],
1926                                                               bus), len,
1927                                                PCI_DMA_TODEVICE);
1928                 }
1929         }
1930         kfree(ss->rx_big.info);
1931
1932         kfree(ss->rx_small.info);
1933
1934         kfree(ss->tx.info);
1935
1936         kfree(ss->rx_big.shadow);
1937
1938         kfree(ss->rx_small.shadow);
1939
1940         kfree(ss->tx.req_bytes);
1941         ss->tx.req_bytes = NULL;
1942         ss->tx.req_list = NULL;
1943 }
1944
1945 static int myri10ge_request_irq(struct myri10ge_priv *mgp)
1946 {
1947         struct pci_dev *pdev = mgp->pdev;
1948         struct myri10ge_slice_state *ss;
1949         struct net_device *netdev = mgp->dev;
1950         int i;
1951         int status;
1952
1953         mgp->msi_enabled = 0;
1954         mgp->msix_enabled = 0;
1955         status = 0;
1956         if (myri10ge_msi) {
1957                 if (mgp->num_slices > 1) {
1958                         status =
1959                             pci_enable_msix(pdev, mgp->msix_vectors,
1960                                             mgp->num_slices);
1961                         if (status == 0) {
1962                                 mgp->msix_enabled = 1;
1963                         } else {
1964                                 dev_err(&pdev->dev,
1965                                         "Error %d setting up MSI-X\n", status);
1966                                 return status;
1967                         }
1968                 }
1969                 if (mgp->msix_enabled == 0) {
1970                         status = pci_enable_msi(pdev);
1971                         if (status != 0) {
1972                                 dev_err(&pdev->dev,
1973                                         "Error %d setting up MSI; falling back to xPIC\n",
1974                                         status);
1975                         } else {
1976                                 mgp->msi_enabled = 1;
1977                         }
1978                 }
1979         }
1980         if (mgp->msix_enabled) {
1981                 for (i = 0; i < mgp->num_slices; i++) {
1982                         ss = &mgp->ss[i];
1983                         snprintf(ss->irq_desc, sizeof(ss->irq_desc),
1984                                  "%s:slice-%d", netdev->name, i);
1985                         status = request_irq(mgp->msix_vectors[i].vector,
1986                                              myri10ge_intr, 0, ss->irq_desc,
1987                                              ss);
1988                         if (status != 0) {
1989                                 dev_err(&pdev->dev,
1990                                         "slice %d failed to allocate IRQ\n", i);
1991                                 i--;
1992                                 while (i >= 0) {
1993                                         free_irq(mgp->msix_vectors[i].vector,
1994                                                  &mgp->ss[i]);
1995                                         i--;
1996                                 }
1997                                 pci_disable_msix(pdev);
1998                                 return status;
1999                         }
2000                 }
2001         } else {
2002                 status = request_irq(pdev->irq, myri10ge_intr, IRQF_SHARED,
2003                                      mgp->dev->name, &mgp->ss[0]);
2004                 if (status != 0) {
2005                         dev_err(&pdev->dev, "failed to allocate IRQ\n");
2006                         if (mgp->msi_enabled)
2007                                 pci_disable_msi(pdev);
2008                 }
2009         }
2010         return status;
2011 }
2012
2013 static void myri10ge_free_irq(struct myri10ge_priv *mgp)
2014 {
2015         struct pci_dev *pdev = mgp->pdev;
2016         int i;
2017
2018         if (mgp->msix_enabled) {
2019                 for (i = 0; i < mgp->num_slices; i++)
2020                         free_irq(mgp->msix_vectors[i].vector, &mgp->ss[i]);
2021         } else {
2022                 free_irq(pdev->irq, &mgp->ss[0]);
2023         }
2024         if (mgp->msi_enabled)
2025                 pci_disable_msi(pdev);
2026         if (mgp->msix_enabled)
2027                 pci_disable_msix(pdev);
2028 }
2029
2030 static int
2031 myri10ge_get_frag_header(struct skb_frag_struct *frag, void **mac_hdr,
2032                          void **ip_hdr, void **tcpudp_hdr,
2033                          u64 * hdr_flags, void *priv)
2034 {
2035         struct ethhdr *eh;
2036         struct vlan_ethhdr *veh;
2037         struct iphdr *iph;
2038         u8 *va = page_address(frag->page) + frag->page_offset;
2039         unsigned long ll_hlen;
2040         /* passed opaque through lro_receive_frags() */
2041         __wsum csum = (__force __wsum) (unsigned long)priv;
2042
2043         /* find the mac header, aborting if not IPv4 */
2044
2045         eh = (struct ethhdr *)va;
2046         *mac_hdr = eh;
2047         ll_hlen = ETH_HLEN;
2048         if (eh->h_proto != htons(ETH_P_IP)) {
2049                 if (eh->h_proto == htons(ETH_P_8021Q)) {
2050                         veh = (struct vlan_ethhdr *)va;
2051                         if (veh->h_vlan_encapsulated_proto != htons(ETH_P_IP))
2052                                 return -1;
2053
2054                         ll_hlen += VLAN_HLEN;
2055
2056                         /*
2057                          *  HW checksum starts ETH_HLEN bytes into
2058                          *  frame, so we must subtract off the VLAN
2059                          *  header's checksum before csum can be used
2060                          */
2061                         csum = csum_sub(csum, csum_partial(va + ETH_HLEN,
2062                                                            VLAN_HLEN, 0));
2063                 } else {
2064                         return -1;
2065                 }
2066         }
2067         *hdr_flags = LRO_IPV4;
2068
2069         iph = (struct iphdr *)(va + ll_hlen);
2070         *ip_hdr = iph;
2071         if (iph->protocol != IPPROTO_TCP)
2072                 return -1;
2073         *hdr_flags |= LRO_TCP;
2074         *tcpudp_hdr = (u8 *) (*ip_hdr) + (iph->ihl << 2);
2075
2076         /* verify the IP checksum */
2077         if (unlikely(ip_fast_csum((u8 *) iph, iph->ihl)))
2078                 return -1;
2079
2080         /* verify the  checksum */
2081         if (unlikely(csum_tcpudp_magic(iph->saddr, iph->daddr,
2082                                        ntohs(iph->tot_len) - (iph->ihl << 2),
2083                                        IPPROTO_TCP, csum)))
2084                 return -1;
2085
2086         return 0;
2087 }
2088
2089 static int myri10ge_get_txrx(struct myri10ge_priv *mgp, int slice)
2090 {
2091         struct myri10ge_cmd cmd;
2092         struct myri10ge_slice_state *ss;
2093         int status;
2094
2095         ss = &mgp->ss[slice];
2096         cmd.data0 = 0;          /* single slice for now */
2097         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SEND_OFFSET, &cmd, 0);
2098         ss->tx.lanai = (struct mcp_kreq_ether_send __iomem *)
2099             (mgp->sram + cmd.data0);
2100
2101         cmd.data0 = slice;
2102         status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_SMALL_RX_OFFSET,
2103                                     &cmd, 0);
2104         ss->rx_small.lanai = (struct mcp_kreq_ether_recv __iomem *)
2105             (mgp->sram + cmd.data0);
2106
2107         cmd.data0 = slice;
2108         status |= myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_BIG_RX_OFFSET, &cmd, 0);
2109         ss->rx_big.lanai = (struct mcp_kreq_ether_recv __iomem *)
2110             (mgp->sram + cmd.data0);
2111
2112         if (myri10ge_wcfifo && mgp->wc_enabled) {
2113                 ss->tx.wc_fifo = (u8 __iomem *)
2114                     mgp->sram + MXGEFW_ETH_SEND_4 + 64 * slice;
2115                 ss->rx_small.wc_fifo = (u8 __iomem *)
2116                     mgp->sram + MXGEFW_ETH_RECV_SMALL + 64 * slice;
2117                 ss->rx_big.wc_fifo = (u8 __iomem *)
2118                     mgp->sram + MXGEFW_ETH_RECV_BIG + 64 * slice;
2119         } else {
2120                 ss->tx.wc_fifo = NULL;
2121                 ss->rx_small.wc_fifo = NULL;
2122                 ss->rx_big.wc_fifo = NULL;
2123         }
2124         return status;
2125
2126 }
2127
2128 static int myri10ge_set_stats(struct myri10ge_priv *mgp, int slice)
2129 {
2130         struct myri10ge_cmd cmd;
2131         struct myri10ge_slice_state *ss;
2132         int status;
2133
2134         ss = &mgp->ss[slice];
2135         cmd.data0 = MYRI10GE_LOWPART_TO_U32(ss->fw_stats_bus);
2136         cmd.data1 = MYRI10GE_HIGHPART_TO_U32(ss->fw_stats_bus);
2137         cmd.data2 = sizeof(struct mcp_irq_data);
2138         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_STATS_DMA_V2, &cmd, 0);
2139         if (status == -ENOSYS) {
2140                 dma_addr_t bus = ss->fw_stats_bus;
2141                 if (slice != 0)
2142                         return -EINVAL;
2143                 bus += offsetof(struct mcp_irq_data, send_done_count);
2144                 cmd.data0 = MYRI10GE_LOWPART_TO_U32(bus);
2145                 cmd.data1 = MYRI10GE_HIGHPART_TO_U32(bus);
2146                 status = myri10ge_send_cmd(mgp,
2147                                            MXGEFW_CMD_SET_STATS_DMA_OBSOLETE,
2148                                            &cmd, 0);
2149                 /* Firmware cannot support multicast without STATS_DMA_V2 */
2150                 mgp->fw_multicast_support = 0;
2151         } else {
2152                 mgp->fw_multicast_support = 1;
2153         }
2154         return 0;
2155 }
2156
2157 static int myri10ge_open(struct net_device *dev)
2158 {
2159         struct myri10ge_slice_state *ss;
2160         struct myri10ge_priv *mgp = netdev_priv(dev);
2161         struct myri10ge_cmd cmd;
2162         int i, status, big_pow2, slice;
2163         u8 *itable;
2164         struct net_lro_mgr *lro_mgr;
2165
2166         if (mgp->running != MYRI10GE_ETH_STOPPED)
2167                 return -EBUSY;
2168
2169         mgp->running = MYRI10GE_ETH_STARTING;
2170         status = myri10ge_reset(mgp);
2171         if (status != 0) {
2172                 printk(KERN_ERR "myri10ge: %s: failed reset\n", dev->name);
2173                 goto abort_with_nothing;
2174         }
2175
2176         if (mgp->num_slices > 1) {
2177                 cmd.data0 = mgp->num_slices;
2178                 cmd.data1 = 1;  /* use MSI-X */
2179                 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_ENABLE_RSS_QUEUES,
2180                                            &cmd, 0);
2181                 if (status != 0) {
2182                         printk(KERN_ERR
2183                                "myri10ge: %s: failed to set number of slices\n",
2184                                dev->name);
2185                         goto abort_with_nothing;
2186                 }
2187                 /* setup the indirection table */
2188                 cmd.data0 = mgp->num_slices;
2189                 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_RSS_TABLE_SIZE,
2190                                            &cmd, 0);
2191
2192                 status |= myri10ge_send_cmd(mgp,
2193                                             MXGEFW_CMD_GET_RSS_TABLE_OFFSET,
2194                                             &cmd, 0);
2195                 if (status != 0) {
2196                         printk(KERN_ERR
2197                                "myri10ge: %s: failed to setup rss tables\n",
2198                                dev->name);
2199                 }
2200
2201                 /* just enable an identity mapping */
2202                 itable = mgp->sram + cmd.data0;
2203                 for (i = 0; i < mgp->num_slices; i++)
2204                         __raw_writeb(i, &itable[i]);
2205
2206                 cmd.data0 = 1;
2207                 cmd.data1 = myri10ge_rss_hash;
2208                 status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_RSS_ENABLE,
2209                                            &cmd, 0);
2210                 if (status != 0) {
2211                         printk(KERN_ERR
2212                                "myri10ge: %s: failed to enable slices\n",
2213                                dev->name);
2214                         goto abort_with_nothing;
2215                 }
2216         }
2217
2218         status = myri10ge_request_irq(mgp);
2219         if (status != 0)
2220                 goto abort_with_nothing;
2221
2222         /* decide what small buffer size to use.  For good TCP rx
2223          * performance, it is important to not receive 1514 byte
2224          * frames into jumbo buffers, as it confuses the socket buffer
2225          * accounting code, leading to drops and erratic performance.
2226          */
2227
2228         if (dev->mtu <= ETH_DATA_LEN)
2229                 /* enough for a TCP header */
2230                 mgp->small_bytes = (128 > SMP_CACHE_BYTES)
2231                     ? (128 - MXGEFW_PAD)
2232                     : (SMP_CACHE_BYTES - MXGEFW_PAD);
2233         else
2234                 /* enough for a vlan encapsulated ETH_DATA_LEN frame */
2235                 mgp->small_bytes = VLAN_ETH_FRAME_LEN;
2236
2237         /* Override the small buffer size? */
2238         if (myri10ge_small_bytes > 0)
2239                 mgp->small_bytes = myri10ge_small_bytes;
2240
2241         /* Firmware needs the big buff size as a power of 2.  Lie and
2242          * tell him the buffer is larger, because we only use 1
2243          * buffer/pkt, and the mtu will prevent overruns.
2244          */
2245         big_pow2 = dev->mtu + ETH_HLEN + VLAN_HLEN + MXGEFW_PAD;
2246         if (big_pow2 < MYRI10GE_ALLOC_SIZE / 2) {
2247                 while (!is_power_of_2(big_pow2))
2248                         big_pow2++;
2249                 mgp->big_bytes = dev->mtu + ETH_HLEN + VLAN_HLEN + MXGEFW_PAD;
2250         } else {
2251                 big_pow2 = MYRI10GE_ALLOC_SIZE;
2252                 mgp->big_bytes = big_pow2;
2253         }
2254
2255         /* setup the per-slice data structures */
2256         for (slice = 0; slice < mgp->num_slices; slice++) {
2257                 ss = &mgp->ss[slice];
2258
2259                 status = myri10ge_get_txrx(mgp, slice);
2260                 if (status != 0) {
2261                         printk(KERN_ERR
2262                                "myri10ge: %s: failed to get ring sizes or locations\n",
2263                                dev->name);
2264                         goto abort_with_rings;
2265                 }
2266                 status = myri10ge_allocate_rings(ss);
2267                 if (status != 0)
2268                         goto abort_with_rings;
2269                 if (slice == 0)
2270                         status = myri10ge_set_stats(mgp, slice);
2271                 if (status) {
2272                         printk(KERN_ERR
2273                                "myri10ge: %s: Couldn't set stats DMA\n",
2274                                dev->name);
2275                         goto abort_with_rings;
2276                 }
2277
2278                 lro_mgr = &ss->rx_done.lro_mgr;
2279                 lro_mgr->dev = dev;
2280                 lro_mgr->features = LRO_F_NAPI;
2281                 lro_mgr->ip_summed = CHECKSUM_COMPLETE;
2282                 lro_mgr->ip_summed_aggr = CHECKSUM_UNNECESSARY;
2283                 lro_mgr->max_desc = MYRI10GE_MAX_LRO_DESCRIPTORS;
2284                 lro_mgr->lro_arr = ss->rx_done.lro_desc;
2285                 lro_mgr->get_frag_header = myri10ge_get_frag_header;
2286                 lro_mgr->max_aggr = myri10ge_lro_max_pkts;
2287                 if (lro_mgr->max_aggr > MAX_SKB_FRAGS)
2288                         lro_mgr->max_aggr = MAX_SKB_FRAGS;
2289
2290                 /* must happen prior to any irq */
2291                 napi_enable(&(ss)->napi);
2292         }
2293
2294         /* now give firmware buffers sizes, and MTU */
2295         cmd.data0 = dev->mtu + ETH_HLEN + VLAN_HLEN;
2296         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_MTU, &cmd, 0);
2297         cmd.data0 = mgp->small_bytes;
2298         status |=
2299             myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_SMALL_BUFFER_SIZE, &cmd, 0);
2300         cmd.data0 = big_pow2;
2301         status |=
2302             myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_BIG_BUFFER_SIZE, &cmd, 0);
2303         if (status) {
2304                 printk(KERN_ERR "myri10ge: %s: Couldn't set buffer sizes\n",
2305                        dev->name);
2306                 goto abort_with_rings;
2307         }
2308
2309         /*
2310          * Set Linux style TSO mode; this is needed only on newer
2311          *  firmware versions.  Older versions default to Linux
2312          *  style TSO
2313          */
2314         cmd.data0 = 0;
2315         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_TSO_MODE, &cmd, 0);
2316         if (status && status != -ENOSYS) {
2317                 printk(KERN_ERR "myri10ge: %s: Couldn't set TSO mode\n",
2318                        dev->name);
2319                 goto abort_with_rings;
2320         }
2321
2322         mgp->link_state = ~0U;
2323         mgp->rdma_tags_available = 15;
2324
2325         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_ETHERNET_UP, &cmd, 0);
2326         if (status) {
2327                 printk(KERN_ERR "myri10ge: %s: Couldn't bring up link\n",
2328                        dev->name);
2329                 goto abort_with_rings;
2330         }
2331
2332         mgp->running = MYRI10GE_ETH_RUNNING;
2333         mgp->watchdog_timer.expires = jiffies + myri10ge_watchdog_timeout * HZ;
2334         add_timer(&mgp->watchdog_timer);
2335         netif_wake_queue(dev);
2336         return 0;
2337
2338 abort_with_rings:
2339         for (i = 0; i < mgp->num_slices; i++)
2340                 myri10ge_free_rings(&mgp->ss[i]);
2341
2342         myri10ge_free_irq(mgp);
2343
2344 abort_with_nothing:
2345         mgp->running = MYRI10GE_ETH_STOPPED;
2346         return -ENOMEM;
2347 }
2348
2349 static int myri10ge_close(struct net_device *dev)
2350 {
2351         struct myri10ge_priv *mgp = netdev_priv(dev);
2352         struct myri10ge_cmd cmd;
2353         int status, old_down_cnt;
2354         int i;
2355
2356         if (mgp->running != MYRI10GE_ETH_RUNNING)
2357                 return 0;
2358
2359         if (mgp->ss[0].tx.req_bytes == NULL)
2360                 return 0;
2361
2362         del_timer_sync(&mgp->watchdog_timer);
2363         mgp->running = MYRI10GE_ETH_STOPPING;
2364         for (i = 0; i < mgp->num_slices; i++) {
2365                 napi_disable(&mgp->ss[i].napi);
2366         }
2367         netif_carrier_off(dev);
2368         netif_stop_queue(dev);
2369         old_down_cnt = mgp->down_cnt;
2370         mb();
2371         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_ETHERNET_DOWN, &cmd, 0);
2372         if (status)
2373                 printk(KERN_ERR "myri10ge: %s: Couldn't bring down link\n",
2374                        dev->name);
2375
2376         wait_event_timeout(mgp->down_wq, old_down_cnt != mgp->down_cnt, HZ);
2377         if (old_down_cnt == mgp->down_cnt)
2378                 printk(KERN_ERR "myri10ge: %s never got down irq\n", dev->name);
2379
2380         netif_tx_disable(dev);
2381         myri10ge_free_irq(mgp);
2382         for (i = 0; i < mgp->num_slices; i++)
2383                 myri10ge_free_rings(&mgp->ss[i]);
2384
2385         mgp->running = MYRI10GE_ETH_STOPPED;
2386         return 0;
2387 }
2388
2389 /* copy an array of struct mcp_kreq_ether_send's to the mcp.  Copy
2390  * backwards one at a time and handle ring wraps */
2391
2392 static inline void
2393 myri10ge_submit_req_backwards(struct myri10ge_tx_buf *tx,
2394                               struct mcp_kreq_ether_send *src, int cnt)
2395 {
2396         int idx, starting_slot;
2397         starting_slot = tx->req;
2398         while (cnt > 1) {
2399                 cnt--;
2400                 idx = (starting_slot + cnt) & tx->mask;
2401                 myri10ge_pio_copy(&tx->lanai[idx], &src[cnt], sizeof(*src));
2402                 mb();
2403         }
2404 }
2405
2406 /*
2407  * copy an array of struct mcp_kreq_ether_send's to the mcp.  Copy
2408  * at most 32 bytes at a time, so as to avoid involving the software
2409  * pio handler in the nic.   We re-write the first segment's flags
2410  * to mark them valid only after writing the entire chain.
2411  */
2412
2413 static inline void
2414 myri10ge_submit_req(struct myri10ge_tx_buf *tx, struct mcp_kreq_ether_send *src,
2415                     int cnt)
2416 {
2417         int idx, i;
2418         struct mcp_kreq_ether_send __iomem *dstp, *dst;
2419         struct mcp_kreq_ether_send *srcp;
2420         u8 last_flags;
2421
2422         idx = tx->req & tx->mask;
2423
2424         last_flags = src->flags;
2425         src->flags = 0;
2426         mb();
2427         dst = dstp = &tx->lanai[idx];
2428         srcp = src;
2429
2430         if ((idx + cnt) < tx->mask) {
2431                 for (i = 0; i < (cnt - 1); i += 2) {
2432                         myri10ge_pio_copy(dstp, srcp, 2 * sizeof(*src));
2433                         mb();   /* force write every 32 bytes */
2434                         srcp += 2;
2435                         dstp += 2;
2436                 }
2437         } else {
2438                 /* submit all but the first request, and ensure
2439                  * that it is submitted below */
2440                 myri10ge_submit_req_backwards(tx, src, cnt);
2441                 i = 0;
2442         }
2443         if (i < cnt) {
2444                 /* submit the first request */
2445                 myri10ge_pio_copy(dstp, srcp, sizeof(*src));
2446                 mb();           /* barrier before setting valid flag */
2447         }
2448
2449         /* re-write the last 32-bits with the valid flags */
2450         src->flags = last_flags;
2451         put_be32(*((__be32 *) src + 3), (__be32 __iomem *) dst + 3);
2452         tx->req += cnt;
2453         mb();
2454 }
2455
2456 static inline void
2457 myri10ge_submit_req_wc(struct myri10ge_tx_buf *tx,
2458                        struct mcp_kreq_ether_send *src, int cnt)
2459 {
2460         tx->req += cnt;
2461         mb();
2462         while (cnt >= 4) {
2463                 myri10ge_pio_copy(tx->wc_fifo, src, 64);
2464                 mb();
2465                 src += 4;
2466                 cnt -= 4;
2467         }
2468         if (cnt > 0) {
2469                 /* pad it to 64 bytes.  The src is 64 bytes bigger than it
2470                  * needs to be so that we don't overrun it */
2471                 myri10ge_pio_copy(tx->wc_fifo + MXGEFW_ETH_SEND_OFFSET(cnt),
2472                                   src, 64);
2473                 mb();
2474         }
2475 }
2476
2477 /*
2478  * Transmit a packet.  We need to split the packet so that a single
2479  * segment does not cross myri10ge->tx_boundary, so this makes segment
2480  * counting tricky.  So rather than try to count segments up front, we
2481  * just give up if there are too few segments to hold a reasonably
2482  * fragmented packet currently available.  If we run
2483  * out of segments while preparing a packet for DMA, we just linearize
2484  * it and try again.
2485  */
2486
2487 static int myri10ge_xmit(struct sk_buff *skb, struct net_device *dev)
2488 {
2489         struct myri10ge_priv *mgp = netdev_priv(dev);
2490         struct myri10ge_slice_state *ss;
2491         struct mcp_kreq_ether_send *req;
2492         struct myri10ge_tx_buf *tx;
2493         struct skb_frag_struct *frag;
2494         dma_addr_t bus;
2495         u32 low;
2496         __be32 high_swapped;
2497         unsigned int len;
2498         int idx, last_idx, avail, frag_cnt, frag_idx, count, mss, max_segments;
2499         u16 pseudo_hdr_offset, cksum_offset;
2500         int cum_len, seglen, boundary, rdma_count;
2501         u8 flags, odd_flag;
2502
2503         /* always transmit through slot 0 */
2504         ss = mgp->ss;
2505         tx = &ss->tx;
2506 again:
2507         req = tx->req_list;
2508         avail = tx->mask - 1 - (tx->req - tx->done);
2509
2510         mss = 0;
2511         max_segments = MXGEFW_MAX_SEND_DESC;
2512
2513         if (skb_is_gso(skb)) {
2514                 mss = skb_shinfo(skb)->gso_size;
2515                 max_segments = MYRI10GE_MAX_SEND_DESC_TSO;
2516         }
2517
2518         if ((unlikely(avail < max_segments))) {
2519                 /* we are out of transmit resources */
2520                 tx->stop_queue++;
2521                 netif_stop_queue(dev);
2522                 return 1;
2523         }
2524
2525         /* Setup checksum offloading, if needed */
2526         cksum_offset = 0;
2527         pseudo_hdr_offset = 0;
2528         odd_flag = 0;
2529         flags = (MXGEFW_FLAGS_NO_TSO | MXGEFW_FLAGS_FIRST);
2530         if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2531                 cksum_offset = skb_transport_offset(skb);
2532                 pseudo_hdr_offset = cksum_offset + skb->csum_offset;
2533                 /* If the headers are excessively large, then we must
2534                  * fall back to a software checksum */
2535                 if (unlikely(!mss && (cksum_offset > 255 ||
2536                                       pseudo_hdr_offset > 127))) {
2537                         if (skb_checksum_help(skb))
2538                                 goto drop;
2539                         cksum_offset = 0;
2540                         pseudo_hdr_offset = 0;
2541                 } else {
2542                         odd_flag = MXGEFW_FLAGS_ALIGN_ODD;
2543                         flags |= MXGEFW_FLAGS_CKSUM;
2544                 }
2545         }
2546
2547         cum_len = 0;
2548
2549         if (mss) {              /* TSO */
2550                 /* this removes any CKSUM flag from before */
2551                 flags = (MXGEFW_FLAGS_TSO_HDR | MXGEFW_FLAGS_FIRST);
2552
2553                 /* negative cum_len signifies to the
2554                  * send loop that we are still in the
2555                  * header portion of the TSO packet.
2556                  * TSO header can be at most 1KB long */
2557                 cum_len = -(skb_transport_offset(skb) + tcp_hdrlen(skb));
2558
2559                 /* for IPv6 TSO, the checksum offset stores the
2560                  * TCP header length, to save the firmware from
2561                  * the need to parse the headers */
2562                 if (skb_is_gso_v6(skb)) {
2563                         cksum_offset = tcp_hdrlen(skb);
2564                         /* Can only handle headers <= max_tso6 long */
2565                         if (unlikely(-cum_len > mgp->max_tso6))
2566                                 return myri10ge_sw_tso(skb, dev);
2567                 }
2568                 /* for TSO, pseudo_hdr_offset holds mss.
2569                  * The firmware figures out where to put
2570                  * the checksum by parsing the header. */
2571                 pseudo_hdr_offset = mss;
2572         } else
2573                 /* Mark small packets, and pad out tiny packets */
2574         if (skb->len <= MXGEFW_SEND_SMALL_SIZE) {
2575                 flags |= MXGEFW_FLAGS_SMALL;
2576
2577                 /* pad frames to at least ETH_ZLEN bytes */
2578                 if (unlikely(skb->len < ETH_ZLEN)) {
2579                         if (skb_padto(skb, ETH_ZLEN)) {
2580                                 /* The packet is gone, so we must
2581                                  * return 0 */
2582                                 ss->stats.tx_dropped += 1;
2583                                 return 0;
2584                         }
2585                         /* adjust the len to account for the zero pad
2586                          * so that the nic can know how long it is */
2587                         skb->len = ETH_ZLEN;
2588                 }
2589         }
2590
2591         /* map the skb for DMA */
2592         len = skb->len - skb->data_len;
2593         idx = tx->req & tx->mask;
2594         tx->info[idx].skb = skb;
2595         bus = pci_map_single(mgp->pdev, skb->data, len, PCI_DMA_TODEVICE);
2596         pci_unmap_addr_set(&tx->info[idx], bus, bus);
2597         pci_unmap_len_set(&tx->info[idx], len, len);
2598
2599         frag_cnt = skb_shinfo(skb)->nr_frags;
2600         frag_idx = 0;
2601         count = 0;
2602         rdma_count = 0;
2603
2604         /* "rdma_count" is the number of RDMAs belonging to the
2605          * current packet BEFORE the current send request. For
2606          * non-TSO packets, this is equal to "count".
2607          * For TSO packets, rdma_count needs to be reset
2608          * to 0 after a segment cut.
2609          *
2610          * The rdma_count field of the send request is
2611          * the number of RDMAs of the packet starting at
2612          * that request. For TSO send requests with one ore more cuts
2613          * in the middle, this is the number of RDMAs starting
2614          * after the last cut in the request. All previous
2615          * segments before the last cut implicitly have 1 RDMA.
2616          *
2617          * Since the number of RDMAs is not known beforehand,
2618          * it must be filled-in retroactively - after each
2619          * segmentation cut or at the end of the entire packet.
2620          */
2621
2622         while (1) {
2623                 /* Break the SKB or Fragment up into pieces which
2624                  * do not cross mgp->tx_boundary */
2625                 low = MYRI10GE_LOWPART_TO_U32(bus);
2626                 high_swapped = htonl(MYRI10GE_HIGHPART_TO_U32(bus));
2627                 while (len) {
2628                         u8 flags_next;
2629                         int cum_len_next;
2630
2631                         if (unlikely(count == max_segments))
2632                                 goto abort_linearize;
2633
2634                         boundary =
2635                             (low + mgp->tx_boundary) & ~(mgp->tx_boundary - 1);
2636                         seglen = boundary - low;
2637                         if (seglen > len)
2638                                 seglen = len;
2639                         flags_next = flags & ~MXGEFW_FLAGS_FIRST;
2640                         cum_len_next = cum_len + seglen;
2641                         if (mss) {      /* TSO */
2642                                 (req - rdma_count)->rdma_count = rdma_count + 1;
2643
2644                                 if (likely(cum_len >= 0)) {     /* payload */
2645                                         int next_is_first, chop;
2646
2647                                         chop = (cum_len_next > mss);
2648                                         cum_len_next = cum_len_next % mss;
2649                                         next_is_first = (cum_len_next == 0);
2650                                         flags |= chop * MXGEFW_FLAGS_TSO_CHOP;
2651                                         flags_next |= next_is_first *
2652                                             MXGEFW_FLAGS_FIRST;
2653                                         rdma_count |= -(chop | next_is_first);
2654                                         rdma_count += chop & !next_is_first;
2655                                 } else if (likely(cum_len_next >= 0)) { /* header ends */
2656                                         int small;
2657
2658                                         rdma_count = -1;
2659                                         cum_len_next = 0;
2660                                         seglen = -cum_len;
2661                                         small = (mss <= MXGEFW_SEND_SMALL_SIZE);
2662                                         flags_next = MXGEFW_FLAGS_TSO_PLD |
2663                                             MXGEFW_FLAGS_FIRST |
2664                                             (small * MXGEFW_FLAGS_SMALL);
2665                                 }
2666                         }
2667                         req->addr_high = high_swapped;
2668                         req->addr_low = htonl(low);
2669                         req->pseudo_hdr_offset = htons(pseudo_hdr_offset);
2670                         req->pad = 0;   /* complete solid 16-byte block; does this matter? */
2671                         req->rdma_count = 1;
2672                         req->length = htons(seglen);
2673                         req->cksum_offset = cksum_offset;
2674                         req->flags = flags | ((cum_len & 1) * odd_flag);
2675
2676                         low += seglen;
2677                         len -= seglen;
2678                         cum_len = cum_len_next;
2679                         flags = flags_next;
2680                         req++;
2681                         count++;
2682                         rdma_count++;
2683                         if (cksum_offset != 0 && !(mss && skb_is_gso_v6(skb))) {
2684                                 if (unlikely(cksum_offset > seglen))
2685                                         cksum_offset -= seglen;
2686                                 else
2687                                         cksum_offset = 0;
2688                         }
2689                 }
2690                 if (frag_idx == frag_cnt)
2691                         break;
2692
2693                 /* map next fragment for DMA */
2694                 idx = (count + tx->req) & tx->mask;
2695                 frag = &skb_shinfo(skb)->frags[frag_idx];
2696                 frag_idx++;
2697                 len = frag->size;
2698                 bus = pci_map_page(mgp->pdev, frag->page, frag->page_offset,
2699                                    len, PCI_DMA_TODEVICE);
2700                 pci_unmap_addr_set(&tx->info[idx], bus, bus);
2701                 pci_unmap_len_set(&tx->info[idx], len, len);
2702         }
2703
2704         (req - rdma_count)->rdma_count = rdma_count;
2705         if (mss)
2706                 do {
2707                         req--;
2708                         req->flags |= MXGEFW_FLAGS_TSO_LAST;
2709                 } while (!(req->flags & (MXGEFW_FLAGS_TSO_CHOP |
2710                                          MXGEFW_FLAGS_FIRST)));
2711         idx = ((count - 1) + tx->req) & tx->mask;
2712         tx->info[idx].last = 1;
2713         if (tx->wc_fifo == NULL)
2714                 myri10ge_submit_req(tx, tx->req_list, count);
2715         else
2716                 myri10ge_submit_req_wc(tx, tx->req_list, count);
2717         tx->pkt_start++;
2718         if ((avail - count) < MXGEFW_MAX_SEND_DESC) {
2719                 tx->stop_queue++;
2720                 netif_stop_queue(dev);
2721         }
2722         dev->trans_start = jiffies;
2723         return 0;
2724
2725 abort_linearize:
2726         /* Free any DMA resources we've alloced and clear out the skb
2727          * slot so as to not trip up assertions, and to avoid a
2728          * double-free if linearizing fails */
2729
2730         last_idx = (idx + 1) & tx->mask;
2731         idx = tx->req & tx->mask;
2732         tx->info[idx].skb = NULL;
2733         do {
2734                 len = pci_unmap_len(&tx->info[idx], len);
2735                 if (len) {
2736                         if (tx->info[idx].skb != NULL)
2737                                 pci_unmap_single(mgp->pdev,
2738                                                  pci_unmap_addr(&tx->info[idx],
2739                                                                 bus), len,
2740                                                  PCI_DMA_TODEVICE);
2741                         else
2742                                 pci_unmap_page(mgp->pdev,
2743                                                pci_unmap_addr(&tx->info[idx],
2744                                                               bus), len,
2745                                                PCI_DMA_TODEVICE);
2746                         pci_unmap_len_set(&tx->info[idx], len, 0);
2747                         tx->info[idx].skb = NULL;
2748                 }
2749                 idx = (idx + 1) & tx->mask;
2750         } while (idx != last_idx);
2751         if (skb_is_gso(skb)) {
2752                 printk(KERN_ERR
2753                        "myri10ge: %s: TSO but wanted to linearize?!?!?\n",
2754                        mgp->dev->name);
2755                 goto drop;
2756         }
2757
2758         if (skb_linearize(skb))
2759                 goto drop;
2760
2761         tx->linearized++;
2762         goto again;
2763
2764 drop:
2765         dev_kfree_skb_any(skb);
2766         ss->stats.tx_dropped += 1;
2767         return 0;
2768
2769 }
2770
2771 static int myri10ge_sw_tso(struct sk_buff *skb, struct net_device *dev)
2772 {
2773         struct sk_buff *segs, *curr;
2774         struct myri10ge_priv *mgp = netdev_priv(dev);
2775         int status;
2776
2777         segs = skb_gso_segment(skb, dev->features & ~NETIF_F_TSO6);
2778         if (IS_ERR(segs))
2779                 goto drop;
2780
2781         while (segs) {
2782                 curr = segs;
2783                 segs = segs->next;
2784                 curr->next = NULL;
2785                 status = myri10ge_xmit(curr, dev);
2786                 if (status != 0) {
2787                         dev_kfree_skb_any(curr);
2788                         if (segs != NULL) {
2789                                 curr = segs;
2790                                 segs = segs->next;
2791                                 curr->next = NULL;
2792                                 dev_kfree_skb_any(segs);
2793                         }
2794                         goto drop;
2795                 }
2796         }
2797         dev_kfree_skb_any(skb);
2798         return 0;
2799
2800 drop:
2801         dev_kfree_skb_any(skb);
2802         mgp->stats.tx_dropped += 1;
2803         return 0;
2804 }
2805
2806 static struct net_device_stats *myri10ge_get_stats(struct net_device *dev)
2807 {
2808         struct myri10ge_priv *mgp = netdev_priv(dev);
2809         struct myri10ge_slice_netstats *slice_stats;
2810         struct net_device_stats *stats = &mgp->stats;
2811         int i;
2812
2813         memset(stats, 0, sizeof(*stats));
2814         for (i = 0; i < mgp->num_slices; i++) {
2815                 slice_stats = &mgp->ss[i].stats;
2816                 stats->rx_packets += slice_stats->rx_packets;
2817                 stats->tx_packets += slice_stats->tx_packets;
2818                 stats->rx_bytes += slice_stats->rx_bytes;
2819                 stats->tx_bytes += slice_stats->tx_bytes;
2820                 stats->rx_dropped += slice_stats->rx_dropped;
2821                 stats->tx_dropped += slice_stats->tx_dropped;
2822         }
2823         return stats;
2824 }
2825
2826 static void myri10ge_set_multicast_list(struct net_device *dev)
2827 {
2828         struct myri10ge_priv *mgp = netdev_priv(dev);
2829         struct myri10ge_cmd cmd;
2830         struct dev_mc_list *mc_list;
2831         __be32 data[2] = { 0, 0 };
2832         int err;
2833         DECLARE_MAC_BUF(mac);
2834
2835         /* can be called from atomic contexts,
2836          * pass 1 to force atomicity in myri10ge_send_cmd() */
2837         myri10ge_change_promisc(mgp, dev->flags & IFF_PROMISC, 1);
2838
2839         /* This firmware is known to not support multicast */
2840         if (!mgp->fw_multicast_support)
2841                 return;
2842
2843         /* Disable multicast filtering */
2844
2845         err = myri10ge_send_cmd(mgp, MXGEFW_ENABLE_ALLMULTI, &cmd, 1);
2846         if (err != 0) {
2847                 printk(KERN_ERR "myri10ge: %s: Failed MXGEFW_ENABLE_ALLMULTI,"
2848                        " error status: %d\n", dev->name, err);
2849                 goto abort;
2850         }
2851
2852         if ((dev->flags & IFF_ALLMULTI) || mgp->adopted_rx_filter_bug) {
2853                 /* request to disable multicast filtering, so quit here */
2854                 return;
2855         }
2856
2857         /* Flush the filters */
2858
2859         err = myri10ge_send_cmd(mgp, MXGEFW_LEAVE_ALL_MULTICAST_GROUPS,
2860                                 &cmd, 1);
2861         if (err != 0) {
2862                 printk(KERN_ERR
2863                        "myri10ge: %s: Failed MXGEFW_LEAVE_ALL_MULTICAST_GROUPS"
2864                        ", error status: %d\n", dev->name, err);
2865                 goto abort;
2866         }
2867
2868         /* Walk the multicast list, and add each address */
2869         for (mc_list = dev->mc_list; mc_list != NULL; mc_list = mc_list->next) {
2870                 memcpy(data, &mc_list->dmi_addr, 6);
2871                 cmd.data0 = ntohl(data[0]);
2872                 cmd.data1 = ntohl(data[1]);
2873                 err = myri10ge_send_cmd(mgp, MXGEFW_JOIN_MULTICAST_GROUP,
2874                                         &cmd, 1);
2875
2876                 if (err != 0) {
2877                         printk(KERN_ERR "myri10ge: %s: Failed "
2878                                "MXGEFW_JOIN_MULTICAST_GROUP, error status:"
2879                                "%d\t", dev->name, err);
2880                         printk(KERN_ERR "MAC %s\n",
2881                                print_mac(mac, mc_list->dmi_addr));
2882                         goto abort;
2883                 }
2884         }
2885         /* Enable multicast filtering */
2886         err = myri10ge_send_cmd(mgp, MXGEFW_DISABLE_ALLMULTI, &cmd, 1);
2887         if (err != 0) {
2888                 printk(KERN_ERR "myri10ge: %s: Failed MXGEFW_DISABLE_ALLMULTI,"
2889                        "error status: %d\n", dev->name, err);
2890                 goto abort;
2891         }
2892
2893         return;
2894
2895 abort:
2896         return;
2897 }
2898
2899 static int myri10ge_set_mac_address(struct net_device *dev, void *addr)
2900 {
2901         struct sockaddr *sa = addr;
2902         struct myri10ge_priv *mgp = netdev_priv(dev);
2903         int status;
2904
2905         if (!is_valid_ether_addr(sa->sa_data))
2906                 return -EADDRNOTAVAIL;
2907
2908         status = myri10ge_update_mac_address(mgp, sa->sa_data);
2909         if (status != 0) {
2910                 printk(KERN_ERR
2911                        "myri10ge: %s: changing mac address failed with %d\n",
2912                        dev->name, status);
2913                 return status;
2914         }
2915
2916         /* change the dev structure */
2917         memcpy(dev->dev_addr, sa->sa_data, 6);
2918         return 0;
2919 }
2920
2921 static int myri10ge_change_mtu(struct net_device *dev, int new_mtu)
2922 {
2923         struct myri10ge_priv *mgp = netdev_priv(dev);
2924         int error = 0;
2925
2926         if ((new_mtu < 68) || (ETH_HLEN + new_mtu > MYRI10GE_MAX_ETHER_MTU)) {
2927                 printk(KERN_ERR "myri10ge: %s: new mtu (%d) is not valid\n",
2928                        dev->name, new_mtu);
2929                 return -EINVAL;
2930         }
2931         printk(KERN_INFO "%s: changing mtu from %d to %d\n",
2932                dev->name, dev->mtu, new_mtu);
2933         if (mgp->running) {
2934                 /* if we change the mtu on an active device, we must
2935                  * reset the device so the firmware sees the change */
2936                 myri10ge_close(dev);
2937                 dev->mtu = new_mtu;
2938                 myri10ge_open(dev);
2939         } else
2940                 dev->mtu = new_mtu;
2941
2942         return error;
2943 }
2944
2945 /*
2946  * Enable ECRC to align PCI-E Completion packets on an 8-byte boundary.
2947  * Only do it if the bridge is a root port since we don't want to disturb
2948  * any other device, except if forced with myri10ge_ecrc_enable > 1.
2949  */
2950
2951 static void myri10ge_enable_ecrc(struct myri10ge_priv *mgp)
2952 {
2953         struct pci_dev *bridge = mgp->pdev->bus->self;
2954         struct device *dev = &mgp->pdev->dev;
2955         unsigned cap;
2956         unsigned err_cap;
2957         u16 val;
2958         u8 ext_type;
2959         int ret;
2960
2961         if (!myri10ge_ecrc_enable || !bridge)
2962                 return;
2963
2964         /* check that the bridge is a root port */
2965         cap = pci_find_capability(bridge, PCI_CAP_ID_EXP);
2966         pci_read_config_word(bridge, cap + PCI_CAP_FLAGS, &val);
2967         ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4;
2968         if (ext_type != PCI_EXP_TYPE_ROOT_PORT) {
2969                 if (myri10ge_ecrc_enable > 1) {
2970                         struct pci_dev *prev_bridge, *old_bridge = bridge;
2971
2972                         /* Walk the hierarchy up to the root port
2973                          * where ECRC has to be enabled */
2974                         do {
2975                                 prev_bridge = bridge;
2976                                 bridge = bridge->bus->self;
2977                                 if (!bridge || prev_bridge == bridge) {
2978                                         dev_err(dev,
2979                                                 "Failed to find root port"
2980                                                 " to force ECRC\n");
2981                                         return;
2982                                 }
2983                                 cap =
2984                                     pci_find_capability(bridge, PCI_CAP_ID_EXP);
2985                                 pci_read_config_word(bridge,
2986                                                      cap + PCI_CAP_FLAGS, &val);
2987                                 ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4;
2988                         } while (ext_type != PCI_EXP_TYPE_ROOT_PORT);
2989
2990                         dev_info(dev,
2991                                  "Forcing ECRC on non-root port %s"
2992                                  " (enabling on root port %s)\n",
2993                                  pci_name(old_bridge), pci_name(bridge));
2994                 } else {
2995                         dev_err(dev,
2996                                 "Not enabling ECRC on non-root port %s\n",
2997                                 pci_name(bridge));
2998                         return;
2999                 }
3000         }
3001
3002         cap = pci_find_ext_capability(bridge, PCI_EXT_CAP_ID_ERR);
3003         if (!cap)
3004                 return;
3005
3006         ret = pci_read_config_dword(bridge, cap + PCI_ERR_CAP, &err_cap);
3007         if (ret) {
3008                 dev_err(dev, "failed reading ext-conf-space of %s\n",
3009                         pci_name(bridge));
3010                 dev_err(dev, "\t pci=nommconf in use? "
3011                         "or buggy/incomplete/absent ACPI MCFG attr?\n");
3012                 return;
3013         }
3014         if (!(err_cap & PCI_ERR_CAP_ECRC_GENC))
3015                 return;
3016
3017         err_cap |= PCI_ERR_CAP_ECRC_GENE;
3018         pci_write_config_dword(bridge, cap + PCI_ERR_CAP, err_cap);
3019         dev_info(dev, "Enabled ECRC on upstream bridge %s\n", pci_name(bridge));
3020 }
3021
3022 /*
3023  * The Lanai Z8E PCI-E interface achieves higher Read-DMA throughput
3024  * when the PCI-E Completion packets are aligned on an 8-byte
3025  * boundary.  Some PCI-E chip sets always align Completion packets; on
3026  * the ones that do not, the alignment can be enforced by enabling
3027  * ECRC generation (if supported).
3028  *
3029  * When PCI-E Completion packets are not aligned, it is actually more
3030  * efficient to limit Read-DMA transactions to 2KB, rather than 4KB.
3031  *
3032  * If the driver can neither enable ECRC nor verify that it has
3033  * already been enabled, then it must use a firmware image which works
3034  * around unaligned completion packets (myri10ge_rss_ethp_z8e.dat), and it
3035  * should also ensure that it never gives the device a Read-DMA which is
3036  * larger than 2KB by setting the tx_boundary to 2KB.  If ECRC is
3037  * enabled, then the driver should use the aligned (myri10ge_rss_eth_z8e.dat)
3038  * firmware image, and set tx_boundary to 4KB.
3039  */
3040
3041 static void myri10ge_firmware_probe(struct myri10ge_priv *mgp)
3042 {
3043         struct pci_dev *pdev = mgp->pdev;
3044         struct device *dev = &pdev->dev;
3045         int status;
3046
3047         mgp->tx_boundary = 4096;
3048         /*
3049          * Verify the max read request size was set to 4KB
3050          * before trying the test with 4KB.
3051          */
3052         status = pcie_get_readrq(pdev);
3053         if (status < 0) {
3054                 dev_err(dev, "Couldn't read max read req size: %d\n", status);
3055                 goto abort;
3056         }
3057         if (status != 4096) {
3058                 dev_warn(dev, "Max Read Request size != 4096 (%d)\n", status);
3059                 mgp->tx_boundary = 2048;
3060         }
3061         /*
3062          * load the optimized firmware (which assumes aligned PCIe
3063          * completions) in order to see if it works on this host.
3064          */
3065         mgp->fw_name = myri10ge_fw_aligned;
3066         status = myri10ge_load_firmware(mgp, 1);
3067         if (status != 0) {
3068                 goto abort;
3069         }
3070
3071         /*
3072          * Enable ECRC if possible
3073          */
3074         myri10ge_enable_ecrc(mgp);
3075
3076         /*
3077          * Run a DMA test which watches for unaligned completions and
3078          * aborts on the first one seen.
3079          */
3080
3081         status = myri10ge_dma_test(mgp, MXGEFW_CMD_UNALIGNED_TEST);
3082         if (status == 0)
3083                 return;         /* keep the aligned firmware */
3084
3085         if (status != -E2BIG)
3086                 dev_warn(dev, "DMA test failed: %d\n", status);
3087         if (status == -ENOSYS)
3088                 dev_warn(dev, "Falling back to ethp! "
3089                          "Please install up to date fw\n");
3090 abort:
3091         /* fall back to using the unaligned firmware */
3092         mgp->tx_boundary = 2048;
3093         mgp->fw_name = myri10ge_fw_unaligned;
3094
3095 }
3096
3097 static void myri10ge_select_firmware(struct myri10ge_priv *mgp)
3098 {
3099         if (myri10ge_force_firmware == 0) {
3100                 int link_width, exp_cap;
3101                 u16 lnk;
3102
3103                 exp_cap = pci_find_capability(mgp->pdev, PCI_CAP_ID_EXP);
3104                 pci_read_config_word(mgp->pdev, exp_cap + PCI_EXP_LNKSTA, &lnk);
3105                 link_width = (lnk >> 4) & 0x3f;
3106
3107                 /* Check to see if Link is less than 8 or if the
3108                  * upstream bridge is known to provide aligned
3109                  * completions */
3110                 if (link_width < 8) {
3111                         dev_info(&mgp->pdev->dev, "PCIE x%d Link\n",
3112                                  link_width);
3113                         mgp->tx_boundary = 4096;
3114                         mgp->fw_name = myri10ge_fw_aligned;
3115                 } else {
3116                         myri10ge_firmware_probe(mgp);
3117                 }
3118         } else {
3119                 if (myri10ge_force_firmware == 1) {
3120                         dev_info(&mgp->pdev->dev,
3121                                  "Assuming aligned completions (forced)\n");
3122                         mgp->tx_boundary = 4096;
3123                         mgp->fw_name = myri10ge_fw_aligned;
3124                 } else {
3125                         dev_info(&mgp->pdev->dev,
3126                                  "Assuming unaligned completions (forced)\n");
3127                         mgp->tx_boundary = 2048;
3128                         mgp->fw_name = myri10ge_fw_unaligned;
3129                 }
3130         }
3131         if (myri10ge_fw_name != NULL) {
3132                 dev_info(&mgp->pdev->dev, "overriding firmware to %s\n",
3133                          myri10ge_fw_name);
3134                 mgp->fw_name = myri10ge_fw_name;
3135         }
3136 }
3137
3138 #ifdef CONFIG_PM
3139 static int myri10ge_suspend(struct pci_dev *pdev, pm_message_t state)
3140 {
3141         struct myri10ge_priv *mgp;
3142         struct net_device *netdev;
3143
3144         mgp = pci_get_drvdata(pdev);
3145         if (mgp == NULL)
3146                 return -EINVAL;
3147         netdev = mgp->dev;
3148
3149         netif_device_detach(netdev);
3150         if (netif_running(netdev)) {
3151                 printk(KERN_INFO "myri10ge: closing %s\n", netdev->name);
3152                 rtnl_lock();
3153                 myri10ge_close(netdev);
3154                 rtnl_unlock();
3155         }
3156         myri10ge_dummy_rdma(mgp, 0);
3157         pci_save_state(pdev);
3158         pci_disable_device(pdev);
3159
3160         return pci_set_power_state(pdev, pci_choose_state(pdev, state));
3161 }
3162
3163 static int myri10ge_resume(struct pci_dev *pdev)
3164 {
3165         struct myri10ge_priv *mgp;
3166         struct net_device *netdev;
3167         int status;
3168         u16 vendor;
3169
3170         mgp = pci_get_drvdata(pdev);
3171         if (mgp == NULL)
3172                 return -EINVAL;
3173         netdev = mgp->dev;
3174         pci_set_power_state(pdev, 0);   /* zeros conf space as a side effect */
3175         msleep(5);              /* give card time to respond */
3176         pci_read_config_word(mgp->pdev, PCI_VENDOR_ID, &vendor);
3177         if (vendor == 0xffff) {
3178                 printk(KERN_ERR "myri10ge: %s: device disappeared!\n",
3179                        mgp->dev->name);
3180                 return -EIO;
3181         }
3182
3183         status = pci_restore_state(pdev);
3184         if (status)
3185                 return status;
3186
3187         status = pci_enable_device(pdev);
3188         if (status) {
3189                 dev_err(&pdev->dev, "failed to enable device\n");
3190                 return status;
3191         }
3192
3193         pci_set_master(pdev);
3194
3195         myri10ge_reset(mgp);
3196         myri10ge_dummy_rdma(mgp, 1);
3197
3198         /* Save configuration space to be restored if the
3199          * nic resets due to a parity error */
3200         pci_save_state(pdev);
3201
3202         if (netif_running(netdev)) {
3203                 rtnl_lock();
3204                 status = myri10ge_open(netdev);
3205                 rtnl_unlock();
3206                 if (status != 0)
3207                         goto abort_with_enabled;
3208
3209         }
3210         netif_device_attach(netdev);
3211
3212         return 0;
3213
3214 abort_with_enabled:
3215         pci_disable_device(pdev);
3216         return -EIO;
3217
3218 }
3219 #endif                          /* CONFIG_PM */
3220
3221 static u32 myri10ge_read_reboot(struct myri10ge_priv *mgp)
3222 {
3223         struct pci_dev *pdev = mgp->pdev;
3224         int vs = mgp->vendor_specific_offset;
3225         u32 reboot;
3226
3227         /*enter read32 mode */
3228         pci_write_config_byte(pdev, vs + 0x10, 0x3);
3229
3230         /*read REBOOT_STATUS (0xfffffff0) */
3231         pci_write_config_dword(pdev, vs + 0x18, 0xfffffff0);
3232         pci_read_config_dword(pdev, vs + 0x14, &reboot);
3233         return reboot;
3234 }
3235
3236 /*
3237  * This watchdog is used to check whether the board has suffered
3238  * from a parity error and needs to be recovered.
3239  */
3240 static void myri10ge_watchdog(struct work_struct *work)
3241 {
3242         struct myri10ge_priv *mgp =
3243             container_of(work, struct myri10ge_priv, watchdog_work);
3244         struct myri10ge_tx_buf *tx;
3245         u32 reboot;
3246         int status;
3247         int i;
3248         u16 cmd, vendor;
3249
3250         mgp->watchdog_resets++;
3251         pci_read_config_word(mgp->pdev, PCI_COMMAND, &cmd);
3252         if ((cmd & PCI_COMMAND_MASTER) == 0) {
3253                 /* Bus master DMA disabled?  Check to see
3254                  * if the card rebooted due to a parity error
3255                  * For now, just report it */
3256                 reboot = myri10ge_read_reboot(mgp);
3257                 printk(KERN_ERR
3258                        "myri10ge: %s: NIC rebooted (0x%x),%s resetting\n",
3259                        mgp->dev->name, reboot,
3260                        myri10ge_reset_recover ? " " : " not");
3261                 if (myri10ge_reset_recover == 0)
3262                         return;
3263
3264                 myri10ge_reset_recover--;
3265
3266                 /*
3267                  * A rebooted nic will come back with config space as
3268                  * it was after power was applied to PCIe bus.
3269                  * Attempt to restore config space which was saved
3270                  * when the driver was loaded, or the last time the
3271                  * nic was resumed from power saving mode.
3272                  */
3273                 pci_restore_state(mgp->pdev);
3274
3275                 /* save state again for accounting reasons */
3276                 pci_save_state(mgp->pdev);
3277
3278         } else {
3279                 /* if we get back -1's from our slot, perhaps somebody
3280                  * powered off our card.  Don't try to reset it in
3281                  * this case */
3282                 if (cmd == 0xffff) {
3283                         pci_read_config_word(mgp->pdev, PCI_VENDOR_ID, &vendor);
3284                         if (vendor == 0xffff) {
3285                                 printk(KERN_ERR
3286                                        "myri10ge: %s: device disappeared!\n",
3287                                        mgp->dev->name);
3288                                 return;
3289                         }
3290                 }
3291                 /* Perhaps it is a software error.  Try to reset */
3292
3293                 printk(KERN_ERR "myri10ge: %s: device timeout, resetting\n",
3294                        mgp->dev->name);
3295                 for (i = 0; i < mgp->num_slices; i++) {
3296                         tx = &mgp->ss[i].tx;
3297                         printk(KERN_INFO
3298                                "myri10ge: %s: (%d): %d %d %d %d %d\n",
3299                                mgp->dev->name, i, tx->req, tx->done,
3300                                tx->pkt_start, tx->pkt_done,
3301                                (int)ntohl(mgp->ss[i].fw_stats->
3302                                           send_done_count));
3303                         msleep(2000);
3304                         printk(KERN_INFO
3305                                "myri10ge: %s: (%d): %d %d %d %d %d\n",
3306                                mgp->dev->name, i, tx->req, tx->done,
3307                                tx->pkt_start, tx->pkt_done,
3308                                (int)ntohl(mgp->ss[i].fw_stats->
3309                                           send_done_count));
3310                 }
3311         }
3312         rtnl_lock();
3313         myri10ge_close(mgp->dev);
3314         status = myri10ge_load_firmware(mgp, 1);
3315         if (status != 0)
3316                 printk(KERN_ERR "myri10ge: %s: failed to load firmware\n",
3317                        mgp->dev->name);
3318         else
3319                 myri10ge_open(mgp->dev);
3320         rtnl_unlock();
3321 }
3322
3323 /*
3324  * We use our own timer routine rather than relying upon
3325  * netdev->tx_timeout because we have a very large hardware transmit
3326  * queue.  Due to the large queue, the netdev->tx_timeout function
3327  * cannot detect a NIC with a parity error in a timely fashion if the
3328  * NIC is lightly loaded.
3329  */
3330 static void myri10ge_watchdog_timer(unsigned long arg)
3331 {
3332         struct myri10ge_priv *mgp;
3333         struct myri10ge_slice_state *ss;
3334         int i, reset_needed;
3335         u32 rx_pause_cnt;
3336
3337         mgp = (struct myri10ge_priv *)arg;
3338
3339         rx_pause_cnt = ntohl(mgp->ss[0].fw_stats->dropped_pause);
3340         for (i = 0, reset_needed = 0;
3341              i < mgp->num_slices && reset_needed == 0; ++i) {
3342
3343                 ss = &mgp->ss[i];
3344                 if (ss->rx_small.watchdog_needed) {
3345                         myri10ge_alloc_rx_pages(mgp, &ss->rx_small,
3346                                                 mgp->small_bytes + MXGEFW_PAD,
3347                                                 1);
3348                         if (ss->rx_small.fill_cnt - ss->rx_small.cnt >=
3349                             myri10ge_fill_thresh)
3350                                 ss->rx_small.watchdog_needed = 0;
3351                 }
3352                 if (ss->rx_big.watchdog_needed) {
3353                         myri10ge_alloc_rx_pages(mgp, &ss->rx_big,
3354                                                 mgp->big_bytes, 1);
3355                         if (ss->rx_big.fill_cnt - ss->rx_big.cnt >=
3356                             myri10ge_fill_thresh)
3357                                 ss->rx_big.watchdog_needed = 0;
3358                 }
3359
3360                 if (ss->tx.req != ss->tx.done &&
3361                     ss->tx.done == ss->watchdog_tx_done &&
3362                     ss->watchdog_tx_req != ss->watchdog_tx_done) {
3363                         /* nic seems like it might be stuck.. */
3364                         if (rx_pause_cnt != mgp->watchdog_pause) {
3365                                 if (net_ratelimit())
3366                                         printk(KERN_WARNING "myri10ge %s:"
3367                                                "TX paused, check link partner\n",
3368                                                mgp->dev->name);
3369                         } else {
3370                                 reset_needed = 1;
3371                         }
3372                 }
3373                 ss->watchdog_tx_done = ss->tx.done;
3374                 ss->watchdog_tx_req = ss->tx.req;
3375         }
3376         mgp->watchdog_pause = rx_pause_cnt;
3377
3378         if (reset_needed) {
3379                 schedule_work(&mgp->watchdog_work);
3380         } else {
3381                 /* rearm timer */
3382                 mod_timer(&mgp->watchdog_timer,
3383                           jiffies + myri10ge_watchdog_timeout * HZ);
3384         }
3385 }
3386
3387 static void myri10ge_free_slices(struct myri10ge_priv *mgp)
3388 {
3389         struct myri10ge_slice_state *ss;
3390         struct pci_dev *pdev = mgp->pdev;
3391         size_t bytes;
3392         int i;
3393
3394         if (mgp->ss == NULL)
3395                 return;
3396
3397         for (i = 0; i < mgp->num_slices; i++) {
3398                 ss = &mgp->ss[i];
3399                 if (ss->rx_done.entry != NULL) {
3400                         bytes = mgp->max_intr_slots *
3401                             sizeof(*ss->rx_done.entry);
3402                         dma_free_coherent(&pdev->dev, bytes,
3403                                           ss->rx_done.entry, ss->rx_done.bus);
3404                         ss->rx_done.entry = NULL;
3405                 }
3406                 if (ss->fw_stats != NULL) {
3407                         bytes = sizeof(*ss->fw_stats);
3408                         dma_free_coherent(&pdev->dev, bytes,
3409                                           ss->fw_stats, ss->fw_stats_bus);
3410                         ss->fw_stats = NULL;
3411                 }
3412         }
3413         kfree(mgp->ss);
3414         mgp->ss = NULL;
3415 }
3416
3417 static int myri10ge_alloc_slices(struct myri10ge_priv *mgp)
3418 {
3419         struct myri10ge_slice_state *ss;
3420         struct pci_dev *pdev = mgp->pdev;
3421         size_t bytes;
3422         int i;
3423
3424         bytes = sizeof(*mgp->ss) * mgp->num_slices;
3425         mgp->ss = kzalloc(bytes, GFP_KERNEL);
3426         if (mgp->ss == NULL) {
3427                 return -ENOMEM;
3428         }
3429
3430         for (i = 0; i < mgp->num_slices; i++) {
3431                 ss = &mgp->ss[i];
3432                 bytes = mgp->max_intr_slots * sizeof(*ss->rx_done.entry);
3433                 ss->rx_done.entry = dma_alloc_coherent(&pdev->dev, bytes,
3434                                                        &ss->rx_done.bus,
3435                                                        GFP_KERNEL);
3436                 if (ss->rx_done.entry == NULL)
3437                         goto abort;
3438                 memset(ss->rx_done.entry, 0, bytes);
3439                 bytes = sizeof(*ss->fw_stats);
3440                 ss->fw_stats = dma_alloc_coherent(&pdev->dev, bytes,
3441                                                   &ss->fw_stats_bus,
3442                                                   GFP_KERNEL);
3443                 if (ss->fw_stats == NULL)
3444                         goto abort;
3445                 ss->mgp = mgp;
3446                 ss->dev = mgp->dev;
3447                 netif_napi_add(ss->dev, &ss->napi, myri10ge_poll,
3448                                myri10ge_napi_weight);
3449         }
3450         return 0;
3451 abort:
3452         myri10ge_free_slices(mgp);
3453         return -ENOMEM;
3454 }
3455
3456 /*
3457  * This function determines the number of slices supported.
3458  * The number slices is the minumum of the number of CPUS,
3459  * the number of MSI-X irqs supported, the number of slices
3460  * supported by the firmware
3461  */
3462 static void myri10ge_probe_slices(struct myri10ge_priv *mgp)
3463 {
3464         struct myri10ge_cmd cmd;
3465         struct pci_dev *pdev = mgp->pdev;
3466         char *old_fw;
3467         int i, status, ncpus, msix_cap;
3468
3469         mgp->num_slices = 1;
3470         msix_cap = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
3471         ncpus = num_online_cpus();
3472
3473         if (myri10ge_max_slices == 1 || msix_cap == 0 ||
3474             (myri10ge_max_slices == -1 && ncpus < 2))
3475                 return;
3476
3477         /* try to load the slice aware rss firmware */
3478         old_fw = mgp->fw_name;
3479         if (old_fw == myri10ge_fw_aligned)
3480                 mgp->fw_name = myri10ge_fw_rss_aligned;
3481         else
3482                 mgp->fw_name = myri10ge_fw_rss_unaligned;
3483         status = myri10ge_load_firmware(mgp, 0);
3484         if (status != 0) {
3485                 dev_info(&pdev->dev, "Rss firmware not found\n");
3486                 return;
3487         }
3488
3489         /* hit the board with a reset to ensure it is alive */
3490         memset(&cmd, 0, sizeof(cmd));
3491         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_RESET, &cmd, 0);
3492         if (status != 0) {
3493                 dev_err(&mgp->pdev->dev, "failed reset\n");
3494                 goto abort_with_fw;
3495                 return;
3496         }
3497
3498         mgp->max_intr_slots = cmd.data0 / sizeof(struct mcp_slot);
3499
3500         /* tell it the size of the interrupt queues */
3501         cmd.data0 = mgp->max_intr_slots * sizeof(struct mcp_slot);
3502         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_SET_INTRQ_SIZE, &cmd, 0);
3503         if (status != 0) {
3504                 dev_err(&mgp->pdev->dev, "failed MXGEFW_CMD_SET_INTRQ_SIZE\n");
3505                 goto abort_with_fw;
3506         }
3507
3508         /* ask the maximum number of slices it supports */
3509         status = myri10ge_send_cmd(mgp, MXGEFW_CMD_GET_MAX_RSS_QUEUES, &cmd, 0);
3510         if (status != 0)
3511                 goto abort_with_fw;
3512         else
3513                 mgp->num_slices = cmd.data0;
3514
3515         /* Only allow multiple slices if MSI-X is usable */
3516         if (!myri10ge_msi) {
3517                 goto abort_with_fw;
3518         }
3519
3520         /* if the admin did not specify a limit to how many
3521          * slices we should use, cap it automatically to the
3522          * number of CPUs currently online */
3523         if (myri10ge_max_slices == -1)
3524                 myri10ge_max_slices = ncpus;
3525
3526         if (mgp->num_slices > myri10ge_max_slices)
3527                 mgp->num_slices = myri10ge_max_slices;
3528
3529         /* Now try to allocate as many MSI-X vectors as we have
3530          * slices. We give up on MSI-X if we can only get a single
3531          * vector. */
3532
3533         mgp->msix_vectors = kzalloc(mgp->num_slices *
3534                                     sizeof(*mgp->msix_vectors), GFP_KERNEL);
3535         if (mgp->msix_vectors == NULL)
3536                 goto disable_msix;
3537         for (i = 0; i < mgp->num_slices; i++) {
3538                 mgp->msix_vectors[i].entry = i;
3539         }
3540
3541         while (mgp->num_slices > 1) {
3542                 /* make sure it is a power of two */
3543                 while (!is_power_of_2(mgp->num_slices))
3544                         mgp->num_slices--;
3545                 if (mgp->num_slices == 1)
3546                         goto disable_msix;
3547                 status = pci_enable_msix(pdev, mgp->msix_vectors,
3548                                          mgp->num_slices);
3549                 if (status == 0) {
3550                         pci_disable_msix(pdev);
3551                         return;
3552                 }
3553                 if (status > 0)
3554                         mgp->num_slices = status;
3555                 else
3556                         goto disable_msix;
3557         }
3558
3559 disable_msix:
3560         if (mgp->msix_vectors != NULL) {
3561                 kfree(mgp->msix_vectors);
3562                 mgp->msix_vectors = NULL;
3563         }
3564
3565 abort_with_fw:
3566         mgp->num_slices = 1;
3567         mgp->fw_name = old_fw;
3568         myri10ge_load_firmware(mgp, 0);
3569 }
3570
3571 static int myri10ge_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3572 {
3573         struct net_device *netdev;
3574         struct myri10ge_priv *mgp;
3575         struct device *dev = &pdev->dev;
3576         int i;
3577         int status = -ENXIO;
3578         int dac_enabled;
3579
3580         netdev = alloc_etherdev(sizeof(*mgp));
3581         if (netdev == NULL) {
3582                 dev_err(dev, "Could not allocate ethernet device\n");
3583                 return -ENOMEM;
3584         }
3585
3586         SET_NETDEV_DEV(netdev, &pdev->dev);
3587
3588         mgp = netdev_priv(netdev);
3589         mgp->dev = netdev;
3590         mgp->pdev = pdev;
3591         mgp->csum_flag = MXGEFW_FLAGS_CKSUM;
3592         mgp->pause = myri10ge_flow_control;
3593         mgp->intr_coal_delay = myri10ge_intr_coal_delay;
3594         mgp->msg_enable = netif_msg_init(myri10ge_debug, MYRI10GE_MSG_DEFAULT);
3595         init_waitqueue_head(&mgp->down_wq);
3596
3597         if (pci_enable_device(pdev)) {
3598                 dev_err(&pdev->dev, "pci_enable_device call failed\n");
3599                 status = -ENODEV;
3600                 goto abort_with_netdev;
3601         }
3602
3603         /* Find the vendor-specific cap so we can check
3604          * the reboot register later on */
3605         mgp->vendor_specific_offset
3606             = pci_find_capability(pdev, PCI_CAP_ID_VNDR);
3607
3608         /* Set our max read request to 4KB */
3609         status = pcie_set_readrq(pdev, 4096);
3610         if (status != 0) {
3611                 dev_err(&pdev->dev, "Error %d writing PCI_EXP_DEVCTL\n",
3612                         status);
3613                 goto abort_with_netdev;
3614         }
3615
3616         pci_set_master(pdev);
3617         dac_enabled = 1;
3618         status = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
3619         if (status != 0) {
3620                 dac_enabled = 0;
3621                 dev_err(&pdev->dev,
3622                         "64-bit pci address mask was refused, "
3623                         "trying 32-bit\n");
3624                 status = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
3625         }
3626         if (status != 0) {
3627                 dev_err(&pdev->dev, "Error %d setting DMA mask\n", status);
3628                 goto abort_with_netdev;
3629         }
3630         mgp->cmd = dma_alloc_coherent(&pdev->dev, sizeof(*mgp->cmd),
3631                                       &mgp->cmd_bus, GFP_KERNEL);
3632         if (mgp->cmd == NULL)
3633                 goto abort_with_netdev;
3634
3635         mgp->board_span = pci_resource_len(pdev, 0);
3636         mgp->iomem_base = pci_resource_start(pdev, 0);
3637         mgp->mtrr = -1;
3638         mgp->wc_enabled = 0;
3639 #ifdef CONFIG_MTRR
3640         mgp->mtrr = mtrr_add(mgp->iomem_base, mgp->board_span,
3641                              MTRR_TYPE_WRCOMB, 1);
3642         if (mgp->mtrr >= 0)
3643                 mgp->wc_enabled = 1;
3644 #endif
3645         /* Hack.  need to get rid of these magic numbers */
3646         mgp->sram_size =
3647             2 * 1024 * 1024 - (2 * (48 * 1024) + (32 * 1024)) - 0x100;
3648         if (mgp->sram_size > mgp->board_span) {
3649                 dev_err(&pdev->dev, "board span %ld bytes too small\n",
3650                         mgp->board_span);
3651                 goto abort_with_wc;
3652         }
3653         mgp->sram = ioremap(mgp->iomem_base, mgp->board_span);
3654         if (mgp->sram == NULL) {
3655                 dev_err(&pdev->dev, "ioremap failed for %ld bytes at 0x%lx\n",
3656                         mgp->board_span, mgp->iomem_base);
3657                 status = -ENXIO;
3658                 goto abort_with_wc;
3659         }
3660         memcpy_fromio(mgp->eeprom_strings,
3661                       mgp->sram + mgp->sram_size - MYRI10GE_EEPROM_STRINGS_SIZE,
3662                       MYRI10GE_EEPROM_STRINGS_SIZE);
3663         memset(mgp->eeprom_strings + MYRI10GE_EEPROM_STRINGS_SIZE - 2, 0, 2);
3664         status = myri10ge_read_mac_addr(mgp);
3665         if (status)
3666                 goto abort_with_ioremap;
3667
3668         for (i = 0; i < ETH_ALEN; i++)
3669                 netdev->dev_addr[i] = mgp->mac_addr[i];
3670
3671         myri10ge_select_firmware(mgp);
3672
3673         status = myri10ge_load_firmware(mgp, 1);
3674         if (status != 0) {
3675                 dev_err(&pdev->dev, "failed to load firmware\n");
3676                 goto abort_with_ioremap;
3677         }
3678         myri10ge_probe_slices(mgp);
3679         status = myri10ge_alloc_slices(mgp);
3680         if (status != 0) {
3681                 dev_err(&pdev->dev, "failed to alloc slice state\n");
3682                 goto abort_with_firmware;
3683         }
3684
3685         status = myri10ge_reset(mgp);
3686         if (status != 0) {
3687                 dev_err(&pdev->dev, "failed reset\n");
3688                 goto abort_with_slices;
3689         }
3690
3691         pci_set_drvdata(pdev, mgp);
3692         if ((myri10ge_initial_mtu + ETH_HLEN) > MYRI10GE_MAX_ETHER_MTU)
3693                 myri10ge_initial_mtu = MYRI10GE_MAX_ETHER_MTU - ETH_HLEN;
3694         if ((myri10ge_initial_mtu + ETH_HLEN) < 68)
3695                 myri10ge_initial_mtu = 68;
3696         netdev->mtu = myri10ge_initial_mtu;
3697         netdev->open = myri10ge_open;
3698         netdev->stop = myri10ge_close;
3699         netdev->hard_start_xmit = myri10ge_xmit;
3700         netdev->get_stats = myri10ge_get_stats;
3701         netdev->base_addr = mgp->iomem_base;
3702         netdev->change_mtu = myri10ge_change_mtu;
3703         netdev->set_multicast_list = myri10ge_set_multicast_list;
3704         netdev->set_mac_address = myri10ge_set_mac_address;
3705         netdev->features = mgp->features;
3706         if (dac_enabled)
3707                 netdev->features |= NETIF_F_HIGHDMA;
3708
3709         /* make sure we can get an irq, and that MSI can be
3710          * setup (if available).  Also ensure netdev->irq
3711          * is set to correct value if MSI is enabled */
3712         status = myri10ge_request_irq(mgp);
3713         if (status != 0)
3714                 goto abort_with_firmware;
3715         netdev->irq = pdev->irq;
3716         myri10ge_free_irq(mgp);
3717
3718         /* Save configuration space to be restored if the
3719          * nic resets due to a parity error */
3720         pci_save_state(pdev);
3721
3722         /* Setup the watchdog timer */
3723         setup_timer(&mgp->watchdog_timer, myri10ge_watchdog_timer,
3724                     (unsigned long)mgp);
3725
3726         SET_ETHTOOL_OPS(netdev, &myri10ge_ethtool_ops);
3727         INIT_WORK(&mgp->watchdog_work, myri10ge_watchdog);
3728         status = register_netdev(netdev);
3729         if (status != 0) {
3730                 dev_err(&pdev->dev, "register_netdev failed: %d\n", status);
3731                 goto abort_with_state;
3732         }
3733         if (mgp->msix_enabled)
3734                 dev_info(dev, "%d MSI-X IRQs, tx bndry %d, fw %s, WC %s\n",
3735                          mgp->num_slices, mgp->tx_boundary, mgp->fw_name,
3736                          (mgp->wc_enabled ? "Enabled" : "Disabled"));
3737         else
3738                 dev_info(dev, "%s IRQ %d, tx bndry %d, fw %s, WC %s\n",
3739                          mgp->msi_enabled ? "MSI" : "xPIC",
3740                          netdev->irq, mgp->tx_boundary, mgp->fw_name,
3741                          (mgp->wc_enabled ? "Enabled" : "Disabled"));
3742
3743         return 0;
3744
3745 abort_with_state:
3746         pci_restore_state(pdev);
3747
3748 abort_with_slices:
3749         myri10ge_free_slices(mgp);
3750
3751 abort_with_firmware:
3752         myri10ge_dummy_rdma(mgp, 0);
3753
3754 abort_with_ioremap:
3755         iounmap(mgp->sram);
3756
3757 abort_with_wc:
3758 #ifdef CONFIG_MTRR
3759         if (mgp->mtrr >= 0)
3760                 mtrr_del(mgp->mtrr, mgp->iomem_base, mgp->board_span);
3761 #endif
3762         dma_free_coherent(&pdev->dev, sizeof(*mgp->cmd),
3763                           mgp->cmd, mgp->cmd_bus);
3764
3765 abort_with_netdev:
3766
3767         free_netdev(netdev);
3768         return status;
3769 }
3770
3771 /*
3772  * myri10ge_remove
3773  *
3774  * Does what is necessary to shutdown one Myrinet device. Called
3775  *   once for each Myrinet card by the kernel when a module is
3776  *   unloaded.
3777  */
3778 static void myri10ge_remove(struct pci_dev *pdev)
3779 {
3780         struct myri10ge_priv *mgp;
3781         struct net_device *netdev;
3782
3783         mgp = pci_get_drvdata(pdev);
3784         if (mgp == NULL)
3785                 return;
3786
3787         flush_scheduled_work();
3788         netdev = mgp->dev;
3789         unregister_netdev(netdev);
3790
3791         myri10ge_dummy_rdma(mgp, 0);
3792
3793         /* avoid a memory leak */
3794         pci_restore_state(pdev);
3795
3796         iounmap(mgp->sram);
3797
3798 #ifdef CONFIG_MTRR
3799         if (mgp->mtrr >= 0)
3800                 mtrr_del(mgp->mtrr, mgp->iomem_base, mgp->board_span);
3801 #endif
3802         myri10ge_free_slices(mgp);
3803         if (mgp->msix_vectors != NULL)
3804                 kfree(mgp->msix_vectors);
3805         dma_free_coherent(&pdev->dev, sizeof(*mgp->cmd),
3806                           mgp->cmd, mgp->cmd_bus);
3807
3808         free_netdev(netdev);
3809         pci_set_drvdata(pdev, NULL);
3810 }
3811
3812 #define PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E      0x0008
3813 #define PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E_9    0x0009
3814
3815 static struct pci_device_id myri10ge_pci_tbl[] = {
3816         {PCI_DEVICE(PCI_VENDOR_ID_MYRICOM, PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E)},
3817         {PCI_DEVICE
3818          (PCI_VENDOR_ID_MYRICOM, PCI_DEVICE_ID_MYRICOM_MYRI10GE_Z8E_9)},
3819         {0},
3820 };
3821
3822 static struct pci_driver myri10ge_driver = {
3823         .name = "myri10ge",
3824         .probe = myri10ge_probe,
3825         .remove = myri10ge_remove,
3826         .id_table = myri10ge_pci_tbl,
3827 #ifdef CONFIG_PM
3828         .suspend = myri10ge_suspend,
3829         .resume = myri10ge_resume,
3830 #endif
3831 };
3832
3833 static __init int myri10ge_init_module(void)
3834 {
3835         printk(KERN_INFO "%s: Version %s\n", myri10ge_driver.name,
3836                MYRI10GE_VERSION_STR);
3837
3838         if (myri10ge_rss_hash > MXGEFW_RSS_HASH_TYPE_SRC_PORT ||
3839             myri10ge_rss_hash < MXGEFW_RSS_HASH_TYPE_IPV4) {
3840                 printk(KERN_ERR
3841                        "%s: Illegal rssh hash type %d, defaulting to source port\n",
3842                        myri10ge_driver.name, myri10ge_rss_hash);
3843                 myri10ge_rss_hash = MXGEFW_RSS_HASH_TYPE_SRC_PORT;
3844         }
3845
3846         return pci_register_driver(&myri10ge_driver);
3847 }
3848
3849 module_init(myri10ge_init_module);
3850
3851 static __exit void myri10ge_cleanup_module(void)
3852 {
3853         pci_unregister_driver(&myri10ge_driver);
3854 }
3855
3856 module_exit(myri10ge_cleanup_module);