drivers/net/ixgbe/ixgbe_ethtool.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2011 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 /* ethtool support for ixgbe */
  29
  30 #include <linux/types.h>
  31 #include <linux/module.h>
  32 #include <linux/slab.h>
  33 #include <linux/pci.h>
  34 #include <linux/netdevice.h>
  35 #include <linux/ethtool.h>
  36 #include <linux/vmalloc.h>
  37 #include <linux/uaccess.h>
  38
  39 #include "ixgbe.h"
  40
  41
  42 #define IXGBE_ALL_RAR_ENTRIES 16
  43
  44 enum {NETDEV_STATS, IXGBE_STATS};
  45
  46 struct ixgbe_stats {
  47         char stat_string[ETH_GSTRING_LEN];
  48         int type;
  49         int sizeof_stat;
  50         int stat_offset;
  51 };
  52
  53 #define IXGBE_STAT(m)           IXGBE_STATS, \
  54                                 sizeof(((struct ixgbe_adapter *)0)->m), \
  55                                 offsetof(struct ixgbe_adapter, m)
  56 #define IXGBE_NETDEV_STAT(m)    NETDEV_STATS, \
  57                                 sizeof(((struct rtnl_link_stats64 *)0)->m), \
  58                                 offsetof(struct rtnl_link_stats64, m)
  59
  60 static struct ixgbe_stats ixgbe_gstrings_stats[] = {
  61         {"rx_packets", IXGBE_NETDEV_STAT(rx_packets)},
  62         {"tx_packets", IXGBE_NETDEV_STAT(tx_packets)},
  63         {"rx_bytes", IXGBE_NETDEV_STAT(rx_bytes)},
  64         {"tx_bytes", IXGBE_NETDEV_STAT(tx_bytes)},
  65         {"rx_pkts_nic", IXGBE_STAT(stats.gprc)},
  66         {"tx_pkts_nic", IXGBE_STAT(stats.gptc)},
  67         {"rx_bytes_nic", IXGBE_STAT(stats.gorc)},
  68         {"tx_bytes_nic", IXGBE_STAT(stats.gotc)},
  69         {"lsc_int", IXGBE_STAT(lsc_int)},
  70         {"tx_busy", IXGBE_STAT(tx_busy)},
  71         {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
  72         {"rx_errors", IXGBE_NETDEV_STAT(rx_errors)},
  73         {"tx_errors", IXGBE_NETDEV_STAT(tx_errors)},
  74         {"rx_dropped", IXGBE_NETDEV_STAT(rx_dropped)},
  75         {"tx_dropped", IXGBE_NETDEV_STAT(tx_dropped)},
  76         {"multicast", IXGBE_NETDEV_STAT(multicast)},
  77         {"broadcast", IXGBE_STAT(stats.bprc)},
  78         {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
  79         {"collisions", IXGBE_NETDEV_STAT(collisions)},
  80         {"rx_over_errors", IXGBE_NETDEV_STAT(rx_over_errors)},
  81         {"rx_crc_errors", IXGBE_NETDEV_STAT(rx_crc_errors)},
  82         {"rx_frame_errors", IXGBE_NETDEV_STAT(rx_frame_errors)},
  83         {"hw_rsc_aggregated", IXGBE_STAT(rsc_total_count)},
  84         {"hw_rsc_flushed", IXGBE_STAT(rsc_total_flush)},
  85         {"fdir_match", IXGBE_STAT(stats.fdirmatch)},
  86         {"fdir_miss", IXGBE_STAT(stats.fdirmiss)},
  87         {"rx_fifo_errors", IXGBE_NETDEV_STAT(rx_fifo_errors)},
  88         {"rx_missed_errors", IXGBE_NETDEV_STAT(rx_missed_errors)},
  89         {"tx_aborted_errors", IXGBE_NETDEV_STAT(tx_aborted_errors)},
  90         {"tx_carrier_errors", IXGBE_NETDEV_STAT(tx_carrier_errors)},
  91         {"tx_fifo_errors", IXGBE_NETDEV_STAT(tx_fifo_errors)},
  92         {"tx_heartbeat_errors", IXGBE_NETDEV_STAT(tx_heartbeat_errors)},
  93         {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
  94         {"tx_restart_queue", IXGBE_STAT(restart_queue)},
  95         {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
  96         {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
  97         {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
  98         {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
  99         {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
 100         {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
 101         {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
 102         {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
 103         {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
 104         {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)},
 105 #ifdef IXGBE_FCOE
 106         {"fcoe_bad_fccrc", IXGBE_STAT(stats.fccrc)},
 107         {"rx_fcoe_dropped", IXGBE_STAT(stats.fcoerpdc)},
 108         {"rx_fcoe_packets", IXGBE_STAT(stats.fcoeprc)},
 109         {"rx_fcoe_dwords", IXGBE_STAT(stats.fcoedwrc)},
 110         {"tx_fcoe_packets", IXGBE_STAT(stats.fcoeptc)},
 111         {"tx_fcoe_dwords", IXGBE_STAT(stats.fcoedwtc)},
 112 #endif /* IXGBE_FCOE */
 113 };
 114
 115 #define IXGBE_QUEUE_STATS_LEN \
 116         ((((struct ixgbe_adapter *)netdev_priv(netdev))->num_tx_queues + \
 117         ((struct ixgbe_adapter *)netdev_priv(netdev))->num_rx_queues) * \
 118         (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
 119 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
 120 #define IXGBE_PB_STATS_LEN ( \
 121                  (((struct ixgbe_adapter *)netdev_priv(netdev))->flags & \
 122                  IXGBE_FLAG_DCB_ENABLED) ? \
 123                  (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
 124                   sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
 125                   sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
 126                   sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
 127                   / sizeof(u64) : 0)
 128 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
 129                          IXGBE_PB_STATS_LEN + \
 130                          IXGBE_QUEUE_STATS_LEN)
 131
 132 static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = {
 133         "Register test  (offline)", "Eeprom test    (offline)",
 134         "Interrupt test (offline)", "Loopback test  (offline)",
 135         "Link test   (on/offline)"
 136 };
 137 #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN
 138
 139 static int ixgbe_get_settings(struct net_device *netdev,
 140                               struct ethtool_cmd *ecmd)
 141 {
 142         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 143         struct ixgbe_hw *hw = &adapter->hw;
 144         u32 link_speed = 0;
 145         bool link_up;
 146
 147         ecmd->supported = SUPPORTED_10000baseT_Full;
 148         ecmd->autoneg = AUTONEG_ENABLE;
 149         ecmd->transceiver = XCVR_EXTERNAL;
 150         if ((hw->phy.media_type == ixgbe_media_type_copper) ||
 151             (hw->phy.multispeed_fiber)) {
 152                 ecmd->supported |= (SUPPORTED_1000baseT_Full |
 153                                     SUPPORTED_Autoneg);
 154
 155                 switch (hw->mac.type) {
 156                 case ixgbe_mac_X540:
 157                         ecmd->supported |= SUPPORTED_100baseT_Full;
 158                         break;
 159                 default:
 160                         break;
 161                 }
 162
 163                 ecmd->advertising = ADVERTISED_Autoneg;
 164                 if (hw->phy.autoneg_advertised) {
 165                         if (hw->phy.autoneg_advertised &
 166                             IXGBE_LINK_SPEED_100_FULL)
 167                                 ecmd->advertising |= ADVERTISED_100baseT_Full;
 168                         if (hw->phy.autoneg_advertised &
 169                             IXGBE_LINK_SPEED_10GB_FULL)
 170                                 ecmd->advertising |= ADVERTISED_10000baseT_Full;
 171                         if (hw->phy.autoneg_advertised &
 172                             IXGBE_LINK_SPEED_1GB_FULL)
 173                                 ecmd->advertising |= ADVERTISED_1000baseT_Full;
 174                 } else {
 175                         /*
 176                          * Default advertised modes in case
 177                          * phy.autoneg_advertised isn't set.
 178                          */
 179                         ecmd->advertising |= (ADVERTISED_10000baseT_Full |
 180                                               ADVERTISED_1000baseT_Full);
 181                         if (hw->mac.type == ixgbe_mac_X540)
 182                                 ecmd->advertising |= ADVERTISED_100baseT_Full;
 183                 }
 184
 185                 if (hw->phy.media_type == ixgbe_media_type_copper) {
 186                         ecmd->supported |= SUPPORTED_TP;
 187                         ecmd->advertising |= ADVERTISED_TP;
 188                         ecmd->port = PORT_TP;
 189                 } else {
 190                         ecmd->supported |= SUPPORTED_FIBRE;
 191                         ecmd->advertising |= ADVERTISED_FIBRE;
 192                         ecmd->port = PORT_FIBRE;
 193                 }
 194         } else if (hw->phy.media_type == ixgbe_media_type_backplane) {
 195                 /* Set as FIBRE until SERDES defined in kernel */
 196                 if (hw->device_id == IXGBE_DEV_ID_82598_BX) {
 197                         ecmd->supported = (SUPPORTED_1000baseT_Full |
 198                                            SUPPORTED_FIBRE);
 199                         ecmd->advertising = (ADVERTISED_1000baseT_Full |
 200                                              ADVERTISED_FIBRE);
 201                         ecmd->port = PORT_FIBRE;
 202                         ecmd->autoneg = AUTONEG_DISABLE;
 203                 } else if ((hw->device_id == IXGBE_DEV_ID_82599_COMBO_BACKPLANE) ||
 204                            (hw->device_id == IXGBE_DEV_ID_82599_KX4_MEZZ)) {
 205                         ecmd->supported |= (SUPPORTED_1000baseT_Full |
 206                                             SUPPORTED_Autoneg |
 207                                             SUPPORTED_FIBRE);
 208                         ecmd->advertising = (ADVERTISED_10000baseT_Full |
 209                                              ADVERTISED_1000baseT_Full |
 210                                              ADVERTISED_Autoneg |
 211                                              ADVERTISED_FIBRE);
 212                         ecmd->port = PORT_FIBRE;
 213                 } else {
 214                         ecmd->supported |= (SUPPORTED_1000baseT_Full |
 215                                             SUPPORTED_FIBRE);
 216                         ecmd->advertising = (ADVERTISED_10000baseT_Full |
 217                                              ADVERTISED_1000baseT_Full |
 218                                              ADVERTISED_FIBRE);
 219                         ecmd->port = PORT_FIBRE;
 220                 }
 221         } else {
 222                 ecmd->supported |= SUPPORTED_FIBRE;
 223                 ecmd->advertising = (ADVERTISED_10000baseT_Full |
 224                                      ADVERTISED_FIBRE);
 225                 ecmd->port = PORT_FIBRE;
 226                 ecmd->autoneg = AUTONEG_DISABLE;
 227         }
 228
 229         /* Get PHY type */
 230         switch (adapter->hw.phy.type) {
 231         case ixgbe_phy_tn:
 232         case ixgbe_phy_aq:
 233         case ixgbe_phy_cu_unknown:
 234                 /* Copper 10G-BASET */
 235                 ecmd->port = PORT_TP;
 236                 break;
 237         case ixgbe_phy_qt:
 238                 ecmd->port = PORT_FIBRE;
 239                 break;
 240         case ixgbe_phy_nl:
 241         case ixgbe_phy_sfp_passive_tyco:
 242         case ixgbe_phy_sfp_passive_unknown:
 243         case ixgbe_phy_sfp_ftl:
 244         case ixgbe_phy_sfp_avago:
 245         case ixgbe_phy_sfp_intel:
 246         case ixgbe_phy_sfp_unknown:
 247                 switch (adapter->hw.phy.sfp_type) {
 248                 /* SFP+ devices, further checking needed */
 249                 case ixgbe_sfp_type_da_cu:
 250                 case ixgbe_sfp_type_da_cu_core0:
 251                 case ixgbe_sfp_type_da_cu_core1:
 252                         ecmd->port = PORT_DA;
 253                         break;
 254                 case ixgbe_sfp_type_sr:
 255                 case ixgbe_sfp_type_lr:
 256                 case ixgbe_sfp_type_srlr_core0:
 257                 case ixgbe_sfp_type_srlr_core1:
 258                         ecmd->port = PORT_FIBRE;
 259                         break;
 260                 case ixgbe_sfp_type_not_present:
 261                         ecmd->port = PORT_NONE;
 262                         break;
 263                 case ixgbe_sfp_type_1g_cu_core0:
 264                 case ixgbe_sfp_type_1g_cu_core1:
 265                         ecmd->port = PORT_TP;
 266                         ecmd->supported = SUPPORTED_TP;
 267                         ecmd->advertising = (ADVERTISED_1000baseT_Full |
 268                                              ADVERTISED_TP);
 269                         break;
 270                 case ixgbe_sfp_type_unknown:
 271                 default:
 272                         ecmd->port = PORT_OTHER;
 273                         break;
 274                 }
 275                 break;
 276         case ixgbe_phy_xaui:
 277                 ecmd->port = PORT_NONE;
 278                 break;
 279         case ixgbe_phy_unknown:
 280         case ixgbe_phy_generic:
 281         case ixgbe_phy_sfp_unsupported:
 282         default:
 283                 ecmd->port = PORT_OTHER;
 284                 break;
 285         }
 286
 287         hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
 288         if (link_up) {
 289                 switch (link_speed) {
 290                 case IXGBE_LINK_SPEED_10GB_FULL:
 291                         ecmd->speed = SPEED_10000;
 292                         break;
 293                 case IXGBE_LINK_SPEED_1GB_FULL:
 294                         ecmd->speed = SPEED_1000;
 295                         break;
 296                 case IXGBE_LINK_SPEED_100_FULL:
 297                         ecmd->speed = SPEED_100;
 298                         break;
 299                 default:
 300                         break;
 301                 }
 302                 ecmd->duplex = DUPLEX_FULL;
 303         } else {
 304                 ecmd->speed = -1;
 305                 ecmd->duplex = -1;
 306         }
 307
 308         return 0;
 309 }
 310
 311 static int ixgbe_set_settings(struct net_device *netdev,
 312                               struct ethtool_cmd *ecmd)
 313 {
 314         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 315         struct ixgbe_hw *hw = &adapter->hw;
 316         u32 advertised, old;
 317         s32 err = 0;
 318
 319         if ((hw->phy.media_type == ixgbe_media_type_copper) ||
 320             (hw->phy.multispeed_fiber)) {
 321                 /* 10000/copper and 1000/copper must autoneg
 322                  * this function does not support any duplex forcing, but can
 323                  * limit the advertising of the adapter to only 10000 or 1000 */
 324                 if (ecmd->autoneg == AUTONEG_DISABLE)
 325                         return -EINVAL;
 326
 327                 old = hw->phy.autoneg_advertised;
 328                 advertised = 0;
 329                 if (ecmd->advertising & ADVERTISED_10000baseT_Full)
 330                         advertised |= IXGBE_LINK_SPEED_10GB_FULL;
 331
 332                 if (ecmd->advertising & ADVERTISED_1000baseT_Full)
 333                         advertised |= IXGBE_LINK_SPEED_1GB_FULL;
 334
 335                 if (ecmd->advertising & ADVERTISED_100baseT_Full)
 336                         advertised |= IXGBE_LINK_SPEED_100_FULL;
 337
 338                 if (old == advertised)
 339                         return err;
 340                 /* this sets the link speed and restarts auto-neg */
 341                 hw->mac.autotry_restart = true;
 342                 err = hw->mac.ops.setup_link(hw, advertised, true, true);
 343                 if (err) {
 344                         e_info(probe, "setup link failed with code %d\n", err);
 345                         hw->mac.ops.setup_link(hw, old, true, true);
 346                 }
 347         } else {
 348                 /* in this case we currently only support 10Gb/FULL */
 349                 if ((ecmd->autoneg == AUTONEG_ENABLE) ||
 350                     (ecmd->advertising != ADVERTISED_10000baseT_Full) ||
 351                     (ecmd->speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL))
 352                         return -EINVAL;
 353         }
 354
 355         return err;
 356 }
 357
 358 static void ixgbe_get_pauseparam(struct net_device *netdev,
 359                                  struct ethtool_pauseparam *pause)
 360 {
 361         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 362         struct ixgbe_hw *hw = &adapter->hw;
 363
 364         /*
 365          * Flow Control Autoneg isn't on if
 366          *  - we didn't ask for it OR
 367          *  - it failed, we know this by tx & rx being off
 368          */
 369         if (hw->fc.disable_fc_autoneg ||
 370             (hw->fc.current_mode == ixgbe_fc_none))
 371                 pause->autoneg = 0;
 372         else
 373                 pause->autoneg = 1;
 374
 375         if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
 376                 pause->rx_pause = 1;
 377         } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) {
 378                 pause->tx_pause = 1;
 379         } else if (hw->fc.current_mode == ixgbe_fc_full) {
 380                 pause->rx_pause = 1;
 381                 pause->tx_pause = 1;
 382 #ifdef CONFIG_DCB
 383         } else if (hw->fc.current_mode == ixgbe_fc_pfc) {
 384                 pause->rx_pause = 0;
 385                 pause->tx_pause = 0;
 386 #endif
 387         }
 388 }
 389
 390 static int ixgbe_set_pauseparam(struct net_device *netdev,
 391                                 struct ethtool_pauseparam *pause)
 392 {
 393         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 394         struct ixgbe_hw *hw = &adapter->hw;
 395         struct ixgbe_fc_info fc;
 396
 397 #ifdef CONFIG_DCB
 398         if (adapter->dcb_cfg.pfc_mode_enable ||
 399                 ((hw->mac.type == ixgbe_mac_82598EB) &&
 400                 (adapter->flags & IXGBE_FLAG_DCB_ENABLED)))
 401                 return -EINVAL;
 402
 403 #endif
 404         fc = hw->fc;
 405
 406         if (pause->autoneg != AUTONEG_ENABLE)
 407                 fc.disable_fc_autoneg = true;
 408         else
 409                 fc.disable_fc_autoneg = false;
 410
 411         if ((pause->rx_pause && pause->tx_pause) || pause->autoneg)
 412                 fc.requested_mode = ixgbe_fc_full;
 413         else if (pause->rx_pause && !pause->tx_pause)
 414                 fc.requested_mode = ixgbe_fc_rx_pause;
 415         else if (!pause->rx_pause && pause->tx_pause)
 416                 fc.requested_mode = ixgbe_fc_tx_pause;
 417         else if (!pause->rx_pause && !pause->tx_pause)
 418                 fc.requested_mode = ixgbe_fc_none;
 419         else
 420                 return -EINVAL;
 421
 422 #ifdef CONFIG_DCB
 423         adapter->last_lfc_mode = fc.requested_mode;
 424 #endif
 425
 426         /* if the thing changed then we'll update and use new autoneg */
 427         if (memcmp(&fc, &hw->fc, sizeof(struct ixgbe_fc_info))) {
 428                 hw->fc = fc;
 429                 if (netif_running(netdev))
 430                         ixgbe_reinit_locked(adapter);
 431                 else
 432                         ixgbe_reset(adapter);
 433         }
 434
 435         return 0;
 436 }
 437
 438 static u32 ixgbe_get_rx_csum(struct net_device *netdev)
 439 {
 440         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 441         return adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED;
 442 }
 443
 444 static int ixgbe_set_rx_csum(struct net_device *netdev, u32 data)
 445 {
 446         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 447         if (data)
 448                 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
 449         else
 450                 adapter->flags &= ~IXGBE_FLAG_RX_CSUM_ENABLED;
 451
 452         return 0;
 453 }
 454
 455 static u32 ixgbe_get_tx_csum(struct net_device *netdev)
 456 {
 457         return (netdev->features & NETIF_F_IP_CSUM) != 0;
 458 }
 459
 460 static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data)
 461 {
 462         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 463         u32 feature_list;
 464
 465         feature_list = (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
 466         switch (adapter->hw.mac.type) {
 467         case ixgbe_mac_82599EB:
 468         case ixgbe_mac_X540:
 469                 feature_list |= NETIF_F_SCTP_CSUM;
 470                 break;
 471         default:
 472                 break;
 473         }
 474         if (data)
 475                 netdev->features |= feature_list;
 476         else
 477                 netdev->features &= ~feature_list;
 478
 479         return 0;
 480 }
 481
 482 static int ixgbe_set_tso(struct net_device *netdev, u32 data)
 483 {
 484         if (data) {
 485                 netdev->features |= NETIF_F_TSO;
 486                 netdev->features |= NETIF_F_TSO6;
 487         } else {
 488                 netdev->features &= ~NETIF_F_TSO;
 489                 netdev->features &= ~NETIF_F_TSO6;
 490         }
 491         return 0;
 492 }
 493
 494 static u32 ixgbe_get_msglevel(struct net_device *netdev)
 495 {
 496         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 497         return adapter->msg_enable;
 498 }
 499
 500 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
 501 {
 502         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 503         adapter->msg_enable = data;
 504 }
 505
 506 static int ixgbe_get_regs_len(struct net_device *netdev)
 507 {
 508 #define IXGBE_REGS_LEN  1128
 509         return IXGBE_REGS_LEN * sizeof(u32);
 510 }
 511
 512 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
 513
 514 static void ixgbe_get_regs(struct net_device *netdev,
 515                            struct ethtool_regs *regs, void *p)
 516 {
 517         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 518         struct ixgbe_hw *hw = &adapter->hw;
 519         u32 *regs_buff = p;
 520         u8 i;
 521
 522         memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
 523
 524         regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
 525
 526         /* General Registers */
 527         regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
 528         regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
 529         regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
 530         regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
 531         regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
 532         regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
 533         regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
 534         regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
 535
 536         /* NVM Register */
 537         regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
 538         regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
 539         regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
 540         regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
 541         regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
 542         regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
 543         regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
 544         regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
 545         regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
 546         regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
 547
 548         /* Interrupt */
 549         /* don't read EICR because it can clear interrupt causes, instead
 550          * read EICS which is a shadow but doesn't clear EICR */
 551         regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
 552         regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
 553         regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
 554         regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
 555         regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
 556         regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
 557         regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
 558         regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
 559         regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
 560         regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
 561         regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
 562         regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
 563
 564         /* Flow Control */
 565         regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
 566         regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
 567         regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
 568         regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
 569         regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
 570         for (i = 0; i < 8; i++) {
 571                 switch (hw->mac.type) {
 572                 case ixgbe_mac_82598EB:
 573                         regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
 574                         regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
 575                         break;
 576                 case ixgbe_mac_82599EB:
 577                         regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL_82599(i));
 578                         regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH_82599(i));
 579                         break;
 580                 default:
 581                         break;
 582                 }
 583         }
 584         regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
 585         regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
 586
 587         /* Receive DMA */
 588         for (i = 0; i < 64; i++)
 589                 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 590         for (i = 0; i < 64; i++)
 591                 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 592         for (i = 0; i < 64; i++)
 593                 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 594         for (i = 0; i < 64; i++)
 595                 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 596         for (i = 0; i < 64; i++)
 597                 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 598         for (i = 0; i < 64; i++)
 599                 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 600         for (i = 0; i < 16; i++)
 601                 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 602         for (i = 0; i < 16; i++)
 603                 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 604         regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
 605         for (i = 0; i < 8; i++)
 606                 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
 607         regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
 608         regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
 609
 610         /* Receive */
 611         regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
 612         regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
 613         for (i = 0; i < 16; i++)
 614                 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
 615         for (i = 0; i < 16; i++)
 616                 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
 617         regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
 618         regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
 619         regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
 620         regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
 621         regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
 622         regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
 623         for (i = 0; i < 8; i++)
 624                 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
 625         for (i = 0; i < 8; i++)
 626                 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
 627         regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
 628
 629         /* Transmit */
 630         for (i = 0; i < 32; i++)
 631                 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 632         for (i = 0; i < 32; i++)
 633                 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 634         for (i = 0; i < 32; i++)
 635                 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 636         for (i = 0; i < 32; i++)
 637                 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 638         for (i = 0; i < 32; i++)
 639                 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 640         for (i = 0; i < 32; i++)
 641                 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 642         for (i = 0; i < 32; i++)
 643                 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
 644         for (i = 0; i < 32; i++)
 645                 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
 646         regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
 647         for (i = 0; i < 16; i++)
 648                 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
 649         regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
 650         for (i = 0; i < 8; i++)
 651                 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
 652         regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
 653
 654         /* Wake Up */
 655         regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
 656         regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
 657         regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
 658         regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
 659         regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
 660         regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
 661         regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
 662         regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
 663         regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0));
 664
 665         /* DCB */
 666         regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
 667         regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
 668         regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
 669         regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
 670         for (i = 0; i < 8; i++)
 671                 regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
 672         for (i = 0; i < 8; i++)
 673                 regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
 674         for (i = 0; i < 8; i++)
 675                 regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
 676         for (i = 0; i < 8; i++)
 677                 regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
 678         for (i = 0; i < 8; i++)
 679                 regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i));
 680         for (i = 0; i < 8; i++)
 681                 regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i));
 682
 683         /* Statistics */
 684         regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
 685         regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
 686         regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
 687         regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
 688         for (i = 0; i < 8; i++)
 689                 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
 690         regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
 691         regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
 692         regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
 693         regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
 694         regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
 695         regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
 696         regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
 697         for (i = 0; i < 8; i++)
 698                 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
 699         for (i = 0; i < 8; i++)
 700                 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
 701         for (i = 0; i < 8; i++)
 702                 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
 703         for (i = 0; i < 8; i++)
 704                 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
 705         regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
 706         regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
 707         regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
 708         regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
 709         regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
 710         regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
 711         regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
 712         regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
 713         regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
 714         regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
 715         regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
 716         regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
 717         for (i = 0; i < 8; i++)
 718                 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
 719         regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
 720         regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
 721         regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
 722         regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
 723         regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
 724         regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
 725         regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
 726         regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
 727         regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
 728         regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
 729         regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
 730         regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
 731         regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
 732         regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
 733         regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
 734         regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
 735         regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
 736         regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
 737         regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
 738         for (i = 0; i < 16; i++)
 739                 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
 740         for (i = 0; i < 16; i++)
 741                 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
 742         for (i = 0; i < 16; i++)
 743                 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
 744         for (i = 0; i < 16; i++)
 745                 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
 746
 747         /* MAC */
 748         regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
 749         regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
 750         regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
 751         regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
 752         regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
 753         regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
 754         regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
 755         regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
 756         regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
 757         regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
 758         regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
 759         regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
 760         regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
 761         regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
 762         regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
 763         regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
 764         regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
 765         regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
 766         regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
 767         regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
 768         regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
 769         regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
 770         regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
 771         regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
 772         regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
 773         regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
 774         regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
 775         regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
 776         regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
 777         regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
 778         regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
 779         regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
 780         regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
 781
 782         /* Diagnostic */
 783         regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
 784         for (i = 0; i < 8; i++)
 785                 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
 786         regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
 787         for (i = 0; i < 4; i++)
 788                 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
 789         regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
 790         regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
 791         for (i = 0; i < 8; i++)
 792                 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
 793         regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
 794         for (i = 0; i < 4; i++)
 795                 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
 796         regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
 797         regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
 798         regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
 799         regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
 800         regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
 801         regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
 802         regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
 803         regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
 804         regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
 805         regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
 806         regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
 807         for (i = 0; i < 8; i++)
 808                 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
 809         regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
 810         regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
 811         regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
 812         regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
 813         regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
 814         regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
 815         regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
 816         regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
 817         regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
 818 }
 819
 820 static int ixgbe_get_eeprom_len(struct net_device *netdev)
 821 {
 822         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 823         return adapter->hw.eeprom.word_size * 2;
 824 }
 825
 826 static int ixgbe_get_eeprom(struct net_device *netdev,
 827                             struct ethtool_eeprom *eeprom, u8 *bytes)
 828 {
 829         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 830         struct ixgbe_hw *hw = &adapter->hw;
 831         u16 *eeprom_buff;
 832         int first_word, last_word, eeprom_len;
 833         int ret_val = 0;
 834         u16 i;
 835
 836         if (eeprom->len == 0)
 837                 return -EINVAL;
 838
 839         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 840
 841         first_word = eeprom->offset >> 1;
 842         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 843         eeprom_len = last_word - first_word + 1;
 844
 845         eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
 846         if (!eeprom_buff)
 847                 return -ENOMEM;
 848
 849         for (i = 0; i < eeprom_len; i++) {
 850                 if ((ret_val = hw->eeprom.ops.read(hw, first_word + i,
 851                     &eeprom_buff[i])))
 852                         break;
 853         }
 854
 855         /* Device's eeprom is always little-endian, word addressable */
 856         for (i = 0; i < eeprom_len; i++)
 857                 le16_to_cpus(&eeprom_buff[i]);
 858
 859         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
 860         kfree(eeprom_buff);
 861
 862         return ret_val;
 863 }
 864
 865 static void ixgbe_get_drvinfo(struct net_device *netdev,
 866                               struct ethtool_drvinfo *drvinfo)
 867 {
 868         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 869         char firmware_version[32];
 870
 871         strncpy(drvinfo->driver, ixgbe_driver_name,
 872                 sizeof(drvinfo->driver) - 1);
 873         strncpy(drvinfo->version, ixgbe_driver_version,
 874                 sizeof(drvinfo->version) - 1);
 875
 876         snprintf(firmware_version, sizeof(firmware_version), "%d.%d-%d",
 877                  (adapter->eeprom_version & 0xF000) >> 12,
 878                  (adapter->eeprom_version & 0x0FF0) >> 4,
 879                  adapter->eeprom_version & 0x000F);
 880
 881         strncpy(drvinfo->fw_version, firmware_version,
 882                 sizeof(drvinfo->fw_version));
 883         strncpy(drvinfo->bus_info, pci_name(adapter->pdev),
 884                 sizeof(drvinfo->bus_info));
 885         drvinfo->n_stats = IXGBE_STATS_LEN;
 886         drvinfo->testinfo_len = IXGBE_TEST_LEN;
 887         drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
 888 }
 889
 890 static void ixgbe_get_ringparam(struct net_device *netdev,
 891                                 struct ethtool_ringparam *ring)
 892 {
 893         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 894         struct ixgbe_ring *tx_ring = adapter->tx_ring[0];
 895         struct ixgbe_ring *rx_ring = adapter->rx_ring[0];
 896
 897         ring->rx_max_pending = IXGBE_MAX_RXD;
 898         ring->tx_max_pending = IXGBE_MAX_TXD;
 899         ring->rx_mini_max_pending = 0;
 900         ring->rx_jumbo_max_pending = 0;
 901         ring->rx_pending = rx_ring->count;
 902         ring->tx_pending = tx_ring->count;
 903         ring->rx_mini_pending = 0;
 904         ring->rx_jumbo_pending = 0;
 905 }
 906
 907 static int ixgbe_set_ringparam(struct net_device *netdev,
 908                                struct ethtool_ringparam *ring)
 909 {
 910         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 911         struct ixgbe_ring *temp_tx_ring, *temp_rx_ring;
 912         int i, err = 0;
 913         u32 new_rx_count, new_tx_count;
 914         bool need_update = false;
 915
 916         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 917                 return -EINVAL;
 918
 919         new_rx_count = max(ring->rx_pending, (u32)IXGBE_MIN_RXD);
 920         new_rx_count = min(new_rx_count, (u32)IXGBE_MAX_RXD);
 921         new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
 922
 923         new_tx_count = max(ring->tx_pending, (u32)IXGBE_MIN_TXD);
 924         new_tx_count = min(new_tx_count, (u32)IXGBE_MAX_TXD);
 925         new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
 926
 927         if ((new_tx_count == adapter->tx_ring[0]->count) &&
 928             (new_rx_count == adapter->rx_ring[0]->count)) {
 929                 /* nothing to do */
 930                 return 0;
 931         }
 932
 933         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
 934                 msleep(1);
 935
 936         if (!netif_running(adapter->netdev)) {
 937                 for (i = 0; i < adapter->num_tx_queues; i++)
 938                         adapter->tx_ring[i]->count = new_tx_count;
 939                 for (i = 0; i < adapter->num_rx_queues; i++)
 940                         adapter->rx_ring[i]->count = new_rx_count;
 941                 adapter->tx_ring_count = new_tx_count;
 942                 adapter->rx_ring_count = new_rx_count;
 943                 goto clear_reset;
 944         }
 945
 946         temp_tx_ring = vmalloc(adapter->num_tx_queues * sizeof(struct ixgbe_ring));
 947         if (!temp_tx_ring) {
 948                 err = -ENOMEM;
 949                 goto clear_reset;
 950         }
 951
 952         if (new_tx_count != adapter->tx_ring_count) {
 953                 for (i = 0; i < adapter->num_tx_queues; i++) {
 954                         memcpy(&temp_tx_ring[i], adapter->tx_ring[i],
 955                                sizeof(struct ixgbe_ring));
 956                         temp_tx_ring[i].count = new_tx_count;
 957                         err = ixgbe_setup_tx_resources(&temp_tx_ring[i]);
 958                         if (err) {
 959                                 while (i) {
 960                                         i--;
 961                                         ixgbe_free_tx_resources(&temp_tx_ring[i]);
 962                                 }
 963                                 goto clear_reset;
 964                         }
 965                 }
 966                 need_update = true;
 967         }
 968
 969         temp_rx_ring = vmalloc(adapter->num_rx_queues * sizeof(struct ixgbe_ring));
 970         if (!temp_rx_ring) {
 971                 err = -ENOMEM;
 972                 goto err_setup;
 973         }
 974
 975         if (new_rx_count != adapter->rx_ring_count) {
 976                 for (i = 0; i < adapter->num_rx_queues; i++) {
 977                         memcpy(&temp_rx_ring[i], adapter->rx_ring[i],
 978                                sizeof(struct ixgbe_ring));
 979                         temp_rx_ring[i].count = new_rx_count;
 980                         err = ixgbe_setup_rx_resources(&temp_rx_ring[i]);
 981                         if (err) {
 982                                 while (i) {
 983                                         i--;
 984                                         ixgbe_free_rx_resources(&temp_rx_ring[i]);
 985                                 }
 986                                 goto err_setup;
 987                         }
 988                 }
 989                 need_update = true;
 990         }
 991
 992         /* if rings need to be updated, here's the place to do it in one shot */
 993         if (need_update) {
 994                 ixgbe_down(adapter);
 995
 996                 /* tx */
 997                 if (new_tx_count != adapter->tx_ring_count) {
 998                         for (i = 0; i < adapter->num_tx_queues; i++) {
 999                                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
1000                                 memcpy(adapter->tx_ring[i], &temp_tx_ring[i],
1001                                        sizeof(struct ixgbe_ring));
1002                         }
1003                         adapter->tx_ring_count = new_tx_count;
1004                 }
1005
1006                 /* rx */
1007                 if (new_rx_count != adapter->rx_ring_count) {
1008                         for (i = 0; i < adapter->num_rx_queues; i++) {
1009                                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
1010                                 memcpy(adapter->rx_ring[i], &temp_rx_ring[i],
1011                                        sizeof(struct ixgbe_ring));
1012                         }
1013                         adapter->rx_ring_count = new_rx_count;
1014                 }
1015                 ixgbe_up(adapter);
1016         }
1017
1018         vfree(temp_rx_ring);
1019 err_setup:
1020         vfree(temp_tx_ring);
1021 clear_reset:
1022         clear_bit(__IXGBE_RESETTING, &adapter->state);
1023         return err;
1024 }
1025
1026 static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
1027 {
1028         switch (sset) {
1029         case ETH_SS_TEST:
1030                 return IXGBE_TEST_LEN;
1031         case ETH_SS_STATS:
1032                 return IXGBE_STATS_LEN;
1033         case ETH_SS_NTUPLE_FILTERS:
1034                 return ETHTOOL_MAX_NTUPLE_LIST_ENTRY *
1035                        ETHTOOL_MAX_NTUPLE_STRING_PER_ENTRY;
1036         default:
1037                 return -EOPNOTSUPP;
1038         }
1039 }
1040
1041 static void ixgbe_get_ethtool_stats(struct net_device *netdev,
1042                                     struct ethtool_stats *stats, u64 *data)
1043 {
1044         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1045         struct rtnl_link_stats64 temp;
1046         const struct rtnl_link_stats64 *net_stats;
1047         unsigned int start;
1048         struct ixgbe_ring *ring;
1049         int i, j;
1050         char *p = NULL;
1051
1052         ixgbe_update_stats(adapter);
1053         net_stats = dev_get_stats(netdev, &temp);
1054         for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1055                 switch (ixgbe_gstrings_stats[i].type) {
1056                 case NETDEV_STATS:
1057                         p = (char *) net_stats +
1058                                         ixgbe_gstrings_stats[i].stat_offset;
1059                         break;
1060                 case IXGBE_STATS:
1061                         p = (char *) adapter +
1062                                         ixgbe_gstrings_stats[i].stat_offset;
1063                         break;
1064                 }
1065
1066                 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
1067                            sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1068         }
1069         for (j = 0; j < adapter->num_tx_queues; j++) {
1070                 ring = adapter->tx_ring[j];
1071                 do {
1072                         start = u64_stats_fetch_begin_bh(&ring->syncp);
1073                         data[i]   = ring->stats.packets;
1074                         data[i+1] = ring->stats.bytes;
1075                 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1076                 i += 2;
1077         }
1078         for (j = 0; j < adapter->num_rx_queues; j++) {
1079                 ring = adapter->rx_ring[j];
1080                 do {
1081                         start = u64_stats_fetch_begin_bh(&ring->syncp);
1082                         data[i]   = ring->stats.packets;
1083                         data[i+1] = ring->stats.bytes;
1084                 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1085                 i += 2;
1086         }
1087         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1088                 for (j = 0; j < MAX_TX_PACKET_BUFFERS; j++) {
1089                         data[i++] = adapter->stats.pxontxc[j];
1090                         data[i++] = adapter->stats.pxofftxc[j];
1091                 }
1092                 for (j = 0; j < MAX_RX_PACKET_BUFFERS; j++) {
1093                         data[i++] = adapter->stats.pxonrxc[j];
1094                         data[i++] = adapter->stats.pxoffrxc[j];
1095                 }
1096         }
1097 }
1098
1099 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
1100                               u8 *data)
1101 {
1102         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1103         char *p = (char *)data;
1104         int i;
1105
1106         switch (stringset) {
1107         case ETH_SS_TEST:
1108                 memcpy(data, *ixgbe_gstrings_test,
1109                        IXGBE_TEST_LEN * ETH_GSTRING_LEN);
1110                 break;
1111         case ETH_SS_STATS:
1112                 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1113                         memcpy(p, ixgbe_gstrings_stats[i].stat_string,
1114                                ETH_GSTRING_LEN);
1115                         p += ETH_GSTRING_LEN;
1116                 }
1117                 for (i = 0; i < adapter->num_tx_queues; i++) {
1118                         sprintf(p, "tx_queue_%u_packets", i);
1119                         p += ETH_GSTRING_LEN;
1120                         sprintf(p, "tx_queue_%u_bytes", i);
1121                         p += ETH_GSTRING_LEN;
1122                 }
1123                 for (i = 0; i < adapter->num_rx_queues; i++) {
1124                         sprintf(p, "rx_queue_%u_packets", i);
1125                         p += ETH_GSTRING_LEN;
1126                         sprintf(p, "rx_queue_%u_bytes", i);
1127                         p += ETH_GSTRING_LEN;
1128                 }
1129                 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1130                         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1131                                 sprintf(p, "tx_pb_%u_pxon", i);
1132                                 p += ETH_GSTRING_LEN;
1133                                 sprintf(p, "tx_pb_%u_pxoff", i);
1134                                 p += ETH_GSTRING_LEN;
1135                         }
1136                         for (i = 0; i < MAX_RX_PACKET_BUFFERS; i++) {
1137                                 sprintf(p, "rx_pb_%u_pxon", i);
1138                                 p += ETH_GSTRING_LEN;
1139                                 sprintf(p, "rx_pb_%u_pxoff", i);
1140                                 p += ETH_GSTRING_LEN;
1141                         }
1142                 }
1143                 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
1144                 break;
1145         }
1146 }
1147
1148 static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data)
1149 {
1150         struct ixgbe_hw *hw = &adapter->hw;
1151         bool link_up;
1152         u32 link_speed = 0;
1153         *data = 0;
1154
1155         hw->mac.ops.check_link(hw, &link_speed, &link_up, true);
1156         if (link_up)
1157                 return *data;
1158         else
1159                 *data = 1;
1160         return *data;
1161 }
1162
1163 /* ethtool register test data */
1164 struct ixgbe_reg_test {
1165         u16 reg;
1166         u8  array_len;
1167         u8  test_type;
1168         u32 mask;
1169         u32 write;
1170 };
1171
1172 /* In the hardware, registers are laid out either singly, in arrays
1173  * spaced 0x40 bytes apart, or in contiguous tables.  We assume
1174  * most tests take place on arrays or single registers (handled
1175  * as a single-element array) and special-case the tables.
1176  * Table tests are always pattern tests.
1177  *
1178  * We also make provision for some required setup steps by specifying
1179  * registers to be written without any read-back testing.
1180  */
1181
1182 #define PATTERN_TEST    1
1183 #define SET_READ_TEST   2
1184 #define WRITE_NO_TEST   3
1185 #define TABLE32_TEST    4
1186 #define TABLE64_TEST_LO 5
1187 #define TABLE64_TEST_HI 6
1188
1189 /* default 82599 register test */
1190 static const struct ixgbe_reg_test reg_test_82599[] = {
1191         { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1192         { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1193         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1194         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1195         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 },
1196         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1197         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1198         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1199         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1200         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1201         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1202         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1203         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1204         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1205         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 },
1206         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 },
1207         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1208         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF },
1209         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1210         { 0, 0, 0, 0 }
1211 };
1212
1213 /* default 82598 register test */
1214 static const struct ixgbe_reg_test reg_test_82598[] = {
1215         { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1216         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1217         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1218         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1219         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1220         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1221         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1222         /* Enable all four RX queues before testing. */
1223         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1224         /* RDH is read-only for 82598, only test RDT. */
1225         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1226         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1227         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1228         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1229         { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF },
1230         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1231         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1232         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1233         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 },
1234         { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 },
1235         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1236         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF },
1237         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1238         { 0, 0, 0, 0 }
1239 };
1240
1241 static const u32 register_test_patterns[] = {
1242         0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF
1243 };
1244
1245 #define REG_PATTERN_TEST(R, M, W)                                             \
1246 {                                                                             \
1247         u32 pat, val, before;                                                 \
1248         for (pat = 0; pat < ARRAY_SIZE(register_test_patterns); pat++) {      \
1249                 before = readl(adapter->hw.hw_addr + R);                      \
1250                 writel((register_test_patterns[pat] & W),                     \
1251                        (adapter->hw.hw_addr + R));                            \
1252                 val = readl(adapter->hw.hw_addr + R);                         \
1253                 if (val != (register_test_patterns[pat] & W & M)) {           \
1254                         e_err(drv, "pattern test reg %04X failed: got "       \
1255                               "0x%08X expected 0x%08X\n",                     \
1256                               R, val, (register_test_patterns[pat] & W & M)); \
1257                         *data = R;                                            \
1258                         writel(before, adapter->hw.hw_addr + R);              \
1259                         return 1;                                             \
1260                 }                                                             \
1261                 writel(before, adapter->hw.hw_addr + R);                      \
1262         }                                                                     \
1263 }
1264
1265 #define REG_SET_AND_CHECK(R, M, W)                                            \
1266 {                                                                             \
1267         u32 val, before;                                                      \
1268         before = readl(adapter->hw.hw_addr + R);                              \
1269         writel((W & M), (adapter->hw.hw_addr + R));                           \
1270         val = readl(adapter->hw.hw_addr + R);                                 \
1271         if ((W & M) != (val & M)) {                                           \
1272                 e_err(drv, "set/check reg %04X test failed: got 0x%08X "  \
1273                       "expected 0x%08X\n", R, (val & M), (W & M));        \
1274                 *data = R;                                                    \
1275                 writel(before, (adapter->hw.hw_addr + R));                    \
1276                 return 1;                                                     \
1277         }                                                                     \
1278         writel(before, (adapter->hw.hw_addr + R));                            \
1279 }
1280
1281 static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
1282 {
1283         const struct ixgbe_reg_test *test;
1284         u32 value, before, after;
1285         u32 i, toggle;
1286
1287         switch (adapter->hw.mac.type) {
1288         case ixgbe_mac_82598EB:
1289                 toggle = 0x7FFFF3FF;
1290                 test = reg_test_82598;
1291                 break;
1292         case ixgbe_mac_82599EB:
1293         case ixgbe_mac_X540:
1294                 toggle = 0x7FFFF30F;
1295                 test = reg_test_82599;
1296                 break;
1297         default:
1298                 *data = 1;
1299                 return 1;
1300                 break;
1301         }
1302
1303         /*
1304          * Because the status register is such a special case,
1305          * we handle it separately from the rest of the register
1306          * tests.  Some bits are read-only, some toggle, and some
1307          * are writeable on newer MACs.
1308          */
1309         before = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS);
1310         value = (IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle);
1311         IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, toggle);
1312         after = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle;
1313         if (value != after) {
1314                 e_err(drv, "failed STATUS register test got: 0x%08X "
1315                       "expected: 0x%08X\n", after, value);
1316                 *data = 1;
1317                 return 1;
1318         }
1319         /* restore previous status */
1320         IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, before);
1321
1322         /*
1323          * Perform the remainder of the register test, looping through
1324          * the test table until we either fail or reach the null entry.
1325          */
1326         while (test->reg) {
1327                 for (i = 0; i < test->array_len; i++) {
1328                         switch (test->test_type) {
1329                         case PATTERN_TEST:
1330                                 REG_PATTERN_TEST(test->reg + (i * 0x40),
1331                                                 test->mask,
1332                                                 test->write);
1333                                 break;
1334                         case SET_READ_TEST:
1335                                 REG_SET_AND_CHECK(test->reg + (i * 0x40),
1336                                                 test->mask,
1337                                                 test->write);
1338                                 break;
1339                         case WRITE_NO_TEST:
1340                                 writel(test->write,
1341                                        (adapter->hw.hw_addr + test->reg)
1342                                        + (i * 0x40));
1343                                 break;
1344                         case TABLE32_TEST:
1345                                 REG_PATTERN_TEST(test->reg + (i * 4),
1346                                                 test->mask,
1347                                                 test->write);
1348                                 break;
1349                         case TABLE64_TEST_LO:
1350                                 REG_PATTERN_TEST(test->reg + (i * 8),
1351                                                 test->mask,
1352                                                 test->write);
1353                                 break;
1354                         case TABLE64_TEST_HI:
1355                                 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1356                                                 test->mask,
1357                                                 test->write);
1358                                 break;
1359                         }
1360                 }
1361                 test++;
1362         }
1363
1364         *data = 0;
1365         return 0;
1366 }
1367
1368 static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data)
1369 {
1370         struct ixgbe_hw *hw = &adapter->hw;
1371         if (hw->eeprom.ops.validate_checksum(hw, NULL))
1372                 *data = 1;
1373         else
1374                 *data = 0;
1375         return *data;
1376 }
1377
1378 static irqreturn_t ixgbe_test_intr(int irq, void *data)
1379 {
1380         struct net_device *netdev = (struct net_device *) data;
1381         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1382
1383         adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR);
1384
1385         return IRQ_HANDLED;
1386 }
1387
1388 static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data)
1389 {
1390         struct net_device *netdev = adapter->netdev;
1391         u32 mask, i = 0, shared_int = true;
1392         u32 irq = adapter->pdev->irq;
1393
1394         *data = 0;
1395
1396         /* Hook up test interrupt handler just for this test */
1397         if (adapter->msix_entries) {
1398                 /* NOTE: we don't test MSI-X interrupts here, yet */
1399                 return 0;
1400         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1401                 shared_int = false;
1402                 if (request_irq(irq, ixgbe_test_intr, 0, netdev->name,
1403                                 netdev)) {
1404                         *data = 1;
1405                         return -1;
1406                 }
1407         } else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED,
1408                                 netdev->name, netdev)) {
1409                 shared_int = false;
1410         } else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED,
1411                                netdev->name, netdev)) {
1412                 *data = 1;
1413                 return -1;
1414         }
1415         e_info(hw, "testing %s interrupt\n", shared_int ?
1416                "shared" : "unshared");
1417
1418         /* Disable all the interrupts */
1419         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1420         msleep(10);
1421
1422         /* Test each interrupt */
1423         for (; i < 10; i++) {
1424                 /* Interrupt to test */
1425                 mask = 1 << i;
1426
1427                 if (!shared_int) {
1428                         /*
1429                          * Disable the interrupts to be reported in
1430                          * the cause register and then force the same
1431                          * interrupt and see if one gets posted.  If
1432                          * an interrupt was posted to the bus, the
1433                          * test failed.
1434                          */
1435                         adapter->test_icr = 0;
1436                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1437                                         ~mask & 0x00007FFF);
1438                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1439                                         ~mask & 0x00007FFF);
1440                         msleep(10);
1441
1442                         if (adapter->test_icr & mask) {
1443                                 *data = 3;
1444                                 break;
1445                         }
1446                 }
1447
1448                 /*
1449                  * Enable the interrupt to be reported in the cause
1450                  * register and then force the same interrupt and see
1451                  * if one gets posted.  If an interrupt was not posted
1452                  * to the bus, the test failed.
1453                  */
1454                 adapter->test_icr = 0;
1455                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1456                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
1457                 msleep(10);
1458
1459                 if (!(adapter->test_icr &mask)) {
1460                         *data = 4;
1461                         break;
1462                 }
1463
1464                 if (!shared_int) {
1465                         /*
1466                          * Disable the other interrupts to be reported in
1467                          * the cause register and then force the other
1468                          * interrupts and see if any get posted.  If
1469                          * an interrupt was posted to the bus, the
1470                          * test failed.
1471                          */
1472                         adapter->test_icr = 0;
1473                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1474                                         ~mask & 0x00007FFF);
1475                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1476                                         ~mask & 0x00007FFF);
1477                         msleep(10);
1478
1479                         if (adapter->test_icr) {
1480                                 *data = 5;
1481                                 break;
1482                         }
1483                 }
1484         }
1485
1486         /* Disable all the interrupts */
1487         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1488         msleep(10);
1489
1490         /* Unhook test interrupt handler */
1491         free_irq(irq, netdev);
1492
1493         return *data;
1494 }
1495
1496 static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter)
1497 {
1498         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1499         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1500         struct ixgbe_hw *hw = &adapter->hw;
1501         u32 reg_ctl;
1502
1503         /* shut down the DMA engines now so they can be reinitialized later */
1504
1505         /* first Rx */
1506         reg_ctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1507         reg_ctl &= ~IXGBE_RXCTRL_RXEN;
1508         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, reg_ctl);
1509         ixgbe_disable_rx_queue(adapter, rx_ring);
1510
1511         /* now Tx */
1512         reg_ctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx));
1513         reg_ctl &= ~IXGBE_TXDCTL_ENABLE;
1514         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx), reg_ctl);
1515
1516         switch (hw->mac.type) {
1517         case ixgbe_mac_82599EB:
1518         case ixgbe_mac_X540:
1519                 reg_ctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
1520                 reg_ctl &= ~IXGBE_DMATXCTL_TE;
1521                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg_ctl);
1522                 break;
1523         default:
1524                 break;
1525         }
1526
1527         ixgbe_reset(adapter);
1528
1529         ixgbe_free_tx_resources(&adapter->test_tx_ring);
1530         ixgbe_free_rx_resources(&adapter->test_rx_ring);
1531 }
1532
1533 static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter)
1534 {
1535         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1536         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1537         u32 rctl, reg_data;
1538         int ret_val;
1539         int err;
1540
1541         /* Setup Tx descriptor ring and Tx buffers */
1542         tx_ring->count = IXGBE_DEFAULT_TXD;
1543         tx_ring->queue_index = 0;
1544         tx_ring->dev = &adapter->pdev->dev;
1545         tx_ring->netdev = adapter->netdev;
1546         tx_ring->reg_idx = adapter->tx_ring[0]->reg_idx;
1547         tx_ring->numa_node = adapter->node;
1548
1549         err = ixgbe_setup_tx_resources(tx_ring);
1550         if (err)
1551                 return 1;
1552
1553         switch (adapter->hw.mac.type) {
1554         case ixgbe_mac_82599EB:
1555         case ixgbe_mac_X540:
1556                 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL);
1557                 reg_data |= IXGBE_DMATXCTL_TE;
1558                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data);
1559                 break;
1560         default:
1561                 break;
1562         }
1563
1564         ixgbe_configure_tx_ring(adapter, tx_ring);
1565
1566         /* Setup Rx Descriptor ring and Rx buffers */
1567         rx_ring->count = IXGBE_DEFAULT_RXD;
1568         rx_ring->queue_index = 0;
1569         rx_ring->dev = &adapter->pdev->dev;
1570         rx_ring->netdev = adapter->netdev;
1571         rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx;
1572         rx_ring->rx_buf_len = IXGBE_RXBUFFER_2048;
1573         rx_ring->numa_node = adapter->node;
1574
1575         err = ixgbe_setup_rx_resources(rx_ring);
1576         if (err) {
1577                 ret_val = 4;
1578                 goto err_nomem;
1579         }
1580
1581         rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1582         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl & ~IXGBE_RXCTRL_RXEN);
1583
1584         ixgbe_configure_rx_ring(adapter, rx_ring);
1585
1586         rctl |= IXGBE_RXCTRL_RXEN | IXGBE_RXCTRL_DMBYPS;
1587         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl);
1588
1589         return 0;
1590
1591 err_nomem:
1592         ixgbe_free_desc_rings(adapter);
1593         return ret_val;
1594 }
1595
1596 static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter)
1597 {
1598         struct ixgbe_hw *hw = &adapter->hw;
1599         u32 reg_data;
1600
1601         /* right now we only support MAC loopback in the driver */
1602         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1603         /* Setup MAC loopback */
1604         reg_data |= IXGBE_HLREG0_LPBK;
1605         IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1606
1607         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1608         reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE;
1609         IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, reg_data);
1610
1611         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_AUTOC);
1612         reg_data &= ~IXGBE_AUTOC_LMS_MASK;
1613         reg_data |= IXGBE_AUTOC_LMS_10G_LINK_NO_AN | IXGBE_AUTOC_FLU;
1614         IXGBE_WRITE_REG(&adapter->hw, IXGBE_AUTOC, reg_data);
1615         IXGBE_WRITE_FLUSH(&adapter->hw);
1616         msleep(10);
1617
1618         /* Disable Atlas Tx lanes; re-enabled in reset path */
1619         if (hw->mac.type == ixgbe_mac_82598EB) {
1620                 u8 atlas;
1621
1622                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas);
1623                 atlas |= IXGBE_ATLAS_PDN_TX_REG_EN;
1624                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas);
1625
1626                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas);
1627                 atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
1628                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas);
1629
1630                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas);
1631                 atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
1632                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas);
1633
1634                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas);
1635                 atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
1636                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas);
1637         }
1638
1639         return 0;
1640 }
1641
1642 static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter)
1643 {
1644         u32 reg_data;
1645
1646         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1647         reg_data &= ~IXGBE_HLREG0_LPBK;
1648         IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1649 }
1650
1651 static void ixgbe_create_lbtest_frame(struct sk_buff *skb,
1652                                       unsigned int frame_size)
1653 {
1654         memset(skb->data, 0xFF, frame_size);
1655         frame_size &= ~1;
1656         memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1657         memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1658         memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1659 }
1660
1661 static int ixgbe_check_lbtest_frame(struct sk_buff *skb,
1662                                     unsigned int frame_size)
1663 {
1664         frame_size &= ~1;
1665         if (*(skb->data + 3) == 0xFF) {
1666                 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1667                     (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1668                         return 0;
1669                 }
1670         }
1671         return 13;
1672 }
1673
1674 static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring,
1675                                   struct ixgbe_ring *tx_ring,
1676                                   unsigned int size)
1677 {
1678         union ixgbe_adv_rx_desc *rx_desc;
1679         struct ixgbe_rx_buffer *rx_buffer_info;
1680         struct ixgbe_tx_buffer *tx_buffer_info;
1681         const int bufsz = rx_ring->rx_buf_len;
1682         u32 staterr;
1683         u16 rx_ntc, tx_ntc, count = 0;
1684
1685         /* initialize next to clean and descriptor values */
1686         rx_ntc = rx_ring->next_to_clean;
1687         tx_ntc = tx_ring->next_to_clean;
1688         rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc);
1689         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1690
1691         while (staterr & IXGBE_RXD_STAT_DD) {
1692                 /* check Rx buffer */
1693                 rx_buffer_info = &rx_ring->rx_buffer_info[rx_ntc];
1694
1695                 /* unmap Rx buffer, will be remapped by alloc_rx_buffers */
1696                 dma_unmap_single(rx_ring->dev,
1697                                  rx_buffer_info->dma,
1698                                  bufsz,
1699                                  DMA_FROM_DEVICE);
1700                 rx_buffer_info->dma = 0;
1701
1702                 /* verify contents of skb */
1703                 if (!ixgbe_check_lbtest_frame(rx_buffer_info->skb, size))
1704                         count++;
1705
1706                 /* unmap buffer on Tx side */
1707                 tx_buffer_info = &tx_ring->tx_buffer_info[tx_ntc];
1708                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
1709
1710                 /* increment Rx/Tx next to clean counters */
1711                 rx_ntc++;
1712                 if (rx_ntc == rx_ring->count)
1713                         rx_ntc = 0;
1714                 tx_ntc++;
1715                 if (tx_ntc == tx_ring->count)
1716                         tx_ntc = 0;
1717
1718                 /* fetch next descriptor */
1719                 rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc);
1720                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1721         }
1722
1723         /* re-map buffers to ring, store next to clean values */
1724         ixgbe_alloc_rx_buffers(rx_ring, count);
1725         rx_ring->next_to_clean = rx_ntc;
1726         tx_ring->next_to_clean = tx_ntc;
1727
1728         return count;
1729 }
1730
1731 static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter)
1732 {
1733         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1734         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1735         int i, j, lc, good_cnt, ret_val = 0;
1736         unsigned int size = 1024;
1737         netdev_tx_t tx_ret_val;
1738         struct sk_buff *skb;
1739
1740         /* allocate test skb */
1741         skb = alloc_skb(size, GFP_KERNEL);
1742         if (!skb)
1743                 return 11;
1744
1745         /* place data into test skb */
1746         ixgbe_create_lbtest_frame(skb, size);
1747         skb_put(skb, size);
1748
1749         /*
1750          * Calculate the loop count based on the largest descriptor ring
1751          * The idea is to wrap the largest ring a number of times using 64
1752          * send/receive pairs during each loop
1753          */
1754
1755         if (rx_ring->count <= tx_ring->count)
1756                 lc = ((tx_ring->count / 64) * 2) + 1;
1757         else
1758                 lc = ((rx_ring->count / 64) * 2) + 1;
1759
1760         for (j = 0; j <= lc; j++) {
1761                 /* reset count of good packets */
1762                 good_cnt = 0;
1763
1764                 /* place 64 packets on the transmit queue*/
1765                 for (i = 0; i < 64; i++) {
1766                         skb_get(skb);
1767                         tx_ret_val = ixgbe_xmit_frame_ring(skb,
1768                                                            adapter,
1769                                                            tx_ring);
1770                         if (tx_ret_val == NETDEV_TX_OK)
1771                                 good_cnt++;
1772                 }
1773
1774                 if (good_cnt != 64) {
1775                         ret_val = 12;
1776                         break;
1777                 }
1778
1779                 /* allow 200 milliseconds for packets to go from Tx to Rx */
1780                 msleep(200);
1781
1782                 good_cnt = ixgbe_clean_test_rings(rx_ring, tx_ring, size);
1783                 if (good_cnt != 64) {
1784                         ret_val = 13;
1785                         break;
1786                 }
1787         }
1788
1789         /* free the original skb */
1790         kfree_skb(skb);
1791
1792         return ret_val;
1793 }
1794
1795 static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data)
1796 {
1797         *data = ixgbe_setup_desc_rings(adapter);
1798         if (*data)
1799                 goto out;
1800         *data = ixgbe_setup_loopback_test(adapter);
1801         if (*data)
1802                 goto err_loopback;
1803         *data = ixgbe_run_loopback_test(adapter);
1804         ixgbe_loopback_cleanup(adapter);
1805
1806 err_loopback:
1807         ixgbe_free_desc_rings(adapter);
1808 out:
1809         return *data;
1810 }
1811
1812 static void ixgbe_diag_test(struct net_device *netdev,
1813                             struct ethtool_test *eth_test, u64 *data)
1814 {
1815         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1816         bool if_running = netif_running(netdev);
1817
1818         set_bit(__IXGBE_TESTING, &adapter->state);
1819         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1820                 /* Offline tests */
1821
1822                 e_info(hw, "offline testing starting\n");
1823
1824                 /* Link test performed before hardware reset so autoneg doesn't
1825                  * interfere with test result */
1826                 if (ixgbe_link_test(adapter, &data[4]))
1827                         eth_test->flags |= ETH_TEST_FL_FAILED;
1828
1829                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
1830                         int i;
1831                         for (i = 0; i < adapter->num_vfs; i++) {
1832                                 if (adapter->vfinfo[i].clear_to_send) {
1833                                         netdev_warn(netdev, "%s",
1834                                                     "offline diagnostic is not "
1835                                                     "supported when VFs are "
1836                                                     "present\n");
1837                                         data[0] = 1;
1838                                         data[1] = 1;
1839                                         data[2] = 1;
1840                                         data[3] = 1;
1841                                         eth_test->flags |= ETH_TEST_FL_FAILED;
1842                                         clear_bit(__IXGBE_TESTING,
1843                                                   &adapter->state);
1844                                         goto skip_ol_tests;
1845                                 }
1846                         }
1847                 }
1848
1849                 if (if_running)
1850                         /* indicate we're in test mode */
1851                         dev_close(netdev);
1852                 else
1853                         ixgbe_reset(adapter);
1854
1855                 e_info(hw, "register testing starting\n");
1856                 if (ixgbe_reg_test(adapter, &data[0]))
1857                         eth_test->flags |= ETH_TEST_FL_FAILED;
1858
1859                 ixgbe_reset(adapter);
1860                 e_info(hw, "eeprom testing starting\n");
1861                 if (ixgbe_eeprom_test(adapter, &data[1]))
1862                         eth_test->flags |= ETH_TEST_FL_FAILED;
1863
1864                 ixgbe_reset(adapter);
1865                 e_info(hw, "interrupt testing starting\n");
1866                 if (ixgbe_intr_test(adapter, &data[2]))
1867                         eth_test->flags |= ETH_TEST_FL_FAILED;
1868
1869                 /* If SRIOV or VMDq is enabled then skip MAC
1870                  * loopback diagnostic. */
1871                 if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED |
1872                                       IXGBE_FLAG_VMDQ_ENABLED)) {
1873                         e_info(hw, "Skip MAC loopback diagnostic in VT "
1874                                "mode\n");
1875                         data[3] = 0;
1876                         goto skip_loopback;
1877                 }
1878
1879                 ixgbe_reset(adapter);
1880                 e_info(hw, "loopback testing starting\n");
1881                 if (ixgbe_loopback_test(adapter, &data[3]))
1882                         eth_test->flags |= ETH_TEST_FL_FAILED;
1883
1884 skip_loopback:
1885                 ixgbe_reset(adapter);
1886
1887                 clear_bit(__IXGBE_TESTING, &adapter->state);
1888                 if (if_running)
1889                         dev_open(netdev);
1890         } else {
1891                 e_info(hw, "online testing starting\n");
1892                 /* Online tests */
1893                 if (ixgbe_link_test(adapter, &data[4]))
1894                         eth_test->flags |= ETH_TEST_FL_FAILED;
1895
1896                 /* Online tests aren't run; pass by default */
1897                 data[0] = 0;
1898                 data[1] = 0;
1899                 data[2] = 0;
1900                 data[3] = 0;
1901
1902                 clear_bit(__IXGBE_TESTING, &adapter->state);
1903         }
1904 skip_ol_tests:
1905         msleep_interruptible(4 * 1000);
1906 }
1907
1908 static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
1909                                struct ethtool_wolinfo *wol)
1910 {
1911         struct ixgbe_hw *hw = &adapter->hw;
1912         int retval = 1;
1913
1914         /* WOL not supported except for the following */
1915         switch(hw->device_id) {
1916         case IXGBE_DEV_ID_82599_SFP:
1917                 /* Only this subdevice supports WOL */
1918                 if (hw->subsystem_device_id != IXGBE_SUBDEV_ID_82599_SFP) {
1919                         wol->supported = 0;
1920                         break;
1921                 }
1922                 retval = 0;
1923                 break;
1924         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
1925                 /* All except this subdevice support WOL */
1926                 if (hw->subsystem_device_id ==
1927                     IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ) {
1928                         wol->supported = 0;
1929                         break;
1930                 }
1931                 retval = 0;
1932                 break;
1933         case IXGBE_DEV_ID_82599_KX4:
1934                 retval = 0;
1935                 break;
1936         default:
1937                 wol->supported = 0;
1938         }
1939
1940         return retval;
1941 }
1942
1943 static void ixgbe_get_wol(struct net_device *netdev,
1944                           struct ethtool_wolinfo *wol)
1945 {
1946         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1947
1948         wol->supported = WAKE_UCAST | WAKE_MCAST |
1949                          WAKE_BCAST | WAKE_MAGIC;
1950         wol->wolopts = 0;
1951
1952         if (ixgbe_wol_exclusion(adapter, wol) ||
1953             !device_can_wakeup(&adapter->pdev->dev))
1954                 return;
1955
1956         if (adapter->wol & IXGBE_WUFC_EX)
1957                 wol->wolopts |= WAKE_UCAST;
1958         if (adapter->wol & IXGBE_WUFC_MC)
1959                 wol->wolopts |= WAKE_MCAST;
1960         if (adapter->wol & IXGBE_WUFC_BC)
1961                 wol->wolopts |= WAKE_BCAST;
1962         if (adapter->wol & IXGBE_WUFC_MAG)
1963                 wol->wolopts |= WAKE_MAGIC;
1964 }
1965
1966 static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1967 {
1968         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1969
1970         if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1971                 return -EOPNOTSUPP;
1972
1973         if (ixgbe_wol_exclusion(adapter, wol))
1974                 return wol->wolopts ? -EOPNOTSUPP : 0;
1975
1976         adapter->wol = 0;
1977
1978         if (wol->wolopts & WAKE_UCAST)
1979                 adapter->wol |= IXGBE_WUFC_EX;
1980         if (wol->wolopts & WAKE_MCAST)
1981                 adapter->wol |= IXGBE_WUFC_MC;
1982         if (wol->wolopts & WAKE_BCAST)
1983                 adapter->wol |= IXGBE_WUFC_BC;
1984         if (wol->wolopts & WAKE_MAGIC)
1985                 adapter->wol |= IXGBE_WUFC_MAG;
1986
1987         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1988
1989         return 0;
1990 }
1991
1992 static int ixgbe_nway_reset(struct net_device *netdev)
1993 {
1994         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1995
1996         if (netif_running(netdev))
1997                 ixgbe_reinit_locked(adapter);
1998
1999         return 0;
2000 }
2001
2002 static int ixgbe_phys_id(struct net_device *netdev, u32 data)
2003 {
2004         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2005         struct ixgbe_hw *hw = &adapter->hw;
2006         u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
2007         u32 i;
2008
2009         if (!data || data > 300)
2010                 data = 300;
2011
2012         for (i = 0; i < (data * 1000); i += 400) {
2013                 hw->mac.ops.led_on(hw, IXGBE_LED_ON);
2014                 msleep_interruptible(200);
2015                 hw->mac.ops.led_off(hw, IXGBE_LED_ON);
2016                 msleep_interruptible(200);
2017         }
2018
2019         /* Restore LED settings */
2020         IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, led_reg);
2021
2022         return 0;
2023 }
2024
2025 static int ixgbe_get_coalesce(struct net_device *netdev,
2026                               struct ethtool_coalesce *ec)
2027 {
2028         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2029
2030         ec->tx_max_coalesced_frames_irq = adapter->tx_ring[0]->work_limit;
2031
2032         /* only valid if in constant ITR mode */
2033         switch (adapter->rx_itr_setting) {
2034         case 0:
2035                 /* throttling disabled */
2036                 ec->rx_coalesce_usecs = 0;
2037                 break;
2038         case 1:
2039                 /* dynamic ITR mode */
2040                 ec->rx_coalesce_usecs = 1;
2041                 break;
2042         default:
2043                 /* fixed interrupt rate mode */
2044                 ec->rx_coalesce_usecs = 1000000/adapter->rx_eitr_param;
2045                 break;
2046         }
2047
2048         /* if in mixed tx/rx queues per vector mode, report only rx settings */
2049         if (adapter->q_vector[0]->txr_count && adapter->q_vector[0]->rxr_count)
2050                 return 0;
2051
2052         /* only valid if in constant ITR mode */
2053         switch (adapter->tx_itr_setting) {
2054         case 0:
2055                 /* throttling disabled */
2056                 ec->tx_coalesce_usecs = 0;
2057                 break;
2058         case 1:
2059                 /* dynamic ITR mode */
2060                 ec->tx_coalesce_usecs = 1;
2061                 break;
2062         default:
2063                 ec->tx_coalesce_usecs = 1000000/adapter->tx_eitr_param;
2064                 break;
2065         }
2066
2067         return 0;
2068 }
2069
2070 /*
2071  * this function must be called before setting the new value of
2072  * rx_itr_setting
2073  */
2074 static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter,
2075                              struct ethtool_coalesce *ec)
2076 {
2077         struct net_device *netdev = adapter->netdev;
2078
2079         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
2080                 return false;
2081
2082         /* if interrupt rate is too high then disable RSC */
2083         if (ec->rx_coalesce_usecs != 1 &&
2084             ec->rx_coalesce_usecs <= 1000000/IXGBE_MAX_RSC_INT_RATE) {
2085                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2086                         e_info(probe, "rx-usecs set too low, "
2087                                       "disabling RSC\n");
2088                         adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
2089                         return true;
2090                 }
2091         } else {
2092                 /* check the feature flag value and enable RSC if necessary */
2093                 if ((netdev->features & NETIF_F_LRO) &&
2094                     !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
2095                         e_info(probe, "rx-usecs set to %d, "
2096                                       "re-enabling RSC\n",
2097                                ec->rx_coalesce_usecs);
2098                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
2099                         return true;
2100                 }
2101         }
2102         return false;
2103 }
2104
2105 static int ixgbe_set_coalesce(struct net_device *netdev,
2106                               struct ethtool_coalesce *ec)
2107 {
2108         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2109         struct ixgbe_q_vector *q_vector;
2110         int i;
2111         bool need_reset = false;
2112
2113         /* don't accept tx specific changes if we've got mixed RxTx vectors */
2114         if (adapter->q_vector[0]->txr_count && adapter->q_vector[0]->rxr_count
2115            && ec->tx_coalesce_usecs)
2116                 return -EINVAL;
2117
2118         if (ec->tx_max_coalesced_frames_irq)
2119                 adapter->tx_ring[0]->work_limit = ec->tx_max_coalesced_frames_irq;
2120
2121         if (ec->rx_coalesce_usecs > 1) {
2122                 /* check the limits */
2123                 if ((1000000/ec->rx_coalesce_usecs > IXGBE_MAX_INT_RATE) ||
2124                     (1000000/ec->rx_coalesce_usecs < IXGBE_MIN_INT_RATE))
2125                         return -EINVAL;
2126
2127                 /* check the old value and enable RSC if necessary */
2128                 need_reset = ixgbe_update_rsc(adapter, ec);
2129
2130                 /* store the value in ints/second */
2131                 adapter->rx_eitr_param = 1000000/ec->rx_coalesce_usecs;
2132
2133                 /* static value of interrupt rate */
2134                 adapter->rx_itr_setting = adapter->rx_eitr_param;
2135                 /* clear the lower bit as its used for dynamic state */
2136                 adapter->rx_itr_setting &= ~1;
2137         } else if (ec->rx_coalesce_usecs == 1) {
2138                 /* check the old value and enable RSC if necessary */
2139                 need_reset = ixgbe_update_rsc(adapter, ec);
2140
2141                 /* 1 means dynamic mode */
2142                 adapter->rx_eitr_param = 20000;
2143                 adapter->rx_itr_setting = 1;
2144         } else {
2145                 /* check the old value and enable RSC if necessary */
2146                 need_reset = ixgbe_update_rsc(adapter, ec);
2147                 /*
2148                  * any other value means disable eitr, which is best
2149                  * served by setting the interrupt rate very high
2150                  */
2151                 adapter->rx_eitr_param = IXGBE_MAX_INT_RATE;
2152                 adapter->rx_itr_setting = 0;
2153         }
2154
2155         if (ec->tx_coalesce_usecs > 1) {
2156                 /*
2157                  * don't have to worry about max_int as above because
2158                  * tx vectors don't do hardware RSC (an rx function)
2159                  */
2160                 /* check the limits */
2161                 if ((1000000/ec->tx_coalesce_usecs > IXGBE_MAX_INT_RATE) ||
2162                     (1000000/ec->tx_coalesce_usecs < IXGBE_MIN_INT_RATE))
2163                         return -EINVAL;
2164
2165                 /* store the value in ints/second */
2166                 adapter->tx_eitr_param = 1000000/ec->tx_coalesce_usecs;
2167
2168                 /* static value of interrupt rate */
2169                 adapter->tx_itr_setting = adapter->tx_eitr_param;
2170
2171                 /* clear the lower bit as its used for dynamic state */
2172                 adapter->tx_itr_setting &= ~1;
2173         } else if (ec->tx_coalesce_usecs == 1) {
2174                 /* 1 means dynamic mode */
2175                 adapter->tx_eitr_param = 10000;
2176                 adapter->tx_itr_setting = 1;
2177         } else {
2178                 adapter->tx_eitr_param = IXGBE_MAX_INT_RATE;
2179                 adapter->tx_itr_setting = 0;
2180         }
2181
2182         /* MSI/MSIx Interrupt Mode */
2183         if (adapter->flags &
2184             (IXGBE_FLAG_MSIX_ENABLED | IXGBE_FLAG_MSI_ENABLED)) {
2185                 int num_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2186                 for (i = 0; i < num_vectors; i++) {
2187                         q_vector = adapter->q_vector[i];
2188                         if (q_vector->txr_count && !q_vector->rxr_count)
2189                                 /* tx only */
2190                                 q_vector->eitr = adapter->tx_eitr_param;
2191                         else
2192                                 /* rx only or mixed */
2193                                 q_vector->eitr = adapter->rx_eitr_param;
2194                         ixgbe_write_eitr(q_vector);
2195                 }
2196         /* Legacy Interrupt Mode */
2197         } else {
2198                 q_vector = adapter->q_vector[0];
2199                 q_vector->eitr = adapter->rx_eitr_param;
2200                 ixgbe_write_eitr(q_vector);
2201         }
2202
2203         /*
2204          * do reset here at the end to make sure EITR==0 case is handled
2205          * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings
2206          * also locks in RSC enable/disable which requires reset
2207          */
2208         if (need_reset) {
2209                 if (netif_running(netdev))
2210                         ixgbe_reinit_locked(adapter);
2211                 else
2212                         ixgbe_reset(adapter);
2213         }
2214
2215         return 0;
2216 }
2217
2218 static int ixgbe_set_flags(struct net_device *netdev, u32 data)
2219 {
2220         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2221         bool need_reset = false;
2222         int rc;
2223
2224 #ifdef CONFIG_IXGBE_DCB
2225         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
2226             !(data & ETH_FLAG_RXVLAN))
2227                 return -EINVAL;
2228 #endif
2229
2230         need_reset = (data & ETH_FLAG_RXVLAN) !=
2231                      (netdev->features & NETIF_F_HW_VLAN_RX);
2232
2233         rc = ethtool_op_set_flags(netdev, data, ETH_FLAG_LRO | ETH_FLAG_NTUPLE |
2234                                         ETH_FLAG_RXVLAN | ETH_FLAG_TXVLAN);
2235         if (rc)
2236                 return rc;
2237
2238         /* if state changes we need to update adapter->flags and reset */
2239         if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
2240             (!!(data & ETH_FLAG_LRO) !=
2241              !!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))) {
2242                 if ((data & ETH_FLAG_LRO) &&
2243                     (!adapter->rx_itr_setting ||
2244                      (adapter->rx_itr_setting > IXGBE_MAX_RSC_INT_RATE))) {
2245                         e_info(probe, "rx-usecs set too low, "
2246                                       "not enabling RSC.\n");
2247                 } else {
2248                         adapter->flags2 ^= IXGBE_FLAG2_RSC_ENABLED;
2249                         switch (adapter->hw.mac.type) {
2250                         case ixgbe_mac_82599EB:
2251                                 need_reset = true;
2252                                 break;
2253                         case ixgbe_mac_X540: {
2254                                 int i;
2255                                 for (i = 0; i < adapter->num_rx_queues; i++) {
2256                                         struct ixgbe_ring *ring =
2257                                                           adapter->rx_ring[i];
2258                                         if (adapter->flags2 &
2259                                             IXGBE_FLAG2_RSC_ENABLED) {
2260                                                 ixgbe_configure_rscctl(adapter,
2261                                                                        ring);
2262                                         } else {
2263                                                 ixgbe_clear_rscctl(adapter,
2264                                                                    ring);
2265                                         }
2266                                 }
2267                         }
2268                                 break;
2269                         default:
2270                                 break;
2271                         }
2272                 }
2273         }
2274
2275         /*
2276          * Check if Flow Director n-tuple support was enabled or disabled.  If
2277          * the state changed, we need to reset.
2278          */
2279         if ((adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) &&
2280             (!(data & ETH_FLAG_NTUPLE))) {
2281                 /* turn off Flow Director perfect, set hash and reset */
2282                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
2283                 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
2284                 need_reset = true;
2285         } else if ((!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) &&
2286                    (data & ETH_FLAG_NTUPLE)) {
2287                 /* turn off Flow Director hash, enable perfect and reset */
2288                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
2289                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
2290                 need_reset = true;
2291         } else {
2292                 /* no state change */
2293         }
2294
2295         if (need_reset) {
2296                 if (netif_running(netdev))
2297                         ixgbe_reinit_locked(adapter);
2298                 else
2299                         ixgbe_reset(adapter);
2300         }
2301
2302         return 0;
2303 }
2304
2305 static int ixgbe_set_rx_ntuple(struct net_device *dev,
2306                                struct ethtool_rx_ntuple *cmd)
2307 {
2308         struct ixgbe_adapter *adapter = netdev_priv(dev);
2309         struct ethtool_rx_ntuple_flow_spec *fs = &cmd->fs;
2310         union ixgbe_atr_input input_struct;
2311         struct ixgbe_atr_input_masks input_masks;
2312         int target_queue;
2313         int err;
2314
2315         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
2316                 return -EOPNOTSUPP;
2317
2318         /*
2319          * Don't allow programming if the action is a queue greater than
2320          * the number of online Tx queues.
2321          */
2322         if ((fs->action >= adapter->num_tx_queues) ||
2323             (fs->action < ETHTOOL_RXNTUPLE_ACTION_DROP))
2324                 return -EINVAL;
2325
2326         memset(&input_struct, 0, sizeof(union ixgbe_atr_input));
2327         memset(&input_masks, 0, sizeof(struct ixgbe_atr_input_masks));
2328
2329         /* record flow type */
2330         switch (fs->flow_type) {
2331         case IPV4_FLOW:
2332                 input_struct.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_IPV4;
2333                 break;
2334         case TCP_V4_FLOW:
2335                 input_struct.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2336                 break;
2337         case UDP_V4_FLOW:
2338                 input_struct.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2339                 break;
2340         case SCTP_V4_FLOW:
2341                 input_struct.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2342                 break;
2343         default:
2344                 return -1;
2345         }
2346
2347         /* copy vlan tag minus the CFI bit */
2348         if ((fs->vlan_tag & 0xEFFF) || (~fs->vlan_tag_mask & 0xEFFF)) {
2349                 input_struct.formatted.vlan_id = htons(fs->vlan_tag & 0xEFFF);
2350                 if (!fs->vlan_tag_mask) {
2351                         input_masks.vlan_id_mask = htons(0xEFFF);
2352                 } else {
2353                         switch (~fs->vlan_tag_mask & 0xEFFF) {
2354                         /* all of these are valid vlan-mask values */
2355                         case 0xEFFF:
2356                         case 0xE000:
2357                         case 0x0FFF:
2358                         case 0x0000:
2359                                 input_masks.vlan_id_mask =
2360                                         htons(~fs->vlan_tag_mask);
2361                                 break;
2362                         /* exit with error if vlan-mask is invalid */
2363                         default:
2364                                 e_err(drv, "Partial VLAN ID or "
2365                                       "priority mask in vlan-mask is not "
2366                                       "supported by hardware\n");
2367                                 return -1;
2368                         }
2369                 }
2370         }
2371
2372         /* make sure we only use the first 2 bytes of user data */
2373         if ((fs->data & 0xFFFF) || (~fs->data_mask & 0xFFFF)) {
2374                 input_struct.formatted.flex_bytes = htons(fs->data & 0xFFFF);
2375                 if (!(fs->data_mask & 0xFFFF)) {
2376                         input_masks.flex_mask = 0xFFFF;
2377                 } else if (~fs->data_mask & 0xFFFF) {
2378                         e_err(drv, "Partial user-def-mask is not "
2379                               "supported by hardware\n");
2380                         return -1;
2381                 }
2382         }
2383
2384         /*
2385          * Copy input into formatted structures
2386          *
2387          * These assignments are based on the following logic
2388          * If neither input or mask are set assume value is masked out.
2389          * If input is set, but mask is not mask should default to accept all.
2390          * If input is not set, but mask is set then mask likely results in 0.
2391          * If input is set and mask is set then assign both.
2392          */
2393         if (fs->h_u.tcp_ip4_spec.ip4src || ~fs->m_u.tcp_ip4_spec.ip4src) {
2394                 input_struct.formatted.src_ip[0] = fs->h_u.tcp_ip4_spec.ip4src;
2395                 if (!fs->m_u.tcp_ip4_spec.ip4src)
2396                         input_masks.src_ip_mask[0] = 0xFFFFFFFF;
2397                 else
2398                         input_masks.src_ip_mask[0] =
2399                                 ~fs->m_u.tcp_ip4_spec.ip4src;
2400         }
2401         if (fs->h_u.tcp_ip4_spec.ip4dst || ~fs->m_u.tcp_ip4_spec.ip4dst) {
2402                 input_struct.formatted.dst_ip[0] = fs->h_u.tcp_ip4_spec.ip4dst;
2403                 if (!fs->m_u.tcp_ip4_spec.ip4dst)
2404                         input_masks.dst_ip_mask[0] = 0xFFFFFFFF;
2405                 else
2406                         input_masks.dst_ip_mask[0] =
2407                                 ~fs->m_u.tcp_ip4_spec.ip4dst;
2408         }
2409         if (fs->h_u.tcp_ip4_spec.psrc || ~fs->m_u.tcp_ip4_spec.psrc) {
2410                 input_struct.formatted.src_port = fs->h_u.tcp_ip4_spec.psrc;
2411                 if (!fs->m_u.tcp_ip4_spec.psrc)
2412                         input_masks.src_port_mask = 0xFFFF;
2413                 else
2414                         input_masks.src_port_mask = ~fs->m_u.tcp_ip4_spec.psrc;
2415         }
2416         if (fs->h_u.tcp_ip4_spec.pdst || ~fs->m_u.tcp_ip4_spec.pdst) {
2417                 input_struct.formatted.dst_port = fs->h_u.tcp_ip4_spec.pdst;
2418                 if (!fs->m_u.tcp_ip4_spec.pdst)
2419                         input_masks.dst_port_mask = 0xFFFF;
2420                 else
2421                         input_masks.dst_port_mask = ~fs->m_u.tcp_ip4_spec.pdst;
2422         }
2423
2424         /* determine if we need to drop or route the packet */
2425         if (fs->action == ETHTOOL_RXNTUPLE_ACTION_DROP)
2426                 target_queue = MAX_RX_QUEUES - 1;
2427         else
2428                 target_queue = fs->action;
2429
2430         spin_lock(&adapter->fdir_perfect_lock);
2431         err = ixgbe_fdir_add_perfect_filter_82599(&adapter->hw,
2432                                                   &input_struct,
2433                                                   &input_masks, 0,
2434                                                   target_queue);
2435         spin_unlock(&adapter->fdir_perfect_lock);
2436
2437         return err ? -1 : 0;
2438 }
2439
2440 static const struct ethtool_ops ixgbe_ethtool_ops = {
2441         .get_settings           = ixgbe_get_settings,
2442         .set_settings           = ixgbe_set_settings,
2443         .get_drvinfo            = ixgbe_get_drvinfo,
2444         .get_regs_len           = ixgbe_get_regs_len,
2445         .get_regs               = ixgbe_get_regs,
2446         .get_wol                = ixgbe_get_wol,
2447         .set_wol                = ixgbe_set_wol,
2448         .nway_reset             = ixgbe_nway_reset,
2449         .get_link               = ethtool_op_get_link,
2450         .get_eeprom_len         = ixgbe_get_eeprom_len,
2451         .get_eeprom             = ixgbe_get_eeprom,
2452         .get_ringparam          = ixgbe_get_ringparam,
2453         .set_ringparam          = ixgbe_set_ringparam,
2454         .get_pauseparam         = ixgbe_get_pauseparam,
2455         .set_pauseparam         = ixgbe_set_pauseparam,
2456         .get_rx_csum            = ixgbe_get_rx_csum,
2457         .set_rx_csum            = ixgbe_set_rx_csum,
2458         .get_tx_csum            = ixgbe_get_tx_csum,
2459         .set_tx_csum            = ixgbe_set_tx_csum,
2460         .get_sg                 = ethtool_op_get_sg,
2461         .set_sg                 = ethtool_op_set_sg,
2462         .get_msglevel           = ixgbe_get_msglevel,
2463         .set_msglevel           = ixgbe_set_msglevel,
2464         .get_tso                = ethtool_op_get_tso,
2465         .set_tso                = ixgbe_set_tso,
2466         .self_test              = ixgbe_diag_test,
2467         .get_strings            = ixgbe_get_strings,
2468         .phys_id                = ixgbe_phys_id,
2469         .get_sset_count         = ixgbe_get_sset_count,
2470         .get_ethtool_stats      = ixgbe_get_ethtool_stats,
2471         .get_coalesce           = ixgbe_get_coalesce,
2472         .set_coalesce           = ixgbe_set_coalesce,
2473         .get_flags              = ethtool_op_get_flags,
2474         .set_flags              = ixgbe_set_flags,
2475         .set_rx_ntuple          = ixgbe_set_rx_ntuple,
2476 };
2477
2478 void ixgbe_set_ethtool_ops(struct net_device *netdev)
2479 {
2480         SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops);
2481 }