drivers/net/ixgbe/ixgbe_ethtool.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2011 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 /* ethtool support for ixgbe */
  29
  30 #include <linux/interrupt.h>
  31 #include <linux/types.h>
  32 #include <linux/module.h>
  33 #include <linux/slab.h>
  34 #include <linux/pci.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/ethtool.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/uaccess.h>
  39
  40 #include "ixgbe.h"
  41
  42
  43 #define IXGBE_ALL_RAR_ENTRIES 16
  44
  45 enum {NETDEV_STATS, IXGBE_STATS};
  46
  47 struct ixgbe_stats {
  48         char stat_string[ETH_GSTRING_LEN];
  49         int type;
  50         int sizeof_stat;
  51         int stat_offset;
  52 };
  53
  54 #define IXGBE_STAT(m)           IXGBE_STATS, \
  55                                 sizeof(((struct ixgbe_adapter *)0)->m), \
  56                                 offsetof(struct ixgbe_adapter, m)
  57 #define IXGBE_NETDEV_STAT(m)    NETDEV_STATS, \
  58                                 sizeof(((struct rtnl_link_stats64 *)0)->m), \
  59                                 offsetof(struct rtnl_link_stats64, m)
  60
  61 static struct ixgbe_stats ixgbe_gstrings_stats[] = {
  62         {"rx_packets", IXGBE_NETDEV_STAT(rx_packets)},
  63         {"tx_packets", IXGBE_NETDEV_STAT(tx_packets)},
  64         {"rx_bytes", IXGBE_NETDEV_STAT(rx_bytes)},
  65         {"tx_bytes", IXGBE_NETDEV_STAT(tx_bytes)},
  66         {"rx_pkts_nic", IXGBE_STAT(stats.gprc)},
  67         {"tx_pkts_nic", IXGBE_STAT(stats.gptc)},
  68         {"rx_bytes_nic", IXGBE_STAT(stats.gorc)},
  69         {"tx_bytes_nic", IXGBE_STAT(stats.gotc)},
  70         {"lsc_int", IXGBE_STAT(lsc_int)},
  71         {"tx_busy", IXGBE_STAT(tx_busy)},
  72         {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
  73         {"rx_errors", IXGBE_NETDEV_STAT(rx_errors)},
  74         {"tx_errors", IXGBE_NETDEV_STAT(tx_errors)},
  75         {"rx_dropped", IXGBE_NETDEV_STAT(rx_dropped)},
  76         {"tx_dropped", IXGBE_NETDEV_STAT(tx_dropped)},
  77         {"multicast", IXGBE_NETDEV_STAT(multicast)},
  78         {"broadcast", IXGBE_STAT(stats.bprc)},
  79         {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
  80         {"collisions", IXGBE_NETDEV_STAT(collisions)},
  81         {"rx_over_errors", IXGBE_NETDEV_STAT(rx_over_errors)},
  82         {"rx_crc_errors", IXGBE_NETDEV_STAT(rx_crc_errors)},
  83         {"rx_frame_errors", IXGBE_NETDEV_STAT(rx_frame_errors)},
  84         {"hw_rsc_aggregated", IXGBE_STAT(rsc_total_count)},
  85         {"hw_rsc_flushed", IXGBE_STAT(rsc_total_flush)},
  86         {"fdir_match", IXGBE_STAT(stats.fdirmatch)},
  87         {"fdir_miss", IXGBE_STAT(stats.fdirmiss)},
  88         {"fdir_overflow", IXGBE_STAT(fdir_overflow)},
  89         {"rx_fifo_errors", IXGBE_NETDEV_STAT(rx_fifo_errors)},
  90         {"rx_missed_errors", IXGBE_NETDEV_STAT(rx_missed_errors)},
  91         {"tx_aborted_errors", IXGBE_NETDEV_STAT(tx_aborted_errors)},
  92         {"tx_carrier_errors", IXGBE_NETDEV_STAT(tx_carrier_errors)},
  93         {"tx_fifo_errors", IXGBE_NETDEV_STAT(tx_fifo_errors)},
  94         {"tx_heartbeat_errors", IXGBE_NETDEV_STAT(tx_heartbeat_errors)},
  95         {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
  96         {"tx_restart_queue", IXGBE_STAT(restart_queue)},
  97         {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
  98         {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
  99         {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
 100         {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
 101         {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
 102         {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
 103         {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
 104         {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
 105         {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
 106         {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)},
 107         {"os2bmc_rx_by_bmc", IXGBE_STAT(stats.o2bgptc)},
 108         {"os2bmc_tx_by_bmc", IXGBE_STAT(stats.b2ospc)},
 109         {"os2bmc_tx_by_host", IXGBE_STAT(stats.o2bspc)},
 110         {"os2bmc_rx_by_host", IXGBE_STAT(stats.b2ogprc)},
 111 #ifdef IXGBE_FCOE
 112         {"fcoe_bad_fccrc", IXGBE_STAT(stats.fccrc)},
 113         {"rx_fcoe_dropped", IXGBE_STAT(stats.fcoerpdc)},
 114         {"rx_fcoe_packets", IXGBE_STAT(stats.fcoeprc)},
 115         {"rx_fcoe_dwords", IXGBE_STAT(stats.fcoedwrc)},
 116         {"tx_fcoe_packets", IXGBE_STAT(stats.fcoeptc)},
 117         {"tx_fcoe_dwords", IXGBE_STAT(stats.fcoedwtc)},
 118 #endif /* IXGBE_FCOE */
 119 };
 120
 121 #define IXGBE_QUEUE_STATS_LEN \
 122         ((((struct ixgbe_adapter *)netdev_priv(netdev))->num_tx_queues + \
 123         ((struct ixgbe_adapter *)netdev_priv(netdev))->num_rx_queues) * \
 124         (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
 125 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
 126 #define IXGBE_PB_STATS_LEN ( \
 127                  (((struct ixgbe_adapter *)netdev_priv(netdev))->flags & \
 128                  IXGBE_FLAG_DCB_ENABLED) ? \
 129                  (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
 130                   sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
 131                   sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
 132                   sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
 133                   / sizeof(u64) : 0)
 134 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
 135                          IXGBE_PB_STATS_LEN + \
 136                          IXGBE_QUEUE_STATS_LEN)
 137
 138 static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = {
 139         "Register test  (offline)", "Eeprom test    (offline)",
 140         "Interrupt test (offline)", "Loopback test  (offline)",
 141         "Link test   (on/offline)"
 142 };
 143 #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN
 144
 145 static int ixgbe_get_settings(struct net_device *netdev,
 146                               struct ethtool_cmd *ecmd)
 147 {
 148         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 149         struct ixgbe_hw *hw = &adapter->hw;
 150         u32 link_speed = 0;
 151         bool link_up;
 152
 153         ecmd->supported = SUPPORTED_10000baseT_Full;
 154         ecmd->autoneg = AUTONEG_ENABLE;
 155         ecmd->transceiver = XCVR_EXTERNAL;
 156         if ((hw->phy.media_type == ixgbe_media_type_copper) ||
 157             (hw->phy.multispeed_fiber)) {
 158                 ecmd->supported |= (SUPPORTED_1000baseT_Full |
 159                                     SUPPORTED_Autoneg);
 160
 161                 switch (hw->mac.type) {
 162                 case ixgbe_mac_X540:
 163                         ecmd->supported |= SUPPORTED_100baseT_Full;
 164                         break;
 165                 default:
 166                         break;
 167                 }
 168
 169                 ecmd->advertising = ADVERTISED_Autoneg;
 170                 if (hw->phy.autoneg_advertised) {
 171                         if (hw->phy.autoneg_advertised &
 172                             IXGBE_LINK_SPEED_100_FULL)
 173                                 ecmd->advertising |= ADVERTISED_100baseT_Full;
 174                         if (hw->phy.autoneg_advertised &
 175                             IXGBE_LINK_SPEED_10GB_FULL)
 176                                 ecmd->advertising |= ADVERTISED_10000baseT_Full;
 177                         if (hw->phy.autoneg_advertised &
 178                             IXGBE_LINK_SPEED_1GB_FULL)
 179                                 ecmd->advertising |= ADVERTISED_1000baseT_Full;
 180                 } else {
 181                         /*
 182                          * Default advertised modes in case
 183                          * phy.autoneg_advertised isn't set.
 184                          */
 185                         ecmd->advertising |= (ADVERTISED_10000baseT_Full |
 186                                               ADVERTISED_1000baseT_Full);
 187                         if (hw->mac.type == ixgbe_mac_X540)
 188                                 ecmd->advertising |= ADVERTISED_100baseT_Full;
 189                 }
 190
 191                 if (hw->phy.media_type == ixgbe_media_type_copper) {
 192                         ecmd->supported |= SUPPORTED_TP;
 193                         ecmd->advertising |= ADVERTISED_TP;
 194                         ecmd->port = PORT_TP;
 195                 } else {
 196                         ecmd->supported |= SUPPORTED_FIBRE;
 197                         ecmd->advertising |= ADVERTISED_FIBRE;
 198                         ecmd->port = PORT_FIBRE;
 199                 }
 200         } else if (hw->phy.media_type == ixgbe_media_type_backplane) {
 201                 /* Set as FIBRE until SERDES defined in kernel */
 202                 if (hw->device_id == IXGBE_DEV_ID_82598_BX) {
 203                         ecmd->supported = (SUPPORTED_1000baseT_Full |
 204                                            SUPPORTED_FIBRE);
 205                         ecmd->advertising = (ADVERTISED_1000baseT_Full |
 206                                              ADVERTISED_FIBRE);
 207                         ecmd->port = PORT_FIBRE;
 208                         ecmd->autoneg = AUTONEG_DISABLE;
 209                 } else if ((hw->device_id == IXGBE_DEV_ID_82599_COMBO_BACKPLANE) ||
 210                            (hw->device_id == IXGBE_DEV_ID_82599_KX4_MEZZ)) {
 211                         ecmd->supported |= (SUPPORTED_1000baseT_Full |
 212                                             SUPPORTED_Autoneg |
 213                                             SUPPORTED_FIBRE);
 214                         ecmd->advertising = (ADVERTISED_10000baseT_Full |
 215                                              ADVERTISED_1000baseT_Full |
 216                                              ADVERTISED_Autoneg |
 217                                              ADVERTISED_FIBRE);
 218                         ecmd->port = PORT_FIBRE;
 219                 } else {
 220                         ecmd->supported |= (SUPPORTED_1000baseT_Full |
 221                                             SUPPORTED_FIBRE);
 222                         ecmd->advertising = (ADVERTISED_10000baseT_Full |
 223                                              ADVERTISED_1000baseT_Full |
 224                                              ADVERTISED_FIBRE);
 225                         ecmd->port = PORT_FIBRE;
 226                 }
 227         } else {
 228                 ecmd->supported |= SUPPORTED_FIBRE;
 229                 ecmd->advertising = (ADVERTISED_10000baseT_Full |
 230                                      ADVERTISED_FIBRE);
 231                 ecmd->port = PORT_FIBRE;
 232                 ecmd->autoneg = AUTONEG_DISABLE;
 233         }
 234
 235         /* Get PHY type */
 236         switch (adapter->hw.phy.type) {
 237         case ixgbe_phy_tn:
 238         case ixgbe_phy_aq:
 239         case ixgbe_phy_cu_unknown:
 240                 /* Copper 10G-BASET */
 241                 ecmd->port = PORT_TP;
 242                 break;
 243         case ixgbe_phy_qt:
 244                 ecmd->port = PORT_FIBRE;
 245                 break;
 246         case ixgbe_phy_nl:
 247         case ixgbe_phy_sfp_passive_tyco:
 248         case ixgbe_phy_sfp_passive_unknown:
 249         case ixgbe_phy_sfp_ftl:
 250         case ixgbe_phy_sfp_avago:
 251         case ixgbe_phy_sfp_intel:
 252         case ixgbe_phy_sfp_unknown:
 253                 switch (adapter->hw.phy.sfp_type) {
 254                 /* SFP+ devices, further checking needed */
 255                 case ixgbe_sfp_type_da_cu:
 256                 case ixgbe_sfp_type_da_cu_core0:
 257                 case ixgbe_sfp_type_da_cu_core1:
 258                         ecmd->port = PORT_DA;
 259                         break;
 260                 case ixgbe_sfp_type_sr:
 261                 case ixgbe_sfp_type_lr:
 262                 case ixgbe_sfp_type_srlr_core0:
 263                 case ixgbe_sfp_type_srlr_core1:
 264                         ecmd->port = PORT_FIBRE;
 265                         break;
 266                 case ixgbe_sfp_type_not_present:
 267                         ecmd->port = PORT_NONE;
 268                         break;
 269                 case ixgbe_sfp_type_1g_cu_core0:
 270                 case ixgbe_sfp_type_1g_cu_core1:
 271                         ecmd->port = PORT_TP;
 272                         ecmd->supported = SUPPORTED_TP;
 273                         ecmd->advertising = (ADVERTISED_1000baseT_Full |
 274                                              ADVERTISED_TP);
 275                         break;
 276                 case ixgbe_sfp_type_unknown:
 277                 default:
 278                         ecmd->port = PORT_OTHER;
 279                         break;
 280                 }
 281                 break;
 282         case ixgbe_phy_xaui:
 283                 ecmd->port = PORT_NONE;
 284                 break;
 285         case ixgbe_phy_unknown:
 286         case ixgbe_phy_generic:
 287         case ixgbe_phy_sfp_unsupported:
 288         default:
 289                 ecmd->port = PORT_OTHER;
 290                 break;
 291         }
 292
 293         hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
 294         if (link_up) {
 295                 switch (link_speed) {
 296                 case IXGBE_LINK_SPEED_10GB_FULL:
 297                         ethtool_cmd_speed_set(ecmd, SPEED_10000);
 298                         break;
 299                 case IXGBE_LINK_SPEED_1GB_FULL:
 300                         ethtool_cmd_speed_set(ecmd, SPEED_1000);
 301                         break;
 302                 case IXGBE_LINK_SPEED_100_FULL:
 303                         ethtool_cmd_speed_set(ecmd, SPEED_100);
 304                         break;
 305                 default:
 306                         break;
 307                 }
 308                 ecmd->duplex = DUPLEX_FULL;
 309         } else {
 310                 ethtool_cmd_speed_set(ecmd, -1);
 311                 ecmd->duplex = -1;
 312         }
 313
 314         return 0;
 315 }
 316
 317 static int ixgbe_set_settings(struct net_device *netdev,
 318                               struct ethtool_cmd *ecmd)
 319 {
 320         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 321         struct ixgbe_hw *hw = &adapter->hw;
 322         u32 advertised, old;
 323         s32 err = 0;
 324
 325         if ((hw->phy.media_type == ixgbe_media_type_copper) ||
 326             (hw->phy.multispeed_fiber)) {
 327                 /* 10000/copper and 1000/copper must autoneg
 328                  * this function does not support any duplex forcing, but can
 329                  * limit the advertising of the adapter to only 10000 or 1000 */
 330                 if (ecmd->autoneg == AUTONEG_DISABLE)
 331                         return -EINVAL;
 332
 333                 old = hw->phy.autoneg_advertised;
 334                 advertised = 0;
 335                 if (ecmd->advertising & ADVERTISED_10000baseT_Full)
 336                         advertised |= IXGBE_LINK_SPEED_10GB_FULL;
 337
 338                 if (ecmd->advertising & ADVERTISED_1000baseT_Full)
 339                         advertised |= IXGBE_LINK_SPEED_1GB_FULL;
 340
 341                 if (ecmd->advertising & ADVERTISED_100baseT_Full)
 342                         advertised |= IXGBE_LINK_SPEED_100_FULL;
 343
 344                 if (old == advertised)
 345                         return err;
 346                 /* this sets the link speed and restarts auto-neg */
 347                 hw->mac.autotry_restart = true;
 348                 err = hw->mac.ops.setup_link(hw, advertised, true, true);
 349                 if (err) {
 350                         e_info(probe, "setup link failed with code %d\n", err);
 351                         hw->mac.ops.setup_link(hw, old, true, true);
 352                 }
 353         } else {
 354                 /* in this case we currently only support 10Gb/FULL */
 355                 u32 speed = ethtool_cmd_speed(ecmd);
 356                 if ((ecmd->autoneg == AUTONEG_ENABLE) ||
 357                     (ecmd->advertising != ADVERTISED_10000baseT_Full) ||
 358                     (speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL))
 359                         return -EINVAL;
 360         }
 361
 362         return err;
 363 }
 364
 365 static void ixgbe_get_pauseparam(struct net_device *netdev,
 366                                  struct ethtool_pauseparam *pause)
 367 {
 368         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 369         struct ixgbe_hw *hw = &adapter->hw;
 370
 371         /*
 372          * Flow Control Autoneg isn't on if
 373          *  - we didn't ask for it OR
 374          *  - it failed, we know this by tx & rx being off
 375          */
 376         if (hw->fc.disable_fc_autoneg ||
 377             (hw->fc.current_mode == ixgbe_fc_none))
 378                 pause->autoneg = 0;
 379         else
 380                 pause->autoneg = 1;
 381
 382         if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
 383                 pause->rx_pause = 1;
 384         } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) {
 385                 pause->tx_pause = 1;
 386         } else if (hw->fc.current_mode == ixgbe_fc_full) {
 387                 pause->rx_pause = 1;
 388                 pause->tx_pause = 1;
 389 #ifdef CONFIG_DCB
 390         } else if (hw->fc.current_mode == ixgbe_fc_pfc) {
 391                 pause->rx_pause = 0;
 392                 pause->tx_pause = 0;
 393 #endif
 394         }
 395 }
 396
 397 static int ixgbe_set_pauseparam(struct net_device *netdev,
 398                                 struct ethtool_pauseparam *pause)
 399 {
 400         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 401         struct ixgbe_hw *hw = &adapter->hw;
 402         struct ixgbe_fc_info fc;
 403
 404 #ifdef CONFIG_DCB
 405         if (adapter->dcb_cfg.pfc_mode_enable ||
 406                 ((hw->mac.type == ixgbe_mac_82598EB) &&
 407                 (adapter->flags & IXGBE_FLAG_DCB_ENABLED)))
 408                 return -EINVAL;
 409
 410 #endif
 411         fc = hw->fc;
 412
 413         if (pause->autoneg != AUTONEG_ENABLE)
 414                 fc.disable_fc_autoneg = true;
 415         else
 416                 fc.disable_fc_autoneg = false;
 417
 418         if ((pause->rx_pause && pause->tx_pause) || pause->autoneg)
 419                 fc.requested_mode = ixgbe_fc_full;
 420         else if (pause->rx_pause && !pause->tx_pause)
 421                 fc.requested_mode = ixgbe_fc_rx_pause;
 422         else if (!pause->rx_pause && pause->tx_pause)
 423                 fc.requested_mode = ixgbe_fc_tx_pause;
 424         else if (!pause->rx_pause && !pause->tx_pause)
 425                 fc.requested_mode = ixgbe_fc_none;
 426         else
 427                 return -EINVAL;
 428
 429 #ifdef CONFIG_DCB
 430         adapter->last_lfc_mode = fc.requested_mode;
 431 #endif
 432
 433         /* if the thing changed then we'll update and use new autoneg */
 434         if (memcmp(&fc, &hw->fc, sizeof(struct ixgbe_fc_info))) {
 435                 hw->fc = fc;
 436                 if (netif_running(netdev))
 437                         ixgbe_reinit_locked(adapter);
 438                 else
 439                         ixgbe_reset(adapter);
 440         }
 441
 442         return 0;
 443 }
 444
 445 static u32 ixgbe_get_msglevel(struct net_device *netdev)
 446 {
 447         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 448         return adapter->msg_enable;
 449 }
 450
 451 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
 452 {
 453         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 454         adapter->msg_enable = data;
 455 }
 456
 457 static int ixgbe_get_regs_len(struct net_device *netdev)
 458 {
 459 #define IXGBE_REGS_LEN  1128
 460         return IXGBE_REGS_LEN * sizeof(u32);
 461 }
 462
 463 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
 464
 465 static void ixgbe_get_regs(struct net_device *netdev,
 466                            struct ethtool_regs *regs, void *p)
 467 {
 468         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 469         struct ixgbe_hw *hw = &adapter->hw;
 470         u32 *regs_buff = p;
 471         u8 i;
 472
 473         memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
 474
 475         regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
 476
 477         /* General Registers */
 478         regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
 479         regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
 480         regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
 481         regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
 482         regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
 483         regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
 484         regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
 485         regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
 486
 487         /* NVM Register */
 488         regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
 489         regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
 490         regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
 491         regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
 492         regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
 493         regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
 494         regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
 495         regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
 496         regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
 497         regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
 498
 499         /* Interrupt */
 500         /* don't read EICR because it can clear interrupt causes, instead
 501          * read EICS which is a shadow but doesn't clear EICR */
 502         regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
 503         regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
 504         regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
 505         regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
 506         regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
 507         regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
 508         regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
 509         regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
 510         regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
 511         regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
 512         regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
 513         regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
 514
 515         /* Flow Control */
 516         regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
 517         regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
 518         regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
 519         regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
 520         regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
 521         for (i = 0; i < 8; i++) {
 522                 switch (hw->mac.type) {
 523                 case ixgbe_mac_82598EB:
 524                         regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
 525                         regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
 526                         break;
 527                 case ixgbe_mac_82599EB:
 528                         regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL_82599(i));
 529                         regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH_82599(i));
 530                         break;
 531                 default:
 532                         break;
 533                 }
 534         }
 535         regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
 536         regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
 537
 538         /* Receive DMA */
 539         for (i = 0; i < 64; i++)
 540                 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 541         for (i = 0; i < 64; i++)
 542                 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 543         for (i = 0; i < 64; i++)
 544                 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 545         for (i = 0; i < 64; i++)
 546                 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 547         for (i = 0; i < 64; i++)
 548                 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 549         for (i = 0; i < 64; i++)
 550                 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 551         for (i = 0; i < 16; i++)
 552                 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 553         for (i = 0; i < 16; i++)
 554                 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 555         regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
 556         for (i = 0; i < 8; i++)
 557                 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
 558         regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
 559         regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
 560
 561         /* Receive */
 562         regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
 563         regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
 564         for (i = 0; i < 16; i++)
 565                 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
 566         for (i = 0; i < 16; i++)
 567                 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
 568         regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
 569         regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
 570         regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
 571         regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
 572         regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
 573         regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
 574         for (i = 0; i < 8; i++)
 575                 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
 576         for (i = 0; i < 8; i++)
 577                 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
 578         regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
 579
 580         /* Transmit */
 581         for (i = 0; i < 32; i++)
 582                 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 583         for (i = 0; i < 32; i++)
 584                 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 585         for (i = 0; i < 32; i++)
 586                 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 587         for (i = 0; i < 32; i++)
 588                 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 589         for (i = 0; i < 32; i++)
 590                 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 591         for (i = 0; i < 32; i++)
 592                 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 593         for (i = 0; i < 32; i++)
 594                 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
 595         for (i = 0; i < 32; i++)
 596                 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
 597         regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
 598         for (i = 0; i < 16; i++)
 599                 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
 600         regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
 601         for (i = 0; i < 8; i++)
 602                 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
 603         regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
 604
 605         /* Wake Up */
 606         regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
 607         regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
 608         regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
 609         regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
 610         regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
 611         regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
 612         regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
 613         regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
 614         regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0));
 615
 616         /* DCB */
 617         regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
 618         regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
 619         regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
 620         regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
 621         for (i = 0; i < 8; i++)
 622                 regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
 623         for (i = 0; i < 8; i++)
 624                 regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
 625         for (i = 0; i < 8; i++)
 626                 regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
 627         for (i = 0; i < 8; i++)
 628                 regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
 629         for (i = 0; i < 8; i++)
 630                 regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i));
 631         for (i = 0; i < 8; i++)
 632                 regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i));
 633
 634         /* Statistics */
 635         regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
 636         regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
 637         regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
 638         regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
 639         for (i = 0; i < 8; i++)
 640                 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
 641         regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
 642         regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
 643         regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
 644         regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
 645         regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
 646         regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
 647         regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
 648         for (i = 0; i < 8; i++)
 649                 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
 650         for (i = 0; i < 8; i++)
 651                 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
 652         for (i = 0; i < 8; i++)
 653                 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
 654         for (i = 0; i < 8; i++)
 655                 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
 656         regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
 657         regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
 658         regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
 659         regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
 660         regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
 661         regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
 662         regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
 663         regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
 664         regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
 665         regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
 666         regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
 667         regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
 668         for (i = 0; i < 8; i++)
 669                 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
 670         regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
 671         regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
 672         regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
 673         regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
 674         regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
 675         regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
 676         regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
 677         regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
 678         regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
 679         regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
 680         regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
 681         regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
 682         regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
 683         regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
 684         regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
 685         regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
 686         regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
 687         regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
 688         regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
 689         for (i = 0; i < 16; i++)
 690                 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
 691         for (i = 0; i < 16; i++)
 692                 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
 693         for (i = 0; i < 16; i++)
 694                 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
 695         for (i = 0; i < 16; i++)
 696                 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
 697
 698         /* MAC */
 699         regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
 700         regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
 701         regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
 702         regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
 703         regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
 704         regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
 705         regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
 706         regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
 707         regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
 708         regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
 709         regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
 710         regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
 711         regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
 712         regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
 713         regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
 714         regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
 715         regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
 716         regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
 717         regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
 718         regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
 719         regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
 720         regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
 721         regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
 722         regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
 723         regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
 724         regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
 725         regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
 726         regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
 727         regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
 728         regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
 729         regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
 730         regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
 731         regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
 732
 733         /* Diagnostic */
 734         regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
 735         for (i = 0; i < 8; i++)
 736                 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
 737         regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
 738         for (i = 0; i < 4; i++)
 739                 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
 740         regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
 741         regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
 742         for (i = 0; i < 8; i++)
 743                 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
 744         regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
 745         for (i = 0; i < 4; i++)
 746                 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
 747         regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
 748         regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
 749         regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
 750         regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
 751         regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
 752         regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
 753         regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
 754         regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
 755         regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
 756         regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
 757         regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
 758         for (i = 0; i < 8; i++)
 759                 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
 760         regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
 761         regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
 762         regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
 763         regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
 764         regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
 765         regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
 766         regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
 767         regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
 768         regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
 769 }
 770
 771 static int ixgbe_get_eeprom_len(struct net_device *netdev)
 772 {
 773         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 774         return adapter->hw.eeprom.word_size * 2;
 775 }
 776
 777 static int ixgbe_get_eeprom(struct net_device *netdev,
 778                             struct ethtool_eeprom *eeprom, u8 *bytes)
 779 {
 780         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 781         struct ixgbe_hw *hw = &adapter->hw;
 782         u16 *eeprom_buff;
 783         int first_word, last_word, eeprom_len;
 784         int ret_val = 0;
 785         u16 i;
 786
 787         if (eeprom->len == 0)
 788                 return -EINVAL;
 789
 790         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 791
 792         first_word = eeprom->offset >> 1;
 793         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 794         eeprom_len = last_word - first_word + 1;
 795
 796         eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
 797         if (!eeprom_buff)
 798                 return -ENOMEM;
 799
 800         ret_val = hw->eeprom.ops.read_buffer(hw, first_word, eeprom_len,
 801                                              eeprom_buff);
 802
 803         /* Device's eeprom is always little-endian, word addressable */
 804         for (i = 0; i < eeprom_len; i++)
 805                 le16_to_cpus(&eeprom_buff[i]);
 806
 807         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
 808         kfree(eeprom_buff);
 809
 810         return ret_val;
 811 }
 812
 813 static void ixgbe_get_drvinfo(struct net_device *netdev,
 814                               struct ethtool_drvinfo *drvinfo)
 815 {
 816         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 817         char firmware_version[32];
 818
 819         strncpy(drvinfo->driver, ixgbe_driver_name,
 820                 sizeof(drvinfo->driver) - 1);
 821         strncpy(drvinfo->version, ixgbe_driver_version,
 822                 sizeof(drvinfo->version) - 1);
 823
 824         snprintf(firmware_version, sizeof(firmware_version), "%d.%d-%d",
 825                  (adapter->eeprom_version & 0xF000) >> 12,
 826                  (adapter->eeprom_version & 0x0FF0) >> 4,
 827                  adapter->eeprom_version & 0x000F);
 828
 829         strncpy(drvinfo->fw_version, firmware_version,
 830                 sizeof(drvinfo->fw_version));
 831         strncpy(drvinfo->bus_info, pci_name(adapter->pdev),
 832                 sizeof(drvinfo->bus_info));
 833         drvinfo->n_stats = IXGBE_STATS_LEN;
 834         drvinfo->testinfo_len = IXGBE_TEST_LEN;
 835         drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
 836 }
 837
 838 static void ixgbe_get_ringparam(struct net_device *netdev,
 839                                 struct ethtool_ringparam *ring)
 840 {
 841         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 842         struct ixgbe_ring *tx_ring = adapter->tx_ring[0];
 843         struct ixgbe_ring *rx_ring = adapter->rx_ring[0];
 844
 845         ring->rx_max_pending = IXGBE_MAX_RXD;
 846         ring->tx_max_pending = IXGBE_MAX_TXD;
 847         ring->rx_mini_max_pending = 0;
 848         ring->rx_jumbo_max_pending = 0;
 849         ring->rx_pending = rx_ring->count;
 850         ring->tx_pending = tx_ring->count;
 851         ring->rx_mini_pending = 0;
 852         ring->rx_jumbo_pending = 0;
 853 }
 854
 855 static int ixgbe_set_ringparam(struct net_device *netdev,
 856                                struct ethtool_ringparam *ring)
 857 {
 858         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 859         struct ixgbe_ring *temp_tx_ring, *temp_rx_ring;
 860         int i, err = 0;
 861         u32 new_rx_count, new_tx_count;
 862         bool need_update = false;
 863
 864         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 865                 return -EINVAL;
 866
 867         new_rx_count = max(ring->rx_pending, (u32)IXGBE_MIN_RXD);
 868         new_rx_count = min(new_rx_count, (u32)IXGBE_MAX_RXD);
 869         new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
 870
 871         new_tx_count = max(ring->tx_pending, (u32)IXGBE_MIN_TXD);
 872         new_tx_count = min(new_tx_count, (u32)IXGBE_MAX_TXD);
 873         new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
 874
 875         if ((new_tx_count == adapter->tx_ring[0]->count) &&
 876             (new_rx_count == adapter->rx_ring[0]->count)) {
 877                 /* nothing to do */
 878                 return 0;
 879         }
 880
 881         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
 882                 usleep_range(1000, 2000);
 883
 884         if (!netif_running(adapter->netdev)) {
 885                 for (i = 0; i < adapter->num_tx_queues; i++)
 886                         adapter->tx_ring[i]->count = new_tx_count;
 887                 for (i = 0; i < adapter->num_rx_queues; i++)
 888                         adapter->rx_ring[i]->count = new_rx_count;
 889                 adapter->tx_ring_count = new_tx_count;
 890                 adapter->rx_ring_count = new_rx_count;
 891                 goto clear_reset;
 892         }
 893
 894         temp_tx_ring = vmalloc(adapter->num_tx_queues * sizeof(struct ixgbe_ring));
 895         if (!temp_tx_ring) {
 896                 err = -ENOMEM;
 897                 goto clear_reset;
 898         }
 899
 900         if (new_tx_count != adapter->tx_ring_count) {
 901                 for (i = 0; i < adapter->num_tx_queues; i++) {
 902                         memcpy(&temp_tx_ring[i], adapter->tx_ring[i],
 903                                sizeof(struct ixgbe_ring));
 904                         temp_tx_ring[i].count = new_tx_count;
 905                         err = ixgbe_setup_tx_resources(&temp_tx_ring[i]);
 906                         if (err) {
 907                                 while (i) {
 908                                         i--;
 909                                         ixgbe_free_tx_resources(&temp_tx_ring[i]);
 910                                 }
 911                                 goto clear_reset;
 912                         }
 913                 }
 914                 need_update = true;
 915         }
 916
 917         temp_rx_ring = vmalloc(adapter->num_rx_queues * sizeof(struct ixgbe_ring));
 918         if (!temp_rx_ring) {
 919                 err = -ENOMEM;
 920                 goto err_setup;
 921         }
 922
 923         if (new_rx_count != adapter->rx_ring_count) {
 924                 for (i = 0; i < adapter->num_rx_queues; i++) {
 925                         memcpy(&temp_rx_ring[i], adapter->rx_ring[i],
 926                                sizeof(struct ixgbe_ring));
 927                         temp_rx_ring[i].count = new_rx_count;
 928                         err = ixgbe_setup_rx_resources(&temp_rx_ring[i]);
 929                         if (err) {
 930                                 while (i) {
 931                                         i--;
 932                                         ixgbe_free_rx_resources(&temp_rx_ring[i]);
 933                                 }
 934                                 goto err_setup;
 935                         }
 936                 }
 937                 need_update = true;
 938         }
 939
 940         /* if rings need to be updated, here's the place to do it in one shot */
 941         if (need_update) {
 942                 ixgbe_down(adapter);
 943
 944                 /* tx */
 945                 if (new_tx_count != adapter->tx_ring_count) {
 946                         for (i = 0; i < adapter->num_tx_queues; i++) {
 947                                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
 948                                 memcpy(adapter->tx_ring[i], &temp_tx_ring[i],
 949                                        sizeof(struct ixgbe_ring));
 950                         }
 951                         adapter->tx_ring_count = new_tx_count;
 952                 }
 953
 954                 /* rx */
 955                 if (new_rx_count != adapter->rx_ring_count) {
 956                         for (i = 0; i < adapter->num_rx_queues; i++) {
 957                                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
 958                                 memcpy(adapter->rx_ring[i], &temp_rx_ring[i],
 959                                        sizeof(struct ixgbe_ring));
 960                         }
 961                         adapter->rx_ring_count = new_rx_count;
 962                 }
 963                 ixgbe_up(adapter);
 964         }
 965
 966         vfree(temp_rx_ring);
 967 err_setup:
 968         vfree(temp_tx_ring);
 969 clear_reset:
 970         clear_bit(__IXGBE_RESETTING, &adapter->state);
 971         return err;
 972 }
 973
 974 static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
 975 {
 976         switch (sset) {
 977         case ETH_SS_TEST:
 978                 return IXGBE_TEST_LEN;
 979         case ETH_SS_STATS:
 980                 return IXGBE_STATS_LEN;
 981         default:
 982                 return -EOPNOTSUPP;
 983         }
 984 }
 985
 986 static void ixgbe_get_ethtool_stats(struct net_device *netdev,
 987                                     struct ethtool_stats *stats, u64 *data)
 988 {
 989         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 990         struct rtnl_link_stats64 temp;
 991         const struct rtnl_link_stats64 *net_stats;
 992         unsigned int start;
 993         struct ixgbe_ring *ring;
 994         int i, j;
 995         char *p = NULL;
 996
 997         ixgbe_update_stats(adapter);
 998         net_stats = dev_get_stats(netdev, &temp);
 999         for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1000                 switch (ixgbe_gstrings_stats[i].type) {
1001                 case NETDEV_STATS:
1002                         p = (char *) net_stats +
1003                                         ixgbe_gstrings_stats[i].stat_offset;
1004                         break;
1005                 case IXGBE_STATS:
1006                         p = (char *) adapter +
1007                                         ixgbe_gstrings_stats[i].stat_offset;
1008                         break;
1009                 }
1010
1011                 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
1012                            sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1013         }
1014         for (j = 0; j < adapter->num_tx_queues; j++) {
1015                 ring = adapter->tx_ring[j];
1016                 do {
1017                         start = u64_stats_fetch_begin_bh(&ring->syncp);
1018                         data[i]   = ring->stats.packets;
1019                         data[i+1] = ring->stats.bytes;
1020                 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1021                 i += 2;
1022         }
1023         for (j = 0; j < adapter->num_rx_queues; j++) {
1024                 ring = adapter->rx_ring[j];
1025                 do {
1026                         start = u64_stats_fetch_begin_bh(&ring->syncp);
1027                         data[i]   = ring->stats.packets;
1028                         data[i+1] = ring->stats.bytes;
1029                 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1030                 i += 2;
1031         }
1032         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1033                 for (j = 0; j < MAX_TX_PACKET_BUFFERS; j++) {
1034                         data[i++] = adapter->stats.pxontxc[j];
1035                         data[i++] = adapter->stats.pxofftxc[j];
1036                 }
1037                 for (j = 0; j < MAX_RX_PACKET_BUFFERS; j++) {
1038                         data[i++] = adapter->stats.pxonrxc[j];
1039                         data[i++] = adapter->stats.pxoffrxc[j];
1040                 }
1041         }
1042 }
1043
1044 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
1045                               u8 *data)
1046 {
1047         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1048         char *p = (char *)data;
1049         int i;
1050
1051         switch (stringset) {
1052         case ETH_SS_TEST:
1053                 memcpy(data, *ixgbe_gstrings_test,
1054                        IXGBE_TEST_LEN * ETH_GSTRING_LEN);
1055                 break;
1056         case ETH_SS_STATS:
1057                 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1058                         memcpy(p, ixgbe_gstrings_stats[i].stat_string,
1059                                ETH_GSTRING_LEN);
1060                         p += ETH_GSTRING_LEN;
1061                 }
1062                 for (i = 0; i < adapter->num_tx_queues; i++) {
1063                         sprintf(p, "tx_queue_%u_packets", i);
1064                         p += ETH_GSTRING_LEN;
1065                         sprintf(p, "tx_queue_%u_bytes", i);
1066                         p += ETH_GSTRING_LEN;
1067                 }
1068                 for (i = 0; i < adapter->num_rx_queues; i++) {
1069                         sprintf(p, "rx_queue_%u_packets", i);
1070                         p += ETH_GSTRING_LEN;
1071                         sprintf(p, "rx_queue_%u_bytes", i);
1072                         p += ETH_GSTRING_LEN;
1073                 }
1074                 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1075                         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1076                                 sprintf(p, "tx_pb_%u_pxon", i);
1077                                 p += ETH_GSTRING_LEN;
1078                                 sprintf(p, "tx_pb_%u_pxoff", i);
1079                                 p += ETH_GSTRING_LEN;
1080                         }
1081                         for (i = 0; i < MAX_RX_PACKET_BUFFERS; i++) {
1082                                 sprintf(p, "rx_pb_%u_pxon", i);
1083                                 p += ETH_GSTRING_LEN;
1084                                 sprintf(p, "rx_pb_%u_pxoff", i);
1085                                 p += ETH_GSTRING_LEN;
1086                         }
1087                 }
1088                 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
1089                 break;
1090         }
1091 }
1092
1093 static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data)
1094 {
1095         struct ixgbe_hw *hw = &adapter->hw;
1096         bool link_up;
1097         u32 link_speed = 0;
1098         *data = 0;
1099
1100         hw->mac.ops.check_link(hw, &link_speed, &link_up, true);
1101         if (link_up)
1102                 return *data;
1103         else
1104                 *data = 1;
1105         return *data;
1106 }
1107
1108 /* ethtool register test data */
1109 struct ixgbe_reg_test {
1110         u16 reg;
1111         u8  array_len;
1112         u8  test_type;
1113         u32 mask;
1114         u32 write;
1115 };
1116
1117 /* In the hardware, registers are laid out either singly, in arrays
1118  * spaced 0x40 bytes apart, or in contiguous tables.  We assume
1119  * most tests take place on arrays or single registers (handled
1120  * as a single-element array) and special-case the tables.
1121  * Table tests are always pattern tests.
1122  *
1123  * We also make provision for some required setup steps by specifying
1124  * registers to be written without any read-back testing.
1125  */
1126
1127 #define PATTERN_TEST    1
1128 #define SET_READ_TEST   2
1129 #define WRITE_NO_TEST   3
1130 #define TABLE32_TEST    4
1131 #define TABLE64_TEST_LO 5
1132 #define TABLE64_TEST_HI 6
1133
1134 /* default 82599 register test */
1135 static const struct ixgbe_reg_test reg_test_82599[] = {
1136         { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1137         { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1138         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1139         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1140         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 },
1141         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1142         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1143         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1144         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1145         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1146         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1147         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1148         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1149         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1150         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 },
1151         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 },
1152         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1153         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF },
1154         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1155         { 0, 0, 0, 0 }
1156 };
1157
1158 /* default 82598 register test */
1159 static const struct ixgbe_reg_test reg_test_82598[] = {
1160         { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1161         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1162         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1163         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1164         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1165         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1166         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1167         /* Enable all four RX queues before testing. */
1168         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1169         /* RDH is read-only for 82598, only test RDT. */
1170         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1171         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1172         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1173         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1174         { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF },
1175         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1176         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1177         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1178         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 },
1179         { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 },
1180         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1181         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF },
1182         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1183         { 0, 0, 0, 0 }
1184 };
1185
1186 static bool reg_pattern_test(struct ixgbe_adapter *adapter, u64 *data, int reg,
1187                              u32 mask, u32 write)
1188 {
1189         u32 pat, val, before;
1190         static const u32 test_pattern[] = {
1191                 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1192
1193         for (pat = 0; pat < ARRAY_SIZE(test_pattern); pat++) {
1194                 before = readl(adapter->hw.hw_addr + reg);
1195                 writel((test_pattern[pat] & write),
1196                        (adapter->hw.hw_addr + reg));
1197                 val = readl(adapter->hw.hw_addr + reg);
1198                 if (val != (test_pattern[pat] & write & mask)) {
1199                         e_err(drv, "pattern test reg %04X failed: got "
1200                               "0x%08X expected 0x%08X\n",
1201                               reg, val, (test_pattern[pat] & write & mask));
1202                         *data = reg;
1203                         writel(before, adapter->hw.hw_addr + reg);
1204                         return 1;
1205                 }
1206                 writel(before, adapter->hw.hw_addr + reg);
1207         }
1208         return 0;
1209 }
1210
1211 static bool reg_set_and_check(struct ixgbe_adapter *adapter, u64 *data, int reg,
1212                               u32 mask, u32 write)
1213 {
1214         u32 val, before;
1215         before = readl(adapter->hw.hw_addr + reg);
1216         writel((write & mask), (adapter->hw.hw_addr + reg));
1217         val = readl(adapter->hw.hw_addr + reg);
1218         if ((write & mask) != (val & mask)) {
1219                 e_err(drv, "set/check reg %04X test failed: got 0x%08X "
1220                       "expected 0x%08X\n", reg, (val & mask), (write & mask));
1221                 *data = reg;
1222                 writel(before, (adapter->hw.hw_addr + reg));
1223                 return 1;
1224         }
1225         writel(before, (adapter->hw.hw_addr + reg));
1226         return 0;
1227 }
1228
1229 #define REG_PATTERN_TEST(reg, mask, write)                                    \
1230         do {                                                                  \
1231                 if (reg_pattern_test(adapter, data, reg, mask, write))        \
1232                         return 1;                                             \
1233         } while (0)                                                           \
1234
1235
1236 #define REG_SET_AND_CHECK(reg, mask, write)                                   \
1237         do {                                                                  \
1238                 if (reg_set_and_check(adapter, data, reg, mask, write))       \
1239                         return 1;                                             \
1240         } while (0)                                                           \
1241
1242 static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
1243 {
1244         const struct ixgbe_reg_test *test;
1245         u32 value, before, after;
1246         u32 i, toggle;
1247
1248         switch (adapter->hw.mac.type) {
1249         case ixgbe_mac_82598EB:
1250                 toggle = 0x7FFFF3FF;
1251                 test = reg_test_82598;
1252                 break;
1253         case ixgbe_mac_82599EB:
1254         case ixgbe_mac_X540:
1255                 toggle = 0x7FFFF30F;
1256                 test = reg_test_82599;
1257                 break;
1258         default:
1259                 *data = 1;
1260                 return 1;
1261                 break;
1262         }
1263
1264         /*
1265          * Because the status register is such a special case,
1266          * we handle it separately from the rest of the register
1267          * tests.  Some bits are read-only, some toggle, and some
1268          * are writeable on newer MACs.
1269          */
1270         before = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS);
1271         value = (IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle);
1272         IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, toggle);
1273         after = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle;
1274         if (value != after) {
1275                 e_err(drv, "failed STATUS register test got: 0x%08X "
1276                       "expected: 0x%08X\n", after, value);
1277                 *data = 1;
1278                 return 1;
1279         }
1280         /* restore previous status */
1281         IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, before);
1282
1283         /*
1284          * Perform the remainder of the register test, looping through
1285          * the test table until we either fail or reach the null entry.
1286          */
1287         while (test->reg) {
1288                 for (i = 0; i < test->array_len; i++) {
1289                         switch (test->test_type) {
1290                         case PATTERN_TEST:
1291                                 REG_PATTERN_TEST(test->reg + (i * 0x40),
1292                                                  test->mask,
1293                                                  test->write);
1294                                 break;
1295                         case SET_READ_TEST:
1296                                 REG_SET_AND_CHECK(test->reg + (i * 0x40),
1297                                                   test->mask,
1298                                                   test->write);
1299                                 break;
1300                         case WRITE_NO_TEST:
1301                                 writel(test->write,
1302                                        (adapter->hw.hw_addr + test->reg)
1303                                        + (i * 0x40));
1304                                 break;
1305                         case TABLE32_TEST:
1306                                 REG_PATTERN_TEST(test->reg + (i * 4),
1307                                                  test->mask,
1308                                                  test->write);
1309                                 break;
1310                         case TABLE64_TEST_LO:
1311                                 REG_PATTERN_TEST(test->reg + (i * 8),
1312                                                  test->mask,
1313                                                  test->write);
1314                                 break;
1315                         case TABLE64_TEST_HI:
1316                                 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1317                                                  test->mask,
1318                                                  test->write);
1319                                 break;
1320                         }
1321                 }
1322                 test++;
1323         }
1324
1325         *data = 0;
1326         return 0;
1327 }
1328
1329 static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data)
1330 {
1331         struct ixgbe_hw *hw = &adapter->hw;
1332         if (hw->eeprom.ops.validate_checksum(hw, NULL))
1333                 *data = 1;
1334         else
1335                 *data = 0;
1336         return *data;
1337 }
1338
1339 static irqreturn_t ixgbe_test_intr(int irq, void *data)
1340 {
1341         struct net_device *netdev = (struct net_device *) data;
1342         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1343
1344         adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR);
1345
1346         return IRQ_HANDLED;
1347 }
1348
1349 static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data)
1350 {
1351         struct net_device *netdev = adapter->netdev;
1352         u32 mask, i = 0, shared_int = true;
1353         u32 irq = adapter->pdev->irq;
1354
1355         *data = 0;
1356
1357         /* Hook up test interrupt handler just for this test */
1358         if (adapter->msix_entries) {
1359                 /* NOTE: we don't test MSI-X interrupts here, yet */
1360                 return 0;
1361         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1362                 shared_int = false;
1363                 if (request_irq(irq, ixgbe_test_intr, 0, netdev->name,
1364                                 netdev)) {
1365                         *data = 1;
1366                         return -1;
1367                 }
1368         } else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED,
1369                                 netdev->name, netdev)) {
1370                 shared_int = false;
1371         } else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED,
1372                                netdev->name, netdev)) {
1373                 *data = 1;
1374                 return -1;
1375         }
1376         e_info(hw, "testing %s interrupt\n", shared_int ?
1377                "shared" : "unshared");
1378
1379         /* Disable all the interrupts */
1380         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1381         usleep_range(10000, 20000);
1382
1383         /* Test each interrupt */
1384         for (; i < 10; i++) {
1385                 /* Interrupt to test */
1386                 mask = 1 << i;
1387
1388                 if (!shared_int) {
1389                         /*
1390                          * Disable the interrupts to be reported in
1391                          * the cause register and then force the same
1392                          * interrupt and see if one gets posted.  If
1393                          * an interrupt was posted to the bus, the
1394                          * test failed.
1395                          */
1396                         adapter->test_icr = 0;
1397                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1398                                         ~mask & 0x00007FFF);
1399                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1400                                         ~mask & 0x00007FFF);
1401                         usleep_range(10000, 20000);
1402
1403                         if (adapter->test_icr & mask) {
1404                                 *data = 3;
1405                                 break;
1406                         }
1407                 }
1408
1409                 /*
1410                  * Enable the interrupt to be reported in the cause
1411                  * register and then force the same interrupt and see
1412                  * if one gets posted.  If an interrupt was not posted
1413                  * to the bus, the test failed.
1414                  */
1415                 adapter->test_icr = 0;
1416                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1417                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
1418                 usleep_range(10000, 20000);
1419
1420                 if (!(adapter->test_icr &mask)) {
1421                         *data = 4;
1422                         break;
1423                 }
1424
1425                 if (!shared_int) {
1426                         /*
1427                          * Disable the other interrupts to be reported in
1428                          * the cause register and then force the other
1429                          * interrupts and see if any get posted.  If
1430                          * an interrupt was posted to the bus, the
1431                          * test failed.
1432                          */
1433                         adapter->test_icr = 0;
1434                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1435                                         ~mask & 0x00007FFF);
1436                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1437                                         ~mask & 0x00007FFF);
1438                         usleep_range(10000, 20000);
1439
1440                         if (adapter->test_icr) {
1441                                 *data = 5;
1442                                 break;
1443                         }
1444                 }
1445         }
1446
1447         /* Disable all the interrupts */
1448         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1449         usleep_range(10000, 20000);
1450
1451         /* Unhook test interrupt handler */
1452         free_irq(irq, netdev);
1453
1454         return *data;
1455 }
1456
1457 static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter)
1458 {
1459         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1460         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1461         struct ixgbe_hw *hw = &adapter->hw;
1462         u32 reg_ctl;
1463
1464         /* shut down the DMA engines now so they can be reinitialized later */
1465
1466         /* first Rx */
1467         reg_ctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1468         reg_ctl &= ~IXGBE_RXCTRL_RXEN;
1469         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, reg_ctl);
1470         ixgbe_disable_rx_queue(adapter, rx_ring);
1471
1472         /* now Tx */
1473         reg_ctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx));
1474         reg_ctl &= ~IXGBE_TXDCTL_ENABLE;
1475         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx), reg_ctl);
1476
1477         switch (hw->mac.type) {
1478         case ixgbe_mac_82599EB:
1479         case ixgbe_mac_X540:
1480                 reg_ctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
1481                 reg_ctl &= ~IXGBE_DMATXCTL_TE;
1482                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg_ctl);
1483                 break;
1484         default:
1485                 break;
1486         }
1487
1488         ixgbe_reset(adapter);
1489
1490         ixgbe_free_tx_resources(&adapter->test_tx_ring);
1491         ixgbe_free_rx_resources(&adapter->test_rx_ring);
1492 }
1493
1494 static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter)
1495 {
1496         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1497         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1498         u32 rctl, reg_data;
1499         int ret_val;
1500         int err;
1501
1502         /* Setup Tx descriptor ring and Tx buffers */
1503         tx_ring->count = IXGBE_DEFAULT_TXD;
1504         tx_ring->queue_index = 0;
1505         tx_ring->dev = &adapter->pdev->dev;
1506         tx_ring->netdev = adapter->netdev;
1507         tx_ring->reg_idx = adapter->tx_ring[0]->reg_idx;
1508         tx_ring->numa_node = adapter->node;
1509
1510         err = ixgbe_setup_tx_resources(tx_ring);
1511         if (err)
1512                 return 1;
1513
1514         switch (adapter->hw.mac.type) {
1515         case ixgbe_mac_82599EB:
1516         case ixgbe_mac_X540:
1517                 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL);
1518                 reg_data |= IXGBE_DMATXCTL_TE;
1519                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data);
1520                 break;
1521         default:
1522                 break;
1523         }
1524
1525         ixgbe_configure_tx_ring(adapter, tx_ring);
1526
1527         /* Setup Rx Descriptor ring and Rx buffers */
1528         rx_ring->count = IXGBE_DEFAULT_RXD;
1529         rx_ring->queue_index = 0;
1530         rx_ring->dev = &adapter->pdev->dev;
1531         rx_ring->netdev = adapter->netdev;
1532         rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx;
1533         rx_ring->rx_buf_len = IXGBE_RXBUFFER_2048;
1534         rx_ring->numa_node = adapter->node;
1535
1536         err = ixgbe_setup_rx_resources(rx_ring);
1537         if (err) {
1538                 ret_val = 4;
1539                 goto err_nomem;
1540         }
1541
1542         rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1543         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl & ~IXGBE_RXCTRL_RXEN);
1544
1545         ixgbe_configure_rx_ring(adapter, rx_ring);
1546
1547         rctl |= IXGBE_RXCTRL_RXEN | IXGBE_RXCTRL_DMBYPS;
1548         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl);
1549
1550         return 0;
1551
1552 err_nomem:
1553         ixgbe_free_desc_rings(adapter);
1554         return ret_val;
1555 }
1556
1557 static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter)
1558 {
1559         struct ixgbe_hw *hw = &adapter->hw;
1560         u32 reg_data;
1561
1562         /* X540 needs to set the MACC.FLU bit to force link up */
1563         if (adapter->hw.mac.type == ixgbe_mac_X540) {
1564                 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_MACC);
1565                 reg_data |= IXGBE_MACC_FLU;
1566                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_MACC, reg_data);
1567         }
1568
1569         /* right now we only support MAC loopback in the driver */
1570         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1571         /* Setup MAC loopback */
1572         reg_data |= IXGBE_HLREG0_LPBK;
1573         IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1574
1575         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1576         reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE;
1577         IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, reg_data);
1578
1579         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_AUTOC);
1580         reg_data &= ~IXGBE_AUTOC_LMS_MASK;
1581         reg_data |= IXGBE_AUTOC_LMS_10G_LINK_NO_AN | IXGBE_AUTOC_FLU;
1582         IXGBE_WRITE_REG(&adapter->hw, IXGBE_AUTOC, reg_data);
1583         IXGBE_WRITE_FLUSH(&adapter->hw);
1584         usleep_range(10000, 20000);
1585
1586         /* Disable Atlas Tx lanes; re-enabled in reset path */
1587         if (hw->mac.type == ixgbe_mac_82598EB) {
1588                 u8 atlas;
1589
1590                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas);
1591                 atlas |= IXGBE_ATLAS_PDN_TX_REG_EN;
1592                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas);
1593
1594                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas);
1595                 atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
1596                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas);
1597
1598                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas);
1599                 atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
1600                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas);
1601
1602                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas);
1603                 atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
1604                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas);
1605         }
1606
1607         return 0;
1608 }
1609
1610 static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter)
1611 {
1612         u32 reg_data;
1613
1614         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1615         reg_data &= ~IXGBE_HLREG0_LPBK;
1616         IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1617 }
1618
1619 static void ixgbe_create_lbtest_frame(struct sk_buff *skb,
1620                                       unsigned int frame_size)
1621 {
1622         memset(skb->data, 0xFF, frame_size);
1623         frame_size &= ~1;
1624         memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1625         memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1626         memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1627 }
1628
1629 static int ixgbe_check_lbtest_frame(struct sk_buff *skb,
1630                                     unsigned int frame_size)
1631 {
1632         frame_size &= ~1;
1633         if (*(skb->data + 3) == 0xFF) {
1634                 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1635                     (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1636                         return 0;
1637                 }
1638         }
1639         return 13;
1640 }
1641
1642 static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring,
1643                                   struct ixgbe_ring *tx_ring,
1644                                   unsigned int size)
1645 {
1646         union ixgbe_adv_rx_desc *rx_desc;
1647         struct ixgbe_rx_buffer *rx_buffer_info;
1648         struct ixgbe_tx_buffer *tx_buffer_info;
1649         const int bufsz = rx_ring->rx_buf_len;
1650         u32 staterr;
1651         u16 rx_ntc, tx_ntc, count = 0;
1652
1653         /* initialize next to clean and descriptor values */
1654         rx_ntc = rx_ring->next_to_clean;
1655         tx_ntc = tx_ring->next_to_clean;
1656         rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc);
1657         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1658
1659         while (staterr & IXGBE_RXD_STAT_DD) {
1660                 /* check Rx buffer */
1661                 rx_buffer_info = &rx_ring->rx_buffer_info[rx_ntc];
1662
1663                 /* unmap Rx buffer, will be remapped by alloc_rx_buffers */
1664                 dma_unmap_single(rx_ring->dev,
1665                                  rx_buffer_info->dma,
1666                                  bufsz,
1667                                  DMA_FROM_DEVICE);
1668                 rx_buffer_info->dma = 0;
1669
1670                 /* verify contents of skb */
1671                 if (!ixgbe_check_lbtest_frame(rx_buffer_info->skb, size))
1672                         count++;
1673
1674                 /* unmap buffer on Tx side */
1675                 tx_buffer_info = &tx_ring->tx_buffer_info[tx_ntc];
1676                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
1677
1678                 /* increment Rx/Tx next to clean counters */
1679                 rx_ntc++;
1680                 if (rx_ntc == rx_ring->count)
1681                         rx_ntc = 0;
1682                 tx_ntc++;
1683                 if (tx_ntc == tx_ring->count)
1684                         tx_ntc = 0;
1685
1686                 /* fetch next descriptor */
1687                 rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc);
1688                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1689         }
1690
1691         /* re-map buffers to ring, store next to clean values */
1692         ixgbe_alloc_rx_buffers(rx_ring, count);
1693         rx_ring->next_to_clean = rx_ntc;
1694         tx_ring->next_to_clean = tx_ntc;
1695
1696         return count;
1697 }
1698
1699 static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter)
1700 {
1701         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1702         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1703         int i, j, lc, good_cnt, ret_val = 0;
1704         unsigned int size = 1024;
1705         netdev_tx_t tx_ret_val;
1706         struct sk_buff *skb;
1707
1708         /* allocate test skb */
1709         skb = alloc_skb(size, GFP_KERNEL);
1710         if (!skb)
1711                 return 11;
1712
1713         /* place data into test skb */
1714         ixgbe_create_lbtest_frame(skb, size);
1715         skb_put(skb, size);
1716
1717         /*
1718          * Calculate the loop count based on the largest descriptor ring
1719          * The idea is to wrap the largest ring a number of times using 64
1720          * send/receive pairs during each loop
1721          */
1722
1723         if (rx_ring->count <= tx_ring->count)
1724                 lc = ((tx_ring->count / 64) * 2) + 1;
1725         else
1726                 lc = ((rx_ring->count / 64) * 2) + 1;
1727
1728         for (j = 0; j <= lc; j++) {
1729                 /* reset count of good packets */
1730                 good_cnt = 0;
1731
1732                 /* place 64 packets on the transmit queue*/
1733                 for (i = 0; i < 64; i++) {
1734                         skb_get(skb);
1735                         tx_ret_val = ixgbe_xmit_frame_ring(skb,
1736                                                            adapter,
1737                                                            tx_ring);
1738                         if (tx_ret_val == NETDEV_TX_OK)
1739                                 good_cnt++;
1740                 }
1741
1742                 if (good_cnt != 64) {
1743                         ret_val = 12;
1744                         break;
1745                 }
1746
1747                 /* allow 200 milliseconds for packets to go from Tx to Rx */
1748                 msleep(200);
1749
1750                 good_cnt = ixgbe_clean_test_rings(rx_ring, tx_ring, size);
1751                 if (good_cnt != 64) {
1752                         ret_val = 13;
1753                         break;
1754                 }
1755         }
1756
1757         /* free the original skb */
1758         kfree_skb(skb);
1759
1760         return ret_val;
1761 }
1762
1763 static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data)
1764 {
1765         *data = ixgbe_setup_desc_rings(adapter);
1766         if (*data)
1767                 goto out;
1768         *data = ixgbe_setup_loopback_test(adapter);
1769         if (*data)
1770                 goto err_loopback;
1771         *data = ixgbe_run_loopback_test(adapter);
1772         ixgbe_loopback_cleanup(adapter);
1773
1774 err_loopback:
1775         ixgbe_free_desc_rings(adapter);
1776 out:
1777         return *data;
1778 }
1779
1780 static void ixgbe_diag_test(struct net_device *netdev,
1781                             struct ethtool_test *eth_test, u64 *data)
1782 {
1783         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1784         bool if_running = netif_running(netdev);
1785
1786         set_bit(__IXGBE_TESTING, &adapter->state);
1787         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1788                 /* Offline tests */
1789
1790                 e_info(hw, "offline testing starting\n");
1791
1792                 /* Link test performed before hardware reset so autoneg doesn't
1793                  * interfere with test result */
1794                 if (ixgbe_link_test(adapter, &data[4]))
1795                         eth_test->flags |= ETH_TEST_FL_FAILED;
1796
1797                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
1798                         int i;
1799                         for (i = 0; i < adapter->num_vfs; i++) {
1800                                 if (adapter->vfinfo[i].clear_to_send) {
1801                                         netdev_warn(netdev, "%s",
1802                                                     "offline diagnostic is not "
1803                                                     "supported when VFs are "
1804                                                     "present\n");
1805                                         data[0] = 1;
1806                                         data[1] = 1;
1807                                         data[2] = 1;
1808                                         data[3] = 1;
1809                                         eth_test->flags |= ETH_TEST_FL_FAILED;
1810                                         clear_bit(__IXGBE_TESTING,
1811                                                   &adapter->state);
1812                                         goto skip_ol_tests;
1813                                 }
1814                         }
1815                 }
1816
1817                 if (if_running)
1818                         /* indicate we're in test mode */
1819                         dev_close(netdev);
1820                 else
1821                         ixgbe_reset(adapter);
1822
1823                 e_info(hw, "register testing starting\n");
1824                 if (ixgbe_reg_test(adapter, &data[0]))
1825                         eth_test->flags |= ETH_TEST_FL_FAILED;
1826
1827                 ixgbe_reset(adapter);
1828                 e_info(hw, "eeprom testing starting\n");
1829                 if (ixgbe_eeprom_test(adapter, &data[1]))
1830                         eth_test->flags |= ETH_TEST_FL_FAILED;
1831
1832                 ixgbe_reset(adapter);
1833                 e_info(hw, "interrupt testing starting\n");
1834                 if (ixgbe_intr_test(adapter, &data[2]))
1835                         eth_test->flags |= ETH_TEST_FL_FAILED;
1836
1837                 /* If SRIOV or VMDq is enabled then skip MAC
1838                  * loopback diagnostic. */
1839                 if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED |
1840                                       IXGBE_FLAG_VMDQ_ENABLED)) {
1841                         e_info(hw, "Skip MAC loopback diagnostic in VT "
1842                                "mode\n");
1843                         data[3] = 0;
1844                         goto skip_loopback;
1845                 }
1846
1847                 ixgbe_reset(adapter);
1848                 e_info(hw, "loopback testing starting\n");
1849                 if (ixgbe_loopback_test(adapter, &data[3]))
1850                         eth_test->flags |= ETH_TEST_FL_FAILED;
1851
1852 skip_loopback:
1853                 ixgbe_reset(adapter);
1854
1855                 clear_bit(__IXGBE_TESTING, &adapter->state);
1856                 if (if_running)
1857                         dev_open(netdev);
1858         } else {
1859                 e_info(hw, "online testing starting\n");
1860                 /* Online tests */
1861                 if (ixgbe_link_test(adapter, &data[4]))
1862                         eth_test->flags |= ETH_TEST_FL_FAILED;
1863
1864                 /* Online tests aren't run; pass by default */
1865                 data[0] = 0;
1866                 data[1] = 0;
1867                 data[2] = 0;
1868                 data[3] = 0;
1869
1870                 clear_bit(__IXGBE_TESTING, &adapter->state);
1871         }
1872 skip_ol_tests:
1873         msleep_interruptible(4 * 1000);
1874 }
1875
1876 static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
1877                                struct ethtool_wolinfo *wol)
1878 {
1879         struct ixgbe_hw *hw = &adapter->hw;
1880         int retval = 1;
1881
1882         /* WOL not supported except for the following */
1883         switch(hw->device_id) {
1884         case IXGBE_DEV_ID_82599_SFP:
1885                 /* Only this subdevice supports WOL */
1886                 if (hw->subsystem_device_id != IXGBE_SUBDEV_ID_82599_SFP) {
1887                         wol->supported = 0;
1888                         break;
1889                 }
1890                 retval = 0;
1891                 break;
1892         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
1893                 /* All except this subdevice support WOL */
1894                 if (hw->subsystem_device_id ==
1895                     IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ) {
1896                         wol->supported = 0;
1897                         break;
1898                 }
1899                 retval = 0;
1900                 break;
1901         case IXGBE_DEV_ID_82599_KX4:
1902                 retval = 0;
1903                 break;
1904         default:
1905                 wol->supported = 0;
1906         }
1907
1908         return retval;
1909 }
1910
1911 static void ixgbe_get_wol(struct net_device *netdev,
1912                           struct ethtool_wolinfo *wol)
1913 {
1914         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1915
1916         wol->supported = WAKE_UCAST | WAKE_MCAST |
1917                          WAKE_BCAST | WAKE_MAGIC;
1918         wol->wolopts = 0;
1919
1920         if (ixgbe_wol_exclusion(adapter, wol) ||
1921             !device_can_wakeup(&adapter->pdev->dev))
1922                 return;
1923
1924         if (adapter->wol & IXGBE_WUFC_EX)
1925                 wol->wolopts |= WAKE_UCAST;
1926         if (adapter->wol & IXGBE_WUFC_MC)
1927                 wol->wolopts |= WAKE_MCAST;
1928         if (adapter->wol & IXGBE_WUFC_BC)
1929                 wol->wolopts |= WAKE_BCAST;
1930         if (adapter->wol & IXGBE_WUFC_MAG)
1931                 wol->wolopts |= WAKE_MAGIC;
1932 }
1933
1934 static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1935 {
1936         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1937
1938         if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1939                 return -EOPNOTSUPP;
1940
1941         if (ixgbe_wol_exclusion(adapter, wol))
1942                 return wol->wolopts ? -EOPNOTSUPP : 0;
1943
1944         adapter->wol = 0;
1945
1946         if (wol->wolopts & WAKE_UCAST)
1947                 adapter->wol |= IXGBE_WUFC_EX;
1948         if (wol->wolopts & WAKE_MCAST)
1949                 adapter->wol |= IXGBE_WUFC_MC;
1950         if (wol->wolopts & WAKE_BCAST)
1951                 adapter->wol |= IXGBE_WUFC_BC;
1952         if (wol->wolopts & WAKE_MAGIC)
1953                 adapter->wol |= IXGBE_WUFC_MAG;
1954
1955         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1956
1957         return 0;
1958 }
1959
1960 static int ixgbe_nway_reset(struct net_device *netdev)
1961 {
1962         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1963
1964         if (netif_running(netdev))
1965                 ixgbe_reinit_locked(adapter);
1966
1967         return 0;
1968 }
1969
1970 static int ixgbe_set_phys_id(struct net_device *netdev,
1971                              enum ethtool_phys_id_state state)
1972 {
1973         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1974         struct ixgbe_hw *hw = &adapter->hw;
1975
1976         switch (state) {
1977         case ETHTOOL_ID_ACTIVE:
1978                 adapter->led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
1979                 return 2;
1980
1981         case ETHTOOL_ID_ON:
1982                 hw->mac.ops.led_on(hw, IXGBE_LED_ON);
1983                 break;
1984
1985         case ETHTOOL_ID_OFF:
1986                 hw->mac.ops.led_off(hw, IXGBE_LED_ON);
1987                 break;
1988
1989         case ETHTOOL_ID_INACTIVE:
1990                 /* Restore LED settings */
1991                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, adapter->led_reg);
1992                 break;
1993         }
1994
1995         return 0;
1996 }
1997
1998 static int ixgbe_get_coalesce(struct net_device *netdev,
1999                               struct ethtool_coalesce *ec)
2000 {
2001         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2002
2003         ec->tx_max_coalesced_frames_irq = adapter->tx_work_limit;
2004
2005         /* only valid if in constant ITR mode */
2006         switch (adapter->rx_itr_setting) {
2007         case 0:
2008                 /* throttling disabled */
2009                 ec->rx_coalesce_usecs = 0;
2010                 break;
2011         case 1:
2012                 /* dynamic ITR mode */
2013                 ec->rx_coalesce_usecs = 1;
2014                 break;
2015         default:
2016                 /* fixed interrupt rate mode */
2017                 ec->rx_coalesce_usecs = 1000000/adapter->rx_eitr_param;
2018                 break;
2019         }
2020
2021         /* if in mixed tx/rx queues per vector mode, report only rx settings */
2022         if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count)
2023                 return 0;
2024
2025         /* only valid if in constant ITR mode */
2026         switch (adapter->tx_itr_setting) {
2027         case 0:
2028                 /* throttling disabled */
2029                 ec->tx_coalesce_usecs = 0;
2030                 break;
2031         case 1:
2032                 /* dynamic ITR mode */
2033                 ec->tx_coalesce_usecs = 1;
2034                 break;
2035         default:
2036                 ec->tx_coalesce_usecs = 1000000/adapter->tx_eitr_param;
2037                 break;
2038         }
2039
2040         return 0;
2041 }
2042
2043 /*
2044  * this function must be called before setting the new value of
2045  * rx_itr_setting
2046  */
2047 static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter,
2048                              struct ethtool_coalesce *ec)
2049 {
2050         struct net_device *netdev = adapter->netdev;
2051
2052         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
2053                 return false;
2054
2055         /* if interrupt rate is too high then disable RSC */
2056         if (ec->rx_coalesce_usecs != 1 &&
2057             ec->rx_coalesce_usecs <= 1000000/IXGBE_MAX_RSC_INT_RATE) {
2058                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2059                         e_info(probe, "rx-usecs set too low, "
2060                                       "disabling RSC\n");
2061                         adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
2062                         return true;
2063                 }
2064         } else {
2065                 /* check the feature flag value and enable RSC if necessary */
2066                 if ((netdev->features & NETIF_F_LRO) &&
2067                     !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
2068                         e_info(probe, "rx-usecs set to %d, "
2069                                       "re-enabling RSC\n",
2070                                ec->rx_coalesce_usecs);
2071                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
2072                         return true;
2073                 }
2074         }
2075         return false;
2076 }
2077
2078 static int ixgbe_set_coalesce(struct net_device *netdev,
2079                               struct ethtool_coalesce *ec)
2080 {
2081         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2082         struct ixgbe_q_vector *q_vector;
2083         int i;
2084         bool need_reset = false;
2085
2086         /* don't accept tx specific changes if we've got mixed RxTx vectors */
2087         if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count
2088            && ec->tx_coalesce_usecs)
2089                 return -EINVAL;
2090
2091         if (ec->tx_max_coalesced_frames_irq)
2092                 adapter->tx_work_limit = ec->tx_max_coalesced_frames_irq;
2093
2094         if (ec->rx_coalesce_usecs > 1) {
2095                 /* check the limits */
2096                 if ((1000000/ec->rx_coalesce_usecs > IXGBE_MAX_INT_RATE) ||
2097                     (1000000/ec->rx_coalesce_usecs < IXGBE_MIN_INT_RATE))
2098                         return -EINVAL;
2099
2100                 /* check the old value and enable RSC if necessary */
2101                 need_reset = ixgbe_update_rsc(adapter, ec);
2102
2103                 /* store the value in ints/second */
2104                 adapter->rx_eitr_param = 1000000/ec->rx_coalesce_usecs;
2105
2106                 /* static value of interrupt rate */
2107                 adapter->rx_itr_setting = adapter->rx_eitr_param;
2108                 /* clear the lower bit as its used for dynamic state */
2109                 adapter->rx_itr_setting &= ~1;
2110         } else if (ec->rx_coalesce_usecs == 1) {
2111                 /* check the old value and enable RSC if necessary */
2112                 need_reset = ixgbe_update_rsc(adapter, ec);
2113
2114                 /* 1 means dynamic mode */
2115                 adapter->rx_eitr_param = 20000;
2116                 adapter->rx_itr_setting = 1;
2117         } else {
2118                 /* check the old value and enable RSC if necessary */
2119                 need_reset = ixgbe_update_rsc(adapter, ec);
2120                 /*
2121                  * any other value means disable eitr, which is best
2122                  * served by setting the interrupt rate very high
2123                  */
2124                 adapter->rx_eitr_param = IXGBE_MAX_INT_RATE;
2125                 adapter->rx_itr_setting = 0;
2126         }
2127
2128         if (ec->tx_coalesce_usecs > 1) {
2129                 /*
2130                  * don't have to worry about max_int as above because
2131                  * tx vectors don't do hardware RSC (an rx function)
2132                  */
2133                 /* check the limits */
2134                 if ((1000000/ec->tx_coalesce_usecs > IXGBE_MAX_INT_RATE) ||
2135                     (1000000/ec->tx_coalesce_usecs < IXGBE_MIN_INT_RATE))
2136                         return -EINVAL;
2137
2138                 /* store the value in ints/second */
2139                 adapter->tx_eitr_param = 1000000/ec->tx_coalesce_usecs;
2140
2141                 /* static value of interrupt rate */
2142                 adapter->tx_itr_setting = adapter->tx_eitr_param;
2143
2144                 /* clear the lower bit as its used for dynamic state */
2145                 adapter->tx_itr_setting &= ~1;
2146         } else if (ec->tx_coalesce_usecs == 1) {
2147                 /* 1 means dynamic mode */
2148                 adapter->tx_eitr_param = 10000;
2149                 adapter->tx_itr_setting = 1;
2150         } else {
2151                 adapter->tx_eitr_param = IXGBE_MAX_INT_RATE;
2152                 adapter->tx_itr_setting = 0;
2153         }
2154
2155         /* MSI/MSIx Interrupt Mode */
2156         if (adapter->flags &
2157             (IXGBE_FLAG_MSIX_ENABLED | IXGBE_FLAG_MSI_ENABLED)) {
2158                 int num_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2159                 for (i = 0; i < num_vectors; i++) {
2160                         q_vector = adapter->q_vector[i];
2161                         if (q_vector->tx.count && !q_vector->rx.count)
2162                                 /* tx only */
2163                                 q_vector->eitr = adapter->tx_eitr_param;
2164                         else
2165                                 /* rx only or mixed */
2166                                 q_vector->eitr = adapter->rx_eitr_param;
2167                         q_vector->tx.work_limit = adapter->tx_work_limit;
2168                         ixgbe_write_eitr(q_vector);
2169                 }
2170         /* Legacy Interrupt Mode */
2171         } else {
2172                 q_vector = adapter->q_vector[0];
2173                 q_vector->eitr = adapter->rx_eitr_param;
2174                 q_vector->tx.work_limit = adapter->tx_work_limit;
2175                 ixgbe_write_eitr(q_vector);
2176         }
2177
2178         /*
2179          * do reset here at the end to make sure EITR==0 case is handled
2180          * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings
2181          * also locks in RSC enable/disable which requires reset
2182          */
2183         if (need_reset)
2184                 ixgbe_do_reset(netdev);
2185
2186         return 0;
2187 }
2188
2189 static int ixgbe_get_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2190                                         struct ethtool_rxnfc *cmd)
2191 {
2192         union ixgbe_atr_input *mask = &adapter->fdir_mask;
2193         struct ethtool_rx_flow_spec *fsp =
2194                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2195         struct hlist_node *node, *node2;
2196         struct ixgbe_fdir_filter *rule = NULL;
2197
2198         /* report total rule count */
2199         cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2200
2201         hlist_for_each_entry_safe(rule, node, node2,
2202                                   &adapter->fdir_filter_list, fdir_node) {
2203                 if (fsp->location <= rule->sw_idx)
2204                         break;
2205         }
2206
2207         if (!rule || fsp->location != rule->sw_idx)
2208                 return -EINVAL;
2209
2210         /* fill out the flow spec entry */
2211
2212         /* set flow type field */
2213         switch (rule->filter.formatted.flow_type) {
2214         case IXGBE_ATR_FLOW_TYPE_TCPV4:
2215                 fsp->flow_type = TCP_V4_FLOW;
2216                 break;
2217         case IXGBE_ATR_FLOW_TYPE_UDPV4:
2218                 fsp->flow_type = UDP_V4_FLOW;
2219                 break;
2220         case IXGBE_ATR_FLOW_TYPE_SCTPV4:
2221                 fsp->flow_type = SCTP_V4_FLOW;
2222                 break;
2223         case IXGBE_ATR_FLOW_TYPE_IPV4:
2224                 fsp->flow_type = IP_USER_FLOW;
2225                 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
2226                 fsp->h_u.usr_ip4_spec.proto = 0;
2227                 fsp->m_u.usr_ip4_spec.proto = 0;
2228                 break;
2229         default:
2230                 return -EINVAL;
2231         }
2232
2233         fsp->h_u.tcp_ip4_spec.psrc = rule->filter.formatted.src_port;
2234         fsp->m_u.tcp_ip4_spec.psrc = mask->formatted.src_port;
2235         fsp->h_u.tcp_ip4_spec.pdst = rule->filter.formatted.dst_port;
2236         fsp->m_u.tcp_ip4_spec.pdst = mask->formatted.dst_port;
2237         fsp->h_u.tcp_ip4_spec.ip4src = rule->filter.formatted.src_ip[0];
2238         fsp->m_u.tcp_ip4_spec.ip4src = mask->formatted.src_ip[0];
2239         fsp->h_u.tcp_ip4_spec.ip4dst = rule->filter.formatted.dst_ip[0];
2240         fsp->m_u.tcp_ip4_spec.ip4dst = mask->formatted.dst_ip[0];
2241         fsp->h_ext.vlan_tci = rule->filter.formatted.vlan_id;
2242         fsp->m_ext.vlan_tci = mask->formatted.vlan_id;
2243         fsp->h_ext.vlan_etype = rule->filter.formatted.flex_bytes;
2244         fsp->m_ext.vlan_etype = mask->formatted.flex_bytes;
2245         fsp->h_ext.data[1] = htonl(rule->filter.formatted.vm_pool);
2246         fsp->m_ext.data[1] = htonl(mask->formatted.vm_pool);
2247         fsp->flow_type |= FLOW_EXT;
2248
2249         /* record action */
2250         if (rule->action == IXGBE_FDIR_DROP_QUEUE)
2251                 fsp->ring_cookie = RX_CLS_FLOW_DISC;
2252         else
2253                 fsp->ring_cookie = rule->action;
2254
2255         return 0;
2256 }
2257
2258 static int ixgbe_get_ethtool_fdir_all(struct ixgbe_adapter *adapter,
2259                                       struct ethtool_rxnfc *cmd,
2260                                       u32 *rule_locs)
2261 {
2262         struct hlist_node *node, *node2;
2263         struct ixgbe_fdir_filter *rule;
2264         int cnt = 0;
2265
2266         /* report total rule count */
2267         cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2268
2269         hlist_for_each_entry_safe(rule, node, node2,
2270                                   &adapter->fdir_filter_list, fdir_node) {
2271                 if (cnt == cmd->rule_cnt)
2272                         return -EMSGSIZE;
2273                 rule_locs[cnt] = rule->sw_idx;
2274                 cnt++;
2275         }
2276
2277         return 0;
2278 }
2279
2280 static int ixgbe_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
2281                            void *rule_locs)
2282 {
2283         struct ixgbe_adapter *adapter = netdev_priv(dev);
2284         int ret = -EOPNOTSUPP;
2285
2286         switch (cmd->cmd) {
2287         case ETHTOOL_GRXRINGS:
2288                 cmd->data = adapter->num_rx_queues;
2289                 ret = 0;
2290                 break;
2291         case ETHTOOL_GRXCLSRLCNT:
2292                 cmd->rule_cnt = adapter->fdir_filter_count;
2293                 ret = 0;
2294                 break;
2295         case ETHTOOL_GRXCLSRULE:
2296                 ret = ixgbe_get_ethtool_fdir_entry(adapter, cmd);
2297                 break;
2298         case ETHTOOL_GRXCLSRLALL:
2299                 ret = ixgbe_get_ethtool_fdir_all(adapter, cmd,
2300                                                  (u32 *)rule_locs);
2301                 break;
2302         default:
2303                 break;
2304         }
2305
2306         return ret;
2307 }
2308
2309 static int ixgbe_update_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2310                                            struct ixgbe_fdir_filter *input,
2311                                            u16 sw_idx)
2312 {
2313         struct ixgbe_hw *hw = &adapter->hw;
2314         struct hlist_node *node, *node2, *parent;
2315         struct ixgbe_fdir_filter *rule;
2316         int err = -EINVAL;
2317
2318         parent = NULL;
2319         rule = NULL;
2320
2321         hlist_for_each_entry_safe(rule, node, node2,
2322                                   &adapter->fdir_filter_list, fdir_node) {
2323                 /* hash found, or no matching entry */
2324                 if (rule->sw_idx >= sw_idx)
2325                         break;
2326                 parent = node;
2327         }
2328
2329         /* if there is an old rule occupying our place remove it */
2330         if (rule && (rule->sw_idx == sw_idx)) {
2331                 if (!input || (rule->filter.formatted.bkt_hash !=
2332                                input->filter.formatted.bkt_hash)) {
2333                         err = ixgbe_fdir_erase_perfect_filter_82599(hw,
2334                                                                 &rule->filter,
2335                                                                 sw_idx);
2336                 }
2337
2338                 hlist_del(&rule->fdir_node);
2339                 kfree(rule);
2340                 adapter->fdir_filter_count--;
2341         }
2342
2343         /*
2344          * If no input this was a delete, err should be 0 if a rule was
2345          * successfully found and removed from the list else -EINVAL
2346          */
2347         if (!input)
2348                 return err;
2349
2350         /* initialize node and set software index */
2351         INIT_HLIST_NODE(&input->fdir_node);
2352
2353         /* add filter to the list */
2354         if (parent)
2355                 hlist_add_after(parent, &input->fdir_node);
2356         else
2357                 hlist_add_head(&input->fdir_node,
2358                                &adapter->fdir_filter_list);
2359
2360         /* update counts */
2361         adapter->fdir_filter_count++;
2362
2363         return 0;
2364 }
2365
2366 static int ixgbe_flowspec_to_flow_type(struct ethtool_rx_flow_spec *fsp,
2367                                        u8 *flow_type)
2368 {
2369         switch (fsp->flow_type & ~FLOW_EXT) {
2370         case TCP_V4_FLOW:
2371                 *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2372                 break;
2373         case UDP_V4_FLOW:
2374                 *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2375                 break;
2376         case SCTP_V4_FLOW:
2377                 *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2378                 break;
2379         case IP_USER_FLOW:
2380                 switch (fsp->h_u.usr_ip4_spec.proto) {
2381                 case IPPROTO_TCP:
2382                         *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2383                         break;
2384                 case IPPROTO_UDP:
2385                         *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2386                         break;
2387                 case IPPROTO_SCTP:
2388                         *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2389                         break;
2390                 case 0:
2391                         if (!fsp->m_u.usr_ip4_spec.proto) {
2392                                 *flow_type = IXGBE_ATR_FLOW_TYPE_IPV4;
2393                                 break;
2394                         }
2395                 default:
2396                         return 0;
2397                 }
2398                 break;
2399         default:
2400                 return 0;
2401         }
2402
2403         return 1;
2404 }
2405
2406 static int ixgbe_add_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2407                                         struct ethtool_rxnfc *cmd)
2408 {
2409         struct ethtool_rx_flow_spec *fsp =
2410                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2411         struct ixgbe_hw *hw = &adapter->hw;
2412         struct ixgbe_fdir_filter *input;
2413         union ixgbe_atr_input mask;
2414         int err;
2415
2416         if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
2417                 return -EOPNOTSUPP;
2418
2419         /*
2420          * Don't allow programming if the action is a queue greater than
2421          * the number of online Rx queues.
2422          */
2423         if ((fsp->ring_cookie != RX_CLS_FLOW_DISC) &&
2424             (fsp->ring_cookie >= adapter->num_rx_queues))
2425                 return -EINVAL;
2426
2427         /* Don't allow indexes to exist outside of available space */
2428         if (fsp->location >= ((1024 << adapter->fdir_pballoc) - 2)) {
2429                 e_err(drv, "Location out of range\n");
2430                 return -EINVAL;
2431         }
2432
2433         input = kzalloc(sizeof(*input), GFP_ATOMIC);
2434         if (!input)
2435                 return -ENOMEM;
2436
2437         memset(&mask, 0, sizeof(union ixgbe_atr_input));
2438
2439         /* set SW index */
2440         input->sw_idx = fsp->location;
2441
2442         /* record flow type */
2443         if (!ixgbe_flowspec_to_flow_type(fsp,
2444                                          &input->filter.formatted.flow_type)) {
2445                 e_err(drv, "Unrecognized flow type\n");
2446                 goto err_out;
2447         }
2448
2449         mask.formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
2450                                    IXGBE_ATR_L4TYPE_MASK;
2451
2452         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
2453                 mask.formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
2454
2455         /* Copy input into formatted structures */
2456         input->filter.formatted.src_ip[0] = fsp->h_u.tcp_ip4_spec.ip4src;
2457         mask.formatted.src_ip[0] = fsp->m_u.tcp_ip4_spec.ip4src;
2458         input->filter.formatted.dst_ip[0] = fsp->h_u.tcp_ip4_spec.ip4dst;
2459         mask.formatted.dst_ip[0] = fsp->m_u.tcp_ip4_spec.ip4dst;
2460         input->filter.formatted.src_port = fsp->h_u.tcp_ip4_spec.psrc;
2461         mask.formatted.src_port = fsp->m_u.tcp_ip4_spec.psrc;
2462         input->filter.formatted.dst_port = fsp->h_u.tcp_ip4_spec.pdst;
2463         mask.formatted.dst_port = fsp->m_u.tcp_ip4_spec.pdst;
2464
2465         if (fsp->flow_type & FLOW_EXT) {
2466                 input->filter.formatted.vm_pool =
2467                                 (unsigned char)ntohl(fsp->h_ext.data[1]);
2468                 mask.formatted.vm_pool =
2469                                 (unsigned char)ntohl(fsp->m_ext.data[1]);
2470                 input->filter.formatted.vlan_id = fsp->h_ext.vlan_tci;
2471                 mask.formatted.vlan_id = fsp->m_ext.vlan_tci;
2472                 input->filter.formatted.flex_bytes =
2473                                                 fsp->h_ext.vlan_etype;
2474                 mask.formatted.flex_bytes = fsp->m_ext.vlan_etype;
2475         }
2476
2477         /* determine if we need to drop or route the packet */
2478         if (fsp->ring_cookie == RX_CLS_FLOW_DISC)
2479                 input->action = IXGBE_FDIR_DROP_QUEUE;
2480         else
2481                 input->action = fsp->ring_cookie;
2482
2483         spin_lock(&adapter->fdir_perfect_lock);
2484
2485         if (hlist_empty(&adapter->fdir_filter_list)) {
2486                 /* save mask and program input mask into HW */
2487                 memcpy(&adapter->fdir_mask, &mask, sizeof(mask));
2488                 err = ixgbe_fdir_set_input_mask_82599(hw, &mask);
2489                 if (err) {
2490                         e_err(drv, "Error writing mask\n");
2491                         goto err_out_w_lock;
2492                 }
2493         } else if (memcmp(&adapter->fdir_mask, &mask, sizeof(mask))) {
2494                 e_err(drv, "Only one mask supported per port\n");
2495                 goto err_out_w_lock;
2496         }
2497
2498         /* apply mask and compute/store hash */
2499         ixgbe_atr_compute_perfect_hash_82599(&input->filter, &mask);
2500
2501         /* program filters to filter memory */
2502         err = ixgbe_fdir_write_perfect_filter_82599(hw,
2503                                 &input->filter, input->sw_idx,
2504                                 (input->action == IXGBE_FDIR_DROP_QUEUE) ?
2505                                 IXGBE_FDIR_DROP_QUEUE :
2506                                 adapter->rx_ring[input->action]->reg_idx);
2507         if (err)
2508                 goto err_out_w_lock;
2509
2510         ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
2511
2512         spin_unlock(&adapter->fdir_perfect_lock);
2513
2514         return err;
2515 err_out_w_lock:
2516         spin_unlock(&adapter->fdir_perfect_lock);
2517 err_out:
2518         kfree(input);
2519         return -EINVAL;
2520 }
2521
2522 static int ixgbe_del_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2523                                         struct ethtool_rxnfc *cmd)
2524 {
2525         struct ethtool_rx_flow_spec *fsp =
2526                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2527         int err;
2528
2529         spin_lock(&adapter->fdir_perfect_lock);
2530         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, fsp->location);
2531         spin_unlock(&adapter->fdir_perfect_lock);
2532
2533         return err;
2534 }
2535
2536 static int ixgbe_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
2537 {
2538         struct ixgbe_adapter *adapter = netdev_priv(dev);
2539         int ret = -EOPNOTSUPP;
2540
2541         switch (cmd->cmd) {
2542         case ETHTOOL_SRXCLSRLINS:
2543                 ret = ixgbe_add_ethtool_fdir_entry(adapter, cmd);
2544                 break;
2545         case ETHTOOL_SRXCLSRLDEL:
2546                 ret = ixgbe_del_ethtool_fdir_entry(adapter, cmd);
2547                 break;
2548         default:
2549                 break;
2550         }
2551
2552         return ret;
2553 }
2554
2555 static const struct ethtool_ops ixgbe_ethtool_ops = {
2556         .get_settings           = ixgbe_get_settings,
2557         .set_settings           = ixgbe_set_settings,
2558         .get_drvinfo            = ixgbe_get_drvinfo,
2559         .get_regs_len           = ixgbe_get_regs_len,
2560         .get_regs               = ixgbe_get_regs,
2561         .get_wol                = ixgbe_get_wol,
2562         .set_wol                = ixgbe_set_wol,
2563         .nway_reset             = ixgbe_nway_reset,
2564         .get_link               = ethtool_op_get_link,
2565         .get_eeprom_len         = ixgbe_get_eeprom_len,
2566         .get_eeprom             = ixgbe_get_eeprom,
2567         .get_ringparam          = ixgbe_get_ringparam,
2568         .set_ringparam          = ixgbe_set_ringparam,
2569         .get_pauseparam         = ixgbe_get_pauseparam,
2570         .set_pauseparam         = ixgbe_set_pauseparam,
2571         .get_msglevel           = ixgbe_get_msglevel,
2572         .set_msglevel           = ixgbe_set_msglevel,
2573         .self_test              = ixgbe_diag_test,
2574         .get_strings            = ixgbe_get_strings,
2575         .set_phys_id            = ixgbe_set_phys_id,
2576         .get_sset_count         = ixgbe_get_sset_count,
2577         .get_ethtool_stats      = ixgbe_get_ethtool_stats,
2578         .get_coalesce           = ixgbe_get_coalesce,
2579         .set_coalesce           = ixgbe_set_coalesce,
2580         .get_rxnfc              = ixgbe_get_rxnfc,
2581         .set_rxnfc              = ixgbe_set_rxnfc,
2582 };
2583
2584 void ixgbe_set_ethtool_ops(struct net_device *netdev)
2585 {
2586         SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops);
2587 }