drivers/net/ixgbe/ixgbe_ethtool.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2011 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 /* ethtool support for ixgbe */
  29
  30 #include <linux/types.h>
  31 #include <linux/module.h>
  32 #include <linux/slab.h>
  33 #include <linux/pci.h>
  34 #include <linux/netdevice.h>
  35 #include <linux/ethtool.h>
  36 #include <linux/vmalloc.h>
  37 #include <linux/uaccess.h>
  38
  39 #include "ixgbe.h"
  40
  41
  42 #define IXGBE_ALL_RAR_ENTRIES 16
  43
  44 enum {NETDEV_STATS, IXGBE_STATS};
  45
  46 struct ixgbe_stats {
  47         char stat_string[ETH_GSTRING_LEN];
  48         int type;
  49         int sizeof_stat;
  50         int stat_offset;
  51 };
  52
  53 #define IXGBE_STAT(m)           IXGBE_STATS, \
  54                                 sizeof(((struct ixgbe_adapter *)0)->m), \
  55                                 offsetof(struct ixgbe_adapter, m)
  56 #define IXGBE_NETDEV_STAT(m)    NETDEV_STATS, \
  57                                 sizeof(((struct rtnl_link_stats64 *)0)->m), \
  58                                 offsetof(struct rtnl_link_stats64, m)
  59
  60 static struct ixgbe_stats ixgbe_gstrings_stats[] = {
  61         {"rx_packets", IXGBE_NETDEV_STAT(rx_packets)},
  62         {"tx_packets", IXGBE_NETDEV_STAT(tx_packets)},
  63         {"rx_bytes", IXGBE_NETDEV_STAT(rx_bytes)},
  64         {"tx_bytes", IXGBE_NETDEV_STAT(tx_bytes)},
  65         {"rx_pkts_nic", IXGBE_STAT(stats.gprc)},
  66         {"tx_pkts_nic", IXGBE_STAT(stats.gptc)},
  67         {"rx_bytes_nic", IXGBE_STAT(stats.gorc)},
  68         {"tx_bytes_nic", IXGBE_STAT(stats.gotc)},
  69         {"lsc_int", IXGBE_STAT(lsc_int)},
  70         {"tx_busy", IXGBE_STAT(tx_busy)},
  71         {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
  72         {"rx_errors", IXGBE_NETDEV_STAT(rx_errors)},
  73         {"tx_errors", IXGBE_NETDEV_STAT(tx_errors)},
  74         {"rx_dropped", IXGBE_NETDEV_STAT(rx_dropped)},
  75         {"tx_dropped", IXGBE_NETDEV_STAT(tx_dropped)},
  76         {"multicast", IXGBE_NETDEV_STAT(multicast)},
  77         {"broadcast", IXGBE_STAT(stats.bprc)},
  78         {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
  79         {"collisions", IXGBE_NETDEV_STAT(collisions)},
  80         {"rx_over_errors", IXGBE_NETDEV_STAT(rx_over_errors)},
  81         {"rx_crc_errors", IXGBE_NETDEV_STAT(rx_crc_errors)},
  82         {"rx_frame_errors", IXGBE_NETDEV_STAT(rx_frame_errors)},
  83         {"hw_rsc_aggregated", IXGBE_STAT(rsc_total_count)},
  84         {"hw_rsc_flushed", IXGBE_STAT(rsc_total_flush)},
  85         {"fdir_match", IXGBE_STAT(stats.fdirmatch)},
  86         {"fdir_miss", IXGBE_STAT(stats.fdirmiss)},
  87         {"rx_fifo_errors", IXGBE_NETDEV_STAT(rx_fifo_errors)},
  88         {"rx_missed_errors", IXGBE_NETDEV_STAT(rx_missed_errors)},
  89         {"tx_aborted_errors", IXGBE_NETDEV_STAT(tx_aborted_errors)},
  90         {"tx_carrier_errors", IXGBE_NETDEV_STAT(tx_carrier_errors)},
  91         {"tx_fifo_errors", IXGBE_NETDEV_STAT(tx_fifo_errors)},
  92         {"tx_heartbeat_errors", IXGBE_NETDEV_STAT(tx_heartbeat_errors)},
  93         {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
  94         {"tx_restart_queue", IXGBE_STAT(restart_queue)},
  95         {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
  96         {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
  97         {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
  98         {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
  99         {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
 100         {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
 101         {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
 102         {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
 103         {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
 104         {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)},
 105 #ifdef IXGBE_FCOE
 106         {"fcoe_bad_fccrc", IXGBE_STAT(stats.fccrc)},
 107         {"rx_fcoe_dropped", IXGBE_STAT(stats.fcoerpdc)},
 108         {"rx_fcoe_packets", IXGBE_STAT(stats.fcoeprc)},
 109         {"rx_fcoe_dwords", IXGBE_STAT(stats.fcoedwrc)},
 110         {"tx_fcoe_packets", IXGBE_STAT(stats.fcoeptc)},
 111         {"tx_fcoe_dwords", IXGBE_STAT(stats.fcoedwtc)},
 112 #endif /* IXGBE_FCOE */
 113 };
 114
 115 #define IXGBE_QUEUE_STATS_LEN \
 116         ((((struct ixgbe_adapter *)netdev_priv(netdev))->num_tx_queues + \
 117         ((struct ixgbe_adapter *)netdev_priv(netdev))->num_rx_queues) * \
 118         (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
 119 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
 120 #define IXGBE_PB_STATS_LEN ( \
 121                  (((struct ixgbe_adapter *)netdev_priv(netdev))->flags & \
 122                  IXGBE_FLAG_DCB_ENABLED) ? \
 123                  (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
 124                   sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
 125                   sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
 126                   sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
 127                   / sizeof(u64) : 0)
 128 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
 129                          IXGBE_PB_STATS_LEN + \
 130                          IXGBE_QUEUE_STATS_LEN)
 131
 132 static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = {
 133         "Register test  (offline)", "Eeprom test    (offline)",
 134         "Interrupt test (offline)", "Loopback test  (offline)",
 135         "Link test   (on/offline)"
 136 };
 137 #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN
 138
 139 static int ixgbe_get_settings(struct net_device *netdev,
 140                               struct ethtool_cmd *ecmd)
 141 {
 142         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 143         struct ixgbe_hw *hw = &adapter->hw;
 144         u32 link_speed = 0;
 145         bool link_up;
 146
 147         ecmd->supported = SUPPORTED_10000baseT_Full;
 148         ecmd->autoneg = AUTONEG_ENABLE;
 149         ecmd->transceiver = XCVR_EXTERNAL;
 150         if ((hw->phy.media_type == ixgbe_media_type_copper) ||
 151             (hw->phy.multispeed_fiber)) {
 152                 ecmd->supported |= (SUPPORTED_1000baseT_Full |
 153                                     SUPPORTED_Autoneg);
 154
 155                 switch (hw->mac.type) {
 156                 case ixgbe_mac_X540:
 157                         ecmd->supported |= SUPPORTED_100baseT_Full;
 158                         break;
 159                 default:
 160                         break;
 161                 }
 162
 163                 ecmd->advertising = ADVERTISED_Autoneg;
 164                 if (hw->phy.autoneg_advertised) {
 165                         if (hw->phy.autoneg_advertised &
 166                             IXGBE_LINK_SPEED_100_FULL)
 167                                 ecmd->advertising |= ADVERTISED_100baseT_Full;
 168                         if (hw->phy.autoneg_advertised &
 169                             IXGBE_LINK_SPEED_10GB_FULL)
 170                                 ecmd->advertising |= ADVERTISED_10000baseT_Full;
 171                         if (hw->phy.autoneg_advertised &
 172                             IXGBE_LINK_SPEED_1GB_FULL)
 173                                 ecmd->advertising |= ADVERTISED_1000baseT_Full;
 174                 } else {
 175                         /*
 176                          * Default advertised modes in case
 177                          * phy.autoneg_advertised isn't set.
 178                          */
 179                         ecmd->advertising |= (ADVERTISED_10000baseT_Full |
 180                                               ADVERTISED_1000baseT_Full);
 181                         if (hw->mac.type == ixgbe_mac_X540)
 182                                 ecmd->advertising |= ADVERTISED_100baseT_Full;
 183                 }
 184
 185                 if (hw->phy.media_type == ixgbe_media_type_copper) {
 186                         ecmd->supported |= SUPPORTED_TP;
 187                         ecmd->advertising |= ADVERTISED_TP;
 188                         ecmd->port = PORT_TP;
 189                 } else {
 190                         ecmd->supported |= SUPPORTED_FIBRE;
 191                         ecmd->advertising |= ADVERTISED_FIBRE;
 192                         ecmd->port = PORT_FIBRE;
 193                 }
 194         } else if (hw->phy.media_type == ixgbe_media_type_backplane) {
 195                 /* Set as FIBRE until SERDES defined in kernel */
 196                 if (hw->device_id == IXGBE_DEV_ID_82598_BX) {
 197                         ecmd->supported = (SUPPORTED_1000baseT_Full |
 198                                            SUPPORTED_FIBRE);
 199                         ecmd->advertising = (ADVERTISED_1000baseT_Full |
 200                                              ADVERTISED_FIBRE);
 201                         ecmd->port = PORT_FIBRE;
 202                         ecmd->autoneg = AUTONEG_DISABLE;
 203                 } else if ((hw->device_id == IXGBE_DEV_ID_82599_COMBO_BACKPLANE) ||
 204                            (hw->device_id == IXGBE_DEV_ID_82599_KX4_MEZZ)) {
 205                         ecmd->supported |= (SUPPORTED_1000baseT_Full |
 206                                             SUPPORTED_Autoneg |
 207                                             SUPPORTED_FIBRE);
 208                         ecmd->advertising = (ADVERTISED_10000baseT_Full |
 209                                              ADVERTISED_1000baseT_Full |
 210                                              ADVERTISED_Autoneg |
 211                                              ADVERTISED_FIBRE);
 212                         ecmd->port = PORT_FIBRE;
 213                 } else {
 214                         ecmd->supported |= (SUPPORTED_1000baseT_Full |
 215                                             SUPPORTED_FIBRE);
 216                         ecmd->advertising = (ADVERTISED_10000baseT_Full |
 217                                              ADVERTISED_1000baseT_Full |
 218                                              ADVERTISED_FIBRE);
 219                         ecmd->port = PORT_FIBRE;
 220                 }
 221         } else {
 222                 ecmd->supported |= SUPPORTED_FIBRE;
 223                 ecmd->advertising = (ADVERTISED_10000baseT_Full |
 224                                      ADVERTISED_FIBRE);
 225                 ecmd->port = PORT_FIBRE;
 226                 ecmd->autoneg = AUTONEG_DISABLE;
 227         }
 228
 229         /* Get PHY type */
 230         switch (adapter->hw.phy.type) {
 231         case ixgbe_phy_tn:
 232         case ixgbe_phy_aq:
 233         case ixgbe_phy_cu_unknown:
 234                 /* Copper 10G-BASET */
 235                 ecmd->port = PORT_TP;
 236                 break;
 237         case ixgbe_phy_qt:
 238                 ecmd->port = PORT_FIBRE;
 239                 break;
 240         case ixgbe_phy_nl:
 241         case ixgbe_phy_sfp_passive_tyco:
 242         case ixgbe_phy_sfp_passive_unknown:
 243         case ixgbe_phy_sfp_ftl:
 244         case ixgbe_phy_sfp_avago:
 245         case ixgbe_phy_sfp_intel:
 246         case ixgbe_phy_sfp_unknown:
 247                 switch (adapter->hw.phy.sfp_type) {
 248                 /* SFP+ devices, further checking needed */
 249                 case ixgbe_sfp_type_da_cu:
 250                 case ixgbe_sfp_type_da_cu_core0:
 251                 case ixgbe_sfp_type_da_cu_core1:
 252                         ecmd->port = PORT_DA;
 253                         break;
 254                 case ixgbe_sfp_type_sr:
 255                 case ixgbe_sfp_type_lr:
 256                 case ixgbe_sfp_type_srlr_core0:
 257                 case ixgbe_sfp_type_srlr_core1:
 258                         ecmd->port = PORT_FIBRE;
 259                         break;
 260                 case ixgbe_sfp_type_not_present:
 261                         ecmd->port = PORT_NONE;
 262                         break;
 263                 case ixgbe_sfp_type_1g_cu_core0:
 264                 case ixgbe_sfp_type_1g_cu_core1:
 265                         ecmd->port = PORT_TP;
 266                         ecmd->supported = SUPPORTED_TP;
 267                         ecmd->advertising = (ADVERTISED_1000baseT_Full |
 268                                              ADVERTISED_TP);
 269                         break;
 270                 case ixgbe_sfp_type_unknown:
 271                 default:
 272                         ecmd->port = PORT_OTHER;
 273                         break;
 274                 }
 275                 break;
 276         case ixgbe_phy_xaui:
 277                 ecmd->port = PORT_NONE;
 278                 break;
 279         case ixgbe_phy_unknown:
 280         case ixgbe_phy_generic:
 281         case ixgbe_phy_sfp_unsupported:
 282         default:
 283                 ecmd->port = PORT_OTHER;
 284                 break;
 285         }
 286
 287         hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
 288         if (link_up) {
 289                 switch (link_speed) {
 290                 case IXGBE_LINK_SPEED_10GB_FULL:
 291                         ecmd->speed = SPEED_10000;
 292                         break;
 293                 case IXGBE_LINK_SPEED_1GB_FULL:
 294                         ecmd->speed = SPEED_1000;
 295                         break;
 296                 case IXGBE_LINK_SPEED_100_FULL:
 297                         ecmd->speed = SPEED_100;
 298                         break;
 299                 default:
 300                         break;
 301                 }
 302                 ecmd->duplex = DUPLEX_FULL;
 303         } else {
 304                 ecmd->speed = -1;
 305                 ecmd->duplex = -1;
 306         }
 307
 308         return 0;
 309 }
 310
 311 static int ixgbe_set_settings(struct net_device *netdev,
 312                               struct ethtool_cmd *ecmd)
 313 {
 314         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 315         struct ixgbe_hw *hw = &adapter->hw;
 316         u32 advertised, old;
 317         s32 err = 0;
 318
 319         if ((hw->phy.media_type == ixgbe_media_type_copper) ||
 320             (hw->phy.multispeed_fiber)) {
 321                 /* 10000/copper and 1000/copper must autoneg
 322                  * this function does not support any duplex forcing, but can
 323                  * limit the advertising of the adapter to only 10000 or 1000 */
 324                 if (ecmd->autoneg == AUTONEG_DISABLE)
 325                         return -EINVAL;
 326
 327                 old = hw->phy.autoneg_advertised;
 328                 advertised = 0;
 329                 if (ecmd->advertising & ADVERTISED_10000baseT_Full)
 330                         advertised |= IXGBE_LINK_SPEED_10GB_FULL;
 331
 332                 if (ecmd->advertising & ADVERTISED_1000baseT_Full)
 333                         advertised |= IXGBE_LINK_SPEED_1GB_FULL;
 334
 335                 if (ecmd->advertising & ADVERTISED_100baseT_Full)
 336                         advertised |= IXGBE_LINK_SPEED_100_FULL;
 337
 338                 if (old == advertised)
 339                         return err;
 340                 /* this sets the link speed and restarts auto-neg */
 341                 hw->mac.autotry_restart = true;
 342                 err = hw->mac.ops.setup_link(hw, advertised, true, true);
 343                 if (err) {
 344                         e_info(probe, "setup link failed with code %d\n", err);
 345                         hw->mac.ops.setup_link(hw, old, true, true);
 346                 }
 347         } else {
 348                 /* in this case we currently only support 10Gb/FULL */
 349                 u32 speed = ethtool_cmd_speed(ecmd);
 350                 if ((ecmd->autoneg == AUTONEG_ENABLE) ||
 351                     (ecmd->advertising != ADVERTISED_10000baseT_Full) ||
 352                     (speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL))
 353                         return -EINVAL;
 354         }
 355
 356         return err;
 357 }
 358
 359 static void ixgbe_get_pauseparam(struct net_device *netdev,
 360                                  struct ethtool_pauseparam *pause)
 361 {
 362         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 363         struct ixgbe_hw *hw = &adapter->hw;
 364
 365         /*
 366          * Flow Control Autoneg isn't on if
 367          *  - we didn't ask for it OR
 368          *  - it failed, we know this by tx & rx being off
 369          */
 370         if (hw->fc.disable_fc_autoneg ||
 371             (hw->fc.current_mode == ixgbe_fc_none))
 372                 pause->autoneg = 0;
 373         else
 374                 pause->autoneg = 1;
 375
 376         if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
 377                 pause->rx_pause = 1;
 378         } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) {
 379                 pause->tx_pause = 1;
 380         } else if (hw->fc.current_mode == ixgbe_fc_full) {
 381                 pause->rx_pause = 1;
 382                 pause->tx_pause = 1;
 383 #ifdef CONFIG_DCB
 384         } else if (hw->fc.current_mode == ixgbe_fc_pfc) {
 385                 pause->rx_pause = 0;
 386                 pause->tx_pause = 0;
 387 #endif
 388         }
 389 }
 390
 391 static int ixgbe_set_pauseparam(struct net_device *netdev,
 392                                 struct ethtool_pauseparam *pause)
 393 {
 394         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 395         struct ixgbe_hw *hw = &adapter->hw;
 396         struct ixgbe_fc_info fc;
 397
 398 #ifdef CONFIG_DCB
 399         if (adapter->dcb_cfg.pfc_mode_enable ||
 400                 ((hw->mac.type == ixgbe_mac_82598EB) &&
 401                 (adapter->flags & IXGBE_FLAG_DCB_ENABLED)))
 402                 return -EINVAL;
 403
 404 #endif
 405         fc = hw->fc;
 406
 407         if (pause->autoneg != AUTONEG_ENABLE)
 408                 fc.disable_fc_autoneg = true;
 409         else
 410                 fc.disable_fc_autoneg = false;
 411
 412         if ((pause->rx_pause && pause->tx_pause) || pause->autoneg)
 413                 fc.requested_mode = ixgbe_fc_full;
 414         else if (pause->rx_pause && !pause->tx_pause)
 415                 fc.requested_mode = ixgbe_fc_rx_pause;
 416         else if (!pause->rx_pause && pause->tx_pause)
 417                 fc.requested_mode = ixgbe_fc_tx_pause;
 418         else if (!pause->rx_pause && !pause->tx_pause)
 419                 fc.requested_mode = ixgbe_fc_none;
 420         else
 421                 return -EINVAL;
 422
 423 #ifdef CONFIG_DCB
 424         adapter->last_lfc_mode = fc.requested_mode;
 425 #endif
 426
 427         /* if the thing changed then we'll update and use new autoneg */
 428         if (memcmp(&fc, &hw->fc, sizeof(struct ixgbe_fc_info))) {
 429                 hw->fc = fc;
 430                 if (netif_running(netdev))
 431                         ixgbe_reinit_locked(adapter);
 432                 else
 433                         ixgbe_reset(adapter);
 434         }
 435
 436         return 0;
 437 }
 438
 439 static u32 ixgbe_get_rx_csum(struct net_device *netdev)
 440 {
 441         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 442         return adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED;
 443 }
 444
 445 static int ixgbe_set_rx_csum(struct net_device *netdev, u32 data)
 446 {
 447         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 448         if (data)
 449                 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
 450         else
 451                 adapter->flags &= ~IXGBE_FLAG_RX_CSUM_ENABLED;
 452
 453         return 0;
 454 }
 455
 456 static u32 ixgbe_get_tx_csum(struct net_device *netdev)
 457 {
 458         return (netdev->features & NETIF_F_IP_CSUM) != 0;
 459 }
 460
 461 static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data)
 462 {
 463         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 464         u32 feature_list;
 465
 466         feature_list = (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
 467         switch (adapter->hw.mac.type) {
 468         case ixgbe_mac_82599EB:
 469         case ixgbe_mac_X540:
 470                 feature_list |= NETIF_F_SCTP_CSUM;
 471                 break;
 472         default:
 473                 break;
 474         }
 475         if (data)
 476                 netdev->features |= feature_list;
 477         else
 478                 netdev->features &= ~feature_list;
 479
 480         return 0;
 481 }
 482
 483 static int ixgbe_set_tso(struct net_device *netdev, u32 data)
 484 {
 485         if (data) {
 486                 netdev->features |= NETIF_F_TSO;
 487                 netdev->features |= NETIF_F_TSO6;
 488         } else {
 489                 netdev->features &= ~NETIF_F_TSO;
 490                 netdev->features &= ~NETIF_F_TSO6;
 491         }
 492         return 0;
 493 }
 494
 495 static u32 ixgbe_get_msglevel(struct net_device *netdev)
 496 {
 497         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 498         return adapter->msg_enable;
 499 }
 500
 501 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
 502 {
 503         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 504         adapter->msg_enable = data;
 505 }
 506
 507 static int ixgbe_get_regs_len(struct net_device *netdev)
 508 {
 509 #define IXGBE_REGS_LEN  1128
 510         return IXGBE_REGS_LEN * sizeof(u32);
 511 }
 512
 513 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
 514
 515 static void ixgbe_get_regs(struct net_device *netdev,
 516                            struct ethtool_regs *regs, void *p)
 517 {
 518         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 519         struct ixgbe_hw *hw = &adapter->hw;
 520         u32 *regs_buff = p;
 521         u8 i;
 522
 523         memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
 524
 525         regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
 526
 527         /* General Registers */
 528         regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
 529         regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
 530         regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
 531         regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
 532         regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
 533         regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
 534         regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
 535         regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
 536
 537         /* NVM Register */
 538         regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
 539         regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
 540         regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
 541         regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
 542         regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
 543         regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
 544         regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
 545         regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
 546         regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
 547         regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
 548
 549         /* Interrupt */
 550         /* don't read EICR because it can clear interrupt causes, instead
 551          * read EICS which is a shadow but doesn't clear EICR */
 552         regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
 553         regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
 554         regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
 555         regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
 556         regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
 557         regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
 558         regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
 559         regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
 560         regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
 561         regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
 562         regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
 563         regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
 564
 565         /* Flow Control */
 566         regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
 567         regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
 568         regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
 569         regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
 570         regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
 571         for (i = 0; i < 8; i++) {
 572                 switch (hw->mac.type) {
 573                 case ixgbe_mac_82598EB:
 574                         regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
 575                         regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
 576                         break;
 577                 case ixgbe_mac_82599EB:
 578                         regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL_82599(i));
 579                         regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH_82599(i));
 580                         break;
 581                 default:
 582                         break;
 583                 }
 584         }
 585         regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
 586         regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
 587
 588         /* Receive DMA */
 589         for (i = 0; i < 64; i++)
 590                 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 591         for (i = 0; i < 64; i++)
 592                 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 593         for (i = 0; i < 64; i++)
 594                 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 595         for (i = 0; i < 64; i++)
 596                 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 597         for (i = 0; i < 64; i++)
 598                 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 599         for (i = 0; i < 64; i++)
 600                 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 601         for (i = 0; i < 16; i++)
 602                 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 603         for (i = 0; i < 16; i++)
 604                 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 605         regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
 606         for (i = 0; i < 8; i++)
 607                 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
 608         regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
 609         regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
 610
 611         /* Receive */
 612         regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
 613         regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
 614         for (i = 0; i < 16; i++)
 615                 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
 616         for (i = 0; i < 16; i++)
 617                 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
 618         regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
 619         regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
 620         regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
 621         regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
 622         regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
 623         regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
 624         for (i = 0; i < 8; i++)
 625                 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
 626         for (i = 0; i < 8; i++)
 627                 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
 628         regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
 629
 630         /* Transmit */
 631         for (i = 0; i < 32; i++)
 632                 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 633         for (i = 0; i < 32; i++)
 634                 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 635         for (i = 0; i < 32; i++)
 636                 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 637         for (i = 0; i < 32; i++)
 638                 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 639         for (i = 0; i < 32; i++)
 640                 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 641         for (i = 0; i < 32; i++)
 642                 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 643         for (i = 0; i < 32; i++)
 644                 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
 645         for (i = 0; i < 32; i++)
 646                 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
 647         regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
 648         for (i = 0; i < 16; i++)
 649                 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
 650         regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
 651         for (i = 0; i < 8; i++)
 652                 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
 653         regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
 654
 655         /* Wake Up */
 656         regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
 657         regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
 658         regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
 659         regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
 660         regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
 661         regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
 662         regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
 663         regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
 664         regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0));
 665
 666         /* DCB */
 667         regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
 668         regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
 669         regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
 670         regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
 671         for (i = 0; i < 8; i++)
 672                 regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
 673         for (i = 0; i < 8; i++)
 674                 regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
 675         for (i = 0; i < 8; i++)
 676                 regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
 677         for (i = 0; i < 8; i++)
 678                 regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
 679         for (i = 0; i < 8; i++)
 680                 regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i));
 681         for (i = 0; i < 8; i++)
 682                 regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i));
 683
 684         /* Statistics */
 685         regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
 686         regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
 687         regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
 688         regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
 689         for (i = 0; i < 8; i++)
 690                 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
 691         regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
 692         regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
 693         regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
 694         regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
 695         regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
 696         regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
 697         regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
 698         for (i = 0; i < 8; i++)
 699                 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
 700         for (i = 0; i < 8; i++)
 701                 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
 702         for (i = 0; i < 8; i++)
 703                 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
 704         for (i = 0; i < 8; i++)
 705                 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
 706         regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
 707         regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
 708         regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
 709         regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
 710         regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
 711         regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
 712         regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
 713         regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
 714         regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
 715         regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
 716         regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
 717         regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
 718         for (i = 0; i < 8; i++)
 719                 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
 720         regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
 721         regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
 722         regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
 723         regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
 724         regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
 725         regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
 726         regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
 727         regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
 728         regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
 729         regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
 730         regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
 731         regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
 732         regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
 733         regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
 734         regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
 735         regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
 736         regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
 737         regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
 738         regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
 739         for (i = 0; i < 16; i++)
 740                 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
 741         for (i = 0; i < 16; i++)
 742                 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
 743         for (i = 0; i < 16; i++)
 744                 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
 745         for (i = 0; i < 16; i++)
 746                 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
 747
 748         /* MAC */
 749         regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
 750         regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
 751         regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
 752         regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
 753         regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
 754         regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
 755         regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
 756         regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
 757         regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
 758         regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
 759         regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
 760         regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
 761         regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
 762         regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
 763         regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
 764         regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
 765         regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
 766         regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
 767         regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
 768         regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
 769         regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
 770         regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
 771         regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
 772         regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
 773         regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
 774         regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
 775         regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
 776         regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
 777         regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
 778         regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
 779         regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
 780         regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
 781         regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
 782
 783         /* Diagnostic */
 784         regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
 785         for (i = 0; i < 8; i++)
 786                 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
 787         regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
 788         for (i = 0; i < 4; i++)
 789                 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
 790         regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
 791         regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
 792         for (i = 0; i < 8; i++)
 793                 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
 794         regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
 795         for (i = 0; i < 4; i++)
 796                 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
 797         regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
 798         regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
 799         regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
 800         regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
 801         regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
 802         regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
 803         regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
 804         regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
 805         regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
 806         regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
 807         regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
 808         for (i = 0; i < 8; i++)
 809                 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
 810         regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
 811         regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
 812         regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
 813         regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
 814         regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
 815         regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
 816         regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
 817         regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
 818         regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
 819 }
 820
 821 static int ixgbe_get_eeprom_len(struct net_device *netdev)
 822 {
 823         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 824         return adapter->hw.eeprom.word_size * 2;
 825 }
 826
 827 static int ixgbe_get_eeprom(struct net_device *netdev,
 828                             struct ethtool_eeprom *eeprom, u8 *bytes)
 829 {
 830         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 831         struct ixgbe_hw *hw = &adapter->hw;
 832         u16 *eeprom_buff;
 833         int first_word, last_word, eeprom_len;
 834         int ret_val = 0;
 835         u16 i;
 836
 837         if (eeprom->len == 0)
 838                 return -EINVAL;
 839
 840         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 841
 842         first_word = eeprom->offset >> 1;
 843         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 844         eeprom_len = last_word - first_word + 1;
 845
 846         eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
 847         if (!eeprom_buff)
 848                 return -ENOMEM;
 849
 850         for (i = 0; i < eeprom_len; i++) {
 851                 if ((ret_val = hw->eeprom.ops.read(hw, first_word + i,
 852                     &eeprom_buff[i])))
 853                         break;
 854         }
 855
 856         /* Device's eeprom is always little-endian, word addressable */
 857         for (i = 0; i < eeprom_len; i++)
 858                 le16_to_cpus(&eeprom_buff[i]);
 859
 860         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
 861         kfree(eeprom_buff);
 862
 863         return ret_val;
 864 }
 865
 866 static void ixgbe_get_drvinfo(struct net_device *netdev,
 867                               struct ethtool_drvinfo *drvinfo)
 868 {
 869         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 870         char firmware_version[32];
 871
 872         strncpy(drvinfo->driver, ixgbe_driver_name,
 873                 sizeof(drvinfo->driver) - 1);
 874         strncpy(drvinfo->version, ixgbe_driver_version,
 875                 sizeof(drvinfo->version) - 1);
 876
 877         snprintf(firmware_version, sizeof(firmware_version), "%d.%d-%d",
 878                  (adapter->eeprom_version & 0xF000) >> 12,
 879                  (adapter->eeprom_version & 0x0FF0) >> 4,
 880                  adapter->eeprom_version & 0x000F);
 881
 882         strncpy(drvinfo->fw_version, firmware_version,
 883                 sizeof(drvinfo->fw_version));
 884         strncpy(drvinfo->bus_info, pci_name(adapter->pdev),
 885                 sizeof(drvinfo->bus_info));
 886         drvinfo->n_stats = IXGBE_STATS_LEN;
 887         drvinfo->testinfo_len = IXGBE_TEST_LEN;
 888         drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
 889 }
 890
 891 static void ixgbe_get_ringparam(struct net_device *netdev,
 892                                 struct ethtool_ringparam *ring)
 893 {
 894         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 895         struct ixgbe_ring *tx_ring = adapter->tx_ring[0];
 896         struct ixgbe_ring *rx_ring = adapter->rx_ring[0];
 897
 898         ring->rx_max_pending = IXGBE_MAX_RXD;
 899         ring->tx_max_pending = IXGBE_MAX_TXD;
 900         ring->rx_mini_max_pending = 0;
 901         ring->rx_jumbo_max_pending = 0;
 902         ring->rx_pending = rx_ring->count;
 903         ring->tx_pending = tx_ring->count;
 904         ring->rx_mini_pending = 0;
 905         ring->rx_jumbo_pending = 0;
 906 }
 907
 908 static int ixgbe_set_ringparam(struct net_device *netdev,
 909                                struct ethtool_ringparam *ring)
 910 {
 911         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 912         struct ixgbe_ring *temp_tx_ring, *temp_rx_ring;
 913         int i, err = 0;
 914         u32 new_rx_count, new_tx_count;
 915         bool need_update = false;
 916
 917         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 918                 return -EINVAL;
 919
 920         new_rx_count = max(ring->rx_pending, (u32)IXGBE_MIN_RXD);
 921         new_rx_count = min(new_rx_count, (u32)IXGBE_MAX_RXD);
 922         new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
 923
 924         new_tx_count = max(ring->tx_pending, (u32)IXGBE_MIN_TXD);
 925         new_tx_count = min(new_tx_count, (u32)IXGBE_MAX_TXD);
 926         new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
 927
 928         if ((new_tx_count == adapter->tx_ring[0]->count) &&
 929             (new_rx_count == adapter->rx_ring[0]->count)) {
 930                 /* nothing to do */
 931                 return 0;
 932         }
 933
 934         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
 935                 usleep_range(1000, 2000);
 936
 937         if (!netif_running(adapter->netdev)) {
 938                 for (i = 0; i < adapter->num_tx_queues; i++)
 939                         adapter->tx_ring[i]->count = new_tx_count;
 940                 for (i = 0; i < adapter->num_rx_queues; i++)
 941                         adapter->rx_ring[i]->count = new_rx_count;
 942                 adapter->tx_ring_count = new_tx_count;
 943                 adapter->rx_ring_count = new_rx_count;
 944                 goto clear_reset;
 945         }
 946
 947         temp_tx_ring = vmalloc(adapter->num_tx_queues * sizeof(struct ixgbe_ring));
 948         if (!temp_tx_ring) {
 949                 err = -ENOMEM;
 950                 goto clear_reset;
 951         }
 952
 953         if (new_tx_count != adapter->tx_ring_count) {
 954                 for (i = 0; i < adapter->num_tx_queues; i++) {
 955                         memcpy(&temp_tx_ring[i], adapter->tx_ring[i],
 956                                sizeof(struct ixgbe_ring));
 957                         temp_tx_ring[i].count = new_tx_count;
 958                         err = ixgbe_setup_tx_resources(&temp_tx_ring[i]);
 959                         if (err) {
 960                                 while (i) {
 961                                         i--;
 962                                         ixgbe_free_tx_resources(&temp_tx_ring[i]);
 963                                 }
 964                                 goto clear_reset;
 965                         }
 966                 }
 967                 need_update = true;
 968         }
 969
 970         temp_rx_ring = vmalloc(adapter->num_rx_queues * sizeof(struct ixgbe_ring));
 971         if (!temp_rx_ring) {
 972                 err = -ENOMEM;
 973                 goto err_setup;
 974         }
 975
 976         if (new_rx_count != adapter->rx_ring_count) {
 977                 for (i = 0; i < adapter->num_rx_queues; i++) {
 978                         memcpy(&temp_rx_ring[i], adapter->rx_ring[i],
 979                                sizeof(struct ixgbe_ring));
 980                         temp_rx_ring[i].count = new_rx_count;
 981                         err = ixgbe_setup_rx_resources(&temp_rx_ring[i]);
 982                         if (err) {
 983                                 while (i) {
 984                                         i--;
 985                                         ixgbe_free_rx_resources(&temp_rx_ring[i]);
 986                                 }
 987                                 goto err_setup;
 988                         }
 989                 }
 990                 need_update = true;
 991         }
 992
 993         /* if rings need to be updated, here's the place to do it in one shot */
 994         if (need_update) {
 995                 ixgbe_down(adapter);
 996
 997                 /* tx */
 998                 if (new_tx_count != adapter->tx_ring_count) {
 999                         for (i = 0; i < adapter->num_tx_queues; i++) {
1000                                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
1001                                 memcpy(adapter->tx_ring[i], &temp_tx_ring[i],
1002                                        sizeof(struct ixgbe_ring));
1003                         }
1004                         adapter->tx_ring_count = new_tx_count;
1005                 }
1006
1007                 /* rx */
1008                 if (new_rx_count != adapter->rx_ring_count) {
1009                         for (i = 0; i < adapter->num_rx_queues; i++) {
1010                                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
1011                                 memcpy(adapter->rx_ring[i], &temp_rx_ring[i],
1012                                        sizeof(struct ixgbe_ring));
1013                         }
1014                         adapter->rx_ring_count = new_rx_count;
1015                 }
1016                 ixgbe_up(adapter);
1017         }
1018
1019         vfree(temp_rx_ring);
1020 err_setup:
1021         vfree(temp_tx_ring);
1022 clear_reset:
1023         clear_bit(__IXGBE_RESETTING, &adapter->state);
1024         return err;
1025 }
1026
1027 static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
1028 {
1029         switch (sset) {
1030         case ETH_SS_TEST:
1031                 return IXGBE_TEST_LEN;
1032         case ETH_SS_STATS:
1033                 return IXGBE_STATS_LEN;
1034         default:
1035                 return -EOPNOTSUPP;
1036         }
1037 }
1038
1039 static void ixgbe_get_ethtool_stats(struct net_device *netdev,
1040                                     struct ethtool_stats *stats, u64 *data)
1041 {
1042         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1043         struct rtnl_link_stats64 temp;
1044         const struct rtnl_link_stats64 *net_stats;
1045         unsigned int start;
1046         struct ixgbe_ring *ring;
1047         int i, j;
1048         char *p = NULL;
1049
1050         ixgbe_update_stats(adapter);
1051         net_stats = dev_get_stats(netdev, &temp);
1052         for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1053                 switch (ixgbe_gstrings_stats[i].type) {
1054                 case NETDEV_STATS:
1055                         p = (char *) net_stats +
1056                                         ixgbe_gstrings_stats[i].stat_offset;
1057                         break;
1058                 case IXGBE_STATS:
1059                         p = (char *) adapter +
1060                                         ixgbe_gstrings_stats[i].stat_offset;
1061                         break;
1062                 }
1063
1064                 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
1065                            sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1066         }
1067         for (j = 0; j < adapter->num_tx_queues; j++) {
1068                 ring = adapter->tx_ring[j];
1069                 do {
1070                         start = u64_stats_fetch_begin_bh(&ring->syncp);
1071                         data[i]   = ring->stats.packets;
1072                         data[i+1] = ring->stats.bytes;
1073                 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1074                 i += 2;
1075         }
1076         for (j = 0; j < adapter->num_rx_queues; j++) {
1077                 ring = adapter->rx_ring[j];
1078                 do {
1079                         start = u64_stats_fetch_begin_bh(&ring->syncp);
1080                         data[i]   = ring->stats.packets;
1081                         data[i+1] = ring->stats.bytes;
1082                 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1083                 i += 2;
1084         }
1085         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1086                 for (j = 0; j < MAX_TX_PACKET_BUFFERS; j++) {
1087                         data[i++] = adapter->stats.pxontxc[j];
1088                         data[i++] = adapter->stats.pxofftxc[j];
1089                 }
1090                 for (j = 0; j < MAX_RX_PACKET_BUFFERS; j++) {
1091                         data[i++] = adapter->stats.pxonrxc[j];
1092                         data[i++] = adapter->stats.pxoffrxc[j];
1093                 }
1094         }
1095 }
1096
1097 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
1098                               u8 *data)
1099 {
1100         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1101         char *p = (char *)data;
1102         int i;
1103
1104         switch (stringset) {
1105         case ETH_SS_TEST:
1106                 memcpy(data, *ixgbe_gstrings_test,
1107                        IXGBE_TEST_LEN * ETH_GSTRING_LEN);
1108                 break;
1109         case ETH_SS_STATS:
1110                 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1111                         memcpy(p, ixgbe_gstrings_stats[i].stat_string,
1112                                ETH_GSTRING_LEN);
1113                         p += ETH_GSTRING_LEN;
1114                 }
1115                 for (i = 0; i < adapter->num_tx_queues; i++) {
1116                         sprintf(p, "tx_queue_%u_packets", i);
1117                         p += ETH_GSTRING_LEN;
1118                         sprintf(p, "tx_queue_%u_bytes", i);
1119                         p += ETH_GSTRING_LEN;
1120                 }
1121                 for (i = 0; i < adapter->num_rx_queues; i++) {
1122                         sprintf(p, "rx_queue_%u_packets", i);
1123                         p += ETH_GSTRING_LEN;
1124                         sprintf(p, "rx_queue_%u_bytes", i);
1125                         p += ETH_GSTRING_LEN;
1126                 }
1127                 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1128                         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1129                                 sprintf(p, "tx_pb_%u_pxon", i);
1130                                 p += ETH_GSTRING_LEN;
1131                                 sprintf(p, "tx_pb_%u_pxoff", i);
1132                                 p += ETH_GSTRING_LEN;
1133                         }
1134                         for (i = 0; i < MAX_RX_PACKET_BUFFERS; i++) {
1135                                 sprintf(p, "rx_pb_%u_pxon", i);
1136                                 p += ETH_GSTRING_LEN;
1137                                 sprintf(p, "rx_pb_%u_pxoff", i);
1138                                 p += ETH_GSTRING_LEN;
1139                         }
1140                 }
1141                 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
1142                 break;
1143         }
1144 }
1145
1146 static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data)
1147 {
1148         struct ixgbe_hw *hw = &adapter->hw;
1149         bool link_up;
1150         u32 link_speed = 0;
1151         *data = 0;
1152
1153         hw->mac.ops.check_link(hw, &link_speed, &link_up, true);
1154         if (link_up)
1155                 return *data;
1156         else
1157                 *data = 1;
1158         return *data;
1159 }
1160
1161 /* ethtool register test data */
1162 struct ixgbe_reg_test {
1163         u16 reg;
1164         u8  array_len;
1165         u8  test_type;
1166         u32 mask;
1167         u32 write;
1168 };
1169
1170 /* In the hardware, registers are laid out either singly, in arrays
1171  * spaced 0x40 bytes apart, or in contiguous tables.  We assume
1172  * most tests take place on arrays or single registers (handled
1173  * as a single-element array) and special-case the tables.
1174  * Table tests are always pattern tests.
1175  *
1176  * We also make provision for some required setup steps by specifying
1177  * registers to be written without any read-back testing.
1178  */
1179
1180 #define PATTERN_TEST    1
1181 #define SET_READ_TEST   2
1182 #define WRITE_NO_TEST   3
1183 #define TABLE32_TEST    4
1184 #define TABLE64_TEST_LO 5
1185 #define TABLE64_TEST_HI 6
1186
1187 /* default 82599 register test */
1188 static const struct ixgbe_reg_test reg_test_82599[] = {
1189         { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1190         { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1191         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1192         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1193         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 },
1194         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1195         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1196         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1197         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1198         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1199         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1200         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1201         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1202         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1203         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 },
1204         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 },
1205         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1206         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF },
1207         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1208         { 0, 0, 0, 0 }
1209 };
1210
1211 /* default 82598 register test */
1212 static const struct ixgbe_reg_test reg_test_82598[] = {
1213         { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1214         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1215         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1216         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1217         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1218         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1219         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1220         /* Enable all four RX queues before testing. */
1221         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1222         /* RDH is read-only for 82598, only test RDT. */
1223         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1224         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1225         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1226         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1227         { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF },
1228         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1229         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1230         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1231         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 },
1232         { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 },
1233         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1234         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF },
1235         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1236         { 0, 0, 0, 0 }
1237 };
1238
1239 static const u32 register_test_patterns[] = {
1240         0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF
1241 };
1242
1243 #define REG_PATTERN_TEST(R, M, W)                                             \
1244 {                                                                             \
1245         u32 pat, val, before;                                                 \
1246         for (pat = 0; pat < ARRAY_SIZE(register_test_patterns); pat++) {      \
1247                 before = readl(adapter->hw.hw_addr + R);                      \
1248                 writel((register_test_patterns[pat] & W),                     \
1249                        (adapter->hw.hw_addr + R));                            \
1250                 val = readl(adapter->hw.hw_addr + R);                         \
1251                 if (val != (register_test_patterns[pat] & W & M)) {           \
1252                         e_err(drv, "pattern test reg %04X failed: got "       \
1253                               "0x%08X expected 0x%08X\n",                     \
1254                               R, val, (register_test_patterns[pat] & W & M)); \
1255                         *data = R;                                            \
1256                         writel(before, adapter->hw.hw_addr + R);              \
1257                         return 1;                                             \
1258                 }                                                             \
1259                 writel(before, adapter->hw.hw_addr + R);                      \
1260         }                                                                     \
1261 }
1262
1263 #define REG_SET_AND_CHECK(R, M, W)                                            \
1264 {                                                                             \
1265         u32 val, before;                                                      \
1266         before = readl(adapter->hw.hw_addr + R);                              \
1267         writel((W & M), (adapter->hw.hw_addr + R));                           \
1268         val = readl(adapter->hw.hw_addr + R);                                 \
1269         if ((W & M) != (val & M)) {                                           \
1270                 e_err(drv, "set/check reg %04X test failed: got 0x%08X "  \
1271                       "expected 0x%08X\n", R, (val & M), (W & M));        \
1272                 *data = R;                                                    \
1273                 writel(before, (adapter->hw.hw_addr + R));                    \
1274                 return 1;                                                     \
1275         }                                                                     \
1276         writel(before, (adapter->hw.hw_addr + R));                            \
1277 }
1278
1279 static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
1280 {
1281         const struct ixgbe_reg_test *test;
1282         u32 value, before, after;
1283         u32 i, toggle;
1284
1285         switch (adapter->hw.mac.type) {
1286         case ixgbe_mac_82598EB:
1287                 toggle = 0x7FFFF3FF;
1288                 test = reg_test_82598;
1289                 break;
1290         case ixgbe_mac_82599EB:
1291         case ixgbe_mac_X540:
1292                 toggle = 0x7FFFF30F;
1293                 test = reg_test_82599;
1294                 break;
1295         default:
1296                 *data = 1;
1297                 return 1;
1298                 break;
1299         }
1300
1301         /*
1302          * Because the status register is such a special case,
1303          * we handle it separately from the rest of the register
1304          * tests.  Some bits are read-only, some toggle, and some
1305          * are writeable on newer MACs.
1306          */
1307         before = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS);
1308         value = (IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle);
1309         IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, toggle);
1310         after = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle;
1311         if (value != after) {
1312                 e_err(drv, "failed STATUS register test got: 0x%08X "
1313                       "expected: 0x%08X\n", after, value);
1314                 *data = 1;
1315                 return 1;
1316         }
1317         /* restore previous status */
1318         IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, before);
1319
1320         /*
1321          * Perform the remainder of the register test, looping through
1322          * the test table until we either fail or reach the null entry.
1323          */
1324         while (test->reg) {
1325                 for (i = 0; i < test->array_len; i++) {
1326                         switch (test->test_type) {
1327                         case PATTERN_TEST:
1328                                 REG_PATTERN_TEST(test->reg + (i * 0x40),
1329                                                 test->mask,
1330                                                 test->write);
1331                                 break;
1332                         case SET_READ_TEST:
1333                                 REG_SET_AND_CHECK(test->reg + (i * 0x40),
1334                                                 test->mask,
1335                                                 test->write);
1336                                 break;
1337                         case WRITE_NO_TEST:
1338                                 writel(test->write,
1339                                        (adapter->hw.hw_addr + test->reg)
1340                                        + (i * 0x40));
1341                                 break;
1342                         case TABLE32_TEST:
1343                                 REG_PATTERN_TEST(test->reg + (i * 4),
1344                                                 test->mask,
1345                                                 test->write);
1346                                 break;
1347                         case TABLE64_TEST_LO:
1348                                 REG_PATTERN_TEST(test->reg + (i * 8),
1349                                                 test->mask,
1350                                                 test->write);
1351                                 break;
1352                         case TABLE64_TEST_HI:
1353                                 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1354                                                 test->mask,
1355                                                 test->write);
1356                                 break;
1357                         }
1358                 }
1359                 test++;
1360         }
1361
1362         *data = 0;
1363         return 0;
1364 }
1365
1366 static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data)
1367 {
1368         struct ixgbe_hw *hw = &adapter->hw;
1369         if (hw->eeprom.ops.validate_checksum(hw, NULL))
1370                 *data = 1;
1371         else
1372                 *data = 0;
1373         return *data;
1374 }
1375
1376 static irqreturn_t ixgbe_test_intr(int irq, void *data)
1377 {
1378         struct net_device *netdev = (struct net_device *) data;
1379         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1380
1381         adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR);
1382
1383         return IRQ_HANDLED;
1384 }
1385
1386 static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data)
1387 {
1388         struct net_device *netdev = adapter->netdev;
1389         u32 mask, i = 0, shared_int = true;
1390         u32 irq = adapter->pdev->irq;
1391
1392         *data = 0;
1393
1394         /* Hook up test interrupt handler just for this test */
1395         if (adapter->msix_entries) {
1396                 /* NOTE: we don't test MSI-X interrupts here, yet */
1397                 return 0;
1398         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1399                 shared_int = false;
1400                 if (request_irq(irq, ixgbe_test_intr, 0, netdev->name,
1401                                 netdev)) {
1402                         *data = 1;
1403                         return -1;
1404                 }
1405         } else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED,
1406                                 netdev->name, netdev)) {
1407                 shared_int = false;
1408         } else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED,
1409                                netdev->name, netdev)) {
1410                 *data = 1;
1411                 return -1;
1412         }
1413         e_info(hw, "testing %s interrupt\n", shared_int ?
1414                "shared" : "unshared");
1415
1416         /* Disable all the interrupts */
1417         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1418         usleep_range(10000, 20000);
1419
1420         /* Test each interrupt */
1421         for (; i < 10; i++) {
1422                 /* Interrupt to test */
1423                 mask = 1 << i;
1424
1425                 if (!shared_int) {
1426                         /*
1427                          * Disable the interrupts to be reported in
1428                          * the cause register and then force the same
1429                          * interrupt and see if one gets posted.  If
1430                          * an interrupt was posted to the bus, the
1431                          * test failed.
1432                          */
1433                         adapter->test_icr = 0;
1434                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1435                                         ~mask & 0x00007FFF);
1436                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1437                                         ~mask & 0x00007FFF);
1438                         usleep_range(10000, 20000);
1439
1440                         if (adapter->test_icr & mask) {
1441                                 *data = 3;
1442                                 break;
1443                         }
1444                 }
1445
1446                 /*
1447                  * Enable the interrupt to be reported in the cause
1448                  * register and then force the same interrupt and see
1449                  * if one gets posted.  If an interrupt was not posted
1450                  * to the bus, the test failed.
1451                  */
1452                 adapter->test_icr = 0;
1453                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1454                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
1455                 usleep_range(10000, 20000);
1456
1457                 if (!(adapter->test_icr &mask)) {
1458                         *data = 4;
1459                         break;
1460                 }
1461
1462                 if (!shared_int) {
1463                         /*
1464                          * Disable the other interrupts to be reported in
1465                          * the cause register and then force the other
1466                          * interrupts and see if any get posted.  If
1467                          * an interrupt was posted to the bus, the
1468                          * test failed.
1469                          */
1470                         adapter->test_icr = 0;
1471                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1472                                         ~mask & 0x00007FFF);
1473                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1474                                         ~mask & 0x00007FFF);
1475                         usleep_range(10000, 20000);
1476
1477                         if (adapter->test_icr) {
1478                                 *data = 5;
1479                                 break;
1480                         }
1481                 }
1482         }
1483
1484         /* Disable all the interrupts */
1485         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1486         usleep_range(10000, 20000);
1487
1488         /* Unhook test interrupt handler */
1489         free_irq(irq, netdev);
1490
1491         return *data;
1492 }
1493
1494 static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter)
1495 {
1496         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1497         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1498         struct ixgbe_hw *hw = &adapter->hw;
1499         u32 reg_ctl;
1500
1501         /* shut down the DMA engines now so they can be reinitialized later */
1502
1503         /* first Rx */
1504         reg_ctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1505         reg_ctl &= ~IXGBE_RXCTRL_RXEN;
1506         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, reg_ctl);
1507         ixgbe_disable_rx_queue(adapter, rx_ring);
1508
1509         /* now Tx */
1510         reg_ctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx));
1511         reg_ctl &= ~IXGBE_TXDCTL_ENABLE;
1512         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx), reg_ctl);
1513
1514         switch (hw->mac.type) {
1515         case ixgbe_mac_82599EB:
1516         case ixgbe_mac_X540:
1517                 reg_ctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
1518                 reg_ctl &= ~IXGBE_DMATXCTL_TE;
1519                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg_ctl);
1520                 break;
1521         default:
1522                 break;
1523         }
1524
1525         ixgbe_reset(adapter);
1526
1527         ixgbe_free_tx_resources(&adapter->test_tx_ring);
1528         ixgbe_free_rx_resources(&adapter->test_rx_ring);
1529 }
1530
1531 static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter)
1532 {
1533         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1534         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1535         u32 rctl, reg_data;
1536         int ret_val;
1537         int err;
1538
1539         /* Setup Tx descriptor ring and Tx buffers */
1540         tx_ring->count = IXGBE_DEFAULT_TXD;
1541         tx_ring->queue_index = 0;
1542         tx_ring->dev = &adapter->pdev->dev;
1543         tx_ring->netdev = adapter->netdev;
1544         tx_ring->reg_idx = adapter->tx_ring[0]->reg_idx;
1545         tx_ring->numa_node = adapter->node;
1546
1547         err = ixgbe_setup_tx_resources(tx_ring);
1548         if (err)
1549                 return 1;
1550
1551         switch (adapter->hw.mac.type) {
1552         case ixgbe_mac_82599EB:
1553         case ixgbe_mac_X540:
1554                 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL);
1555                 reg_data |= IXGBE_DMATXCTL_TE;
1556                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data);
1557                 break;
1558         default:
1559                 break;
1560         }
1561
1562         ixgbe_configure_tx_ring(adapter, tx_ring);
1563
1564         /* Setup Rx Descriptor ring and Rx buffers */
1565         rx_ring->count = IXGBE_DEFAULT_RXD;
1566         rx_ring->queue_index = 0;
1567         rx_ring->dev = &adapter->pdev->dev;
1568         rx_ring->netdev = adapter->netdev;
1569         rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx;
1570         rx_ring->rx_buf_len = IXGBE_RXBUFFER_2048;
1571         rx_ring->numa_node = adapter->node;
1572
1573         err = ixgbe_setup_rx_resources(rx_ring);
1574         if (err) {
1575                 ret_val = 4;
1576                 goto err_nomem;
1577         }
1578
1579         rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1580         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl & ~IXGBE_RXCTRL_RXEN);
1581
1582         ixgbe_configure_rx_ring(adapter, rx_ring);
1583
1584         rctl |= IXGBE_RXCTRL_RXEN | IXGBE_RXCTRL_DMBYPS;
1585         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl);
1586
1587         return 0;
1588
1589 err_nomem:
1590         ixgbe_free_desc_rings(adapter);
1591         return ret_val;
1592 }
1593
1594 static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter)
1595 {
1596         struct ixgbe_hw *hw = &adapter->hw;
1597         u32 reg_data;
1598
1599         /* X540 needs to set the MACC.FLU bit to force link up */
1600         if (adapter->hw.mac.type == ixgbe_mac_X540) {
1601                 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_MACC);
1602                 reg_data |= IXGBE_MACC_FLU;
1603                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_MACC, reg_data);
1604         }
1605
1606         /* right now we only support MAC loopback in the driver */
1607         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1608         /* Setup MAC loopback */
1609         reg_data |= IXGBE_HLREG0_LPBK;
1610         IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1611
1612         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1613         reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE;
1614         IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, reg_data);
1615
1616         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_AUTOC);
1617         reg_data &= ~IXGBE_AUTOC_LMS_MASK;
1618         reg_data |= IXGBE_AUTOC_LMS_10G_LINK_NO_AN | IXGBE_AUTOC_FLU;
1619         IXGBE_WRITE_REG(&adapter->hw, IXGBE_AUTOC, reg_data);
1620         IXGBE_WRITE_FLUSH(&adapter->hw);
1621         usleep_range(10000, 20000);
1622
1623         /* Disable Atlas Tx lanes; re-enabled in reset path */
1624         if (hw->mac.type == ixgbe_mac_82598EB) {
1625                 u8 atlas;
1626
1627                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas);
1628                 atlas |= IXGBE_ATLAS_PDN_TX_REG_EN;
1629                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas);
1630
1631                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas);
1632                 atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
1633                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas);
1634
1635                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas);
1636                 atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
1637                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas);
1638
1639                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas);
1640                 atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
1641                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas);
1642         }
1643
1644         return 0;
1645 }
1646
1647 static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter)
1648 {
1649         u32 reg_data;
1650
1651         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1652         reg_data &= ~IXGBE_HLREG0_LPBK;
1653         IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1654 }
1655
1656 static void ixgbe_create_lbtest_frame(struct sk_buff *skb,
1657                                       unsigned int frame_size)
1658 {
1659         memset(skb->data, 0xFF, frame_size);
1660         frame_size &= ~1;
1661         memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1662         memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1663         memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1664 }
1665
1666 static int ixgbe_check_lbtest_frame(struct sk_buff *skb,
1667                                     unsigned int frame_size)
1668 {
1669         frame_size &= ~1;
1670         if (*(skb->data + 3) == 0xFF) {
1671                 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1672                     (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1673                         return 0;
1674                 }
1675         }
1676         return 13;
1677 }
1678
1679 static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring,
1680                                   struct ixgbe_ring *tx_ring,
1681                                   unsigned int size)
1682 {
1683         union ixgbe_adv_rx_desc *rx_desc;
1684         struct ixgbe_rx_buffer *rx_buffer_info;
1685         struct ixgbe_tx_buffer *tx_buffer_info;
1686         const int bufsz = rx_ring->rx_buf_len;
1687         u32 staterr;
1688         u16 rx_ntc, tx_ntc, count = 0;
1689
1690         /* initialize next to clean and descriptor values */
1691         rx_ntc = rx_ring->next_to_clean;
1692         tx_ntc = tx_ring->next_to_clean;
1693         rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc);
1694         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1695
1696         while (staterr & IXGBE_RXD_STAT_DD) {
1697                 /* check Rx buffer */
1698                 rx_buffer_info = &rx_ring->rx_buffer_info[rx_ntc];
1699
1700                 /* unmap Rx buffer, will be remapped by alloc_rx_buffers */
1701                 dma_unmap_single(rx_ring->dev,
1702                                  rx_buffer_info->dma,
1703                                  bufsz,
1704                                  DMA_FROM_DEVICE);
1705                 rx_buffer_info->dma = 0;
1706
1707                 /* verify contents of skb */
1708                 if (!ixgbe_check_lbtest_frame(rx_buffer_info->skb, size))
1709                         count++;
1710
1711                 /* unmap buffer on Tx side */
1712                 tx_buffer_info = &tx_ring->tx_buffer_info[tx_ntc];
1713                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
1714
1715                 /* increment Rx/Tx next to clean counters */
1716                 rx_ntc++;
1717                 if (rx_ntc == rx_ring->count)
1718                         rx_ntc = 0;
1719                 tx_ntc++;
1720                 if (tx_ntc == tx_ring->count)
1721                         tx_ntc = 0;
1722
1723                 /* fetch next descriptor */
1724                 rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc);
1725                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1726         }
1727
1728         /* re-map buffers to ring, store next to clean values */
1729         ixgbe_alloc_rx_buffers(rx_ring, count);
1730         rx_ring->next_to_clean = rx_ntc;
1731         tx_ring->next_to_clean = tx_ntc;
1732
1733         return count;
1734 }
1735
1736 static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter)
1737 {
1738         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1739         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1740         int i, j, lc, good_cnt, ret_val = 0;
1741         unsigned int size = 1024;
1742         netdev_tx_t tx_ret_val;
1743         struct sk_buff *skb;
1744
1745         /* allocate test skb */
1746         skb = alloc_skb(size, GFP_KERNEL);
1747         if (!skb)
1748                 return 11;
1749
1750         /* place data into test skb */
1751         ixgbe_create_lbtest_frame(skb, size);
1752         skb_put(skb, size);
1753
1754         /*
1755          * Calculate the loop count based on the largest descriptor ring
1756          * The idea is to wrap the largest ring a number of times using 64
1757          * send/receive pairs during each loop
1758          */
1759
1760         if (rx_ring->count <= tx_ring->count)
1761                 lc = ((tx_ring->count / 64) * 2) + 1;
1762         else
1763                 lc = ((rx_ring->count / 64) * 2) + 1;
1764
1765         for (j = 0; j <= lc; j++) {
1766                 /* reset count of good packets */
1767                 good_cnt = 0;
1768
1769                 /* place 64 packets on the transmit queue*/
1770                 for (i = 0; i < 64; i++) {
1771                         skb_get(skb);
1772                         tx_ret_val = ixgbe_xmit_frame_ring(skb,
1773                                                            adapter,
1774                                                            tx_ring);
1775                         if (tx_ret_val == NETDEV_TX_OK)
1776                                 good_cnt++;
1777                 }
1778
1779                 if (good_cnt != 64) {
1780                         ret_val = 12;
1781                         break;
1782                 }
1783
1784                 /* allow 200 milliseconds for packets to go from Tx to Rx */
1785                 msleep(200);
1786
1787                 good_cnt = ixgbe_clean_test_rings(rx_ring, tx_ring, size);
1788                 if (good_cnt != 64) {
1789                         ret_val = 13;
1790                         break;
1791                 }
1792         }
1793
1794         /* free the original skb */
1795         kfree_skb(skb);
1796
1797         return ret_val;
1798 }
1799
1800 static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data)
1801 {
1802         *data = ixgbe_setup_desc_rings(adapter);
1803         if (*data)
1804                 goto out;
1805         *data = ixgbe_setup_loopback_test(adapter);
1806         if (*data)
1807                 goto err_loopback;
1808         *data = ixgbe_run_loopback_test(adapter);
1809         ixgbe_loopback_cleanup(adapter);
1810
1811 err_loopback:
1812         ixgbe_free_desc_rings(adapter);
1813 out:
1814         return *data;
1815 }
1816
1817 static void ixgbe_diag_test(struct net_device *netdev,
1818                             struct ethtool_test *eth_test, u64 *data)
1819 {
1820         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1821         bool if_running = netif_running(netdev);
1822
1823         set_bit(__IXGBE_TESTING, &adapter->state);
1824         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1825                 /* Offline tests */
1826
1827                 e_info(hw, "offline testing starting\n");
1828
1829                 /* Link test performed before hardware reset so autoneg doesn't
1830                  * interfere with test result */
1831                 if (ixgbe_link_test(adapter, &data[4]))
1832                         eth_test->flags |= ETH_TEST_FL_FAILED;
1833
1834                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
1835                         int i;
1836                         for (i = 0; i < adapter->num_vfs; i++) {
1837                                 if (adapter->vfinfo[i].clear_to_send) {
1838                                         netdev_warn(netdev, "%s",
1839                                                     "offline diagnostic is not "
1840                                                     "supported when VFs are "
1841                                                     "present\n");
1842                                         data[0] = 1;
1843                                         data[1] = 1;
1844                                         data[2] = 1;
1845                                         data[3] = 1;
1846                                         eth_test->flags |= ETH_TEST_FL_FAILED;
1847                                         clear_bit(__IXGBE_TESTING,
1848                                                   &adapter->state);
1849                                         goto skip_ol_tests;
1850                                 }
1851                         }
1852                 }
1853
1854                 if (if_running)
1855                         /* indicate we're in test mode */
1856                         dev_close(netdev);
1857                 else
1858                         ixgbe_reset(adapter);
1859
1860                 e_info(hw, "register testing starting\n");
1861                 if (ixgbe_reg_test(adapter, &data[0]))
1862                         eth_test->flags |= ETH_TEST_FL_FAILED;
1863
1864                 ixgbe_reset(adapter);
1865                 e_info(hw, "eeprom testing starting\n");
1866                 if (ixgbe_eeprom_test(adapter, &data[1]))
1867                         eth_test->flags |= ETH_TEST_FL_FAILED;
1868
1869                 ixgbe_reset(adapter);
1870                 e_info(hw, "interrupt testing starting\n");
1871                 if (ixgbe_intr_test(adapter, &data[2]))
1872                         eth_test->flags |= ETH_TEST_FL_FAILED;
1873
1874                 /* If SRIOV or VMDq is enabled then skip MAC
1875                  * loopback diagnostic. */
1876                 if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED |
1877                                       IXGBE_FLAG_VMDQ_ENABLED)) {
1878                         e_info(hw, "Skip MAC loopback diagnostic in VT "
1879                                "mode\n");
1880                         data[3] = 0;
1881                         goto skip_loopback;
1882                 }
1883
1884                 ixgbe_reset(adapter);
1885                 e_info(hw, "loopback testing starting\n");
1886                 if (ixgbe_loopback_test(adapter, &data[3]))
1887                         eth_test->flags |= ETH_TEST_FL_FAILED;
1888
1889 skip_loopback:
1890                 ixgbe_reset(adapter);
1891
1892                 clear_bit(__IXGBE_TESTING, &adapter->state);
1893                 if (if_running)
1894                         dev_open(netdev);
1895         } else {
1896                 e_info(hw, "online testing starting\n");
1897                 /* Online tests */
1898                 if (ixgbe_link_test(adapter, &data[4]))
1899                         eth_test->flags |= ETH_TEST_FL_FAILED;
1900
1901                 /* Online tests aren't run; pass by default */
1902                 data[0] = 0;
1903                 data[1] = 0;
1904                 data[2] = 0;
1905                 data[3] = 0;
1906
1907                 clear_bit(__IXGBE_TESTING, &adapter->state);
1908         }
1909 skip_ol_tests:
1910         msleep_interruptible(4 * 1000);
1911 }
1912
1913 static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
1914                                struct ethtool_wolinfo *wol)
1915 {
1916         struct ixgbe_hw *hw = &adapter->hw;
1917         int retval = 1;
1918
1919         /* WOL not supported except for the following */
1920         switch(hw->device_id) {
1921         case IXGBE_DEV_ID_82599_SFP:
1922                 /* Only this subdevice supports WOL */
1923                 if (hw->subsystem_device_id != IXGBE_SUBDEV_ID_82599_SFP) {
1924                         wol->supported = 0;
1925                         break;
1926                 }
1927                 retval = 0;
1928                 break;
1929         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
1930                 /* All except this subdevice support WOL */
1931                 if (hw->subsystem_device_id ==
1932                     IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ) {
1933                         wol->supported = 0;
1934                         break;
1935                 }
1936                 retval = 0;
1937                 break;
1938         case IXGBE_DEV_ID_82599_KX4:
1939                 retval = 0;
1940                 break;
1941         default:
1942                 wol->supported = 0;
1943         }
1944
1945         return retval;
1946 }
1947
1948 static void ixgbe_get_wol(struct net_device *netdev,
1949                           struct ethtool_wolinfo *wol)
1950 {
1951         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1952
1953         wol->supported = WAKE_UCAST | WAKE_MCAST |
1954                          WAKE_BCAST | WAKE_MAGIC;
1955         wol->wolopts = 0;
1956
1957         if (ixgbe_wol_exclusion(adapter, wol) ||
1958             !device_can_wakeup(&adapter->pdev->dev))
1959                 return;
1960
1961         if (adapter->wol & IXGBE_WUFC_EX)
1962                 wol->wolopts |= WAKE_UCAST;
1963         if (adapter->wol & IXGBE_WUFC_MC)
1964                 wol->wolopts |= WAKE_MCAST;
1965         if (adapter->wol & IXGBE_WUFC_BC)
1966                 wol->wolopts |= WAKE_BCAST;
1967         if (adapter->wol & IXGBE_WUFC_MAG)
1968                 wol->wolopts |= WAKE_MAGIC;
1969 }
1970
1971 static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1972 {
1973         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1974
1975         if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1976                 return -EOPNOTSUPP;
1977
1978         if (ixgbe_wol_exclusion(adapter, wol))
1979                 return wol->wolopts ? -EOPNOTSUPP : 0;
1980
1981         adapter->wol = 0;
1982
1983         if (wol->wolopts & WAKE_UCAST)
1984                 adapter->wol |= IXGBE_WUFC_EX;
1985         if (wol->wolopts & WAKE_MCAST)
1986                 adapter->wol |= IXGBE_WUFC_MC;
1987         if (wol->wolopts & WAKE_BCAST)
1988                 adapter->wol |= IXGBE_WUFC_BC;
1989         if (wol->wolopts & WAKE_MAGIC)
1990                 adapter->wol |= IXGBE_WUFC_MAG;
1991
1992         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1993
1994         return 0;
1995 }
1996
1997 static int ixgbe_nway_reset(struct net_device *netdev)
1998 {
1999         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2000
2001         if (netif_running(netdev))
2002                 ixgbe_reinit_locked(adapter);
2003
2004         return 0;
2005 }
2006
2007 static int ixgbe_set_phys_id(struct net_device *netdev,
2008                              enum ethtool_phys_id_state state)
2009 {
2010         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2011         struct ixgbe_hw *hw = &adapter->hw;
2012
2013         switch (state) {
2014         case ETHTOOL_ID_ACTIVE:
2015                 adapter->led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
2016                 return 2;
2017
2018         case ETHTOOL_ID_ON:
2019                 hw->mac.ops.led_on(hw, IXGBE_LED_ON);
2020                 break;
2021
2022         case ETHTOOL_ID_OFF:
2023                 hw->mac.ops.led_off(hw, IXGBE_LED_ON);
2024                 break;
2025
2026         case ETHTOOL_ID_INACTIVE:
2027                 /* Restore LED settings */
2028                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, adapter->led_reg);
2029                 break;
2030         }
2031
2032         return 0;
2033 }
2034
2035 static int ixgbe_get_coalesce(struct net_device *netdev,
2036                               struct ethtool_coalesce *ec)
2037 {
2038         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2039
2040         ec->tx_max_coalesced_frames_irq = adapter->tx_ring[0]->work_limit;
2041
2042         /* only valid if in constant ITR mode */
2043         switch (adapter->rx_itr_setting) {
2044         case 0:
2045                 /* throttling disabled */
2046                 ec->rx_coalesce_usecs = 0;
2047                 break;
2048         case 1:
2049                 /* dynamic ITR mode */
2050                 ec->rx_coalesce_usecs = 1;
2051                 break;
2052         default:
2053                 /* fixed interrupt rate mode */
2054                 ec->rx_coalesce_usecs = 1000000/adapter->rx_eitr_param;
2055                 break;
2056         }
2057
2058         /* if in mixed tx/rx queues per vector mode, report only rx settings */
2059         if (adapter->q_vector[0]->txr_count && adapter->q_vector[0]->rxr_count)
2060                 return 0;
2061
2062         /* only valid if in constant ITR mode */
2063         switch (adapter->tx_itr_setting) {
2064         case 0:
2065                 /* throttling disabled */
2066                 ec->tx_coalesce_usecs = 0;
2067                 break;
2068         case 1:
2069                 /* dynamic ITR mode */
2070                 ec->tx_coalesce_usecs = 1;
2071                 break;
2072         default:
2073                 ec->tx_coalesce_usecs = 1000000/adapter->tx_eitr_param;
2074                 break;
2075         }
2076
2077         return 0;
2078 }
2079
2080 /*
2081  * this function must be called before setting the new value of
2082  * rx_itr_setting
2083  */
2084 static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter,
2085                              struct ethtool_coalesce *ec)
2086 {
2087         struct net_device *netdev = adapter->netdev;
2088
2089         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
2090                 return false;
2091
2092         /* if interrupt rate is too high then disable RSC */
2093         if (ec->rx_coalesce_usecs != 1 &&
2094             ec->rx_coalesce_usecs <= 1000000/IXGBE_MAX_RSC_INT_RATE) {
2095                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2096                         e_info(probe, "rx-usecs set too low, "
2097                                       "disabling RSC\n");
2098                         adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
2099                         return true;
2100                 }
2101         } else {
2102                 /* check the feature flag value and enable RSC if necessary */
2103                 if ((netdev->features & NETIF_F_LRO) &&
2104                     !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
2105                         e_info(probe, "rx-usecs set to %d, "
2106                                       "re-enabling RSC\n",
2107                                ec->rx_coalesce_usecs);
2108                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
2109                         return true;
2110                 }
2111         }
2112         return false;
2113 }
2114
2115 static int ixgbe_set_coalesce(struct net_device *netdev,
2116                               struct ethtool_coalesce *ec)
2117 {
2118         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2119         struct ixgbe_q_vector *q_vector;
2120         int i;
2121         bool need_reset = false;
2122
2123         /* don't accept tx specific changes if we've got mixed RxTx vectors */
2124         if (adapter->q_vector[0]->txr_count && adapter->q_vector[0]->rxr_count
2125            && ec->tx_coalesce_usecs)
2126                 return -EINVAL;
2127
2128         if (ec->tx_max_coalesced_frames_irq)
2129                 adapter->tx_ring[0]->work_limit = ec->tx_max_coalesced_frames_irq;
2130
2131         if (ec->rx_coalesce_usecs > 1) {
2132                 /* check the limits */
2133                 if ((1000000/ec->rx_coalesce_usecs > IXGBE_MAX_INT_RATE) ||
2134                     (1000000/ec->rx_coalesce_usecs < IXGBE_MIN_INT_RATE))
2135                         return -EINVAL;
2136
2137                 /* check the old value and enable RSC if necessary */
2138                 need_reset = ixgbe_update_rsc(adapter, ec);
2139
2140                 /* store the value in ints/second */
2141                 adapter->rx_eitr_param = 1000000/ec->rx_coalesce_usecs;
2142
2143                 /* static value of interrupt rate */
2144                 adapter->rx_itr_setting = adapter->rx_eitr_param;
2145                 /* clear the lower bit as its used for dynamic state */
2146                 adapter->rx_itr_setting &= ~1;
2147         } else if (ec->rx_coalesce_usecs == 1) {
2148                 /* check the old value and enable RSC if necessary */
2149                 need_reset = ixgbe_update_rsc(adapter, ec);
2150
2151                 /* 1 means dynamic mode */
2152                 adapter->rx_eitr_param = 20000;
2153                 adapter->rx_itr_setting = 1;
2154         } else {
2155                 /* check the old value and enable RSC if necessary */
2156                 need_reset = ixgbe_update_rsc(adapter, ec);
2157                 /*
2158                  * any other value means disable eitr, which is best
2159                  * served by setting the interrupt rate very high
2160                  */
2161                 adapter->rx_eitr_param = IXGBE_MAX_INT_RATE;
2162                 adapter->rx_itr_setting = 0;
2163         }
2164
2165         if (ec->tx_coalesce_usecs > 1) {
2166                 /*
2167                  * don't have to worry about max_int as above because
2168                  * tx vectors don't do hardware RSC (an rx function)
2169                  */
2170                 /* check the limits */
2171                 if ((1000000/ec->tx_coalesce_usecs > IXGBE_MAX_INT_RATE) ||
2172                     (1000000/ec->tx_coalesce_usecs < IXGBE_MIN_INT_RATE))
2173                         return -EINVAL;
2174
2175                 /* store the value in ints/second */
2176                 adapter->tx_eitr_param = 1000000/ec->tx_coalesce_usecs;
2177
2178                 /* static value of interrupt rate */
2179                 adapter->tx_itr_setting = adapter->tx_eitr_param;
2180
2181                 /* clear the lower bit as its used for dynamic state */
2182                 adapter->tx_itr_setting &= ~1;
2183         } else if (ec->tx_coalesce_usecs == 1) {
2184                 /* 1 means dynamic mode */
2185                 adapter->tx_eitr_param = 10000;
2186                 adapter->tx_itr_setting = 1;
2187         } else {
2188                 adapter->tx_eitr_param = IXGBE_MAX_INT_RATE;
2189                 adapter->tx_itr_setting = 0;
2190         }
2191
2192         /* MSI/MSIx Interrupt Mode */
2193         if (adapter->flags &
2194             (IXGBE_FLAG_MSIX_ENABLED | IXGBE_FLAG_MSI_ENABLED)) {
2195                 int num_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2196                 for (i = 0; i < num_vectors; i++) {
2197                         q_vector = adapter->q_vector[i];
2198                         if (q_vector->txr_count && !q_vector->rxr_count)
2199                                 /* tx only */
2200                                 q_vector->eitr = adapter->tx_eitr_param;
2201                         else
2202                                 /* rx only or mixed */
2203                                 q_vector->eitr = adapter->rx_eitr_param;
2204                         ixgbe_write_eitr(q_vector);
2205                 }
2206         /* Legacy Interrupt Mode */
2207         } else {
2208                 q_vector = adapter->q_vector[0];
2209                 q_vector->eitr = adapter->rx_eitr_param;
2210                 ixgbe_write_eitr(q_vector);
2211         }
2212
2213         /*
2214          * do reset here at the end to make sure EITR==0 case is handled
2215          * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings
2216          * also locks in RSC enable/disable which requires reset
2217          */
2218         if (need_reset) {
2219                 if (netif_running(netdev))
2220                         ixgbe_reinit_locked(adapter);
2221                 else
2222                         ixgbe_reset(adapter);
2223         }
2224
2225         return 0;
2226 }
2227
2228 static int ixgbe_set_flags(struct net_device *netdev, u32 data)
2229 {
2230         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2231         bool need_reset = false;
2232         int rc;
2233
2234 #ifdef CONFIG_IXGBE_DCB
2235         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
2236             !(data & ETH_FLAG_RXVLAN))
2237                 return -EINVAL;
2238 #endif
2239
2240         need_reset = (data & ETH_FLAG_RXVLAN) !=
2241                      (netdev->features & NETIF_F_HW_VLAN_RX);
2242
2243         rc = ethtool_op_set_flags(netdev, data, ETH_FLAG_LRO | ETH_FLAG_NTUPLE |
2244                                         ETH_FLAG_RXVLAN | ETH_FLAG_TXVLAN);
2245         if (rc)
2246                 return rc;
2247
2248         /* if state changes we need to update adapter->flags and reset */
2249         if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
2250             (!!(data & ETH_FLAG_LRO) !=
2251              !!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))) {
2252                 if ((data & ETH_FLAG_LRO) &&
2253                     (!adapter->rx_itr_setting ||
2254                      (adapter->rx_itr_setting > IXGBE_MAX_RSC_INT_RATE))) {
2255                         e_info(probe, "rx-usecs set too low, "
2256                                       "not enabling RSC.\n");
2257                 } else {
2258                         adapter->flags2 ^= IXGBE_FLAG2_RSC_ENABLED;
2259                         switch (adapter->hw.mac.type) {
2260                         case ixgbe_mac_82599EB:
2261                                 need_reset = true;
2262                                 break;
2263                         case ixgbe_mac_X540: {
2264                                 int i;
2265                                 for (i = 0; i < adapter->num_rx_queues; i++) {
2266                                         struct ixgbe_ring *ring =
2267                                                           adapter->rx_ring[i];
2268                                         if (adapter->flags2 &
2269                                             IXGBE_FLAG2_RSC_ENABLED) {
2270                                                 ixgbe_configure_rscctl(adapter,
2271                                                                        ring);
2272                                         } else {
2273                                                 ixgbe_clear_rscctl(adapter,
2274                                                                    ring);
2275                                         }
2276                                 }
2277                         }
2278                                 break;
2279                         default:
2280                                 break;
2281                         }
2282                 }
2283         }
2284
2285         /*
2286          * Check if Flow Director n-tuple support was enabled or disabled.  If
2287          * the state changed, we need to reset.
2288          */
2289         if ((adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) &&
2290             (!(data & ETH_FLAG_NTUPLE))) {
2291                 /* turn off Flow Director perfect, set hash and reset */
2292                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
2293                 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
2294                 need_reset = true;
2295         } else if ((!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) &&
2296                    (data & ETH_FLAG_NTUPLE)) {
2297                 /* turn off Flow Director hash, enable perfect and reset */
2298                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
2299                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
2300                 need_reset = true;
2301         } else {
2302                 /* no state change */
2303         }
2304
2305         if (need_reset) {
2306                 if (netif_running(netdev))
2307                         ixgbe_reinit_locked(adapter);
2308                 else
2309                         ixgbe_reset(adapter);
2310         }
2311
2312         return 0;
2313 }
2314
2315 static int ixgbe_set_rx_ntuple(struct net_device *dev,
2316                                struct ethtool_rx_ntuple *cmd)
2317 {
2318         struct ixgbe_adapter *adapter = netdev_priv(dev);
2319         struct ethtool_rx_ntuple_flow_spec *fs = &cmd->fs;
2320         union ixgbe_atr_input input_struct;
2321         struct ixgbe_atr_input_masks input_masks;
2322         int target_queue;
2323         int err;
2324
2325         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
2326                 return -EOPNOTSUPP;
2327
2328         /*
2329          * Don't allow programming if the action is a queue greater than
2330          * the number of online Tx queues.
2331          */
2332         if ((fs->action >= adapter->num_tx_queues) ||
2333             (fs->action < ETHTOOL_RXNTUPLE_ACTION_DROP))
2334                 return -EINVAL;
2335
2336         memset(&input_struct, 0, sizeof(union ixgbe_atr_input));
2337         memset(&input_masks, 0, sizeof(struct ixgbe_atr_input_masks));
2338
2339         /* record flow type */
2340         switch (fs->flow_type) {
2341         case IPV4_FLOW:
2342                 input_struct.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_IPV4;
2343                 break;
2344         case TCP_V4_FLOW:
2345                 input_struct.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2346                 break;
2347         case UDP_V4_FLOW:
2348                 input_struct.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2349                 break;
2350         case SCTP_V4_FLOW:
2351                 input_struct.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2352                 break;
2353         default:
2354                 return -1;
2355         }
2356
2357         /* copy vlan tag minus the CFI bit */
2358         if ((fs->vlan_tag & 0xEFFF) || (~fs->vlan_tag_mask & 0xEFFF)) {
2359                 input_struct.formatted.vlan_id = htons(fs->vlan_tag & 0xEFFF);
2360                 if (!fs->vlan_tag_mask) {
2361                         input_masks.vlan_id_mask = htons(0xEFFF);
2362                 } else {
2363                         switch (~fs->vlan_tag_mask & 0xEFFF) {
2364                         /* all of these are valid vlan-mask values */
2365                         case 0xEFFF:
2366                         case 0xE000:
2367                         case 0x0FFF:
2368                         case 0x0000:
2369                                 input_masks.vlan_id_mask =
2370                                         htons(~fs->vlan_tag_mask);
2371                                 break;
2372                         /* exit with error if vlan-mask is invalid */
2373                         default:
2374                                 e_err(drv, "Partial VLAN ID or "
2375                                       "priority mask in vlan-mask is not "
2376                                       "supported by hardware\n");
2377                                 return -1;
2378                         }
2379                 }
2380         }
2381
2382         /* make sure we only use the first 2 bytes of user data */
2383         if ((fs->data & 0xFFFF) || (~fs->data_mask & 0xFFFF)) {
2384                 input_struct.formatted.flex_bytes = htons(fs->data & 0xFFFF);
2385                 if (!(fs->data_mask & 0xFFFF)) {
2386                         input_masks.flex_mask = 0xFFFF;
2387                 } else if (~fs->data_mask & 0xFFFF) {
2388                         e_err(drv, "Partial user-def-mask is not "
2389                               "supported by hardware\n");
2390                         return -1;
2391                 }
2392         }
2393
2394         /*
2395          * Copy input into formatted structures
2396          *
2397          * These assignments are based on the following logic
2398          * If neither input or mask are set assume value is masked out.
2399          * If input is set, but mask is not mask should default to accept all.
2400          * If input is not set, but mask is set then mask likely results in 0.
2401          * If input is set and mask is set then assign both.
2402          */
2403         if (fs->h_u.tcp_ip4_spec.ip4src || ~fs->m_u.tcp_ip4_spec.ip4src) {
2404                 input_struct.formatted.src_ip[0] = fs->h_u.tcp_ip4_spec.ip4src;
2405                 if (!fs->m_u.tcp_ip4_spec.ip4src)
2406                         input_masks.src_ip_mask[0] = 0xFFFFFFFF;
2407                 else
2408                         input_masks.src_ip_mask[0] =
2409                                 ~fs->m_u.tcp_ip4_spec.ip4src;
2410         }
2411         if (fs->h_u.tcp_ip4_spec.ip4dst || ~fs->m_u.tcp_ip4_spec.ip4dst) {
2412                 input_struct.formatted.dst_ip[0] = fs->h_u.tcp_ip4_spec.ip4dst;
2413                 if (!fs->m_u.tcp_ip4_spec.ip4dst)
2414                         input_masks.dst_ip_mask[0] = 0xFFFFFFFF;
2415                 else
2416                         input_masks.dst_ip_mask[0] =
2417                                 ~fs->m_u.tcp_ip4_spec.ip4dst;
2418         }
2419         if (fs->h_u.tcp_ip4_spec.psrc || ~fs->m_u.tcp_ip4_spec.psrc) {
2420                 input_struct.formatted.src_port = fs->h_u.tcp_ip4_spec.psrc;
2421                 if (!fs->m_u.tcp_ip4_spec.psrc)
2422                         input_masks.src_port_mask = 0xFFFF;
2423                 else
2424                         input_masks.src_port_mask = ~fs->m_u.tcp_ip4_spec.psrc;
2425         }
2426         if (fs->h_u.tcp_ip4_spec.pdst || ~fs->m_u.tcp_ip4_spec.pdst) {
2427                 input_struct.formatted.dst_port = fs->h_u.tcp_ip4_spec.pdst;
2428                 if (!fs->m_u.tcp_ip4_spec.pdst)
2429                         input_masks.dst_port_mask = 0xFFFF;
2430                 else
2431                         input_masks.dst_port_mask = ~fs->m_u.tcp_ip4_spec.pdst;
2432         }
2433
2434         /* determine if we need to drop or route the packet */
2435         if (fs->action == ETHTOOL_RXNTUPLE_ACTION_DROP)
2436                 target_queue = MAX_RX_QUEUES - 1;
2437         else
2438                 target_queue = fs->action;
2439
2440         spin_lock(&adapter->fdir_perfect_lock);
2441         err = ixgbe_fdir_add_perfect_filter_82599(&adapter->hw,
2442                                                   &input_struct,
2443                                                   &input_masks, 0,
2444                                                   target_queue);
2445         spin_unlock(&adapter->fdir_perfect_lock);
2446
2447         return err ? -1 : 0;
2448 }
2449
2450 static const struct ethtool_ops ixgbe_ethtool_ops = {
2451         .get_settings           = ixgbe_get_settings,
2452         .set_settings           = ixgbe_set_settings,
2453         .get_drvinfo            = ixgbe_get_drvinfo,
2454         .get_regs_len           = ixgbe_get_regs_len,
2455         .get_regs               = ixgbe_get_regs,
2456         .get_wol                = ixgbe_get_wol,
2457         .set_wol                = ixgbe_set_wol,
2458         .nway_reset             = ixgbe_nway_reset,
2459         .get_link               = ethtool_op_get_link,
2460         .get_eeprom_len         = ixgbe_get_eeprom_len,
2461         .get_eeprom             = ixgbe_get_eeprom,
2462         .get_ringparam          = ixgbe_get_ringparam,
2463         .set_ringparam          = ixgbe_set_ringparam,
2464         .get_pauseparam         = ixgbe_get_pauseparam,
2465         .set_pauseparam         = ixgbe_set_pauseparam,
2466         .get_rx_csum            = ixgbe_get_rx_csum,
2467         .set_rx_csum            = ixgbe_set_rx_csum,
2468         .get_tx_csum            = ixgbe_get_tx_csum,
2469         .set_tx_csum            = ixgbe_set_tx_csum,
2470         .get_sg                 = ethtool_op_get_sg,
2471         .set_sg                 = ethtool_op_set_sg,
2472         .get_msglevel           = ixgbe_get_msglevel,
2473         .set_msglevel           = ixgbe_set_msglevel,
2474         .get_tso                = ethtool_op_get_tso,
2475         .set_tso                = ixgbe_set_tso,
2476         .self_test              = ixgbe_diag_test,
2477         .get_strings            = ixgbe_get_strings,
2478         .set_phys_id            = ixgbe_set_phys_id,
2479         .get_sset_count         = ixgbe_get_sset_count,
2480         .get_ethtool_stats      = ixgbe_get_ethtool_stats,
2481         .get_coalesce           = ixgbe_get_coalesce,
2482         .set_coalesce           = ixgbe_set_coalesce,
2483         .get_flags              = ethtool_op_get_flags,
2484         .set_flags              = ixgbe_set_flags,
2485         .set_rx_ntuple          = ixgbe_set_rx_ntuple,
2486 };
2487
2488 void ixgbe_set_ethtool_ops(struct net_device *netdev)
2489 {
2490         SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops);
2491 }