drivers/net/igb/igb_ethtool.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007-2009 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 /* ethtool support for igb */
  29
  30 #include <linux/vmalloc.h>
  31 #include <linux/netdevice.h>
  32 #include <linux/pci.h>
  33 #include <linux/delay.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/if_ether.h>
  36 #include <linux/ethtool.h>
  37 #include <linux/sched.h>
  38 #include <linux/slab.h>
  39
  40 #include "igb.h"
  41
  42 struct igb_stats {
  43         char stat_string[ETH_GSTRING_LEN];
  44         int sizeof_stat;
  45         int stat_offset;
  46 };
  47
  48 #define IGB_STAT(_name, _stat) { \
  49         .stat_string = _name, \
  50         .sizeof_stat = FIELD_SIZEOF(struct igb_adapter, _stat), \
  51         .stat_offset = offsetof(struct igb_adapter, _stat) \
  52 }
  53 static const struct igb_stats igb_gstrings_stats[] = {
  54         IGB_STAT("rx_packets", stats.gprc),
  55         IGB_STAT("tx_packets", stats.gptc),
  56         IGB_STAT("rx_bytes", stats.gorc),
  57         IGB_STAT("tx_bytes", stats.gotc),
  58         IGB_STAT("rx_broadcast", stats.bprc),
  59         IGB_STAT("tx_broadcast", stats.bptc),
  60         IGB_STAT("rx_multicast", stats.mprc),
  61         IGB_STAT("tx_multicast", stats.mptc),
  62         IGB_STAT("multicast", stats.mprc),
  63         IGB_STAT("collisions", stats.colc),
  64         IGB_STAT("rx_crc_errors", stats.crcerrs),
  65         IGB_STAT("rx_no_buffer_count", stats.rnbc),
  66         IGB_STAT("rx_missed_errors", stats.mpc),
  67         IGB_STAT("tx_aborted_errors", stats.ecol),
  68         IGB_STAT("tx_carrier_errors", stats.tncrs),
  69         IGB_STAT("tx_window_errors", stats.latecol),
  70         IGB_STAT("tx_abort_late_coll", stats.latecol),
  71         IGB_STAT("tx_deferred_ok", stats.dc),
  72         IGB_STAT("tx_single_coll_ok", stats.scc),
  73         IGB_STAT("tx_multi_coll_ok", stats.mcc),
  74         IGB_STAT("tx_timeout_count", tx_timeout_count),
  75         IGB_STAT("rx_long_length_errors", stats.roc),
  76         IGB_STAT("rx_short_length_errors", stats.ruc),
  77         IGB_STAT("rx_align_errors", stats.algnerrc),
  78         IGB_STAT("tx_tcp_seg_good", stats.tsctc),
  79         IGB_STAT("tx_tcp_seg_failed", stats.tsctfc),
  80         IGB_STAT("rx_flow_control_xon", stats.xonrxc),
  81         IGB_STAT("rx_flow_control_xoff", stats.xoffrxc),
  82         IGB_STAT("tx_flow_control_xon", stats.xontxc),
  83         IGB_STAT("tx_flow_control_xoff", stats.xofftxc),
  84         IGB_STAT("rx_long_byte_count", stats.gorc),
  85         IGB_STAT("tx_dma_out_of_sync", stats.doosync),
  86         IGB_STAT("tx_smbus", stats.mgptc),
  87         IGB_STAT("rx_smbus", stats.mgprc),
  88         IGB_STAT("dropped_smbus", stats.mgpdc),
  89         IGB_STAT("os2bmc_rx_by_bmc", stats.o2bgptc),
  90         IGB_STAT("os2bmc_tx_by_bmc", stats.b2ospc),
  91         IGB_STAT("os2bmc_tx_by_host", stats.o2bspc),
  92         IGB_STAT("os2bmc_rx_by_host", stats.b2ogprc),
  93 };
  94
  95 #define IGB_NETDEV_STAT(_net_stat) { \
  96         .stat_string = __stringify(_net_stat), \
  97         .sizeof_stat = FIELD_SIZEOF(struct rtnl_link_stats64, _net_stat), \
  98         .stat_offset = offsetof(struct rtnl_link_stats64, _net_stat) \
  99 }
 100 static const struct igb_stats igb_gstrings_net_stats[] = {
 101         IGB_NETDEV_STAT(rx_errors),
 102         IGB_NETDEV_STAT(tx_errors),
 103         IGB_NETDEV_STAT(tx_dropped),
 104         IGB_NETDEV_STAT(rx_length_errors),
 105         IGB_NETDEV_STAT(rx_over_errors),
 106         IGB_NETDEV_STAT(rx_frame_errors),
 107         IGB_NETDEV_STAT(rx_fifo_errors),
 108         IGB_NETDEV_STAT(tx_fifo_errors),
 109         IGB_NETDEV_STAT(tx_heartbeat_errors)
 110 };
 111
 112 #define IGB_GLOBAL_STATS_LEN    \
 113         (sizeof(igb_gstrings_stats) / sizeof(struct igb_stats))
 114 #define IGB_NETDEV_STATS_LEN    \
 115         (sizeof(igb_gstrings_net_stats) / sizeof(struct igb_stats))
 116 #define IGB_RX_QUEUE_STATS_LEN \
 117         (sizeof(struct igb_rx_queue_stats) / sizeof(u64))
 118
 119 #define IGB_TX_QUEUE_STATS_LEN 3 /* packets, bytes, restart_queue */
 120
 121 #define IGB_QUEUE_STATS_LEN \
 122         ((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues * \
 123           IGB_RX_QUEUE_STATS_LEN) + \
 124          (((struct igb_adapter *)netdev_priv(netdev))->num_tx_queues * \
 125           IGB_TX_QUEUE_STATS_LEN))
 126 #define IGB_STATS_LEN \
 127         (IGB_GLOBAL_STATS_LEN + IGB_NETDEV_STATS_LEN + IGB_QUEUE_STATS_LEN)
 128
 129 static const char igb_gstrings_test[][ETH_GSTRING_LEN] = {
 130         "Register test  (offline)", "Eeprom test    (offline)",
 131         "Interrupt test (offline)", "Loopback test  (offline)",
 132         "Link test   (on/offline)"
 133 };
 134 #define IGB_TEST_LEN (sizeof(igb_gstrings_test) / ETH_GSTRING_LEN)
 135
 136 static int igb_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
 137 {
 138         struct igb_adapter *adapter = netdev_priv(netdev);
 139         struct e1000_hw *hw = &adapter->hw;
 140         u32 status;
 141
 142         if (hw->phy.media_type == e1000_media_type_copper) {
 143
 144                 ecmd->supported = (SUPPORTED_10baseT_Half |
 145                                    SUPPORTED_10baseT_Full |
 146                                    SUPPORTED_100baseT_Half |
 147                                    SUPPORTED_100baseT_Full |
 148                                    SUPPORTED_1000baseT_Full|
 149                                    SUPPORTED_Autoneg |
 150                                    SUPPORTED_TP);
 151                 ecmd->advertising = ADVERTISED_TP;
 152
 153                 if (hw->mac.autoneg == 1) {
 154                         ecmd->advertising |= ADVERTISED_Autoneg;
 155                         /* the e1000 autoneg seems to match ethtool nicely */
 156                         ecmd->advertising |= hw->phy.autoneg_advertised;
 157                 }
 158
 159                 ecmd->port = PORT_TP;
 160                 ecmd->phy_address = hw->phy.addr;
 161         } else {
 162                 ecmd->supported   = (SUPPORTED_1000baseT_Full |
 163                                      SUPPORTED_FIBRE |
 164                                      SUPPORTED_Autoneg);
 165
 166                 ecmd->advertising = (ADVERTISED_1000baseT_Full |
 167                                      ADVERTISED_FIBRE |
 168                                      ADVERTISED_Autoneg);
 169
 170                 ecmd->port = PORT_FIBRE;
 171         }
 172
 173         ecmd->transceiver = XCVR_INTERNAL;
 174
 175         status = rd32(E1000_STATUS);
 176
 177         if (status & E1000_STATUS_LU) {
 178
 179                 if ((status & E1000_STATUS_SPEED_1000) ||
 180                     hw->phy.media_type != e1000_media_type_copper)
 181                         ethtool_cmd_speed_set(ecmd, SPEED_1000);
 182                 else if (status & E1000_STATUS_SPEED_100)
 183                         ethtool_cmd_speed_set(ecmd, SPEED_100);
 184                 else
 185                         ethtool_cmd_speed_set(ecmd, SPEED_10);
 186
 187                 if ((status & E1000_STATUS_FD) ||
 188                     hw->phy.media_type != e1000_media_type_copper)
 189                         ecmd->duplex = DUPLEX_FULL;
 190                 else
 191                         ecmd->duplex = DUPLEX_HALF;
 192         } else {
 193                 ethtool_cmd_speed_set(ecmd, -1);
 194                 ecmd->duplex = -1;
 195         }
 196
 197         ecmd->autoneg = hw->mac.autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;
 198         return 0;
 199 }
 200
 201 static int igb_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
 202 {
 203         struct igb_adapter *adapter = netdev_priv(netdev);
 204         struct e1000_hw *hw = &adapter->hw;
 205
 206         /* When SoL/IDER sessions are active, autoneg/speed/duplex
 207          * cannot be changed */
 208         if (igb_check_reset_block(hw)) {
 209                 dev_err(&adapter->pdev->dev, "Cannot change link "
 210                         "characteristics when SoL/IDER is active.\n");
 211                 return -EINVAL;
 212         }
 213
 214         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 215                 msleep(1);
 216
 217         if (ecmd->autoneg == AUTONEG_ENABLE) {
 218                 hw->mac.autoneg = 1;
 219                 hw->phy.autoneg_advertised = ecmd->advertising |
 220                                              ADVERTISED_TP |
 221                                              ADVERTISED_Autoneg;
 222                 ecmd->advertising = hw->phy.autoneg_advertised;
 223                 if (adapter->fc_autoneg)
 224                         hw->fc.requested_mode = e1000_fc_default;
 225         } else {
 226                 u32 speed = ethtool_cmd_speed(ecmd);
 227                 if (igb_set_spd_dplx(adapter, speed, ecmd->duplex)) {
 228                         clear_bit(__IGB_RESETTING, &adapter->state);
 229                         return -EINVAL;
 230                 }
 231         }
 232
 233         /* reset the link */
 234         if (netif_running(adapter->netdev)) {
 235                 igb_down(adapter);
 236                 igb_up(adapter);
 237         } else
 238                 igb_reset(adapter);
 239
 240         clear_bit(__IGB_RESETTING, &adapter->state);
 241         return 0;
 242 }
 243
 244 static u32 igb_get_link(struct net_device *netdev)
 245 {
 246         struct igb_adapter *adapter = netdev_priv(netdev);
 247         struct e1000_mac_info *mac = &adapter->hw.mac;
 248
 249         /*
 250          * If the link is not reported up to netdev, interrupts are disabled,
 251          * and so the physical link state may have changed since we last
 252          * looked. Set get_link_status to make sure that the true link
 253          * state is interrogated, rather than pulling a cached and possibly
 254          * stale link state from the driver.
 255          */
 256         if (!netif_carrier_ok(netdev))
 257                 mac->get_link_status = 1;
 258
 259         return igb_has_link(adapter);
 260 }
 261
 262 static void igb_get_pauseparam(struct net_device *netdev,
 263                                struct ethtool_pauseparam *pause)
 264 {
 265         struct igb_adapter *adapter = netdev_priv(netdev);
 266         struct e1000_hw *hw = &adapter->hw;
 267
 268         pause->autoneg =
 269                 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
 270
 271         if (hw->fc.current_mode == e1000_fc_rx_pause)
 272                 pause->rx_pause = 1;
 273         else if (hw->fc.current_mode == e1000_fc_tx_pause)
 274                 pause->tx_pause = 1;
 275         else if (hw->fc.current_mode == e1000_fc_full) {
 276                 pause->rx_pause = 1;
 277                 pause->tx_pause = 1;
 278         }
 279 }
 280
 281 static int igb_set_pauseparam(struct net_device *netdev,
 282                               struct ethtool_pauseparam *pause)
 283 {
 284         struct igb_adapter *adapter = netdev_priv(netdev);
 285         struct e1000_hw *hw = &adapter->hw;
 286         int retval = 0;
 287
 288         adapter->fc_autoneg = pause->autoneg;
 289
 290         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 291                 msleep(1);
 292
 293         if (adapter->fc_autoneg == AUTONEG_ENABLE) {
 294                 hw->fc.requested_mode = e1000_fc_default;
 295                 if (netif_running(adapter->netdev)) {
 296                         igb_down(adapter);
 297                         igb_up(adapter);
 298                 } else {
 299                         igb_reset(adapter);
 300                 }
 301         } else {
 302                 if (pause->rx_pause && pause->tx_pause)
 303                         hw->fc.requested_mode = e1000_fc_full;
 304                 else if (pause->rx_pause && !pause->tx_pause)
 305                         hw->fc.requested_mode = e1000_fc_rx_pause;
 306                 else if (!pause->rx_pause && pause->tx_pause)
 307                         hw->fc.requested_mode = e1000_fc_tx_pause;
 308                 else if (!pause->rx_pause && !pause->tx_pause)
 309                         hw->fc.requested_mode = e1000_fc_none;
 310
 311                 hw->fc.current_mode = hw->fc.requested_mode;
 312
 313                 retval = ((hw->phy.media_type == e1000_media_type_copper) ?
 314                           igb_force_mac_fc(hw) : igb_setup_link(hw));
 315         }
 316
 317         clear_bit(__IGB_RESETTING, &adapter->state);
 318         return retval;
 319 }
 320
 321 static u32 igb_get_rx_csum(struct net_device *netdev)
 322 {
 323         struct igb_adapter *adapter = netdev_priv(netdev);
 324         return !!(adapter->rx_ring[0]->flags & IGB_RING_FLAG_RX_CSUM);
 325 }
 326
 327 static int igb_set_rx_csum(struct net_device *netdev, u32 data)
 328 {
 329         struct igb_adapter *adapter = netdev_priv(netdev);
 330         int i;
 331
 332         for (i = 0; i < adapter->num_rx_queues; i++) {
 333                 if (data)
 334                         adapter->rx_ring[i]->flags |= IGB_RING_FLAG_RX_CSUM;
 335                 else
 336                         adapter->rx_ring[i]->flags &= ~IGB_RING_FLAG_RX_CSUM;
 337         }
 338
 339         return 0;
 340 }
 341
 342 static u32 igb_get_tx_csum(struct net_device *netdev)
 343 {
 344         return (netdev->features & NETIF_F_IP_CSUM) != 0;
 345 }
 346
 347 static int igb_set_tx_csum(struct net_device *netdev, u32 data)
 348 {
 349         struct igb_adapter *adapter = netdev_priv(netdev);
 350
 351         if (data) {
 352                 netdev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
 353                 if (adapter->hw.mac.type >= e1000_82576)
 354                         netdev->features |= NETIF_F_SCTP_CSUM;
 355         } else {
 356                 netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
 357                                       NETIF_F_SCTP_CSUM);
 358         }
 359
 360         return 0;
 361 }
 362
 363 static int igb_set_tso(struct net_device *netdev, u32 data)
 364 {
 365         struct igb_adapter *adapter = netdev_priv(netdev);
 366
 367         if (data) {
 368                 netdev->features |= NETIF_F_TSO;
 369                 netdev->features |= NETIF_F_TSO6;
 370         } else {
 371                 netdev->features &= ~NETIF_F_TSO;
 372                 netdev->features &= ~NETIF_F_TSO6;
 373         }
 374
 375         dev_info(&adapter->pdev->dev, "TSO is %s\n",
 376                  data ? "Enabled" : "Disabled");
 377         return 0;
 378 }
 379
 380 static u32 igb_get_msglevel(struct net_device *netdev)
 381 {
 382         struct igb_adapter *adapter = netdev_priv(netdev);
 383         return adapter->msg_enable;
 384 }
 385
 386 static void igb_set_msglevel(struct net_device *netdev, u32 data)
 387 {
 388         struct igb_adapter *adapter = netdev_priv(netdev);
 389         adapter->msg_enable = data;
 390 }
 391
 392 static int igb_get_regs_len(struct net_device *netdev)
 393 {
 394 #define IGB_REGS_LEN 551
 395         return IGB_REGS_LEN * sizeof(u32);
 396 }
 397
 398 static void igb_get_regs(struct net_device *netdev,
 399                          struct ethtool_regs *regs, void *p)
 400 {
 401         struct igb_adapter *adapter = netdev_priv(netdev);
 402         struct e1000_hw *hw = &adapter->hw;
 403         u32 *regs_buff = p;
 404         u8 i;
 405
 406         memset(p, 0, IGB_REGS_LEN * sizeof(u32));
 407
 408         regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
 409
 410         /* General Registers */
 411         regs_buff[0] = rd32(E1000_CTRL);
 412         regs_buff[1] = rd32(E1000_STATUS);
 413         regs_buff[2] = rd32(E1000_CTRL_EXT);
 414         regs_buff[3] = rd32(E1000_MDIC);
 415         regs_buff[4] = rd32(E1000_SCTL);
 416         regs_buff[5] = rd32(E1000_CONNSW);
 417         regs_buff[6] = rd32(E1000_VET);
 418         regs_buff[7] = rd32(E1000_LEDCTL);
 419         regs_buff[8] = rd32(E1000_PBA);
 420         regs_buff[9] = rd32(E1000_PBS);
 421         regs_buff[10] = rd32(E1000_FRTIMER);
 422         regs_buff[11] = rd32(E1000_TCPTIMER);
 423
 424         /* NVM Register */
 425         regs_buff[12] = rd32(E1000_EECD);
 426
 427         /* Interrupt */
 428         /* Reading EICS for EICR because they read the
 429          * same but EICS does not clear on read */
 430         regs_buff[13] = rd32(E1000_EICS);
 431         regs_buff[14] = rd32(E1000_EICS);
 432         regs_buff[15] = rd32(E1000_EIMS);
 433         regs_buff[16] = rd32(E1000_EIMC);
 434         regs_buff[17] = rd32(E1000_EIAC);
 435         regs_buff[18] = rd32(E1000_EIAM);
 436         /* Reading ICS for ICR because they read the
 437          * same but ICS does not clear on read */
 438         regs_buff[19] = rd32(E1000_ICS);
 439         regs_buff[20] = rd32(E1000_ICS);
 440         regs_buff[21] = rd32(E1000_IMS);
 441         regs_buff[22] = rd32(E1000_IMC);
 442         regs_buff[23] = rd32(E1000_IAC);
 443         regs_buff[24] = rd32(E1000_IAM);
 444         regs_buff[25] = rd32(E1000_IMIRVP);
 445
 446         /* Flow Control */
 447         regs_buff[26] = rd32(E1000_FCAL);
 448         regs_buff[27] = rd32(E1000_FCAH);
 449         regs_buff[28] = rd32(E1000_FCTTV);
 450         regs_buff[29] = rd32(E1000_FCRTL);
 451         regs_buff[30] = rd32(E1000_FCRTH);
 452         regs_buff[31] = rd32(E1000_FCRTV);
 453
 454         /* Receive */
 455         regs_buff[32] = rd32(E1000_RCTL);
 456         regs_buff[33] = rd32(E1000_RXCSUM);
 457         regs_buff[34] = rd32(E1000_RLPML);
 458         regs_buff[35] = rd32(E1000_RFCTL);
 459         regs_buff[36] = rd32(E1000_MRQC);
 460         regs_buff[37] = rd32(E1000_VT_CTL);
 461
 462         /* Transmit */
 463         regs_buff[38] = rd32(E1000_TCTL);
 464         regs_buff[39] = rd32(E1000_TCTL_EXT);
 465         regs_buff[40] = rd32(E1000_TIPG);
 466         regs_buff[41] = rd32(E1000_DTXCTL);
 467
 468         /* Wake Up */
 469         regs_buff[42] = rd32(E1000_WUC);
 470         regs_buff[43] = rd32(E1000_WUFC);
 471         regs_buff[44] = rd32(E1000_WUS);
 472         regs_buff[45] = rd32(E1000_IPAV);
 473         regs_buff[46] = rd32(E1000_WUPL);
 474
 475         /* MAC */
 476         regs_buff[47] = rd32(E1000_PCS_CFG0);
 477         regs_buff[48] = rd32(E1000_PCS_LCTL);
 478         regs_buff[49] = rd32(E1000_PCS_LSTAT);
 479         regs_buff[50] = rd32(E1000_PCS_ANADV);
 480         regs_buff[51] = rd32(E1000_PCS_LPAB);
 481         regs_buff[52] = rd32(E1000_PCS_NPTX);
 482         regs_buff[53] = rd32(E1000_PCS_LPABNP);
 483
 484         /* Statistics */
 485         regs_buff[54] = adapter->stats.crcerrs;
 486         regs_buff[55] = adapter->stats.algnerrc;
 487         regs_buff[56] = adapter->stats.symerrs;
 488         regs_buff[57] = adapter->stats.rxerrc;
 489         regs_buff[58] = adapter->stats.mpc;
 490         regs_buff[59] = adapter->stats.scc;
 491         regs_buff[60] = adapter->stats.ecol;
 492         regs_buff[61] = adapter->stats.mcc;
 493         regs_buff[62] = adapter->stats.latecol;
 494         regs_buff[63] = adapter->stats.colc;
 495         regs_buff[64] = adapter->stats.dc;
 496         regs_buff[65] = adapter->stats.tncrs;
 497         regs_buff[66] = adapter->stats.sec;
 498         regs_buff[67] = adapter->stats.htdpmc;
 499         regs_buff[68] = adapter->stats.rlec;
 500         regs_buff[69] = adapter->stats.xonrxc;
 501         regs_buff[70] = adapter->stats.xontxc;
 502         regs_buff[71] = adapter->stats.xoffrxc;
 503         regs_buff[72] = adapter->stats.xofftxc;
 504         regs_buff[73] = adapter->stats.fcruc;
 505         regs_buff[74] = adapter->stats.prc64;
 506         regs_buff[75] = adapter->stats.prc127;
 507         regs_buff[76] = adapter->stats.prc255;
 508         regs_buff[77] = adapter->stats.prc511;
 509         regs_buff[78] = adapter->stats.prc1023;
 510         regs_buff[79] = adapter->stats.prc1522;
 511         regs_buff[80] = adapter->stats.gprc;
 512         regs_buff[81] = adapter->stats.bprc;
 513         regs_buff[82] = adapter->stats.mprc;
 514         regs_buff[83] = adapter->stats.gptc;
 515         regs_buff[84] = adapter->stats.gorc;
 516         regs_buff[86] = adapter->stats.gotc;
 517         regs_buff[88] = adapter->stats.rnbc;
 518         regs_buff[89] = adapter->stats.ruc;
 519         regs_buff[90] = adapter->stats.rfc;
 520         regs_buff[91] = adapter->stats.roc;
 521         regs_buff[92] = adapter->stats.rjc;
 522         regs_buff[93] = adapter->stats.mgprc;
 523         regs_buff[94] = adapter->stats.mgpdc;
 524         regs_buff[95] = adapter->stats.mgptc;
 525         regs_buff[96] = adapter->stats.tor;
 526         regs_buff[98] = adapter->stats.tot;
 527         regs_buff[100] = adapter->stats.tpr;
 528         regs_buff[101] = adapter->stats.tpt;
 529         regs_buff[102] = adapter->stats.ptc64;
 530         regs_buff[103] = adapter->stats.ptc127;
 531         regs_buff[104] = adapter->stats.ptc255;
 532         regs_buff[105] = adapter->stats.ptc511;
 533         regs_buff[106] = adapter->stats.ptc1023;
 534         regs_buff[107] = adapter->stats.ptc1522;
 535         regs_buff[108] = adapter->stats.mptc;
 536         regs_buff[109] = adapter->stats.bptc;
 537         regs_buff[110] = adapter->stats.tsctc;
 538         regs_buff[111] = adapter->stats.iac;
 539         regs_buff[112] = adapter->stats.rpthc;
 540         regs_buff[113] = adapter->stats.hgptc;
 541         regs_buff[114] = adapter->stats.hgorc;
 542         regs_buff[116] = adapter->stats.hgotc;
 543         regs_buff[118] = adapter->stats.lenerrs;
 544         regs_buff[119] = adapter->stats.scvpc;
 545         regs_buff[120] = adapter->stats.hrmpc;
 546
 547         for (i = 0; i < 4; i++)
 548                 regs_buff[121 + i] = rd32(E1000_SRRCTL(i));
 549         for (i = 0; i < 4; i++)
 550                 regs_buff[125 + i] = rd32(E1000_PSRTYPE(i));
 551         for (i = 0; i < 4; i++)
 552                 regs_buff[129 + i] = rd32(E1000_RDBAL(i));
 553         for (i = 0; i < 4; i++)
 554                 regs_buff[133 + i] = rd32(E1000_RDBAH(i));
 555         for (i = 0; i < 4; i++)
 556                 regs_buff[137 + i] = rd32(E1000_RDLEN(i));
 557         for (i = 0; i < 4; i++)
 558                 regs_buff[141 + i] = rd32(E1000_RDH(i));
 559         for (i = 0; i < 4; i++)
 560                 regs_buff[145 + i] = rd32(E1000_RDT(i));
 561         for (i = 0; i < 4; i++)
 562                 regs_buff[149 + i] = rd32(E1000_RXDCTL(i));
 563
 564         for (i = 0; i < 10; i++)
 565                 regs_buff[153 + i] = rd32(E1000_EITR(i));
 566         for (i = 0; i < 8; i++)
 567                 regs_buff[163 + i] = rd32(E1000_IMIR(i));
 568         for (i = 0; i < 8; i++)
 569                 regs_buff[171 + i] = rd32(E1000_IMIREXT(i));
 570         for (i = 0; i < 16; i++)
 571                 regs_buff[179 + i] = rd32(E1000_RAL(i));
 572         for (i = 0; i < 16; i++)
 573                 regs_buff[195 + i] = rd32(E1000_RAH(i));
 574
 575         for (i = 0; i < 4; i++)
 576                 regs_buff[211 + i] = rd32(E1000_TDBAL(i));
 577         for (i = 0; i < 4; i++)
 578                 regs_buff[215 + i] = rd32(E1000_TDBAH(i));
 579         for (i = 0; i < 4; i++)
 580                 regs_buff[219 + i] = rd32(E1000_TDLEN(i));
 581         for (i = 0; i < 4; i++)
 582                 regs_buff[223 + i] = rd32(E1000_TDH(i));
 583         for (i = 0; i < 4; i++)
 584                 regs_buff[227 + i] = rd32(E1000_TDT(i));
 585         for (i = 0; i < 4; i++)
 586                 regs_buff[231 + i] = rd32(E1000_TXDCTL(i));
 587         for (i = 0; i < 4; i++)
 588                 regs_buff[235 + i] = rd32(E1000_TDWBAL(i));
 589         for (i = 0; i < 4; i++)
 590                 regs_buff[239 + i] = rd32(E1000_TDWBAH(i));
 591         for (i = 0; i < 4; i++)
 592                 regs_buff[243 + i] = rd32(E1000_DCA_TXCTRL(i));
 593
 594         for (i = 0; i < 4; i++)
 595                 regs_buff[247 + i] = rd32(E1000_IP4AT_REG(i));
 596         for (i = 0; i < 4; i++)
 597                 regs_buff[251 + i] = rd32(E1000_IP6AT_REG(i));
 598         for (i = 0; i < 32; i++)
 599                 regs_buff[255 + i] = rd32(E1000_WUPM_REG(i));
 600         for (i = 0; i < 128; i++)
 601                 regs_buff[287 + i] = rd32(E1000_FFMT_REG(i));
 602         for (i = 0; i < 128; i++)
 603                 regs_buff[415 + i] = rd32(E1000_FFVT_REG(i));
 604         for (i = 0; i < 4; i++)
 605                 regs_buff[543 + i] = rd32(E1000_FFLT_REG(i));
 606
 607         regs_buff[547] = rd32(E1000_TDFH);
 608         regs_buff[548] = rd32(E1000_TDFT);
 609         regs_buff[549] = rd32(E1000_TDFHS);
 610         regs_buff[550] = rd32(E1000_TDFPC);
 611         regs_buff[551] = adapter->stats.o2bgptc;
 612         regs_buff[552] = adapter->stats.b2ospc;
 613         regs_buff[553] = adapter->stats.o2bspc;
 614         regs_buff[554] = adapter->stats.b2ogprc;
 615 }
 616
 617 static int igb_get_eeprom_len(struct net_device *netdev)
 618 {
 619         struct igb_adapter *adapter = netdev_priv(netdev);
 620         return adapter->hw.nvm.word_size * 2;
 621 }
 622
 623 static int igb_get_eeprom(struct net_device *netdev,
 624                           struct ethtool_eeprom *eeprom, u8 *bytes)
 625 {
 626         struct igb_adapter *adapter = netdev_priv(netdev);
 627         struct e1000_hw *hw = &adapter->hw;
 628         u16 *eeprom_buff;
 629         int first_word, last_word;
 630         int ret_val = 0;
 631         u16 i;
 632
 633         if (eeprom->len == 0)
 634                 return -EINVAL;
 635
 636         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 637
 638         first_word = eeprom->offset >> 1;
 639         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 640
 641         eeprom_buff = kmalloc(sizeof(u16) *
 642                         (last_word - first_word + 1), GFP_KERNEL);
 643         if (!eeprom_buff)
 644                 return -ENOMEM;
 645
 646         if (hw->nvm.type == e1000_nvm_eeprom_spi)
 647                 ret_val = hw->nvm.ops.read(hw, first_word,
 648                                             last_word - first_word + 1,
 649                                             eeprom_buff);
 650         else {
 651                 for (i = 0; i < last_word - first_word + 1; i++) {
 652                         ret_val = hw->nvm.ops.read(hw, first_word + i, 1,
 653                                                     &eeprom_buff[i]);
 654                         if (ret_val)
 655                                 break;
 656                 }
 657         }
 658
 659         /* Device's eeprom is always little-endian, word addressable */
 660         for (i = 0; i < last_word - first_word + 1; i++)
 661                 le16_to_cpus(&eeprom_buff[i]);
 662
 663         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
 664                         eeprom->len);
 665         kfree(eeprom_buff);
 666
 667         return ret_val;
 668 }
 669
 670 static int igb_set_eeprom(struct net_device *netdev,
 671                           struct ethtool_eeprom *eeprom, u8 *bytes)
 672 {
 673         struct igb_adapter *adapter = netdev_priv(netdev);
 674         struct e1000_hw *hw = &adapter->hw;
 675         u16 *eeprom_buff;
 676         void *ptr;
 677         int max_len, first_word, last_word, ret_val = 0;
 678         u16 i;
 679
 680         if (eeprom->len == 0)
 681                 return -EOPNOTSUPP;
 682
 683         if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
 684                 return -EFAULT;
 685
 686         max_len = hw->nvm.word_size * 2;
 687
 688         first_word = eeprom->offset >> 1;
 689         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 690         eeprom_buff = kmalloc(max_len, GFP_KERNEL);
 691         if (!eeprom_buff)
 692                 return -ENOMEM;
 693
 694         ptr = (void *)eeprom_buff;
 695
 696         if (eeprom->offset & 1) {
 697                 /* need read/modify/write of first changed EEPROM word */
 698                 /* only the second byte of the word is being modified */
 699                 ret_val = hw->nvm.ops.read(hw, first_word, 1,
 700                                             &eeprom_buff[0]);
 701                 ptr++;
 702         }
 703         if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
 704                 /* need read/modify/write of last changed EEPROM word */
 705                 /* only the first byte of the word is being modified */
 706                 ret_val = hw->nvm.ops.read(hw, last_word, 1,
 707                                    &eeprom_buff[last_word - first_word]);
 708         }
 709
 710         /* Device's eeprom is always little-endian, word addressable */
 711         for (i = 0; i < last_word - first_word + 1; i++)
 712                 le16_to_cpus(&eeprom_buff[i]);
 713
 714         memcpy(ptr, bytes, eeprom->len);
 715
 716         for (i = 0; i < last_word - first_word + 1; i++)
 717                 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
 718
 719         ret_val = hw->nvm.ops.write(hw, first_word,
 720                                      last_word - first_word + 1, eeprom_buff);
 721
 722         /* Update the checksum over the first part of the EEPROM if needed
 723          * and flush shadow RAM for 82573 controllers */
 724         if ((ret_val == 0) && ((first_word <= NVM_CHECKSUM_REG)))
 725                 hw->nvm.ops.update(hw);
 726
 727         kfree(eeprom_buff);
 728         return ret_val;
 729 }
 730
 731 static void igb_get_drvinfo(struct net_device *netdev,
 732                             struct ethtool_drvinfo *drvinfo)
 733 {
 734         struct igb_adapter *adapter = netdev_priv(netdev);
 735         char firmware_version[32];
 736         u16 eeprom_data;
 737
 738         strncpy(drvinfo->driver,  igb_driver_name, sizeof(drvinfo->driver) - 1);
 739         strncpy(drvinfo->version, igb_driver_version,
 740                 sizeof(drvinfo->version) - 1);
 741
 742         /* EEPROM image version # is reported as firmware version # for
 743          * 82575 controllers */
 744         adapter->hw.nvm.ops.read(&adapter->hw, 5, 1, &eeprom_data);
 745         sprintf(firmware_version, "%d.%d-%d",
 746                 (eeprom_data & 0xF000) >> 12,
 747                 (eeprom_data & 0x0FF0) >> 4,
 748                 eeprom_data & 0x000F);
 749
 750         strncpy(drvinfo->fw_version, firmware_version,
 751                 sizeof(drvinfo->fw_version) - 1);
 752         strncpy(drvinfo->bus_info, pci_name(adapter->pdev),
 753                 sizeof(drvinfo->bus_info) - 1);
 754         drvinfo->n_stats = IGB_STATS_LEN;
 755         drvinfo->testinfo_len = IGB_TEST_LEN;
 756         drvinfo->regdump_len = igb_get_regs_len(netdev);
 757         drvinfo->eedump_len = igb_get_eeprom_len(netdev);
 758 }
 759
 760 static void igb_get_ringparam(struct net_device *netdev,
 761                               struct ethtool_ringparam *ring)
 762 {
 763         struct igb_adapter *adapter = netdev_priv(netdev);
 764
 765         ring->rx_max_pending = IGB_MAX_RXD;
 766         ring->tx_max_pending = IGB_MAX_TXD;
 767         ring->rx_mini_max_pending = 0;
 768         ring->rx_jumbo_max_pending = 0;
 769         ring->rx_pending = adapter->rx_ring_count;
 770         ring->tx_pending = adapter->tx_ring_count;
 771         ring->rx_mini_pending = 0;
 772         ring->rx_jumbo_pending = 0;
 773 }
 774
 775 static int igb_set_ringparam(struct net_device *netdev,
 776                              struct ethtool_ringparam *ring)
 777 {
 778         struct igb_adapter *adapter = netdev_priv(netdev);
 779         struct igb_ring *temp_ring;
 780         int i, err = 0;
 781         u16 new_rx_count, new_tx_count;
 782
 783         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 784                 return -EINVAL;
 785
 786         new_rx_count = min_t(u32, ring->rx_pending, IGB_MAX_RXD);
 787         new_rx_count = max_t(u16, new_rx_count, IGB_MIN_RXD);
 788         new_rx_count = ALIGN(new_rx_count, REQ_RX_DESCRIPTOR_MULTIPLE);
 789
 790         new_tx_count = min_t(u32, ring->tx_pending, IGB_MAX_TXD);
 791         new_tx_count = max_t(u16, new_tx_count, IGB_MIN_TXD);
 792         new_tx_count = ALIGN(new_tx_count, REQ_TX_DESCRIPTOR_MULTIPLE);
 793
 794         if ((new_tx_count == adapter->tx_ring_count) &&
 795             (new_rx_count == adapter->rx_ring_count)) {
 796                 /* nothing to do */
 797                 return 0;
 798         }
 799
 800         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 801                 msleep(1);
 802
 803         if (!netif_running(adapter->netdev)) {
 804                 for (i = 0; i < adapter->num_tx_queues; i++)
 805                         adapter->tx_ring[i]->count = new_tx_count;
 806                 for (i = 0; i < adapter->num_rx_queues; i++)
 807                         adapter->rx_ring[i]->count = new_rx_count;
 808                 adapter->tx_ring_count = new_tx_count;
 809                 adapter->rx_ring_count = new_rx_count;
 810                 goto clear_reset;
 811         }
 812
 813         if (adapter->num_tx_queues > adapter->num_rx_queues)
 814                 temp_ring = vmalloc(adapter->num_tx_queues * sizeof(struct igb_ring));
 815         else
 816                 temp_ring = vmalloc(adapter->num_rx_queues * sizeof(struct igb_ring));
 817
 818         if (!temp_ring) {
 819                 err = -ENOMEM;
 820                 goto clear_reset;
 821         }
 822
 823         igb_down(adapter);
 824
 825         /*
 826          * We can't just free everything and then setup again,
 827          * because the ISRs in MSI-X mode get passed pointers
 828          * to the tx and rx ring structs.
 829          */
 830         if (new_tx_count != adapter->tx_ring_count) {
 831                 for (i = 0; i < adapter->num_tx_queues; i++) {
 832                         memcpy(&temp_ring[i], adapter->tx_ring[i],
 833                                sizeof(struct igb_ring));
 834
 835                         temp_ring[i].count = new_tx_count;
 836                         err = igb_setup_tx_resources(&temp_ring[i]);
 837                         if (err) {
 838                                 while (i) {
 839                                         i--;
 840                                         igb_free_tx_resources(&temp_ring[i]);
 841                                 }
 842                                 goto err_setup;
 843                         }
 844                 }
 845
 846                 for (i = 0; i < adapter->num_tx_queues; i++) {
 847                         igb_free_tx_resources(adapter->tx_ring[i]);
 848
 849                         memcpy(adapter->tx_ring[i], &temp_ring[i],
 850                                sizeof(struct igb_ring));
 851                 }
 852
 853                 adapter->tx_ring_count = new_tx_count;
 854         }
 855
 856         if (new_rx_count != adapter->rx_ring_count) {
 857                 for (i = 0; i < adapter->num_rx_queues; i++) {
 858                         memcpy(&temp_ring[i], adapter->rx_ring[i],
 859                                sizeof(struct igb_ring));
 860
 861                         temp_ring[i].count = new_rx_count;
 862                         err = igb_setup_rx_resources(&temp_ring[i]);
 863                         if (err) {
 864                                 while (i) {
 865                                         i--;
 866                                         igb_free_rx_resources(&temp_ring[i]);
 867                                 }
 868                                 goto err_setup;
 869                         }
 870
 871                 }
 872
 873                 for (i = 0; i < adapter->num_rx_queues; i++) {
 874                         igb_free_rx_resources(adapter->rx_ring[i]);
 875
 876                         memcpy(adapter->rx_ring[i], &temp_ring[i],
 877                                sizeof(struct igb_ring));
 878                 }
 879
 880                 adapter->rx_ring_count = new_rx_count;
 881         }
 882 err_setup:
 883         igb_up(adapter);
 884         vfree(temp_ring);
 885 clear_reset:
 886         clear_bit(__IGB_RESETTING, &adapter->state);
 887         return err;
 888 }
 889
 890 /* ethtool register test data */
 891 struct igb_reg_test {
 892         u16 reg;
 893         u16 reg_offset;
 894         u16 array_len;
 895         u16 test_type;
 896         u32 mask;
 897         u32 write;
 898 };
 899
 900 /* In the hardware, registers are laid out either singly, in arrays
 901  * spaced 0x100 bytes apart, or in contiguous tables.  We assume
 902  * most tests take place on arrays or single registers (handled
 903  * as a single-element array) and special-case the tables.
 904  * Table tests are always pattern tests.
 905  *
 906  * We also make provision for some required setup steps by specifying
 907  * registers to be written without any read-back testing.
 908  */
 909
 910 #define PATTERN_TEST    1
 911 #define SET_READ_TEST   2
 912 #define WRITE_NO_TEST   3
 913 #define TABLE32_TEST    4
 914 #define TABLE64_TEST_LO 5
 915 #define TABLE64_TEST_HI 6
 916
 917 /* i350 reg test */
 918 static struct igb_reg_test reg_test_i350[] = {
 919         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 920         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 921         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 922         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFF0000, 0xFFFF0000 },
 923         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 924         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 925         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
 926         { E1000_RDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 927         { E1000_RDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 928         { E1000_RDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
 929         /* RDH is read-only for i350, only test RDT. */
 930         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 931         { E1000_RDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 932         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
 933         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 934         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
 935         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 936         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 937         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
 938         { E1000_TDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 939         { E1000_TDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 940         { E1000_TDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
 941         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 942         { E1000_TDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 943         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 944         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
 945         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
 946         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 947         { E1000_RA,        0, 16, TABLE64_TEST_LO,
 948                                                 0xFFFFFFFF, 0xFFFFFFFF },
 949         { E1000_RA,        0, 16, TABLE64_TEST_HI,
 950                                                 0xC3FFFFFF, 0xFFFFFFFF },
 951         { E1000_RA2,       0, 16, TABLE64_TEST_LO,
 952                                                 0xFFFFFFFF, 0xFFFFFFFF },
 953         { E1000_RA2,       0, 16, TABLE64_TEST_HI,
 954                                                 0xC3FFFFFF, 0xFFFFFFFF },
 955         { E1000_MTA,       0, 128, TABLE32_TEST,
 956                                                 0xFFFFFFFF, 0xFFFFFFFF },
 957         { 0, 0, 0, 0 }
 958 };
 959
 960 /* 82580 reg test */
 961 static struct igb_reg_test reg_test_82580[] = {
 962         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 963         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 964         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 965         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 966         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 967         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 968         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 969         { E1000_RDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 970         { E1000_RDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 971         { E1000_RDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 972         /* RDH is read-only for 82580, only test RDT. */
 973         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 974         { E1000_RDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 975         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
 976         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 977         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
 978         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 979         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 980         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 981         { E1000_TDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 982         { E1000_TDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 983         { E1000_TDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 984         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 985         { E1000_TDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 986         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 987         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
 988         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
 989         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 990         { E1000_RA,        0, 16, TABLE64_TEST_LO,
 991                                                 0xFFFFFFFF, 0xFFFFFFFF },
 992         { E1000_RA,        0, 16, TABLE64_TEST_HI,
 993                                                 0x83FFFFFF, 0xFFFFFFFF },
 994         { E1000_RA2,       0, 8, TABLE64_TEST_LO,
 995                                                 0xFFFFFFFF, 0xFFFFFFFF },
 996         { E1000_RA2,       0, 8, TABLE64_TEST_HI,
 997                                                 0x83FFFFFF, 0xFFFFFFFF },
 998         { E1000_MTA,       0, 128, TABLE32_TEST,
 999                                                 0xFFFFFFFF, 0xFFFFFFFF },
1000         { 0, 0, 0, 0 }
1001 };
1002
1003 /* 82576 reg test */
1004 static struct igb_reg_test reg_test_82576[] = {
1005         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1006         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1007         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1008         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1009         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1010         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1011         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1012         { E1000_RDBAL(4),  0x40, 12, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1013         { E1000_RDBAH(4),  0x40, 12, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1014         { E1000_RDLEN(4),  0x40, 12, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1015         /* Enable all RX queues before testing. */
1016         { E1000_RXDCTL(0), 0x100, 4,  WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE },
1017         { E1000_RXDCTL(4), 0x40, 12,  WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE },
1018         /* RDH is read-only for 82576, only test RDT. */
1019         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1020         { E1000_RDT(4),    0x40, 12,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1021         { E1000_RXDCTL(0), 0x100, 4,  WRITE_NO_TEST, 0, 0 },
1022         { E1000_RXDCTL(4), 0x40, 12,  WRITE_NO_TEST, 0, 0 },
1023         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1024         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1025         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1026         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1027         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1028         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1029         { E1000_TDBAL(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1030         { E1000_TDBAH(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1031         { E1000_TDLEN(4),  0x40, 12,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
1032         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1033         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
1034         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
1035         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1036         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1037         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
1038         { E1000_RA2,       0, 8, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1039         { E1000_RA2,       0, 8, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
1040         { E1000_MTA,       0, 128,TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1041         { 0, 0, 0, 0 }
1042 };
1043
1044 /* 82575 register test */
1045 static struct igb_reg_test reg_test_82575[] = {
1046         { E1000_FCAL,      0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1047         { E1000_FCAH,      0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1048         { E1000_FCT,       0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
1049         { E1000_VET,       0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1050         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1051         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1052         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1053         /* Enable all four RX queues before testing. */
1054         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE },
1055         /* RDH is read-only for 82575, only test RDT. */
1056         { E1000_RDT(0),    0x100, 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1057         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, 0 },
1058         { E1000_FCRTH,     0x100, 1, PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1059         { E1000_FCTTV,     0x100, 1, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1060         { E1000_TIPG,      0x100, 1, PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1061         { E1000_TDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1062         { E1000_TDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1063         { E1000_TDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1064         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1065         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0x003FFFFB },
1066         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0xFFFFFFFF },
1067         { E1000_TCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1068         { E1000_TXCW,      0x100, 1, PATTERN_TEST, 0xC000FFFF, 0x0000FFFF },
1069         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1070         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x800FFFFF, 0xFFFFFFFF },
1071         { E1000_MTA,       0, 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1072         { 0, 0, 0, 0 }
1073 };
1074
1075 static bool reg_pattern_test(struct igb_adapter *adapter, u64 *data,
1076                              int reg, u32 mask, u32 write)
1077 {
1078         struct e1000_hw *hw = &adapter->hw;
1079         u32 pat, val;
1080         static const u32 _test[] =
1081                 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1082         for (pat = 0; pat < ARRAY_SIZE(_test); pat++) {
1083                 wr32(reg, (_test[pat] & write));
1084                 val = rd32(reg) & mask;
1085                 if (val != (_test[pat] & write & mask)) {
1086                         dev_err(&adapter->pdev->dev, "pattern test reg %04X "
1087                                 "failed: got 0x%08X expected 0x%08X\n",
1088                                 reg, val, (_test[pat] & write & mask));
1089                         *data = reg;
1090                         return 1;
1091                 }
1092         }
1093
1094         return 0;
1095 }
1096
1097 static bool reg_set_and_check(struct igb_adapter *adapter, u64 *data,
1098                               int reg, u32 mask, u32 write)
1099 {
1100         struct e1000_hw *hw = &adapter->hw;
1101         u32 val;
1102         wr32(reg, write & mask);
1103         val = rd32(reg);
1104         if ((write & mask) != (val & mask)) {
1105                 dev_err(&adapter->pdev->dev, "set/check reg %04X test failed:"
1106                         " got 0x%08X expected 0x%08X\n", reg,
1107                         (val & mask), (write & mask));
1108                 *data = reg;
1109                 return 1;
1110         }
1111
1112         return 0;
1113 }
1114
1115 #define REG_PATTERN_TEST(reg, mask, write) \
1116         do { \
1117                 if (reg_pattern_test(adapter, data, reg, mask, write)) \
1118                         return 1; \
1119         } while (0)
1120
1121 #define REG_SET_AND_CHECK(reg, mask, write) \
1122         do { \
1123                 if (reg_set_and_check(adapter, data, reg, mask, write)) \
1124                         return 1; \
1125         } while (0)
1126
1127 static int igb_reg_test(struct igb_adapter *adapter, u64 *data)
1128 {
1129         struct e1000_hw *hw = &adapter->hw;
1130         struct igb_reg_test *test;
1131         u32 value, before, after;
1132         u32 i, toggle;
1133
1134         switch (adapter->hw.mac.type) {
1135         case e1000_i350:
1136                 test = reg_test_i350;
1137                 toggle = 0x7FEFF3FF;
1138                 break;
1139         case e1000_82580:
1140                 test = reg_test_82580;
1141                 toggle = 0x7FEFF3FF;
1142                 break;
1143         case e1000_82576:
1144                 test = reg_test_82576;
1145                 toggle = 0x7FFFF3FF;
1146                 break;
1147         default:
1148                 test = reg_test_82575;
1149                 toggle = 0x7FFFF3FF;
1150                 break;
1151         }
1152
1153         /* Because the status register is such a special case,
1154          * we handle it separately from the rest of the register
1155          * tests.  Some bits are read-only, some toggle, and some
1156          * are writable on newer MACs.
1157          */
1158         before = rd32(E1000_STATUS);
1159         value = (rd32(E1000_STATUS) & toggle);
1160         wr32(E1000_STATUS, toggle);
1161         after = rd32(E1000_STATUS) & toggle;
1162         if (value != after) {
1163                 dev_err(&adapter->pdev->dev, "failed STATUS register test "
1164                         "got: 0x%08X expected: 0x%08X\n", after, value);
1165                 *data = 1;
1166                 return 1;
1167         }
1168         /* restore previous status */
1169         wr32(E1000_STATUS, before);
1170
1171         /* Perform the remainder of the register test, looping through
1172          * the test table until we either fail or reach the null entry.
1173          */
1174         while (test->reg) {
1175                 for (i = 0; i < test->array_len; i++) {
1176                         switch (test->test_type) {
1177                         case PATTERN_TEST:
1178                                 REG_PATTERN_TEST(test->reg +
1179                                                 (i * test->reg_offset),
1180                                                 test->mask,
1181                                                 test->write);
1182                                 break;
1183                         case SET_READ_TEST:
1184                                 REG_SET_AND_CHECK(test->reg +
1185                                                 (i * test->reg_offset),
1186                                                 test->mask,
1187                                                 test->write);
1188                                 break;
1189                         case WRITE_NO_TEST:
1190                                 writel(test->write,
1191                                     (adapter->hw.hw_addr + test->reg)
1192                                         + (i * test->reg_offset));
1193                                 break;
1194                         case TABLE32_TEST:
1195                                 REG_PATTERN_TEST(test->reg + (i * 4),
1196                                                 test->mask,
1197                                                 test->write);
1198                                 break;
1199                         case TABLE64_TEST_LO:
1200                                 REG_PATTERN_TEST(test->reg + (i * 8),
1201                                                 test->mask,
1202                                                 test->write);
1203                                 break;
1204                         case TABLE64_TEST_HI:
1205                                 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1206                                                 test->mask,
1207                                                 test->write);
1208                                 break;
1209                         }
1210                 }
1211                 test++;
1212         }
1213
1214         *data = 0;
1215         return 0;
1216 }
1217
1218 static int igb_eeprom_test(struct igb_adapter *adapter, u64 *data)
1219 {
1220         u16 temp;
1221         u16 checksum = 0;
1222         u16 i;
1223
1224         *data = 0;
1225         /* Read and add up the contents of the EEPROM */
1226         for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {
1227                 if ((adapter->hw.nvm.ops.read(&adapter->hw, i, 1, &temp)) < 0) {
1228                         *data = 1;
1229                         break;
1230                 }
1231                 checksum += temp;
1232         }
1233
1234         /* If Checksum is not Correct return error else test passed */
1235         if ((checksum != (u16) NVM_SUM) && !(*data))
1236                 *data = 2;
1237
1238         return *data;
1239 }
1240
1241 static irqreturn_t igb_test_intr(int irq, void *data)
1242 {
1243         struct igb_adapter *adapter = (struct igb_adapter *) data;
1244         struct e1000_hw *hw = &adapter->hw;
1245
1246         adapter->test_icr |= rd32(E1000_ICR);
1247
1248         return IRQ_HANDLED;
1249 }
1250
1251 static int igb_intr_test(struct igb_adapter *adapter, u64 *data)
1252 {
1253         struct e1000_hw *hw = &adapter->hw;
1254         struct net_device *netdev = adapter->netdev;
1255         u32 mask, ics_mask, i = 0, shared_int = true;
1256         u32 irq = adapter->pdev->irq;
1257
1258         *data = 0;
1259
1260         /* Hook up test interrupt handler just for this test */
1261         if (adapter->msix_entries) {
1262                 if (request_irq(adapter->msix_entries[0].vector,
1263                                 igb_test_intr, 0, netdev->name, adapter)) {
1264                         *data = 1;
1265                         return -1;
1266                 }
1267         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
1268                 shared_int = false;
1269                 if (request_irq(irq,
1270                                 igb_test_intr, 0, netdev->name, adapter)) {
1271                         *data = 1;
1272                         return -1;
1273                 }
1274         } else if (!request_irq(irq, igb_test_intr, IRQF_PROBE_SHARED,
1275                                 netdev->name, adapter)) {
1276                 shared_int = false;
1277         } else if (request_irq(irq, igb_test_intr, IRQF_SHARED,
1278                  netdev->name, adapter)) {
1279                 *data = 1;
1280                 return -1;
1281         }
1282         dev_info(&adapter->pdev->dev, "testing %s interrupt\n",
1283                 (shared_int ? "shared" : "unshared"));
1284
1285         /* Disable all the interrupts */
1286         wr32(E1000_IMC, ~0);
1287         msleep(10);
1288
1289         /* Define all writable bits for ICS */
1290         switch (hw->mac.type) {
1291         case e1000_82575:
1292                 ics_mask = 0x37F47EDD;
1293                 break;
1294         case e1000_82576:
1295                 ics_mask = 0x77D4FBFD;
1296                 break;
1297         case e1000_82580:
1298                 ics_mask = 0x77DCFED5;
1299                 break;
1300         case e1000_i350:
1301                 ics_mask = 0x77DCFED5;
1302                 break;
1303         default:
1304                 ics_mask = 0x7FFFFFFF;
1305                 break;
1306         }
1307
1308         /* Test each interrupt */
1309         for (; i < 31; i++) {
1310                 /* Interrupt to test */
1311                 mask = 1 << i;
1312
1313                 if (!(mask & ics_mask))
1314                         continue;
1315
1316                 if (!shared_int) {
1317                         /* Disable the interrupt to be reported in
1318                          * the cause register and then force the same
1319                          * interrupt and see if one gets posted.  If
1320                          * an interrupt was posted to the bus, the
1321                          * test failed.
1322                          */
1323                         adapter->test_icr = 0;
1324
1325                         /* Flush any pending interrupts */
1326                         wr32(E1000_ICR, ~0);
1327
1328                         wr32(E1000_IMC, mask);
1329                         wr32(E1000_ICS, mask);
1330                         msleep(10);
1331
1332                         if (adapter->test_icr & mask) {
1333                                 *data = 3;
1334                                 break;
1335                         }
1336                 }
1337
1338                 /* Enable the interrupt to be reported in
1339                  * the cause register and then force the same
1340                  * interrupt and see if one gets posted.  If
1341                  * an interrupt was not posted to the bus, the
1342                  * test failed.
1343                  */
1344                 adapter->test_icr = 0;
1345
1346                 /* Flush any pending interrupts */
1347                 wr32(E1000_ICR, ~0);
1348
1349                 wr32(E1000_IMS, mask);
1350                 wr32(E1000_ICS, mask);
1351                 msleep(10);
1352
1353                 if (!(adapter->test_icr & mask)) {
1354                         *data = 4;
1355                         break;
1356                 }
1357
1358                 if (!shared_int) {
1359                         /* Disable the other interrupts to be reported in
1360                          * the cause register and then force the other
1361                          * interrupts and see if any get posted.  If
1362                          * an interrupt was posted to the bus, the
1363                          * test failed.
1364                          */
1365                         adapter->test_icr = 0;
1366
1367                         /* Flush any pending interrupts */
1368                         wr32(E1000_ICR, ~0);
1369
1370                         wr32(E1000_IMC, ~mask);
1371                         wr32(E1000_ICS, ~mask);
1372                         msleep(10);
1373
1374                         if (adapter->test_icr & mask) {
1375                                 *data = 5;
1376                                 break;
1377                         }
1378                 }
1379         }
1380
1381         /* Disable all the interrupts */
1382         wr32(E1000_IMC, ~0);
1383         msleep(10);
1384
1385         /* Unhook test interrupt handler */
1386         if (adapter->msix_entries)
1387                 free_irq(adapter->msix_entries[0].vector, adapter);
1388         else
1389                 free_irq(irq, adapter);
1390
1391         return *data;
1392 }
1393
1394 static void igb_free_desc_rings(struct igb_adapter *adapter)
1395 {
1396         igb_free_tx_resources(&adapter->test_tx_ring);
1397         igb_free_rx_resources(&adapter->test_rx_ring);
1398 }
1399
1400 static int igb_setup_desc_rings(struct igb_adapter *adapter)
1401 {
1402         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1403         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1404         struct e1000_hw *hw = &adapter->hw;
1405         int ret_val;
1406
1407         /* Setup Tx descriptor ring and Tx buffers */
1408         tx_ring->count = IGB_DEFAULT_TXD;
1409         tx_ring->dev = &adapter->pdev->dev;
1410         tx_ring->netdev = adapter->netdev;
1411         tx_ring->reg_idx = adapter->vfs_allocated_count;
1412
1413         if (igb_setup_tx_resources(tx_ring)) {
1414                 ret_val = 1;
1415                 goto err_nomem;
1416         }
1417
1418         igb_setup_tctl(adapter);
1419         igb_configure_tx_ring(adapter, tx_ring);
1420
1421         /* Setup Rx descriptor ring and Rx buffers */
1422         rx_ring->count = IGB_DEFAULT_RXD;
1423         rx_ring->dev = &adapter->pdev->dev;
1424         rx_ring->netdev = adapter->netdev;
1425         rx_ring->rx_buffer_len = IGB_RXBUFFER_2048;
1426         rx_ring->reg_idx = adapter->vfs_allocated_count;
1427
1428         if (igb_setup_rx_resources(rx_ring)) {
1429                 ret_val = 3;
1430                 goto err_nomem;
1431         }
1432
1433         /* set the default queue to queue 0 of PF */
1434         wr32(E1000_MRQC, adapter->vfs_allocated_count << 3);
1435
1436         /* enable receive ring */
1437         igb_setup_rctl(adapter);
1438         igb_configure_rx_ring(adapter, rx_ring);
1439
1440         igb_alloc_rx_buffers_adv(rx_ring, igb_desc_unused(rx_ring));
1441
1442         return 0;
1443
1444 err_nomem:
1445         igb_free_desc_rings(adapter);
1446         return ret_val;
1447 }
1448
1449 static void igb_phy_disable_receiver(struct igb_adapter *adapter)
1450 {
1451         struct e1000_hw *hw = &adapter->hw;
1452
1453         /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1454         igb_write_phy_reg(hw, 29, 0x001F);
1455         igb_write_phy_reg(hw, 30, 0x8FFC);
1456         igb_write_phy_reg(hw, 29, 0x001A);
1457         igb_write_phy_reg(hw, 30, 0x8FF0);
1458 }
1459
1460 static int igb_integrated_phy_loopback(struct igb_adapter *adapter)
1461 {
1462         struct e1000_hw *hw = &adapter->hw;
1463         u32 ctrl_reg = 0;
1464
1465         hw->mac.autoneg = false;
1466
1467         if (hw->phy.type == e1000_phy_m88) {
1468                 /* Auto-MDI/MDIX Off */
1469                 igb_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
1470                 /* reset to update Auto-MDI/MDIX */
1471                 igb_write_phy_reg(hw, PHY_CONTROL, 0x9140);
1472                 /* autoneg off */
1473                 igb_write_phy_reg(hw, PHY_CONTROL, 0x8140);
1474         } else if (hw->phy.type == e1000_phy_82580) {
1475                 /* enable MII loopback */
1476                 igb_write_phy_reg(hw, I82580_PHY_LBK_CTRL, 0x8041);
1477         }
1478
1479         ctrl_reg = rd32(E1000_CTRL);
1480
1481         /* force 1000, set loopback */
1482         igb_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1483
1484         /* Now set up the MAC to the same speed/duplex as the PHY. */
1485         ctrl_reg = rd32(E1000_CTRL);
1486         ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1487         ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1488                      E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1489                      E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1490                      E1000_CTRL_FD |     /* Force Duplex to FULL */
1491                      E1000_CTRL_SLU);    /* Set link up enable bit */
1492
1493         if (hw->phy.type == e1000_phy_m88)
1494                 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1495
1496         wr32(E1000_CTRL, ctrl_reg);
1497
1498         /* Disable the receiver on the PHY so when a cable is plugged in, the
1499          * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1500          */
1501         if (hw->phy.type == e1000_phy_m88)
1502                 igb_phy_disable_receiver(adapter);
1503
1504         udelay(500);
1505
1506         return 0;
1507 }
1508
1509 static int igb_set_phy_loopback(struct igb_adapter *adapter)
1510 {
1511         return igb_integrated_phy_loopback(adapter);
1512 }
1513
1514 static int igb_setup_loopback_test(struct igb_adapter *adapter)
1515 {
1516         struct e1000_hw *hw = &adapter->hw;
1517         u32 reg;
1518
1519         reg = rd32(E1000_CTRL_EXT);
1520
1521         /* use CTRL_EXT to identify link type as SGMII can appear as copper */
1522         if (reg & E1000_CTRL_EXT_LINK_MODE_MASK) {
1523                 reg = rd32(E1000_RCTL);
1524                 reg |= E1000_RCTL_LBM_TCVR;
1525                 wr32(E1000_RCTL, reg);
1526
1527                 wr32(E1000_SCTL, E1000_ENABLE_SERDES_LOOPBACK);
1528
1529                 reg = rd32(E1000_CTRL);
1530                 reg &= ~(E1000_CTRL_RFCE |
1531                          E1000_CTRL_TFCE |
1532                          E1000_CTRL_LRST);
1533                 reg |= E1000_CTRL_SLU |
1534                        E1000_CTRL_FD;
1535                 wr32(E1000_CTRL, reg);
1536
1537                 /* Unset switch control to serdes energy detect */
1538                 reg = rd32(E1000_CONNSW);
1539                 reg &= ~E1000_CONNSW_ENRGSRC;
1540                 wr32(E1000_CONNSW, reg);
1541
1542                 /* Set PCS register for forced speed */
1543                 reg = rd32(E1000_PCS_LCTL);
1544                 reg &= ~E1000_PCS_LCTL_AN_ENABLE;     /* Disable Autoneg*/
1545                 reg |= E1000_PCS_LCTL_FLV_LINK_UP |   /* Force link up */
1546                        E1000_PCS_LCTL_FSV_1000 |      /* Force 1000    */
1547                        E1000_PCS_LCTL_FDV_FULL |      /* SerDes Full duplex */
1548                        E1000_PCS_LCTL_FSD |           /* Force Speed */
1549                        E1000_PCS_LCTL_FORCE_LINK;     /* Force Link */
1550                 wr32(E1000_PCS_LCTL, reg);
1551
1552                 return 0;
1553         }
1554
1555         return igb_set_phy_loopback(adapter);
1556 }
1557
1558 static void igb_loopback_cleanup(struct igb_adapter *adapter)
1559 {
1560         struct e1000_hw *hw = &adapter->hw;
1561         u32 rctl;
1562         u16 phy_reg;
1563
1564         rctl = rd32(E1000_RCTL);
1565         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1566         wr32(E1000_RCTL, rctl);
1567
1568         hw->mac.autoneg = true;
1569         igb_read_phy_reg(hw, PHY_CONTROL, &phy_reg);
1570         if (phy_reg & MII_CR_LOOPBACK) {
1571                 phy_reg &= ~MII_CR_LOOPBACK;
1572                 igb_write_phy_reg(hw, PHY_CONTROL, phy_reg);
1573                 igb_phy_sw_reset(hw);
1574         }
1575 }
1576
1577 static void igb_create_lbtest_frame(struct sk_buff *skb,
1578                                     unsigned int frame_size)
1579 {
1580         memset(skb->data, 0xFF, frame_size);
1581         frame_size /= 2;
1582         memset(&skb->data[frame_size], 0xAA, frame_size - 1);
1583         memset(&skb->data[frame_size + 10], 0xBE, 1);
1584         memset(&skb->data[frame_size + 12], 0xAF, 1);
1585 }
1586
1587 static int igb_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1588 {
1589         frame_size /= 2;
1590         if (*(skb->data + 3) == 0xFF) {
1591                 if ((*(skb->data + frame_size + 10) == 0xBE) &&
1592                    (*(skb->data + frame_size + 12) == 0xAF)) {
1593                         return 0;
1594                 }
1595         }
1596         return 13;
1597 }
1598
1599 static int igb_clean_test_rings(struct igb_ring *rx_ring,
1600                                 struct igb_ring *tx_ring,
1601                                 unsigned int size)
1602 {
1603         union e1000_adv_rx_desc *rx_desc;
1604         struct igb_buffer *buffer_info;
1605         int rx_ntc, tx_ntc, count = 0;
1606         u32 staterr;
1607
1608         /* initialize next to clean and descriptor values */
1609         rx_ntc = rx_ring->next_to_clean;
1610         tx_ntc = tx_ring->next_to_clean;
1611         rx_desc = E1000_RX_DESC_ADV(*rx_ring, rx_ntc);
1612         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1613
1614         while (staterr & E1000_RXD_STAT_DD) {
1615                 /* check rx buffer */
1616                 buffer_info = &rx_ring->buffer_info[rx_ntc];
1617
1618                 /* unmap rx buffer, will be remapped by alloc_rx_buffers */
1619                 dma_unmap_single(rx_ring->dev,
1620                                  buffer_info->dma,
1621                                  rx_ring->rx_buffer_len,
1622                                  DMA_FROM_DEVICE);
1623                 buffer_info->dma = 0;
1624
1625                 /* verify contents of skb */
1626                 if (!igb_check_lbtest_frame(buffer_info->skb, size))
1627                         count++;
1628
1629                 /* unmap buffer on tx side */
1630                 buffer_info = &tx_ring->buffer_info[tx_ntc];
1631                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
1632
1633                 /* increment rx/tx next to clean counters */
1634                 rx_ntc++;
1635                 if (rx_ntc == rx_ring->count)
1636                         rx_ntc = 0;
1637                 tx_ntc++;
1638                 if (tx_ntc == tx_ring->count)
1639                         tx_ntc = 0;
1640
1641                 /* fetch next descriptor */
1642                 rx_desc = E1000_RX_DESC_ADV(*rx_ring, rx_ntc);
1643                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1644         }
1645
1646         /* re-map buffers to ring, store next to clean values */
1647         igb_alloc_rx_buffers_adv(rx_ring, count);
1648         rx_ring->next_to_clean = rx_ntc;
1649         tx_ring->next_to_clean = tx_ntc;
1650
1651         return count;
1652 }
1653
1654 static int igb_run_loopback_test(struct igb_adapter *adapter)
1655 {
1656         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1657         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1658         int i, j, lc, good_cnt, ret_val = 0;
1659         unsigned int size = 1024;
1660         netdev_tx_t tx_ret_val;
1661         struct sk_buff *skb;
1662
1663         /* allocate test skb */
1664         skb = alloc_skb(size, GFP_KERNEL);
1665         if (!skb)
1666                 return 11;
1667
1668         /* place data into test skb */
1669         igb_create_lbtest_frame(skb, size);
1670         skb_put(skb, size);
1671
1672         /*
1673          * Calculate the loop count based on the largest descriptor ring
1674          * The idea is to wrap the largest ring a number of times using 64
1675          * send/receive pairs during each loop
1676          */
1677
1678         if (rx_ring->count <= tx_ring->count)
1679                 lc = ((tx_ring->count / 64) * 2) + 1;
1680         else
1681                 lc = ((rx_ring->count / 64) * 2) + 1;
1682
1683         for (j = 0; j <= lc; j++) { /* loop count loop */
1684                 /* reset count of good packets */
1685                 good_cnt = 0;
1686
1687                 /* place 64 packets on the transmit queue*/
1688                 for (i = 0; i < 64; i++) {
1689                         skb_get(skb);
1690                         tx_ret_val = igb_xmit_frame_ring_adv(skb, tx_ring);
1691                         if (tx_ret_val == NETDEV_TX_OK)
1692                                 good_cnt++;
1693                 }
1694
1695                 if (good_cnt != 64) {
1696                         ret_val = 12;
1697                         break;
1698                 }
1699
1700                 /* allow 200 milliseconds for packets to go from tx to rx */
1701                 msleep(200);
1702
1703                 good_cnt = igb_clean_test_rings(rx_ring, tx_ring, size);
1704                 if (good_cnt != 64) {
1705                         ret_val = 13;
1706                         break;
1707                 }
1708         } /* end loop count loop */
1709
1710         /* free the original skb */
1711         kfree_skb(skb);
1712
1713         return ret_val;
1714 }
1715
1716 static int igb_loopback_test(struct igb_adapter *adapter, u64 *data)
1717 {
1718         /* PHY loopback cannot be performed if SoL/IDER
1719          * sessions are active */
1720         if (igb_check_reset_block(&adapter->hw)) {
1721                 dev_err(&adapter->pdev->dev,
1722                         "Cannot do PHY loopback test "
1723                         "when SoL/IDER is active.\n");
1724                 *data = 0;
1725                 goto out;
1726         }
1727         *data = igb_setup_desc_rings(adapter);
1728         if (*data)
1729                 goto out;
1730         *data = igb_setup_loopback_test(adapter);
1731         if (*data)
1732                 goto err_loopback;
1733         *data = igb_run_loopback_test(adapter);
1734         igb_loopback_cleanup(adapter);
1735
1736 err_loopback:
1737         igb_free_desc_rings(adapter);
1738 out:
1739         return *data;
1740 }
1741
1742 static int igb_link_test(struct igb_adapter *adapter, u64 *data)
1743 {
1744         struct e1000_hw *hw = &adapter->hw;
1745         *data = 0;
1746         if (hw->phy.media_type == e1000_media_type_internal_serdes) {
1747                 int i = 0;
1748                 hw->mac.serdes_has_link = false;
1749
1750                 /* On some blade server designs, link establishment
1751                  * could take as long as 2-3 minutes */
1752                 do {
1753                         hw->mac.ops.check_for_link(&adapter->hw);
1754                         if (hw->mac.serdes_has_link)
1755                                 return *data;
1756                         msleep(20);
1757                 } while (i++ < 3750);
1758
1759                 *data = 1;
1760         } else {
1761                 hw->mac.ops.check_for_link(&adapter->hw);
1762                 if (hw->mac.autoneg)
1763                         msleep(4000);
1764
1765                 if (!(rd32(E1000_STATUS) & E1000_STATUS_LU))
1766                         *data = 1;
1767         }
1768         return *data;
1769 }
1770
1771 static void igb_diag_test(struct net_device *netdev,
1772                           struct ethtool_test *eth_test, u64 *data)
1773 {
1774         struct igb_adapter *adapter = netdev_priv(netdev);
1775         u16 autoneg_advertised;
1776         u8 forced_speed_duplex, autoneg;
1777         bool if_running = netif_running(netdev);
1778
1779         set_bit(__IGB_TESTING, &adapter->state);
1780         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1781                 /* Offline tests */
1782
1783                 /* save speed, duplex, autoneg settings */
1784                 autoneg_advertised = adapter->hw.phy.autoneg_advertised;
1785                 forced_speed_duplex = adapter->hw.mac.forced_speed_duplex;
1786                 autoneg = adapter->hw.mac.autoneg;
1787
1788                 dev_info(&adapter->pdev->dev, "offline testing starting\n");
1789
1790                 /* power up link for link test */
1791                 igb_power_up_link(adapter);
1792
1793                 /* Link test performed before hardware reset so autoneg doesn't
1794                  * interfere with test result */
1795                 if (igb_link_test(adapter, &data[4]))
1796                         eth_test->flags |= ETH_TEST_FL_FAILED;
1797
1798                 if (if_running)
1799                         /* indicate we're in test mode */
1800                         dev_close(netdev);
1801                 else
1802                         igb_reset(adapter);
1803
1804                 if (igb_reg_test(adapter, &data[0]))
1805                         eth_test->flags |= ETH_TEST_FL_FAILED;
1806
1807                 igb_reset(adapter);
1808                 if (igb_eeprom_test(adapter, &data[1]))
1809                         eth_test->flags |= ETH_TEST_FL_FAILED;
1810
1811                 igb_reset(adapter);
1812                 if (igb_intr_test(adapter, &data[2]))
1813                         eth_test->flags |= ETH_TEST_FL_FAILED;
1814
1815                 igb_reset(adapter);
1816                 /* power up link for loopback test */
1817                 igb_power_up_link(adapter);
1818                 if (igb_loopback_test(adapter, &data[3]))
1819                         eth_test->flags |= ETH_TEST_FL_FAILED;
1820
1821                 /* restore speed, duplex, autoneg settings */
1822                 adapter->hw.phy.autoneg_advertised = autoneg_advertised;
1823                 adapter->hw.mac.forced_speed_duplex = forced_speed_duplex;
1824                 adapter->hw.mac.autoneg = autoneg;
1825
1826                 /* force this routine to wait until autoneg complete/timeout */
1827                 adapter->hw.phy.autoneg_wait_to_complete = true;
1828                 igb_reset(adapter);
1829                 adapter->hw.phy.autoneg_wait_to_complete = false;
1830
1831                 clear_bit(__IGB_TESTING, &adapter->state);
1832                 if (if_running)
1833                         dev_open(netdev);
1834         } else {
1835                 dev_info(&adapter->pdev->dev, "online testing starting\n");
1836
1837                 /* PHY is powered down when interface is down */
1838                 if (if_running && igb_link_test(adapter, &data[4]))
1839                         eth_test->flags |= ETH_TEST_FL_FAILED;
1840                 else
1841                         data[4] = 0;
1842
1843                 /* Online tests aren't run; pass by default */
1844                 data[0] = 0;
1845                 data[1] = 0;
1846                 data[2] = 0;
1847                 data[3] = 0;
1848
1849                 clear_bit(__IGB_TESTING, &adapter->state);
1850         }
1851         msleep_interruptible(4 * 1000);
1852 }
1853
1854 static int igb_wol_exclusion(struct igb_adapter *adapter,
1855                              struct ethtool_wolinfo *wol)
1856 {
1857         struct e1000_hw *hw = &adapter->hw;
1858         int retval = 1; /* fail by default */
1859
1860         switch (hw->device_id) {
1861         case E1000_DEV_ID_82575GB_QUAD_COPPER:
1862                 /* WoL not supported */
1863                 wol->supported = 0;
1864                 break;
1865         case E1000_DEV_ID_82575EB_FIBER_SERDES:
1866         case E1000_DEV_ID_82576_FIBER:
1867         case E1000_DEV_ID_82576_SERDES:
1868                 /* Wake events not supported on port B */
1869                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1) {
1870                         wol->supported = 0;
1871                         break;
1872                 }
1873                 /* return success for non excluded adapter ports */
1874                 retval = 0;
1875                 break;
1876         case E1000_DEV_ID_82576_QUAD_COPPER:
1877         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
1878                 /* quad port adapters only support WoL on port A */
1879                 if (!(adapter->flags & IGB_FLAG_QUAD_PORT_A)) {
1880                         wol->supported = 0;
1881                         break;
1882                 }
1883                 /* return success for non excluded adapter ports */
1884                 retval = 0;
1885                 break;
1886         default:
1887                 /* dual port cards only support WoL on port A from now on
1888                  * unless it was enabled in the eeprom for port B
1889                  * so exclude FUNC_1 ports from having WoL enabled */
1890                 if ((rd32(E1000_STATUS) & E1000_STATUS_FUNC_MASK) &&
1891                     !adapter->eeprom_wol) {
1892                         wol->supported = 0;
1893                         break;
1894                 }
1895
1896                 retval = 0;
1897         }
1898
1899         return retval;
1900 }
1901
1902 static void igb_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1903 {
1904         struct igb_adapter *adapter = netdev_priv(netdev);
1905
1906         wol->supported = WAKE_UCAST | WAKE_MCAST |
1907                          WAKE_BCAST | WAKE_MAGIC |
1908                          WAKE_PHY;
1909         wol->wolopts = 0;
1910
1911         /* this function will set ->supported = 0 and return 1 if wol is not
1912          * supported by this hardware */
1913         if (igb_wol_exclusion(adapter, wol) ||
1914             !device_can_wakeup(&adapter->pdev->dev))
1915                 return;
1916
1917         /* apply any specific unsupported masks here */
1918         switch (adapter->hw.device_id) {
1919         default:
1920                 break;
1921         }
1922
1923         if (adapter->wol & E1000_WUFC_EX)
1924                 wol->wolopts |= WAKE_UCAST;
1925         if (adapter->wol & E1000_WUFC_MC)
1926                 wol->wolopts |= WAKE_MCAST;
1927         if (adapter->wol & E1000_WUFC_BC)
1928                 wol->wolopts |= WAKE_BCAST;
1929         if (adapter->wol & E1000_WUFC_MAG)
1930                 wol->wolopts |= WAKE_MAGIC;
1931         if (adapter->wol & E1000_WUFC_LNKC)
1932                 wol->wolopts |= WAKE_PHY;
1933 }
1934
1935 static int igb_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1936 {
1937         struct igb_adapter *adapter = netdev_priv(netdev);
1938
1939         if (wol->wolopts & (WAKE_ARP | WAKE_MAGICSECURE))
1940                 return -EOPNOTSUPP;
1941
1942         if (igb_wol_exclusion(adapter, wol) ||
1943             !device_can_wakeup(&adapter->pdev->dev))
1944                 return wol->wolopts ? -EOPNOTSUPP : 0;
1945
1946         /* these settings will always override what we currently have */
1947         adapter->wol = 0;
1948
1949         if (wol->wolopts & WAKE_UCAST)
1950                 adapter->wol |= E1000_WUFC_EX;
1951         if (wol->wolopts & WAKE_MCAST)
1952                 adapter->wol |= E1000_WUFC_MC;
1953         if (wol->wolopts & WAKE_BCAST)
1954                 adapter->wol |= E1000_WUFC_BC;
1955         if (wol->wolopts & WAKE_MAGIC)
1956                 adapter->wol |= E1000_WUFC_MAG;
1957         if (wol->wolopts & WAKE_PHY)
1958                 adapter->wol |= E1000_WUFC_LNKC;
1959         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1960
1961         return 0;
1962 }
1963
1964 /* bit defines for adapter->led_status */
1965 #define IGB_LED_ON              0
1966
1967 static int igb_set_phys_id(struct net_device *netdev,
1968                            enum ethtool_phys_id_state state)
1969 {
1970         struct igb_adapter *adapter = netdev_priv(netdev);
1971         struct e1000_hw *hw = &adapter->hw;
1972
1973         switch (state) {
1974         case ETHTOOL_ID_ACTIVE:
1975                 igb_blink_led(hw);
1976                 return 2;
1977         case ETHTOOL_ID_ON:
1978                 igb_blink_led(hw);
1979                 break;
1980         case ETHTOOL_ID_OFF:
1981                 igb_led_off(hw);
1982                 break;
1983         case ETHTOOL_ID_INACTIVE:
1984                 igb_led_off(hw);
1985                 clear_bit(IGB_LED_ON, &adapter->led_status);
1986                 igb_cleanup_led(hw);
1987                 break;
1988         }
1989
1990         return 0;
1991 }
1992
1993 static int igb_set_coalesce(struct net_device *netdev,
1994                             struct ethtool_coalesce *ec)
1995 {
1996         struct igb_adapter *adapter = netdev_priv(netdev);
1997         int i;
1998
1999         if ((ec->rx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
2000             ((ec->rx_coalesce_usecs > 3) &&
2001              (ec->rx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
2002             (ec->rx_coalesce_usecs == 2))
2003                 return -EINVAL;
2004
2005         if ((ec->tx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
2006             ((ec->tx_coalesce_usecs > 3) &&
2007              (ec->tx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
2008             (ec->tx_coalesce_usecs == 2))
2009                 return -EINVAL;
2010
2011         if ((adapter->flags & IGB_FLAG_QUEUE_PAIRS) && ec->tx_coalesce_usecs)
2012                 return -EINVAL;
2013
2014         /* If ITR is disabled, disable DMAC */
2015         if (ec->rx_coalesce_usecs == 0) {
2016                 if (adapter->flags & IGB_FLAG_DMAC)
2017                         adapter->flags &= ~IGB_FLAG_DMAC;
2018         }
2019
2020         /* convert to rate of irq's per second */
2021         if (ec->rx_coalesce_usecs && ec->rx_coalesce_usecs <= 3)
2022                 adapter->rx_itr_setting = ec->rx_coalesce_usecs;
2023         else
2024                 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
2025
2026         /* convert to rate of irq's per second */
2027         if (adapter->flags & IGB_FLAG_QUEUE_PAIRS)
2028                 adapter->tx_itr_setting = adapter->rx_itr_setting;
2029         else if (ec->tx_coalesce_usecs && ec->tx_coalesce_usecs <= 3)
2030                 adapter->tx_itr_setting = ec->tx_coalesce_usecs;
2031         else
2032                 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
2033
2034         for (i = 0; i < adapter->num_q_vectors; i++) {
2035                 struct igb_q_vector *q_vector = adapter->q_vector[i];
2036                 if (q_vector->rx_ring)
2037                         q_vector->itr_val = adapter->rx_itr_setting;
2038                 else
2039                         q_vector->itr_val = adapter->tx_itr_setting;
2040                 if (q_vector->itr_val && q_vector->itr_val <= 3)
2041                         q_vector->itr_val = IGB_START_ITR;
2042                 q_vector->set_itr = 1;
2043         }
2044
2045         return 0;
2046 }
2047
2048 static int igb_get_coalesce(struct net_device *netdev,
2049                             struct ethtool_coalesce *ec)
2050 {
2051         struct igb_adapter *adapter = netdev_priv(netdev);
2052
2053         if (adapter->rx_itr_setting <= 3)
2054                 ec->rx_coalesce_usecs = adapter->rx_itr_setting;
2055         else
2056                 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
2057
2058         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS)) {
2059                 if (adapter->tx_itr_setting <= 3)
2060                         ec->tx_coalesce_usecs = adapter->tx_itr_setting;
2061                 else
2062                         ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
2063         }
2064
2065         return 0;
2066 }
2067
2068 static int igb_nway_reset(struct net_device *netdev)
2069 {
2070         struct igb_adapter *adapter = netdev_priv(netdev);
2071         if (netif_running(netdev))
2072                 igb_reinit_locked(adapter);
2073         return 0;
2074 }
2075
2076 static int igb_get_sset_count(struct net_device *netdev, int sset)
2077 {
2078         switch (sset) {
2079         case ETH_SS_STATS:
2080                 return IGB_STATS_LEN;
2081         case ETH_SS_TEST:
2082                 return IGB_TEST_LEN;
2083         default:
2084                 return -ENOTSUPP;
2085         }
2086 }
2087
2088 static void igb_get_ethtool_stats(struct net_device *netdev,
2089                                   struct ethtool_stats *stats, u64 *data)
2090 {
2091         struct igb_adapter *adapter = netdev_priv(netdev);
2092         struct rtnl_link_stats64 *net_stats = &adapter->stats64;
2093         unsigned int start;
2094         struct igb_ring *ring;
2095         int i, j;
2096         char *p;
2097
2098         spin_lock(&adapter->stats64_lock);
2099         igb_update_stats(adapter, net_stats);
2100
2101         for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
2102                 p = (char *)adapter + igb_gstrings_stats[i].stat_offset;
2103                 data[i] = (igb_gstrings_stats[i].sizeof_stat ==
2104                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2105         }
2106         for (j = 0; j < IGB_NETDEV_STATS_LEN; j++, i++) {
2107                 p = (char *)net_stats + igb_gstrings_net_stats[j].stat_offset;
2108                 data[i] = (igb_gstrings_net_stats[j].sizeof_stat ==
2109                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2110         }
2111         for (j = 0; j < adapter->num_tx_queues; j++) {
2112                 u64     restart2;
2113
2114                 ring = adapter->tx_ring[j];
2115                 do {
2116                         start = u64_stats_fetch_begin_bh(&ring->tx_syncp);
2117                         data[i]   = ring->tx_stats.packets;
2118                         data[i+1] = ring->tx_stats.bytes;
2119                         data[i+2] = ring->tx_stats.restart_queue;
2120                 } while (u64_stats_fetch_retry_bh(&ring->tx_syncp, start));
2121                 do {
2122                         start = u64_stats_fetch_begin_bh(&ring->tx_syncp2);
2123                         restart2  = ring->tx_stats.restart_queue2;
2124                 } while (u64_stats_fetch_retry_bh(&ring->tx_syncp2, start));
2125                 data[i+2] += restart2;
2126
2127                 i += IGB_TX_QUEUE_STATS_LEN;
2128         }
2129         for (j = 0; j < adapter->num_rx_queues; j++) {
2130                 ring = adapter->rx_ring[j];
2131                 do {
2132                         start = u64_stats_fetch_begin_bh(&ring->rx_syncp);
2133                         data[i]   = ring->rx_stats.packets;
2134                         data[i+1] = ring->rx_stats.bytes;
2135                         data[i+2] = ring->rx_stats.drops;
2136                         data[i+3] = ring->rx_stats.csum_err;
2137                         data[i+4] = ring->rx_stats.alloc_failed;
2138                 } while (u64_stats_fetch_retry_bh(&ring->rx_syncp, start));
2139                 i += IGB_RX_QUEUE_STATS_LEN;
2140         }
2141         spin_unlock(&adapter->stats64_lock);
2142 }
2143
2144 static void igb_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
2145 {
2146         struct igb_adapter *adapter = netdev_priv(netdev);
2147         u8 *p = data;
2148         int i;
2149
2150         switch (stringset) {
2151         case ETH_SS_TEST:
2152                 memcpy(data, *igb_gstrings_test,
2153                         IGB_TEST_LEN*ETH_GSTRING_LEN);
2154                 break;
2155         case ETH_SS_STATS:
2156                 for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
2157                         memcpy(p, igb_gstrings_stats[i].stat_string,
2158                                ETH_GSTRING_LEN);
2159                         p += ETH_GSTRING_LEN;
2160                 }
2161                 for (i = 0; i < IGB_NETDEV_STATS_LEN; i++) {
2162                         memcpy(p, igb_gstrings_net_stats[i].stat_string,
2163                                ETH_GSTRING_LEN);
2164                         p += ETH_GSTRING_LEN;
2165                 }
2166                 for (i = 0; i < adapter->num_tx_queues; i++) {
2167                         sprintf(p, "tx_queue_%u_packets", i);
2168                         p += ETH_GSTRING_LEN;
2169                         sprintf(p, "tx_queue_%u_bytes", i);
2170                         p += ETH_GSTRING_LEN;
2171                         sprintf(p, "tx_queue_%u_restart", i);
2172                         p += ETH_GSTRING_LEN;
2173                 }
2174                 for (i = 0; i < adapter->num_rx_queues; i++) {
2175                         sprintf(p, "rx_queue_%u_packets", i);
2176                         p += ETH_GSTRING_LEN;
2177                         sprintf(p, "rx_queue_%u_bytes", i);
2178                         p += ETH_GSTRING_LEN;
2179                         sprintf(p, "rx_queue_%u_drops", i);
2180                         p += ETH_GSTRING_LEN;
2181                         sprintf(p, "rx_queue_%u_csum_err", i);
2182                         p += ETH_GSTRING_LEN;
2183                         sprintf(p, "rx_queue_%u_alloc_failed", i);
2184                         p += ETH_GSTRING_LEN;
2185                 }
2186 /*              BUG_ON(p - data != IGB_STATS_LEN * ETH_GSTRING_LEN); */
2187                 break;
2188         }
2189 }
2190
2191 static const struct ethtool_ops igb_ethtool_ops = {
2192         .get_settings           = igb_get_settings,
2193         .set_settings           = igb_set_settings,
2194         .get_drvinfo            = igb_get_drvinfo,
2195         .get_regs_len           = igb_get_regs_len,
2196         .get_regs               = igb_get_regs,
2197         .get_wol                = igb_get_wol,
2198         .set_wol                = igb_set_wol,
2199         .get_msglevel           = igb_get_msglevel,
2200         .set_msglevel           = igb_set_msglevel,
2201         .nway_reset             = igb_nway_reset,
2202         .get_link               = igb_get_link,
2203         .get_eeprom_len         = igb_get_eeprom_len,
2204         .get_eeprom             = igb_get_eeprom,
2205         .set_eeprom             = igb_set_eeprom,
2206         .get_ringparam          = igb_get_ringparam,
2207         .set_ringparam          = igb_set_ringparam,
2208         .get_pauseparam         = igb_get_pauseparam,
2209         .set_pauseparam         = igb_set_pauseparam,
2210         .get_rx_csum            = igb_get_rx_csum,
2211         .set_rx_csum            = igb_set_rx_csum,
2212         .get_tx_csum            = igb_get_tx_csum,
2213         .set_tx_csum            = igb_set_tx_csum,
2214         .get_sg                 = ethtool_op_get_sg,
2215         .set_sg                 = ethtool_op_set_sg,
2216         .get_tso                = ethtool_op_get_tso,
2217         .set_tso                = igb_set_tso,
2218         .self_test              = igb_diag_test,
2219         .get_strings            = igb_get_strings,
2220         .set_phys_id            = igb_set_phys_id,
2221         .get_sset_count         = igb_get_sset_count,
2222         .get_ethtool_stats      = igb_get_ethtool_stats,
2223         .get_coalesce           = igb_get_coalesce,
2224         .set_coalesce           = igb_set_coalesce,
2225 };
2226
2227 void igb_set_ethtool_ops(struct net_device *netdev)
2228 {
2229         SET_ETHTOOL_OPS(netdev, &igb_ethtool_ops);
2230 }