drivers/net/igb/igb_ethtool.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007-2009 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 /* ethtool support for igb */
  29
  30 #include <linux/vmalloc.h>
  31 #include <linux/netdevice.h>
  32 #include <linux/pci.h>
  33 #include <linux/delay.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/if_ether.h>
  36 #include <linux/ethtool.h>
  37 #include <linux/sched.h>
  38 #include <linux/slab.h>
  39
  40 #include "igb.h"
  41
  42 struct igb_stats {
  43         char stat_string[ETH_GSTRING_LEN];
  44         int sizeof_stat;
  45         int stat_offset;
  46 };
  47
  48 #define IGB_STAT(_name, _stat) { \
  49         .stat_string = _name, \
  50         .sizeof_stat = FIELD_SIZEOF(struct igb_adapter, _stat), \
  51         .stat_offset = offsetof(struct igb_adapter, _stat) \
  52 }
  53 static const struct igb_stats igb_gstrings_stats[] = {
  54         IGB_STAT("rx_packets", stats.gprc),
  55         IGB_STAT("tx_packets", stats.gptc),
  56         IGB_STAT("rx_bytes", stats.gorc),
  57         IGB_STAT("tx_bytes", stats.gotc),
  58         IGB_STAT("rx_broadcast", stats.bprc),
  59         IGB_STAT("tx_broadcast", stats.bptc),
  60         IGB_STAT("rx_multicast", stats.mprc),
  61         IGB_STAT("tx_multicast", stats.mptc),
  62         IGB_STAT("multicast", stats.mprc),
  63         IGB_STAT("collisions", stats.colc),
  64         IGB_STAT("rx_crc_errors", stats.crcerrs),
  65         IGB_STAT("rx_no_buffer_count", stats.rnbc),
  66         IGB_STAT("rx_missed_errors", stats.mpc),
  67         IGB_STAT("tx_aborted_errors", stats.ecol),
  68         IGB_STAT("tx_carrier_errors", stats.tncrs),
  69         IGB_STAT("tx_window_errors", stats.latecol),
  70         IGB_STAT("tx_abort_late_coll", stats.latecol),
  71         IGB_STAT("tx_deferred_ok", stats.dc),
  72         IGB_STAT("tx_single_coll_ok", stats.scc),
  73         IGB_STAT("tx_multi_coll_ok", stats.mcc),
  74         IGB_STAT("tx_timeout_count", tx_timeout_count),
  75         IGB_STAT("rx_long_length_errors", stats.roc),
  76         IGB_STAT("rx_short_length_errors", stats.ruc),
  77         IGB_STAT("rx_align_errors", stats.algnerrc),
  78         IGB_STAT("tx_tcp_seg_good", stats.tsctc),
  79         IGB_STAT("tx_tcp_seg_failed", stats.tsctfc),
  80         IGB_STAT("rx_flow_control_xon", stats.xonrxc),
  81         IGB_STAT("rx_flow_control_xoff", stats.xoffrxc),
  82         IGB_STAT("tx_flow_control_xon", stats.xontxc),
  83         IGB_STAT("tx_flow_control_xoff", stats.xofftxc),
  84         IGB_STAT("rx_long_byte_count", stats.gorc),
  85         IGB_STAT("tx_dma_out_of_sync", stats.doosync),
  86         IGB_STAT("tx_smbus", stats.mgptc),
  87         IGB_STAT("rx_smbus", stats.mgprc),
  88         IGB_STAT("dropped_smbus", stats.mgpdc),
  89 };
  90
  91 #define IGB_NETDEV_STAT(_net_stat) { \
  92         .stat_string = __stringify(_net_stat), \
  93         .sizeof_stat = FIELD_SIZEOF(struct net_device_stats, _net_stat), \
  94         .stat_offset = offsetof(struct net_device_stats, _net_stat) \
  95 }
  96 static const struct igb_stats igb_gstrings_net_stats[] = {
  97         IGB_NETDEV_STAT(rx_errors),
  98         IGB_NETDEV_STAT(tx_errors),
  99         IGB_NETDEV_STAT(tx_dropped),
 100         IGB_NETDEV_STAT(rx_length_errors),
 101         IGB_NETDEV_STAT(rx_over_errors),
 102         IGB_NETDEV_STAT(rx_frame_errors),
 103         IGB_NETDEV_STAT(rx_fifo_errors),
 104         IGB_NETDEV_STAT(tx_fifo_errors),
 105         IGB_NETDEV_STAT(tx_heartbeat_errors)
 106 };
 107
 108 #define IGB_GLOBAL_STATS_LEN    \
 109         (sizeof(igb_gstrings_stats) / sizeof(struct igb_stats))
 110 #define IGB_NETDEV_STATS_LEN    \
 111         (sizeof(igb_gstrings_net_stats) / sizeof(struct igb_stats))
 112 #define IGB_RX_QUEUE_STATS_LEN \
 113         (sizeof(struct igb_rx_queue_stats) / sizeof(u64))
 114 #define IGB_TX_QUEUE_STATS_LEN \
 115         (sizeof(struct igb_tx_queue_stats) / sizeof(u64))
 116 #define IGB_QUEUE_STATS_LEN \
 117         ((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues * \
 118           IGB_RX_QUEUE_STATS_LEN) + \
 119          (((struct igb_adapter *)netdev_priv(netdev))->num_tx_queues * \
 120           IGB_TX_QUEUE_STATS_LEN))
 121 #define IGB_STATS_LEN \
 122         (IGB_GLOBAL_STATS_LEN + IGB_NETDEV_STATS_LEN + IGB_QUEUE_STATS_LEN)
 123
 124 static const char igb_gstrings_test[][ETH_GSTRING_LEN] = {
 125         "Register test  (offline)", "Eeprom test    (offline)",
 126         "Interrupt test (offline)", "Loopback test  (offline)",
 127         "Link test   (on/offline)"
 128 };
 129 #define IGB_TEST_LEN (sizeof(igb_gstrings_test) / ETH_GSTRING_LEN)
 130
 131 static int igb_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
 132 {
 133         struct igb_adapter *adapter = netdev_priv(netdev);
 134         struct e1000_hw *hw = &adapter->hw;
 135         u32 status;
 136
 137         if (hw->phy.media_type == e1000_media_type_copper) {
 138
 139                 ecmd->supported = (SUPPORTED_10baseT_Half |
 140                                    SUPPORTED_10baseT_Full |
 141                                    SUPPORTED_100baseT_Half |
 142                                    SUPPORTED_100baseT_Full |
 143                                    SUPPORTED_1000baseT_Full|
 144                                    SUPPORTED_Autoneg |
 145                                    SUPPORTED_TP);
 146                 ecmd->advertising = ADVERTISED_TP;
 147
 148                 if (hw->mac.autoneg == 1) {
 149                         ecmd->advertising |= ADVERTISED_Autoneg;
 150                         /* the e1000 autoneg seems to match ethtool nicely */
 151                         ecmd->advertising |= hw->phy.autoneg_advertised;
 152                 }
 153
 154                 ecmd->port = PORT_TP;
 155                 ecmd->phy_address = hw->phy.addr;
 156         } else {
 157                 ecmd->supported   = (SUPPORTED_1000baseT_Full |
 158                                      SUPPORTED_FIBRE |
 159                                      SUPPORTED_Autoneg);
 160
 161                 ecmd->advertising = (ADVERTISED_1000baseT_Full |
 162                                      ADVERTISED_FIBRE |
 163                                      ADVERTISED_Autoneg);
 164
 165                 ecmd->port = PORT_FIBRE;
 166         }
 167
 168         ecmd->transceiver = XCVR_INTERNAL;
 169
 170         status = rd32(E1000_STATUS);
 171
 172         if (status & E1000_STATUS_LU) {
 173
 174                 if ((status & E1000_STATUS_SPEED_1000) ||
 175                     hw->phy.media_type != e1000_media_type_copper)
 176                         ecmd->speed = SPEED_1000;
 177                 else if (status & E1000_STATUS_SPEED_100)
 178                         ecmd->speed = SPEED_100;
 179                 else
 180                         ecmd->speed = SPEED_10;
 181
 182                 if ((status & E1000_STATUS_FD) ||
 183                     hw->phy.media_type != e1000_media_type_copper)
 184                         ecmd->duplex = DUPLEX_FULL;
 185                 else
 186                         ecmd->duplex = DUPLEX_HALF;
 187         } else {
 188                 ecmd->speed = -1;
 189                 ecmd->duplex = -1;
 190         }
 191
 192         ecmd->autoneg = hw->mac.autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;
 193         return 0;
 194 }
 195
 196 static int igb_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
 197 {
 198         struct igb_adapter *adapter = netdev_priv(netdev);
 199         struct e1000_hw *hw = &adapter->hw;
 200
 201         /* When SoL/IDER sessions are active, autoneg/speed/duplex
 202          * cannot be changed */
 203         if (igb_check_reset_block(hw)) {
 204                 dev_err(&adapter->pdev->dev, "Cannot change link "
 205                         "characteristics when SoL/IDER is active.\n");
 206                 return -EINVAL;
 207         }
 208
 209         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 210                 msleep(1);
 211
 212         if (ecmd->autoneg == AUTONEG_ENABLE) {
 213                 hw->mac.autoneg = 1;
 214                 hw->phy.autoneg_advertised = ecmd->advertising |
 215                                              ADVERTISED_TP |
 216                                              ADVERTISED_Autoneg;
 217                 ecmd->advertising = hw->phy.autoneg_advertised;
 218                 if (adapter->fc_autoneg)
 219                         hw->fc.requested_mode = e1000_fc_default;
 220         } else {
 221                 if (igb_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) {
 222                         clear_bit(__IGB_RESETTING, &adapter->state);
 223                         return -EINVAL;
 224                 }
 225         }
 226
 227         /* reset the link */
 228         if (netif_running(adapter->netdev)) {
 229                 igb_down(adapter);
 230                 igb_up(adapter);
 231         } else
 232                 igb_reset(adapter);
 233
 234         clear_bit(__IGB_RESETTING, &adapter->state);
 235         return 0;
 236 }
 237
 238 static u32 igb_get_link(struct net_device *netdev)
 239 {
 240         struct igb_adapter *adapter = netdev_priv(netdev);
 241         struct e1000_mac_info *mac = &adapter->hw.mac;
 242
 243         /*
 244          * If the link is not reported up to netdev, interrupts are disabled,
 245          * and so the physical link state may have changed since we last
 246          * looked. Set get_link_status to make sure that the true link
 247          * state is interrogated, rather than pulling a cached and possibly
 248          * stale link state from the driver.
 249          */
 250         if (!netif_carrier_ok(netdev))
 251                 mac->get_link_status = 1;
 252
 253         return igb_has_link(adapter);
 254 }
 255
 256 static void igb_get_pauseparam(struct net_device *netdev,
 257                                struct ethtool_pauseparam *pause)
 258 {
 259         struct igb_adapter *adapter = netdev_priv(netdev);
 260         struct e1000_hw *hw = &adapter->hw;
 261
 262         pause->autoneg =
 263                 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
 264
 265         if (hw->fc.current_mode == e1000_fc_rx_pause)
 266                 pause->rx_pause = 1;
 267         else if (hw->fc.current_mode == e1000_fc_tx_pause)
 268                 pause->tx_pause = 1;
 269         else if (hw->fc.current_mode == e1000_fc_full) {
 270                 pause->rx_pause = 1;
 271                 pause->tx_pause = 1;
 272         }
 273 }
 274
 275 static int igb_set_pauseparam(struct net_device *netdev,
 276                               struct ethtool_pauseparam *pause)
 277 {
 278         struct igb_adapter *adapter = netdev_priv(netdev);
 279         struct e1000_hw *hw = &adapter->hw;
 280         int retval = 0;
 281
 282         adapter->fc_autoneg = pause->autoneg;
 283
 284         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 285                 msleep(1);
 286
 287         if (adapter->fc_autoneg == AUTONEG_ENABLE) {
 288                 hw->fc.requested_mode = e1000_fc_default;
 289                 if (netif_running(adapter->netdev)) {
 290                         igb_down(adapter);
 291                         igb_up(adapter);
 292                 } else {
 293                         igb_reset(adapter);
 294                 }
 295         } else {
 296                 if (pause->rx_pause && pause->tx_pause)
 297                         hw->fc.requested_mode = e1000_fc_full;
 298                 else if (pause->rx_pause && !pause->tx_pause)
 299                         hw->fc.requested_mode = e1000_fc_rx_pause;
 300                 else if (!pause->rx_pause && pause->tx_pause)
 301                         hw->fc.requested_mode = e1000_fc_tx_pause;
 302                 else if (!pause->rx_pause && !pause->tx_pause)
 303                         hw->fc.requested_mode = e1000_fc_none;
 304
 305                 hw->fc.current_mode = hw->fc.requested_mode;
 306
 307                 retval = ((hw->phy.media_type == e1000_media_type_copper) ?
 308                           igb_force_mac_fc(hw) : igb_setup_link(hw));
 309         }
 310
 311         clear_bit(__IGB_RESETTING, &adapter->state);
 312         return retval;
 313 }
 314
 315 static u32 igb_get_rx_csum(struct net_device *netdev)
 316 {
 317         struct igb_adapter *adapter = netdev_priv(netdev);
 318         return !!(adapter->rx_ring[0]->flags & IGB_RING_FLAG_RX_CSUM);
 319 }
 320
 321 static int igb_set_rx_csum(struct net_device *netdev, u32 data)
 322 {
 323         struct igb_adapter *adapter = netdev_priv(netdev);
 324         int i;
 325
 326         for (i = 0; i < adapter->num_rx_queues; i++) {
 327                 if (data)
 328                         adapter->rx_ring[i]->flags |= IGB_RING_FLAG_RX_CSUM;
 329                 else
 330                         adapter->rx_ring[i]->flags &= ~IGB_RING_FLAG_RX_CSUM;
 331         }
 332
 333         return 0;
 334 }
 335
 336 static u32 igb_get_tx_csum(struct net_device *netdev)
 337 {
 338         return (netdev->features & NETIF_F_IP_CSUM) != 0;
 339 }
 340
 341 static int igb_set_tx_csum(struct net_device *netdev, u32 data)
 342 {
 343         struct igb_adapter *adapter = netdev_priv(netdev);
 344
 345         if (data) {
 346                 netdev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
 347                 if (adapter->hw.mac.type >= e1000_82576)
 348                         netdev->features |= NETIF_F_SCTP_CSUM;
 349         } else {
 350                 netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
 351                                       NETIF_F_SCTP_CSUM);
 352         }
 353
 354         return 0;
 355 }
 356
 357 static int igb_set_tso(struct net_device *netdev, u32 data)
 358 {
 359         struct igb_adapter *adapter = netdev_priv(netdev);
 360
 361         if (data) {
 362                 netdev->features |= NETIF_F_TSO;
 363                 netdev->features |= NETIF_F_TSO6;
 364         } else {
 365                 netdev->features &= ~NETIF_F_TSO;
 366                 netdev->features &= ~NETIF_F_TSO6;
 367         }
 368
 369         dev_info(&adapter->pdev->dev, "TSO is %s\n",
 370                  data ? "Enabled" : "Disabled");
 371         return 0;
 372 }
 373
 374 static u32 igb_get_msglevel(struct net_device *netdev)
 375 {
 376         struct igb_adapter *adapter = netdev_priv(netdev);
 377         return adapter->msg_enable;
 378 }
 379
 380 static void igb_set_msglevel(struct net_device *netdev, u32 data)
 381 {
 382         struct igb_adapter *adapter = netdev_priv(netdev);
 383         adapter->msg_enable = data;
 384 }
 385
 386 static int igb_get_regs_len(struct net_device *netdev)
 387 {
 388 #define IGB_REGS_LEN 551
 389         return IGB_REGS_LEN * sizeof(u32);
 390 }
 391
 392 static void igb_get_regs(struct net_device *netdev,
 393                          struct ethtool_regs *regs, void *p)
 394 {
 395         struct igb_adapter *adapter = netdev_priv(netdev);
 396         struct e1000_hw *hw = &adapter->hw;
 397         u32 *regs_buff = p;
 398         u8 i;
 399
 400         memset(p, 0, IGB_REGS_LEN * sizeof(u32));
 401
 402         regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
 403
 404         /* General Registers */
 405         regs_buff[0] = rd32(E1000_CTRL);
 406         regs_buff[1] = rd32(E1000_STATUS);
 407         regs_buff[2] = rd32(E1000_CTRL_EXT);
 408         regs_buff[3] = rd32(E1000_MDIC);
 409         regs_buff[4] = rd32(E1000_SCTL);
 410         regs_buff[5] = rd32(E1000_CONNSW);
 411         regs_buff[6] = rd32(E1000_VET);
 412         regs_buff[7] = rd32(E1000_LEDCTL);
 413         regs_buff[8] = rd32(E1000_PBA);
 414         regs_buff[9] = rd32(E1000_PBS);
 415         regs_buff[10] = rd32(E1000_FRTIMER);
 416         regs_buff[11] = rd32(E1000_TCPTIMER);
 417
 418         /* NVM Register */
 419         regs_buff[12] = rd32(E1000_EECD);
 420
 421         /* Interrupt */
 422         /* Reading EICS for EICR because they read the
 423          * same but EICS does not clear on read */
 424         regs_buff[13] = rd32(E1000_EICS);
 425         regs_buff[14] = rd32(E1000_EICS);
 426         regs_buff[15] = rd32(E1000_EIMS);
 427         regs_buff[16] = rd32(E1000_EIMC);
 428         regs_buff[17] = rd32(E1000_EIAC);
 429         regs_buff[18] = rd32(E1000_EIAM);
 430         /* Reading ICS for ICR because they read the
 431          * same but ICS does not clear on read */
 432         regs_buff[19] = rd32(E1000_ICS);
 433         regs_buff[20] = rd32(E1000_ICS);
 434         regs_buff[21] = rd32(E1000_IMS);
 435         regs_buff[22] = rd32(E1000_IMC);
 436         regs_buff[23] = rd32(E1000_IAC);
 437         regs_buff[24] = rd32(E1000_IAM);
 438         regs_buff[25] = rd32(E1000_IMIRVP);
 439
 440         /* Flow Control */
 441         regs_buff[26] = rd32(E1000_FCAL);
 442         regs_buff[27] = rd32(E1000_FCAH);
 443         regs_buff[28] = rd32(E1000_FCTTV);
 444         regs_buff[29] = rd32(E1000_FCRTL);
 445         regs_buff[30] = rd32(E1000_FCRTH);
 446         regs_buff[31] = rd32(E1000_FCRTV);
 447
 448         /* Receive */
 449         regs_buff[32] = rd32(E1000_RCTL);
 450         regs_buff[33] = rd32(E1000_RXCSUM);
 451         regs_buff[34] = rd32(E1000_RLPML);
 452         regs_buff[35] = rd32(E1000_RFCTL);
 453         regs_buff[36] = rd32(E1000_MRQC);
 454         regs_buff[37] = rd32(E1000_VT_CTL);
 455
 456         /* Transmit */
 457         regs_buff[38] = rd32(E1000_TCTL);
 458         regs_buff[39] = rd32(E1000_TCTL_EXT);
 459         regs_buff[40] = rd32(E1000_TIPG);
 460         regs_buff[41] = rd32(E1000_DTXCTL);
 461
 462         /* Wake Up */
 463         regs_buff[42] = rd32(E1000_WUC);
 464         regs_buff[43] = rd32(E1000_WUFC);
 465         regs_buff[44] = rd32(E1000_WUS);
 466         regs_buff[45] = rd32(E1000_IPAV);
 467         regs_buff[46] = rd32(E1000_WUPL);
 468
 469         /* MAC */
 470         regs_buff[47] = rd32(E1000_PCS_CFG0);
 471         regs_buff[48] = rd32(E1000_PCS_LCTL);
 472         regs_buff[49] = rd32(E1000_PCS_LSTAT);
 473         regs_buff[50] = rd32(E1000_PCS_ANADV);
 474         regs_buff[51] = rd32(E1000_PCS_LPAB);
 475         regs_buff[52] = rd32(E1000_PCS_NPTX);
 476         regs_buff[53] = rd32(E1000_PCS_LPABNP);
 477
 478         /* Statistics */
 479         regs_buff[54] = adapter->stats.crcerrs;
 480         regs_buff[55] = adapter->stats.algnerrc;
 481         regs_buff[56] = adapter->stats.symerrs;
 482         regs_buff[57] = adapter->stats.rxerrc;
 483         regs_buff[58] = adapter->stats.mpc;
 484         regs_buff[59] = adapter->stats.scc;
 485         regs_buff[60] = adapter->stats.ecol;
 486         regs_buff[61] = adapter->stats.mcc;
 487         regs_buff[62] = adapter->stats.latecol;
 488         regs_buff[63] = adapter->stats.colc;
 489         regs_buff[64] = adapter->stats.dc;
 490         regs_buff[65] = adapter->stats.tncrs;
 491         regs_buff[66] = adapter->stats.sec;
 492         regs_buff[67] = adapter->stats.htdpmc;
 493         regs_buff[68] = adapter->stats.rlec;
 494         regs_buff[69] = adapter->stats.xonrxc;
 495         regs_buff[70] = adapter->stats.xontxc;
 496         regs_buff[71] = adapter->stats.xoffrxc;
 497         regs_buff[72] = adapter->stats.xofftxc;
 498         regs_buff[73] = adapter->stats.fcruc;
 499         regs_buff[74] = adapter->stats.prc64;
 500         regs_buff[75] = adapter->stats.prc127;
 501         regs_buff[76] = adapter->stats.prc255;
 502         regs_buff[77] = adapter->stats.prc511;
 503         regs_buff[78] = adapter->stats.prc1023;
 504         regs_buff[79] = adapter->stats.prc1522;
 505         regs_buff[80] = adapter->stats.gprc;
 506         regs_buff[81] = adapter->stats.bprc;
 507         regs_buff[82] = adapter->stats.mprc;
 508         regs_buff[83] = adapter->stats.gptc;
 509         regs_buff[84] = adapter->stats.gorc;
 510         regs_buff[86] = adapter->stats.gotc;
 511         regs_buff[88] = adapter->stats.rnbc;
 512         regs_buff[89] = adapter->stats.ruc;
 513         regs_buff[90] = adapter->stats.rfc;
 514         regs_buff[91] = adapter->stats.roc;
 515         regs_buff[92] = adapter->stats.rjc;
 516         regs_buff[93] = adapter->stats.mgprc;
 517         regs_buff[94] = adapter->stats.mgpdc;
 518         regs_buff[95] = adapter->stats.mgptc;
 519         regs_buff[96] = adapter->stats.tor;
 520         regs_buff[98] = adapter->stats.tot;
 521         regs_buff[100] = adapter->stats.tpr;
 522         regs_buff[101] = adapter->stats.tpt;
 523         regs_buff[102] = adapter->stats.ptc64;
 524         regs_buff[103] = adapter->stats.ptc127;
 525         regs_buff[104] = adapter->stats.ptc255;
 526         regs_buff[105] = adapter->stats.ptc511;
 527         regs_buff[106] = adapter->stats.ptc1023;
 528         regs_buff[107] = adapter->stats.ptc1522;
 529         regs_buff[108] = adapter->stats.mptc;
 530         regs_buff[109] = adapter->stats.bptc;
 531         regs_buff[110] = adapter->stats.tsctc;
 532         regs_buff[111] = adapter->stats.iac;
 533         regs_buff[112] = adapter->stats.rpthc;
 534         regs_buff[113] = adapter->stats.hgptc;
 535         regs_buff[114] = adapter->stats.hgorc;
 536         regs_buff[116] = adapter->stats.hgotc;
 537         regs_buff[118] = adapter->stats.lenerrs;
 538         regs_buff[119] = adapter->stats.scvpc;
 539         regs_buff[120] = adapter->stats.hrmpc;
 540
 541         for (i = 0; i < 4; i++)
 542                 regs_buff[121 + i] = rd32(E1000_SRRCTL(i));
 543         for (i = 0; i < 4; i++)
 544                 regs_buff[125 + i] = rd32(E1000_PSRTYPE(i));
 545         for (i = 0; i < 4; i++)
 546                 regs_buff[129 + i] = rd32(E1000_RDBAL(i));
 547         for (i = 0; i < 4; i++)
 548                 regs_buff[133 + i] = rd32(E1000_RDBAH(i));
 549         for (i = 0; i < 4; i++)
 550                 regs_buff[137 + i] = rd32(E1000_RDLEN(i));
 551         for (i = 0; i < 4; i++)
 552                 regs_buff[141 + i] = rd32(E1000_RDH(i));
 553         for (i = 0; i < 4; i++)
 554                 regs_buff[145 + i] = rd32(E1000_RDT(i));
 555         for (i = 0; i < 4; i++)
 556                 regs_buff[149 + i] = rd32(E1000_RXDCTL(i));
 557
 558         for (i = 0; i < 10; i++)
 559                 regs_buff[153 + i] = rd32(E1000_EITR(i));
 560         for (i = 0; i < 8; i++)
 561                 regs_buff[163 + i] = rd32(E1000_IMIR(i));
 562         for (i = 0; i < 8; i++)
 563                 regs_buff[171 + i] = rd32(E1000_IMIREXT(i));
 564         for (i = 0; i < 16; i++)
 565                 regs_buff[179 + i] = rd32(E1000_RAL(i));
 566         for (i = 0; i < 16; i++)
 567                 regs_buff[195 + i] = rd32(E1000_RAH(i));
 568
 569         for (i = 0; i < 4; i++)
 570                 regs_buff[211 + i] = rd32(E1000_TDBAL(i));
 571         for (i = 0; i < 4; i++)
 572                 regs_buff[215 + i] = rd32(E1000_TDBAH(i));
 573         for (i = 0; i < 4; i++)
 574                 regs_buff[219 + i] = rd32(E1000_TDLEN(i));
 575         for (i = 0; i < 4; i++)
 576                 regs_buff[223 + i] = rd32(E1000_TDH(i));
 577         for (i = 0; i < 4; i++)
 578                 regs_buff[227 + i] = rd32(E1000_TDT(i));
 579         for (i = 0; i < 4; i++)
 580                 regs_buff[231 + i] = rd32(E1000_TXDCTL(i));
 581         for (i = 0; i < 4; i++)
 582                 regs_buff[235 + i] = rd32(E1000_TDWBAL(i));
 583         for (i = 0; i < 4; i++)
 584                 regs_buff[239 + i] = rd32(E1000_TDWBAH(i));
 585         for (i = 0; i < 4; i++)
 586                 regs_buff[243 + i] = rd32(E1000_DCA_TXCTRL(i));
 587
 588         for (i = 0; i < 4; i++)
 589                 regs_buff[247 + i] = rd32(E1000_IP4AT_REG(i));
 590         for (i = 0; i < 4; i++)
 591                 regs_buff[251 + i] = rd32(E1000_IP6AT_REG(i));
 592         for (i = 0; i < 32; i++)
 593                 regs_buff[255 + i] = rd32(E1000_WUPM_REG(i));
 594         for (i = 0; i < 128; i++)
 595                 regs_buff[287 + i] = rd32(E1000_FFMT_REG(i));
 596         for (i = 0; i < 128; i++)
 597                 regs_buff[415 + i] = rd32(E1000_FFVT_REG(i));
 598         for (i = 0; i < 4; i++)
 599                 regs_buff[543 + i] = rd32(E1000_FFLT_REG(i));
 600
 601         regs_buff[547] = rd32(E1000_TDFH);
 602         regs_buff[548] = rd32(E1000_TDFT);
 603         regs_buff[549] = rd32(E1000_TDFHS);
 604         regs_buff[550] = rd32(E1000_TDFPC);
 605
 606 }
 607
 608 static int igb_get_eeprom_len(struct net_device *netdev)
 609 {
 610         struct igb_adapter *adapter = netdev_priv(netdev);
 611         return adapter->hw.nvm.word_size * 2;
 612 }
 613
 614 static int igb_get_eeprom(struct net_device *netdev,
 615                           struct ethtool_eeprom *eeprom, u8 *bytes)
 616 {
 617         struct igb_adapter *adapter = netdev_priv(netdev);
 618         struct e1000_hw *hw = &adapter->hw;
 619         u16 *eeprom_buff;
 620         int first_word, last_word;
 621         int ret_val = 0;
 622         u16 i;
 623
 624         if (eeprom->len == 0)
 625                 return -EINVAL;
 626
 627         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 628
 629         first_word = eeprom->offset >> 1;
 630         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 631
 632         eeprom_buff = kmalloc(sizeof(u16) *
 633                         (last_word - first_word + 1), GFP_KERNEL);
 634         if (!eeprom_buff)
 635                 return -ENOMEM;
 636
 637         if (hw->nvm.type == e1000_nvm_eeprom_spi)
 638                 ret_val = hw->nvm.ops.read(hw, first_word,
 639                                             last_word - first_word + 1,
 640                                             eeprom_buff);
 641         else {
 642                 for (i = 0; i < last_word - first_word + 1; i++) {
 643                         ret_val = hw->nvm.ops.read(hw, first_word + i, 1,
 644                                                     &eeprom_buff[i]);
 645                         if (ret_val)
 646                                 break;
 647                 }
 648         }
 649
 650         /* Device's eeprom is always little-endian, word addressable */
 651         for (i = 0; i < last_word - first_word + 1; i++)
 652                 le16_to_cpus(&eeprom_buff[i]);
 653
 654         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
 655                         eeprom->len);
 656         kfree(eeprom_buff);
 657
 658         return ret_val;
 659 }
 660
 661 static int igb_set_eeprom(struct net_device *netdev,
 662                           struct ethtool_eeprom *eeprom, u8 *bytes)
 663 {
 664         struct igb_adapter *adapter = netdev_priv(netdev);
 665         struct e1000_hw *hw = &adapter->hw;
 666         u16 *eeprom_buff;
 667         void *ptr;
 668         int max_len, first_word, last_word, ret_val = 0;
 669         u16 i;
 670
 671         if (eeprom->len == 0)
 672                 return -EOPNOTSUPP;
 673
 674         if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
 675                 return -EFAULT;
 676
 677         max_len = hw->nvm.word_size * 2;
 678
 679         first_word = eeprom->offset >> 1;
 680         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 681         eeprom_buff = kmalloc(max_len, GFP_KERNEL);
 682         if (!eeprom_buff)
 683                 return -ENOMEM;
 684
 685         ptr = (void *)eeprom_buff;
 686
 687         if (eeprom->offset & 1) {
 688                 /* need read/modify/write of first changed EEPROM word */
 689                 /* only the second byte of the word is being modified */
 690                 ret_val = hw->nvm.ops.read(hw, first_word, 1,
 691                                             &eeprom_buff[0]);
 692                 ptr++;
 693         }
 694         if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
 695                 /* need read/modify/write of last changed EEPROM word */
 696                 /* only the first byte of the word is being modified */
 697                 ret_val = hw->nvm.ops.read(hw, last_word, 1,
 698                                    &eeprom_buff[last_word - first_word]);
 699         }
 700
 701         /* Device's eeprom is always little-endian, word addressable */
 702         for (i = 0; i < last_word - first_word + 1; i++)
 703                 le16_to_cpus(&eeprom_buff[i]);
 704
 705         memcpy(ptr, bytes, eeprom->len);
 706
 707         for (i = 0; i < last_word - first_word + 1; i++)
 708                 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
 709
 710         ret_val = hw->nvm.ops.write(hw, first_word,
 711                                      last_word - first_word + 1, eeprom_buff);
 712
 713         /* Update the checksum over the first part of the EEPROM if needed
 714          * and flush shadow RAM for 82573 controllers */
 715         if ((ret_val == 0) && ((first_word <= NVM_CHECKSUM_REG)))
 716                 igb_update_nvm_checksum(hw);
 717
 718         kfree(eeprom_buff);
 719         return ret_val;
 720 }
 721
 722 static void igb_get_drvinfo(struct net_device *netdev,
 723                             struct ethtool_drvinfo *drvinfo)
 724 {
 725         struct igb_adapter *adapter = netdev_priv(netdev);
 726         char firmware_version[32];
 727         u16 eeprom_data;
 728
 729         strncpy(drvinfo->driver,  igb_driver_name, 32);
 730         strncpy(drvinfo->version, igb_driver_version, 32);
 731
 732         /* EEPROM image version # is reported as firmware version # for
 733          * 82575 controllers */
 734         adapter->hw.nvm.ops.read(&adapter->hw, 5, 1, &eeprom_data);
 735         sprintf(firmware_version, "%d.%d-%d",
 736                 (eeprom_data & 0xF000) >> 12,
 737                 (eeprom_data & 0x0FF0) >> 4,
 738                 eeprom_data & 0x000F);
 739
 740         strncpy(drvinfo->fw_version, firmware_version, 32);
 741         strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
 742         drvinfo->n_stats = IGB_STATS_LEN;
 743         drvinfo->testinfo_len = IGB_TEST_LEN;
 744         drvinfo->regdump_len = igb_get_regs_len(netdev);
 745         drvinfo->eedump_len = igb_get_eeprom_len(netdev);
 746 }
 747
 748 static void igb_get_ringparam(struct net_device *netdev,
 749                               struct ethtool_ringparam *ring)
 750 {
 751         struct igb_adapter *adapter = netdev_priv(netdev);
 752
 753         ring->rx_max_pending = IGB_MAX_RXD;
 754         ring->tx_max_pending = IGB_MAX_TXD;
 755         ring->rx_mini_max_pending = 0;
 756         ring->rx_jumbo_max_pending = 0;
 757         ring->rx_pending = adapter->rx_ring_count;
 758         ring->tx_pending = adapter->tx_ring_count;
 759         ring->rx_mini_pending = 0;
 760         ring->rx_jumbo_pending = 0;
 761 }
 762
 763 static int igb_set_ringparam(struct net_device *netdev,
 764                              struct ethtool_ringparam *ring)
 765 {
 766         struct igb_adapter *adapter = netdev_priv(netdev);
 767         struct igb_ring *temp_ring;
 768         int i, err = 0;
 769         u16 new_rx_count, new_tx_count;
 770
 771         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 772                 return -EINVAL;
 773
 774         new_rx_count = min_t(u32, ring->rx_pending, IGB_MAX_RXD);
 775         new_rx_count = max_t(u16, new_rx_count, IGB_MIN_RXD);
 776         new_rx_count = ALIGN(new_rx_count, REQ_RX_DESCRIPTOR_MULTIPLE);
 777
 778         new_tx_count = min_t(u32, ring->tx_pending, IGB_MAX_TXD);
 779         new_tx_count = max_t(u16, new_tx_count, IGB_MIN_TXD);
 780         new_tx_count = ALIGN(new_tx_count, REQ_TX_DESCRIPTOR_MULTIPLE);
 781
 782         if ((new_tx_count == adapter->tx_ring_count) &&
 783             (new_rx_count == adapter->rx_ring_count)) {
 784                 /* nothing to do */
 785                 return 0;
 786         }
 787
 788         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 789                 msleep(1);
 790
 791         if (!netif_running(adapter->netdev)) {
 792                 for (i = 0; i < adapter->num_tx_queues; i++)
 793                         adapter->tx_ring[i]->count = new_tx_count;
 794                 for (i = 0; i < adapter->num_rx_queues; i++)
 795                         adapter->rx_ring[i]->count = new_rx_count;
 796                 adapter->tx_ring_count = new_tx_count;
 797                 adapter->rx_ring_count = new_rx_count;
 798                 goto clear_reset;
 799         }
 800
 801         if (adapter->num_tx_queues > adapter->num_rx_queues)
 802                 temp_ring = vmalloc(adapter->num_tx_queues * sizeof(struct igb_ring));
 803         else
 804                 temp_ring = vmalloc(adapter->num_rx_queues * sizeof(struct igb_ring));
 805
 806         if (!temp_ring) {
 807                 err = -ENOMEM;
 808                 goto clear_reset;
 809         }
 810
 811         igb_down(adapter);
 812
 813         /*
 814          * We can't just free everything and then setup again,
 815          * because the ISRs in MSI-X mode get passed pointers
 816          * to the tx and rx ring structs.
 817          */
 818         if (new_tx_count != adapter->tx_ring_count) {
 819                 for (i = 0; i < adapter->num_tx_queues; i++) {
 820                         memcpy(&temp_ring[i], adapter->tx_ring[i],
 821                                sizeof(struct igb_ring));
 822
 823                         temp_ring[i].count = new_tx_count;
 824                         err = igb_setup_tx_resources(&temp_ring[i]);
 825                         if (err) {
 826                                 while (i) {
 827                                         i--;
 828                                         igb_free_tx_resources(&temp_ring[i]);
 829                                 }
 830                                 goto err_setup;
 831                         }
 832                 }
 833
 834                 for (i = 0; i < adapter->num_tx_queues; i++) {
 835                         igb_free_tx_resources(adapter->tx_ring[i]);
 836
 837                         memcpy(adapter->tx_ring[i], &temp_ring[i],
 838                                sizeof(struct igb_ring));
 839                 }
 840
 841                 adapter->tx_ring_count = new_tx_count;
 842         }
 843
 844         if (new_rx_count != adapter->rx_ring_count) {
 845                 for (i = 0; i < adapter->num_rx_queues; i++) {
 846                         memcpy(&temp_ring[i], adapter->rx_ring[i],
 847                                sizeof(struct igb_ring));
 848
 849                         temp_ring[i].count = new_rx_count;
 850                         err = igb_setup_rx_resources(&temp_ring[i]);
 851                         if (err) {
 852                                 while (i) {
 853                                         i--;
 854                                         igb_free_rx_resources(&temp_ring[i]);
 855                                 }
 856                                 goto err_setup;
 857                         }
 858
 859                 }
 860
 861                 for (i = 0; i < adapter->num_rx_queues; i++) {
 862                         igb_free_rx_resources(adapter->rx_ring[i]);
 863
 864                         memcpy(adapter->rx_ring[i], &temp_ring[i],
 865                                sizeof(struct igb_ring));
 866                 }
 867
 868                 adapter->rx_ring_count = new_rx_count;
 869         }
 870 err_setup:
 871         igb_up(adapter);
 872         vfree(temp_ring);
 873 clear_reset:
 874         clear_bit(__IGB_RESETTING, &adapter->state);
 875         return err;
 876 }
 877
 878 /* ethtool register test data */
 879 struct igb_reg_test {
 880         u16 reg;
 881         u16 reg_offset;
 882         u16 array_len;
 883         u16 test_type;
 884         u32 mask;
 885         u32 write;
 886 };
 887
 888 /* In the hardware, registers are laid out either singly, in arrays
 889  * spaced 0x100 bytes apart, or in contiguous tables.  We assume
 890  * most tests take place on arrays or single registers (handled
 891  * as a single-element array) and special-case the tables.
 892  * Table tests are always pattern tests.
 893  *
 894  * We also make provision for some required setup steps by specifying
 895  * registers to be written without any read-back testing.
 896  */
 897
 898 #define PATTERN_TEST    1
 899 #define SET_READ_TEST   2
 900 #define WRITE_NO_TEST   3
 901 #define TABLE32_TEST    4
 902 #define TABLE64_TEST_LO 5
 903 #define TABLE64_TEST_HI 6
 904
 905 /* 82580 reg test */
 906 static struct igb_reg_test reg_test_82580[] = {
 907         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 908         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 909         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 910         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 911         { E1000_RDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 912         { E1000_RDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 913         { E1000_RDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 914         { E1000_RDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 915         { E1000_RDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 916         { E1000_RDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 917         /* RDH is read-only for 82580, only test RDT. */
 918         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 919         { E1000_RDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 920         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
 921         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 922         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
 923         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 924         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 925         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 926         { E1000_TDBAL(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 927         { E1000_TDBAH(4),  0x40,  4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 928         { E1000_TDLEN(4),  0x40,  4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 929         { E1000_TDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 930         { E1000_TDT(4),    0x40,  4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 931         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 932         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
 933         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
 934         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 935         { E1000_RA,        0, 16, TABLE64_TEST_LO,
 936                                                 0xFFFFFFFF, 0xFFFFFFFF },
 937         { E1000_RA,        0, 16, TABLE64_TEST_HI,
 938                                                 0x83FFFFFF, 0xFFFFFFFF },
 939         { E1000_RA2,       0, 8, TABLE64_TEST_LO,
 940                                                 0xFFFFFFFF, 0xFFFFFFFF },
 941         { E1000_RA2,       0, 8, TABLE64_TEST_HI,
 942                                                 0x83FFFFFF, 0xFFFFFFFF },
 943         { E1000_MTA,       0, 128, TABLE32_TEST,
 944                                                 0xFFFFFFFF, 0xFFFFFFFF },
 945         { 0, 0, 0, 0 }
 946 };
 947
 948 /* 82576 reg test */
 949 static struct igb_reg_test reg_test_82576[] = {
 950         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 951         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 952         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 953         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 954         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 955         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 956         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 957         { E1000_RDBAL(4),  0x40, 12, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 958         { E1000_RDBAH(4),  0x40, 12, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 959         { E1000_RDLEN(4),  0x40, 12, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 960         /* Enable all RX queues before testing. */
 961         { E1000_RXDCTL(0), 0x100, 4,  WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE },
 962         { E1000_RXDCTL(4), 0x40, 12,  WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE },
 963         /* RDH is read-only for 82576, only test RDT. */
 964         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 965         { E1000_RDT(4),    0x40, 12,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 966         { E1000_RXDCTL(0), 0x100, 4,  WRITE_NO_TEST, 0, 0 },
 967         { E1000_RXDCTL(4), 0x40, 12,  WRITE_NO_TEST, 0, 0 },
 968         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
 969         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 970         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
 971         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 972         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 973         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 974         { E1000_TDBAL(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 975         { E1000_TDBAH(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 976         { E1000_TDLEN(4),  0x40, 12,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 977         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 978         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
 979         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
 980         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 981         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
 982         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
 983         { E1000_RA2,       0, 8, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
 984         { E1000_RA2,       0, 8, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
 985         { E1000_MTA,       0, 128,TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 986         { 0, 0, 0, 0 }
 987 };
 988
 989 /* 82575 register test */
 990 static struct igb_reg_test reg_test_82575[] = {
 991         { E1000_FCAL,      0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 992         { E1000_FCAH,      0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 993         { E1000_FCT,       0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 994         { E1000_VET,       0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 995         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 996         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 997         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
 998         /* Enable all four RX queues before testing. */
 999         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE },
1000         /* RDH is read-only for 82575, only test RDT. */
1001         { E1000_RDT(0),    0x100, 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1002         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, 0 },
1003         { E1000_FCRTH,     0x100, 1, PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
1004         { E1000_FCTTV,     0x100, 1, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1005         { E1000_TIPG,      0x100, 1, PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
1006         { E1000_TDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1007         { E1000_TDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1008         { E1000_TDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1009         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1010         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0x003FFFFB },
1011         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0xFFFFFFFF },
1012         { E1000_TCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
1013         { E1000_TXCW,      0x100, 1, PATTERN_TEST, 0xC000FFFF, 0x0000FFFF },
1014         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1015         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x800FFFFF, 0xFFFFFFFF },
1016         { E1000_MTA,       0, 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1017         { 0, 0, 0, 0 }
1018 };
1019
1020 static bool reg_pattern_test(struct igb_adapter *adapter, u64 *data,
1021                              int reg, u32 mask, u32 write)
1022 {
1023         struct e1000_hw *hw = &adapter->hw;
1024         u32 pat, val;
1025         static const u32 _test[] =
1026                 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1027         for (pat = 0; pat < ARRAY_SIZE(_test); pat++) {
1028                 wr32(reg, (_test[pat] & write));
1029                 val = rd32(reg);
1030                 if (val != (_test[pat] & write & mask)) {
1031                         dev_err(&adapter->pdev->dev, "pattern test reg %04X "
1032                                 "failed: got 0x%08X expected 0x%08X\n",
1033                                 reg, val, (_test[pat] & write & mask));
1034                         *data = reg;
1035                         return 1;
1036                 }
1037         }
1038
1039         return 0;
1040 }
1041
1042 static bool reg_set_and_check(struct igb_adapter *adapter, u64 *data,
1043                               int reg, u32 mask, u32 write)
1044 {
1045         struct e1000_hw *hw = &adapter->hw;
1046         u32 val;
1047         wr32(reg, write & mask);
1048         val = rd32(reg);
1049         if ((write & mask) != (val & mask)) {
1050                 dev_err(&adapter->pdev->dev, "set/check reg %04X test failed:"
1051                         " got 0x%08X expected 0x%08X\n", reg,
1052                         (val & mask), (write & mask));
1053                 *data = reg;
1054                 return 1;
1055         }
1056
1057         return 0;
1058 }
1059
1060 #define REG_PATTERN_TEST(reg, mask, write) \
1061         do { \
1062                 if (reg_pattern_test(adapter, data, reg, mask, write)) \
1063                         return 1; \
1064         } while (0)
1065
1066 #define REG_SET_AND_CHECK(reg, mask, write) \
1067         do { \
1068                 if (reg_set_and_check(adapter, data, reg, mask, write)) \
1069                         return 1; \
1070         } while (0)
1071
1072 static int igb_reg_test(struct igb_adapter *adapter, u64 *data)
1073 {
1074         struct e1000_hw *hw = &adapter->hw;
1075         struct igb_reg_test *test;
1076         u32 value, before, after;
1077         u32 i, toggle;
1078
1079         switch (adapter->hw.mac.type) {
1080         case e1000_82580:
1081                 test = reg_test_82580;
1082                 toggle = 0x7FEFF3FF;
1083                 break;
1084         case e1000_82576:
1085                 test = reg_test_82576;
1086                 toggle = 0x7FFFF3FF;
1087                 break;
1088         default:
1089                 test = reg_test_82575;
1090                 toggle = 0x7FFFF3FF;
1091                 break;
1092         }
1093
1094         /* Because the status register is such a special case,
1095          * we handle it separately from the rest of the register
1096          * tests.  Some bits are read-only, some toggle, and some
1097          * are writable on newer MACs.
1098          */
1099         before = rd32(E1000_STATUS);
1100         value = (rd32(E1000_STATUS) & toggle);
1101         wr32(E1000_STATUS, toggle);
1102         after = rd32(E1000_STATUS) & toggle;
1103         if (value != after) {
1104                 dev_err(&adapter->pdev->dev, "failed STATUS register test "
1105                         "got: 0x%08X expected: 0x%08X\n", after, value);
1106                 *data = 1;
1107                 return 1;
1108         }
1109         /* restore previous status */
1110         wr32(E1000_STATUS, before);
1111
1112         /* Perform the remainder of the register test, looping through
1113          * the test table until we either fail or reach the null entry.
1114          */
1115         while (test->reg) {
1116                 for (i = 0; i < test->array_len; i++) {
1117                         switch (test->test_type) {
1118                         case PATTERN_TEST:
1119                                 REG_PATTERN_TEST(test->reg +
1120                                                 (i * test->reg_offset),
1121                                                 test->mask,
1122                                                 test->write);
1123                                 break;
1124                         case SET_READ_TEST:
1125                                 REG_SET_AND_CHECK(test->reg +
1126                                                 (i * test->reg_offset),
1127                                                 test->mask,
1128                                                 test->write);
1129                                 break;
1130                         case WRITE_NO_TEST:
1131                                 writel(test->write,
1132                                     (adapter->hw.hw_addr + test->reg)
1133                                         + (i * test->reg_offset));
1134                                 break;
1135                         case TABLE32_TEST:
1136                                 REG_PATTERN_TEST(test->reg + (i * 4),
1137                                                 test->mask,
1138                                                 test->write);
1139                                 break;
1140                         case TABLE64_TEST_LO:
1141                                 REG_PATTERN_TEST(test->reg + (i * 8),
1142                                                 test->mask,
1143                                                 test->write);
1144                                 break;
1145                         case TABLE64_TEST_HI:
1146                                 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1147                                                 test->mask,
1148                                                 test->write);
1149                                 break;
1150                         }
1151                 }
1152                 test++;
1153         }
1154
1155         *data = 0;
1156         return 0;
1157 }
1158
1159 static int igb_eeprom_test(struct igb_adapter *adapter, u64 *data)
1160 {
1161         u16 temp;
1162         u16 checksum = 0;
1163         u16 i;
1164
1165         *data = 0;
1166         /* Read and add up the contents of the EEPROM */
1167         for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {
1168                 if ((adapter->hw.nvm.ops.read(&adapter->hw, i, 1, &temp)) < 0) {
1169                         *data = 1;
1170                         break;
1171                 }
1172                 checksum += temp;
1173         }
1174
1175         /* If Checksum is not Correct return error else test passed */
1176         if ((checksum != (u16) NVM_SUM) && !(*data))
1177                 *data = 2;
1178
1179         return *data;
1180 }
1181
1182 static irqreturn_t igb_test_intr(int irq, void *data)
1183 {
1184         struct igb_adapter *adapter = (struct igb_adapter *) data;
1185         struct e1000_hw *hw = &adapter->hw;
1186
1187         adapter->test_icr |= rd32(E1000_ICR);
1188
1189         return IRQ_HANDLED;
1190 }
1191
1192 static int igb_intr_test(struct igb_adapter *adapter, u64 *data)
1193 {
1194         struct e1000_hw *hw = &adapter->hw;
1195         struct net_device *netdev = adapter->netdev;
1196         u32 mask, ics_mask, i = 0, shared_int = true;
1197         u32 irq = adapter->pdev->irq;
1198
1199         *data = 0;
1200
1201         /* Hook up test interrupt handler just for this test */
1202         if (adapter->msix_entries) {
1203                 if (request_irq(adapter->msix_entries[0].vector,
1204                                 igb_test_intr, 0, netdev->name, adapter)) {
1205                         *data = 1;
1206                         return -1;
1207                 }
1208         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
1209                 shared_int = false;
1210                 if (request_irq(irq,
1211                                 igb_test_intr, 0, netdev->name, adapter)) {
1212                         *data = 1;
1213                         return -1;
1214                 }
1215         } else if (!request_irq(irq, igb_test_intr, IRQF_PROBE_SHARED,
1216                                 netdev->name, adapter)) {
1217                 shared_int = false;
1218         } else if (request_irq(irq, igb_test_intr, IRQF_SHARED,
1219                  netdev->name, adapter)) {
1220                 *data = 1;
1221                 return -1;
1222         }
1223         dev_info(&adapter->pdev->dev, "testing %s interrupt\n",
1224                 (shared_int ? "shared" : "unshared"));
1225
1226         /* Disable all the interrupts */
1227         wr32(E1000_IMC, ~0);
1228         msleep(10);
1229
1230         /* Define all writable bits for ICS */
1231         switch (hw->mac.type) {
1232         case e1000_82575:
1233                 ics_mask = 0x37F47EDD;
1234                 break;
1235         case e1000_82576:
1236                 ics_mask = 0x77D4FBFD;
1237                 break;
1238         case e1000_82580:
1239                 ics_mask = 0x77DCFED5;
1240                 break;
1241         default:
1242                 ics_mask = 0x7FFFFFFF;
1243                 break;
1244         }
1245
1246         /* Test each interrupt */
1247         for (; i < 31; i++) {
1248                 /* Interrupt to test */
1249                 mask = 1 << i;
1250
1251                 if (!(mask & ics_mask))
1252                         continue;
1253
1254                 if (!shared_int) {
1255                         /* Disable the interrupt to be reported in
1256                          * the cause register and then force the same
1257                          * interrupt and see if one gets posted.  If
1258                          * an interrupt was posted to the bus, the
1259                          * test failed.
1260                          */
1261                         adapter->test_icr = 0;
1262
1263                         /* Flush any pending interrupts */
1264                         wr32(E1000_ICR, ~0);
1265
1266                         wr32(E1000_IMC, mask);
1267                         wr32(E1000_ICS, mask);
1268                         msleep(10);
1269
1270                         if (adapter->test_icr & mask) {
1271                                 *data = 3;
1272                                 break;
1273                         }
1274                 }
1275
1276                 /* Enable the interrupt to be reported in
1277                  * the cause register and then force the same
1278                  * interrupt and see if one gets posted.  If
1279                  * an interrupt was not posted to the bus, the
1280                  * test failed.
1281                  */
1282                 adapter->test_icr = 0;
1283
1284                 /* Flush any pending interrupts */
1285                 wr32(E1000_ICR, ~0);
1286
1287                 wr32(E1000_IMS, mask);
1288                 wr32(E1000_ICS, mask);
1289                 msleep(10);
1290
1291                 if (!(adapter->test_icr & mask)) {
1292                         *data = 4;
1293                         break;
1294                 }
1295
1296                 if (!shared_int) {
1297                         /* Disable the other interrupts to be reported in
1298                          * the cause register and then force the other
1299                          * interrupts and see if any get posted.  If
1300                          * an interrupt was posted to the bus, the
1301                          * test failed.
1302                          */
1303                         adapter->test_icr = 0;
1304
1305                         /* Flush any pending interrupts */
1306                         wr32(E1000_ICR, ~0);
1307
1308                         wr32(E1000_IMC, ~mask);
1309                         wr32(E1000_ICS, ~mask);
1310                         msleep(10);
1311
1312                         if (adapter->test_icr & mask) {
1313                                 *data = 5;
1314                                 break;
1315                         }
1316                 }
1317         }
1318
1319         /* Disable all the interrupts */
1320         wr32(E1000_IMC, ~0);
1321         msleep(10);
1322
1323         /* Unhook test interrupt handler */
1324         if (adapter->msix_entries)
1325                 free_irq(adapter->msix_entries[0].vector, adapter);
1326         else
1327                 free_irq(irq, adapter);
1328
1329         return *data;
1330 }
1331
1332 static void igb_free_desc_rings(struct igb_adapter *adapter)
1333 {
1334         igb_free_tx_resources(&adapter->test_tx_ring);
1335         igb_free_rx_resources(&adapter->test_rx_ring);
1336 }
1337
1338 static int igb_setup_desc_rings(struct igb_adapter *adapter)
1339 {
1340         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1341         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1342         struct e1000_hw *hw = &adapter->hw;
1343         int ret_val;
1344
1345         /* Setup Tx descriptor ring and Tx buffers */
1346         tx_ring->count = IGB_DEFAULT_TXD;
1347         tx_ring->pdev = adapter->pdev;
1348         tx_ring->netdev = adapter->netdev;
1349         tx_ring->reg_idx = adapter->vfs_allocated_count;
1350
1351         if (igb_setup_tx_resources(tx_ring)) {
1352                 ret_val = 1;
1353                 goto err_nomem;
1354         }
1355
1356         igb_setup_tctl(adapter);
1357         igb_configure_tx_ring(adapter, tx_ring);
1358
1359         /* Setup Rx descriptor ring and Rx buffers */
1360         rx_ring->count = IGB_DEFAULT_RXD;
1361         rx_ring->pdev = adapter->pdev;
1362         rx_ring->netdev = adapter->netdev;
1363         rx_ring->rx_buffer_len = IGB_RXBUFFER_2048;
1364         rx_ring->reg_idx = adapter->vfs_allocated_count;
1365
1366         if (igb_setup_rx_resources(rx_ring)) {
1367                 ret_val = 3;
1368                 goto err_nomem;
1369         }
1370
1371         /* set the default queue to queue 0 of PF */
1372         wr32(E1000_MRQC, adapter->vfs_allocated_count << 3);
1373
1374         /* enable receive ring */
1375         igb_setup_rctl(adapter);
1376         igb_configure_rx_ring(adapter, rx_ring);
1377
1378         igb_alloc_rx_buffers_adv(rx_ring, igb_desc_unused(rx_ring));
1379
1380         return 0;
1381
1382 err_nomem:
1383         igb_free_desc_rings(adapter);
1384         return ret_val;
1385 }
1386
1387 static void igb_phy_disable_receiver(struct igb_adapter *adapter)
1388 {
1389         struct e1000_hw *hw = &adapter->hw;
1390
1391         /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1392         igb_write_phy_reg(hw, 29, 0x001F);
1393         igb_write_phy_reg(hw, 30, 0x8FFC);
1394         igb_write_phy_reg(hw, 29, 0x001A);
1395         igb_write_phy_reg(hw, 30, 0x8FF0);
1396 }
1397
1398 static int igb_integrated_phy_loopback(struct igb_adapter *adapter)
1399 {
1400         struct e1000_hw *hw = &adapter->hw;
1401         u32 ctrl_reg = 0;
1402
1403         hw->mac.autoneg = false;
1404
1405         if (hw->phy.type == e1000_phy_m88) {
1406                 /* Auto-MDI/MDIX Off */
1407                 igb_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
1408                 /* reset to update Auto-MDI/MDIX */
1409                 igb_write_phy_reg(hw, PHY_CONTROL, 0x9140);
1410                 /* autoneg off */
1411                 igb_write_phy_reg(hw, PHY_CONTROL, 0x8140);
1412         } else if (hw->phy.type == e1000_phy_82580) {
1413                 /* enable MII loopback */
1414                 igb_write_phy_reg(hw, I82580_PHY_LBK_CTRL, 0x8041);
1415         }
1416
1417         ctrl_reg = rd32(E1000_CTRL);
1418
1419         /* force 1000, set loopback */
1420         igb_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1421
1422         /* Now set up the MAC to the same speed/duplex as the PHY. */
1423         ctrl_reg = rd32(E1000_CTRL);
1424         ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1425         ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1426                      E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1427                      E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1428                      E1000_CTRL_FD |     /* Force Duplex to FULL */
1429                      E1000_CTRL_SLU);    /* Set link up enable bit */
1430
1431         if (hw->phy.type == e1000_phy_m88)
1432                 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1433
1434         wr32(E1000_CTRL, ctrl_reg);
1435
1436         /* Disable the receiver on the PHY so when a cable is plugged in, the
1437          * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1438          */
1439         if (hw->phy.type == e1000_phy_m88)
1440                 igb_phy_disable_receiver(adapter);
1441
1442         udelay(500);
1443
1444         return 0;
1445 }
1446
1447 static int igb_set_phy_loopback(struct igb_adapter *adapter)
1448 {
1449         return igb_integrated_phy_loopback(adapter);
1450 }
1451
1452 static int igb_setup_loopback_test(struct igb_adapter *adapter)
1453 {
1454         struct e1000_hw *hw = &adapter->hw;
1455         u32 reg;
1456
1457         reg = rd32(E1000_CTRL_EXT);
1458
1459         /* use CTRL_EXT to identify link type as SGMII can appear as copper */
1460         if (reg & E1000_CTRL_EXT_LINK_MODE_MASK) {
1461                 reg = rd32(E1000_RCTL);
1462                 reg |= E1000_RCTL_LBM_TCVR;
1463                 wr32(E1000_RCTL, reg);
1464
1465                 wr32(E1000_SCTL, E1000_ENABLE_SERDES_LOOPBACK);
1466
1467                 reg = rd32(E1000_CTRL);
1468                 reg &= ~(E1000_CTRL_RFCE |
1469                          E1000_CTRL_TFCE |
1470                          E1000_CTRL_LRST);
1471                 reg |= E1000_CTRL_SLU |
1472                        E1000_CTRL_FD;
1473                 wr32(E1000_CTRL, reg);
1474
1475                 /* Unset switch control to serdes energy detect */
1476                 reg = rd32(E1000_CONNSW);
1477                 reg &= ~E1000_CONNSW_ENRGSRC;
1478                 wr32(E1000_CONNSW, reg);
1479
1480                 /* Set PCS register for forced speed */
1481                 reg = rd32(E1000_PCS_LCTL);
1482                 reg &= ~E1000_PCS_LCTL_AN_ENABLE;     /* Disable Autoneg*/
1483                 reg |= E1000_PCS_LCTL_FLV_LINK_UP |   /* Force link up */
1484                        E1000_PCS_LCTL_FSV_1000 |      /* Force 1000    */
1485                        E1000_PCS_LCTL_FDV_FULL |      /* SerDes Full duplex */
1486                        E1000_PCS_LCTL_FSD |           /* Force Speed */
1487                        E1000_PCS_LCTL_FORCE_LINK;     /* Force Link */
1488                 wr32(E1000_PCS_LCTL, reg);
1489
1490                 return 0;
1491         }
1492
1493         return igb_set_phy_loopback(adapter);
1494 }
1495
1496 static void igb_loopback_cleanup(struct igb_adapter *adapter)
1497 {
1498         struct e1000_hw *hw = &adapter->hw;
1499         u32 rctl;
1500         u16 phy_reg;
1501
1502         rctl = rd32(E1000_RCTL);
1503         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1504         wr32(E1000_RCTL, rctl);
1505
1506         hw->mac.autoneg = true;
1507         igb_read_phy_reg(hw, PHY_CONTROL, &phy_reg);
1508         if (phy_reg & MII_CR_LOOPBACK) {
1509                 phy_reg &= ~MII_CR_LOOPBACK;
1510                 igb_write_phy_reg(hw, PHY_CONTROL, phy_reg);
1511                 igb_phy_sw_reset(hw);
1512         }
1513 }
1514
1515 static void igb_create_lbtest_frame(struct sk_buff *skb,
1516                                     unsigned int frame_size)
1517 {
1518         memset(skb->data, 0xFF, frame_size);
1519         frame_size /= 2;
1520         memset(&skb->data[frame_size], 0xAA, frame_size - 1);
1521         memset(&skb->data[frame_size + 10], 0xBE, 1);
1522         memset(&skb->data[frame_size + 12], 0xAF, 1);
1523 }
1524
1525 static int igb_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1526 {
1527         frame_size /= 2;
1528         if (*(skb->data + 3) == 0xFF) {
1529                 if ((*(skb->data + frame_size + 10) == 0xBE) &&
1530                    (*(skb->data + frame_size + 12) == 0xAF)) {
1531                         return 0;
1532                 }
1533         }
1534         return 13;
1535 }
1536
1537 static int igb_clean_test_rings(struct igb_ring *rx_ring,
1538                                 struct igb_ring *tx_ring,
1539                                 unsigned int size)
1540 {
1541         union e1000_adv_rx_desc *rx_desc;
1542         struct igb_buffer *buffer_info;
1543         int rx_ntc, tx_ntc, count = 0;
1544         u32 staterr;
1545
1546         /* initialize next to clean and descriptor values */
1547         rx_ntc = rx_ring->next_to_clean;
1548         tx_ntc = tx_ring->next_to_clean;
1549         rx_desc = E1000_RX_DESC_ADV(*rx_ring, rx_ntc);
1550         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1551
1552         while (staterr & E1000_RXD_STAT_DD) {
1553                 /* check rx buffer */
1554                 buffer_info = &rx_ring->buffer_info[rx_ntc];
1555
1556                 /* unmap rx buffer, will be remapped by alloc_rx_buffers */
1557                 pci_unmap_single(rx_ring->pdev,
1558                                  buffer_info->dma,
1559                                  rx_ring->rx_buffer_len,
1560                                  PCI_DMA_FROMDEVICE);
1561                 buffer_info->dma = 0;
1562
1563                 /* verify contents of skb */
1564                 if (!igb_check_lbtest_frame(buffer_info->skb, size))
1565                         count++;
1566
1567                 /* unmap buffer on tx side */
1568                 buffer_info = &tx_ring->buffer_info[tx_ntc];
1569                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
1570
1571                 /* increment rx/tx next to clean counters */
1572                 rx_ntc++;
1573                 if (rx_ntc == rx_ring->count)
1574                         rx_ntc = 0;
1575                 tx_ntc++;
1576                 if (tx_ntc == tx_ring->count)
1577                         tx_ntc = 0;
1578
1579                 /* fetch next descriptor */
1580                 rx_desc = E1000_RX_DESC_ADV(*rx_ring, rx_ntc);
1581                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1582         }
1583
1584         /* re-map buffers to ring, store next to clean values */
1585         igb_alloc_rx_buffers_adv(rx_ring, count);
1586         rx_ring->next_to_clean = rx_ntc;
1587         tx_ring->next_to_clean = tx_ntc;
1588
1589         return count;
1590 }
1591
1592 static int igb_run_loopback_test(struct igb_adapter *adapter)
1593 {
1594         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1595         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1596         int i, j, lc, good_cnt, ret_val = 0;
1597         unsigned int size = 1024;
1598         netdev_tx_t tx_ret_val;
1599         struct sk_buff *skb;
1600
1601         /* allocate test skb */
1602         skb = alloc_skb(size, GFP_KERNEL);
1603         if (!skb)
1604                 return 11;
1605
1606         /* place data into test skb */
1607         igb_create_lbtest_frame(skb, size);
1608         skb_put(skb, size);
1609
1610         /*
1611          * Calculate the loop count based on the largest descriptor ring
1612          * The idea is to wrap the largest ring a number of times using 64
1613          * send/receive pairs during each loop
1614          */
1615
1616         if (rx_ring->count <= tx_ring->count)
1617                 lc = ((tx_ring->count / 64) * 2) + 1;
1618         else
1619                 lc = ((rx_ring->count / 64) * 2) + 1;
1620
1621         for (j = 0; j <= lc; j++) { /* loop count loop */
1622                 /* reset count of good packets */
1623                 good_cnt = 0;
1624
1625                 /* place 64 packets on the transmit queue*/
1626                 for (i = 0; i < 64; i++) {
1627                         skb_get(skb);
1628                         tx_ret_val = igb_xmit_frame_ring_adv(skb, tx_ring);
1629                         if (tx_ret_val == NETDEV_TX_OK)
1630                                 good_cnt++;
1631                 }
1632
1633                 if (good_cnt != 64) {
1634                         ret_val = 12;
1635                         break;
1636                 }
1637
1638                 /* allow 200 milliseconds for packets to go from tx to rx */
1639                 msleep(200);
1640
1641                 good_cnt = igb_clean_test_rings(rx_ring, tx_ring, size);
1642                 if (good_cnt != 64) {
1643                         ret_val = 13;
1644                         break;
1645                 }
1646         } /* end loop count loop */
1647
1648         /* free the original skb */
1649         kfree_skb(skb);
1650
1651         return ret_val;
1652 }
1653
1654 static int igb_loopback_test(struct igb_adapter *adapter, u64 *data)
1655 {
1656         /* PHY loopback cannot be performed if SoL/IDER
1657          * sessions are active */
1658         if (igb_check_reset_block(&adapter->hw)) {
1659                 dev_err(&adapter->pdev->dev,
1660                         "Cannot do PHY loopback test "
1661                         "when SoL/IDER is active.\n");
1662                 *data = 0;
1663                 goto out;
1664         }
1665         *data = igb_setup_desc_rings(adapter);
1666         if (*data)
1667                 goto out;
1668         *data = igb_setup_loopback_test(adapter);
1669         if (*data)
1670                 goto err_loopback;
1671         *data = igb_run_loopback_test(adapter);
1672         igb_loopback_cleanup(adapter);
1673
1674 err_loopback:
1675         igb_free_desc_rings(adapter);
1676 out:
1677         return *data;
1678 }
1679
1680 static int igb_link_test(struct igb_adapter *adapter, u64 *data)
1681 {
1682         struct e1000_hw *hw = &adapter->hw;
1683         *data = 0;
1684         if (hw->phy.media_type == e1000_media_type_internal_serdes) {
1685                 int i = 0;
1686                 hw->mac.serdes_has_link = false;
1687
1688                 /* On some blade server designs, link establishment
1689                  * could take as long as 2-3 minutes */
1690                 do {
1691                         hw->mac.ops.check_for_link(&adapter->hw);
1692                         if (hw->mac.serdes_has_link)
1693                                 return *data;
1694                         msleep(20);
1695                 } while (i++ < 3750);
1696
1697                 *data = 1;
1698         } else {
1699                 hw->mac.ops.check_for_link(&adapter->hw);
1700                 if (hw->mac.autoneg)
1701                         msleep(4000);
1702
1703                 if (!(rd32(E1000_STATUS) & E1000_STATUS_LU))
1704                         *data = 1;
1705         }
1706         return *data;
1707 }
1708
1709 static void igb_diag_test(struct net_device *netdev,
1710                           struct ethtool_test *eth_test, u64 *data)
1711 {
1712         struct igb_adapter *adapter = netdev_priv(netdev);
1713         u16 autoneg_advertised;
1714         u8 forced_speed_duplex, autoneg;
1715         bool if_running = netif_running(netdev);
1716
1717         set_bit(__IGB_TESTING, &adapter->state);
1718         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1719                 /* Offline tests */
1720
1721                 /* save speed, duplex, autoneg settings */
1722                 autoneg_advertised = adapter->hw.phy.autoneg_advertised;
1723                 forced_speed_duplex = adapter->hw.mac.forced_speed_duplex;
1724                 autoneg = adapter->hw.mac.autoneg;
1725
1726                 dev_info(&adapter->pdev->dev, "offline testing starting\n");
1727
1728                 /* power up link for link test */
1729                 igb_power_up_link(adapter);
1730
1731                 /* Link test performed before hardware reset so autoneg doesn't
1732                  * interfere with test result */
1733                 if (igb_link_test(adapter, &data[4]))
1734                         eth_test->flags |= ETH_TEST_FL_FAILED;
1735
1736                 if (if_running)
1737                         /* indicate we're in test mode */
1738                         dev_close(netdev);
1739                 else
1740                         igb_reset(adapter);
1741
1742                 if (igb_reg_test(adapter, &data[0]))
1743                         eth_test->flags |= ETH_TEST_FL_FAILED;
1744
1745                 igb_reset(adapter);
1746                 if (igb_eeprom_test(adapter, &data[1]))
1747                         eth_test->flags |= ETH_TEST_FL_FAILED;
1748
1749                 igb_reset(adapter);
1750                 if (igb_intr_test(adapter, &data[2]))
1751                         eth_test->flags |= ETH_TEST_FL_FAILED;
1752
1753                 igb_reset(adapter);
1754                 /* power up link for loopback test */
1755                 igb_power_up_link(adapter);
1756                 if (igb_loopback_test(adapter, &data[3]))
1757                         eth_test->flags |= ETH_TEST_FL_FAILED;
1758
1759                 /* restore speed, duplex, autoneg settings */
1760                 adapter->hw.phy.autoneg_advertised = autoneg_advertised;
1761                 adapter->hw.mac.forced_speed_duplex = forced_speed_duplex;
1762                 adapter->hw.mac.autoneg = autoneg;
1763
1764                 /* force this routine to wait until autoneg complete/timeout */
1765                 adapter->hw.phy.autoneg_wait_to_complete = true;
1766                 igb_reset(adapter);
1767                 adapter->hw.phy.autoneg_wait_to_complete = false;
1768
1769                 clear_bit(__IGB_TESTING, &adapter->state);
1770                 if (if_running)
1771                         dev_open(netdev);
1772         } else {
1773                 dev_info(&adapter->pdev->dev, "online testing starting\n");
1774
1775                 /* PHY is powered down when interface is down */
1776                 if (!netif_carrier_ok(netdev)) {
1777                         data[4] = 0;
1778                 } else {
1779                         if (igb_link_test(adapter, &data[4]))
1780                                 eth_test->flags |= ETH_TEST_FL_FAILED;
1781                 }
1782
1783                 /* Online tests aren't run; pass by default */
1784                 data[0] = 0;
1785                 data[1] = 0;
1786                 data[2] = 0;
1787                 data[3] = 0;
1788
1789                 clear_bit(__IGB_TESTING, &adapter->state);
1790         }
1791         msleep_interruptible(4 * 1000);
1792 }
1793
1794 static int igb_wol_exclusion(struct igb_adapter *adapter,
1795                              struct ethtool_wolinfo *wol)
1796 {
1797         struct e1000_hw *hw = &adapter->hw;
1798         int retval = 1; /* fail by default */
1799
1800         switch (hw->device_id) {
1801         case E1000_DEV_ID_82575GB_QUAD_COPPER:
1802                 /* WoL not supported */
1803                 wol->supported = 0;
1804                 break;
1805         case E1000_DEV_ID_82575EB_FIBER_SERDES:
1806         case E1000_DEV_ID_82576_FIBER:
1807         case E1000_DEV_ID_82576_SERDES:
1808                 /* Wake events not supported on port B */
1809                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1) {
1810                         wol->supported = 0;
1811                         break;
1812                 }
1813                 /* return success for non excluded adapter ports */
1814                 retval = 0;
1815                 break;
1816         case E1000_DEV_ID_82576_QUAD_COPPER:
1817         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
1818                 /* quad port adapters only support WoL on port A */
1819                 if (!(adapter->flags & IGB_FLAG_QUAD_PORT_A)) {
1820                         wol->supported = 0;
1821                         break;
1822                 }
1823                 /* return success for non excluded adapter ports */
1824                 retval = 0;
1825                 break;
1826         default:
1827                 /* dual port cards only support WoL on port A from now on
1828                  * unless it was enabled in the eeprom for port B
1829                  * so exclude FUNC_1 ports from having WoL enabled */
1830                 if ((rd32(E1000_STATUS) & E1000_STATUS_FUNC_MASK) &&
1831                     !adapter->eeprom_wol) {
1832                         wol->supported = 0;
1833                         break;
1834                 }
1835
1836                 retval = 0;
1837         }
1838
1839         return retval;
1840 }
1841
1842 static void igb_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1843 {
1844         struct igb_adapter *adapter = netdev_priv(netdev);
1845
1846         wol->supported = WAKE_UCAST | WAKE_MCAST |
1847                          WAKE_BCAST | WAKE_MAGIC |
1848                          WAKE_PHY;
1849         wol->wolopts = 0;
1850
1851         /* this function will set ->supported = 0 and return 1 if wol is not
1852          * supported by this hardware */
1853         if (igb_wol_exclusion(adapter, wol) ||
1854             !device_can_wakeup(&adapter->pdev->dev))
1855                 return;
1856
1857         /* apply any specific unsupported masks here */
1858         switch (adapter->hw.device_id) {
1859         default:
1860                 break;
1861         }
1862
1863         if (adapter->wol & E1000_WUFC_EX)
1864                 wol->wolopts |= WAKE_UCAST;
1865         if (adapter->wol & E1000_WUFC_MC)
1866                 wol->wolopts |= WAKE_MCAST;
1867         if (adapter->wol & E1000_WUFC_BC)
1868                 wol->wolopts |= WAKE_BCAST;
1869         if (adapter->wol & E1000_WUFC_MAG)
1870                 wol->wolopts |= WAKE_MAGIC;
1871         if (adapter->wol & E1000_WUFC_LNKC)
1872                 wol->wolopts |= WAKE_PHY;
1873 }
1874
1875 static int igb_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1876 {
1877         struct igb_adapter *adapter = netdev_priv(netdev);
1878
1879         if (wol->wolopts & (WAKE_ARP | WAKE_MAGICSECURE))
1880                 return -EOPNOTSUPP;
1881
1882         if (igb_wol_exclusion(adapter, wol) ||
1883             !device_can_wakeup(&adapter->pdev->dev))
1884                 return wol->wolopts ? -EOPNOTSUPP : 0;
1885
1886         /* these settings will always override what we currently have */
1887         adapter->wol = 0;
1888
1889         if (wol->wolopts & WAKE_UCAST)
1890                 adapter->wol |= E1000_WUFC_EX;
1891         if (wol->wolopts & WAKE_MCAST)
1892                 adapter->wol |= E1000_WUFC_MC;
1893         if (wol->wolopts & WAKE_BCAST)
1894                 adapter->wol |= E1000_WUFC_BC;
1895         if (wol->wolopts & WAKE_MAGIC)
1896                 adapter->wol |= E1000_WUFC_MAG;
1897         if (wol->wolopts & WAKE_PHY)
1898                 adapter->wol |= E1000_WUFC_LNKC;
1899         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1900
1901         return 0;
1902 }
1903
1904 /* bit defines for adapter->led_status */
1905 #define IGB_LED_ON              0
1906
1907 static int igb_phys_id(struct net_device *netdev, u32 data)
1908 {
1909         struct igb_adapter *adapter = netdev_priv(netdev);
1910         struct e1000_hw *hw = &adapter->hw;
1911         unsigned long timeout;
1912
1913         timeout = data * 1000;
1914
1915         /*
1916          *  msleep_interruptable only accepts unsigned int so we are limited
1917          * in how long a duration we can wait
1918          */
1919         if (!timeout || timeout > UINT_MAX)
1920                 timeout = UINT_MAX;
1921
1922         igb_blink_led(hw);
1923         msleep_interruptible(timeout);
1924
1925         igb_led_off(hw);
1926         clear_bit(IGB_LED_ON, &adapter->led_status);
1927         igb_cleanup_led(hw);
1928
1929         return 0;
1930 }
1931
1932 static int igb_set_coalesce(struct net_device *netdev,
1933                             struct ethtool_coalesce *ec)
1934 {
1935         struct igb_adapter *adapter = netdev_priv(netdev);
1936         int i;
1937
1938         if ((ec->rx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
1939             ((ec->rx_coalesce_usecs > 3) &&
1940              (ec->rx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
1941             (ec->rx_coalesce_usecs == 2))
1942                 return -EINVAL;
1943
1944         if ((ec->tx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
1945             ((ec->tx_coalesce_usecs > 3) &&
1946              (ec->tx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
1947             (ec->tx_coalesce_usecs == 2))
1948                 return -EINVAL;
1949
1950         if ((adapter->flags & IGB_FLAG_QUEUE_PAIRS) && ec->tx_coalesce_usecs)
1951                 return -EINVAL;
1952
1953         /* convert to rate of irq's per second */
1954         if (ec->rx_coalesce_usecs && ec->rx_coalesce_usecs <= 3)
1955                 adapter->rx_itr_setting = ec->rx_coalesce_usecs;
1956         else
1957                 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
1958
1959         /* convert to rate of irq's per second */
1960         if (adapter->flags & IGB_FLAG_QUEUE_PAIRS)
1961                 adapter->tx_itr_setting = adapter->rx_itr_setting;
1962         else if (ec->tx_coalesce_usecs && ec->tx_coalesce_usecs <= 3)
1963                 adapter->tx_itr_setting = ec->tx_coalesce_usecs;
1964         else
1965                 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
1966
1967         for (i = 0; i < adapter->num_q_vectors; i++) {
1968                 struct igb_q_vector *q_vector = adapter->q_vector[i];
1969                 if (q_vector->rx_ring)
1970                         q_vector->itr_val = adapter->rx_itr_setting;
1971                 else
1972                         q_vector->itr_val = adapter->tx_itr_setting;
1973                 if (q_vector->itr_val && q_vector->itr_val <= 3)
1974                         q_vector->itr_val = IGB_START_ITR;
1975                 q_vector->set_itr = 1;
1976         }
1977
1978         return 0;
1979 }
1980
1981 static int igb_get_coalesce(struct net_device *netdev,
1982                             struct ethtool_coalesce *ec)
1983 {
1984         struct igb_adapter *adapter = netdev_priv(netdev);
1985
1986         if (adapter->rx_itr_setting <= 3)
1987                 ec->rx_coalesce_usecs = adapter->rx_itr_setting;
1988         else
1989                 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
1990
1991         if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS)) {
1992                 if (adapter->tx_itr_setting <= 3)
1993                         ec->tx_coalesce_usecs = adapter->tx_itr_setting;
1994                 else
1995                         ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
1996         }
1997
1998         return 0;
1999 }
2000
2001 static int igb_nway_reset(struct net_device *netdev)
2002 {
2003         struct igb_adapter *adapter = netdev_priv(netdev);
2004         if (netif_running(netdev))
2005                 igb_reinit_locked(adapter);
2006         return 0;
2007 }
2008
2009 static int igb_get_sset_count(struct net_device *netdev, int sset)
2010 {
2011         switch (sset) {
2012         case ETH_SS_STATS:
2013                 return IGB_STATS_LEN;
2014         case ETH_SS_TEST:
2015                 return IGB_TEST_LEN;
2016         default:
2017                 return -ENOTSUPP;
2018         }
2019 }
2020
2021 static void igb_get_ethtool_stats(struct net_device *netdev,
2022                                   struct ethtool_stats *stats, u64 *data)
2023 {
2024         struct igb_adapter *adapter = netdev_priv(netdev);
2025         struct net_device_stats *net_stats = &netdev->stats;
2026         u64 *queue_stat;
2027         int i, j, k;
2028         char *p;
2029
2030         igb_update_stats(adapter);
2031
2032         for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
2033                 p = (char *)adapter + igb_gstrings_stats[i].stat_offset;
2034                 data[i] = (igb_gstrings_stats[i].sizeof_stat ==
2035                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2036         }
2037         for (j = 0; j < IGB_NETDEV_STATS_LEN; j++, i++) {
2038                 p = (char *)net_stats + igb_gstrings_net_stats[j].stat_offset;
2039                 data[i] = (igb_gstrings_net_stats[j].sizeof_stat ==
2040                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
2041         }
2042         for (j = 0; j < adapter->num_tx_queues; j++) {
2043                 queue_stat = (u64 *)&adapter->tx_ring[j]->tx_stats;
2044                 for (k = 0; k < IGB_TX_QUEUE_STATS_LEN; k++, i++)
2045                         data[i] = queue_stat[k];
2046         }
2047         for (j = 0; j < adapter->num_rx_queues; j++) {
2048                 queue_stat = (u64 *)&adapter->rx_ring[j]->rx_stats;
2049                 for (k = 0; k < IGB_RX_QUEUE_STATS_LEN; k++, i++)
2050                         data[i] = queue_stat[k];
2051         }
2052 }
2053
2054 static void igb_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
2055 {
2056         struct igb_adapter *adapter = netdev_priv(netdev);
2057         u8 *p = data;
2058         int i;
2059
2060         switch (stringset) {
2061         case ETH_SS_TEST:
2062                 memcpy(data, *igb_gstrings_test,
2063                         IGB_TEST_LEN*ETH_GSTRING_LEN);
2064                 break;
2065         case ETH_SS_STATS:
2066                 for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
2067                         memcpy(p, igb_gstrings_stats[i].stat_string,
2068                                ETH_GSTRING_LEN);
2069                         p += ETH_GSTRING_LEN;
2070                 }
2071                 for (i = 0; i < IGB_NETDEV_STATS_LEN; i++) {
2072                         memcpy(p, igb_gstrings_net_stats[i].stat_string,
2073                                ETH_GSTRING_LEN);
2074                         p += ETH_GSTRING_LEN;
2075                 }
2076                 for (i = 0; i < adapter->num_tx_queues; i++) {
2077                         sprintf(p, "tx_queue_%u_packets", i);
2078                         p += ETH_GSTRING_LEN;
2079                         sprintf(p, "tx_queue_%u_bytes", i);
2080                         p += ETH_GSTRING_LEN;
2081                         sprintf(p, "tx_queue_%u_restart", i);
2082                         p += ETH_GSTRING_LEN;
2083                 }
2084                 for (i = 0; i < adapter->num_rx_queues; i++) {
2085                         sprintf(p, "rx_queue_%u_packets", i);
2086                         p += ETH_GSTRING_LEN;
2087                         sprintf(p, "rx_queue_%u_bytes", i);
2088                         p += ETH_GSTRING_LEN;
2089                         sprintf(p, "rx_queue_%u_drops", i);
2090                         p += ETH_GSTRING_LEN;
2091                         sprintf(p, "rx_queue_%u_csum_err", i);
2092                         p += ETH_GSTRING_LEN;
2093                         sprintf(p, "rx_queue_%u_alloc_failed", i);
2094                         p += ETH_GSTRING_LEN;
2095                 }
2096 /*              BUG_ON(p - data != IGB_STATS_LEN * ETH_GSTRING_LEN); */
2097                 break;
2098         }
2099 }
2100
2101 static const struct ethtool_ops igb_ethtool_ops = {
2102         .get_settings           = igb_get_settings,
2103         .set_settings           = igb_set_settings,
2104         .get_drvinfo            = igb_get_drvinfo,
2105         .get_regs_len           = igb_get_regs_len,
2106         .get_regs               = igb_get_regs,
2107         .get_wol                = igb_get_wol,
2108         .set_wol                = igb_set_wol,
2109         .get_msglevel           = igb_get_msglevel,
2110         .set_msglevel           = igb_set_msglevel,
2111         .nway_reset             = igb_nway_reset,
2112         .get_link               = igb_get_link,
2113         .get_eeprom_len         = igb_get_eeprom_len,
2114         .get_eeprom             = igb_get_eeprom,
2115         .set_eeprom             = igb_set_eeprom,
2116         .get_ringparam          = igb_get_ringparam,
2117         .set_ringparam          = igb_set_ringparam,
2118         .get_pauseparam         = igb_get_pauseparam,
2119         .set_pauseparam         = igb_set_pauseparam,
2120         .get_rx_csum            = igb_get_rx_csum,
2121         .set_rx_csum            = igb_set_rx_csum,
2122         .get_tx_csum            = igb_get_tx_csum,
2123         .set_tx_csum            = igb_set_tx_csum,
2124         .get_sg                 = ethtool_op_get_sg,
2125         .set_sg                 = ethtool_op_set_sg,
2126         .get_tso                = ethtool_op_get_tso,
2127         .set_tso                = igb_set_tso,
2128         .self_test              = igb_diag_test,
2129         .get_strings            = igb_get_strings,
2130         .phys_id                = igb_phys_id,
2131         .get_sset_count         = igb_get_sset_count,
2132         .get_ethtool_stats      = igb_get_ethtool_stats,
2133         .get_coalesce           = igb_get_coalesce,
2134         .set_coalesce           = igb_set_coalesce,
2135 };
2136
2137 void igb_set_ethtool_ops(struct net_device *netdev)
2138 {
2139         SET_ETHTOOL_OPS(netdev, &igb_ethtool_ops);
2140 }