drivers/net/igb/igb_ethtool.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007-2009 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 /* ethtool support for igb */
  29
  30 #include <linux/vmalloc.h>
  31 #include <linux/netdevice.h>
  32 #include <linux/pci.h>
  33 #include <linux/delay.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/if_ether.h>
  36 #include <linux/ethtool.h>
  37
  38 #include "igb.h"
  39
  40 enum {NETDEV_STATS, IGB_STATS};
  41
  42 struct igb_stats {
  43         char stat_string[ETH_GSTRING_LEN];
  44         int type;
  45         int sizeof_stat;
  46         int stat_offset;
  47 };
  48
  49 #define IGB_STAT(m)             IGB_STATS, \
  50                                 FIELD_SIZEOF(struct igb_adapter, m), \
  51                                 offsetof(struct igb_adapter, m)
  52 #define IGB_NETDEV_STAT(m)      NETDEV_STATS, \
  53                                 FIELD_SIZEOF(struct net_device, m), \
  54                                 offsetof(struct net_device, m)
  55
  56 static const struct igb_stats igb_gstrings_stats[] = {
  57         { "rx_packets", IGB_STAT(stats.gprc) },
  58         { "tx_packets", IGB_STAT(stats.gptc) },
  59         { "rx_bytes", IGB_STAT(stats.gorc) },
  60         { "tx_bytes", IGB_STAT(stats.gotc) },
  61         { "rx_broadcast", IGB_STAT(stats.bprc) },
  62         { "tx_broadcast", IGB_STAT(stats.bptc) },
  63         { "rx_multicast", IGB_STAT(stats.mprc) },
  64         { "tx_multicast", IGB_STAT(stats.mptc) },
  65         { "rx_errors", IGB_NETDEV_STAT(stats.rx_errors) },
  66         { "tx_errors", IGB_NETDEV_STAT(stats.tx_errors) },
  67         { "tx_dropped", IGB_NETDEV_STAT(stats.tx_dropped) },
  68         { "multicast", IGB_STAT(stats.mprc) },
  69         { "collisions", IGB_STAT(stats.colc) },
  70         { "rx_length_errors", IGB_NETDEV_STAT(stats.rx_length_errors) },
  71         { "rx_over_errors", IGB_NETDEV_STAT(stats.rx_over_errors) },
  72         { "rx_crc_errors", IGB_STAT(stats.crcerrs) },
  73         { "rx_frame_errors", IGB_NETDEV_STAT(stats.rx_frame_errors) },
  74         { "rx_no_buffer_count", IGB_STAT(stats.rnbc) },
  75         { "rx_queue_drop_packet_count", IGB_NETDEV_STAT(stats.rx_fifo_errors) },
  76         { "rx_missed_errors", IGB_STAT(stats.mpc) },
  77         { "tx_aborted_errors", IGB_STAT(stats.ecol) },
  78         { "tx_carrier_errors", IGB_STAT(stats.tncrs) },
  79         { "tx_fifo_errors", IGB_NETDEV_STAT(stats.tx_fifo_errors) },
  80         { "tx_heartbeat_errors", IGB_NETDEV_STAT(stats.tx_heartbeat_errors) },
  81         { "tx_window_errors", IGB_STAT(stats.latecol) },
  82         { "tx_abort_late_coll", IGB_STAT(stats.latecol) },
  83         { "tx_deferred_ok", IGB_STAT(stats.dc) },
  84         { "tx_single_coll_ok", IGB_STAT(stats.scc) },
  85         { "tx_multi_coll_ok", IGB_STAT(stats.mcc) },
  86         { "tx_timeout_count", IGB_STAT(tx_timeout_count) },
  87         { "rx_long_length_errors", IGB_STAT(stats.roc) },
  88         { "rx_short_length_errors", IGB_STAT(stats.ruc) },
  89         { "rx_align_errors", IGB_STAT(stats.algnerrc) },
  90         { "tx_tcp_seg_good", IGB_STAT(stats.tsctc) },
  91         { "tx_tcp_seg_failed", IGB_STAT(stats.tsctfc) },
  92         { "rx_flow_control_xon", IGB_STAT(stats.xonrxc) },
  93         { "rx_flow_control_xoff", IGB_STAT(stats.xoffrxc) },
  94         { "tx_flow_control_xon", IGB_STAT(stats.xontxc) },
  95         { "tx_flow_control_xoff", IGB_STAT(stats.xofftxc) },
  96         { "rx_long_byte_count", IGB_STAT(stats.gorc) },
  97         { "tx_dma_out_of_sync", IGB_STAT(stats.doosync) },
  98         { "tx_smbus", IGB_STAT(stats.mgptc) },
  99         { "rx_smbus", IGB_STAT(stats.mgprc) },
 100         { "dropped_smbus", IGB_STAT(stats.mgpdc) },
 101 };
 102
 103 #define IGB_QUEUE_STATS_LEN \
 104         (((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues)* \
 105           (sizeof(struct igb_rx_queue_stats) / sizeof(u64))) + \
 106          ((((struct igb_adapter *)netdev_priv(netdev))->num_tx_queues) * \
 107           (sizeof(struct igb_tx_queue_stats) / sizeof(u64))))
 108 #define IGB_GLOBAL_STATS_LEN    \
 109         sizeof(igb_gstrings_stats) / sizeof(struct igb_stats)
 110 #define IGB_STATS_LEN (IGB_GLOBAL_STATS_LEN + IGB_QUEUE_STATS_LEN)
 111 static const char igb_gstrings_test[][ETH_GSTRING_LEN] = {
 112         "Register test  (offline)", "Eeprom test    (offline)",
 113         "Interrupt test (offline)", "Loopback test  (offline)",
 114         "Link test   (on/offline)"
 115 };
 116 #define IGB_TEST_LEN sizeof(igb_gstrings_test) / ETH_GSTRING_LEN
 117
 118 static int igb_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
 119 {
 120         struct igb_adapter *adapter = netdev_priv(netdev);
 121         struct e1000_hw *hw = &adapter->hw;
 122
 123         if (hw->phy.media_type == e1000_media_type_copper) {
 124
 125                 ecmd->supported = (SUPPORTED_10baseT_Half |
 126                                    SUPPORTED_10baseT_Full |
 127                                    SUPPORTED_100baseT_Half |
 128                                    SUPPORTED_100baseT_Full |
 129                                    SUPPORTED_1000baseT_Full|
 130                                    SUPPORTED_Autoneg |
 131                                    SUPPORTED_TP);
 132                 ecmd->advertising = ADVERTISED_TP;
 133
 134                 if (hw->mac.autoneg == 1) {
 135                         ecmd->advertising |= ADVERTISED_Autoneg;
 136                         /* the e1000 autoneg seems to match ethtool nicely */
 137                         ecmd->advertising |= hw->phy.autoneg_advertised;
 138                 }
 139
 140                 ecmd->port = PORT_TP;
 141                 ecmd->phy_address = hw->phy.addr;
 142         } else {
 143                 ecmd->supported   = (SUPPORTED_1000baseT_Full |
 144                                      SUPPORTED_FIBRE |
 145                                      SUPPORTED_Autoneg);
 146
 147                 ecmd->advertising = (ADVERTISED_1000baseT_Full |
 148                                      ADVERTISED_FIBRE |
 149                                      ADVERTISED_Autoneg);
 150
 151                 ecmd->port = PORT_FIBRE;
 152         }
 153
 154         ecmd->transceiver = XCVR_INTERNAL;
 155
 156         if (rd32(E1000_STATUS) & E1000_STATUS_LU) {
 157
 158                 adapter->hw.mac.ops.get_speed_and_duplex(hw,
 159                                         &adapter->link_speed,
 160                                         &adapter->link_duplex);
 161                 ecmd->speed = adapter->link_speed;
 162
 163                 /* unfortunately FULL_DUPLEX != DUPLEX_FULL
 164                  *          and HALF_DUPLEX != DUPLEX_HALF */
 165
 166                 if (adapter->link_duplex == FULL_DUPLEX)
 167                         ecmd->duplex = DUPLEX_FULL;
 168                 else
 169                         ecmd->duplex = DUPLEX_HALF;
 170         } else {
 171                 ecmd->speed = -1;
 172                 ecmd->duplex = -1;
 173         }
 174
 175         ecmd->autoneg = hw->mac.autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;
 176         return 0;
 177 }
 178
 179 static int igb_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
 180 {
 181         struct igb_adapter *adapter = netdev_priv(netdev);
 182         struct e1000_hw *hw = &adapter->hw;
 183
 184         /* When SoL/IDER sessions are active, autoneg/speed/duplex
 185          * cannot be changed */
 186         if (igb_check_reset_block(hw)) {
 187                 dev_err(&adapter->pdev->dev, "Cannot change link "
 188                         "characteristics when SoL/IDER is active.\n");
 189                 return -EINVAL;
 190         }
 191
 192         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 193                 msleep(1);
 194
 195         if (ecmd->autoneg == AUTONEG_ENABLE) {
 196                 hw->mac.autoneg = 1;
 197                 hw->phy.autoneg_advertised = ecmd->advertising |
 198                                              ADVERTISED_TP |
 199                                              ADVERTISED_Autoneg;
 200                 ecmd->advertising = hw->phy.autoneg_advertised;
 201                 if (adapter->fc_autoneg)
 202                         hw->fc.requested_mode = e1000_fc_default;
 203         } else {
 204                 if (igb_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) {
 205                         clear_bit(__IGB_RESETTING, &adapter->state);
 206                         return -EINVAL;
 207                 }
 208         }
 209
 210         /* reset the link */
 211         if (netif_running(adapter->netdev)) {
 212                 igb_down(adapter);
 213                 igb_up(adapter);
 214         } else
 215                 igb_reset(adapter);
 216
 217         clear_bit(__IGB_RESETTING, &adapter->state);
 218         return 0;
 219 }
 220
 221 static void igb_get_pauseparam(struct net_device *netdev,
 222                                struct ethtool_pauseparam *pause)
 223 {
 224         struct igb_adapter *adapter = netdev_priv(netdev);
 225         struct e1000_hw *hw = &adapter->hw;
 226
 227         pause->autoneg =
 228                 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
 229
 230         if (hw->fc.current_mode == e1000_fc_rx_pause)
 231                 pause->rx_pause = 1;
 232         else if (hw->fc.current_mode == e1000_fc_tx_pause)
 233                 pause->tx_pause = 1;
 234         else if (hw->fc.current_mode == e1000_fc_full) {
 235                 pause->rx_pause = 1;
 236                 pause->tx_pause = 1;
 237         }
 238 }
 239
 240 static int igb_set_pauseparam(struct net_device *netdev,
 241                               struct ethtool_pauseparam *pause)
 242 {
 243         struct igb_adapter *adapter = netdev_priv(netdev);
 244         struct e1000_hw *hw = &adapter->hw;
 245         int retval = 0;
 246
 247         adapter->fc_autoneg = pause->autoneg;
 248
 249         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 250                 msleep(1);
 251
 252         if (adapter->fc_autoneg == AUTONEG_ENABLE) {
 253                 hw->fc.requested_mode = e1000_fc_default;
 254                 if (netif_running(adapter->netdev)) {
 255                         igb_down(adapter);
 256                         igb_up(adapter);
 257                 } else
 258                         igb_reset(adapter);
 259         } else {
 260                 if (pause->rx_pause && pause->tx_pause)
 261                         hw->fc.requested_mode = e1000_fc_full;
 262                 else if (pause->rx_pause && !pause->tx_pause)
 263                         hw->fc.requested_mode = e1000_fc_rx_pause;
 264                 else if (!pause->rx_pause && pause->tx_pause)
 265                         hw->fc.requested_mode = e1000_fc_tx_pause;
 266                 else if (!pause->rx_pause && !pause->tx_pause)
 267                         hw->fc.requested_mode = e1000_fc_none;
 268
 269                 hw->fc.current_mode = hw->fc.requested_mode;
 270
 271                 retval = ((hw->phy.media_type == e1000_media_type_copper) ?
 272                           igb_force_mac_fc(hw) : igb_setup_link(hw));
 273         }
 274
 275         clear_bit(__IGB_RESETTING, &adapter->state);
 276         return retval;
 277 }
 278
 279 static u32 igb_get_rx_csum(struct net_device *netdev)
 280 {
 281         struct igb_adapter *adapter = netdev_priv(netdev);
 282         return !!(adapter->rx_ring[0].flags & IGB_RING_FLAG_RX_CSUM);
 283 }
 284
 285 static int igb_set_rx_csum(struct net_device *netdev, u32 data)
 286 {
 287         struct igb_adapter *adapter = netdev_priv(netdev);
 288         int i;
 289
 290         for (i = 0; i < adapter->num_rx_queues; i++) {
 291                 if (data)
 292                         adapter->rx_ring[i].flags |= IGB_RING_FLAG_RX_CSUM;
 293                 else
 294                         adapter->rx_ring[i].flags &= ~IGB_RING_FLAG_RX_CSUM;
 295         }
 296
 297         return 0;
 298 }
 299
 300 static u32 igb_get_tx_csum(struct net_device *netdev)
 301 {
 302         return (netdev->features & NETIF_F_IP_CSUM) != 0;
 303 }
 304
 305 static int igb_set_tx_csum(struct net_device *netdev, u32 data)
 306 {
 307         struct igb_adapter *adapter = netdev_priv(netdev);
 308
 309         if (data) {
 310                 netdev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
 311                 if (adapter->hw.mac.type == e1000_82576)
 312                         netdev->features |= NETIF_F_SCTP_CSUM;
 313         } else {
 314                 netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
 315                                       NETIF_F_SCTP_CSUM);
 316         }
 317
 318         return 0;
 319 }
 320
 321 static int igb_set_tso(struct net_device *netdev, u32 data)
 322 {
 323         struct igb_adapter *adapter = netdev_priv(netdev);
 324
 325         if (data) {
 326                 netdev->features |= NETIF_F_TSO;
 327                 netdev->features |= NETIF_F_TSO6;
 328         } else {
 329                 netdev->features &= ~NETIF_F_TSO;
 330                 netdev->features &= ~NETIF_F_TSO6;
 331         }
 332
 333         dev_info(&adapter->pdev->dev, "TSO is %s\n",
 334                  data ? "Enabled" : "Disabled");
 335         return 0;
 336 }
 337
 338 static u32 igb_get_msglevel(struct net_device *netdev)
 339 {
 340         struct igb_adapter *adapter = netdev_priv(netdev);
 341         return adapter->msg_enable;
 342 }
 343
 344 static void igb_set_msglevel(struct net_device *netdev, u32 data)
 345 {
 346         struct igb_adapter *adapter = netdev_priv(netdev);
 347         adapter->msg_enable = data;
 348 }
 349
 350 static int igb_get_regs_len(struct net_device *netdev)
 351 {
 352 #define IGB_REGS_LEN 551
 353         return IGB_REGS_LEN * sizeof(u32);
 354 }
 355
 356 static void igb_get_regs(struct net_device *netdev,
 357                          struct ethtool_regs *regs, void *p)
 358 {
 359         struct igb_adapter *adapter = netdev_priv(netdev);
 360         struct e1000_hw *hw = &adapter->hw;
 361         u32 *regs_buff = p;
 362         u8 i;
 363
 364         memset(p, 0, IGB_REGS_LEN * sizeof(u32));
 365
 366         regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
 367
 368         /* General Registers */
 369         regs_buff[0] = rd32(E1000_CTRL);
 370         regs_buff[1] = rd32(E1000_STATUS);
 371         regs_buff[2] = rd32(E1000_CTRL_EXT);
 372         regs_buff[3] = rd32(E1000_MDIC);
 373         regs_buff[4] = rd32(E1000_SCTL);
 374         regs_buff[5] = rd32(E1000_CONNSW);
 375         regs_buff[6] = rd32(E1000_VET);
 376         regs_buff[7] = rd32(E1000_LEDCTL);
 377         regs_buff[8] = rd32(E1000_PBA);
 378         regs_buff[9] = rd32(E1000_PBS);
 379         regs_buff[10] = rd32(E1000_FRTIMER);
 380         regs_buff[11] = rd32(E1000_TCPTIMER);
 381
 382         /* NVM Register */
 383         regs_buff[12] = rd32(E1000_EECD);
 384
 385         /* Interrupt */
 386         /* Reading EICS for EICR because they read the
 387          * same but EICS does not clear on read */
 388         regs_buff[13] = rd32(E1000_EICS);
 389         regs_buff[14] = rd32(E1000_EICS);
 390         regs_buff[15] = rd32(E1000_EIMS);
 391         regs_buff[16] = rd32(E1000_EIMC);
 392         regs_buff[17] = rd32(E1000_EIAC);
 393         regs_buff[18] = rd32(E1000_EIAM);
 394         /* Reading ICS for ICR because they read the
 395          * same but ICS does not clear on read */
 396         regs_buff[19] = rd32(E1000_ICS);
 397         regs_buff[20] = rd32(E1000_ICS);
 398         regs_buff[21] = rd32(E1000_IMS);
 399         regs_buff[22] = rd32(E1000_IMC);
 400         regs_buff[23] = rd32(E1000_IAC);
 401         regs_buff[24] = rd32(E1000_IAM);
 402         regs_buff[25] = rd32(E1000_IMIRVP);
 403
 404         /* Flow Control */
 405         regs_buff[26] = rd32(E1000_FCAL);
 406         regs_buff[27] = rd32(E1000_FCAH);
 407         regs_buff[28] = rd32(E1000_FCTTV);
 408         regs_buff[29] = rd32(E1000_FCRTL);
 409         regs_buff[30] = rd32(E1000_FCRTH);
 410         regs_buff[31] = rd32(E1000_FCRTV);
 411
 412         /* Receive */
 413         regs_buff[32] = rd32(E1000_RCTL);
 414         regs_buff[33] = rd32(E1000_RXCSUM);
 415         regs_buff[34] = rd32(E1000_RLPML);
 416         regs_buff[35] = rd32(E1000_RFCTL);
 417         regs_buff[36] = rd32(E1000_MRQC);
 418         regs_buff[37] = rd32(E1000_VT_CTL);
 419
 420         /* Transmit */
 421         regs_buff[38] = rd32(E1000_TCTL);
 422         regs_buff[39] = rd32(E1000_TCTL_EXT);
 423         regs_buff[40] = rd32(E1000_TIPG);
 424         regs_buff[41] = rd32(E1000_DTXCTL);
 425
 426         /* Wake Up */
 427         regs_buff[42] = rd32(E1000_WUC);
 428         regs_buff[43] = rd32(E1000_WUFC);
 429         regs_buff[44] = rd32(E1000_WUS);
 430         regs_buff[45] = rd32(E1000_IPAV);
 431         regs_buff[46] = rd32(E1000_WUPL);
 432
 433         /* MAC */
 434         regs_buff[47] = rd32(E1000_PCS_CFG0);
 435         regs_buff[48] = rd32(E1000_PCS_LCTL);
 436         regs_buff[49] = rd32(E1000_PCS_LSTAT);
 437         regs_buff[50] = rd32(E1000_PCS_ANADV);
 438         regs_buff[51] = rd32(E1000_PCS_LPAB);
 439         regs_buff[52] = rd32(E1000_PCS_NPTX);
 440         regs_buff[53] = rd32(E1000_PCS_LPABNP);
 441
 442         /* Statistics */
 443         regs_buff[54] = adapter->stats.crcerrs;
 444         regs_buff[55] = adapter->stats.algnerrc;
 445         regs_buff[56] = adapter->stats.symerrs;
 446         regs_buff[57] = adapter->stats.rxerrc;
 447         regs_buff[58] = adapter->stats.mpc;
 448         regs_buff[59] = adapter->stats.scc;
 449         regs_buff[60] = adapter->stats.ecol;
 450         regs_buff[61] = adapter->stats.mcc;
 451         regs_buff[62] = adapter->stats.latecol;
 452         regs_buff[63] = adapter->stats.colc;
 453         regs_buff[64] = adapter->stats.dc;
 454         regs_buff[65] = adapter->stats.tncrs;
 455         regs_buff[66] = adapter->stats.sec;
 456         regs_buff[67] = adapter->stats.htdpmc;
 457         regs_buff[68] = adapter->stats.rlec;
 458         regs_buff[69] = adapter->stats.xonrxc;
 459         regs_buff[70] = adapter->stats.xontxc;
 460         regs_buff[71] = adapter->stats.xoffrxc;
 461         regs_buff[72] = adapter->stats.xofftxc;
 462         regs_buff[73] = adapter->stats.fcruc;
 463         regs_buff[74] = adapter->stats.prc64;
 464         regs_buff[75] = adapter->stats.prc127;
 465         regs_buff[76] = adapter->stats.prc255;
 466         regs_buff[77] = adapter->stats.prc511;
 467         regs_buff[78] = adapter->stats.prc1023;
 468         regs_buff[79] = adapter->stats.prc1522;
 469         regs_buff[80] = adapter->stats.gprc;
 470         regs_buff[81] = adapter->stats.bprc;
 471         regs_buff[82] = adapter->stats.mprc;
 472         regs_buff[83] = adapter->stats.gptc;
 473         regs_buff[84] = adapter->stats.gorc;
 474         regs_buff[86] = adapter->stats.gotc;
 475         regs_buff[88] = adapter->stats.rnbc;
 476         regs_buff[89] = adapter->stats.ruc;
 477         regs_buff[90] = adapter->stats.rfc;
 478         regs_buff[91] = adapter->stats.roc;
 479         regs_buff[92] = adapter->stats.rjc;
 480         regs_buff[93] = adapter->stats.mgprc;
 481         regs_buff[94] = adapter->stats.mgpdc;
 482         regs_buff[95] = adapter->stats.mgptc;
 483         regs_buff[96] = adapter->stats.tor;
 484         regs_buff[98] = adapter->stats.tot;
 485         regs_buff[100] = adapter->stats.tpr;
 486         regs_buff[101] = adapter->stats.tpt;
 487         regs_buff[102] = adapter->stats.ptc64;
 488         regs_buff[103] = adapter->stats.ptc127;
 489         regs_buff[104] = adapter->stats.ptc255;
 490         regs_buff[105] = adapter->stats.ptc511;
 491         regs_buff[106] = adapter->stats.ptc1023;
 492         regs_buff[107] = adapter->stats.ptc1522;
 493         regs_buff[108] = adapter->stats.mptc;
 494         regs_buff[109] = adapter->stats.bptc;
 495         regs_buff[110] = adapter->stats.tsctc;
 496         regs_buff[111] = adapter->stats.iac;
 497         regs_buff[112] = adapter->stats.rpthc;
 498         regs_buff[113] = adapter->stats.hgptc;
 499         regs_buff[114] = adapter->stats.hgorc;
 500         regs_buff[116] = adapter->stats.hgotc;
 501         regs_buff[118] = adapter->stats.lenerrs;
 502         regs_buff[119] = adapter->stats.scvpc;
 503         regs_buff[120] = adapter->stats.hrmpc;
 504
 505         for (i = 0; i < 4; i++)
 506                 regs_buff[121 + i] = rd32(E1000_SRRCTL(i));
 507         for (i = 0; i < 4; i++)
 508                 regs_buff[125 + i] = rd32(E1000_PSRTYPE(i));
 509         for (i = 0; i < 4; i++)
 510                 regs_buff[129 + i] = rd32(E1000_RDBAL(i));
 511         for (i = 0; i < 4; i++)
 512                 regs_buff[133 + i] = rd32(E1000_RDBAH(i));
 513         for (i = 0; i < 4; i++)
 514                 regs_buff[137 + i] = rd32(E1000_RDLEN(i));
 515         for (i = 0; i < 4; i++)
 516                 regs_buff[141 + i] = rd32(E1000_RDH(i));
 517         for (i = 0; i < 4; i++)
 518                 regs_buff[145 + i] = rd32(E1000_RDT(i));
 519         for (i = 0; i < 4; i++)
 520                 regs_buff[149 + i] = rd32(E1000_RXDCTL(i));
 521
 522         for (i = 0; i < 10; i++)
 523                 regs_buff[153 + i] = rd32(E1000_EITR(i));
 524         for (i = 0; i < 8; i++)
 525                 regs_buff[163 + i] = rd32(E1000_IMIR(i));
 526         for (i = 0; i < 8; i++)
 527                 regs_buff[171 + i] = rd32(E1000_IMIREXT(i));
 528         for (i = 0; i < 16; i++)
 529                 regs_buff[179 + i] = rd32(E1000_RAL(i));
 530         for (i = 0; i < 16; i++)
 531                 regs_buff[195 + i] = rd32(E1000_RAH(i));
 532
 533         for (i = 0; i < 4; i++)
 534                 regs_buff[211 + i] = rd32(E1000_TDBAL(i));
 535         for (i = 0; i < 4; i++)
 536                 regs_buff[215 + i] = rd32(E1000_TDBAH(i));
 537         for (i = 0; i < 4; i++)
 538                 regs_buff[219 + i] = rd32(E1000_TDLEN(i));
 539         for (i = 0; i < 4; i++)
 540                 regs_buff[223 + i] = rd32(E1000_TDH(i));
 541         for (i = 0; i < 4; i++)
 542                 regs_buff[227 + i] = rd32(E1000_TDT(i));
 543         for (i = 0; i < 4; i++)
 544                 regs_buff[231 + i] = rd32(E1000_TXDCTL(i));
 545         for (i = 0; i < 4; i++)
 546                 regs_buff[235 + i] = rd32(E1000_TDWBAL(i));
 547         for (i = 0; i < 4; i++)
 548                 regs_buff[239 + i] = rd32(E1000_TDWBAH(i));
 549         for (i = 0; i < 4; i++)
 550                 regs_buff[243 + i] = rd32(E1000_DCA_TXCTRL(i));
 551
 552         for (i = 0; i < 4; i++)
 553                 regs_buff[247 + i] = rd32(E1000_IP4AT_REG(i));
 554         for (i = 0; i < 4; i++)
 555                 regs_buff[251 + i] = rd32(E1000_IP6AT_REG(i));
 556         for (i = 0; i < 32; i++)
 557                 regs_buff[255 + i] = rd32(E1000_WUPM_REG(i));
 558         for (i = 0; i < 128; i++)
 559                 regs_buff[287 + i] = rd32(E1000_FFMT_REG(i));
 560         for (i = 0; i < 128; i++)
 561                 regs_buff[415 + i] = rd32(E1000_FFVT_REG(i));
 562         for (i = 0; i < 4; i++)
 563                 regs_buff[543 + i] = rd32(E1000_FFLT_REG(i));
 564
 565         regs_buff[547] = rd32(E1000_TDFH);
 566         regs_buff[548] = rd32(E1000_TDFT);
 567         regs_buff[549] = rd32(E1000_TDFHS);
 568         regs_buff[550] = rd32(E1000_TDFPC);
 569
 570 }
 571
 572 static int igb_get_eeprom_len(struct net_device *netdev)
 573 {
 574         struct igb_adapter *adapter = netdev_priv(netdev);
 575         return adapter->hw.nvm.word_size * 2;
 576 }
 577
 578 static int igb_get_eeprom(struct net_device *netdev,
 579                           struct ethtool_eeprom *eeprom, u8 *bytes)
 580 {
 581         struct igb_adapter *adapter = netdev_priv(netdev);
 582         struct e1000_hw *hw = &adapter->hw;
 583         u16 *eeprom_buff;
 584         int first_word, last_word;
 585         int ret_val = 0;
 586         u16 i;
 587
 588         if (eeprom->len == 0)
 589                 return -EINVAL;
 590
 591         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 592
 593         first_word = eeprom->offset >> 1;
 594         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 595
 596         eeprom_buff = kmalloc(sizeof(u16) *
 597                         (last_word - first_word + 1), GFP_KERNEL);
 598         if (!eeprom_buff)
 599                 return -ENOMEM;
 600
 601         if (hw->nvm.type == e1000_nvm_eeprom_spi)
 602                 ret_val = hw->nvm.ops.read(hw, first_word,
 603                                             last_word - first_word + 1,
 604                                             eeprom_buff);
 605         else {
 606                 for (i = 0; i < last_word - first_word + 1; i++) {
 607                         ret_val = hw->nvm.ops.read(hw, first_word + i, 1,
 608                                                     &eeprom_buff[i]);
 609                         if (ret_val)
 610                                 break;
 611                 }
 612         }
 613
 614         /* Device's eeprom is always little-endian, word addressable */
 615         for (i = 0; i < last_word - first_word + 1; i++)
 616                 le16_to_cpus(&eeprom_buff[i]);
 617
 618         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
 619                         eeprom->len);
 620         kfree(eeprom_buff);
 621
 622         return ret_val;
 623 }
 624
 625 static int igb_set_eeprom(struct net_device *netdev,
 626                           struct ethtool_eeprom *eeprom, u8 *bytes)
 627 {
 628         struct igb_adapter *adapter = netdev_priv(netdev);
 629         struct e1000_hw *hw = &adapter->hw;
 630         u16 *eeprom_buff;
 631         void *ptr;
 632         int max_len, first_word, last_word, ret_val = 0;
 633         u16 i;
 634
 635         if (eeprom->len == 0)
 636                 return -EOPNOTSUPP;
 637
 638         if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
 639                 return -EFAULT;
 640
 641         max_len = hw->nvm.word_size * 2;
 642
 643         first_word = eeprom->offset >> 1;
 644         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 645         eeprom_buff = kmalloc(max_len, GFP_KERNEL);
 646         if (!eeprom_buff)
 647                 return -ENOMEM;
 648
 649         ptr = (void *)eeprom_buff;
 650
 651         if (eeprom->offset & 1) {
 652                 /* need read/modify/write of first changed EEPROM word */
 653                 /* only the second byte of the word is being modified */
 654                 ret_val = hw->nvm.ops.read(hw, first_word, 1,
 655                                             &eeprom_buff[0]);
 656                 ptr++;
 657         }
 658         if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
 659                 /* need read/modify/write of last changed EEPROM word */
 660                 /* only the first byte of the word is being modified */
 661                 ret_val = hw->nvm.ops.read(hw, last_word, 1,
 662                                    &eeprom_buff[last_word - first_word]);
 663         }
 664
 665         /* Device's eeprom is always little-endian, word addressable */
 666         for (i = 0; i < last_word - first_word + 1; i++)
 667                 le16_to_cpus(&eeprom_buff[i]);
 668
 669         memcpy(ptr, bytes, eeprom->len);
 670
 671         for (i = 0; i < last_word - first_word + 1; i++)
 672                 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
 673
 674         ret_val = hw->nvm.ops.write(hw, first_word,
 675                                      last_word - first_word + 1, eeprom_buff);
 676
 677         /* Update the checksum over the first part of the EEPROM if needed
 678          * and flush shadow RAM for 82573 controllers */
 679         if ((ret_val == 0) && ((first_word <= NVM_CHECKSUM_REG)))
 680                 igb_update_nvm_checksum(hw);
 681
 682         kfree(eeprom_buff);
 683         return ret_val;
 684 }
 685
 686 static void igb_get_drvinfo(struct net_device *netdev,
 687                             struct ethtool_drvinfo *drvinfo)
 688 {
 689         struct igb_adapter *adapter = netdev_priv(netdev);
 690         char firmware_version[32];
 691         u16 eeprom_data;
 692
 693         strncpy(drvinfo->driver,  igb_driver_name, 32);
 694         strncpy(drvinfo->version, igb_driver_version, 32);
 695
 696         /* EEPROM image version # is reported as firmware version # for
 697          * 82575 controllers */
 698         adapter->hw.nvm.ops.read(&adapter->hw, 5, 1, &eeprom_data);
 699         sprintf(firmware_version, "%d.%d-%d",
 700                 (eeprom_data & 0xF000) >> 12,
 701                 (eeprom_data & 0x0FF0) >> 4,
 702                 eeprom_data & 0x000F);
 703
 704         strncpy(drvinfo->fw_version, firmware_version, 32);
 705         strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
 706         drvinfo->n_stats = IGB_STATS_LEN;
 707         drvinfo->testinfo_len = IGB_TEST_LEN;
 708         drvinfo->regdump_len = igb_get_regs_len(netdev);
 709         drvinfo->eedump_len = igb_get_eeprom_len(netdev);
 710 }
 711
 712 static void igb_get_ringparam(struct net_device *netdev,
 713                               struct ethtool_ringparam *ring)
 714 {
 715         struct igb_adapter *adapter = netdev_priv(netdev);
 716
 717         ring->rx_max_pending = IGB_MAX_RXD;
 718         ring->tx_max_pending = IGB_MAX_TXD;
 719         ring->rx_mini_max_pending = 0;
 720         ring->rx_jumbo_max_pending = 0;
 721         ring->rx_pending = adapter->rx_ring_count;
 722         ring->tx_pending = adapter->tx_ring_count;
 723         ring->rx_mini_pending = 0;
 724         ring->rx_jumbo_pending = 0;
 725 }
 726
 727 static int igb_set_ringparam(struct net_device *netdev,
 728                              struct ethtool_ringparam *ring)
 729 {
 730         struct igb_adapter *adapter = netdev_priv(netdev);
 731         struct igb_ring *temp_ring;
 732         int i, err = 0;
 733         u32 new_rx_count, new_tx_count;
 734
 735         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 736                 return -EINVAL;
 737
 738         new_rx_count = max(ring->rx_pending, (u32)IGB_MIN_RXD);
 739         new_rx_count = min(new_rx_count, (u32)IGB_MAX_RXD);
 740         new_rx_count = ALIGN(new_rx_count, REQ_RX_DESCRIPTOR_MULTIPLE);
 741
 742         new_tx_count = max(ring->tx_pending, (u32)IGB_MIN_TXD);
 743         new_tx_count = min(new_tx_count, (u32)IGB_MAX_TXD);
 744         new_tx_count = ALIGN(new_tx_count, REQ_TX_DESCRIPTOR_MULTIPLE);
 745
 746         if ((new_tx_count == adapter->tx_ring_count) &&
 747             (new_rx_count == adapter->rx_ring_count)) {
 748                 /* nothing to do */
 749                 return 0;
 750         }
 751
 752         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 753                 msleep(1);
 754
 755         if (!netif_running(adapter->netdev)) {
 756                 for (i = 0; i < adapter->num_tx_queues; i++)
 757                         adapter->tx_ring[i].count = new_tx_count;
 758                 for (i = 0; i < adapter->num_rx_queues; i++)
 759                         adapter->rx_ring[i].count = new_rx_count;
 760                 adapter->tx_ring_count = new_tx_count;
 761                 adapter->rx_ring_count = new_rx_count;
 762                 goto clear_reset;
 763         }
 764
 765         if (adapter->num_tx_queues > adapter->num_rx_queues)
 766                 temp_ring = vmalloc(adapter->num_tx_queues * sizeof(struct igb_ring));
 767         else
 768                 temp_ring = vmalloc(adapter->num_rx_queues * sizeof(struct igb_ring));
 769
 770         if (!temp_ring) {
 771                 err = -ENOMEM;
 772                 goto clear_reset;
 773         }
 774
 775         igb_down(adapter);
 776
 777         /*
 778          * We can't just free everything and then setup again,
 779          * because the ISRs in MSI-X mode get passed pointers
 780          * to the tx and rx ring structs.
 781          */
 782         if (new_tx_count != adapter->tx_ring_count) {
 783                 memcpy(temp_ring, adapter->tx_ring,
 784                        adapter->num_tx_queues * sizeof(struct igb_ring));
 785
 786                 for (i = 0; i < adapter->num_tx_queues; i++) {
 787                         temp_ring[i].count = new_tx_count;
 788                         err = igb_setup_tx_resources(&temp_ring[i]);
 789                         if (err) {
 790                                 while (i) {
 791                                         i--;
 792                                         igb_free_tx_resources(&temp_ring[i]);
 793                                 }
 794                                 goto err_setup;
 795                         }
 796                 }
 797
 798                 for (i = 0; i < adapter->num_tx_queues; i++)
 799                         igb_free_tx_resources(&adapter->tx_ring[i]);
 800
 801                 memcpy(adapter->tx_ring, temp_ring,
 802                        adapter->num_tx_queues * sizeof(struct igb_ring));
 803
 804                 adapter->tx_ring_count = new_tx_count;
 805         }
 806
 807         if (new_rx_count != adapter->rx_ring->count) {
 808                 memcpy(temp_ring, adapter->rx_ring,
 809                        adapter->num_rx_queues * sizeof(struct igb_ring));
 810
 811                 for (i = 0; i < adapter->num_rx_queues; i++) {
 812                         temp_ring[i].count = new_rx_count;
 813                         err = igb_setup_rx_resources(&temp_ring[i]);
 814                         if (err) {
 815                                 while (i) {
 816                                         i--;
 817                                         igb_free_rx_resources(&temp_ring[i]);
 818                                 }
 819                                 goto err_setup;
 820                         }
 821
 822                 }
 823
 824                 for (i = 0; i < adapter->num_rx_queues; i++)
 825                         igb_free_rx_resources(&adapter->rx_ring[i]);
 826
 827                 memcpy(adapter->rx_ring, temp_ring,
 828                        adapter->num_rx_queues * sizeof(struct igb_ring));
 829
 830                 adapter->rx_ring_count = new_rx_count;
 831         }
 832 err_setup:
 833         igb_up(adapter);
 834         vfree(temp_ring);
 835 clear_reset:
 836         clear_bit(__IGB_RESETTING, &adapter->state);
 837         return err;
 838 }
 839
 840 /* ethtool register test data */
 841 struct igb_reg_test {
 842         u16 reg;
 843         u16 reg_offset;
 844         u16 array_len;
 845         u16 test_type;
 846         u32 mask;
 847         u32 write;
 848 };
 849
 850 /* In the hardware, registers are laid out either singly, in arrays
 851  * spaced 0x100 bytes apart, or in contiguous tables.  We assume
 852  * most tests take place on arrays or single registers (handled
 853  * as a single-element array) and special-case the tables.
 854  * Table tests are always pattern tests.
 855  *
 856  * We also make provision for some required setup steps by specifying
 857  * registers to be written without any read-back testing.
 858  */
 859
 860 #define PATTERN_TEST    1
 861 #define SET_READ_TEST   2
 862 #define WRITE_NO_TEST   3
 863 #define TABLE32_TEST    4
 864 #define TABLE64_TEST_LO 5
 865 #define TABLE64_TEST_HI 6
 866
 867 /* 82576 reg test */
 868 static struct igb_reg_test reg_test_82576[] = {
 869         { E1000_FCAL,      0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 870         { E1000_FCAH,      0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 871         { E1000_FCT,       0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 872         { E1000_VET,       0x100, 1,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 873         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 874         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 875         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 876         { E1000_RDBAL(4),  0x40, 12, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 877         { E1000_RDBAH(4),  0x40, 12, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 878         { E1000_RDLEN(4),  0x40, 12, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 879         /* Enable all RX queues before testing. */
 880         { E1000_RXDCTL(0), 0x100, 4,  WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE },
 881         { E1000_RXDCTL(4), 0x40, 12,  WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE },
 882         /* RDH is read-only for 82576, only test RDT. */
 883         { E1000_RDT(0),    0x100, 4,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 884         { E1000_RDT(4),    0x40, 12,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 885         { E1000_RXDCTL(0), 0x100, 4,  WRITE_NO_TEST, 0, 0 },
 886         { E1000_RXDCTL(4), 0x40, 12,  WRITE_NO_TEST, 0, 0 },
 887         { E1000_FCRTH,     0x100, 1,  PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
 888         { E1000_FCTTV,     0x100, 1,  PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 889         { E1000_TIPG,      0x100, 1,  PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
 890         { E1000_TDBAL(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 891         { E1000_TDBAH(0),  0x100, 4,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 892         { E1000_TDLEN(0),  0x100, 4,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 893         { E1000_TDBAL(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 894         { E1000_TDBAH(4),  0x40, 12,  PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 895         { E1000_TDLEN(4),  0x40, 12,  PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
 896         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 897         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
 898         { E1000_RCTL,      0x100, 1,  SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
 899         { E1000_TCTL,      0x100, 1,  SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 900         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
 901         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
 902         { E1000_RA2,       0, 8, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
 903         { E1000_RA2,       0, 8, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
 904         { E1000_MTA,       0, 128,TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 905         { 0, 0, 0, 0 }
 906 };
 907
 908 /* 82575 register test */
 909 static struct igb_reg_test reg_test_82575[] = {
 910         { E1000_FCAL,      0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 911         { E1000_FCAH,      0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 912         { E1000_FCT,       0x100, 1, PATTERN_TEST, 0x0000FFFF, 0xFFFFFFFF },
 913         { E1000_VET,       0x100, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 914         { E1000_RDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 915         { E1000_RDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 916         { E1000_RDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
 917         /* Enable all four RX queues before testing. */
 918         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, E1000_RXDCTL_QUEUE_ENABLE },
 919         /* RDH is read-only for 82575, only test RDT. */
 920         { E1000_RDT(0),    0x100, 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 921         { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST, 0, 0 },
 922         { E1000_FCRTH,     0x100, 1, PATTERN_TEST, 0x0000FFF0, 0x0000FFF0 },
 923         { E1000_FCTTV,     0x100, 1, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
 924         { E1000_TIPG,      0x100, 1, PATTERN_TEST, 0x3FFFFFFF, 0x3FFFFFFF },
 925         { E1000_TDBAL(0),  0x100, 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
 926         { E1000_TDBAH(0),  0x100, 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 927         { E1000_TDLEN(0),  0x100, 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
 928         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 929         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0x003FFFFB },
 930         { E1000_RCTL,      0x100, 1, SET_READ_TEST, 0x04CFB3FE, 0xFFFFFFFF },
 931         { E1000_TCTL,      0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
 932         { E1000_TXCW,      0x100, 1, PATTERN_TEST, 0xC000FFFF, 0x0000FFFF },
 933         { E1000_RA,        0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
 934         { E1000_RA,        0, 16, TABLE64_TEST_HI, 0x800FFFFF, 0xFFFFFFFF },
 935         { E1000_MTA,       0, 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
 936         { 0, 0, 0, 0 }
 937 };
 938
 939 static bool reg_pattern_test(struct igb_adapter *adapter, u64 *data,
 940                              int reg, u32 mask, u32 write)
 941 {
 942         struct e1000_hw *hw = &adapter->hw;
 943         u32 pat, val;
 944         u32 _test[] =
 945                 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
 946         for (pat = 0; pat < ARRAY_SIZE(_test); pat++) {
 947                 wr32(reg, (_test[pat] & write));
 948                 val = rd32(reg);
 949                 if (val != (_test[pat] & write & mask)) {
 950                         dev_err(&adapter->pdev->dev, "pattern test reg %04X "
 951                                 "failed: got 0x%08X expected 0x%08X\n",
 952                                 reg, val, (_test[pat] & write & mask));
 953                         *data = reg;
 954                         return 1;
 955                 }
 956         }
 957         return 0;
 958 }
 959
 960 static bool reg_set_and_check(struct igb_adapter *adapter, u64 *data,
 961                               int reg, u32 mask, u32 write)
 962 {
 963         struct e1000_hw *hw = &adapter->hw;
 964         u32 val;
 965         wr32(reg, write & mask);
 966         val = rd32(reg);
 967         if ((write & mask) != (val & mask)) {
 968                 dev_err(&adapter->pdev->dev, "set/check reg %04X test failed:"
 969                         " got 0x%08X expected 0x%08X\n", reg,
 970                         (val & mask), (write & mask));
 971                 *data = reg;
 972                 return 1;
 973         }
 974         return 0;
 975 }
 976
 977 #define REG_PATTERN_TEST(reg, mask, write) \
 978         do { \
 979                 if (reg_pattern_test(adapter, data, reg, mask, write)) \
 980                         return 1; \
 981         } while (0)
 982
 983 #define REG_SET_AND_CHECK(reg, mask, write) \
 984         do { \
 985                 if (reg_set_and_check(adapter, data, reg, mask, write)) \
 986                         return 1; \
 987         } while (0)
 988
 989 static int igb_reg_test(struct igb_adapter *adapter, u64 *data)
 990 {
 991         struct e1000_hw *hw = &adapter->hw;
 992         struct igb_reg_test *test;
 993         u32 value, before, after;
 994         u32 i, toggle;
 995
 996         toggle = 0x7FFFF3FF;
 997
 998         switch (adapter->hw.mac.type) {
 999         case e1000_82576:
1000                 test = reg_test_82576;
1001                 break;
1002         default:
1003                 test = reg_test_82575;
1004                 break;
1005         }
1006
1007         /* Because the status register is such a special case,
1008          * we handle it separately from the rest of the register
1009          * tests.  Some bits are read-only, some toggle, and some
1010          * are writable on newer MACs.
1011          */
1012         before = rd32(E1000_STATUS);
1013         value = (rd32(E1000_STATUS) & toggle);
1014         wr32(E1000_STATUS, toggle);
1015         after = rd32(E1000_STATUS) & toggle;
1016         if (value != after) {
1017                 dev_err(&adapter->pdev->dev, "failed STATUS register test "
1018                         "got: 0x%08X expected: 0x%08X\n", after, value);
1019                 *data = 1;
1020                 return 1;
1021         }
1022         /* restore previous status */
1023         wr32(E1000_STATUS, before);
1024
1025         /* Perform the remainder of the register test, looping through
1026          * the test table until we either fail or reach the null entry.
1027          */
1028         while (test->reg) {
1029                 for (i = 0; i < test->array_len; i++) {
1030                         switch (test->test_type) {
1031                         case PATTERN_TEST:
1032                                 REG_PATTERN_TEST(test->reg +
1033                                                 (i * test->reg_offset),
1034                                                 test->mask,
1035                                                 test->write);
1036                                 break;
1037                         case SET_READ_TEST:
1038                                 REG_SET_AND_CHECK(test->reg +
1039                                                 (i * test->reg_offset),
1040                                                 test->mask,
1041                                                 test->write);
1042                                 break;
1043                         case WRITE_NO_TEST:
1044                                 writel(test->write,
1045                                     (adapter->hw.hw_addr + test->reg)
1046                                         + (i * test->reg_offset));
1047                                 break;
1048                         case TABLE32_TEST:
1049                                 REG_PATTERN_TEST(test->reg + (i * 4),
1050                                                 test->mask,
1051                                                 test->write);
1052                                 break;
1053                         case TABLE64_TEST_LO:
1054                                 REG_PATTERN_TEST(test->reg + (i * 8),
1055                                                 test->mask,
1056                                                 test->write);
1057                                 break;
1058                         case TABLE64_TEST_HI:
1059                                 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1060                                                 test->mask,
1061                                                 test->write);
1062                                 break;
1063                         }
1064                 }
1065                 test++;
1066         }
1067
1068         *data = 0;
1069         return 0;
1070 }
1071
1072 static int igb_eeprom_test(struct igb_adapter *adapter, u64 *data)
1073 {
1074         u16 temp;
1075         u16 checksum = 0;
1076         u16 i;
1077
1078         *data = 0;
1079         /* Read and add up the contents of the EEPROM */
1080         for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {
1081                 if ((adapter->hw.nvm.ops.read(&adapter->hw, i, 1, &temp))
1082                     < 0) {
1083                         *data = 1;
1084                         break;
1085                 }
1086                 checksum += temp;
1087         }
1088
1089         /* If Checksum is not Correct return error else test passed */
1090         if ((checksum != (u16) NVM_SUM) && !(*data))
1091                 *data = 2;
1092
1093         return *data;
1094 }
1095
1096 static irqreturn_t igb_test_intr(int irq, void *data)
1097 {
1098         struct net_device *netdev = (struct net_device *) data;
1099         struct igb_adapter *adapter = netdev_priv(netdev);
1100         struct e1000_hw *hw = &adapter->hw;
1101
1102         adapter->test_icr |= rd32(E1000_ICR);
1103
1104         return IRQ_HANDLED;
1105 }
1106
1107 static int igb_intr_test(struct igb_adapter *adapter, u64 *data)
1108 {
1109         struct e1000_hw *hw = &adapter->hw;
1110         struct net_device *netdev = adapter->netdev;
1111         u32 mask, ics_mask, i = 0, shared_int = true;
1112         u32 irq = adapter->pdev->irq;
1113
1114         *data = 0;
1115
1116         /* Hook up test interrupt handler just for this test */
1117         if (adapter->msix_entries) {
1118                 if (request_irq(adapter->msix_entries[0].vector,
1119                                 &igb_test_intr, 0, netdev->name, adapter)) {
1120                         *data = 1;
1121                         return -1;
1122                 }
1123
1124         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
1125                 shared_int = false;
1126                 if (request_irq(irq,
1127                                 &igb_test_intr, 0, netdev->name, adapter)) {
1128                         *data = 1;
1129                         return -1;
1130                 }
1131         } else if (!request_irq(irq, &igb_test_intr, IRQF_PROBE_SHARED,
1132                                 netdev->name, adapter)) {
1133                 shared_int = false;
1134         } else if (request_irq(irq, &igb_test_intr, IRQF_SHARED,
1135                  netdev->name, adapter)) {
1136                 *data = 1;
1137                 return -1;
1138         }
1139         dev_info(&adapter->pdev->dev, "testing %s interrupt\n",
1140                 (shared_int ? "shared" : "unshared"));
1141         /* Disable all the interrupts */
1142         wr32(E1000_IMC, ~0);
1143         msleep(10);
1144
1145         /* Define all writable bits for ICS */
1146         switch (hw->mac.type) {
1147         case e1000_82575:
1148                 ics_mask = 0x37F47EDD;
1149                 break;
1150         case e1000_82576:
1151                 ics_mask = 0x77D4FBFD;
1152                 break;
1153         default:
1154                 ics_mask = 0x7FFFFFFF;
1155                 break;
1156         }
1157
1158         /* Test each interrupt */
1159         for (; i < 31; i++) {
1160                 /* Interrupt to test */
1161                 mask = 1 << i;
1162
1163                 if (!(mask & ics_mask))
1164                         continue;
1165
1166                 if (!shared_int) {
1167                         /* Disable the interrupt to be reported in
1168                          * the cause register and then force the same
1169                          * interrupt and see if one gets posted.  If
1170                          * an interrupt was posted to the bus, the
1171                          * test failed.
1172                          */
1173                         adapter->test_icr = 0;
1174
1175                         /* Flush any pending interrupts */
1176                         wr32(E1000_ICR, ~0);
1177
1178                         wr32(E1000_IMC, mask);
1179                         wr32(E1000_ICS, mask);
1180                         msleep(10);
1181
1182                         if (adapter->test_icr & mask) {
1183                                 *data = 3;
1184                                 break;
1185                         }
1186                 }
1187
1188                 /* Enable the interrupt to be reported in
1189                  * the cause register and then force the same
1190                  * interrupt and see if one gets posted.  If
1191                  * an interrupt was not posted to the bus, the
1192                  * test failed.
1193                  */
1194                 adapter->test_icr = 0;
1195
1196                 /* Flush any pending interrupts */
1197                 wr32(E1000_ICR, ~0);
1198
1199                 wr32(E1000_IMS, mask);
1200                 wr32(E1000_ICS, mask);
1201                 msleep(10);
1202
1203                 if (!(adapter->test_icr & mask)) {
1204                         *data = 4;
1205                         break;
1206                 }
1207
1208                 if (!shared_int) {
1209                         /* Disable the other interrupts to be reported in
1210                          * the cause register and then force the other
1211                          * interrupts and see if any get posted.  If
1212                          * an interrupt was posted to the bus, the
1213                          * test failed.
1214                          */
1215                         adapter->test_icr = 0;
1216
1217                         /* Flush any pending interrupts */
1218                         wr32(E1000_ICR, ~0);
1219
1220                         wr32(E1000_IMC, ~mask);
1221                         wr32(E1000_ICS, ~mask);
1222                         msleep(10);
1223
1224                         if (adapter->test_icr & mask) {
1225                                 *data = 5;
1226                                 break;
1227                         }
1228                 }
1229         }
1230
1231         /* Disable all the interrupts */
1232         wr32(E1000_IMC, ~0);
1233         msleep(10);
1234
1235         /* Unhook test interrupt handler */
1236         if (adapter->msix_entries)
1237                 free_irq(adapter->msix_entries[0].vector, adapter);
1238         else
1239                 free_irq(irq, adapter);
1240
1241         return *data;
1242 }
1243
1244 static void igb_free_desc_rings(struct igb_adapter *adapter)
1245 {
1246         igb_free_tx_resources(&adapter->test_tx_ring);
1247         igb_free_rx_resources(&adapter->test_rx_ring);
1248 }
1249
1250 static int igb_setup_desc_rings(struct igb_adapter *adapter)
1251 {
1252         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1253         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1254         struct e1000_hw *hw = &adapter->hw;
1255         int ret_val;
1256
1257         /* Setup Tx descriptor ring and Tx buffers */
1258         tx_ring->count = IGB_DEFAULT_TXD;
1259         tx_ring->pdev = adapter->pdev;
1260         tx_ring->netdev = adapter->netdev;
1261         tx_ring->reg_idx = adapter->vfs_allocated_count;
1262
1263         if (igb_setup_tx_resources(tx_ring)) {
1264                 ret_val = 1;
1265                 goto err_nomem;
1266         }
1267
1268         igb_setup_tctl(adapter);
1269         igb_configure_tx_ring(adapter, tx_ring);
1270
1271         /* Setup Rx descriptor ring and Rx buffers */
1272         rx_ring->count = IGB_DEFAULT_RXD;
1273         rx_ring->pdev = adapter->pdev;
1274         rx_ring->netdev = adapter->netdev;
1275         rx_ring->rx_buffer_len = IGB_RXBUFFER_2048;
1276         rx_ring->reg_idx = adapter->vfs_allocated_count;
1277
1278         if (igb_setup_rx_resources(rx_ring)) {
1279                 ret_val = 3;
1280                 goto err_nomem;
1281         }
1282
1283         /* set the default queue to queue 0 of PF */
1284         wr32(E1000_MRQC, adapter->vfs_allocated_count << 3);
1285
1286         /* enable receive ring */
1287         igb_setup_rctl(adapter);
1288         igb_configure_rx_ring(adapter, rx_ring);
1289
1290         igb_alloc_rx_buffers_adv(rx_ring, igb_desc_unused(rx_ring));
1291
1292         return 0;
1293
1294 err_nomem:
1295         igb_free_desc_rings(adapter);
1296         return ret_val;
1297 }
1298
1299 static void igb_phy_disable_receiver(struct igb_adapter *adapter)
1300 {
1301         struct e1000_hw *hw = &adapter->hw;
1302
1303         /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1304         igb_write_phy_reg(hw, 29, 0x001F);
1305         igb_write_phy_reg(hw, 30, 0x8FFC);
1306         igb_write_phy_reg(hw, 29, 0x001A);
1307         igb_write_phy_reg(hw, 30, 0x8FF0);
1308 }
1309
1310 static int igb_integrated_phy_loopback(struct igb_adapter *adapter)
1311 {
1312         struct e1000_hw *hw = &adapter->hw;
1313         u32 ctrl_reg = 0;
1314
1315         hw->mac.autoneg = false;
1316
1317         if (hw->phy.type == e1000_phy_m88) {
1318                 /* Auto-MDI/MDIX Off */
1319                 igb_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, 0x0808);
1320                 /* reset to update Auto-MDI/MDIX */
1321                 igb_write_phy_reg(hw, PHY_CONTROL, 0x9140);
1322                 /* autoneg off */
1323                 igb_write_phy_reg(hw, PHY_CONTROL, 0x8140);
1324         }
1325
1326         ctrl_reg = rd32(E1000_CTRL);
1327
1328         /* force 1000, set loopback */
1329         igb_write_phy_reg(hw, PHY_CONTROL, 0x4140);
1330
1331         /* Now set up the MAC to the same speed/duplex as the PHY. */
1332         ctrl_reg = rd32(E1000_CTRL);
1333         ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1334         ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1335                      E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1336                      E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1337                      E1000_CTRL_FD |     /* Force Duplex to FULL */
1338                      E1000_CTRL_SLU);    /* Set link up enable bit */
1339
1340         if (hw->phy.type == e1000_phy_m88)
1341                 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1342
1343         wr32(E1000_CTRL, ctrl_reg);
1344
1345         /* Disable the receiver on the PHY so when a cable is plugged in, the
1346          * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1347          */
1348         if (hw->phy.type == e1000_phy_m88)
1349                 igb_phy_disable_receiver(adapter);
1350
1351         udelay(500);
1352
1353         return 0;
1354 }
1355
1356 static int igb_set_phy_loopback(struct igb_adapter *adapter)
1357 {
1358         return igb_integrated_phy_loopback(adapter);
1359 }
1360
1361 static int igb_setup_loopback_test(struct igb_adapter *adapter)
1362 {
1363         struct e1000_hw *hw = &adapter->hw;
1364         u32 reg;
1365
1366         if (hw->phy.media_type == e1000_media_type_internal_serdes) {
1367                 reg = rd32(E1000_RCTL);
1368                 reg |= E1000_RCTL_LBM_TCVR;
1369                 wr32(E1000_RCTL, reg);
1370
1371                 wr32(E1000_SCTL, E1000_ENABLE_SERDES_LOOPBACK);
1372
1373                 reg = rd32(E1000_CTRL);
1374                 reg &= ~(E1000_CTRL_RFCE |
1375                          E1000_CTRL_TFCE |
1376                          E1000_CTRL_LRST);
1377                 reg |= E1000_CTRL_SLU |
1378                        E1000_CTRL_FD;
1379                 wr32(E1000_CTRL, reg);
1380
1381                 /* Unset switch control to serdes energy detect */
1382                 reg = rd32(E1000_CONNSW);
1383                 reg &= ~E1000_CONNSW_ENRGSRC;
1384                 wr32(E1000_CONNSW, reg);
1385
1386                 /* Set PCS register for forced speed */
1387                 reg = rd32(E1000_PCS_LCTL);
1388                 reg &= ~E1000_PCS_LCTL_AN_ENABLE;     /* Disable Autoneg*/
1389                 reg |= E1000_PCS_LCTL_FLV_LINK_UP |   /* Force link up */
1390                        E1000_PCS_LCTL_FSV_1000 |      /* Force 1000    */
1391                        E1000_PCS_LCTL_FDV_FULL |      /* SerDes Full duplex */
1392                        E1000_PCS_LCTL_FSD |           /* Force Speed */
1393                        E1000_PCS_LCTL_FORCE_LINK;     /* Force Link */
1394                 wr32(E1000_PCS_LCTL, reg);
1395
1396                 return 0;
1397         } else if (hw->phy.media_type == e1000_media_type_copper) {
1398                 return igb_set_phy_loopback(adapter);
1399         }
1400
1401         return 7;
1402 }
1403
1404 static void igb_loopback_cleanup(struct igb_adapter *adapter)
1405 {
1406         struct e1000_hw *hw = &adapter->hw;
1407         u32 rctl;
1408         u16 phy_reg;
1409
1410         rctl = rd32(E1000_RCTL);
1411         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1412         wr32(E1000_RCTL, rctl);
1413
1414         hw->mac.autoneg = true;
1415         igb_read_phy_reg(hw, PHY_CONTROL, &phy_reg);
1416         if (phy_reg & MII_CR_LOOPBACK) {
1417                 phy_reg &= ~MII_CR_LOOPBACK;
1418                 igb_write_phy_reg(hw, PHY_CONTROL, phy_reg);
1419                 igb_phy_sw_reset(hw);
1420         }
1421 }
1422
1423 static void igb_create_lbtest_frame(struct sk_buff *skb,
1424                                     unsigned int frame_size)
1425 {
1426         memset(skb->data, 0xFF, frame_size);
1427         frame_size &= ~1;
1428         memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1429         memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1430         memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1431 }
1432
1433 static int igb_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1434 {
1435         frame_size &= ~1;
1436         if (*(skb->data + 3) == 0xFF)
1437                 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1438                    (*(skb->data + frame_size / 2 + 12) == 0xAF))
1439                         return 0;
1440         return 13;
1441 }
1442
1443 static int igb_clean_test_rings(struct igb_ring *rx_ring,
1444                                 struct igb_ring *tx_ring,
1445                                 unsigned int size)
1446 {
1447         union e1000_adv_rx_desc *rx_desc;
1448         struct igb_buffer *buffer_info;
1449         int rx_ntc, tx_ntc, count = 0;
1450         u32 staterr;
1451
1452         /* initialize next to clean and descriptor values */
1453         rx_ntc = rx_ring->next_to_clean;
1454         tx_ntc = tx_ring->next_to_clean;
1455         rx_desc = E1000_RX_DESC_ADV(*rx_ring, rx_ntc);
1456         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1457
1458         while (staterr & E1000_RXD_STAT_DD) {
1459                 /* check rx buffer */
1460                 buffer_info = &rx_ring->buffer_info[rx_ntc];
1461
1462                 /* unmap rx buffer, will be remapped by alloc_rx_buffers */
1463                 pci_unmap_single(rx_ring->pdev,
1464                                  buffer_info->dma,
1465                                  rx_ring->rx_buffer_len,
1466                                  PCI_DMA_FROMDEVICE);
1467                 buffer_info->dma = 0;
1468
1469                 /* verify contents of skb */
1470                 if (!igb_check_lbtest_frame(buffer_info->skb, size))
1471                         count++;
1472
1473                 /* unmap buffer on tx side */
1474                 buffer_info = &tx_ring->buffer_info[tx_ntc];
1475                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
1476
1477                 /* increment rx/tx next to clean counters */
1478                 rx_ntc++;
1479                 if (rx_ntc == rx_ring->count)
1480                         rx_ntc = 0;
1481                 tx_ntc++;
1482                 if (tx_ntc == tx_ring->count)
1483                         tx_ntc = 0;
1484
1485                 /* fetch next descriptor */
1486                 rx_desc = E1000_RX_DESC_ADV(*rx_ring, rx_ntc);
1487                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1488         }
1489
1490         /* re-map buffers to ring, store next to clean values */
1491         igb_alloc_rx_buffers_adv(rx_ring, count);
1492         rx_ring->next_to_clean = rx_ntc;
1493         tx_ring->next_to_clean = tx_ntc;
1494
1495         return count;
1496 }
1497
1498 static int igb_run_loopback_test(struct igb_adapter *adapter)
1499 {
1500         struct igb_ring *tx_ring = &adapter->test_tx_ring;
1501         struct igb_ring *rx_ring = &adapter->test_rx_ring;
1502         int i, j, lc, good_cnt, ret_val = 0;
1503         unsigned int size = 1024;
1504         netdev_tx_t tx_ret_val;
1505         struct sk_buff *skb;
1506
1507         /* allocate test skb */
1508         skb = alloc_skb(size, GFP_KERNEL);
1509         if (!skb)
1510                 return 11;
1511
1512         /* place data into test skb */
1513         igb_create_lbtest_frame(skb, size);
1514         skb_put(skb, size);
1515
1516         /* Calculate the loop count based on the largest descriptor ring
1517          * The idea is to wrap the largest ring a number of times using 64
1518          * send/receive pairs during each loop
1519          */
1520
1521         if (rx_ring->count <= tx_ring->count)
1522                 lc = ((tx_ring->count / 64) * 2) + 1;
1523         else
1524                 lc = ((rx_ring->count / 64) * 2) + 1;
1525
1526         for (j = 0; j <= lc; j++) { /* loop count loop */
1527                 /* reset count of good packets */
1528                 good_cnt = 0;
1529
1530                 /* place 64 packets on the transmit queue*/
1531                 for (i = 0; i < 64; i++) {
1532                         skb_get(skb);
1533                         tx_ret_val = igb_xmit_frame_ring_adv(skb, tx_ring);
1534                         if (tx_ret_val == NETDEV_TX_OK)
1535                                 good_cnt++;
1536                 }
1537
1538                 if (good_cnt != 64) {
1539                         ret_val = 12;
1540                         break;
1541                 }
1542
1543                 /* allow 200 milliseconds for packets to go from tx to rx */
1544                 msleep(200);
1545
1546                 good_cnt = igb_clean_test_rings(rx_ring, tx_ring, size);
1547                 if (good_cnt != 64) {
1548                         ret_val = 13;
1549                         break;
1550                 }
1551         } /* end loop count loop */
1552
1553         /* free the original skb */
1554         kfree_skb(skb);
1555
1556         return ret_val;
1557 }
1558
1559 static int igb_loopback_test(struct igb_adapter *adapter, u64 *data)
1560 {
1561         /* PHY loopback cannot be performed if SoL/IDER
1562          * sessions are active */
1563         if (igb_check_reset_block(&adapter->hw)) {
1564                 dev_err(&adapter->pdev->dev,
1565                         "Cannot do PHY loopback test "
1566                         "when SoL/IDER is active.\n");
1567                 *data = 0;
1568                 goto out;
1569         }
1570         *data = igb_setup_desc_rings(adapter);
1571         if (*data)
1572                 goto out;
1573         *data = igb_setup_loopback_test(adapter);
1574         if (*data)
1575                 goto err_loopback;
1576         *data = igb_run_loopback_test(adapter);
1577         igb_loopback_cleanup(adapter);
1578
1579 err_loopback:
1580         igb_free_desc_rings(adapter);
1581 out:
1582         return *data;
1583 }
1584
1585 static int igb_link_test(struct igb_adapter *adapter, u64 *data)
1586 {
1587         struct e1000_hw *hw = &adapter->hw;
1588         *data = 0;
1589         if (hw->phy.media_type == e1000_media_type_internal_serdes) {
1590                 int i = 0;
1591                 hw->mac.serdes_has_link = false;
1592
1593                 /* On some blade server designs, link establishment
1594                  * could take as long as 2-3 minutes */
1595                 do {
1596                         hw->mac.ops.check_for_link(&adapter->hw);
1597                         if (hw->mac.serdes_has_link)
1598                                 return *data;
1599                         msleep(20);
1600                 } while (i++ < 3750);
1601
1602                 *data = 1;
1603         } else {
1604                 hw->mac.ops.check_for_link(&adapter->hw);
1605                 if (hw->mac.autoneg)
1606                         msleep(4000);
1607
1608                 if (!(rd32(E1000_STATUS) &
1609                       E1000_STATUS_LU))
1610                         *data = 1;
1611         }
1612         return *data;
1613 }
1614
1615 static void igb_diag_test(struct net_device *netdev,
1616                           struct ethtool_test *eth_test, u64 *data)
1617 {
1618         struct igb_adapter *adapter = netdev_priv(netdev);
1619         u16 autoneg_advertised;
1620         u8 forced_speed_duplex, autoneg;
1621         bool if_running = netif_running(netdev);
1622
1623         set_bit(__IGB_TESTING, &adapter->state);
1624         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1625                 /* Offline tests */
1626
1627                 /* save speed, duplex, autoneg settings */
1628                 autoneg_advertised = adapter->hw.phy.autoneg_advertised;
1629                 forced_speed_duplex = adapter->hw.mac.forced_speed_duplex;
1630                 autoneg = adapter->hw.mac.autoneg;
1631
1632                 dev_info(&adapter->pdev->dev, "offline testing starting\n");
1633
1634                 /* Link test performed before hardware reset so autoneg doesn't
1635                  * interfere with test result */
1636                 if (igb_link_test(adapter, &data[4]))
1637                         eth_test->flags |= ETH_TEST_FL_FAILED;
1638
1639                 if (if_running)
1640                         /* indicate we're in test mode */
1641                         dev_close(netdev);
1642                 else
1643                         igb_reset(adapter);
1644
1645                 if (igb_reg_test(adapter, &data[0]))
1646                         eth_test->flags |= ETH_TEST_FL_FAILED;
1647
1648                 igb_reset(adapter);
1649                 if (igb_eeprom_test(adapter, &data[1]))
1650                         eth_test->flags |= ETH_TEST_FL_FAILED;
1651
1652                 igb_reset(adapter);
1653                 if (igb_intr_test(adapter, &data[2]))
1654                         eth_test->flags |= ETH_TEST_FL_FAILED;
1655
1656                 igb_reset(adapter);
1657                 if (igb_loopback_test(adapter, &data[3]))
1658                         eth_test->flags |= ETH_TEST_FL_FAILED;
1659
1660                 /* restore speed, duplex, autoneg settings */
1661                 adapter->hw.phy.autoneg_advertised = autoneg_advertised;
1662                 adapter->hw.mac.forced_speed_duplex = forced_speed_duplex;
1663                 adapter->hw.mac.autoneg = autoneg;
1664
1665                 /* force this routine to wait until autoneg complete/timeout */
1666                 adapter->hw.phy.autoneg_wait_to_complete = true;
1667                 igb_reset(adapter);
1668                 adapter->hw.phy.autoneg_wait_to_complete = false;
1669
1670                 clear_bit(__IGB_TESTING, &adapter->state);
1671                 if (if_running)
1672                         dev_open(netdev);
1673         } else {
1674                 dev_info(&adapter->pdev->dev, "online testing starting\n");
1675                 /* Online tests */
1676                 if (igb_link_test(adapter, &data[4]))
1677                         eth_test->flags |= ETH_TEST_FL_FAILED;
1678
1679                 /* Online tests aren't run; pass by default */
1680                 data[0] = 0;
1681                 data[1] = 0;
1682                 data[2] = 0;
1683                 data[3] = 0;
1684
1685                 clear_bit(__IGB_TESTING, &adapter->state);
1686         }
1687         msleep_interruptible(4 * 1000);
1688 }
1689
1690 static int igb_wol_exclusion(struct igb_adapter *adapter,
1691                              struct ethtool_wolinfo *wol)
1692 {
1693         struct e1000_hw *hw = &adapter->hw;
1694         int retval = 1; /* fail by default */
1695
1696         switch (hw->device_id) {
1697         case E1000_DEV_ID_82575GB_QUAD_COPPER:
1698                 /* WoL not supported */
1699                 wol->supported = 0;
1700                 break;
1701         case E1000_DEV_ID_82575EB_FIBER_SERDES:
1702         case E1000_DEV_ID_82576_FIBER:
1703         case E1000_DEV_ID_82576_SERDES:
1704                 /* Wake events not supported on port B */
1705                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1) {
1706                         wol->supported = 0;
1707                         break;
1708                 }
1709                 /* return success for non excluded adapter ports */
1710                 retval = 0;
1711                 break;
1712         case E1000_DEV_ID_82576_QUAD_COPPER:
1713                 /* quad port adapters only support WoL on port A */
1714                 if (!(adapter->flags & IGB_FLAG_QUAD_PORT_A)) {
1715                         wol->supported = 0;
1716                         break;
1717                 }
1718                 /* return success for non excluded adapter ports */
1719                 retval = 0;
1720                 break;
1721         default:
1722                 /* dual port cards only support WoL on port A from now on
1723                  * unless it was enabled in the eeprom for port B
1724                  * so exclude FUNC_1 ports from having WoL enabled */
1725                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1 &&
1726                     !adapter->eeprom_wol) {
1727                         wol->supported = 0;
1728                         break;
1729                 }
1730
1731                 retval = 0;
1732         }
1733
1734         return retval;
1735 }
1736
1737 static void igb_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1738 {
1739         struct igb_adapter *adapter = netdev_priv(netdev);
1740
1741         wol->supported = WAKE_UCAST | WAKE_MCAST |
1742                          WAKE_BCAST | WAKE_MAGIC;
1743         wol->wolopts = 0;
1744
1745         /* this function will set ->supported = 0 and return 1 if wol is not
1746          * supported by this hardware */
1747         if (igb_wol_exclusion(adapter, wol) ||
1748             !device_can_wakeup(&adapter->pdev->dev))
1749                 return;
1750
1751         /* apply any specific unsupported masks here */
1752         switch (adapter->hw.device_id) {
1753         default:
1754                 break;
1755         }
1756
1757         if (adapter->wol & E1000_WUFC_EX)
1758                 wol->wolopts |= WAKE_UCAST;
1759         if (adapter->wol & E1000_WUFC_MC)
1760                 wol->wolopts |= WAKE_MCAST;
1761         if (adapter->wol & E1000_WUFC_BC)
1762                 wol->wolopts |= WAKE_BCAST;
1763         if (adapter->wol & E1000_WUFC_MAG)
1764                 wol->wolopts |= WAKE_MAGIC;
1765
1766         return;
1767 }
1768
1769 static int igb_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1770 {
1771         struct igb_adapter *adapter = netdev_priv(netdev);
1772
1773         if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1774                 return -EOPNOTSUPP;
1775
1776         if (igb_wol_exclusion(adapter, wol) ||
1777             !device_can_wakeup(&adapter->pdev->dev))
1778                 return wol->wolopts ? -EOPNOTSUPP : 0;
1779
1780         /* these settings will always override what we currently have */
1781         adapter->wol = 0;
1782
1783         if (wol->wolopts & WAKE_UCAST)
1784                 adapter->wol |= E1000_WUFC_EX;
1785         if (wol->wolopts & WAKE_MCAST)
1786                 adapter->wol |= E1000_WUFC_MC;
1787         if (wol->wolopts & WAKE_BCAST)
1788                 adapter->wol |= E1000_WUFC_BC;
1789         if (wol->wolopts & WAKE_MAGIC)
1790                 adapter->wol |= E1000_WUFC_MAG;
1791
1792         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1793
1794         return 0;
1795 }
1796
1797 /* bit defines for adapter->led_status */
1798 #define IGB_LED_ON              0
1799
1800 static int igb_phys_id(struct net_device *netdev, u32 data)
1801 {
1802         struct igb_adapter *adapter = netdev_priv(netdev);
1803         struct e1000_hw *hw = &adapter->hw;
1804
1805         if (!data || data > (u32)(MAX_SCHEDULE_TIMEOUT / HZ))
1806                 data = (u32)(MAX_SCHEDULE_TIMEOUT / HZ);
1807
1808         igb_blink_led(hw);
1809         msleep_interruptible(data * 1000);
1810
1811         igb_led_off(hw);
1812         clear_bit(IGB_LED_ON, &adapter->led_status);
1813         igb_cleanup_led(hw);
1814
1815         return 0;
1816 }
1817
1818 static int igb_set_coalesce(struct net_device *netdev,
1819                             struct ethtool_coalesce *ec)
1820 {
1821         struct igb_adapter *adapter = netdev_priv(netdev);
1822         int i;
1823
1824         if ((ec->rx_coalesce_usecs > IGB_MAX_ITR_USECS) ||
1825             ((ec->rx_coalesce_usecs > 3) &&
1826              (ec->rx_coalesce_usecs < IGB_MIN_ITR_USECS)) ||
1827             (ec->rx_coalesce_usecs == 2))
1828                 return -EINVAL;
1829
1830         /* convert to rate of irq's per second */
1831         if (ec->rx_coalesce_usecs && ec->rx_coalesce_usecs <= 3) {
1832                 adapter->itr_setting = ec->rx_coalesce_usecs;
1833                 adapter->itr = IGB_START_ITR;
1834         } else {
1835                 adapter->itr_setting = ec->rx_coalesce_usecs << 2;
1836                 adapter->itr = adapter->itr_setting;
1837         }
1838
1839         for (i = 0; i < adapter->num_q_vectors; i++) {
1840                 struct igb_q_vector *q_vector = adapter->q_vector[i];
1841                 q_vector->itr_val = adapter->itr;
1842                 q_vector->set_itr = 1;
1843         }
1844
1845         return 0;
1846 }
1847
1848 static int igb_get_coalesce(struct net_device *netdev,
1849                             struct ethtool_coalesce *ec)
1850 {
1851         struct igb_adapter *adapter = netdev_priv(netdev);
1852
1853         if (adapter->itr_setting <= 3)
1854                 ec->rx_coalesce_usecs = adapter->itr_setting;
1855         else
1856                 ec->rx_coalesce_usecs = adapter->itr_setting >> 2;
1857
1858         return 0;
1859 }
1860
1861
1862 static int igb_nway_reset(struct net_device *netdev)
1863 {
1864         struct igb_adapter *adapter = netdev_priv(netdev);
1865         if (netif_running(netdev))
1866                 igb_reinit_locked(adapter);
1867         return 0;
1868 }
1869
1870 static int igb_get_sset_count(struct net_device *netdev, int sset)
1871 {
1872         switch (sset) {
1873         case ETH_SS_STATS:
1874                 return IGB_STATS_LEN;
1875         case ETH_SS_TEST:
1876                 return IGB_TEST_LEN;
1877         default:
1878                 return -ENOTSUPP;
1879         }
1880 }
1881
1882 static void igb_get_ethtool_stats(struct net_device *netdev,
1883                                   struct ethtool_stats *stats, u64 *data)
1884 {
1885         struct igb_adapter *adapter = netdev_priv(netdev);
1886         u64 *queue_stat;
1887         int stat_count_tx = sizeof(struct igb_tx_queue_stats) / sizeof(u64);
1888         int stat_count_rx = sizeof(struct igb_rx_queue_stats) / sizeof(u64);
1889         int j;
1890         int i;
1891         char *p = NULL;
1892
1893         igb_update_stats(adapter);
1894         for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
1895                 switch (igb_gstrings_stats[i].type) {
1896                 case NETDEV_STATS:
1897                         p = (char *) netdev +
1898                                         igb_gstrings_stats[i].stat_offset;
1899                         break;
1900                 case IGB_STATS:
1901                         p = (char *) adapter +
1902                                         igb_gstrings_stats[i].stat_offset;
1903                         break;
1904                 }
1905
1906                 data[i] = (igb_gstrings_stats[i].sizeof_stat ==
1907                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1908         }
1909         for (j = 0; j < adapter->num_tx_queues; j++) {
1910                 int k;
1911                 queue_stat = (u64 *)&adapter->tx_ring[j].tx_stats;
1912                 for (k = 0; k < stat_count_tx; k++)
1913                         data[i + k] = queue_stat[k];
1914                 i += k;
1915         }
1916         for (j = 0; j < adapter->num_rx_queues; j++) {
1917                 int k;
1918                 queue_stat = (u64 *)&adapter->rx_ring[j].rx_stats;
1919                 for (k = 0; k < stat_count_rx; k++)
1920                         data[i + k] = queue_stat[k];
1921                 i += k;
1922         }
1923 }
1924
1925 static void igb_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
1926 {
1927         struct igb_adapter *adapter = netdev_priv(netdev);
1928         u8 *p = data;
1929         int i;
1930
1931         switch (stringset) {
1932         case ETH_SS_TEST:
1933                 memcpy(data, *igb_gstrings_test,
1934                         IGB_TEST_LEN*ETH_GSTRING_LEN);
1935                 break;
1936         case ETH_SS_STATS:
1937                 for (i = 0; i < IGB_GLOBAL_STATS_LEN; i++) {
1938                         memcpy(p, igb_gstrings_stats[i].stat_string,
1939                                ETH_GSTRING_LEN);
1940                         p += ETH_GSTRING_LEN;
1941                 }
1942                 for (i = 0; i < adapter->num_tx_queues; i++) {
1943                         sprintf(p, "tx_queue_%u_packets", i);
1944                         p += ETH_GSTRING_LEN;
1945                         sprintf(p, "tx_queue_%u_bytes", i);
1946                         p += ETH_GSTRING_LEN;
1947                         sprintf(p, "tx_queue_%u_restart", i);
1948                         p += ETH_GSTRING_LEN;
1949                 }
1950                 for (i = 0; i < adapter->num_rx_queues; i++) {
1951                         sprintf(p, "rx_queue_%u_packets", i);
1952                         p += ETH_GSTRING_LEN;
1953                         sprintf(p, "rx_queue_%u_bytes", i);
1954                         p += ETH_GSTRING_LEN;
1955                         sprintf(p, "rx_queue_%u_drops", i);
1956                         p += ETH_GSTRING_LEN;
1957                         sprintf(p, "rx_queue_%u_csum_err", i);
1958                         p += ETH_GSTRING_LEN;
1959                         sprintf(p, "rx_queue_%u_alloc_failed", i);
1960                         p += ETH_GSTRING_LEN;
1961                 }
1962 /*              BUG_ON(p - data != IGB_STATS_LEN * ETH_GSTRING_LEN); */
1963                 break;
1964         }
1965 }
1966
1967 static const struct ethtool_ops igb_ethtool_ops = {
1968         .get_settings           = igb_get_settings,
1969         .set_settings           = igb_set_settings,
1970         .get_drvinfo            = igb_get_drvinfo,
1971         .get_regs_len           = igb_get_regs_len,
1972         .get_regs               = igb_get_regs,
1973         .get_wol                = igb_get_wol,
1974         .set_wol                = igb_set_wol,
1975         .get_msglevel           = igb_get_msglevel,
1976         .set_msglevel           = igb_set_msglevel,
1977         .nway_reset             = igb_nway_reset,
1978         .get_link               = ethtool_op_get_link,
1979         .get_eeprom_len         = igb_get_eeprom_len,
1980         .get_eeprom             = igb_get_eeprom,
1981         .set_eeprom             = igb_set_eeprom,
1982         .get_ringparam          = igb_get_ringparam,
1983         .set_ringparam          = igb_set_ringparam,
1984         .get_pauseparam         = igb_get_pauseparam,
1985         .set_pauseparam         = igb_set_pauseparam,
1986         .get_rx_csum            = igb_get_rx_csum,
1987         .set_rx_csum            = igb_set_rx_csum,
1988         .get_tx_csum            = igb_get_tx_csum,
1989         .set_tx_csum            = igb_set_tx_csum,
1990         .get_sg                 = ethtool_op_get_sg,
1991         .set_sg                 = ethtool_op_set_sg,
1992         .get_tso                = ethtool_op_get_tso,
1993         .set_tso                = igb_set_tso,
1994         .self_test              = igb_diag_test,
1995         .get_strings            = igb_get_strings,
1996         .phys_id                = igb_phys_id,
1997         .get_sset_count         = igb_get_sset_count,
1998         .get_ethtool_stats      = igb_get_ethtool_stats,
1999         .get_coalesce           = igb_get_coalesce,
2000         .set_coalesce           = igb_set_coalesce,
2001 };
2002
2003 void igb_set_ethtool_ops(struct net_device *netdev)
2004 {
2005         SET_ETHTOOL_OPS(netdev, &igb_ethtool_ops);
2006 }