drivers/net/ieee802154/at86rf230.c

   1 /*
   2  * AT86RF230/RF231 driver
   3  *
   4  * Copyright (C) 2009-2012 Siemens AG
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2
   8  * as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along
  16  * with this program; if not, write to the Free Software Foundation, Inc.,
  17  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Written by:
  20  * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
  21  * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
  22  */
  23 #include <linux/kernel.h>
  24 #include <linux/module.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/irq.h>
  27 #include <linux/gpio.h>
  28 #include <linux/delay.h>
  29 #include <linux/mutex.h>
  30 #include <linux/workqueue.h>
  31 #include <linux/spinlock.h>
  32 #include <linux/spi/spi.h>
  33 #include <linux/spi/at86rf230.h>
  34 #include <linux/skbuff.h>
  35 #include <linux/of_gpio.h>
  36
  37 #include <net/mac802154.h>
  38 #include <net/wpan-phy.h>
  39
  40 struct at86rf230_local {
  41         struct spi_device *spi;
  42
  43         u8 part;
  44         u8 vers;
  45
  46         u8 buf[2];
  47         struct mutex bmux;
  48
  49         struct work_struct irqwork;
  50         struct completion tx_complete;
  51
  52         struct ieee802154_dev *dev;
  53
  54         spinlock_t lock;
  55         bool irq_busy;
  56         bool is_tx;
  57         bool tx_aret;
  58
  59         int rssi_base_val;
  60 };
  61
  62 static bool is_rf212(struct at86rf230_local *local)
  63 {
  64         return local->part == 7;
  65 }
  66
  67 #define RG_TRX_STATUS   (0x01)
  68 #define SR_TRX_STATUS           0x01, 0x1f, 0
  69 #define SR_RESERVED_01_3        0x01, 0x20, 5
  70 #define SR_CCA_STATUS           0x01, 0x40, 6
  71 #define SR_CCA_DONE             0x01, 0x80, 7
  72 #define RG_TRX_STATE    (0x02)
  73 #define SR_TRX_CMD              0x02, 0x1f, 0
  74 #define SR_TRAC_STATUS          0x02, 0xe0, 5
  75 #define RG_TRX_CTRL_0   (0x03)
  76 #define SR_CLKM_CTRL            0x03, 0x07, 0
  77 #define SR_CLKM_SHA_SEL         0x03, 0x08, 3
  78 #define SR_PAD_IO_CLKM          0x03, 0x30, 4
  79 #define SR_PAD_IO               0x03, 0xc0, 6
  80 #define RG_TRX_CTRL_1   (0x04)
  81 #define SR_IRQ_POLARITY         0x04, 0x01, 0
  82 #define SR_IRQ_MASK_MODE        0x04, 0x02, 1
  83 #define SR_SPI_CMD_MODE         0x04, 0x0c, 2
  84 #define SR_RX_BL_CTRL           0x04, 0x10, 4
  85 #define SR_TX_AUTO_CRC_ON       0x04, 0x20, 5
  86 #define SR_IRQ_2_EXT_EN         0x04, 0x40, 6
  87 #define SR_PA_EXT_EN            0x04, 0x80, 7
  88 #define RG_PHY_TX_PWR   (0x05)
  89 #define SR_TX_PWR               0x05, 0x0f, 0
  90 #define SR_PA_LT                0x05, 0x30, 4
  91 #define SR_PA_BUF_LT            0x05, 0xc0, 6
  92 #define RG_PHY_RSSI     (0x06)
  93 #define SR_RSSI                 0x06, 0x1f, 0
  94 #define SR_RND_VALUE            0x06, 0x60, 5
  95 #define SR_RX_CRC_VALID         0x06, 0x80, 7
  96 #define RG_PHY_ED_LEVEL (0x07)
  97 #define SR_ED_LEVEL             0x07, 0xff, 0
  98 #define RG_PHY_CC_CCA   (0x08)
  99 #define SR_CHANNEL              0x08, 0x1f, 0
 100 #define SR_CCA_MODE             0x08, 0x60, 5
 101 #define SR_CCA_REQUEST          0x08, 0x80, 7
 102 #define RG_CCA_THRES    (0x09)
 103 #define SR_CCA_ED_THRES         0x09, 0x0f, 0
 104 #define SR_RESERVED_09_1        0x09, 0xf0, 4
 105 #define RG_RX_CTRL      (0x0a)
 106 #define SR_PDT_THRES            0x0a, 0x0f, 0
 107 #define SR_RESERVED_0a_1        0x0a, 0xf0, 4
 108 #define RG_SFD_VALUE    (0x0b)
 109 #define SR_SFD_VALUE            0x0b, 0xff, 0
 110 #define RG_TRX_CTRL_2   (0x0c)
 111 #define SR_OQPSK_DATA_RATE      0x0c, 0x03, 0
 112 #define SR_SUB_MODE             0x0c, 0x04, 2
 113 #define SR_BPSK_QPSK            0x0c, 0x08, 3
 114 #define SR_OQPSK_SUB1_RC_EN     0x0c, 0x10, 4
 115 #define SR_RESERVED_0c_5        0x0c, 0x60, 5
 116 #define SR_RX_SAFE_MODE         0x0c, 0x80, 7
 117 #define RG_ANT_DIV      (0x0d)
 118 #define SR_ANT_CTRL             0x0d, 0x03, 0
 119 #define SR_ANT_EXT_SW_EN        0x0d, 0x04, 2
 120 #define SR_ANT_DIV_EN           0x0d, 0x08, 3
 121 #define SR_RESERVED_0d_2        0x0d, 0x70, 4
 122 #define SR_ANT_SEL              0x0d, 0x80, 7
 123 #define RG_IRQ_MASK     (0x0e)
 124 #define SR_IRQ_MASK             0x0e, 0xff, 0
 125 #define RG_IRQ_STATUS   (0x0f)
 126 #define SR_IRQ_0_PLL_LOCK       0x0f, 0x01, 0
 127 #define SR_IRQ_1_PLL_UNLOCK     0x0f, 0x02, 1
 128 #define SR_IRQ_2_RX_START       0x0f, 0x04, 2
 129 #define SR_IRQ_3_TRX_END        0x0f, 0x08, 3
 130 #define SR_IRQ_4_CCA_ED_DONE    0x0f, 0x10, 4
 131 #define SR_IRQ_5_AMI            0x0f, 0x20, 5
 132 #define SR_IRQ_6_TRX_UR         0x0f, 0x40, 6
 133 #define SR_IRQ_7_BAT_LOW        0x0f, 0x80, 7
 134 #define RG_VREG_CTRL    (0x10)
 135 #define SR_RESERVED_10_6        0x10, 0x03, 0
 136 #define SR_DVDD_OK              0x10, 0x04, 2
 137 #define SR_DVREG_EXT            0x10, 0x08, 3
 138 #define SR_RESERVED_10_3        0x10, 0x30, 4
 139 #define SR_AVDD_OK              0x10, 0x40, 6
 140 #define SR_AVREG_EXT            0x10, 0x80, 7
 141 #define RG_BATMON       (0x11)
 142 #define SR_BATMON_VTH           0x11, 0x0f, 0
 143 #define SR_BATMON_HR            0x11, 0x10, 4
 144 #define SR_BATMON_OK            0x11, 0x20, 5
 145 #define SR_RESERVED_11_1        0x11, 0xc0, 6
 146 #define RG_XOSC_CTRL    (0x12)
 147 #define SR_XTAL_TRIM            0x12, 0x0f, 0
 148 #define SR_XTAL_MODE            0x12, 0xf0, 4
 149 #define RG_RX_SYN       (0x15)
 150 #define SR_RX_PDT_LEVEL         0x15, 0x0f, 0
 151 #define SR_RESERVED_15_2        0x15, 0x70, 4
 152 #define SR_RX_PDT_DIS           0x15, 0x80, 7
 153 #define RG_XAH_CTRL_1   (0x17)
 154 #define SR_RESERVED_17_8        0x17, 0x01, 0
 155 #define SR_AACK_PROM_MODE       0x17, 0x02, 1
 156 #define SR_AACK_ACK_TIME        0x17, 0x04, 2
 157 #define SR_RESERVED_17_5        0x17, 0x08, 3
 158 #define SR_AACK_UPLD_RES_FT     0x17, 0x10, 4
 159 #define SR_AACK_FLTR_RES_FT     0x17, 0x20, 5
 160 #define SR_CSMA_LBT_MODE        0x17, 0x40, 6
 161 #define SR_RESERVED_17_1        0x17, 0x80, 7
 162 #define RG_FTN_CTRL     (0x18)
 163 #define SR_RESERVED_18_2        0x18, 0x7f, 0
 164 #define SR_FTN_START            0x18, 0x80, 7
 165 #define RG_PLL_CF       (0x1a)
 166 #define SR_RESERVED_1a_2        0x1a, 0x7f, 0
 167 #define SR_PLL_CF_START         0x1a, 0x80, 7
 168 #define RG_PLL_DCU      (0x1b)
 169 #define SR_RESERVED_1b_3        0x1b, 0x3f, 0
 170 #define SR_RESERVED_1b_2        0x1b, 0x40, 6
 171 #define SR_PLL_DCU_START        0x1b, 0x80, 7
 172 #define RG_PART_NUM     (0x1c)
 173 #define SR_PART_NUM             0x1c, 0xff, 0
 174 #define RG_VERSION_NUM  (0x1d)
 175 #define SR_VERSION_NUM          0x1d, 0xff, 0
 176 #define RG_MAN_ID_0     (0x1e)
 177 #define SR_MAN_ID_0             0x1e, 0xff, 0
 178 #define RG_MAN_ID_1     (0x1f)
 179 #define SR_MAN_ID_1             0x1f, 0xff, 0
 180 #define RG_SHORT_ADDR_0 (0x20)
 181 #define SR_SHORT_ADDR_0         0x20, 0xff, 0
 182 #define RG_SHORT_ADDR_1 (0x21)
 183 #define SR_SHORT_ADDR_1         0x21, 0xff, 0
 184 #define RG_PAN_ID_0     (0x22)
 185 #define SR_PAN_ID_0             0x22, 0xff, 0
 186 #define RG_PAN_ID_1     (0x23)
 187 #define SR_PAN_ID_1             0x23, 0xff, 0
 188 #define RG_IEEE_ADDR_0  (0x24)
 189 #define SR_IEEE_ADDR_0          0x24, 0xff, 0
 190 #define RG_IEEE_ADDR_1  (0x25)
 191 #define SR_IEEE_ADDR_1          0x25, 0xff, 0
 192 #define RG_IEEE_ADDR_2  (0x26)
 193 #define SR_IEEE_ADDR_2          0x26, 0xff, 0
 194 #define RG_IEEE_ADDR_3  (0x27)
 195 #define SR_IEEE_ADDR_3          0x27, 0xff, 0
 196 #define RG_IEEE_ADDR_4  (0x28)
 197 #define SR_IEEE_ADDR_4          0x28, 0xff, 0
 198 #define RG_IEEE_ADDR_5  (0x29)
 199 #define SR_IEEE_ADDR_5          0x29, 0xff, 0
 200 #define RG_IEEE_ADDR_6  (0x2a)
 201 #define SR_IEEE_ADDR_6          0x2a, 0xff, 0
 202 #define RG_IEEE_ADDR_7  (0x2b)
 203 #define SR_IEEE_ADDR_7          0x2b, 0xff, 0
 204 #define RG_XAH_CTRL_0   (0x2c)
 205 #define SR_SLOTTED_OPERATION    0x2c, 0x01, 0
 206 #define SR_MAX_CSMA_RETRIES     0x2c, 0x0e, 1
 207 #define SR_MAX_FRAME_RETRIES    0x2c, 0xf0, 4
 208 #define RG_CSMA_SEED_0  (0x2d)
 209 #define SR_CSMA_SEED_0          0x2d, 0xff, 0
 210 #define RG_CSMA_SEED_1  (0x2e)
 211 #define SR_CSMA_SEED_1          0x2e, 0x07, 0
 212 #define SR_AACK_I_AM_COORD      0x2e, 0x08, 3
 213 #define SR_AACK_DIS_ACK         0x2e, 0x10, 4
 214 #define SR_AACK_SET_PD          0x2e, 0x20, 5
 215 #define SR_AACK_FVN_MODE        0x2e, 0xc0, 6
 216 #define RG_CSMA_BE      (0x2f)
 217 #define SR_MIN_BE               0x2f, 0x0f, 0
 218 #define SR_MAX_BE               0x2f, 0xf0, 4
 219
 220 #define CMD_REG         0x80
 221 #define CMD_REG_MASK    0x3f
 222 #define CMD_WRITE       0x40
 223 #define CMD_FB          0x20
 224
 225 #define IRQ_BAT_LOW     (1 << 7)
 226 #define IRQ_TRX_UR      (1 << 6)
 227 #define IRQ_AMI         (1 << 5)
 228 #define IRQ_CCA_ED      (1 << 4)
 229 #define IRQ_TRX_END     (1 << 3)
 230 #define IRQ_RX_START    (1 << 2)
 231 #define IRQ_PLL_UNL     (1 << 1)
 232 #define IRQ_PLL_LOCK    (1 << 0)
 233
 234 #define IRQ_ACTIVE_HIGH 0
 235 #define IRQ_ACTIVE_LOW  1
 236
 237 #define STATE_P_ON              0x00    /* BUSY */
 238 #define STATE_BUSY_RX           0x01
 239 #define STATE_BUSY_TX           0x02
 240 #define STATE_FORCE_TRX_OFF     0x03
 241 #define STATE_FORCE_TX_ON       0x04    /* IDLE */
 242 /* 0x05 */                              /* INVALID_PARAMETER */
 243 #define STATE_RX_ON             0x06
 244 /* 0x07 */                              /* SUCCESS */
 245 #define STATE_TRX_OFF           0x08
 246 #define STATE_TX_ON             0x09
 247 /* 0x0a - 0x0e */                       /* 0x0a - UNSUPPORTED_ATTRIBUTE */
 248 #define STATE_SLEEP             0x0F
 249 #define STATE_PREP_DEEP_SLEEP   0x10
 250 #define STATE_BUSY_RX_AACK      0x11
 251 #define STATE_BUSY_TX_ARET      0x12
 252 #define STATE_RX_AACK_ON        0x16
 253 #define STATE_TX_ARET_ON        0x19
 254 #define STATE_RX_ON_NOCLK       0x1C
 255 #define STATE_RX_AACK_ON_NOCLK  0x1D
 256 #define STATE_BUSY_RX_AACK_NOCLK 0x1E
 257 #define STATE_TRANSITION_IN_PROGRESS 0x1F
 258
 259 static int
 260 __at86rf230_detect_device(struct spi_device *spi, u16 *man_id, u8 *part,
 261                 u8 *version)
 262 {
 263         u8 data[4];
 264         u8 *buf = kmalloc(2, GFP_KERNEL);
 265         int status;
 266         struct spi_message msg;
 267         struct spi_transfer xfer = {
 268                 .len    = 2,
 269                 .tx_buf = buf,
 270                 .rx_buf = buf,
 271         };
 272         u8 reg;
 273
 274         if (!buf)
 275                 return -ENOMEM;
 276
 277         for (reg = RG_PART_NUM; reg <= RG_MAN_ID_1; reg++) {
 278                 buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
 279                 buf[1] = 0xff;
 280                 dev_vdbg(&spi->dev, "buf[0] = %02x\n", buf[0]);
 281                 spi_message_init(&msg);
 282                 spi_message_add_tail(&xfer, &msg);
 283
 284                 status = spi_sync(spi, &msg);
 285                 dev_vdbg(&spi->dev, "status = %d\n", status);
 286                 if (msg.status)
 287                         status = msg.status;
 288
 289                 dev_vdbg(&spi->dev, "status = %d\n", status);
 290                 dev_vdbg(&spi->dev, "buf[0] = %02x\n", buf[0]);
 291                 dev_vdbg(&spi->dev, "buf[1] = %02x\n", buf[1]);
 292
 293                 if (status == 0)
 294                         data[reg - RG_PART_NUM] = buf[1];
 295                 else
 296                         break;
 297         }
 298
 299         if (status == 0) {
 300                 *part = data[0];
 301                 *version = data[1];
 302                 *man_id = (data[3] << 8) | data[2];
 303         }
 304
 305         kfree(buf);
 306
 307         return status;
 308 }
 309
 310 static int
 311 __at86rf230_write(struct at86rf230_local *lp, u8 addr, u8 data)
 312 {
 313         u8 *buf = lp->buf;
 314         int status;
 315         struct spi_message msg;
 316         struct spi_transfer xfer = {
 317                 .len    = 2,
 318                 .tx_buf = buf,
 319         };
 320
 321         buf[0] = (addr & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
 322         buf[1] = data;
 323         dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
 324         dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
 325         spi_message_init(&msg);
 326         spi_message_add_tail(&xfer, &msg);
 327
 328         status = spi_sync(lp->spi, &msg);
 329         dev_vdbg(&lp->spi->dev, "status = %d\n", status);
 330         if (msg.status)
 331                 status = msg.status;
 332
 333         dev_vdbg(&lp->spi->dev, "status = %d\n", status);
 334         dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
 335         dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
 336
 337         return status;
 338 }
 339
 340 static int
 341 __at86rf230_read_subreg(struct at86rf230_local *lp,
 342                         u8 addr, u8 mask, int shift, u8 *data)
 343 {
 344         u8 *buf = lp->buf;
 345         int status;
 346         struct spi_message msg;
 347         struct spi_transfer xfer = {
 348                 .len    = 2,
 349                 .tx_buf = buf,
 350                 .rx_buf = buf,
 351         };
 352
 353         buf[0] = (addr & CMD_REG_MASK) | CMD_REG;
 354         buf[1] = 0xff;
 355         dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
 356         spi_message_init(&msg);
 357         spi_message_add_tail(&xfer, &msg);
 358
 359         status = spi_sync(lp->spi, &msg);
 360         dev_vdbg(&lp->spi->dev, "status = %d\n", status);
 361         if (msg.status)
 362                 status = msg.status;
 363
 364         dev_vdbg(&lp->spi->dev, "status = %d\n", status);
 365         dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
 366         dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
 367
 368         if (status == 0)
 369                 *data = (buf[1] & mask) >> shift;
 370
 371         return status;
 372 }
 373
 374 static int
 375 at86rf230_read_subreg(struct at86rf230_local *lp,
 376                       u8 addr, u8 mask, int shift, u8 *data)
 377 {
 378         int status;
 379
 380         mutex_lock(&lp->bmux);
 381         status = __at86rf230_read_subreg(lp, addr, mask, shift, data);
 382         mutex_unlock(&lp->bmux);
 383
 384         return status;
 385 }
 386
 387 static int
 388 at86rf230_write_subreg(struct at86rf230_local *lp,
 389                        u8 addr, u8 mask, int shift, u8 data)
 390 {
 391         int status;
 392         u8 val;
 393
 394         mutex_lock(&lp->bmux);
 395         status = __at86rf230_read_subreg(lp, addr, 0xff, 0, &val);
 396         if (status)
 397                 goto out;
 398
 399         val &= ~mask;
 400         val |= (data << shift) & mask;
 401
 402         status = __at86rf230_write(lp, addr, val);
 403 out:
 404         mutex_unlock(&lp->bmux);
 405
 406         return status;
 407 }
 408
 409 static int
 410 at86rf230_write_fbuf(struct at86rf230_local *lp, u8 *data, u8 len)
 411 {
 412         u8 *buf = lp->buf;
 413         int status;
 414         struct spi_message msg;
 415         struct spi_transfer xfer_head = {
 416                 .len            = 2,
 417                 .tx_buf         = buf,
 418
 419         };
 420         struct spi_transfer xfer_buf = {
 421                 .len            = len,
 422                 .tx_buf         = data,
 423         };
 424
 425         mutex_lock(&lp->bmux);
 426         buf[0] = CMD_WRITE | CMD_FB;
 427         buf[1] = len + 2; /* 2 bytes for CRC that isn't written */
 428
 429         dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
 430         dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
 431
 432         spi_message_init(&msg);
 433         spi_message_add_tail(&xfer_head, &msg);
 434         spi_message_add_tail(&xfer_buf, &msg);
 435
 436         status = spi_sync(lp->spi, &msg);
 437         dev_vdbg(&lp->spi->dev, "status = %d\n", status);
 438         if (msg.status)
 439                 status = msg.status;
 440
 441         dev_vdbg(&lp->spi->dev, "status = %d\n", status);
 442         dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
 443         dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
 444
 445         mutex_unlock(&lp->bmux);
 446         return status;
 447 }
 448
 449 static int
 450 at86rf230_read_fbuf(struct at86rf230_local *lp, u8 *data, u8 *len, u8 *lqi)
 451 {
 452         u8 *buf = lp->buf;
 453         int status;
 454         struct spi_message msg;
 455         struct spi_transfer xfer_head = {
 456                 .len            = 2,
 457                 .tx_buf         = buf,
 458                 .rx_buf         = buf,
 459         };
 460         struct spi_transfer xfer_head1 = {
 461                 .len            = 2,
 462                 .tx_buf         = buf,
 463                 .rx_buf         = buf,
 464         };
 465         struct spi_transfer xfer_buf = {
 466                 .len            = 0,
 467                 .rx_buf         = data,
 468         };
 469
 470         mutex_lock(&lp->bmux);
 471
 472         buf[0] = CMD_FB;
 473         buf[1] = 0x00;
 474
 475         spi_message_init(&msg);
 476         spi_message_add_tail(&xfer_head, &msg);
 477
 478         status = spi_sync(lp->spi, &msg);
 479         dev_vdbg(&lp->spi->dev, "status = %d\n", status);
 480
 481         xfer_buf.len = *(buf + 1) + 1;
 482         *len = buf[1];
 483
 484         buf[0] = CMD_FB;
 485         buf[1] = 0x00;
 486
 487         spi_message_init(&msg);
 488         spi_message_add_tail(&xfer_head1, &msg);
 489         spi_message_add_tail(&xfer_buf, &msg);
 490
 491         status = spi_sync(lp->spi, &msg);
 492
 493         if (msg.status)
 494                 status = msg.status;
 495
 496         dev_vdbg(&lp->spi->dev, "status = %d\n", status);
 497         dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
 498         dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
 499
 500         if (status) {
 501                 if (lqi && (*len > lp->buf[1]))
 502                         *lqi = data[lp->buf[1]];
 503         }
 504         mutex_unlock(&lp->bmux);
 505
 506         return status;
 507 }
 508
 509 static int
 510 at86rf230_ed(struct ieee802154_dev *dev, u8 *level)
 511 {
 512         might_sleep();
 513         BUG_ON(!level);
 514         *level = 0xbe;
 515         return 0;
 516 }
 517
 518 static int
 519 at86rf230_state(struct ieee802154_dev *dev, int state)
 520 {
 521         struct at86rf230_local *lp = dev->priv;
 522         int rc;
 523         u8 val;
 524         u8 desired_status;
 525
 526         might_sleep();
 527
 528         if (state == STATE_FORCE_TX_ON)
 529                 desired_status = STATE_TX_ON;
 530         else if (state == STATE_FORCE_TRX_OFF)
 531                 desired_status = STATE_TRX_OFF;
 532         else
 533                 desired_status = state;
 534
 535         do {
 536                 rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &val);
 537                 if (rc)
 538                         goto err;
 539         } while (val == STATE_TRANSITION_IN_PROGRESS);
 540
 541         if (val == desired_status)
 542                 return 0;
 543
 544         /* state is equal to phy states */
 545         rc = at86rf230_write_subreg(lp, SR_TRX_CMD, state);
 546         if (rc)
 547                 goto err;
 548
 549         do {
 550                 rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &val);
 551                 if (rc)
 552                         goto err;
 553         } while (val == STATE_TRANSITION_IN_PROGRESS);
 554
 555
 556         if (val == desired_status ||
 557             (desired_status == STATE_RX_ON && val == STATE_BUSY_RX) ||
 558             (desired_status == STATE_RX_AACK_ON && val == STATE_BUSY_RX_AACK))
 559                 return 0;
 560
 561         pr_err("unexpected state change: %d, asked for %d\n", val, state);
 562         return -EBUSY;
 563
 564 err:
 565         pr_err("error: %d\n", rc);
 566         return rc;
 567 }
 568
 569 static int
 570 at86rf230_start(struct ieee802154_dev *dev)
 571 {
 572         struct at86rf230_local *lp = dev->priv;
 573         u8 rc;
 574
 575         rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
 576         if (rc)
 577                 return rc;
 578
 579         rc = at86rf230_state(dev, STATE_TX_ON);
 580         if (rc)
 581                 return rc;
 582
 583         return at86rf230_state(dev, STATE_RX_AACK_ON);
 584 }
 585
 586 static void
 587 at86rf230_stop(struct ieee802154_dev *dev)
 588 {
 589         at86rf230_state(dev, STATE_FORCE_TRX_OFF);
 590 }
 591
 592 static int
 593 at86rf230_set_channel(struct at86rf230_local *lp, int page, int channel)
 594 {
 595         lp->rssi_base_val = -91;
 596
 597         return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
 598 }
 599
 600 static int
 601 at86rf212_set_channel(struct at86rf230_local *lp, int page, int channel)
 602 {
 603         int rc;
 604
 605         if (channel == 0)
 606                 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
 607         else
 608                 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
 609         if (rc < 0)
 610                 return rc;
 611
 612         if (page == 0) {
 613                 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
 614                 lp->rssi_base_val = -100;
 615         } else {
 616                 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
 617                 lp->rssi_base_val = -98;
 618         }
 619         if (rc < 0)
 620                 return rc;
 621
 622         return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
 623 }
 624
 625 static int
 626 at86rf230_channel(struct ieee802154_dev *dev, int page, int channel)
 627 {
 628         struct at86rf230_local *lp = dev->priv;
 629         int rc;
 630
 631         might_sleep();
 632
 633         if (page < 0 || page > 31 ||
 634             !(lp->dev->phy->channels_supported[page] & BIT(channel))) {
 635                 WARN_ON(1);
 636                 return -EINVAL;
 637         }
 638
 639         if (is_rf212(lp))
 640                 rc = at86rf212_set_channel(lp, page, channel);
 641         else
 642                 rc = at86rf230_set_channel(lp, page, channel);
 643         if (rc < 0)
 644                 return rc;
 645
 646         msleep(1); /* Wait for PLL */
 647         dev->phy->current_channel = channel;
 648         dev->phy->current_page = page;
 649
 650         return 0;
 651 }
 652
 653 static int
 654 at86rf230_xmit(struct ieee802154_dev *dev, struct sk_buff *skb)
 655 {
 656         struct at86rf230_local *lp = dev->priv;
 657         int rc;
 658         unsigned long flags;
 659
 660         spin_lock_irqsave(&lp->lock, flags);
 661         if  (lp->irq_busy) {
 662                 spin_unlock_irqrestore(&lp->lock, flags);
 663                 return -EBUSY;
 664         }
 665         spin_unlock_irqrestore(&lp->lock, flags);
 666
 667         might_sleep();
 668
 669         rc = at86rf230_state(dev, STATE_FORCE_TX_ON);
 670         if (rc)
 671                 goto err;
 672
 673         spin_lock_irqsave(&lp->lock, flags);
 674         lp->is_tx = 1;
 675         reinit_completion(&lp->tx_complete);
 676         spin_unlock_irqrestore(&lp->lock, flags);
 677
 678         rc = at86rf230_write_fbuf(lp, skb->data, skb->len);
 679         if (rc)
 680                 goto err_rx;
 681
 682         if (lp->tx_aret) {
 683                 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_TX_ARET_ON);
 684                 if (rc)
 685                         goto err_rx;
 686         }
 687
 688         rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_BUSY_TX);
 689         if (rc)
 690                 goto err_rx;
 691
 692         rc = wait_for_completion_interruptible(&lp->tx_complete);
 693         if (rc < 0)
 694                 goto err_rx;
 695
 696         return at86rf230_start(dev);
 697 err_rx:
 698         at86rf230_start(dev);
 699 err:
 700         pr_err("error: %d\n", rc);
 701
 702         spin_lock_irqsave(&lp->lock, flags);
 703         lp->is_tx = 0;
 704         spin_unlock_irqrestore(&lp->lock, flags);
 705
 706         return rc;
 707 }
 708
 709 static int at86rf230_rx(struct at86rf230_local *lp)
 710 {
 711         u8 len = 128, lqi = 0;
 712         struct sk_buff *skb;
 713
 714         skb = alloc_skb(len, GFP_KERNEL);
 715
 716         if (!skb)
 717                 return -ENOMEM;
 718
 719         if (at86rf230_read_fbuf(lp, skb_put(skb, len), &len, &lqi))
 720                 goto err;
 721
 722         if (len < 2)
 723                 goto err;
 724
 725         skb_trim(skb, len - 2); /* We do not put CRC into the frame */
 726
 727         ieee802154_rx_irqsafe(lp->dev, skb, lqi);
 728
 729         dev_dbg(&lp->spi->dev, "READ_FBUF: %d %x\n", len, lqi);
 730
 731         return 0;
 732 err:
 733         pr_debug("received frame is too small\n");
 734
 735         kfree_skb(skb);
 736         return -EINVAL;
 737 }
 738
 739 static int
 740 at86rf230_set_hw_addr_filt(struct ieee802154_dev *dev,
 741                            struct ieee802154_hw_addr_filt *filt,
 742                            unsigned long changed)
 743 {
 744         struct at86rf230_local *lp = dev->priv;
 745
 746         if (changed & IEEE802515_AFILT_SADDR_CHANGED) {
 747                 u16 addr = le16_to_cpu(filt->short_addr);
 748
 749                 dev_vdbg(&lp->spi->dev,
 750                         "at86rf230_set_hw_addr_filt called for saddr\n");
 751                 __at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
 752                 __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
 753         }
 754
 755         if (changed & IEEE802515_AFILT_PANID_CHANGED) {
 756                 u16 pan = le16_to_cpu(filt->pan_id);
 757
 758                 dev_vdbg(&lp->spi->dev,
 759                         "at86rf230_set_hw_addr_filt called for pan id\n");
 760                 __at86rf230_write(lp, RG_PAN_ID_0, pan);
 761                 __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
 762         }
 763
 764         if (changed & IEEE802515_AFILT_IEEEADDR_CHANGED) {
 765                 u8 i, addr[8];
 766
 767                 memcpy(addr, &filt->ieee_addr, 8);
 768                 dev_vdbg(&lp->spi->dev,
 769                         "at86rf230_set_hw_addr_filt called for IEEE addr\n");
 770                 for (i = 0; i < 8; i++)
 771                         __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
 772         }
 773
 774         if (changed & IEEE802515_AFILT_PANC_CHANGED) {
 775                 dev_vdbg(&lp->spi->dev,
 776                         "at86rf230_set_hw_addr_filt called for panc change\n");
 777                 if (filt->pan_coord)
 778                         at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
 779                 else
 780                         at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
 781         }
 782
 783         return 0;
 784 }
 785
 786 static int
 787 at86rf212_set_txpower(struct ieee802154_dev *dev, int db)
 788 {
 789         struct at86rf230_local *lp = dev->priv;
 790
 791         /* typical maximum output is 5dBm with RG_PHY_TX_PWR 0x60, lower five
 792          * bits decrease power in 1dB steps. 0x60 represents extra PA gain of
 793          * 0dB.
 794          * thus, supported values for db range from -26 to 5, for 31dB of
 795          * reduction to 0dB of reduction.
 796          */
 797         if (db > 5 || db < -26)
 798                 return -EINVAL;
 799
 800         db = -(db - 5);
 801
 802         return __at86rf230_write(lp, RG_PHY_TX_PWR, 0x60 | db);
 803 }
 804
 805 static int
 806 at86rf212_set_lbt(struct ieee802154_dev *dev, bool on)
 807 {
 808         struct at86rf230_local *lp = dev->priv;
 809
 810         return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
 811 }
 812
 813 static int
 814 at86rf212_set_cca_mode(struct ieee802154_dev *dev, u8 mode)
 815 {
 816         struct at86rf230_local *lp = dev->priv;
 817
 818         return at86rf230_write_subreg(lp, SR_CCA_MODE, mode);
 819 }
 820
 821 static int
 822 at86rf212_set_cca_ed_level(struct ieee802154_dev *dev, s32 level)
 823 {
 824         struct at86rf230_local *lp = dev->priv;
 825         int desens_steps;
 826
 827         if (level < lp->rssi_base_val || level > 30)
 828                 return -EINVAL;
 829
 830         desens_steps = (level - lp->rssi_base_val) * 100 / 207;
 831
 832         return at86rf230_write_subreg(lp, SR_CCA_ED_THRES, desens_steps);
 833 }
 834
 835 static int
 836 at86rf212_set_csma_params(struct ieee802154_dev *dev, u8 min_be, u8 max_be,
 837                           u8 retries)
 838 {
 839         struct at86rf230_local *lp = dev->priv;
 840         int rc;
 841
 842         if (min_be > max_be || max_be > 8 || retries > 5)
 843                 return -EINVAL;
 844
 845         rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
 846         if (rc)
 847                 return rc;
 848
 849         rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
 850         if (rc)
 851                 return rc;
 852
 853         return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries);
 854 }
 855
 856 static int
 857 at86rf212_set_frame_retries(struct ieee802154_dev *dev, s8 retries)
 858 {
 859         struct at86rf230_local *lp = dev->priv;
 860         int rc = 0;
 861
 862         if (retries < -1 || retries > 15)
 863                 return -EINVAL;
 864
 865         lp->tx_aret = retries >= 0;
 866
 867         if (retries >= 0)
 868                 rc = at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);
 869
 870         return rc;
 871 }
 872
 873 static struct ieee802154_ops at86rf230_ops = {
 874         .owner = THIS_MODULE,
 875         .xmit = at86rf230_xmit,
 876         .ed = at86rf230_ed,
 877         .set_channel = at86rf230_channel,
 878         .start = at86rf230_start,
 879         .stop = at86rf230_stop,
 880         .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
 881 };
 882
 883 static struct ieee802154_ops at86rf212_ops = {
 884         .owner = THIS_MODULE,
 885         .xmit = at86rf230_xmit,
 886         .ed = at86rf230_ed,
 887         .set_channel = at86rf230_channel,
 888         .start = at86rf230_start,
 889         .stop = at86rf230_stop,
 890         .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
 891         .set_txpower = at86rf212_set_txpower,
 892         .set_lbt = at86rf212_set_lbt,
 893         .set_cca_mode = at86rf212_set_cca_mode,
 894         .set_cca_ed_level = at86rf212_set_cca_ed_level,
 895         .set_csma_params = at86rf212_set_csma_params,
 896         .set_frame_retries = at86rf212_set_frame_retries,
 897 };
 898
 899 static void at86rf230_irqwork(struct work_struct *work)
 900 {
 901         struct at86rf230_local *lp =
 902                 container_of(work, struct at86rf230_local, irqwork);
 903         u8 status = 0, val;
 904         int rc;
 905         unsigned long flags;
 906
 907         rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &val);
 908         status |= val;
 909
 910         status &= ~IRQ_PLL_LOCK; /* ignore */
 911         status &= ~IRQ_RX_START; /* ignore */
 912         status &= ~IRQ_AMI; /* ignore */
 913         status &= ~IRQ_TRX_UR; /* FIXME: possibly handle ???*/
 914
 915         if (status & IRQ_TRX_END) {
 916                 status &= ~IRQ_TRX_END;
 917                 spin_lock_irqsave(&lp->lock, flags);
 918                 if (lp->is_tx) {
 919                         lp->is_tx = 0;
 920                         spin_unlock_irqrestore(&lp->lock, flags);
 921                         complete(&lp->tx_complete);
 922                 } else {
 923                         spin_unlock_irqrestore(&lp->lock, flags);
 924                         at86rf230_rx(lp);
 925                 }
 926         }
 927
 928         spin_lock_irqsave(&lp->lock, flags);
 929         lp->irq_busy = 0;
 930         spin_unlock_irqrestore(&lp->lock, flags);
 931 }
 932
 933 static void at86rf230_irqwork_level(struct work_struct *work)
 934 {
 935         struct at86rf230_local *lp =
 936                 container_of(work, struct at86rf230_local, irqwork);
 937
 938         at86rf230_irqwork(work);
 939
 940         enable_irq(lp->spi->irq);
 941 }
 942
 943 static irqreturn_t at86rf230_isr(int irq, void *data)
 944 {
 945         struct at86rf230_local *lp = data;
 946         unsigned long flags;
 947
 948         spin_lock_irqsave(&lp->lock, flags);
 949         lp->irq_busy = 1;
 950         spin_unlock_irqrestore(&lp->lock, flags);
 951
 952         schedule_work(&lp->irqwork);
 953
 954         return IRQ_HANDLED;
 955 }
 956
 957 static irqreturn_t at86rf230_isr_level(int irq, void *data)
 958 {
 959         disable_irq_nosync(irq);
 960
 961         return at86rf230_isr(irq, data);
 962 }
 963
 964 static int at86rf230_hw_init(struct at86rf230_local *lp)
 965 {
 966         int rc, irq_pol, irq_type;
 967         u8 dvdd;
 968         u8 csma_seed[2];
 969
 970         rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_FORCE_TRX_OFF);
 971         if (rc)
 972                 return rc;
 973
 974         irq_type = irq_get_trigger_type(lp->spi->irq);
 975         /* configure irq polarity, defaults to high active */
 976         if (irq_type & (IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW))
 977                 irq_pol = IRQ_ACTIVE_LOW;
 978         else
 979                 irq_pol = IRQ_ACTIVE_HIGH;
 980
 981         rc = at86rf230_write_subreg(lp, SR_IRQ_POLARITY, irq_pol);
 982         if (rc)
 983                 return rc;
 984
 985         rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
 986         if (rc)
 987                 return rc;
 988
 989         get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
 990         rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
 991         if (rc)
 992                 return rc;
 993         rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
 994         if (rc)
 995                 return rc;
 996
 997         /* CLKM changes are applied immediately */
 998         rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
 999         if (rc)
1000                 return rc;
1001
1002         /* Turn CLKM Off */
1003         rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
1004         if (rc)
1005                 return rc;
1006         /* Wait the next SLEEP cycle */
1007         msleep(100);
1008
1009         rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &dvdd);
1010         if (rc)
1011                 return rc;
1012         if (!dvdd) {
1013                 dev_err(&lp->spi->dev, "DVDD error\n");
1014                 return -EINVAL;
1015         }
1016
1017         return 0;
1018 }
1019
1020 static struct at86rf230_platform_data *
1021 at86rf230_get_pdata(struct spi_device *spi)
1022 {
1023         struct at86rf230_platform_data *pdata;
1024
1025         if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node)
1026                 return spi->dev.platform_data;
1027
1028         pdata = devm_kzalloc(&spi->dev, sizeof(*pdata), GFP_KERNEL);
1029         if (!pdata)
1030                 goto done;
1031
1032         pdata->rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0);
1033         pdata->slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0);
1034
1035         spi->dev.platform_data = pdata;
1036 done:
1037         return pdata;
1038 }
1039
1040 static int at86rf230_probe(struct spi_device *spi)
1041 {
1042         struct at86rf230_platform_data *pdata;
1043         struct ieee802154_dev *dev;
1044         struct at86rf230_local *lp;
1045         u16 man_id = 0;
1046         u8 part = 0, version = 0, status;
1047         irq_handler_t irq_handler;
1048         work_func_t irq_worker;
1049         int rc, irq_type;
1050         const char *chip;
1051         struct ieee802154_ops *ops = NULL;
1052
1053         if (!spi->irq) {
1054                 dev_err(&spi->dev, "no IRQ specified\n");
1055                 return -EINVAL;
1056         }
1057
1058         pdata = at86rf230_get_pdata(spi);
1059         if (!pdata) {
1060                 dev_err(&spi->dev, "no platform_data\n");
1061                 return -EINVAL;
1062         }
1063
1064         if (gpio_is_valid(pdata->rstn)) {
1065                 rc = devm_gpio_request_one(&spi->dev, pdata->rstn,
1066                                            GPIOF_OUT_INIT_HIGH, "rstn");
1067                 if (rc)
1068                         return rc;
1069         }
1070
1071         if (gpio_is_valid(pdata->slp_tr)) {
1072                 rc = devm_gpio_request_one(&spi->dev, pdata->slp_tr,
1073                                            GPIOF_OUT_INIT_LOW, "slp_tr");
1074                 if (rc)
1075                         return rc;
1076         }
1077
1078         /* Reset */
1079         if (gpio_is_valid(pdata->rstn)) {
1080                 udelay(1);
1081                 gpio_set_value(pdata->rstn, 0);
1082                 udelay(1);
1083                 gpio_set_value(pdata->rstn, 1);
1084                 usleep_range(120, 240);
1085         }
1086
1087         rc = __at86rf230_detect_device(spi, &man_id, &part, &version);
1088         if (rc < 0)
1089                 return rc;
1090
1091         if (man_id != 0x001f) {
1092                 dev_err(&spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
1093                         man_id >> 8, man_id & 0xFF);
1094                 return -EINVAL;
1095         }
1096
1097         switch (part) {
1098         case 2:
1099                 chip = "at86rf230";
1100                 /* FIXME: should be easy to support; */
1101                 break;
1102         case 3:
1103                 chip = "at86rf231";
1104                 ops = &at86rf230_ops;
1105                 break;
1106         case 7:
1107                 chip = "at86rf212";
1108                 if (version == 1)
1109                         ops = &at86rf212_ops;
1110                 break;
1111         case 11:
1112                 chip = "at86rf233";
1113                 ops = &at86rf230_ops;
1114                 break;
1115         default:
1116                 chip = "UNKNOWN";
1117                 break;
1118         }
1119
1120         dev_info(&spi->dev, "Detected %s chip version %d\n", chip, version);
1121         if (!ops)
1122                 return -ENOTSUPP;
1123
1124         dev = ieee802154_alloc_device(sizeof(*lp), ops);
1125         if (!dev)
1126                 return -ENOMEM;
1127
1128         lp = dev->priv;
1129         lp->dev = dev;
1130         lp->part = part;
1131         lp->vers = version;
1132
1133         lp->spi = spi;
1134
1135         dev->parent = &spi->dev;
1136         dev->extra_tx_headroom = 0;
1137         dev->flags = IEEE802154_HW_OMIT_CKSUM | IEEE802154_HW_AACK;
1138
1139         irq_type = irq_get_trigger_type(spi->irq);
1140         if (irq_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
1141                 irq_worker = at86rf230_irqwork;
1142                 irq_handler = at86rf230_isr;
1143         } else {
1144                 irq_worker = at86rf230_irqwork_level;
1145                 irq_handler = at86rf230_isr_level;
1146         }
1147
1148         mutex_init(&lp->bmux);
1149         INIT_WORK(&lp->irqwork, irq_worker);
1150         spin_lock_init(&lp->lock);
1151         init_completion(&lp->tx_complete);
1152
1153         spi_set_drvdata(spi, lp);
1154
1155         if (is_rf212(lp)) {
1156                 dev->phy->channels_supported[0] = 0x00007FF;
1157                 dev->phy->channels_supported[2] = 0x00007FF;
1158         } else {
1159                 dev->phy->channels_supported[0] = 0x7FFF800;
1160         }
1161
1162         rc = at86rf230_hw_init(lp);
1163         if (rc)
1164                 goto err_hw_init;
1165
1166         /* Read irq status register to reset irq line */
1167         rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
1168         if (rc)
1169                 goto err_hw_init;
1170
1171         rc = devm_request_irq(&spi->dev, spi->irq, irq_handler, IRQF_SHARED,
1172                               dev_name(&spi->dev), lp);
1173         if (rc)
1174                 goto err_hw_init;
1175
1176         rc = ieee802154_register_device(lp->dev);
1177         if (rc)
1178                 goto err_hw_init;
1179
1180         return rc;
1181
1182 err_hw_init:
1183         flush_work(&lp->irqwork);
1184         mutex_destroy(&lp->bmux);
1185         ieee802154_free_device(lp->dev);
1186
1187         return rc;
1188 }
1189
1190 static int at86rf230_remove(struct spi_device *spi)
1191 {
1192         struct at86rf230_local *lp = spi_get_drvdata(spi);
1193
1194         /* mask all at86rf230 irq's */
1195         at86rf230_write_subreg(lp, SR_IRQ_MASK, 0);
1196         ieee802154_unregister_device(lp->dev);
1197         flush_work(&lp->irqwork);
1198         mutex_destroy(&lp->bmux);
1199         ieee802154_free_device(lp->dev);
1200         dev_dbg(&spi->dev, "unregistered at86rf230\n");
1201
1202         return 0;
1203 }
1204
1205 static const struct of_device_id at86rf230_of_match[] = {
1206         { .compatible = "atmel,at86rf230", },
1207         { .compatible = "atmel,at86rf231", },
1208         { .compatible = "atmel,at86rf233", },
1209         { .compatible = "atmel,at86rf212", },
1210         { },
1211 };
1212 MODULE_DEVICE_TABLE(of, at86rf230_of_match);
1213
1214 static const struct spi_device_id at86rf230_device_id[] = {
1215         { .name = "at86rf230", },
1216         { .name = "at86rf231", },
1217         { .name = "at86rf233", },
1218         { .name = "at86rf212", },
1219         { },
1220 };
1221 MODULE_DEVICE_TABLE(spi, at86rf230_device_id);
1222
1223 static struct spi_driver at86rf230_driver = {
1224         .id_table = at86rf230_device_id,
1225         .driver = {
1226                 .of_match_table = of_match_ptr(at86rf230_of_match),
1227                 .name   = "at86rf230",
1228                 .owner  = THIS_MODULE,
1229         },
1230         .probe      = at86rf230_probe,
1231         .remove     = at86rf230_remove,
1232 };
1233
1234 module_spi_driver(at86rf230_driver);
1235
1236 MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
1237 MODULE_LICENSE("GPL v2");