drivers/net/ethernet/stmicro/stmmac/stmmac_main.c

   1 /*******************************************************************************
   2   This is the driver for the ST MAC 10/100/1000 on-chip Ethernet controllers.
   3   ST Ethernet IPs are built around a Synopsys IP Core.
   4
   5   Copyright (C) 2007-2009  STMicroelectronics Ltd
   6
   7   This program is free software; you can redistribute it and/or modify it
   8   under the terms and conditions of the GNU General Public License,
   9   version 2, as published by the Free Software Foundation.
  10
  11   This program is distributed in the hope it will be useful, but WITHOUT
  12   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14   more details.
  15
  16   You should have received a copy of the GNU General Public License along with
  17   this program; if not, write to the Free Software Foundation, Inc.,
  18   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  19
  20   The full GNU General Public License is included in this distribution in
  21   the file called "COPYING".
  22
  23   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
  24
  25   Documentation available at:
  26         http://www.stlinux.com
  27   Support available at:
  28         https://bugzilla.stlinux.com/
  29 *******************************************************************************/
  30
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/kernel.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/etherdevice.h>
  36 #include <linux/platform_device.h>
  37 #include <linux/ip.h>
  38 #include <linux/tcp.h>
  39 #include <linux/skbuff.h>
  40 #include <linux/ethtool.h>
  41 #include <linux/if_ether.h>
  42 #include <linux/crc32.h>
  43 #include <linux/mii.h>
  44 #include <linux/phy.h>
  45 #include <linux/if.h>
  46 #include <linux/if_vlan.h>
  47 #include <linux/dma-mapping.h>
  48 #include <linux/slab.h>
  49 #include <linux/prefetch.h>
  50 #include "stmmac.h"
  51 #ifdef CONFIG_STMMAC_DEBUG_FS
  52 #include <linux/debugfs.h>
  53 #include <linux/seq_file.h>
  54 #endif
  55
  56 #define STMMAC_RESOURCE_NAME    "stmmaceth"
  57
  58 #undef STMMAC_DEBUG
  59 /*#define STMMAC_DEBUG*/
  60 #ifdef STMMAC_DEBUG
  61 #define DBG(nlevel, klevel, fmt, args...) \
  62                 ((void)(netif_msg_##nlevel(priv) && \
  63                 printk(KERN_##klevel fmt, ## args)))
  64 #else
  65 #define DBG(nlevel, klevel, fmt, args...) do { } while (0)
  66 #endif
  67
  68 #undef STMMAC_RX_DEBUG
  69 /*#define STMMAC_RX_DEBUG*/
  70 #ifdef STMMAC_RX_DEBUG
  71 #define RX_DBG(fmt, args...)  printk(fmt, ## args)
  72 #else
  73 #define RX_DBG(fmt, args...)  do { } while (0)
  74 #endif
  75
  76 #undef STMMAC_XMIT_DEBUG
  77 /*#define STMMAC_XMIT_DEBUG*/
  78 #ifdef STMMAC_TX_DEBUG
  79 #define TX_DBG(fmt, args...)  printk(fmt, ## args)
  80 #else
  81 #define TX_DBG(fmt, args...)  do { } while (0)
  82 #endif
  83
  84 #define STMMAC_ALIGN(x) L1_CACHE_ALIGN(x)
  85 #define JUMBO_LEN       9000
  86
  87 /* Module parameters */
  88 #define TX_TIMEO 5000 /* default 5 seconds */
  89 static int watchdog = TX_TIMEO;
  90 module_param(watchdog, int, S_IRUGO | S_IWUSR);
  91 MODULE_PARM_DESC(watchdog, "Transmit timeout in milliseconds");
  92
  93 static int debug = -1;          /* -1: default, 0: no output, 16:  all */
  94 module_param(debug, int, S_IRUGO | S_IWUSR);
  95 MODULE_PARM_DESC(debug, "Message Level (0: no output, 16: all)");
  96
  97 static int phyaddr = -1;
  98 module_param(phyaddr, int, S_IRUGO);
  99 MODULE_PARM_DESC(phyaddr, "Physical device address");
 100
 101 #define DMA_TX_SIZE 256
 102 static int dma_txsize = DMA_TX_SIZE;
 103 module_param(dma_txsize, int, S_IRUGO | S_IWUSR);
 104 MODULE_PARM_DESC(dma_txsize, "Number of descriptors in the TX list");
 105
 106 #define DMA_RX_SIZE 256
 107 static int dma_rxsize = DMA_RX_SIZE;
 108 module_param(dma_rxsize, int, S_IRUGO | S_IWUSR);
 109 MODULE_PARM_DESC(dma_rxsize, "Number of descriptors in the RX list");
 110
 111 static int flow_ctrl = FLOW_OFF;
 112 module_param(flow_ctrl, int, S_IRUGO | S_IWUSR);
 113 MODULE_PARM_DESC(flow_ctrl, "Flow control ability [on/off]");
 114
 115 static int pause = PAUSE_TIME;
 116 module_param(pause, int, S_IRUGO | S_IWUSR);
 117 MODULE_PARM_DESC(pause, "Flow Control Pause Time");
 118
 119 #define TC_DEFAULT 64
 120 static int tc = TC_DEFAULT;
 121 module_param(tc, int, S_IRUGO | S_IWUSR);
 122 MODULE_PARM_DESC(tc, "DMA threshold control value");
 123
 124 /* Pay attention to tune this parameter; take care of both
 125  * hardware capability and network stabitily/performance impact.
 126  * Many tests showed that ~4ms latency seems to be good enough. */
 127 #ifdef CONFIG_STMMAC_TIMER
 128 #define DEFAULT_PERIODIC_RATE   256
 129 static int tmrate = DEFAULT_PERIODIC_RATE;
 130 module_param(tmrate, int, S_IRUGO | S_IWUSR);
 131 MODULE_PARM_DESC(tmrate, "External timer freq. (default: 256Hz)");
 132 #endif
 133
 134 #define DMA_BUFFER_SIZE BUF_SIZE_2KiB
 135 static int buf_sz = DMA_BUFFER_SIZE;
 136 module_param(buf_sz, int, S_IRUGO | S_IWUSR);
 137 MODULE_PARM_DESC(buf_sz, "DMA buffer size");
 138
 139 static const u32 default_msg_level = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
 140                                       NETIF_MSG_LINK | NETIF_MSG_IFUP |
 141                                       NETIF_MSG_IFDOWN | NETIF_MSG_TIMER);
 142
 143 static irqreturn_t stmmac_interrupt(int irq, void *dev_id);
 144
 145 /**
 146  * stmmac_verify_args - verify the driver parameters.
 147  * Description: it verifies if some wrong parameter is passed to the driver.
 148  * Note that wrong parameters are replaced with the default values.
 149  */
 150 static void stmmac_verify_args(void)
 151 {
 152         if (unlikely(watchdog < 0))
 153                 watchdog = TX_TIMEO;
 154         if (unlikely(dma_rxsize < 0))
 155                 dma_rxsize = DMA_RX_SIZE;
 156         if (unlikely(dma_txsize < 0))
 157                 dma_txsize = DMA_TX_SIZE;
 158         if (unlikely((buf_sz < DMA_BUFFER_SIZE) || (buf_sz > BUF_SIZE_16KiB)))
 159                 buf_sz = DMA_BUFFER_SIZE;
 160         if (unlikely(flow_ctrl > 1))
 161                 flow_ctrl = FLOW_AUTO;
 162         else if (likely(flow_ctrl < 0))
 163                 flow_ctrl = FLOW_OFF;
 164         if (unlikely((pause < 0) || (pause > 0xffff)))
 165                 pause = PAUSE_TIME;
 166 }
 167
 168 #if defined(STMMAC_XMIT_DEBUG) || defined(STMMAC_RX_DEBUG)
 169 static void print_pkt(unsigned char *buf, int len)
 170 {
 171         int j;
 172         pr_info("len = %d byte, buf addr: 0x%p", len, buf);
 173         for (j = 0; j < len; j++) {
 174                 if ((j % 16) == 0)
 175                         pr_info("\n %03x:", j);
 176                 pr_info(" %02x", buf[j]);
 177         }
 178         pr_info("\n");
 179 }
 180 #endif
 181
 182 /* minimum number of free TX descriptors required to wake up TX process */
 183 #define STMMAC_TX_THRESH(x)     (x->dma_tx_size/4)
 184
 185 static inline u32 stmmac_tx_avail(struct stmmac_priv *priv)
 186 {
 187         return priv->dirty_tx + priv->dma_tx_size - priv->cur_tx - 1;
 188 }
 189
 190 /* On some ST platforms, some HW system configuraton registers have to be
 191  * set according to the link speed negotiated.
 192  */
 193 static inline void stmmac_hw_fix_mac_speed(struct stmmac_priv *priv)
 194 {
 195         struct phy_device *phydev = priv->phydev;
 196
 197         if (likely(priv->plat->fix_mac_speed))
 198                 priv->plat->fix_mac_speed(priv->plat->bsp_priv,
 199                                           phydev->speed);
 200 }
 201
 202 /**
 203  * stmmac_adjust_link
 204  * @dev: net device structure
 205  * Description: it adjusts the link parameters.
 206  */
 207 static void stmmac_adjust_link(struct net_device *dev)
 208 {
 209         struct stmmac_priv *priv = netdev_priv(dev);
 210         struct phy_device *phydev = priv->phydev;
 211         unsigned long flags;
 212         int new_state = 0;
 213         unsigned int fc = priv->flow_ctrl, pause_time = priv->pause;
 214
 215         if (phydev == NULL)
 216                 return;
 217
 218         DBG(probe, DEBUG, "stmmac_adjust_link: called.  address %d link %d\n",
 219             phydev->addr, phydev->link);
 220
 221         spin_lock_irqsave(&priv->lock, flags);
 222         if (phydev->link) {
 223                 u32 ctrl = readl(priv->ioaddr + MAC_CTRL_REG);
 224
 225                 /* Now we make sure that we can be in full duplex mode.
 226                  * If not, we operate in half-duplex mode. */
 227                 if (phydev->duplex != priv->oldduplex) {
 228                         new_state = 1;
 229                         if (!(phydev->duplex))
 230                                 ctrl &= ~priv->hw->link.duplex;
 231                         else
 232                                 ctrl |= priv->hw->link.duplex;
 233                         priv->oldduplex = phydev->duplex;
 234                 }
 235                 /* Flow Control operation */
 236                 if (phydev->pause)
 237                         priv->hw->mac->flow_ctrl(priv->ioaddr, phydev->duplex,
 238                                                  fc, pause_time);
 239
 240                 if (phydev->speed != priv->speed) {
 241                         new_state = 1;
 242                         switch (phydev->speed) {
 243                         case 1000:
 244                                 if (likely(priv->plat->has_gmac))
 245                                         ctrl &= ~priv->hw->link.port;
 246                                 stmmac_hw_fix_mac_speed(priv);
 247                                 break;
 248                         case 100:
 249                         case 10:
 250                                 if (priv->plat->has_gmac) {
 251                                         ctrl |= priv->hw->link.port;
 252                                         if (phydev->speed == SPEED_100) {
 253                                                 ctrl |= priv->hw->link.speed;
 254                                         } else {
 255                                                 ctrl &= ~(priv->hw->link.speed);
 256                                         }
 257                                 } else {
 258                                         ctrl &= ~priv->hw->link.port;
 259                                 }
 260                                 stmmac_hw_fix_mac_speed(priv);
 261                                 break;
 262                         default:
 263                                 if (netif_msg_link(priv))
 264                                         pr_warning("%s: Speed (%d) is not 10"
 265                                        " or 100!\n", dev->name, phydev->speed);
 266                                 break;
 267                         }
 268
 269                         priv->speed = phydev->speed;
 270                 }
 271
 272                 writel(ctrl, priv->ioaddr + MAC_CTRL_REG);
 273
 274                 if (!priv->oldlink) {
 275                         new_state = 1;
 276                         priv->oldlink = 1;
 277                 }
 278         } else if (priv->oldlink) {
 279                 new_state = 1;
 280                 priv->oldlink = 0;
 281                 priv->speed = 0;
 282                 priv->oldduplex = -1;
 283         }
 284
 285         if (new_state && netif_msg_link(priv))
 286                 phy_print_status(phydev);
 287
 288         spin_unlock_irqrestore(&priv->lock, flags);
 289
 290         DBG(probe, DEBUG, "stmmac_adjust_link: exiting\n");
 291 }
 292
 293 /**
 294  * stmmac_init_phy - PHY initialization
 295  * @dev: net device structure
 296  * Description: it initializes the driver's PHY state, and attaches the PHY
 297  * to the mac driver.
 298  *  Return value:
 299  *  0 on success
 300  */
 301 static int stmmac_init_phy(struct net_device *dev)
 302 {
 303         struct stmmac_priv *priv = netdev_priv(dev);
 304         struct phy_device *phydev;
 305         char phy_id[MII_BUS_ID_SIZE + 3];
 306         char bus_id[MII_BUS_ID_SIZE];
 307         int interface = priv->plat->interface;
 308         priv->oldlink = 0;
 309         priv->speed = 0;
 310         priv->oldduplex = -1;
 311
 312         snprintf(bus_id, MII_BUS_ID_SIZE, "%x", priv->plat->bus_id);
 313         snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, bus_id,
 314                  priv->plat->phy_addr);
 315         pr_debug("stmmac_init_phy:  trying to attach to %s\n", phy_id);
 316
 317         phydev = phy_connect(dev, phy_id, &stmmac_adjust_link, 0, interface);
 318
 319         if (IS_ERR(phydev)) {
 320                 pr_err("%s: Could not attach to PHY\n", dev->name);
 321                 return PTR_ERR(phydev);
 322         }
 323
 324         /* Stop Advertising 1000BASE Capability if interface is not GMII */
 325         if ((interface) && ((interface == PHY_INTERFACE_MODE_MII) ||
 326             (interface == PHY_INTERFACE_MODE_RMII))) {
 327                 phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
 328                                       SUPPORTED_Asym_Pause);
 329                 priv->phydev->advertising = priv->phydev->supported;
 330         }
 331
 332         /*
 333          * Broken HW is sometimes missing the pull-up resistor on the
 334          * MDIO line, which results in reads to non-existent devices returning
 335          * 0 rather than 0xffff. Catch this here and treat 0 as a non-existent
 336          * device as well.
 337          * Note: phydev->phy_id is the result of reading the UID PHY registers.
 338          */
 339         if (phydev->phy_id == 0) {
 340                 phy_disconnect(phydev);
 341                 return -ENODEV;
 342         }
 343         pr_debug("stmmac_init_phy:  %s: attached to PHY (UID 0x%x)"
 344                  " Link = %d\n", dev->name, phydev->phy_id, phydev->link);
 345
 346         priv->phydev = phydev;
 347
 348         return 0;
 349 }
 350
 351 static inline void stmmac_enable_mac(void __iomem *ioaddr)
 352 {
 353         u32 value = readl(ioaddr + MAC_CTRL_REG);
 354
 355         value |= MAC_RNABLE_RX | MAC_ENABLE_TX;
 356         writel(value, ioaddr + MAC_CTRL_REG);
 357 }
 358
 359 static inline void stmmac_disable_mac(void __iomem *ioaddr)
 360 {
 361         u32 value = readl(ioaddr + MAC_CTRL_REG);
 362
 363         value &= ~(MAC_ENABLE_TX | MAC_RNABLE_RX);
 364         writel(value, ioaddr + MAC_CTRL_REG);
 365 }
 366
 367 /**
 368  * display_ring
 369  * @p: pointer to the ring.
 370  * @size: size of the ring.
 371  * Description: display all the descriptors within the ring.
 372  */
 373 static void display_ring(struct dma_desc *p, int size)
 374 {
 375         struct tmp_s {
 376                 u64 a;
 377                 unsigned int b;
 378                 unsigned int c;
 379         };
 380         int i;
 381         for (i = 0; i < size; i++) {
 382                 struct tmp_s *x = (struct tmp_s *)(p + i);
 383                 pr_info("\t%d [0x%x]: DES0=0x%x DES1=0x%x BUF1=0x%x BUF2=0x%x",
 384                        i, (unsigned int)virt_to_phys(&p[i]),
 385                        (unsigned int)(x->a), (unsigned int)((x->a) >> 32),
 386                        x->b, x->c);
 387                 pr_info("\n");
 388         }
 389 }
 390
 391 /**
 392  * init_dma_desc_rings - init the RX/TX descriptor rings
 393  * @dev: net device structure
 394  * Description:  this function initializes the DMA RX/TX descriptors
 395  * and allocates the socket buffers.
 396  */
 397 static void init_dma_desc_rings(struct net_device *dev)
 398 {
 399         int i;
 400         struct stmmac_priv *priv = netdev_priv(dev);
 401         struct sk_buff *skb;
 402         unsigned int txsize = priv->dma_tx_size;
 403         unsigned int rxsize = priv->dma_rx_size;
 404         unsigned int bfsize = priv->dma_buf_sz;
 405         int buff2_needed = 0, dis_ic = 0;
 406
 407         /* Set the Buffer size according to the MTU;
 408          * indeed, in case of jumbo we need to bump-up the buffer sizes.
 409          */
 410         if (unlikely(dev->mtu >= BUF_SIZE_8KiB))
 411                 bfsize = BUF_SIZE_16KiB;
 412         else if (unlikely(dev->mtu >= BUF_SIZE_4KiB))
 413                 bfsize = BUF_SIZE_8KiB;
 414         else if (unlikely(dev->mtu >= BUF_SIZE_2KiB))
 415                 bfsize = BUF_SIZE_4KiB;
 416         else if (unlikely(dev->mtu >= DMA_BUFFER_SIZE))
 417                 bfsize = BUF_SIZE_2KiB;
 418         else
 419                 bfsize = DMA_BUFFER_SIZE;
 420
 421 #ifdef CONFIG_STMMAC_TIMER
 422         /* Disable interrupts on completion for the reception if timer is on */
 423         if (likely(priv->tm->enable))
 424                 dis_ic = 1;
 425 #endif
 426         /* If the MTU exceeds 8k so use the second buffer in the chain */
 427         if (bfsize >= BUF_SIZE_8KiB)
 428                 buff2_needed = 1;
 429
 430         DBG(probe, INFO, "stmmac: txsize %d, rxsize %d, bfsize %d\n",
 431             txsize, rxsize, bfsize);
 432
 433         priv->rx_skbuff_dma = kmalloc(rxsize * sizeof(dma_addr_t), GFP_KERNEL);
 434         priv->rx_skbuff =
 435             kmalloc(sizeof(struct sk_buff *) * rxsize, GFP_KERNEL);
 436         priv->dma_rx =
 437             (struct dma_desc *)dma_alloc_coherent(priv->device,
 438                                                   rxsize *
 439                                                   sizeof(struct dma_desc),
 440                                                   &priv->dma_rx_phy,
 441                                                   GFP_KERNEL);
 442         priv->tx_skbuff = kmalloc(sizeof(struct sk_buff *) * txsize,
 443                                        GFP_KERNEL);
 444         priv->dma_tx =
 445             (struct dma_desc *)dma_alloc_coherent(priv->device,
 446                                                   txsize *
 447                                                   sizeof(struct dma_desc),
 448                                                   &priv->dma_tx_phy,
 449                                                   GFP_KERNEL);
 450
 451         if ((priv->dma_rx == NULL) || (priv->dma_tx == NULL)) {
 452                 pr_err("%s:ERROR allocating the DMA Tx/Rx desc\n", __func__);
 453                 return;
 454         }
 455
 456         DBG(probe, INFO, "stmmac (%s) DMA desc rings: virt addr (Rx %p, "
 457             "Tx %p)\n\tDMA phy addr (Rx 0x%08x, Tx 0x%08x)\n",
 458             dev->name, priv->dma_rx, priv->dma_tx,
 459             (unsigned int)priv->dma_rx_phy, (unsigned int)priv->dma_tx_phy);
 460
 461         /* RX INITIALIZATION */
 462         DBG(probe, INFO, "stmmac: SKB addresses:\n"
 463                          "skb\t\tskb data\tdma data\n");
 464
 465         for (i = 0; i < rxsize; i++) {
 466                 struct dma_desc *p = priv->dma_rx + i;
 467
 468                 skb = netdev_alloc_skb_ip_align(dev, bfsize);
 469                 if (unlikely(skb == NULL)) {
 470                         pr_err("%s: Rx init fails; skb is NULL\n", __func__);
 471                         break;
 472                 }
 473                 priv->rx_skbuff[i] = skb;
 474                 priv->rx_skbuff_dma[i] = dma_map_single(priv->device, skb->data,
 475                                                 bfsize, DMA_FROM_DEVICE);
 476
 477                 p->des2 = priv->rx_skbuff_dma[i];
 478                 if (unlikely(buff2_needed))
 479                         p->des3 = p->des2 + BUF_SIZE_8KiB;
 480                 DBG(probe, INFO, "[%p]\t[%p]\t[%x]\n", priv->rx_skbuff[i],
 481                         priv->rx_skbuff[i]->data, priv->rx_skbuff_dma[i]);
 482         }
 483         priv->cur_rx = 0;
 484         priv->dirty_rx = (unsigned int)(i - rxsize);
 485         priv->dma_buf_sz = bfsize;
 486         buf_sz = bfsize;
 487
 488         /* TX INITIALIZATION */
 489         for (i = 0; i < txsize; i++) {
 490                 priv->tx_skbuff[i] = NULL;
 491                 priv->dma_tx[i].des2 = 0;
 492         }
 493         priv->dirty_tx = 0;
 494         priv->cur_tx = 0;
 495
 496         /* Clear the Rx/Tx descriptors */
 497         priv->hw->desc->init_rx_desc(priv->dma_rx, rxsize, dis_ic);
 498         priv->hw->desc->init_tx_desc(priv->dma_tx, txsize);
 499
 500         if (netif_msg_hw(priv)) {
 501                 pr_info("RX descriptor ring:\n");
 502                 display_ring(priv->dma_rx, rxsize);
 503                 pr_info("TX descriptor ring:\n");
 504                 display_ring(priv->dma_tx, txsize);
 505         }
 506 }
 507
 508 static void dma_free_rx_skbufs(struct stmmac_priv *priv)
 509 {
 510         int i;
 511
 512         for (i = 0; i < priv->dma_rx_size; i++) {
 513                 if (priv->rx_skbuff[i]) {
 514                         dma_unmap_single(priv->device, priv->rx_skbuff_dma[i],
 515                                          priv->dma_buf_sz, DMA_FROM_DEVICE);
 516                         dev_kfree_skb_any(priv->rx_skbuff[i]);
 517                 }
 518                 priv->rx_skbuff[i] = NULL;
 519         }
 520 }
 521
 522 static void dma_free_tx_skbufs(struct stmmac_priv *priv)
 523 {
 524         int i;
 525
 526         for (i = 0; i < priv->dma_tx_size; i++) {
 527                 if (priv->tx_skbuff[i] != NULL) {
 528                         struct dma_desc *p = priv->dma_tx + i;
 529                         if (p->des2)
 530                                 dma_unmap_single(priv->device, p->des2,
 531                                                  priv->hw->desc->get_tx_len(p),
 532                                                  DMA_TO_DEVICE);
 533                         dev_kfree_skb_any(priv->tx_skbuff[i]);
 534                         priv->tx_skbuff[i] = NULL;
 535                 }
 536         }
 537 }
 538
 539 static void free_dma_desc_resources(struct stmmac_priv *priv)
 540 {
 541         /* Release the DMA TX/RX socket buffers */
 542         dma_free_rx_skbufs(priv);
 543         dma_free_tx_skbufs(priv);
 544
 545         /* Free the region of consistent memory previously allocated for
 546          * the DMA */
 547         dma_free_coherent(priv->device,
 548                           priv->dma_tx_size * sizeof(struct dma_desc),
 549                           priv->dma_tx, priv->dma_tx_phy);
 550         dma_free_coherent(priv->device,
 551                           priv->dma_rx_size * sizeof(struct dma_desc),
 552                           priv->dma_rx, priv->dma_rx_phy);
 553         kfree(priv->rx_skbuff_dma);
 554         kfree(priv->rx_skbuff);
 555         kfree(priv->tx_skbuff);
 556 }
 557
 558 /**
 559  *  stmmac_dma_operation_mode - HW DMA operation mode
 560  *  @priv : pointer to the private device structure.
 561  *  Description: it sets the DMA operation mode: tx/rx DMA thresholds
 562  *  or Store-And-Forward capability.
 563  */
 564 static void stmmac_dma_operation_mode(struct stmmac_priv *priv)
 565 {
 566         if (likely(priv->plat->force_sf_dma_mode ||
 567                 ((priv->plat->tx_coe) && (!priv->no_csum_insertion)))) {
 568                 /*
 569                  * In case of GMAC, SF mode can be enabled
 570                  * to perform the TX COE in HW. This depends on:
 571                  * 1) TX COE if actually supported
 572                  * 2) There is no bugged Jumbo frame support
 573                  *    that needs to not insert csum in the TDES.
 574                  */
 575                 priv->hw->dma->dma_mode(priv->ioaddr,
 576                                         SF_DMA_MODE, SF_DMA_MODE);
 577                 tc = SF_DMA_MODE;
 578         } else
 579                 priv->hw->dma->dma_mode(priv->ioaddr, tc, SF_DMA_MODE);
 580 }
 581
 582 /**
 583  * stmmac_tx:
 584  * @priv: private driver structure
 585  * Description: it reclaims resources after transmission completes.
 586  */
 587 static void stmmac_tx(struct stmmac_priv *priv)
 588 {
 589         unsigned int txsize = priv->dma_tx_size;
 590
 591         while (priv->dirty_tx != priv->cur_tx) {
 592                 int last;
 593                 unsigned int entry = priv->dirty_tx % txsize;
 594                 struct sk_buff *skb = priv->tx_skbuff[entry];
 595                 struct dma_desc *p = priv->dma_tx + entry;
 596
 597                 /* Check if the descriptor is owned by the DMA. */
 598                 if (priv->hw->desc->get_tx_owner(p))
 599                         break;
 600
 601                 /* Verify tx error by looking at the last segment */
 602                 last = priv->hw->desc->get_tx_ls(p);
 603                 if (likely(last)) {
 604                         int tx_error =
 605                                 priv->hw->desc->tx_status(&priv->dev->stats,
 606                                                           &priv->xstats, p,
 607                                                           priv->ioaddr);
 608                         if (likely(tx_error == 0)) {
 609                                 priv->dev->stats.tx_packets++;
 610                                 priv->xstats.tx_pkt_n++;
 611                         } else
 612                                 priv->dev->stats.tx_errors++;
 613                 }
 614                 TX_DBG("%s: curr %d, dirty %d\n", __func__,
 615                         priv->cur_tx, priv->dirty_tx);
 616
 617                 if (likely(p->des2))
 618                         dma_unmap_single(priv->device, p->des2,
 619                                          priv->hw->desc->get_tx_len(p),
 620                                          DMA_TO_DEVICE);
 621                 if (unlikely(p->des3))
 622                         p->des3 = 0;
 623
 624                 if (likely(skb != NULL)) {
 625                         /*
 626                          * If there's room in the queue (limit it to size)
 627                          * we add this skb back into the pool,
 628                          * if it's the right size.
 629                          */
 630                         if ((skb_queue_len(&priv->rx_recycle) <
 631                                 priv->dma_rx_size) &&
 632                                 skb_recycle_check(skb, priv->dma_buf_sz))
 633                                 __skb_queue_head(&priv->rx_recycle, skb);
 634                         else
 635                                 dev_kfree_skb(skb);
 636
 637                         priv->tx_skbuff[entry] = NULL;
 638                 }
 639
 640                 priv->hw->desc->release_tx_desc(p);
 641
 642                 entry = (++priv->dirty_tx) % txsize;
 643         }
 644         if (unlikely(netif_queue_stopped(priv->dev) &&
 645                      stmmac_tx_avail(priv) > STMMAC_TX_THRESH(priv))) {
 646                 netif_tx_lock(priv->dev);
 647                 if (netif_queue_stopped(priv->dev) &&
 648                      stmmac_tx_avail(priv) > STMMAC_TX_THRESH(priv)) {
 649                         TX_DBG("%s: restart transmit\n", __func__);
 650                         netif_wake_queue(priv->dev);
 651                 }
 652                 netif_tx_unlock(priv->dev);
 653         }
 654 }
 655
 656 static inline void stmmac_enable_irq(struct stmmac_priv *priv)
 657 {
 658 #ifdef CONFIG_STMMAC_TIMER
 659         if (likely(priv->tm->enable))
 660                 priv->tm->timer_start(tmrate);
 661         else
 662 #endif
 663                 priv->hw->dma->enable_dma_irq(priv->ioaddr);
 664 }
 665
 666 static inline void stmmac_disable_irq(struct stmmac_priv *priv)
 667 {
 668 #ifdef CONFIG_STMMAC_TIMER
 669         if (likely(priv->tm->enable))
 670                 priv->tm->timer_stop();
 671         else
 672 #endif
 673                 priv->hw->dma->disable_dma_irq(priv->ioaddr);
 674 }
 675
 676 static int stmmac_has_work(struct stmmac_priv *priv)
 677 {
 678         unsigned int has_work = 0;
 679         int rxret, tx_work = 0;
 680
 681         rxret = priv->hw->desc->get_rx_owner(priv->dma_rx +
 682                 (priv->cur_rx % priv->dma_rx_size));
 683
 684         if (priv->dirty_tx != priv->cur_tx)
 685                 tx_work = 1;
 686
 687         if (likely(!rxret || tx_work))
 688                 has_work = 1;
 689
 690         return has_work;
 691 }
 692
 693 static inline void _stmmac_schedule(struct stmmac_priv *priv)
 694 {
 695         if (likely(stmmac_has_work(priv))) {
 696                 stmmac_disable_irq(priv);
 697                 napi_schedule(&priv->napi);
 698         }
 699 }
 700
 701 #ifdef CONFIG_STMMAC_TIMER
 702 void stmmac_schedule(struct net_device *dev)
 703 {
 704         struct stmmac_priv *priv = netdev_priv(dev);
 705
 706         priv->xstats.sched_timer_n++;
 707
 708         _stmmac_schedule(priv);
 709 }
 710
 711 static void stmmac_no_timer_started(unsigned int x)
 712 {;
 713 };
 714
 715 static void stmmac_no_timer_stopped(void)
 716 {;
 717 };
 718 #endif
 719
 720 /**
 721  * stmmac_tx_err:
 722  * @priv: pointer to the private device structure
 723  * Description: it cleans the descriptors and restarts the transmission
 724  * in case of errors.
 725  */
 726 static void stmmac_tx_err(struct stmmac_priv *priv)
 727 {
 728
 729         netif_stop_queue(priv->dev);
 730
 731         priv->hw->dma->stop_tx(priv->ioaddr);
 732         dma_free_tx_skbufs(priv);
 733         priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
 734         priv->dirty_tx = 0;
 735         priv->cur_tx = 0;
 736         priv->hw->dma->start_tx(priv->ioaddr);
 737
 738         priv->dev->stats.tx_errors++;
 739         netif_wake_queue(priv->dev);
 740 }
 741
 742
 743 static void stmmac_dma_interrupt(struct stmmac_priv *priv)
 744 {
 745         int status;
 746
 747         status = priv->hw->dma->dma_interrupt(priv->ioaddr, &priv->xstats);
 748         if (likely(status == handle_tx_rx))
 749                 _stmmac_schedule(priv);
 750
 751         else if (unlikely(status == tx_hard_error_bump_tc)) {
 752                 /* Try to bump up the dma threshold on this failure */
 753                 if (unlikely(tc != SF_DMA_MODE) && (tc <= 256)) {
 754                         tc += 64;
 755                         priv->hw->dma->dma_mode(priv->ioaddr, tc, SF_DMA_MODE);
 756                         priv->xstats.threshold = tc;
 757                 }
 758         } else if (unlikely(status == tx_hard_error))
 759                 stmmac_tx_err(priv);
 760 }
 761
 762 static void stmmac_mmc_setup(struct stmmac_priv *priv)
 763 {
 764         unsigned int mode = MMC_CNTRL_RESET_ON_READ | MMC_CNTRL_COUNTER_RESET |
 765                             MMC_CNTRL_PRESET | MMC_CNTRL_FULL_HALF_PRESET;
 766
 767         /* Do not manage MMC IRQ (FIXME) */
 768         dwmac_mmc_intr_all_mask(priv->ioaddr);
 769         dwmac_mmc_ctrl(priv->ioaddr, mode);
 770         memset(&priv->mmc, 0, sizeof(struct stmmac_counters));
 771 }
 772
 773 static u32 stmmac_get_synopsys_id(struct stmmac_priv *priv)
 774 {
 775         u32 hwid = priv->hw->synopsys_uid;
 776
 777         /* Only check valid Synopsys Id because old MAC chips
 778          * have no HW registers where get the ID */
 779         if (likely(hwid)) {
 780                 u32 uid = ((hwid & 0x0000ff00) >> 8);
 781                 u32 synid = (hwid & 0x000000ff);
 782
 783                 pr_info("STMMAC - user ID: 0x%x, Synopsys ID: 0x%x\n",
 784                         uid, synid);
 785
 786                 return synid;
 787         }
 788         return 0;
 789 }
 790
 791 /* New GMAC chips support a new register to indicate the
 792  * presence of the optional feature/functions.
 793  */
 794 static int stmmac_get_hw_features(struct stmmac_priv *priv)
 795 {
 796         u32 hw_cap = priv->hw->dma->get_hw_feature(priv->ioaddr);
 797
 798         if (likely(hw_cap)) {
 799                 priv->dma_cap.mbps_10_100 = (hw_cap & 0x1);
 800                 priv->dma_cap.mbps_1000 = (hw_cap & 0x2) >> 1;
 801                 priv->dma_cap.half_duplex = (hw_cap & 0x4) >> 2;
 802                 priv->dma_cap.hash_filter = (hw_cap & 0x10) >> 4;
 803                 priv->dma_cap.multi_addr = (hw_cap & 0x20) >> 5;
 804                 priv->dma_cap.pcs = (hw_cap & 0x40) >> 6;
 805                 priv->dma_cap.sma_mdio = (hw_cap & 0x100) >> 8;
 806                 priv->dma_cap.pmt_remote_wake_up = (hw_cap & 0x200) >> 9;
 807                 priv->dma_cap.pmt_magic_frame = (hw_cap & 0x400) >> 10;
 808                 priv->dma_cap.rmon = (hw_cap & 0x800) >> 11; /* MMC */
 809                 /* IEEE 1588-2002*/
 810                 priv->dma_cap.time_stamp = (hw_cap & 0x1000) >> 12;
 811                 /* IEEE 1588-2008*/
 812                 priv->dma_cap.atime_stamp = (hw_cap & 0x2000) >> 13;
 813                 /* 802.3az - Energy-Efficient Ethernet (EEE) */
 814                 priv->dma_cap.eee = (hw_cap & 0x4000) >> 14;
 815                 priv->dma_cap.av = (hw_cap & 0x8000) >> 15;
 816                 /* TX and RX csum */
 817                 priv->dma_cap.tx_coe = (hw_cap & 0x10000) >> 16;
 818                 priv->dma_cap.rx_coe_type1 = (hw_cap & 0x20000) >> 17;
 819                 priv->dma_cap.rx_coe_type2 = (hw_cap & 0x40000) >> 18;
 820                 priv->dma_cap.rxfifo_over_2048 = (hw_cap & 0x80000) >> 19;
 821                 /* TX and RX number of channels */
 822                 priv->dma_cap.number_rx_channel = (hw_cap & 0x300000) >> 20;
 823                 priv->dma_cap.number_tx_channel = (hw_cap & 0xc00000) >> 22;
 824                 /* Alternate (enhanced) DESC mode*/
 825                 priv->dma_cap.enh_desc = (hw_cap & 0x1000000) >> 24;
 826
 827         } else
 828                 pr_debug("\tNo HW DMA feature register supported");
 829
 830         return hw_cap;
 831 }
 832
 833 /**
 834  *  stmmac_open - open entry point of the driver
 835  *  @dev : pointer to the device structure.
 836  *  Description:
 837  *  This function is the open entry point of the driver.
 838  *  Return value:
 839  *  0 on success and an appropriate (-)ve integer as defined in errno.h
 840  *  file on failure.
 841  */
 842 static int stmmac_open(struct net_device *dev)
 843 {
 844         struct stmmac_priv *priv = netdev_priv(dev);
 845         int ret;
 846
 847         /* Check that the MAC address is valid.  If its not, refuse
 848          * to bring the device up. The user must specify an
 849          * address using the following linux command:
 850          *      ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx  */
 851         if (!is_valid_ether_addr(dev->dev_addr)) {
 852                 random_ether_addr(dev->dev_addr);
 853                 pr_warning("%s: generated random MAC address %pM\n", dev->name,
 854                         dev->dev_addr);
 855         }
 856
 857         stmmac_verify_args();
 858
 859 #ifdef CONFIG_STMMAC_TIMER
 860         priv->tm = kzalloc(sizeof(struct stmmac_timer *), GFP_KERNEL);
 861         if (unlikely(priv->tm == NULL)) {
 862                 pr_err("%s: ERROR: timer memory alloc failed\n", __func__);
 863                 return -ENOMEM;
 864         }
 865         priv->tm->freq = tmrate;
 866
 867         /* Test if the external timer can be actually used.
 868          * In case of failure continue without timer. */
 869         if (unlikely((stmmac_open_ext_timer(dev, priv->tm)) < 0)) {
 870                 pr_warning("stmmaceth: cannot attach the external timer.\n");
 871                 priv->tm->freq = 0;
 872                 priv->tm->timer_start = stmmac_no_timer_started;
 873                 priv->tm->timer_stop = stmmac_no_timer_stopped;
 874         } else
 875                 priv->tm->enable = 1;
 876 #endif
 877         ret = stmmac_init_phy(dev);
 878         if (unlikely(ret)) {
 879                 pr_err("%s: Cannot attach to PHY (error: %d)\n", __func__, ret);
 880                 goto open_error;
 881         }
 882
 883         /* Create and initialize the TX/RX descriptors chains. */
 884         priv->dma_tx_size = STMMAC_ALIGN(dma_txsize);
 885         priv->dma_rx_size = STMMAC_ALIGN(dma_rxsize);
 886         priv->dma_buf_sz = STMMAC_ALIGN(buf_sz);
 887         init_dma_desc_rings(dev);
 888
 889         /* DMA initialization and SW reset */
 890         ret = priv->hw->dma->init(priv->ioaddr, priv->plat->pbl,
 891                                   priv->dma_tx_phy, priv->dma_rx_phy);
 892         if (ret < 0) {
 893                 pr_err("%s: DMA initialization failed\n", __func__);
 894                 goto open_error;
 895         }
 896
 897         /* Copy the MAC addr into the HW  */
 898         priv->hw->mac->set_umac_addr(priv->ioaddr, dev->dev_addr, 0);
 899         /* If required, perform hw setup of the bus. */
 900         if (priv->plat->bus_setup)
 901                 priv->plat->bus_setup(priv->ioaddr);
 902         /* Initialize the MAC Core */
 903         priv->hw->mac->core_init(priv->ioaddr);
 904
 905         stmmac_get_synopsys_id(priv);
 906
 907         stmmac_get_hw_features(priv);
 908
 909         if (priv->rx_coe)
 910                 pr_info("stmmac: Rx Checksum Offload Engine supported\n");
 911         if (priv->plat->tx_coe)
 912                 pr_info("\tTX Checksum insertion supported\n");
 913         netdev_update_features(dev);
 914
 915         /* Request the IRQ lines */
 916         ret = request_irq(dev->irq, stmmac_interrupt,
 917                          IRQF_SHARED, dev->name, dev);
 918         if (unlikely(ret < 0)) {
 919                 pr_err("%s: ERROR: allocating the IRQ %d (error: %d)\n",
 920                        __func__, dev->irq, ret);
 921                 goto open_error;
 922         }
 923
 924         /* Enable the MAC Rx/Tx */
 925         stmmac_enable_mac(priv->ioaddr);
 926
 927         /* Set the HW DMA mode and the COE */
 928         stmmac_dma_operation_mode(priv);
 929
 930         /* Extra statistics */
 931         memset(&priv->xstats, 0, sizeof(struct stmmac_extra_stats));
 932         priv->xstats.threshold = tc;
 933
 934         stmmac_mmc_setup(priv);
 935
 936         /* Start the ball rolling... */
 937         DBG(probe, DEBUG, "%s: DMA RX/TX processes started...\n", dev->name);
 938         priv->hw->dma->start_tx(priv->ioaddr);
 939         priv->hw->dma->start_rx(priv->ioaddr);
 940
 941 #ifdef CONFIG_STMMAC_TIMER
 942         priv->tm->timer_start(tmrate);
 943 #endif
 944         /* Dump DMA/MAC registers */
 945         if (netif_msg_hw(priv)) {
 946                 priv->hw->mac->dump_regs(priv->ioaddr);
 947                 priv->hw->dma->dump_regs(priv->ioaddr);
 948         }
 949
 950         if (priv->phydev)
 951                 phy_start(priv->phydev);
 952
 953         napi_enable(&priv->napi);
 954         skb_queue_head_init(&priv->rx_recycle);
 955         netif_start_queue(dev);
 956
 957         return 0;
 958
 959 open_error:
 960 #ifdef CONFIG_STMMAC_TIMER
 961         kfree(priv->tm);
 962 #endif
 963         if (priv->phydev)
 964                 phy_disconnect(priv->phydev);
 965
 966         return ret;
 967 }
 968
 969 /**
 970  *  stmmac_release - close entry point of the driver
 971  *  @dev : device pointer.
 972  *  Description:
 973  *  This is the stop entry point of the driver.
 974  */
 975 static int stmmac_release(struct net_device *dev)
 976 {
 977         struct stmmac_priv *priv = netdev_priv(dev);
 978
 979         /* Stop and disconnect the PHY */
 980         if (priv->phydev) {
 981                 phy_stop(priv->phydev);
 982                 phy_disconnect(priv->phydev);
 983                 priv->phydev = NULL;
 984         }
 985
 986         netif_stop_queue(dev);
 987
 988 #ifdef CONFIG_STMMAC_TIMER
 989         /* Stop and release the timer */
 990         stmmac_close_ext_timer();
 991         if (priv->tm != NULL)
 992                 kfree(priv->tm);
 993 #endif
 994         napi_disable(&priv->napi);
 995         skb_queue_purge(&priv->rx_recycle);
 996
 997         /* Free the IRQ lines */
 998         free_irq(dev->irq, dev);
 999
1000         /* Stop TX/RX DMA and clear the descriptors */
1001         priv->hw->dma->stop_tx(priv->ioaddr);
1002         priv->hw->dma->stop_rx(priv->ioaddr);
1003
1004         /* Release and free the Rx/Tx resources */
1005         free_dma_desc_resources(priv);
1006
1007         /* Disable the MAC Rx/Tx */
1008         stmmac_disable_mac(priv->ioaddr);
1009
1010         netif_carrier_off(dev);
1011
1012         return 0;
1013 }
1014
1015 static unsigned int stmmac_handle_jumbo_frames(struct sk_buff *skb,
1016                                                struct net_device *dev,
1017                                                int csum_insertion)
1018 {
1019         struct stmmac_priv *priv = netdev_priv(dev);
1020         unsigned int nopaged_len = skb_headlen(skb);
1021         unsigned int txsize = priv->dma_tx_size;
1022         unsigned int entry = priv->cur_tx % txsize;
1023         struct dma_desc *desc = priv->dma_tx + entry;
1024
1025         if (nopaged_len > BUF_SIZE_8KiB) {
1026
1027                 int buf2_size = nopaged_len - BUF_SIZE_8KiB;
1028
1029                 desc->des2 = dma_map_single(priv->device, skb->data,
1030                                             BUF_SIZE_8KiB, DMA_TO_DEVICE);
1031                 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
1032                 priv->hw->desc->prepare_tx_desc(desc, 1, BUF_SIZE_8KiB,
1033                                                 csum_insertion);
1034
1035                 entry = (++priv->cur_tx) % txsize;
1036                 desc = priv->dma_tx + entry;
1037
1038                 desc->des2 = dma_map_single(priv->device,
1039                                         skb->data + BUF_SIZE_8KiB,
1040                                         buf2_size, DMA_TO_DEVICE);
1041                 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
1042                 priv->hw->desc->prepare_tx_desc(desc, 0, buf2_size,
1043                                                 csum_insertion);
1044                 priv->hw->desc->set_tx_owner(desc);
1045                 priv->tx_skbuff[entry] = NULL;
1046         } else {
1047                 desc->des2 = dma_map_single(priv->device, skb->data,
1048                                         nopaged_len, DMA_TO_DEVICE);
1049                 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
1050                 priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len,
1051                                                 csum_insertion);
1052         }
1053         return entry;
1054 }
1055
1056 /**
1057  *  stmmac_xmit:
1058  *  @skb : the socket buffer
1059  *  @dev : device pointer
1060  *  Description : Tx entry point of the driver.
1061  */
1062 static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
1063 {
1064         struct stmmac_priv *priv = netdev_priv(dev);
1065         unsigned int txsize = priv->dma_tx_size;
1066         unsigned int entry;
1067         int i, csum_insertion = 0;
1068         int nfrags = skb_shinfo(skb)->nr_frags;
1069         struct dma_desc *desc, *first;
1070
1071         if (unlikely(stmmac_tx_avail(priv) < nfrags + 1)) {
1072                 if (!netif_queue_stopped(dev)) {
1073                         netif_stop_queue(dev);
1074                         /* This is a hard error, log it. */
1075                         pr_err("%s: BUG! Tx Ring full when queue awake\n",
1076                                 __func__);
1077                 }
1078                 return NETDEV_TX_BUSY;
1079         }
1080
1081         entry = priv->cur_tx % txsize;
1082
1083 #ifdef STMMAC_XMIT_DEBUG
1084         if ((skb->len > ETH_FRAME_LEN) || nfrags)
1085                 pr_info("stmmac xmit:\n"
1086                        "\tskb addr %p - len: %d - nopaged_len: %d\n"
1087                        "\tn_frags: %d - ip_summed: %d - %s gso\n",
1088                        skb, skb->len, skb_headlen(skb), nfrags, skb->ip_summed,
1089                        !skb_is_gso(skb) ? "isn't" : "is");
1090 #endif
1091
1092         csum_insertion = (skb->ip_summed == CHECKSUM_PARTIAL);
1093
1094         desc = priv->dma_tx + entry;
1095         first = desc;
1096
1097 #ifdef STMMAC_XMIT_DEBUG
1098         if ((nfrags > 0) || (skb->len > ETH_FRAME_LEN))
1099                 pr_debug("stmmac xmit: skb len: %d, nopaged_len: %d,\n"
1100                        "\t\tn_frags: %d, ip_summed: %d\n",
1101                        skb->len, skb_headlen(skb), nfrags, skb->ip_summed);
1102 #endif
1103         priv->tx_skbuff[entry] = skb;
1104         if (unlikely(skb->len >= BUF_SIZE_4KiB)) {
1105                 entry = stmmac_handle_jumbo_frames(skb, dev, csum_insertion);
1106                 desc = priv->dma_tx + entry;
1107         } else {
1108                 unsigned int nopaged_len = skb_headlen(skb);
1109                 desc->des2 = dma_map_single(priv->device, skb->data,
1110                                         nopaged_len, DMA_TO_DEVICE);
1111                 priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len,
1112                                                 csum_insertion);
1113         }
1114
1115         for (i = 0; i < nfrags; i++) {
1116                 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1117                 int len = skb_frag_size(frag);
1118
1119                 entry = (++priv->cur_tx) % txsize;
1120                 desc = priv->dma_tx + entry;
1121
1122                 TX_DBG("\t[entry %d] segment len: %d\n", entry, len);
1123                 desc->des2 = skb_frag_dma_map(priv->device, frag, 0, len,
1124                                               DMA_TO_DEVICE);
1125                 priv->tx_skbuff[entry] = NULL;
1126                 priv->hw->desc->prepare_tx_desc(desc, 0, len, csum_insertion);
1127                 wmb();
1128                 priv->hw->desc->set_tx_owner(desc);
1129         }
1130
1131         /* Interrupt on completition only for the latest segment */
1132         priv->hw->desc->close_tx_desc(desc);
1133
1134 #ifdef CONFIG_STMMAC_TIMER
1135         /* Clean IC while using timer */
1136         if (likely(priv->tm->enable))
1137                 priv->hw->desc->clear_tx_ic(desc);
1138 #endif
1139
1140         wmb();
1141
1142         /* To avoid raise condition */
1143         priv->hw->desc->set_tx_owner(first);
1144
1145         priv->cur_tx++;
1146
1147 #ifdef STMMAC_XMIT_DEBUG
1148         if (netif_msg_pktdata(priv)) {
1149                 pr_info("stmmac xmit: current=%d, dirty=%d, entry=%d, "
1150                        "first=%p, nfrags=%d\n",
1151                        (priv->cur_tx % txsize), (priv->dirty_tx % txsize),
1152                        entry, first, nfrags);
1153                 display_ring(priv->dma_tx, txsize);
1154                 pr_info(">>> frame to be transmitted: ");
1155                 print_pkt(skb->data, skb->len);
1156         }
1157 #endif
1158         if (unlikely(stmmac_tx_avail(priv) <= (MAX_SKB_FRAGS + 1))) {
1159                 TX_DBG("%s: stop transmitted packets\n", __func__);
1160                 netif_stop_queue(dev);
1161         }
1162
1163         dev->stats.tx_bytes += skb->len;
1164
1165         skb_tx_timestamp(skb);
1166
1167         priv->hw->dma->enable_dma_transmission(priv->ioaddr);
1168
1169         return NETDEV_TX_OK;
1170 }
1171
1172 static inline void stmmac_rx_refill(struct stmmac_priv *priv)
1173 {
1174         unsigned int rxsize = priv->dma_rx_size;
1175         int bfsize = priv->dma_buf_sz;
1176         struct dma_desc *p = priv->dma_rx;
1177
1178         for (; priv->cur_rx - priv->dirty_rx > 0; priv->dirty_rx++) {
1179                 unsigned int entry = priv->dirty_rx % rxsize;
1180                 if (likely(priv->rx_skbuff[entry] == NULL)) {
1181                         struct sk_buff *skb;
1182
1183                         skb = __skb_dequeue(&priv->rx_recycle);
1184                         if (skb == NULL)
1185                                 skb = netdev_alloc_skb_ip_align(priv->dev,
1186                                                                 bfsize);
1187
1188                         if (unlikely(skb == NULL))
1189                                 break;
1190
1191                         priv->rx_skbuff[entry] = skb;
1192                         priv->rx_skbuff_dma[entry] =
1193                             dma_map_single(priv->device, skb->data, bfsize,
1194                                            DMA_FROM_DEVICE);
1195
1196                         (p + entry)->des2 = priv->rx_skbuff_dma[entry];
1197                         if (unlikely(priv->plat->has_gmac)) {
1198                                 if (bfsize >= BUF_SIZE_8KiB)
1199                                         (p + entry)->des3 =
1200                                             (p + entry)->des2 + BUF_SIZE_8KiB;
1201                         }
1202                         RX_DBG(KERN_INFO "\trefill entry #%d\n", entry);
1203                 }
1204                 wmb();
1205                 priv->hw->desc->set_rx_owner(p + entry);
1206         }
1207 }
1208
1209 static int stmmac_rx(struct stmmac_priv *priv, int limit)
1210 {
1211         unsigned int rxsize = priv->dma_rx_size;
1212         unsigned int entry = priv->cur_rx % rxsize;
1213         unsigned int next_entry;
1214         unsigned int count = 0;
1215         struct dma_desc *p = priv->dma_rx + entry;
1216         struct dma_desc *p_next;
1217
1218 #ifdef STMMAC_RX_DEBUG
1219         if (netif_msg_hw(priv)) {
1220                 pr_debug(">>> stmmac_rx: descriptor ring:\n");
1221                 display_ring(priv->dma_rx, rxsize);
1222         }
1223 #endif
1224         count = 0;
1225         while (!priv->hw->desc->get_rx_owner(p)) {
1226                 int status;
1227
1228                 if (count >= limit)
1229                         break;
1230
1231                 count++;
1232
1233                 next_entry = (++priv->cur_rx) % rxsize;
1234                 p_next = priv->dma_rx + next_entry;
1235                 prefetch(p_next);
1236
1237                 /* read the status of the incoming frame */
1238                 status = (priv->hw->desc->rx_status(&priv->dev->stats,
1239                                                     &priv->xstats, p));
1240                 if (unlikely(status == discard_frame))
1241                         priv->dev->stats.rx_errors++;
1242                 else {
1243                         struct sk_buff *skb;
1244                         int frame_len;
1245
1246                         frame_len = priv->hw->desc->get_rx_frame_len(p);
1247                         /* ACS is set; GMAC core strips PAD/FCS for IEEE 802.3
1248                          * Type frames (LLC/LLC-SNAP) */
1249                         if (unlikely(status != llc_snap))
1250                                 frame_len -= ETH_FCS_LEN;
1251 #ifdef STMMAC_RX_DEBUG
1252                         if (frame_len > ETH_FRAME_LEN)
1253                                 pr_debug("\tRX frame size %d, COE status: %d\n",
1254                                         frame_len, status);
1255
1256                         if (netif_msg_hw(priv))
1257                                 pr_debug("\tdesc: %p [entry %d] buff=0x%x\n",
1258                                         p, entry, p->des2);
1259 #endif
1260                         skb = priv->rx_skbuff[entry];
1261                         if (unlikely(!skb)) {
1262                                 pr_err("%s: Inconsistent Rx descriptor chain\n",
1263                                         priv->dev->name);
1264                                 priv->dev->stats.rx_dropped++;
1265                                 break;
1266                         }
1267                         prefetch(skb->data - NET_IP_ALIGN);
1268                         priv->rx_skbuff[entry] = NULL;
1269
1270                         skb_put(skb, frame_len);
1271                         dma_unmap_single(priv->device,
1272                                          priv->rx_skbuff_dma[entry],
1273                                          priv->dma_buf_sz, DMA_FROM_DEVICE);
1274 #ifdef STMMAC_RX_DEBUG
1275                         if (netif_msg_pktdata(priv)) {
1276                                 pr_info(" frame received (%dbytes)", frame_len);
1277                                 print_pkt(skb->data, frame_len);
1278                         }
1279 #endif
1280                         skb->protocol = eth_type_trans(skb, priv->dev);
1281
1282                         if (unlikely(status == csum_none)) {
1283                                 /* always for the old mac 10/100 */
1284                                 skb_checksum_none_assert(skb);
1285                                 netif_receive_skb(skb);
1286                         } else {
1287                                 skb->ip_summed = CHECKSUM_UNNECESSARY;
1288                                 napi_gro_receive(&priv->napi, skb);
1289                         }
1290
1291                         priv->dev->stats.rx_packets++;
1292                         priv->dev->stats.rx_bytes += frame_len;
1293                 }
1294                 entry = next_entry;
1295                 p = p_next;     /* use prefetched values */
1296         }
1297
1298         stmmac_rx_refill(priv);
1299
1300         priv->xstats.rx_pkt_n += count;
1301
1302         return count;
1303 }
1304
1305 /**
1306  *  stmmac_poll - stmmac poll method (NAPI)
1307  *  @napi : pointer to the napi structure.
1308  *  @budget : maximum number of packets that the current CPU can receive from
1309  *            all interfaces.
1310  *  Description :
1311  *   This function implements the the reception process.
1312  *   Also it runs the TX completion thread
1313  */
1314 static int stmmac_poll(struct napi_struct *napi, int budget)
1315 {
1316         struct stmmac_priv *priv = container_of(napi, struct stmmac_priv, napi);
1317         int work_done = 0;
1318
1319         priv->xstats.poll_n++;
1320         stmmac_tx(priv);
1321         work_done = stmmac_rx(priv, budget);
1322
1323         if (work_done < budget) {
1324                 napi_complete(napi);
1325                 stmmac_enable_irq(priv);
1326         }
1327         return work_done;
1328 }
1329
1330 /**
1331  *  stmmac_tx_timeout
1332  *  @dev : Pointer to net device structure
1333  *  Description: this function is called when a packet transmission fails to
1334  *   complete within a reasonable tmrate. The driver will mark the error in the
1335  *   netdev structure and arrange for the device to be reset to a sane state
1336  *   in order to transmit a new packet.
1337  */
1338 static void stmmac_tx_timeout(struct net_device *dev)
1339 {
1340         struct stmmac_priv *priv = netdev_priv(dev);
1341
1342         /* Clear Tx resources and restart transmitting again */
1343         stmmac_tx_err(priv);
1344 }
1345
1346 /* Configuration changes (passed on by ifconfig) */
1347 static int stmmac_config(struct net_device *dev, struct ifmap *map)
1348 {
1349         if (dev->flags & IFF_UP)        /* can't act on a running interface */
1350                 return -EBUSY;
1351
1352         /* Don't allow changing the I/O address */
1353         if (map->base_addr != dev->base_addr) {
1354                 pr_warning("%s: can't change I/O address\n", dev->name);
1355                 return -EOPNOTSUPP;
1356         }
1357
1358         /* Don't allow changing the IRQ */
1359         if (map->irq != dev->irq) {
1360                 pr_warning("%s: can't change IRQ number %d\n",
1361                        dev->name, dev->irq);
1362                 return -EOPNOTSUPP;
1363         }
1364
1365         /* ignore other fields */
1366         return 0;
1367 }
1368
1369 /**
1370  *  stmmac_set_rx_mode - entry point for multicast addressing
1371  *  @dev : pointer to the device structure
1372  *  Description:
1373  *  This function is a driver entry point which gets called by the kernel
1374  *  whenever multicast addresses must be enabled/disabled.
1375  *  Return value:
1376  *  void.
1377  */
1378 static void stmmac_set_rx_mode(struct net_device *dev)
1379 {
1380         struct stmmac_priv *priv = netdev_priv(dev);
1381
1382         spin_lock(&priv->lock);
1383         priv->hw->mac->set_filter(dev);
1384         spin_unlock(&priv->lock);
1385 }
1386
1387 /**
1388  *  stmmac_change_mtu - entry point to change MTU size for the device.
1389  *  @dev : device pointer.
1390  *  @new_mtu : the new MTU size for the device.
1391  *  Description: the Maximum Transfer Unit (MTU) is used by the network layer
1392  *  to drive packet transmission. Ethernet has an MTU of 1500 octets
1393  *  (ETH_DATA_LEN). This value can be changed with ifconfig.
1394  *  Return value:
1395  *  0 on success and an appropriate (-)ve integer as defined in errno.h
1396  *  file on failure.
1397  */
1398 static int stmmac_change_mtu(struct net_device *dev, int new_mtu)
1399 {
1400         struct stmmac_priv *priv = netdev_priv(dev);
1401         int max_mtu;
1402
1403         if (netif_running(dev)) {
1404                 pr_err("%s: must be stopped to change its MTU\n", dev->name);
1405                 return -EBUSY;
1406         }
1407
1408         if (priv->plat->has_gmac)
1409                 max_mtu = JUMBO_LEN;
1410         else
1411                 max_mtu = ETH_DATA_LEN;
1412
1413         if ((new_mtu < 46) || (new_mtu > max_mtu)) {
1414                 pr_err("%s: invalid MTU, max MTU is: %d\n", dev->name, max_mtu);
1415                 return -EINVAL;
1416         }
1417
1418         dev->mtu = new_mtu;
1419         netdev_update_features(dev);
1420
1421         return 0;
1422 }
1423
1424 static u32 stmmac_fix_features(struct net_device *dev, u32 features)
1425 {
1426         struct stmmac_priv *priv = netdev_priv(dev);
1427
1428         if (!priv->rx_coe)
1429                 features &= ~NETIF_F_RXCSUM;
1430         if (!priv->plat->tx_coe)
1431                 features &= ~NETIF_F_ALL_CSUM;
1432
1433         /* Some GMAC devices have a bugged Jumbo frame support that
1434          * needs to have the Tx COE disabled for oversized frames
1435          * (due to limited buffer sizes). In this case we disable
1436          * the TX csum insertionin the TDES and not use SF. */
1437         if (priv->plat->bugged_jumbo && (dev->mtu > ETH_DATA_LEN))
1438                 features &= ~NETIF_F_ALL_CSUM;
1439
1440         return features;
1441 }
1442
1443 static irqreturn_t stmmac_interrupt(int irq, void *dev_id)
1444 {
1445         struct net_device *dev = (struct net_device *)dev_id;
1446         struct stmmac_priv *priv = netdev_priv(dev);
1447
1448         if (unlikely(!dev)) {
1449                 pr_err("%s: invalid dev pointer\n", __func__);
1450                 return IRQ_NONE;
1451         }
1452
1453         if (priv->plat->has_gmac)
1454                 /* To handle GMAC own interrupts */
1455                 priv->hw->mac->host_irq_status((void __iomem *) dev->base_addr);
1456
1457         stmmac_dma_interrupt(priv);
1458
1459         return IRQ_HANDLED;
1460 }
1461
1462 #ifdef CONFIG_NET_POLL_CONTROLLER
1463 /* Polling receive - used by NETCONSOLE and other diagnostic tools
1464  * to allow network I/O with interrupts disabled. */
1465 static void stmmac_poll_controller(struct net_device *dev)
1466 {
1467         disable_irq(dev->irq);
1468         stmmac_interrupt(dev->irq, dev);
1469         enable_irq(dev->irq);
1470 }
1471 #endif
1472
1473 /**
1474  *  stmmac_ioctl - Entry point for the Ioctl
1475  *  @dev: Device pointer.
1476  *  @rq: An IOCTL specefic structure, that can contain a pointer to
1477  *  a proprietary structure used to pass information to the driver.
1478  *  @cmd: IOCTL command
1479  *  Description:
1480  *  Currently there are no special functionality supported in IOCTL, just the
1481  *  phy_mii_ioctl(...) can be invoked.
1482  */
1483 static int stmmac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1484 {
1485         struct stmmac_priv *priv = netdev_priv(dev);
1486         int ret;
1487
1488         if (!netif_running(dev))
1489                 return -EINVAL;
1490
1491         if (!priv->phydev)
1492                 return -EINVAL;
1493
1494         spin_lock(&priv->lock);
1495         ret = phy_mii_ioctl(priv->phydev, rq, cmd);
1496         spin_unlock(&priv->lock);
1497
1498         return ret;
1499 }
1500
1501 #ifdef CONFIG_STMMAC_DEBUG_FS
1502 static struct dentry *stmmac_fs_dir;
1503 static struct dentry *stmmac_rings_status;
1504 static struct dentry *stmmac_dma_cap;
1505
1506 static int stmmac_sysfs_ring_read(struct seq_file *seq, void *v)
1507 {
1508         struct tmp_s {
1509                 u64 a;
1510                 unsigned int b;
1511                 unsigned int c;
1512         };
1513         int i;
1514         struct net_device *dev = seq->private;
1515         struct stmmac_priv *priv = netdev_priv(dev);
1516
1517         seq_printf(seq, "=======================\n");
1518         seq_printf(seq, " RX descriptor ring\n");
1519         seq_printf(seq, "=======================\n");
1520
1521         for (i = 0; i < priv->dma_rx_size; i++) {
1522                 struct tmp_s *x = (struct tmp_s *)(priv->dma_rx + i);
1523                 seq_printf(seq, "[%d] DES0=0x%x DES1=0x%x BUF1=0x%x BUF2=0x%x",
1524                            i, (unsigned int)(x->a),
1525                            (unsigned int)((x->a) >> 32), x->b, x->c);
1526                 seq_printf(seq, "\n");
1527         }
1528
1529         seq_printf(seq, "\n");
1530         seq_printf(seq, "=======================\n");
1531         seq_printf(seq, "  TX descriptor ring\n");
1532         seq_printf(seq, "=======================\n");
1533
1534         for (i = 0; i < priv->dma_tx_size; i++) {
1535                 struct tmp_s *x = (struct tmp_s *)(priv->dma_tx + i);
1536                 seq_printf(seq, "[%d] DES0=0x%x DES1=0x%x BUF1=0x%x BUF2=0x%x",
1537                            i, (unsigned int)(x->a),
1538                            (unsigned int)((x->a) >> 32), x->b, x->c);
1539                 seq_printf(seq, "\n");
1540         }
1541
1542         return 0;
1543 }
1544
1545 static int stmmac_sysfs_ring_open(struct inode *inode, struct file *file)
1546 {
1547         return single_open(file, stmmac_sysfs_ring_read, inode->i_private);
1548 }
1549
1550 static const struct file_operations stmmac_rings_status_fops = {
1551         .owner = THIS_MODULE,
1552         .open = stmmac_sysfs_ring_open,
1553         .read = seq_read,
1554         .llseek = seq_lseek,
1555         .release = seq_release,
1556 };
1557
1558 static int stmmac_sysfs_dma_cap_read(struct seq_file *seq, void *v)
1559 {
1560         struct net_device *dev = seq->private;
1561         struct stmmac_priv *priv = netdev_priv(dev);
1562
1563         if (!stmmac_get_hw_features(priv)) {
1564                 seq_printf(seq, "DMA HW features not supported\n");
1565                 return 0;
1566         }
1567
1568         seq_printf(seq, "==============================\n");
1569         seq_printf(seq, "\tDMA HW features\n");
1570         seq_printf(seq, "==============================\n");
1571
1572         seq_printf(seq, "\t10/100 Mbps %s\n",
1573                    (priv->dma_cap.mbps_10_100) ? "Y" : "N");
1574         seq_printf(seq, "\t1000 Mbps %s\n",
1575                    (priv->dma_cap.mbps_1000) ? "Y" : "N");
1576         seq_printf(seq, "\tHalf duple %s\n",
1577                    (priv->dma_cap.half_duplex) ? "Y" : "N");
1578         seq_printf(seq, "\tHash Filter: %s\n",
1579                    (priv->dma_cap.hash_filter) ? "Y" : "N");
1580         seq_printf(seq, "\tMultiple MAC address registers: %s\n",
1581                    (priv->dma_cap.multi_addr) ? "Y" : "N");
1582         seq_printf(seq, "\tPCS (TBI/SGMII/RTBI PHY interfatces): %s\n",
1583                    (priv->dma_cap.pcs) ? "Y" : "N");
1584         seq_printf(seq, "\tSMA (MDIO) Interface: %s\n",
1585                    (priv->dma_cap.sma_mdio) ? "Y" : "N");
1586         seq_printf(seq, "\tPMT Remote wake up: %s\n",
1587                    (priv->dma_cap.pmt_remote_wake_up) ? "Y" : "N");
1588         seq_printf(seq, "\tPMT Magic Frame: %s\n",
1589                    (priv->dma_cap.pmt_magic_frame) ? "Y" : "N");
1590         seq_printf(seq, "\tRMON module: %s\n",
1591                    (priv->dma_cap.rmon) ? "Y" : "N");
1592         seq_printf(seq, "\tIEEE 1588-2002 Time Stamp: %s\n",
1593                    (priv->dma_cap.time_stamp) ? "Y" : "N");
1594         seq_printf(seq, "\tIEEE 1588-2008 Advanced Time Stamp:%s\n",
1595                    (priv->dma_cap.atime_stamp) ? "Y" : "N");
1596         seq_printf(seq, "\t802.3az - Energy-Efficient Ethernet (EEE) %s\n",
1597                    (priv->dma_cap.eee) ? "Y" : "N");
1598         seq_printf(seq, "\tAV features: %s\n", (priv->dma_cap.av) ? "Y" : "N");
1599         seq_printf(seq, "\tChecksum Offload in TX: %s\n",
1600                    (priv->dma_cap.tx_coe) ? "Y" : "N");
1601         seq_printf(seq, "\tIP Checksum Offload (type1) in RX: %s\n",
1602                    (priv->dma_cap.rx_coe_type1) ? "Y" : "N");
1603         seq_printf(seq, "\tIP Checksum Offload (type2) in RX: %s\n",
1604                    (priv->dma_cap.rx_coe_type2) ? "Y" : "N");
1605         seq_printf(seq, "\tRXFIFO > 2048bytes: %s\n",
1606                    (priv->dma_cap.rxfifo_over_2048) ? "Y" : "N");
1607         seq_printf(seq, "\tNumber of Additional RX channel: %d\n",
1608                    priv->dma_cap.number_rx_channel);
1609         seq_printf(seq, "\tNumber of Additional TX channel: %d\n",
1610                    priv->dma_cap.number_tx_channel);
1611         seq_printf(seq, "\tEnhanced descriptors: %s\n",
1612                    (priv->dma_cap.enh_desc) ? "Y" : "N");
1613
1614         return 0;
1615 }
1616
1617 static int stmmac_sysfs_dma_cap_open(struct inode *inode, struct file *file)
1618 {
1619         return single_open(file, stmmac_sysfs_dma_cap_read, inode->i_private);
1620 }
1621
1622 static const struct file_operations stmmac_dma_cap_fops = {
1623         .owner = THIS_MODULE,
1624         .open = stmmac_sysfs_dma_cap_open,
1625         .read = seq_read,
1626         .llseek = seq_lseek,
1627         .release = seq_release,
1628 };
1629
1630 static int stmmac_init_fs(struct net_device *dev)
1631 {
1632         /* Create debugfs entries */
1633         stmmac_fs_dir = debugfs_create_dir(STMMAC_RESOURCE_NAME, NULL);
1634
1635         if (!stmmac_fs_dir || IS_ERR(stmmac_fs_dir)) {
1636                 pr_err("ERROR %s, debugfs create directory failed\n",
1637                        STMMAC_RESOURCE_NAME);
1638
1639                 return -ENOMEM;
1640         }
1641
1642         /* Entry to report DMA RX/TX rings */
1643         stmmac_rings_status = debugfs_create_file("descriptors_status",
1644                                            S_IRUGO, stmmac_fs_dir, dev,
1645                                            &stmmac_rings_status_fops);
1646
1647         if (!stmmac_rings_status || IS_ERR(stmmac_rings_status)) {
1648                 pr_info("ERROR creating stmmac ring debugfs file\n");
1649                 debugfs_remove(stmmac_fs_dir);
1650
1651                 return -ENOMEM;
1652         }
1653
1654         /* Entry to report the DMA HW features */
1655         stmmac_dma_cap = debugfs_create_file("dma_cap", S_IRUGO, stmmac_fs_dir,
1656                                              dev, &stmmac_dma_cap_fops);
1657
1658         if (!stmmac_dma_cap || IS_ERR(stmmac_dma_cap)) {
1659                 pr_info("ERROR creating stmmac MMC debugfs file\n");
1660                 debugfs_remove(stmmac_rings_status);
1661                 debugfs_remove(stmmac_fs_dir);
1662
1663                 return -ENOMEM;
1664         }
1665
1666         return 0;
1667 }
1668
1669 static void stmmac_exit_fs(void)
1670 {
1671         debugfs_remove(stmmac_rings_status);
1672         debugfs_remove(stmmac_dma_cap);
1673         debugfs_remove(stmmac_fs_dir);
1674 }
1675 #endif /* CONFIG_STMMAC_DEBUG_FS */
1676
1677 static const struct net_device_ops stmmac_netdev_ops = {
1678         .ndo_open = stmmac_open,
1679         .ndo_start_xmit = stmmac_xmit,
1680         .ndo_stop = stmmac_release,
1681         .ndo_change_mtu = stmmac_change_mtu,
1682         .ndo_fix_features = stmmac_fix_features,
1683         .ndo_set_rx_mode = stmmac_set_rx_mode,
1684         .ndo_tx_timeout = stmmac_tx_timeout,
1685         .ndo_do_ioctl = stmmac_ioctl,
1686         .ndo_set_config = stmmac_config,
1687 #ifdef CONFIG_NET_POLL_CONTROLLER
1688         .ndo_poll_controller = stmmac_poll_controller,
1689 #endif
1690         .ndo_set_mac_address = eth_mac_addr,
1691 };
1692
1693 /**
1694  * stmmac_probe - Initialization of the adapter .
1695  * @dev : device pointer
1696  * Description: The function initializes the network device structure for
1697  * the STMMAC driver. It also calls the low level routines
1698  * in order to init the HW (i.e. the DMA engine)
1699  */
1700 static int stmmac_probe(struct net_device *dev)
1701 {
1702         int ret = 0;
1703         struct stmmac_priv *priv = netdev_priv(dev);
1704
1705         ether_setup(dev);
1706
1707         dev->netdev_ops = &stmmac_netdev_ops;
1708         stmmac_set_ethtool_ops(dev);
1709
1710         dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1711         dev->features |= dev->hw_features | NETIF_F_HIGHDMA;
1712         dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1713 #ifdef STMMAC_VLAN_TAG_USED
1714         /* Both mac100 and gmac support receive VLAN tag detection */
1715         dev->features |= NETIF_F_HW_VLAN_RX;
1716 #endif
1717         priv->msg_enable = netif_msg_init(debug, default_msg_level);
1718
1719         if (flow_ctrl)
1720                 priv->flow_ctrl = FLOW_AUTO;    /* RX/TX pause on */
1721
1722         priv->pause = pause;
1723         netif_napi_add(dev, &priv->napi, stmmac_poll, 64);
1724
1725         /* Get the MAC address */
1726         priv->hw->mac->get_umac_addr((void __iomem *) dev->base_addr,
1727                                      dev->dev_addr, 0);
1728
1729         if (!is_valid_ether_addr(dev->dev_addr))
1730                 pr_warning("\tno valid MAC address;"
1731                         "please, use ifconfig or nwhwconfig!\n");
1732
1733         spin_lock_init(&priv->lock);
1734
1735         ret = register_netdev(dev);
1736         if (ret) {
1737                 pr_err("%s: ERROR %i registering the device\n",
1738                        __func__, ret);
1739                 return -ENODEV;
1740         }
1741
1742         DBG(probe, DEBUG, "%s: Scatter/Gather: %s - HW checksums: %s\n",
1743             dev->name, (dev->features & NETIF_F_SG) ? "on" : "off",
1744             (dev->features & NETIF_F_IP_CSUM) ? "on" : "off");
1745
1746         return ret;
1747 }
1748
1749 /**
1750  * stmmac_mac_device_setup
1751  * @dev : device pointer
1752  * Description: select and initialise the mac device (mac100 or Gmac).
1753  */
1754 static int stmmac_mac_device_setup(struct net_device *dev)
1755 {
1756         struct stmmac_priv *priv = netdev_priv(dev);
1757
1758         struct mac_device_info *device;
1759
1760         if (priv->plat->has_gmac) {
1761                 dev->priv_flags |= IFF_UNICAST_FLT;
1762                 device = dwmac1000_setup(priv->ioaddr);
1763         } else {
1764                 device = dwmac100_setup(priv->ioaddr);
1765         }
1766
1767         if (!device)
1768                 return -ENOMEM;
1769
1770         if (priv->plat->enh_desc) {
1771                 device->desc = &enh_desc_ops;
1772                 pr_info("\tEnhanced descriptor structure\n");
1773         } else
1774                 device->desc = &ndesc_ops;
1775
1776         priv->hw = device;
1777
1778         if (device_can_wakeup(priv->device)) {
1779                 priv->wolopts = WAKE_MAGIC; /* Magic Frame as default */
1780                 enable_irq_wake(priv->wol_irq);
1781         }
1782
1783         return 0;
1784 }
1785
1786 /**
1787  * stmmac_dvr_probe
1788  * @pdev: platform device pointer
1789  * Description: the driver is initialized through platform_device.
1790  */
1791 static int stmmac_dvr_probe(struct platform_device *pdev)
1792 {
1793         int ret = 0;
1794         struct resource *res;
1795         void __iomem *addr = NULL;
1796         struct net_device *ndev = NULL;
1797         struct stmmac_priv *priv = NULL;
1798         struct plat_stmmacenet_data *plat_dat;
1799
1800         pr_info("STMMAC driver:\n\tplatform registration... ");
1801         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1802         if (!res)
1803                 return -ENODEV;
1804         pr_info("\tdone!\n");
1805
1806         if (!request_mem_region(res->start, resource_size(res),
1807                                 pdev->name)) {
1808                 pr_err("%s: ERROR: memory allocation failed"
1809                        "cannot get the I/O addr 0x%x\n",
1810                        __func__, (unsigned int)res->start);
1811                 return -EBUSY;
1812         }
1813
1814         addr = ioremap(res->start, resource_size(res));
1815         if (!addr) {
1816                 pr_err("%s: ERROR: memory mapping failed\n", __func__);
1817                 ret = -ENOMEM;
1818                 goto out_release_region;
1819         }
1820
1821         ndev = alloc_etherdev(sizeof(struct stmmac_priv));
1822         if (!ndev) {
1823                 pr_err("%s: ERROR: allocating the device\n", __func__);
1824                 ret = -ENOMEM;
1825                 goto out_unmap;
1826         }
1827
1828         SET_NETDEV_DEV(ndev, &pdev->dev);
1829
1830         /* Get the MAC information */
1831         ndev->irq = platform_get_irq_byname(pdev, "macirq");
1832         if (ndev->irq == -ENXIO) {
1833                 pr_err("%s: ERROR: MAC IRQ configuration "
1834                        "information not found\n", __func__);
1835                 ret = -ENXIO;
1836                 goto out_free_ndev;
1837         }
1838
1839         priv = netdev_priv(ndev);
1840         priv->device = &(pdev->dev);
1841         priv->dev = ndev;
1842         plat_dat = pdev->dev.platform_data;
1843
1844         priv->plat = plat_dat;
1845
1846         priv->ioaddr = addr;
1847
1848         /* PMT module is not integrated in all the MAC devices. */
1849         if (plat_dat->pmt) {
1850                 pr_info("\tPMT module supported\n");
1851                 device_set_wakeup_capable(&pdev->dev, 1);
1852         }
1853         /*
1854          * On some platforms e.g. SPEAr the wake up irq differs from the mac irq
1855          * The external wake up irq can be passed through the platform code
1856          * named as "eth_wake_irq"
1857          *
1858          * In case the wake up interrupt is not passed from the platform
1859          * so the driver will continue to use the mac irq (ndev->irq)
1860          */
1861         priv->wol_irq = platform_get_irq_byname(pdev, "eth_wake_irq");
1862         if (priv->wol_irq == -ENXIO)
1863                 priv->wol_irq = ndev->irq;
1864
1865
1866         platform_set_drvdata(pdev, ndev);
1867
1868         /* Set the I/O base addr */
1869         ndev->base_addr = (unsigned long)addr;
1870
1871         /* Custom initialisation */
1872         if (priv->plat->init) {
1873                 ret = priv->plat->init(pdev);
1874                 if (unlikely(ret))
1875                         goto out_free_ndev;
1876         }
1877
1878         /* MAC HW revice detection */
1879         ret = stmmac_mac_device_setup(ndev);
1880         if (ret < 0)
1881                 goto out_plat_exit;
1882
1883         /* Network Device Registration */
1884         ret = stmmac_probe(ndev);
1885         if (ret < 0)
1886                 goto out_plat_exit;
1887
1888         /* Override with kernel parameters if supplied XXX CRS XXX
1889          * this needs to have multiple instances */
1890         if ((phyaddr >= 0) && (phyaddr <= 31))
1891                 priv->plat->phy_addr = phyaddr;
1892
1893         pr_info("\t%s - (dev. name: %s - id: %d, IRQ #%d\n"
1894                "\tIO base addr: 0x%p)\n", ndev->name, pdev->name,
1895                pdev->id, ndev->irq, addr);
1896
1897         /* MDIO bus Registration */
1898         pr_debug("\tMDIO bus (id: %d)...", priv->plat->bus_id);
1899         ret = stmmac_mdio_register(ndev);
1900         if (ret < 0)
1901                 goto out_unregister;
1902         pr_debug("registered!\n");
1903
1904 #ifdef CONFIG_STMMAC_DEBUG_FS
1905         ret = stmmac_init_fs(ndev);
1906         if (ret < 0)
1907                 pr_warning("\tFailed debugFS registration");
1908 #endif
1909
1910         return 0;
1911
1912 out_unregister:
1913         unregister_netdev(ndev);
1914 out_plat_exit:
1915         if (priv->plat->exit)
1916                 priv->plat->exit(pdev);
1917 out_free_ndev:
1918         free_netdev(ndev);
1919         platform_set_drvdata(pdev, NULL);
1920 out_unmap:
1921         iounmap(addr);
1922 out_release_region:
1923         release_mem_region(res->start, resource_size(res));
1924
1925         return ret;
1926 }
1927
1928 /**
1929  * stmmac_dvr_remove
1930  * @pdev: platform device pointer
1931  * Description: this function resets the TX/RX processes, disables the MAC RX/TX
1932  * changes the link status, releases the DMA descriptor rings,
1933  * unregisters the MDIO bus and unmaps the allocated memory.
1934  */
1935 static int stmmac_dvr_remove(struct platform_device *pdev)
1936 {
1937         struct net_device *ndev = platform_get_drvdata(pdev);
1938         struct stmmac_priv *priv = netdev_priv(ndev);
1939         struct resource *res;
1940
1941         pr_info("%s:\n\tremoving driver", __func__);
1942
1943         priv->hw->dma->stop_rx(priv->ioaddr);
1944         priv->hw->dma->stop_tx(priv->ioaddr);
1945
1946         stmmac_disable_mac(priv->ioaddr);
1947
1948         netif_carrier_off(ndev);
1949
1950         stmmac_mdio_unregister(ndev);
1951
1952         if (priv->plat->exit)
1953                 priv->plat->exit(pdev);
1954
1955         platform_set_drvdata(pdev, NULL);
1956         unregister_netdev(ndev);
1957
1958         iounmap((void *)priv->ioaddr);
1959         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1960         release_mem_region(res->start, resource_size(res));
1961
1962 #ifdef CONFIG_STMMAC_DEBUG_FS
1963         stmmac_exit_fs();
1964 #endif
1965
1966         free_netdev(ndev);
1967
1968         return 0;
1969 }
1970
1971 #ifdef CONFIG_PM
1972 static int stmmac_suspend(struct device *dev)
1973 {
1974         struct net_device *ndev = dev_get_drvdata(dev);
1975         struct stmmac_priv *priv = netdev_priv(ndev);
1976         int dis_ic = 0;
1977
1978         if (!ndev || !netif_running(ndev))
1979                 return 0;
1980
1981         spin_lock(&priv->lock);
1982
1983         netif_device_detach(ndev);
1984         netif_stop_queue(ndev);
1985         if (priv->phydev)
1986                 phy_stop(priv->phydev);
1987
1988 #ifdef CONFIG_STMMAC_TIMER
1989         priv->tm->timer_stop();
1990         if (likely(priv->tm->enable))
1991                 dis_ic = 1;
1992 #endif
1993         napi_disable(&priv->napi);
1994
1995         /* Stop TX/RX DMA */
1996         priv->hw->dma->stop_tx(priv->ioaddr);
1997         priv->hw->dma->stop_rx(priv->ioaddr);
1998         /* Clear the Rx/Tx descriptors */
1999         priv->hw->desc->init_rx_desc(priv->dma_rx, priv->dma_rx_size,
2000                                      dis_ic);
2001         priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
2002
2003         /* Enable Power down mode by programming the PMT regs */
2004         if (device_may_wakeup(priv->device))
2005                 priv->hw->mac->pmt(priv->ioaddr, priv->wolopts);
2006         else
2007                 stmmac_disable_mac(priv->ioaddr);
2008
2009         spin_unlock(&priv->lock);
2010         return 0;
2011 }
2012
2013 static int stmmac_resume(struct device *dev)
2014 {
2015         struct net_device *ndev = dev_get_drvdata(dev);
2016         struct stmmac_priv *priv = netdev_priv(ndev);
2017
2018         if (!netif_running(ndev))
2019                 return 0;
2020
2021         spin_lock(&priv->lock);
2022
2023         /* Power Down bit, into the PM register, is cleared
2024          * automatically as soon as a magic packet or a Wake-up frame
2025          * is received. Anyway, it's better to manually clear
2026          * this bit because it can generate problems while resuming
2027          * from another devices (e.g. serial console). */
2028         if (device_may_wakeup(priv->device))
2029                 priv->hw->mac->pmt(priv->ioaddr, 0);
2030
2031         netif_device_attach(ndev);
2032
2033         /* Enable the MAC and DMA */
2034         stmmac_enable_mac(priv->ioaddr);
2035         priv->hw->dma->start_tx(priv->ioaddr);
2036         priv->hw->dma->start_rx(priv->ioaddr);
2037
2038 #ifdef CONFIG_STMMAC_TIMER
2039         if (likely(priv->tm->enable))
2040                 priv->tm->timer_start(tmrate);
2041 #endif
2042         napi_enable(&priv->napi);
2043
2044         if (priv->phydev)
2045                 phy_start(priv->phydev);
2046
2047         netif_start_queue(ndev);
2048
2049         spin_unlock(&priv->lock);
2050         return 0;
2051 }
2052
2053 static int stmmac_freeze(struct device *dev)
2054 {
2055         struct net_device *ndev = dev_get_drvdata(dev);
2056
2057         if (!ndev || !netif_running(ndev))
2058                 return 0;
2059
2060         return stmmac_release(ndev);
2061 }
2062
2063 static int stmmac_restore(struct device *dev)
2064 {
2065         struct net_device *ndev = dev_get_drvdata(dev);
2066
2067         if (!ndev || !netif_running(ndev))
2068                 return 0;
2069
2070         return stmmac_open(ndev);
2071 }
2072
2073 static const struct dev_pm_ops stmmac_pm_ops = {
2074         .suspend = stmmac_suspend,
2075         .resume = stmmac_resume,
2076         .freeze = stmmac_freeze,
2077         .thaw = stmmac_restore,
2078         .restore = stmmac_restore,
2079 };
2080 #else
2081 static const struct dev_pm_ops stmmac_pm_ops;
2082 #endif /* CONFIG_PM */
2083
2084 static struct platform_driver stmmac_driver = {
2085         .probe = stmmac_dvr_probe,
2086         .remove = stmmac_dvr_remove,
2087         .driver = {
2088                 .name = STMMAC_RESOURCE_NAME,
2089                 .owner = THIS_MODULE,
2090                 .pm = &stmmac_pm_ops,
2091         },
2092 };
2093
2094 /**
2095  * stmmac_init_module - Entry point for the driver
2096  * Description: This function is the entry point for the driver.
2097  */
2098 static int __init stmmac_init_module(void)
2099 {
2100         int ret;
2101
2102         ret = platform_driver_register(&stmmac_driver);
2103         return ret;
2104 }
2105
2106 /**
2107  * stmmac_cleanup_module - Cleanup routine for the driver
2108  * Description: This function is the cleanup routine for the driver.
2109  */
2110 static void __exit stmmac_cleanup_module(void)
2111 {
2112         platform_driver_unregister(&stmmac_driver);
2113 }
2114
2115 #ifndef MODULE
2116 static int __init stmmac_cmdline_opt(char *str)
2117 {
2118         char *opt;
2119
2120         if (!str || !*str)
2121                 return -EINVAL;
2122         while ((opt = strsep(&str, ",")) != NULL) {
2123                 if (!strncmp(opt, "debug:", 6)) {
2124                         if (strict_strtoul(opt + 6, 0, (unsigned long *)&debug))
2125                                 goto err;
2126                 } else if (!strncmp(opt, "phyaddr:", 8)) {
2127                         if (strict_strtoul(opt + 8, 0,
2128                                            (unsigned long *)&phyaddr))
2129                                 goto err;
2130                 } else if (!strncmp(opt, "dma_txsize:", 11)) {
2131                         if (strict_strtoul(opt + 11, 0,
2132                                            (unsigned long *)&dma_txsize))
2133                                 goto err;
2134                 } else if (!strncmp(opt, "dma_rxsize:", 11)) {
2135                         if (strict_strtoul(opt + 11, 0,
2136                                            (unsigned long *)&dma_rxsize))
2137                                 goto err;
2138                 } else if (!strncmp(opt, "buf_sz:", 7)) {
2139                         if (strict_strtoul(opt + 7, 0,
2140                                            (unsigned long *)&buf_sz))
2141                                 goto err;
2142                 } else if (!strncmp(opt, "tc:", 3)) {
2143                         if (strict_strtoul(opt + 3, 0, (unsigned long *)&tc))
2144                                 goto err;
2145                 } else if (!strncmp(opt, "watchdog:", 9)) {
2146                         if (strict_strtoul(opt + 9, 0,
2147                                            (unsigned long *)&watchdog))
2148                                 goto err;
2149                 } else if (!strncmp(opt, "flow_ctrl:", 10)) {
2150                         if (strict_strtoul(opt + 10, 0,
2151                                            (unsigned long *)&flow_ctrl))
2152                                 goto err;
2153                 } else if (!strncmp(opt, "pause:", 6)) {
2154                         if (strict_strtoul(opt + 6, 0, (unsigned long *)&pause))
2155                                 goto err;
2156 #ifdef CONFIG_STMMAC_TIMER
2157                 } else if (!strncmp(opt, "tmrate:", 7)) {
2158                         if (strict_strtoul(opt + 7, 0,
2159                                            (unsigned long *)&tmrate))
2160                                 goto err;
2161 #endif
2162                 }
2163         }
2164         return 0;
2165
2166 err:
2167         pr_err("%s: ERROR broken module parameter conversion", __func__);
2168         return -EINVAL;
2169 }
2170
2171 __setup("stmmaceth=", stmmac_cmdline_opt);
2172 #endif
2173
2174 module_init(stmmac_init_module);
2175 module_exit(stmmac_cleanup_module);
2176
2177 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet driver");
2178 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
2179 MODULE_LICENSE("GPL");