1 /***************************************************************************
3 * Copyright (C) 2004-2008 SMSC
4 * Copyright (C) 2005-2008 ARM
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 ***************************************************************************
21 * Rewritten, heavily based on smsc911x simple driver by SMSC.
22 * Partly uses io macros from smc91x.c by Nicolas Pitre
25 * LAN9115, LAN9116, LAN9117, LAN9118
26 * LAN9215, LAN9216, LAN9217, LAN9218
33 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
35 #include <linux/crc32.h>
36 #include <linux/delay.h>
37 #include <linux/errno.h>
38 #include <linux/etherdevice.h>
39 #include <linux/ethtool.h>
40 #include <linux/init.h>
41 #include <linux/interrupt.h>
42 #include <linux/ioport.h>
43 #include <linux/kernel.h>
44 #include <linux/module.h>
45 #include <linux/netdevice.h>
46 #include <linux/platform_device.h>
47 #include <linux/sched.h>
48 #include <linux/timer.h>
49 #include <linux/bug.h>
50 #include <linux/bitops.h>
51 #include <linux/irq.h>
53 #include <linux/swab.h>
54 #include <linux/phy.h>
55 #include <linux/smsc911x.h>
56 #include <linux/device.h>
58 #include <linux/of_device.h>
59 #include <linux/of_gpio.h>
60 #include <linux/of_net.h>
63 #define SMSC_CHIPNAME "smsc911x"
64 #define SMSC_MDIONAME "smsc911x-mdio"
65 #define SMSC_DRV_VERSION "2008-10-21"
67 MODULE_LICENSE("GPL");
68 MODULE_VERSION(SMSC_DRV_VERSION);
69 MODULE_ALIAS("platform:smsc911x");
72 static int debug = 16;
77 module_param(debug, int, 0);
78 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
83 u32 (*reg_read)(struct smsc911x_data *pdata, u32 reg);
84 void (*reg_write)(struct smsc911x_data *pdata, u32 reg, u32 val);
85 void (*rx_readfifo)(struct smsc911x_data *pdata,
86 unsigned int *buf, unsigned int wordcount);
87 void (*tx_writefifo)(struct smsc911x_data *pdata,
88 unsigned int *buf, unsigned int wordcount);
91 struct smsc911x_data {
96 /* used to decide which workarounds apply */
97 unsigned int generation;
99 /* device configuration (copied from platform_data during probe) */
100 struct smsc911x_platform_config config;
102 /* This needs to be acquired before calling any of below:
103 * smsc911x_mac_read(), smsc911x_mac_write()
107 /* spinlock to ensure register accesses are serialised */
110 struct phy_device *phy_dev;
111 struct mii_bus *mii_bus;
112 int phy_irq[PHY_MAX_ADDR];
113 unsigned int using_extphy;
118 unsigned int gpio_setting;
119 unsigned int gpio_orig_setting;
120 struct net_device *dev;
121 struct napi_struct napi;
123 unsigned int software_irq_signal;
125 #ifdef USE_PHY_WORK_AROUND
126 #define MIN_PACKET_SIZE (64)
127 char loopback_tx_pkt[MIN_PACKET_SIZE];
128 char loopback_rx_pkt[MIN_PACKET_SIZE];
129 unsigned int resetcount;
132 /* Members for Multicast filter workaround */
133 unsigned int multicast_update_pending;
134 unsigned int set_bits_mask;
135 unsigned int clear_bits_mask;
139 /* register access functions */
140 const struct smsc911x_ops *ops;
143 /* Easy access to information */
144 #define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift))
146 static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
148 if (pdata->config.flags & SMSC911X_USE_32BIT)
149 return readl(pdata->ioaddr + reg);
151 if (pdata->config.flags & SMSC911X_USE_16BIT)
152 return ((readw(pdata->ioaddr + reg) & 0xFFFF) |
153 ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16));
160 __smsc911x_reg_read_shift(struct smsc911x_data *pdata, u32 reg)
162 if (pdata->config.flags & SMSC911X_USE_32BIT)
163 return readl(pdata->ioaddr + __smsc_shift(pdata, reg));
165 if (pdata->config.flags & SMSC911X_USE_16BIT)
166 return (readw(pdata->ioaddr +
167 __smsc_shift(pdata, reg)) & 0xFFFF) |
168 ((readw(pdata->ioaddr +
169 __smsc_shift(pdata, reg + 2)) & 0xFFFF) << 16);
175 static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
180 spin_lock_irqsave(&pdata->dev_lock, flags);
181 data = pdata->ops->reg_read(pdata, reg);
182 spin_unlock_irqrestore(&pdata->dev_lock, flags);
187 static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
190 if (pdata->config.flags & SMSC911X_USE_32BIT) {
191 writel(val, pdata->ioaddr + reg);
195 if (pdata->config.flags & SMSC911X_USE_16BIT) {
196 writew(val & 0xFFFF, pdata->ioaddr + reg);
197 writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2);
205 __smsc911x_reg_write_shift(struct smsc911x_data *pdata, u32 reg, u32 val)
207 if (pdata->config.flags & SMSC911X_USE_32BIT) {
208 writel(val, pdata->ioaddr + __smsc_shift(pdata, reg));
212 if (pdata->config.flags & SMSC911X_USE_16BIT) {
214 pdata->ioaddr + __smsc_shift(pdata, reg));
215 writew((val >> 16) & 0xFFFF,
216 pdata->ioaddr + __smsc_shift(pdata, reg + 2));
223 static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
228 spin_lock_irqsave(&pdata->dev_lock, flags);
229 pdata->ops->reg_write(pdata, reg, val);
230 spin_unlock_irqrestore(&pdata->dev_lock, flags);
233 /* Writes a packet to the TX_DATA_FIFO */
235 smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
236 unsigned int wordcount)
240 spin_lock_irqsave(&pdata->dev_lock, flags);
242 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
244 __smsc911x_reg_write(pdata, TX_DATA_FIFO,
249 if (pdata->config.flags & SMSC911X_USE_32BIT) {
250 writesl(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
254 if (pdata->config.flags & SMSC911X_USE_16BIT) {
256 __smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
262 spin_unlock_irqrestore(&pdata->dev_lock, flags);
265 /* Writes a packet to the TX_DATA_FIFO - shifted version */
267 smsc911x_tx_writefifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
268 unsigned int wordcount)
272 spin_lock_irqsave(&pdata->dev_lock, flags);
274 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
276 __smsc911x_reg_write_shift(pdata, TX_DATA_FIFO,
281 if (pdata->config.flags & SMSC911X_USE_32BIT) {
282 writesl(pdata->ioaddr + __smsc_shift(pdata,
283 TX_DATA_FIFO), buf, wordcount);
287 if (pdata->config.flags & SMSC911X_USE_16BIT) {
289 __smsc911x_reg_write_shift(pdata,
290 TX_DATA_FIFO, *buf++);
296 spin_unlock_irqrestore(&pdata->dev_lock, flags);
299 /* Reads a packet out of the RX_DATA_FIFO */
301 smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
302 unsigned int wordcount)
306 spin_lock_irqsave(&pdata->dev_lock, flags);
308 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
310 *buf++ = swab32(__smsc911x_reg_read(pdata,
315 if (pdata->config.flags & SMSC911X_USE_32BIT) {
316 readsl(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
320 if (pdata->config.flags & SMSC911X_USE_16BIT) {
322 *buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO);
328 spin_unlock_irqrestore(&pdata->dev_lock, flags);
331 /* Reads a packet out of the RX_DATA_FIFO - shifted version */
333 smsc911x_rx_readfifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
334 unsigned int wordcount)
338 spin_lock_irqsave(&pdata->dev_lock, flags);
340 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
342 *buf++ = swab32(__smsc911x_reg_read_shift(pdata,
347 if (pdata->config.flags & SMSC911X_USE_32BIT) {
348 readsl(pdata->ioaddr + __smsc_shift(pdata,
349 RX_DATA_FIFO), buf, wordcount);
353 if (pdata->config.flags & SMSC911X_USE_16BIT) {
355 *buf++ = __smsc911x_reg_read_shift(pdata,
362 spin_unlock_irqrestore(&pdata->dev_lock, flags);
365 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
366 * and smsc911x_mac_write, so assumes mac_lock is held */
367 static int smsc911x_mac_complete(struct smsc911x_data *pdata)
372 SMSC_ASSERT_MAC_LOCK(pdata);
374 for (i = 0; i < 40; i++) {
375 val = smsc911x_reg_read(pdata, MAC_CSR_CMD);
376 if (!(val & MAC_CSR_CMD_CSR_BUSY_))
379 SMSC_WARN(pdata, hw, "Timed out waiting for MAC not BUSY. "
380 "MAC_CSR_CMD: 0x%08X", val);
384 /* Fetches a MAC register value. Assumes mac_lock is acquired */
385 static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset)
389 SMSC_ASSERT_MAC_LOCK(pdata);
391 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
392 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
393 SMSC_WARN(pdata, hw, "MAC busy at entry");
397 /* Send the MAC cmd */
398 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
399 MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_));
401 /* Workaround for hardware read-after-write restriction */
402 temp = smsc911x_reg_read(pdata, BYTE_TEST);
404 /* Wait for the read to complete */
405 if (likely(smsc911x_mac_complete(pdata) == 0))
406 return smsc911x_reg_read(pdata, MAC_CSR_DATA);
408 SMSC_WARN(pdata, hw, "MAC busy after read");
412 /* Set a mac register, mac_lock must be acquired before calling */
413 static void smsc911x_mac_write(struct smsc911x_data *pdata,
414 unsigned int offset, u32 val)
418 SMSC_ASSERT_MAC_LOCK(pdata);
420 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
421 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
423 "smsc911x_mac_write failed, MAC busy at entry");
427 /* Send data to write */
428 smsc911x_reg_write(pdata, MAC_CSR_DATA, val);
430 /* Write the actual data */
431 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
432 MAC_CSR_CMD_CSR_BUSY_));
434 /* Workaround for hardware read-after-write restriction */
435 temp = smsc911x_reg_read(pdata, BYTE_TEST);
437 /* Wait for the write to complete */
438 if (likely(smsc911x_mac_complete(pdata) == 0))
441 SMSC_WARN(pdata, hw, "smsc911x_mac_write failed, MAC busy after write");
444 /* Get a phy register */
445 static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx)
447 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
452 spin_lock_irqsave(&pdata->mac_lock, flags);
454 /* Confirm MII not busy */
455 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
456 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_read???");
461 /* Set the address, index & direction (read from PHY) */
462 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6);
463 smsc911x_mac_write(pdata, MII_ACC, addr);
465 /* Wait for read to complete w/ timeout */
466 for (i = 0; i < 100; i++)
467 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
468 reg = smsc911x_mac_read(pdata, MII_DATA);
472 SMSC_WARN(pdata, hw, "Timed out waiting for MII read to finish");
476 spin_unlock_irqrestore(&pdata->mac_lock, flags);
480 /* Set a phy register */
481 static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
484 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
489 spin_lock_irqsave(&pdata->mac_lock, flags);
491 /* Confirm MII not busy */
492 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
493 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_write???");
498 /* Put the data to write in the MAC */
499 smsc911x_mac_write(pdata, MII_DATA, val);
501 /* Set the address, index & direction (write to PHY) */
502 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
504 smsc911x_mac_write(pdata, MII_ACC, addr);
506 /* Wait for write to complete w/ timeout */
507 for (i = 0; i < 100; i++)
508 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
513 SMSC_WARN(pdata, hw, "Timed out waiting for MII write to finish");
517 spin_unlock_irqrestore(&pdata->mac_lock, flags);
521 /* Switch to external phy. Assumes tx and rx are stopped. */
522 static void smsc911x_phy_enable_external(struct smsc911x_data *pdata)
524 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
526 /* Disable phy clocks to the MAC */
527 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
528 hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
529 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
530 udelay(10); /* Enough time for clocks to stop */
532 /* Switch to external phy */
533 hwcfg |= HW_CFG_EXT_PHY_EN_;
534 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
536 /* Enable phy clocks to the MAC */
537 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
538 hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
539 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
540 udelay(10); /* Enough time for clocks to restart */
542 hwcfg |= HW_CFG_SMI_SEL_;
543 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
546 /* Autodetects and enables external phy if present on supported chips.
547 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
548 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
549 static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata)
551 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
553 if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) {
554 SMSC_TRACE(pdata, hw, "Forcing internal PHY");
555 pdata->using_extphy = 0;
556 } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) {
557 SMSC_TRACE(pdata, hw, "Forcing external PHY");
558 smsc911x_phy_enable_external(pdata);
559 pdata->using_extphy = 1;
560 } else if (hwcfg & HW_CFG_EXT_PHY_DET_) {
561 SMSC_TRACE(pdata, hw,
562 "HW_CFG EXT_PHY_DET set, using external PHY");
563 smsc911x_phy_enable_external(pdata);
564 pdata->using_extphy = 1;
566 SMSC_TRACE(pdata, hw,
567 "HW_CFG EXT_PHY_DET clear, using internal PHY");
568 pdata->using_extphy = 0;
572 /* Fetches a tx status out of the status fifo */
573 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata)
575 unsigned int result =
576 smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_;
579 result = smsc911x_reg_read(pdata, TX_STATUS_FIFO);
584 /* Fetches the next rx status */
585 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata)
587 unsigned int result =
588 smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_;
591 result = smsc911x_reg_read(pdata, RX_STATUS_FIFO);
596 #ifdef USE_PHY_WORK_AROUND
597 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata)
604 for (tries = 0; tries < 10; tries++) {
605 unsigned int txcmd_a;
606 unsigned int txcmd_b;
608 unsigned int pktlength;
611 /* Zero-out rx packet memory */
612 memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE);
614 /* Write tx packet to 118 */
615 txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16;
616 txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
617 txcmd_a |= MIN_PACKET_SIZE;
619 txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE;
621 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a);
622 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b);
624 bufp = (ulong)pdata->loopback_tx_pkt & (~0x3);
625 wrsz = MIN_PACKET_SIZE + 3;
626 wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3);
629 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
631 /* Wait till transmit is done */
635 status = smsc911x_tx_get_txstatus(pdata);
636 } while ((i--) && (!status));
640 "Failed to transmit during loopback test");
643 if (status & TX_STS_ES_) {
645 "Transmit encountered errors during loopback test");
649 /* Wait till receive is done */
653 status = smsc911x_rx_get_rxstatus(pdata);
654 } while ((i--) && (!status));
658 "Failed to receive during loopback test");
661 if (status & RX_STS_ES_) {
663 "Receive encountered errors during loopback test");
667 pktlength = ((status & 0x3FFF0000UL) >> 16);
668 bufp = (ulong)pdata->loopback_rx_pkt;
669 rdsz = pktlength + 3;
670 rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3);
673 pdata->ops->rx_readfifo(pdata, (unsigned int *)bufp, rdsz);
675 if (pktlength != (MIN_PACKET_SIZE + 4)) {
676 SMSC_WARN(pdata, hw, "Unexpected packet size "
677 "during loop back test, size=%d, will retry",
682 for (j = 0; j < MIN_PACKET_SIZE; j++) {
683 if (pdata->loopback_tx_pkt[j]
684 != pdata->loopback_rx_pkt[j]) {
690 SMSC_TRACE(pdata, hw, "Successfully verified "
694 SMSC_WARN(pdata, hw, "Data mismatch "
695 "during loop back test, will retry");
703 static int smsc911x_phy_reset(struct smsc911x_data *pdata)
705 struct phy_device *phy_dev = pdata->phy_dev;
707 unsigned int i = 100000;
710 BUG_ON(!phy_dev->bus);
712 SMSC_TRACE(pdata, hw, "Performing PHY BCR Reset");
713 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, BMCR_RESET);
716 temp = smsc911x_mii_read(phy_dev->bus, phy_dev->addr,
718 } while ((i--) && (temp & BMCR_RESET));
720 if (temp & BMCR_RESET) {
721 SMSC_WARN(pdata, hw, "PHY reset failed to complete");
724 /* Extra delay required because the phy may not be completed with
725 * its reset when BMCR_RESET is cleared. Specs say 256 uS is
726 * enough delay but using 1ms here to be safe */
732 static int smsc911x_phy_loopbacktest(struct net_device *dev)
734 struct smsc911x_data *pdata = netdev_priv(dev);
735 struct phy_device *phy_dev = pdata->phy_dev;
740 /* Initialise tx packet using broadcast destination address */
741 memset(pdata->loopback_tx_pkt, 0xff, ETH_ALEN);
743 /* Use incrementing source address */
744 for (i = 6; i < 12; i++)
745 pdata->loopback_tx_pkt[i] = (char)i;
747 /* Set length type field */
748 pdata->loopback_tx_pkt[12] = 0x00;
749 pdata->loopback_tx_pkt[13] = 0x00;
751 for (i = 14; i < MIN_PACKET_SIZE; i++)
752 pdata->loopback_tx_pkt[i] = (char)i;
754 val = smsc911x_reg_read(pdata, HW_CFG);
755 val &= HW_CFG_TX_FIF_SZ_;
757 smsc911x_reg_write(pdata, HW_CFG, val);
759 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
760 smsc911x_reg_write(pdata, RX_CFG,
761 (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8);
763 for (i = 0; i < 10; i++) {
764 /* Set PHY to 10/FD, no ANEG, and loopback mode */
765 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR,
766 BMCR_LOOPBACK | BMCR_FULLDPLX);
768 /* Enable MAC tx/rx, FD */
769 spin_lock_irqsave(&pdata->mac_lock, flags);
770 smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_
771 | MAC_CR_TXEN_ | MAC_CR_RXEN_);
772 spin_unlock_irqrestore(&pdata->mac_lock, flags);
774 if (smsc911x_phy_check_loopbackpkt(pdata) == 0) {
781 spin_lock_irqsave(&pdata->mac_lock, flags);
782 smsc911x_mac_write(pdata, MAC_CR, 0);
783 spin_unlock_irqrestore(&pdata->mac_lock, flags);
785 smsc911x_phy_reset(pdata);
789 spin_lock_irqsave(&pdata->mac_lock, flags);
790 smsc911x_mac_write(pdata, MAC_CR, 0);
791 spin_unlock_irqrestore(&pdata->mac_lock, flags);
793 /* Cancel PHY loopback mode */
794 smsc911x_mii_write(phy_dev->bus, phy_dev->addr, MII_BMCR, 0);
796 smsc911x_reg_write(pdata, TX_CFG, 0);
797 smsc911x_reg_write(pdata, RX_CFG, 0);
801 #endif /* USE_PHY_WORK_AROUND */
803 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata)
805 struct phy_device *phy_dev = pdata->phy_dev;
806 u32 afc = smsc911x_reg_read(pdata, AFC_CFG);
810 if (phy_dev->duplex == DUPLEX_FULL) {
811 u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
812 u16 rmtadv = phy_read(phy_dev, MII_LPA);
813 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
815 if (cap & FLOW_CTRL_RX)
820 if (cap & FLOW_CTRL_TX)
825 SMSC_TRACE(pdata, hw, "rx pause %s, tx pause %s",
826 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
827 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
829 SMSC_TRACE(pdata, hw, "half duplex");
834 spin_lock_irqsave(&pdata->mac_lock, flags);
835 smsc911x_mac_write(pdata, FLOW, flow);
836 spin_unlock_irqrestore(&pdata->mac_lock, flags);
838 smsc911x_reg_write(pdata, AFC_CFG, afc);
841 /* Update link mode if anything has changed. Called periodically when the
842 * PHY is in polling mode, even if nothing has changed. */
843 static void smsc911x_phy_adjust_link(struct net_device *dev)
845 struct smsc911x_data *pdata = netdev_priv(dev);
846 struct phy_device *phy_dev = pdata->phy_dev;
850 if (phy_dev->duplex != pdata->last_duplex) {
852 SMSC_TRACE(pdata, hw, "duplex state has changed");
854 spin_lock_irqsave(&pdata->mac_lock, flags);
855 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
856 if (phy_dev->duplex) {
857 SMSC_TRACE(pdata, hw,
858 "configuring for full duplex mode");
859 mac_cr |= MAC_CR_FDPX_;
861 SMSC_TRACE(pdata, hw,
862 "configuring for half duplex mode");
863 mac_cr &= ~MAC_CR_FDPX_;
865 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
866 spin_unlock_irqrestore(&pdata->mac_lock, flags);
868 smsc911x_phy_update_flowcontrol(pdata);
869 pdata->last_duplex = phy_dev->duplex;
872 carrier = netif_carrier_ok(dev);
873 if (carrier != pdata->last_carrier) {
874 SMSC_TRACE(pdata, hw, "carrier state has changed");
876 SMSC_TRACE(pdata, hw, "configuring for carrier OK");
877 if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) &&
878 (!pdata->using_extphy)) {
879 /* Restore original GPIO configuration */
880 pdata->gpio_setting = pdata->gpio_orig_setting;
881 smsc911x_reg_write(pdata, GPIO_CFG,
882 pdata->gpio_setting);
885 SMSC_TRACE(pdata, hw, "configuring for no carrier");
886 /* Check global setting that LED1
887 * usage is 10/100 indicator */
888 pdata->gpio_setting = smsc911x_reg_read(pdata,
890 if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) &&
891 (!pdata->using_extphy)) {
892 /* Force 10/100 LED off, after saving
893 * original GPIO configuration */
894 pdata->gpio_orig_setting = pdata->gpio_setting;
896 pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_;
897 pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_
900 smsc911x_reg_write(pdata, GPIO_CFG,
901 pdata->gpio_setting);
904 pdata->last_carrier = carrier;
908 static int smsc911x_mii_probe(struct net_device *dev)
910 struct smsc911x_data *pdata = netdev_priv(dev);
911 struct phy_device *phydev = NULL;
914 /* find the first phy */
915 phydev = phy_find_first(pdata->mii_bus);
917 netdev_err(dev, "no PHY found\n");
921 SMSC_TRACE(pdata, probe, "PHY: addr %d, phy_id 0x%08X",
922 phydev->addr, phydev->phy_id);
924 ret = phy_connect_direct(dev, phydev,
925 &smsc911x_phy_adjust_link, 0,
926 pdata->config.phy_interface);
929 netdev_err(dev, "Could not attach to PHY\n");
934 "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
935 phydev->drv->name, dev_name(&phydev->dev), phydev->irq);
937 /* mask with MAC supported features */
938 phydev->supported &= (PHY_BASIC_FEATURES | SUPPORTED_Pause |
939 SUPPORTED_Asym_Pause);
940 phydev->advertising = phydev->supported;
942 pdata->phy_dev = phydev;
943 pdata->last_duplex = -1;
944 pdata->last_carrier = -1;
946 #ifdef USE_PHY_WORK_AROUND
947 if (smsc911x_phy_loopbacktest(dev) < 0) {
948 SMSC_WARN(pdata, hw, "Failed Loop Back Test");
951 SMSC_TRACE(pdata, hw, "Passed Loop Back Test");
952 #endif /* USE_PHY_WORK_AROUND */
954 SMSC_TRACE(pdata, hw, "phy initialised successfully");
958 static int __devinit smsc911x_mii_init(struct platform_device *pdev,
959 struct net_device *dev)
961 struct smsc911x_data *pdata = netdev_priv(dev);
964 pdata->mii_bus = mdiobus_alloc();
965 if (!pdata->mii_bus) {
970 pdata->mii_bus->name = SMSC_MDIONAME;
971 snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%x", pdev->id);
972 pdata->mii_bus->priv = pdata;
973 pdata->mii_bus->read = smsc911x_mii_read;
974 pdata->mii_bus->write = smsc911x_mii_write;
975 pdata->mii_bus->irq = pdata->phy_irq;
976 for (i = 0; i < PHY_MAX_ADDR; ++i)
977 pdata->mii_bus->irq[i] = PHY_POLL;
979 pdata->mii_bus->parent = &pdev->dev;
981 switch (pdata->idrev & 0xFFFF0000) {
986 /* External PHY supported, try to autodetect */
987 smsc911x_phy_initialise_external(pdata);
990 SMSC_TRACE(pdata, hw, "External PHY is not supported, "
991 "using internal PHY");
992 pdata->using_extphy = 0;
996 if (!pdata->using_extphy) {
997 /* Mask all PHYs except ID 1 (internal) */
998 pdata->mii_bus->phy_mask = ~(1 << 1);
1001 if (mdiobus_register(pdata->mii_bus)) {
1002 SMSC_WARN(pdata, probe, "Error registering mii bus");
1003 goto err_out_free_bus_2;
1006 if (smsc911x_mii_probe(dev) < 0) {
1007 SMSC_WARN(pdata, probe, "Error registering mii bus");
1008 goto err_out_unregister_bus_3;
1013 err_out_unregister_bus_3:
1014 mdiobus_unregister(pdata->mii_bus);
1016 mdiobus_free(pdata->mii_bus);
1021 /* Gets the number of tx statuses in the fifo */
1022 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata)
1024 return (smsc911x_reg_read(pdata, TX_FIFO_INF)
1025 & TX_FIFO_INF_TSUSED_) >> 16;
1028 /* Reads tx statuses and increments counters where necessary */
1029 static void smsc911x_tx_update_txcounters(struct net_device *dev)
1031 struct smsc911x_data *pdata = netdev_priv(dev);
1032 unsigned int tx_stat;
1034 while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) {
1035 if (unlikely(tx_stat & 0x80000000)) {
1036 /* In this driver the packet tag is used as the packet
1037 * length. Since a packet length can never reach the
1038 * size of 0x8000, this bit is reserved. It is worth
1039 * noting that the "reserved bit" in the warning above
1040 * does not reference a hardware defined reserved bit
1041 * but rather a driver defined one.
1043 SMSC_WARN(pdata, hw, "Packet tag reserved bit is high");
1045 if (unlikely(tx_stat & TX_STS_ES_)) {
1046 dev->stats.tx_errors++;
1048 dev->stats.tx_packets++;
1049 dev->stats.tx_bytes += (tx_stat >> 16);
1051 if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) {
1052 dev->stats.collisions += 16;
1053 dev->stats.tx_aborted_errors += 1;
1055 dev->stats.collisions +=
1056 ((tx_stat >> 3) & 0xF);
1058 if (unlikely(tx_stat & TX_STS_LOST_CARRIER_))
1059 dev->stats.tx_carrier_errors += 1;
1060 if (unlikely(tx_stat & TX_STS_LATE_COL_)) {
1061 dev->stats.collisions++;
1062 dev->stats.tx_aborted_errors++;
1068 /* Increments the Rx error counters */
1070 smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat)
1074 if (unlikely(rxstat & RX_STS_ES_)) {
1075 dev->stats.rx_errors++;
1076 if (unlikely(rxstat & RX_STS_CRC_ERR_)) {
1077 dev->stats.rx_crc_errors++;
1081 if (likely(!crc_err)) {
1082 if (unlikely((rxstat & RX_STS_FRAME_TYPE_) &&
1083 (rxstat & RX_STS_LENGTH_ERR_)))
1084 dev->stats.rx_length_errors++;
1085 if (rxstat & RX_STS_MCAST_)
1086 dev->stats.multicast++;
1090 /* Quickly dumps bad packets */
1092 smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktwords)
1094 if (likely(pktwords >= 4)) {
1095 unsigned int timeout = 500;
1097 smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_);
1100 val = smsc911x_reg_read(pdata, RX_DP_CTRL);
1101 } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout);
1103 if (unlikely(timeout == 0))
1104 SMSC_WARN(pdata, hw, "Timed out waiting for "
1105 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val);
1109 temp = smsc911x_reg_read(pdata, RX_DATA_FIFO);
1113 /* NAPI poll function */
1114 static int smsc911x_poll(struct napi_struct *napi, int budget)
1116 struct smsc911x_data *pdata =
1117 container_of(napi, struct smsc911x_data, napi);
1118 struct net_device *dev = pdata->dev;
1121 while (npackets < budget) {
1122 unsigned int pktlength;
1123 unsigned int pktwords;
1124 struct sk_buff *skb;
1125 unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata);
1129 /* We processed all packets available. Tell NAPI it can
1130 * stop polling then re-enable rx interrupts */
1131 smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_);
1132 napi_complete(napi);
1133 temp = smsc911x_reg_read(pdata, INT_EN);
1134 temp |= INT_EN_RSFL_EN_;
1135 smsc911x_reg_write(pdata, INT_EN, temp);
1139 /* Count packet for NAPI scheduling, even if it has an error.
1140 * Error packets still require cycles to discard */
1143 pktlength = ((rxstat & 0x3FFF0000) >> 16);
1144 pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2;
1145 smsc911x_rx_counterrors(dev, rxstat);
1147 if (unlikely(rxstat & RX_STS_ES_)) {
1148 SMSC_WARN(pdata, rx_err,
1149 "Discarding packet with error bit set");
1150 /* Packet has an error, discard it and continue with
1152 smsc911x_rx_fastforward(pdata, pktwords);
1153 dev->stats.rx_dropped++;
1157 skb = netdev_alloc_skb(dev, pktwords << 2);
1158 if (unlikely(!skb)) {
1159 SMSC_WARN(pdata, rx_err,
1160 "Unable to allocate skb for rx packet");
1161 /* Drop the packet and stop this polling iteration */
1162 smsc911x_rx_fastforward(pdata, pktwords);
1163 dev->stats.rx_dropped++;
1167 pdata->ops->rx_readfifo(pdata,
1168 (unsigned int *)skb->data, pktwords);
1170 /* Align IP on 16B boundary */
1171 skb_reserve(skb, NET_IP_ALIGN);
1172 skb_put(skb, pktlength - 4);
1173 skb->protocol = eth_type_trans(skb, dev);
1174 skb_checksum_none_assert(skb);
1175 netif_receive_skb(skb);
1177 /* Update counters */
1178 dev->stats.rx_packets++;
1179 dev->stats.rx_bytes += (pktlength - 4);
1182 /* Return total received packets */
1186 /* Returns hash bit number for given MAC address
1188 * 01 00 5E 00 00 01 -> returns bit number 31 */
1189 static unsigned int smsc911x_hash(char addr[ETH_ALEN])
1191 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
1194 static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata)
1196 /* Performs the multicast & mac_cr update. This is called when
1197 * safe on the current hardware, and with the mac_lock held */
1198 unsigned int mac_cr;
1200 SMSC_ASSERT_MAC_LOCK(pdata);
1202 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1203 mac_cr |= pdata->set_bits_mask;
1204 mac_cr &= ~(pdata->clear_bits_mask);
1205 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1206 smsc911x_mac_write(pdata, HASHH, pdata->hashhi);
1207 smsc911x_mac_write(pdata, HASHL, pdata->hashlo);
1208 SMSC_TRACE(pdata, hw, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1209 mac_cr, pdata->hashhi, pdata->hashlo);
1212 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata)
1214 unsigned int mac_cr;
1216 /* This function is only called for older LAN911x devices
1217 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1218 * be modified during Rx - newer devices immediately update the
1221 * This is called from interrupt context */
1223 spin_lock(&pdata->mac_lock);
1225 /* Check Rx has stopped */
1226 if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_)
1227 SMSC_WARN(pdata, drv, "Rx not stopped");
1229 /* Perform the update - safe to do now Rx has stopped */
1230 smsc911x_rx_multicast_update(pdata);
1233 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1234 mac_cr |= MAC_CR_RXEN_;
1235 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1237 pdata->multicast_update_pending = 0;
1239 spin_unlock(&pdata->mac_lock);
1242 static int smsc911x_soft_reset(struct smsc911x_data *pdata)
1244 unsigned int timeout;
1247 /* Reset the LAN911x */
1248 smsc911x_reg_write(pdata, HW_CFG, HW_CFG_SRST_);
1252 temp = smsc911x_reg_read(pdata, HW_CFG);
1253 } while ((--timeout) && (temp & HW_CFG_SRST_));
1255 if (unlikely(temp & HW_CFG_SRST_)) {
1256 SMSC_WARN(pdata, drv, "Failed to complete reset");
1262 /* Sets the device MAC address to dev_addr, called with mac_lock held */
1264 smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, u8 dev_addr[6])
1266 u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4];
1267 u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
1268 (dev_addr[1] << 8) | dev_addr[0];
1270 SMSC_ASSERT_MAC_LOCK(pdata);
1272 smsc911x_mac_write(pdata, ADDRH, mac_high16);
1273 smsc911x_mac_write(pdata, ADDRL, mac_low32);
1276 static int smsc911x_open(struct net_device *dev)
1278 struct smsc911x_data *pdata = netdev_priv(dev);
1279 unsigned int timeout;
1281 unsigned int intcfg;
1283 /* if the phy is not yet registered, retry later*/
1284 if (!pdata->phy_dev) {
1285 SMSC_WARN(pdata, hw, "phy_dev is NULL");
1289 if (!is_valid_ether_addr(dev->dev_addr)) {
1290 SMSC_WARN(pdata, hw, "dev_addr is not a valid MAC address");
1291 return -EADDRNOTAVAIL;
1294 /* Reset the LAN911x */
1295 if (smsc911x_soft_reset(pdata)) {
1296 SMSC_WARN(pdata, hw, "soft reset failed");
1300 smsc911x_reg_write(pdata, HW_CFG, 0x00050000);
1301 smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740);
1303 /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */
1304 spin_lock_irq(&pdata->mac_lock);
1305 smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q);
1306 spin_unlock_irq(&pdata->mac_lock);
1308 /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1310 while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) &&
1315 if (unlikely(timeout == 0))
1316 SMSC_WARN(pdata, ifup,
1317 "Timed out waiting for EEPROM busy bit to clear");
1319 smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
1321 /* The soft reset above cleared the device's MAC address,
1322 * restore it from local copy (set in probe) */
1323 spin_lock_irq(&pdata->mac_lock);
1324 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1325 spin_unlock_irq(&pdata->mac_lock);
1327 /* Initialise irqs, but leave all sources disabled */
1328 smsc911x_reg_write(pdata, INT_EN, 0);
1329 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
1331 /* Set interrupt deassertion to 100uS */
1332 intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
1334 if (pdata->config.irq_polarity) {
1335 SMSC_TRACE(pdata, ifup, "irq polarity: active high");
1336 intcfg |= INT_CFG_IRQ_POL_;
1338 SMSC_TRACE(pdata, ifup, "irq polarity: active low");
1341 if (pdata->config.irq_type) {
1342 SMSC_TRACE(pdata, ifup, "irq type: push-pull");
1343 intcfg |= INT_CFG_IRQ_TYPE_;
1345 SMSC_TRACE(pdata, ifup, "irq type: open drain");
1348 smsc911x_reg_write(pdata, INT_CFG, intcfg);
1350 SMSC_TRACE(pdata, ifup, "Testing irq handler using IRQ %d", dev->irq);
1351 pdata->software_irq_signal = 0;
1354 temp = smsc911x_reg_read(pdata, INT_EN);
1355 temp |= INT_EN_SW_INT_EN_;
1356 smsc911x_reg_write(pdata, INT_EN, temp);
1360 if (pdata->software_irq_signal)
1365 if (!pdata->software_irq_signal) {
1366 netdev_warn(dev, "ISR failed signaling test (IRQ %d)\n",
1370 SMSC_TRACE(pdata, ifup, "IRQ handler passed test using IRQ %d",
1373 netdev_info(dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1374 (unsigned long)pdata->ioaddr, dev->irq);
1376 /* Reset the last known duplex and carrier */
1377 pdata->last_duplex = -1;
1378 pdata->last_carrier = -1;
1380 /* Bring the PHY up */
1381 phy_start(pdata->phy_dev);
1383 temp = smsc911x_reg_read(pdata, HW_CFG);
1384 /* Preserve TX FIFO size and external PHY configuration */
1385 temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF);
1387 smsc911x_reg_write(pdata, HW_CFG, temp);
1389 temp = smsc911x_reg_read(pdata, FIFO_INT);
1390 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1391 temp &= ~(FIFO_INT_RX_STS_LEVEL_);
1392 smsc911x_reg_write(pdata, FIFO_INT, temp);
1394 /* set RX Data offset to 2 bytes for alignment */
1395 smsc911x_reg_write(pdata, RX_CFG, (NET_IP_ALIGN << 8));
1397 /* enable NAPI polling before enabling RX interrupts */
1398 napi_enable(&pdata->napi);
1400 temp = smsc911x_reg_read(pdata, INT_EN);
1401 temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_);
1402 smsc911x_reg_write(pdata, INT_EN, temp);
1404 spin_lock_irq(&pdata->mac_lock);
1405 temp = smsc911x_mac_read(pdata, MAC_CR);
1406 temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
1407 smsc911x_mac_write(pdata, MAC_CR, temp);
1408 spin_unlock_irq(&pdata->mac_lock);
1410 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
1412 netif_start_queue(dev);
1416 /* Entry point for stopping the interface */
1417 static int smsc911x_stop(struct net_device *dev)
1419 struct smsc911x_data *pdata = netdev_priv(dev);
1422 /* Disable all device interrupts */
1423 temp = smsc911x_reg_read(pdata, INT_CFG);
1424 temp &= ~INT_CFG_IRQ_EN_;
1425 smsc911x_reg_write(pdata, INT_CFG, temp);
1427 /* Stop Tx and Rx polling */
1428 netif_stop_queue(dev);
1429 napi_disable(&pdata->napi);
1431 /* At this point all Rx and Tx activity is stopped */
1432 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1433 smsc911x_tx_update_txcounters(dev);
1435 /* Bring the PHY down */
1437 phy_stop(pdata->phy_dev);
1439 SMSC_TRACE(pdata, ifdown, "Interface stopped");
1443 /* Entry point for transmitting a packet */
1444 static int smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1446 struct smsc911x_data *pdata = netdev_priv(dev);
1447 unsigned int freespace;
1448 unsigned int tx_cmd_a;
1449 unsigned int tx_cmd_b;
1454 freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_;
1456 if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD))
1457 SMSC_WARN(pdata, tx_err,
1458 "Tx data fifo low, space available: %d", freespace);
1460 /* Word alignment adjustment */
1461 tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16;
1462 tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
1463 tx_cmd_a |= (unsigned int)skb->len;
1465 tx_cmd_b = ((unsigned int)skb->len) << 16;
1466 tx_cmd_b |= (unsigned int)skb->len;
1468 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a);
1469 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b);
1471 bufp = (ulong)skb->data & (~0x3);
1472 wrsz = (u32)skb->len + 3;
1473 wrsz += (u32)((ulong)skb->data & 0x3);
1476 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
1477 freespace -= (skb->len + 32);
1478 skb_tx_timestamp(skb);
1481 if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30))
1482 smsc911x_tx_update_txcounters(dev);
1484 if (freespace < TX_FIFO_LOW_THRESHOLD) {
1485 netif_stop_queue(dev);
1486 temp = smsc911x_reg_read(pdata, FIFO_INT);
1489 smsc911x_reg_write(pdata, FIFO_INT, temp);
1492 return NETDEV_TX_OK;
1495 /* Entry point for getting status counters */
1496 static struct net_device_stats *smsc911x_get_stats(struct net_device *dev)
1498 struct smsc911x_data *pdata = netdev_priv(dev);
1499 smsc911x_tx_update_txcounters(dev);
1500 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1504 /* Entry point for setting addressing modes */
1505 static void smsc911x_set_multicast_list(struct net_device *dev)
1507 struct smsc911x_data *pdata = netdev_priv(dev);
1508 unsigned long flags;
1510 if (dev->flags & IFF_PROMISC) {
1511 /* Enabling promiscuous mode */
1512 pdata->set_bits_mask = MAC_CR_PRMS_;
1513 pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1516 } else if (dev->flags & IFF_ALLMULTI) {
1517 /* Enabling all multicast mode */
1518 pdata->set_bits_mask = MAC_CR_MCPAS_;
1519 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_);
1522 } else if (!netdev_mc_empty(dev)) {
1523 /* Enabling specific multicast addresses */
1524 unsigned int hash_high = 0;
1525 unsigned int hash_low = 0;
1526 struct netdev_hw_addr *ha;
1528 pdata->set_bits_mask = MAC_CR_HPFILT_;
1529 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1531 netdev_for_each_mc_addr(ha, dev) {
1532 unsigned int bitnum = smsc911x_hash(ha->addr);
1533 unsigned int mask = 0x01 << (bitnum & 0x1F);
1541 pdata->hashhi = hash_high;
1542 pdata->hashlo = hash_low;
1544 /* Enabling local MAC address only */
1545 pdata->set_bits_mask = 0;
1546 pdata->clear_bits_mask =
1547 (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1552 spin_lock_irqsave(&pdata->mac_lock, flags);
1554 if (pdata->generation <= 1) {
1555 /* Older hardware revision - cannot change these flags while
1557 if (!pdata->multicast_update_pending) {
1559 SMSC_TRACE(pdata, hw, "scheduling mcast update");
1560 pdata->multicast_update_pending = 1;
1562 /* Request the hardware to stop, then perform the
1563 * update when we get an RX_STOP interrupt */
1564 temp = smsc911x_mac_read(pdata, MAC_CR);
1565 temp &= ~(MAC_CR_RXEN_);
1566 smsc911x_mac_write(pdata, MAC_CR, temp);
1568 /* There is another update pending, this should now
1569 * use the newer values */
1572 /* Newer hardware revision - can write immediately */
1573 smsc911x_rx_multicast_update(pdata);
1576 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1579 static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id)
1581 struct net_device *dev = dev_id;
1582 struct smsc911x_data *pdata = netdev_priv(dev);
1583 u32 intsts = smsc911x_reg_read(pdata, INT_STS);
1584 u32 inten = smsc911x_reg_read(pdata, INT_EN);
1585 int serviced = IRQ_NONE;
1588 if (unlikely(intsts & inten & INT_STS_SW_INT_)) {
1589 temp = smsc911x_reg_read(pdata, INT_EN);
1590 temp &= (~INT_EN_SW_INT_EN_);
1591 smsc911x_reg_write(pdata, INT_EN, temp);
1592 smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_);
1593 pdata->software_irq_signal = 1;
1595 serviced = IRQ_HANDLED;
1598 if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) {
1599 /* Called when there is a multicast update scheduled and
1600 * it is now safe to complete the update */
1601 SMSC_TRACE(pdata, intr, "RX Stop interrupt");
1602 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
1603 if (pdata->multicast_update_pending)
1604 smsc911x_rx_multicast_update_workaround(pdata);
1605 serviced = IRQ_HANDLED;
1608 if (intsts & inten & INT_STS_TDFA_) {
1609 temp = smsc911x_reg_read(pdata, FIFO_INT);
1610 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1611 smsc911x_reg_write(pdata, FIFO_INT, temp);
1612 smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_);
1613 netif_wake_queue(dev);
1614 serviced = IRQ_HANDLED;
1617 if (unlikely(intsts & inten & INT_STS_RXE_)) {
1618 SMSC_TRACE(pdata, intr, "RX Error interrupt");
1619 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_);
1620 serviced = IRQ_HANDLED;
1623 if (likely(intsts & inten & INT_STS_RSFL_)) {
1624 if (likely(napi_schedule_prep(&pdata->napi))) {
1625 /* Disable Rx interrupts */
1626 temp = smsc911x_reg_read(pdata, INT_EN);
1627 temp &= (~INT_EN_RSFL_EN_);
1628 smsc911x_reg_write(pdata, INT_EN, temp);
1629 /* Schedule a NAPI poll */
1630 __napi_schedule(&pdata->napi);
1632 SMSC_WARN(pdata, rx_err, "napi_schedule_prep failed");
1634 serviced = IRQ_HANDLED;
1640 #ifdef CONFIG_NET_POLL_CONTROLLER
1641 static void smsc911x_poll_controller(struct net_device *dev)
1643 disable_irq(dev->irq);
1644 smsc911x_irqhandler(0, dev);
1645 enable_irq(dev->irq);
1647 #endif /* CONFIG_NET_POLL_CONTROLLER */
1649 static int smsc911x_set_mac_address(struct net_device *dev, void *p)
1651 struct smsc911x_data *pdata = netdev_priv(dev);
1652 struct sockaddr *addr = p;
1654 /* On older hardware revisions we cannot change the mac address
1655 * registers while receiving data. Newer devices can safely change
1656 * this at any time. */
1657 if (pdata->generation <= 1 && netif_running(dev))
1660 if (!is_valid_ether_addr(addr->sa_data))
1661 return -EADDRNOTAVAIL;
1663 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
1665 spin_lock_irq(&pdata->mac_lock);
1666 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1667 spin_unlock_irq(&pdata->mac_lock);
1669 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
1674 /* Standard ioctls for mii-tool */
1675 static int smsc911x_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1677 struct smsc911x_data *pdata = netdev_priv(dev);
1679 if (!netif_running(dev) || !pdata->phy_dev)
1682 return phy_mii_ioctl(pdata->phy_dev, ifr, cmd);
1686 smsc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1688 struct smsc911x_data *pdata = netdev_priv(dev);
1692 return phy_ethtool_gset(pdata->phy_dev, cmd);
1696 smsc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1698 struct smsc911x_data *pdata = netdev_priv(dev);
1700 return phy_ethtool_sset(pdata->phy_dev, cmd);
1703 static void smsc911x_ethtool_getdrvinfo(struct net_device *dev,
1704 struct ethtool_drvinfo *info)
1706 strlcpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver));
1707 strlcpy(info->version, SMSC_DRV_VERSION, sizeof(info->version));
1708 strlcpy(info->bus_info, dev_name(dev->dev.parent),
1709 sizeof(info->bus_info));
1712 static int smsc911x_ethtool_nwayreset(struct net_device *dev)
1714 struct smsc911x_data *pdata = netdev_priv(dev);
1716 return phy_start_aneg(pdata->phy_dev);
1719 static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev)
1721 struct smsc911x_data *pdata = netdev_priv(dev);
1722 return pdata->msg_enable;
1725 static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1727 struct smsc911x_data *pdata = netdev_priv(dev);
1728 pdata->msg_enable = level;
1731 static int smsc911x_ethtool_getregslen(struct net_device *dev)
1733 return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) *
1738 smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs,
1741 struct smsc911x_data *pdata = netdev_priv(dev);
1742 struct phy_device *phy_dev = pdata->phy_dev;
1743 unsigned long flags;
1748 regs->version = pdata->idrev;
1749 for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32)))
1750 data[j++] = smsc911x_reg_read(pdata, i);
1752 for (i = MAC_CR; i <= WUCSR; i++) {
1753 spin_lock_irqsave(&pdata->mac_lock, flags);
1754 data[j++] = smsc911x_mac_read(pdata, i);
1755 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1758 for (i = 0; i <= 31; i++)
1759 data[j++] = smsc911x_mii_read(phy_dev->bus, phy_dev->addr, i);
1762 static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata)
1764 unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG);
1765 temp &= ~GPIO_CFG_EEPR_EN_;
1766 smsc911x_reg_write(pdata, GPIO_CFG, temp);
1770 static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op)
1775 SMSC_TRACE(pdata, drv, "op 0x%08x", op);
1776 if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
1777 SMSC_WARN(pdata, drv, "Busy at start");
1781 e2cmd = op | E2P_CMD_EPC_BUSY_;
1782 smsc911x_reg_write(pdata, E2P_CMD, e2cmd);
1786 e2cmd = smsc911x_reg_read(pdata, E2P_CMD);
1787 } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout));
1790 SMSC_TRACE(pdata, drv, "TIMED OUT");
1794 if (e2cmd & E2P_CMD_EPC_TIMEOUT_) {
1795 SMSC_TRACE(pdata, drv, "Error occurred during eeprom operation");
1802 static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata,
1803 u8 address, u8 *data)
1805 u32 op = E2P_CMD_EPC_CMD_READ_ | address;
1808 SMSC_TRACE(pdata, drv, "address 0x%x", address);
1809 ret = smsc911x_eeprom_send_cmd(pdata, op);
1812 data[address] = smsc911x_reg_read(pdata, E2P_DATA);
1817 static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata,
1818 u8 address, u8 data)
1820 u32 op = E2P_CMD_EPC_CMD_ERASE_ | address;
1824 SMSC_TRACE(pdata, drv, "address 0x%x, data 0x%x", address, data);
1825 ret = smsc911x_eeprom_send_cmd(pdata, op);
1828 op = E2P_CMD_EPC_CMD_WRITE_ | address;
1829 smsc911x_reg_write(pdata, E2P_DATA, (u32)data);
1831 /* Workaround for hardware read-after-write restriction */
1832 temp = smsc911x_reg_read(pdata, BYTE_TEST);
1834 ret = smsc911x_eeprom_send_cmd(pdata, op);
1840 static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev)
1842 return SMSC911X_EEPROM_SIZE;
1845 static int smsc911x_ethtool_get_eeprom(struct net_device *dev,
1846 struct ethtool_eeprom *eeprom, u8 *data)
1848 struct smsc911x_data *pdata = netdev_priv(dev);
1849 u8 eeprom_data[SMSC911X_EEPROM_SIZE];
1853 smsc911x_eeprom_enable_access(pdata);
1855 len = min(eeprom->len, SMSC911X_EEPROM_SIZE);
1856 for (i = 0; i < len; i++) {
1857 int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data);
1864 memcpy(data, &eeprom_data[eeprom->offset], len);
1869 static int smsc911x_ethtool_set_eeprom(struct net_device *dev,
1870 struct ethtool_eeprom *eeprom, u8 *data)
1873 struct smsc911x_data *pdata = netdev_priv(dev);
1875 smsc911x_eeprom_enable_access(pdata);
1876 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_);
1877 ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data);
1878 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_);
1880 /* Single byte write, according to man page */
1886 static const struct ethtool_ops smsc911x_ethtool_ops = {
1887 .get_settings = smsc911x_ethtool_getsettings,
1888 .set_settings = smsc911x_ethtool_setsettings,
1889 .get_link = ethtool_op_get_link,
1890 .get_drvinfo = smsc911x_ethtool_getdrvinfo,
1891 .nway_reset = smsc911x_ethtool_nwayreset,
1892 .get_msglevel = smsc911x_ethtool_getmsglevel,
1893 .set_msglevel = smsc911x_ethtool_setmsglevel,
1894 .get_regs_len = smsc911x_ethtool_getregslen,
1895 .get_regs = smsc911x_ethtool_getregs,
1896 .get_eeprom_len = smsc911x_ethtool_get_eeprom_len,
1897 .get_eeprom = smsc911x_ethtool_get_eeprom,
1898 .set_eeprom = smsc911x_ethtool_set_eeprom,
1901 static const struct net_device_ops smsc911x_netdev_ops = {
1902 .ndo_open = smsc911x_open,
1903 .ndo_stop = smsc911x_stop,
1904 .ndo_start_xmit = smsc911x_hard_start_xmit,
1905 .ndo_get_stats = smsc911x_get_stats,
1906 .ndo_set_rx_mode = smsc911x_set_multicast_list,
1907 .ndo_do_ioctl = smsc911x_do_ioctl,
1908 .ndo_change_mtu = eth_change_mtu,
1909 .ndo_validate_addr = eth_validate_addr,
1910 .ndo_set_mac_address = smsc911x_set_mac_address,
1911 #ifdef CONFIG_NET_POLL_CONTROLLER
1912 .ndo_poll_controller = smsc911x_poll_controller,
1916 /* copies the current mac address from hardware to dev->dev_addr */
1917 static void __devinit smsc911x_read_mac_address(struct net_device *dev)
1919 struct smsc911x_data *pdata = netdev_priv(dev);
1920 u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH);
1921 u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL);
1923 dev->dev_addr[0] = (u8)(mac_low32);
1924 dev->dev_addr[1] = (u8)(mac_low32 >> 8);
1925 dev->dev_addr[2] = (u8)(mac_low32 >> 16);
1926 dev->dev_addr[3] = (u8)(mac_low32 >> 24);
1927 dev->dev_addr[4] = (u8)(mac_high16);
1928 dev->dev_addr[5] = (u8)(mac_high16 >> 8);
1931 /* Initializing private device structures, only called from probe */
1932 static int __devinit smsc911x_init(struct net_device *dev)
1934 struct smsc911x_data *pdata = netdev_priv(dev);
1935 unsigned int byte_test;
1936 unsigned int to = 100;
1938 SMSC_TRACE(pdata, probe, "Driver Parameters:");
1939 SMSC_TRACE(pdata, probe, "LAN base: 0x%08lX",
1940 (unsigned long)pdata->ioaddr);
1941 SMSC_TRACE(pdata, probe, "IRQ: %d", dev->irq);
1942 SMSC_TRACE(pdata, probe, "PHY will be autodetected.");
1944 spin_lock_init(&pdata->dev_lock);
1945 spin_lock_init(&pdata->mac_lock);
1947 if (pdata->ioaddr == 0) {
1948 SMSC_WARN(pdata, probe, "pdata->ioaddr: 0x00000000");
1953 * poll the READY bit in PMT_CTRL. Any other access to the device is
1954 * forbidden while this bit isn't set. Try for 100ms
1956 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)
1959 pr_err("Device not READY in 100ms aborting\n");
1963 /* Check byte ordering */
1964 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1965 SMSC_TRACE(pdata, probe, "BYTE_TEST: 0x%08X", byte_test);
1966 if (byte_test == 0x43218765) {
1967 SMSC_TRACE(pdata, probe, "BYTE_TEST looks swapped, "
1968 "applying WORD_SWAP");
1969 smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff);
1971 /* 1 dummy read of BYTE_TEST is needed after a write to
1972 * WORD_SWAP before its contents are valid */
1973 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1975 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
1978 if (byte_test != 0x87654321) {
1979 SMSC_WARN(pdata, drv, "BYTE_TEST: 0x%08X", byte_test);
1980 if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) {
1981 SMSC_WARN(pdata, probe,
1982 "top 16 bits equal to bottom 16 bits");
1983 SMSC_TRACE(pdata, probe,
1984 "This may mean the chip is set "
1985 "for 32 bit while the bus is reading 16 bit");
1990 /* Default generation to zero (all workarounds apply) */
1991 pdata->generation = 0;
1993 pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
1994 switch (pdata->idrev & 0xFFFF0000) {
2000 /* LAN911[5678] family */
2001 pdata->generation = pdata->idrev & 0x0000FFFF;
2008 /* LAN921[5678] family */
2009 pdata->generation = 3;
2016 /* LAN9210/LAN9211/LAN9220/LAN9221 */
2017 pdata->generation = 4;
2021 SMSC_WARN(pdata, probe, "LAN911x not identified, idrev: 0x%08X",
2026 SMSC_TRACE(pdata, probe,
2027 "LAN911x identified, idrev: 0x%08X, generation: %d",
2028 pdata->idrev, pdata->generation);
2030 if (pdata->generation == 0)
2031 SMSC_WARN(pdata, probe,
2032 "This driver is not intended for this chip revision");
2034 /* workaround for platforms without an eeprom, where the mac address
2035 * is stored elsewhere and set by the bootloader. This saves the
2036 * mac address before resetting the device */
2037 if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS) {
2038 spin_lock_irq(&pdata->mac_lock);
2039 smsc911x_read_mac_address(dev);
2040 spin_unlock_irq(&pdata->mac_lock);
2043 /* Reset the LAN911x */
2044 if (smsc911x_soft_reset(pdata))
2047 /* Disable all interrupt sources until we bring the device up */
2048 smsc911x_reg_write(pdata, INT_EN, 0);
2051 dev->flags |= IFF_MULTICAST;
2052 netif_napi_add(dev, &pdata->napi, smsc911x_poll, SMSC_NAPI_WEIGHT);
2053 dev->netdev_ops = &smsc911x_netdev_ops;
2054 dev->ethtool_ops = &smsc911x_ethtool_ops;
2059 static int __devexit smsc911x_drv_remove(struct platform_device *pdev)
2061 struct net_device *dev;
2062 struct smsc911x_data *pdata;
2063 struct resource *res;
2065 dev = platform_get_drvdata(pdev);
2067 pdata = netdev_priv(dev);
2069 BUG_ON(!pdata->ioaddr);
2070 BUG_ON(!pdata->phy_dev);
2072 SMSC_TRACE(pdata, ifdown, "Stopping driver");
2074 phy_disconnect(pdata->phy_dev);
2075 pdata->phy_dev = NULL;
2076 mdiobus_unregister(pdata->mii_bus);
2077 mdiobus_free(pdata->mii_bus);
2079 platform_set_drvdata(pdev, NULL);
2080 unregister_netdev(dev);
2081 free_irq(dev->irq, dev);
2082 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2085 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2087 release_mem_region(res->start, resource_size(res));
2089 iounmap(pdata->ioaddr);
2096 /* standard register acces */
2097 static const struct smsc911x_ops standard_smsc911x_ops = {
2098 .reg_read = __smsc911x_reg_read,
2099 .reg_write = __smsc911x_reg_write,
2100 .rx_readfifo = smsc911x_rx_readfifo,
2101 .tx_writefifo = smsc911x_tx_writefifo,
2104 /* shifted register access */
2105 static const struct smsc911x_ops shifted_smsc911x_ops = {
2106 .reg_read = __smsc911x_reg_read_shift,
2107 .reg_write = __smsc911x_reg_write_shift,
2108 .rx_readfifo = smsc911x_rx_readfifo_shift,
2109 .tx_writefifo = smsc911x_tx_writefifo_shift,
2113 static int __devinit smsc911x_probe_config_dt(
2114 struct smsc911x_platform_config *config,
2115 struct device_node *np)
2123 config->phy_interface = of_get_phy_mode(np);
2125 mac = of_get_mac_address(np);
2127 memcpy(config->mac, mac, ETH_ALEN);
2129 of_property_read_u32(np, "reg-shift", &config->shift);
2131 of_property_read_u32(np, "reg-io-width", &width);
2133 config->flags |= SMSC911X_USE_32BIT;
2135 config->flags |= SMSC911X_USE_16BIT;
2137 if (of_get_property(np, "smsc,irq-active-high", NULL))
2138 config->irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH;
2140 if (of_get_property(np, "smsc,irq-push-pull", NULL))
2141 config->irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL;
2143 if (of_get_property(np, "smsc,force-internal-phy", NULL))
2144 config->flags |= SMSC911X_FORCE_INTERNAL_PHY;
2146 if (of_get_property(np, "smsc,force-external-phy", NULL))
2147 config->flags |= SMSC911X_FORCE_EXTERNAL_PHY;
2149 if (of_get_property(np, "smsc,save-mac-address", NULL))
2150 config->flags |= SMSC911X_SAVE_MAC_ADDRESS;
2155 static inline int smsc911x_probe_config_dt(
2156 struct smsc911x_platform_config *config,
2157 struct device_node *np)
2161 #endif /* CONFIG_OF */
2163 static int __devinit smsc911x_drv_probe(struct platform_device *pdev)
2165 struct device_node *np = pdev->dev.of_node;
2166 struct net_device *dev;
2167 struct smsc911x_data *pdata;
2168 struct smsc911x_platform_config *config = pdev->dev.platform_data;
2169 struct resource *res, *irq_res;
2170 unsigned int intcfg = 0;
2171 int res_size, irq_flags;
2174 pr_info("Driver version %s\n", SMSC_DRV_VERSION);
2176 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2179 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2181 pr_warn("Could not allocate resource\n");
2185 res_size = resource_size(res);
2187 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
2189 pr_warn("Could not allocate irq resource\n");
2194 if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) {
2199 dev = alloc_etherdev(sizeof(struct smsc911x_data));
2201 pr_warn("Could not allocate device\n");
2203 goto out_release_io_1;
2206 SET_NETDEV_DEV(dev, &pdev->dev);
2208 pdata = netdev_priv(dev);
2210 dev->irq = irq_res->start;
2211 irq_flags = irq_res->flags & IRQF_TRIGGER_MASK;
2212 pdata->ioaddr = ioremap_nocache(res->start, res_size);
2215 pdata->msg_enable = ((1 << debug) - 1);
2217 if (pdata->ioaddr == NULL) {
2218 SMSC_WARN(pdata, probe, "Error smsc911x base address invalid");
2220 goto out_free_netdev_2;
2223 retval = smsc911x_probe_config_dt(&pdata->config, np);
2224 if (retval && config) {
2225 /* copy config parameters across to pdata */
2226 memcpy(&pdata->config, config, sizeof(pdata->config));
2231 SMSC_WARN(pdata, probe, "Error smsc911x config not found");
2232 goto out_unmap_io_3;
2235 /* assume standard, non-shifted, access to HW registers */
2236 pdata->ops = &standard_smsc911x_ops;
2237 /* apply the right access if shifting is needed */
2238 if (pdata->config.shift)
2239 pdata->ops = &shifted_smsc911x_ops;
2241 retval = smsc911x_init(dev);
2243 goto out_unmap_io_3;
2245 /* configure irq polarity and type before connecting isr */
2246 if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH)
2247 intcfg |= INT_CFG_IRQ_POL_;
2249 if (pdata->config.irq_type == SMSC911X_IRQ_TYPE_PUSH_PULL)
2250 intcfg |= INT_CFG_IRQ_TYPE_;
2252 smsc911x_reg_write(pdata, INT_CFG, intcfg);
2254 /* Ensure interrupts are globally disabled before connecting ISR */
2255 smsc911x_reg_write(pdata, INT_EN, 0);
2256 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
2258 retval = request_irq(dev->irq, smsc911x_irqhandler,
2259 irq_flags | IRQF_SHARED, dev->name, dev);
2261 SMSC_WARN(pdata, probe,
2262 "Unable to claim requested irq: %d", dev->irq);
2263 goto out_unmap_io_3;
2266 platform_set_drvdata(pdev, dev);
2268 retval = register_netdev(dev);
2270 SMSC_WARN(pdata, probe, "Error %i registering device", retval);
2271 goto out_unset_drvdata_4;
2273 SMSC_TRACE(pdata, probe,
2274 "Network interface: \"%s\"", dev->name);
2277 retval = smsc911x_mii_init(pdev, dev);
2279 SMSC_WARN(pdata, probe, "Error %i initialising mii", retval);
2280 goto out_unregister_netdev_5;
2283 spin_lock_irq(&pdata->mac_lock);
2285 /* Check if mac address has been specified when bringing interface up */
2286 if (is_valid_ether_addr(dev->dev_addr)) {
2287 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2288 SMSC_TRACE(pdata, probe,
2289 "MAC Address is specified by configuration");
2290 } else if (is_valid_ether_addr(pdata->config.mac)) {
2291 memcpy(dev->dev_addr, pdata->config.mac, 6);
2292 SMSC_TRACE(pdata, probe,
2293 "MAC Address specified by platform data");
2295 /* Try reading mac address from device. if EEPROM is present
2296 * it will already have been set */
2299 if (is_valid_ether_addr(dev->dev_addr)) {
2300 /* eeprom values are valid so use them */
2301 SMSC_TRACE(pdata, probe,
2302 "Mac Address is read from LAN911x EEPROM");
2304 /* eeprom values are invalid, generate random MAC */
2305 random_ether_addr(dev->dev_addr);
2306 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2307 SMSC_TRACE(pdata, probe,
2308 "MAC Address is set to random_ether_addr");
2312 spin_unlock_irq(&pdata->mac_lock);
2314 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
2318 out_unregister_netdev_5:
2319 unregister_netdev(dev);
2320 out_unset_drvdata_4:
2321 platform_set_drvdata(pdev, NULL);
2322 free_irq(dev->irq, dev);
2324 iounmap(pdata->ioaddr);
2328 release_mem_region(res->start, resource_size(res));
2334 /* This implementation assumes the devices remains powered on its VDDVARIO
2335 * pins during suspend. */
2337 /* TODO: implement freeze/thaw callbacks for hibernation.*/
2339 static int smsc911x_suspend(struct device *dev)
2341 struct net_device *ndev = dev_get_drvdata(dev);
2342 struct smsc911x_data *pdata = netdev_priv(ndev);
2344 /* enable wake on LAN, energy detection and the external PME
2346 smsc911x_reg_write(pdata, PMT_CTRL,
2347 PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ |
2348 PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_);
2353 static int smsc911x_resume(struct device *dev)
2355 struct net_device *ndev = dev_get_drvdata(dev);
2356 struct smsc911x_data *pdata = netdev_priv(ndev);
2357 unsigned int to = 100;
2359 /* Note 3.11 from the datasheet:
2360 * "When the LAN9220 is in a power saving state, a write of any
2361 * data to the BYTE_TEST register will wake-up the device."
2363 smsc911x_reg_write(pdata, BYTE_TEST, 0);
2365 /* poll the READY bit in PMT_CTRL. Any other access to the device is
2366 * forbidden while this bit isn't set. Try for 100ms and return -EIO
2368 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)
2371 return (to == 0) ? -EIO : 0;
2374 static const struct dev_pm_ops smsc911x_pm_ops = {
2375 .suspend = smsc911x_suspend,
2376 .resume = smsc911x_resume,
2379 #define SMSC911X_PM_OPS (&smsc911x_pm_ops)
2382 #define SMSC911X_PM_OPS NULL
2385 static const struct of_device_id smsc911x_dt_ids[] = {
2386 { .compatible = "smsc,lan9115", },
2389 MODULE_DEVICE_TABLE(of, smsc911x_dt_ids);
2391 static struct platform_driver smsc911x_driver = {
2392 .probe = smsc911x_drv_probe,
2393 .remove = __devexit_p(smsc911x_drv_remove),
2395 .name = SMSC_CHIPNAME,
2396 .owner = THIS_MODULE,
2397 .pm = SMSC911X_PM_OPS,
2398 .of_match_table = smsc911x_dt_ids,
2402 /* Entry point for loading the module */
2403 static int __init smsc911x_init_module(void)
2406 return platform_driver_register(&smsc911x_driver);
2409 /* entry point for unloading the module */
2410 static void __exit smsc911x_cleanup_module(void)
2412 platform_driver_unregister(&smsc911x_driver);
2415 module_init(smsc911x_init_module);
2416 module_exit(smsc911x_cleanup_module);