drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2014 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 /* ethtool support for ixgbe */
  30
  31 #include <linux/interrupt.h>
  32 #include <linux/types.h>
  33 #include <linux/module.h>
  34 #include <linux/slab.h>
  35 #include <linux/pci.h>
  36 #include <linux/netdevice.h>
  37 #include <linux/ethtool.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/highmem.h>
  40 #include <linux/uaccess.h>
  41
  42 #include "ixgbe.h"
  43 #include "ixgbe_phy.h"
  44
  45
  46 #define IXGBE_ALL_RAR_ENTRIES 16
  47
  48 enum {NETDEV_STATS, IXGBE_STATS};
  49
  50 struct ixgbe_stats {
  51         char stat_string[ETH_GSTRING_LEN];
  52         int type;
  53         int sizeof_stat;
  54         int stat_offset;
  55 };
  56
  57 #define IXGBE_STAT(m)           IXGBE_STATS, \
  58                                 sizeof(((struct ixgbe_adapter *)0)->m), \
  59                                 offsetof(struct ixgbe_adapter, m)
  60 #define IXGBE_NETDEV_STAT(m)    NETDEV_STATS, \
  61                                 sizeof(((struct rtnl_link_stats64 *)0)->m), \
  62                                 offsetof(struct rtnl_link_stats64, m)
  63
  64 static const struct ixgbe_stats ixgbe_gstrings_stats[] = {
  65         {"rx_packets", IXGBE_NETDEV_STAT(rx_packets)},
  66         {"tx_packets", IXGBE_NETDEV_STAT(tx_packets)},
  67         {"rx_bytes", IXGBE_NETDEV_STAT(rx_bytes)},
  68         {"tx_bytes", IXGBE_NETDEV_STAT(tx_bytes)},
  69         {"rx_pkts_nic", IXGBE_STAT(stats.gprc)},
  70         {"tx_pkts_nic", IXGBE_STAT(stats.gptc)},
  71         {"rx_bytes_nic", IXGBE_STAT(stats.gorc)},
  72         {"tx_bytes_nic", IXGBE_STAT(stats.gotc)},
  73         {"lsc_int", IXGBE_STAT(lsc_int)},
  74         {"tx_busy", IXGBE_STAT(tx_busy)},
  75         {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
  76         {"rx_errors", IXGBE_NETDEV_STAT(rx_errors)},
  77         {"tx_errors", IXGBE_NETDEV_STAT(tx_errors)},
  78         {"rx_dropped", IXGBE_NETDEV_STAT(rx_dropped)},
  79         {"tx_dropped", IXGBE_NETDEV_STAT(tx_dropped)},
  80         {"multicast", IXGBE_NETDEV_STAT(multicast)},
  81         {"broadcast", IXGBE_STAT(stats.bprc)},
  82         {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
  83         {"collisions", IXGBE_NETDEV_STAT(collisions)},
  84         {"rx_over_errors", IXGBE_NETDEV_STAT(rx_over_errors)},
  85         {"rx_crc_errors", IXGBE_NETDEV_STAT(rx_crc_errors)},
  86         {"rx_frame_errors", IXGBE_NETDEV_STAT(rx_frame_errors)},
  87         {"hw_rsc_aggregated", IXGBE_STAT(rsc_total_count)},
  88         {"hw_rsc_flushed", IXGBE_STAT(rsc_total_flush)},
  89         {"fdir_match", IXGBE_STAT(stats.fdirmatch)},
  90         {"fdir_miss", IXGBE_STAT(stats.fdirmiss)},
  91         {"fdir_overflow", IXGBE_STAT(fdir_overflow)},
  92         {"rx_fifo_errors", IXGBE_NETDEV_STAT(rx_fifo_errors)},
  93         {"rx_missed_errors", IXGBE_NETDEV_STAT(rx_missed_errors)},
  94         {"tx_aborted_errors", IXGBE_NETDEV_STAT(tx_aborted_errors)},
  95         {"tx_carrier_errors", IXGBE_NETDEV_STAT(tx_carrier_errors)},
  96         {"tx_fifo_errors", IXGBE_NETDEV_STAT(tx_fifo_errors)},
  97         {"tx_heartbeat_errors", IXGBE_NETDEV_STAT(tx_heartbeat_errors)},
  98         {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
  99         {"tx_restart_queue", IXGBE_STAT(restart_queue)},
 100         {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
 101         {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
 102         {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
 103         {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
 104         {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
 105         {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
 106         {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
 107         {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
 108         {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
 109         {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)},
 110         {"os2bmc_rx_by_bmc", IXGBE_STAT(stats.o2bgptc)},
 111         {"os2bmc_tx_by_bmc", IXGBE_STAT(stats.b2ospc)},
 112         {"os2bmc_tx_by_host", IXGBE_STAT(stats.o2bspc)},
 113         {"os2bmc_rx_by_host", IXGBE_STAT(stats.b2ogprc)},
 114 #ifdef IXGBE_FCOE
 115         {"fcoe_bad_fccrc", IXGBE_STAT(stats.fccrc)},
 116         {"rx_fcoe_dropped", IXGBE_STAT(stats.fcoerpdc)},
 117         {"rx_fcoe_packets", IXGBE_STAT(stats.fcoeprc)},
 118         {"rx_fcoe_dwords", IXGBE_STAT(stats.fcoedwrc)},
 119         {"fcoe_noddp", IXGBE_STAT(stats.fcoe_noddp)},
 120         {"fcoe_noddp_ext_buff", IXGBE_STAT(stats.fcoe_noddp_ext_buff)},
 121         {"tx_fcoe_packets", IXGBE_STAT(stats.fcoeptc)},
 122         {"tx_fcoe_dwords", IXGBE_STAT(stats.fcoedwtc)},
 123 #endif /* IXGBE_FCOE */
 124 };
 125
 126 /* ixgbe allocates num_tx_queues and num_rx_queues symmetrically so
 127  * we set the num_rx_queues to evaluate to num_tx_queues. This is
 128  * used because we do not have a good way to get the max number of
 129  * rx queues with CONFIG_RPS disabled.
 130  */
 131 #define IXGBE_NUM_RX_QUEUES netdev->num_tx_queues
 132
 133 #define IXGBE_QUEUE_STATS_LEN ( \
 134         (netdev->num_tx_queues + IXGBE_NUM_RX_QUEUES) * \
 135         (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
 136 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
 137 #define IXGBE_PB_STATS_LEN ( \
 138                         (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
 139                          sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
 140                          sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
 141                          sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
 142                         / sizeof(u64))
 143 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
 144                          IXGBE_PB_STATS_LEN + \
 145                          IXGBE_QUEUE_STATS_LEN)
 146
 147 static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = {
 148         "Register test  (offline)", "Eeprom test    (offline)",
 149         "Interrupt test (offline)", "Loopback test  (offline)",
 150         "Link test   (on/offline)"
 151 };
 152 #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN
 153
 154 static int ixgbe_get_settings(struct net_device *netdev,
 155                               struct ethtool_cmd *ecmd)
 156 {
 157         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 158         struct ixgbe_hw *hw = &adapter->hw;
 159         ixgbe_link_speed supported_link;
 160         u32 link_speed = 0;
 161         bool autoneg = false;
 162         bool link_up;
 163
 164         hw->mac.ops.get_link_capabilities(hw, &supported_link, &autoneg);
 165
 166         /* set the supported link speeds */
 167         if (supported_link & IXGBE_LINK_SPEED_10GB_FULL)
 168                 ecmd->supported |= SUPPORTED_10000baseT_Full;
 169         if (supported_link & IXGBE_LINK_SPEED_1GB_FULL)
 170                 ecmd->supported |= SUPPORTED_1000baseT_Full;
 171         if (supported_link & IXGBE_LINK_SPEED_100_FULL)
 172                 ecmd->supported |= SUPPORTED_100baseT_Full;
 173
 174         /* set the advertised speeds */
 175         if (hw->phy.autoneg_advertised) {
 176                 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL)
 177                         ecmd->advertising |= ADVERTISED_100baseT_Full;
 178                 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL)
 179                         ecmd->advertising |= ADVERTISED_10000baseT_Full;
 180                 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL)
 181                         ecmd->advertising |= ADVERTISED_1000baseT_Full;
 182         } else {
 183                 /* default modes in case phy.autoneg_advertised isn't set */
 184                 if (supported_link & IXGBE_LINK_SPEED_10GB_FULL)
 185                         ecmd->advertising |= ADVERTISED_10000baseT_Full;
 186                 if (supported_link & IXGBE_LINK_SPEED_1GB_FULL)
 187                         ecmd->advertising |= ADVERTISED_1000baseT_Full;
 188                 if (supported_link & IXGBE_LINK_SPEED_100_FULL)
 189                         ecmd->advertising |= ADVERTISED_100baseT_Full;
 190
 191                 if (hw->phy.multispeed_fiber && !autoneg) {
 192                         if (supported_link & IXGBE_LINK_SPEED_10GB_FULL)
 193                                 ecmd->advertising = ADVERTISED_10000baseT_Full;
 194                 }
 195         }
 196
 197         if (autoneg) {
 198                 ecmd->supported |= SUPPORTED_Autoneg;
 199                 ecmd->advertising |= ADVERTISED_Autoneg;
 200                 ecmd->autoneg = AUTONEG_ENABLE;
 201         } else
 202                 ecmd->autoneg = AUTONEG_DISABLE;
 203
 204         ecmd->transceiver = XCVR_EXTERNAL;
 205
 206         /* Determine the remaining settings based on the PHY type. */
 207         switch (adapter->hw.phy.type) {
 208         case ixgbe_phy_tn:
 209         case ixgbe_phy_aq:
 210         case ixgbe_phy_cu_unknown:
 211                 ecmd->supported |= SUPPORTED_TP;
 212                 ecmd->advertising |= ADVERTISED_TP;
 213                 ecmd->port = PORT_TP;
 214                 break;
 215         case ixgbe_phy_qt:
 216                 ecmd->supported |= SUPPORTED_FIBRE;
 217                 ecmd->advertising |= ADVERTISED_FIBRE;
 218                 ecmd->port = PORT_FIBRE;
 219                 break;
 220         case ixgbe_phy_nl:
 221         case ixgbe_phy_sfp_passive_tyco:
 222         case ixgbe_phy_sfp_passive_unknown:
 223         case ixgbe_phy_sfp_ftl:
 224         case ixgbe_phy_sfp_avago:
 225         case ixgbe_phy_sfp_intel:
 226         case ixgbe_phy_sfp_unknown:
 227                 /* SFP+ devices, further checking needed */
 228                 switch (adapter->hw.phy.sfp_type) {
 229                 case ixgbe_sfp_type_da_cu:
 230                 case ixgbe_sfp_type_da_cu_core0:
 231                 case ixgbe_sfp_type_da_cu_core1:
 232                         ecmd->supported |= SUPPORTED_FIBRE;
 233                         ecmd->advertising |= ADVERTISED_FIBRE;
 234                         ecmd->port = PORT_DA;
 235                         break;
 236                 case ixgbe_sfp_type_sr:
 237                 case ixgbe_sfp_type_lr:
 238                 case ixgbe_sfp_type_srlr_core0:
 239                 case ixgbe_sfp_type_srlr_core1:
 240                 case ixgbe_sfp_type_1g_sx_core0:
 241                 case ixgbe_sfp_type_1g_sx_core1:
 242                 case ixgbe_sfp_type_1g_lx_core0:
 243                 case ixgbe_sfp_type_1g_lx_core1:
 244                         ecmd->supported |= SUPPORTED_FIBRE;
 245                         ecmd->advertising |= ADVERTISED_FIBRE;
 246                         ecmd->port = PORT_FIBRE;
 247                         break;
 248                 case ixgbe_sfp_type_not_present:
 249                         ecmd->supported |= SUPPORTED_FIBRE;
 250                         ecmd->advertising |= ADVERTISED_FIBRE;
 251                         ecmd->port = PORT_NONE;
 252                         break;
 253                 case ixgbe_sfp_type_1g_cu_core0:
 254                 case ixgbe_sfp_type_1g_cu_core1:
 255                         ecmd->supported |= SUPPORTED_TP;
 256                         ecmd->advertising |= ADVERTISED_TP;
 257                         ecmd->port = PORT_TP;
 258                         break;
 259                 case ixgbe_sfp_type_unknown:
 260                 default:
 261                         ecmd->supported |= SUPPORTED_FIBRE;
 262                         ecmd->advertising |= ADVERTISED_FIBRE;
 263                         ecmd->port = PORT_OTHER;
 264                         break;
 265                 }
 266                 break;
 267         case ixgbe_phy_xaui:
 268                 ecmd->supported |= SUPPORTED_FIBRE;
 269                 ecmd->advertising |= ADVERTISED_FIBRE;
 270                 ecmd->port = PORT_NONE;
 271                 break;
 272         case ixgbe_phy_unknown:
 273         case ixgbe_phy_generic:
 274         case ixgbe_phy_sfp_unsupported:
 275         default:
 276                 ecmd->supported |= SUPPORTED_FIBRE;
 277                 ecmd->advertising |= ADVERTISED_FIBRE;
 278                 ecmd->port = PORT_OTHER;
 279                 break;
 280         }
 281
 282         hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
 283         if (link_up) {
 284                 switch (link_speed) {
 285                 case IXGBE_LINK_SPEED_10GB_FULL:
 286                         ethtool_cmd_speed_set(ecmd, SPEED_10000);
 287                         break;
 288                 case IXGBE_LINK_SPEED_1GB_FULL:
 289                         ethtool_cmd_speed_set(ecmd, SPEED_1000);
 290                         break;
 291                 case IXGBE_LINK_SPEED_100_FULL:
 292                         ethtool_cmd_speed_set(ecmd, SPEED_100);
 293                         break;
 294                 default:
 295                         break;
 296                 }
 297                 ecmd->duplex = DUPLEX_FULL;
 298         } else {
 299                 ethtool_cmd_speed_set(ecmd, SPEED_UNKNOWN);
 300                 ecmd->duplex = DUPLEX_UNKNOWN;
 301         }
 302
 303         return 0;
 304 }
 305
 306 static int ixgbe_set_settings(struct net_device *netdev,
 307                               struct ethtool_cmd *ecmd)
 308 {
 309         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 310         struct ixgbe_hw *hw = &adapter->hw;
 311         u32 advertised, old;
 312         s32 err = 0;
 313
 314         if ((hw->phy.media_type == ixgbe_media_type_copper) ||
 315             (hw->phy.multispeed_fiber)) {
 316                 /*
 317                  * this function does not support duplex forcing, but can
 318                  * limit the advertising of the adapter to the specified speed
 319                  */
 320                 if (ecmd->advertising & ~ecmd->supported)
 321                         return -EINVAL;
 322
 323                 /* only allow one speed at a time if no autoneg */
 324                 if (!ecmd->autoneg && hw->phy.multispeed_fiber) {
 325                         if (ecmd->advertising ==
 326                             (ADVERTISED_10000baseT_Full |
 327                              ADVERTISED_1000baseT_Full))
 328                                 return -EINVAL;
 329                 }
 330
 331                 old = hw->phy.autoneg_advertised;
 332                 advertised = 0;
 333                 if (ecmd->advertising & ADVERTISED_10000baseT_Full)
 334                         advertised |= IXGBE_LINK_SPEED_10GB_FULL;
 335
 336                 if (ecmd->advertising & ADVERTISED_1000baseT_Full)
 337                         advertised |= IXGBE_LINK_SPEED_1GB_FULL;
 338
 339                 if (ecmd->advertising & ADVERTISED_100baseT_Full)
 340                         advertised |= IXGBE_LINK_SPEED_100_FULL;
 341
 342                 if (old == advertised)
 343                         return err;
 344                 /* this sets the link speed and restarts auto-neg */
 345                 hw->mac.autotry_restart = true;
 346                 err = hw->mac.ops.setup_link(hw, advertised, true);
 347                 if (err) {
 348                         e_info(probe, "setup link failed with code %d\n", err);
 349                         hw->mac.ops.setup_link(hw, old, true);
 350                 }
 351         } else {
 352                 /* in this case we currently only support 10Gb/FULL */
 353                 u32 speed = ethtool_cmd_speed(ecmd);
 354                 if ((ecmd->autoneg == AUTONEG_ENABLE) ||
 355                     (ecmd->advertising != ADVERTISED_10000baseT_Full) ||
 356                     (speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL))
 357                         return -EINVAL;
 358         }
 359
 360         return err;
 361 }
 362
 363 static void ixgbe_get_pauseparam(struct net_device *netdev,
 364                                  struct ethtool_pauseparam *pause)
 365 {
 366         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 367         struct ixgbe_hw *hw = &adapter->hw;
 368
 369         if (ixgbe_device_supports_autoneg_fc(hw) &&
 370             !hw->fc.disable_fc_autoneg)
 371                 pause->autoneg = 1;
 372         else
 373                 pause->autoneg = 0;
 374
 375         if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
 376                 pause->rx_pause = 1;
 377         } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) {
 378                 pause->tx_pause = 1;
 379         } else if (hw->fc.current_mode == ixgbe_fc_full) {
 380                 pause->rx_pause = 1;
 381                 pause->tx_pause = 1;
 382         }
 383 }
 384
 385 static int ixgbe_set_pauseparam(struct net_device *netdev,
 386                                 struct ethtool_pauseparam *pause)
 387 {
 388         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 389         struct ixgbe_hw *hw = &adapter->hw;
 390         struct ixgbe_fc_info fc = hw->fc;
 391
 392         /* 82598 does no support link flow control with DCB enabled */
 393         if ((hw->mac.type == ixgbe_mac_82598EB) &&
 394             (adapter->flags & IXGBE_FLAG_DCB_ENABLED))
 395                 return -EINVAL;
 396
 397         /* some devices do not support autoneg of link flow control */
 398         if ((pause->autoneg == AUTONEG_ENABLE) &&
 399             !ixgbe_device_supports_autoneg_fc(hw))
 400                 return -EINVAL;
 401
 402         fc.disable_fc_autoneg = (pause->autoneg != AUTONEG_ENABLE);
 403
 404         if ((pause->rx_pause && pause->tx_pause) || pause->autoneg)
 405                 fc.requested_mode = ixgbe_fc_full;
 406         else if (pause->rx_pause && !pause->tx_pause)
 407                 fc.requested_mode = ixgbe_fc_rx_pause;
 408         else if (!pause->rx_pause && pause->tx_pause)
 409                 fc.requested_mode = ixgbe_fc_tx_pause;
 410         else
 411                 fc.requested_mode = ixgbe_fc_none;
 412
 413         /* if the thing changed then we'll update and use new autoneg */
 414         if (memcmp(&fc, &hw->fc, sizeof(struct ixgbe_fc_info))) {
 415                 hw->fc = fc;
 416                 if (netif_running(netdev))
 417                         ixgbe_reinit_locked(adapter);
 418                 else
 419                         ixgbe_reset(adapter);
 420         }
 421
 422         return 0;
 423 }
 424
 425 static u32 ixgbe_get_msglevel(struct net_device *netdev)
 426 {
 427         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 428         return adapter->msg_enable;
 429 }
 430
 431 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
 432 {
 433         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 434         adapter->msg_enable = data;
 435 }
 436
 437 static int ixgbe_get_regs_len(struct net_device *netdev)
 438 {
 439 #define IXGBE_REGS_LEN  1139
 440         return IXGBE_REGS_LEN * sizeof(u32);
 441 }
 442
 443 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
 444
 445 static void ixgbe_get_regs(struct net_device *netdev,
 446                            struct ethtool_regs *regs, void *p)
 447 {
 448         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 449         struct ixgbe_hw *hw = &adapter->hw;
 450         u32 *regs_buff = p;
 451         u8 i;
 452
 453         memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
 454
 455         regs->version = hw->mac.type << 24 | hw->revision_id << 16 |
 456                         hw->device_id;
 457
 458         /* General Registers */
 459         regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
 460         regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
 461         regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
 462         regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
 463         regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
 464         regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
 465         regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
 466         regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
 467
 468         /* NVM Register */
 469         regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
 470         regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
 471         regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
 472         regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
 473         regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
 474         regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
 475         regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
 476         regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
 477         regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
 478         regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
 479
 480         /* Interrupt */
 481         /* don't read EICR because it can clear interrupt causes, instead
 482          * read EICS which is a shadow but doesn't clear EICR */
 483         regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
 484         regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
 485         regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
 486         regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
 487         regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
 488         regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
 489         regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
 490         regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
 491         regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
 492         regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
 493         regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
 494         regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
 495
 496         /* Flow Control */
 497         regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
 498         regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
 499         regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
 500         regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
 501         regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
 502         for (i = 0; i < 8; i++) {
 503                 switch (hw->mac.type) {
 504                 case ixgbe_mac_82598EB:
 505                         regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
 506                         regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
 507                         break;
 508                 case ixgbe_mac_82599EB:
 509                 case ixgbe_mac_X540:
 510                         regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL_82599(i));
 511                         regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH_82599(i));
 512                         break;
 513                 default:
 514                         break;
 515                 }
 516         }
 517         regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
 518         regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
 519
 520         /* Receive DMA */
 521         for (i = 0; i < 64; i++)
 522                 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 523         for (i = 0; i < 64; i++)
 524                 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 525         for (i = 0; i < 64; i++)
 526                 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 527         for (i = 0; i < 64; i++)
 528                 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 529         for (i = 0; i < 64; i++)
 530                 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 531         for (i = 0; i < 64; i++)
 532                 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 533         for (i = 0; i < 16; i++)
 534                 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 535         for (i = 0; i < 16; i++)
 536                 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 537         regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
 538         for (i = 0; i < 8; i++)
 539                 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
 540         regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
 541         regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
 542
 543         /* Receive */
 544         regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
 545         regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
 546         for (i = 0; i < 16; i++)
 547                 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
 548         for (i = 0; i < 16; i++)
 549                 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
 550         regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
 551         regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
 552         regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
 553         regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
 554         regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
 555         regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
 556         for (i = 0; i < 8; i++)
 557                 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
 558         for (i = 0; i < 8; i++)
 559                 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
 560         regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
 561
 562         /* Transmit */
 563         for (i = 0; i < 32; i++)
 564                 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 565         for (i = 0; i < 32; i++)
 566                 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 567         for (i = 0; i < 32; i++)
 568                 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 569         for (i = 0; i < 32; i++)
 570                 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 571         for (i = 0; i < 32; i++)
 572                 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 573         for (i = 0; i < 32; i++)
 574                 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 575         for (i = 0; i < 32; i++)
 576                 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
 577         for (i = 0; i < 32; i++)
 578                 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
 579         regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
 580         for (i = 0; i < 16; i++)
 581                 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
 582         regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
 583         for (i = 0; i < 8; i++)
 584                 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
 585         regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
 586
 587         /* Wake Up */
 588         regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
 589         regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
 590         regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
 591         regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
 592         regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
 593         regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
 594         regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
 595         regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
 596         regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0));
 597
 598         /* DCB */
 599         regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);   /* same as FCCFG  */
 600         regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS); /* same as RTTPCS */
 601
 602         switch (hw->mac.type) {
 603         case ixgbe_mac_82598EB:
 604                 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
 605                 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
 606                 for (i = 0; i < 8; i++)
 607                         regs_buff[833 + i] =
 608                                 IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
 609                 for (i = 0; i < 8; i++)
 610                         regs_buff[841 + i] =
 611                                 IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
 612                 for (i = 0; i < 8; i++)
 613                         regs_buff[849 + i] =
 614                                 IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
 615                 for (i = 0; i < 8; i++)
 616                         regs_buff[857 + i] =
 617                                 IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
 618                 break;
 619         case ixgbe_mac_82599EB:
 620         case ixgbe_mac_X540:
 621                 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
 622                 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RTRPCS);
 623                 for (i = 0; i < 8; i++)
 624                         regs_buff[833 + i] =
 625                                 IXGBE_READ_REG(hw, IXGBE_RTRPT4C(i));
 626                 for (i = 0; i < 8; i++)
 627                         regs_buff[841 + i] =
 628                                 IXGBE_READ_REG(hw, IXGBE_RTRPT4S(i));
 629                 for (i = 0; i < 8; i++)
 630                         regs_buff[849 + i] =
 631                                 IXGBE_READ_REG(hw, IXGBE_RTTDT2C(i));
 632                 for (i = 0; i < 8; i++)
 633                         regs_buff[857 + i] =
 634                                 IXGBE_READ_REG(hw, IXGBE_RTTDT2S(i));
 635                 break;
 636         default:
 637                 break;
 638         }
 639
 640         for (i = 0; i < 8; i++)
 641                 regs_buff[865 + i] =
 642                 IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i)); /* same as RTTPT2C */
 643         for (i = 0; i < 8; i++)
 644                 regs_buff[873 + i] =
 645                 IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i)); /* same as RTTPT2S */
 646
 647         /* Statistics */
 648         regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
 649         regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
 650         regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
 651         regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
 652         for (i = 0; i < 8; i++)
 653                 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
 654         regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
 655         regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
 656         regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
 657         regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
 658         regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
 659         regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
 660         regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
 661         for (i = 0; i < 8; i++)
 662                 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
 663         for (i = 0; i < 8; i++)
 664                 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
 665         for (i = 0; i < 8; i++)
 666                 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
 667         for (i = 0; i < 8; i++)
 668                 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
 669         regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
 670         regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
 671         regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
 672         regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
 673         regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
 674         regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
 675         regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
 676         regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
 677         regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
 678         regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
 679         regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
 680         regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
 681         for (i = 0; i < 8; i++)
 682                 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
 683         regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
 684         regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
 685         regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
 686         regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
 687         regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
 688         regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
 689         regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
 690         regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
 691         regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
 692         regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
 693         regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
 694         regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
 695         regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
 696         regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
 697         regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
 698         regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
 699         regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
 700         regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
 701         regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
 702         for (i = 0; i < 16; i++)
 703                 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
 704         for (i = 0; i < 16; i++)
 705                 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
 706         for (i = 0; i < 16; i++)
 707                 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
 708         for (i = 0; i < 16; i++)
 709                 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
 710
 711         /* MAC */
 712         regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
 713         regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
 714         regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
 715         regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
 716         regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
 717         regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
 718         regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
 719         regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
 720         regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
 721         regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
 722         regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
 723         regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
 724         regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
 725         regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
 726         regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
 727         regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
 728         regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
 729         regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
 730         regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
 731         regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
 732         regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
 733         regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
 734         regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
 735         regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
 736         regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
 737         regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
 738         regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
 739         regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
 740         regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
 741         regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
 742         regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
 743         regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
 744         regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
 745
 746         /* Diagnostic */
 747         regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
 748         for (i = 0; i < 8; i++)
 749                 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
 750         regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
 751         for (i = 0; i < 4; i++)
 752                 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
 753         regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
 754         regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
 755         for (i = 0; i < 8; i++)
 756                 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
 757         regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
 758         for (i = 0; i < 4; i++)
 759                 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
 760         regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
 761         regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
 762         regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
 763         regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
 764         regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
 765         regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
 766         regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
 767         regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
 768         regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
 769         regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
 770         regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
 771         for (i = 0; i < 8; i++)
 772                 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
 773         regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
 774         regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
 775         regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
 776         regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
 777         regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
 778         regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
 779         regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
 780         regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
 781         regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
 782
 783         /* 82599 X540 specific registers  */
 784         regs_buff[1128] = IXGBE_READ_REG(hw, IXGBE_MFLCN);
 785
 786         /* 82599 X540 specific DCB registers  */
 787         regs_buff[1129] = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
 788         regs_buff[1130] = IXGBE_READ_REG(hw, IXGBE_RTTUP2TC);
 789         for (i = 0; i < 4; i++)
 790                 regs_buff[1131 + i] = IXGBE_READ_REG(hw, IXGBE_TXLLQ(i));
 791         regs_buff[1135] = IXGBE_READ_REG(hw, IXGBE_RTTBCNRM);
 792                                         /* same as RTTQCNRM */
 793         regs_buff[1136] = IXGBE_READ_REG(hw, IXGBE_RTTBCNRD);
 794                                         /* same as RTTQCNRR */
 795
 796         /* X540 specific DCB registers  */
 797         regs_buff[1137] = IXGBE_READ_REG(hw, IXGBE_RTTQCNCR);
 798         regs_buff[1138] = IXGBE_READ_REG(hw, IXGBE_RTTQCNTG);
 799 }
 800
 801 static int ixgbe_get_eeprom_len(struct net_device *netdev)
 802 {
 803         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 804         return adapter->hw.eeprom.word_size * 2;
 805 }
 806
 807 static int ixgbe_get_eeprom(struct net_device *netdev,
 808                             struct ethtool_eeprom *eeprom, u8 *bytes)
 809 {
 810         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 811         struct ixgbe_hw *hw = &adapter->hw;
 812         u16 *eeprom_buff;
 813         int first_word, last_word, eeprom_len;
 814         int ret_val = 0;
 815         u16 i;
 816
 817         if (eeprom->len == 0)
 818                 return -EINVAL;
 819
 820         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 821
 822         first_word = eeprom->offset >> 1;
 823         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 824         eeprom_len = last_word - first_word + 1;
 825
 826         eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
 827         if (!eeprom_buff)
 828                 return -ENOMEM;
 829
 830         ret_val = hw->eeprom.ops.read_buffer(hw, first_word, eeprom_len,
 831                                              eeprom_buff);
 832
 833         /* Device's eeprom is always little-endian, word addressable */
 834         for (i = 0; i < eeprom_len; i++)
 835                 le16_to_cpus(&eeprom_buff[i]);
 836
 837         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
 838         kfree(eeprom_buff);
 839
 840         return ret_val;
 841 }
 842
 843 static int ixgbe_set_eeprom(struct net_device *netdev,
 844                             struct ethtool_eeprom *eeprom, u8 *bytes)
 845 {
 846         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 847         struct ixgbe_hw *hw = &adapter->hw;
 848         u16 *eeprom_buff;
 849         void *ptr;
 850         int max_len, first_word, last_word, ret_val = 0;
 851         u16 i;
 852
 853         if (eeprom->len == 0)
 854                 return -EINVAL;
 855
 856         if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
 857                 return -EINVAL;
 858
 859         max_len = hw->eeprom.word_size * 2;
 860
 861         first_word = eeprom->offset >> 1;
 862         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 863         eeprom_buff = kmalloc(max_len, GFP_KERNEL);
 864         if (!eeprom_buff)
 865                 return -ENOMEM;
 866
 867         ptr = eeprom_buff;
 868
 869         if (eeprom->offset & 1) {
 870                 /*
 871                  * need read/modify/write of first changed EEPROM word
 872                  * only the second byte of the word is being modified
 873                  */
 874                 ret_val = hw->eeprom.ops.read(hw, first_word, &eeprom_buff[0]);
 875                 if (ret_val)
 876                         goto err;
 877
 878                 ptr++;
 879         }
 880         if ((eeprom->offset + eeprom->len) & 1) {
 881                 /*
 882                  * need read/modify/write of last changed EEPROM word
 883                  * only the first byte of the word is being modified
 884                  */
 885                 ret_val = hw->eeprom.ops.read(hw, last_word,
 886                                           &eeprom_buff[last_word - first_word]);
 887                 if (ret_val)
 888                         goto err;
 889         }
 890
 891         /* Device's eeprom is always little-endian, word addressable */
 892         for (i = 0; i < last_word - first_word + 1; i++)
 893                 le16_to_cpus(&eeprom_buff[i]);
 894
 895         memcpy(ptr, bytes, eeprom->len);
 896
 897         for (i = 0; i < last_word - first_word + 1; i++)
 898                 cpu_to_le16s(&eeprom_buff[i]);
 899
 900         ret_val = hw->eeprom.ops.write_buffer(hw, first_word,
 901                                               last_word - first_word + 1,
 902                                               eeprom_buff);
 903
 904         /* Update the checksum */
 905         if (ret_val == 0)
 906                 hw->eeprom.ops.update_checksum(hw);
 907
 908 err:
 909         kfree(eeprom_buff);
 910         return ret_val;
 911 }
 912
 913 static void ixgbe_get_drvinfo(struct net_device *netdev,
 914                               struct ethtool_drvinfo *drvinfo)
 915 {
 916         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 917         u32 nvm_track_id;
 918
 919         strlcpy(drvinfo->driver, ixgbe_driver_name, sizeof(drvinfo->driver));
 920         strlcpy(drvinfo->version, ixgbe_driver_version,
 921                 sizeof(drvinfo->version));
 922
 923         nvm_track_id = (adapter->eeprom_verh << 16) |
 924                         adapter->eeprom_verl;
 925         snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version), "0x%08x",
 926                  nvm_track_id);
 927
 928         strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
 929                 sizeof(drvinfo->bus_info));
 930         drvinfo->n_stats = IXGBE_STATS_LEN;
 931         drvinfo->testinfo_len = IXGBE_TEST_LEN;
 932         drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
 933 }
 934
 935 static void ixgbe_get_ringparam(struct net_device *netdev,
 936                                 struct ethtool_ringparam *ring)
 937 {
 938         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 939         struct ixgbe_ring *tx_ring = adapter->tx_ring[0];
 940         struct ixgbe_ring *rx_ring = adapter->rx_ring[0];
 941
 942         ring->rx_max_pending = IXGBE_MAX_RXD;
 943         ring->tx_max_pending = IXGBE_MAX_TXD;
 944         ring->rx_pending = rx_ring->count;
 945         ring->tx_pending = tx_ring->count;
 946 }
 947
 948 static int ixgbe_set_ringparam(struct net_device *netdev,
 949                                struct ethtool_ringparam *ring)
 950 {
 951         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 952         struct ixgbe_ring *temp_ring;
 953         int i, err = 0;
 954         u32 new_rx_count, new_tx_count;
 955
 956         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 957                 return -EINVAL;
 958
 959         new_tx_count = clamp_t(u32, ring->tx_pending,
 960                                IXGBE_MIN_TXD, IXGBE_MAX_TXD);
 961         new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
 962
 963         new_rx_count = clamp_t(u32, ring->rx_pending,
 964                                IXGBE_MIN_RXD, IXGBE_MAX_RXD);
 965         new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
 966
 967         if ((new_tx_count == adapter->tx_ring_count) &&
 968             (new_rx_count == adapter->rx_ring_count)) {
 969                 /* nothing to do */
 970                 return 0;
 971         }
 972
 973         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
 974                 usleep_range(1000, 2000);
 975
 976         if (!netif_running(adapter->netdev)) {
 977                 for (i = 0; i < adapter->num_tx_queues; i++)
 978                         adapter->tx_ring[i]->count = new_tx_count;
 979                 for (i = 0; i < adapter->num_rx_queues; i++)
 980                         adapter->rx_ring[i]->count = new_rx_count;
 981                 adapter->tx_ring_count = new_tx_count;
 982                 adapter->rx_ring_count = new_rx_count;
 983                 goto clear_reset;
 984         }
 985
 986         /* allocate temporary buffer to store rings in */
 987         i = max_t(int, adapter->num_tx_queues, adapter->num_rx_queues);
 988         temp_ring = vmalloc(i * sizeof(struct ixgbe_ring));
 989
 990         if (!temp_ring) {
 991                 err = -ENOMEM;
 992                 goto clear_reset;
 993         }
 994
 995         ixgbe_down(adapter);
 996
 997         /*
 998          * Setup new Tx resources and free the old Tx resources in that order.
 999          * We can then assign the new resources to the rings via a memcpy.
1000          * The advantage to this approach is that we are guaranteed to still
1001          * have resources even in the case of an allocation failure.
1002          */
1003         if (new_tx_count != adapter->tx_ring_count) {
1004                 for (i = 0; i < adapter->num_tx_queues; i++) {
1005                         memcpy(&temp_ring[i], adapter->tx_ring[i],
1006                                sizeof(struct ixgbe_ring));
1007
1008                         temp_ring[i].count = new_tx_count;
1009                         err = ixgbe_setup_tx_resources(&temp_ring[i]);
1010                         if (err) {
1011                                 while (i) {
1012                                         i--;
1013                                         ixgbe_free_tx_resources(&temp_ring[i]);
1014                                 }
1015                                 goto err_setup;
1016                         }
1017                 }
1018
1019                 for (i = 0; i < adapter->num_tx_queues; i++) {
1020                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
1021
1022                         memcpy(adapter->tx_ring[i], &temp_ring[i],
1023                                sizeof(struct ixgbe_ring));
1024                 }
1025
1026                 adapter->tx_ring_count = new_tx_count;
1027         }
1028
1029         /* Repeat the process for the Rx rings if needed */
1030         if (new_rx_count != adapter->rx_ring_count) {
1031                 for (i = 0; i < adapter->num_rx_queues; i++) {
1032                         memcpy(&temp_ring[i], adapter->rx_ring[i],
1033                                sizeof(struct ixgbe_ring));
1034
1035                         temp_ring[i].count = new_rx_count;
1036                         err = ixgbe_setup_rx_resources(&temp_ring[i]);
1037                         if (err) {
1038                                 while (i) {
1039                                         i--;
1040                                         ixgbe_free_rx_resources(&temp_ring[i]);
1041                                 }
1042                                 goto err_setup;
1043                         }
1044
1045                 }
1046
1047                 for (i = 0; i < adapter->num_rx_queues; i++) {
1048                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
1049
1050                         memcpy(adapter->rx_ring[i], &temp_ring[i],
1051                                sizeof(struct ixgbe_ring));
1052                 }
1053
1054                 adapter->rx_ring_count = new_rx_count;
1055         }
1056
1057 err_setup:
1058         ixgbe_up(adapter);
1059         vfree(temp_ring);
1060 clear_reset:
1061         clear_bit(__IXGBE_RESETTING, &adapter->state);
1062         return err;
1063 }
1064
1065 static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
1066 {
1067         switch (sset) {
1068         case ETH_SS_TEST:
1069                 return IXGBE_TEST_LEN;
1070         case ETH_SS_STATS:
1071                 return IXGBE_STATS_LEN;
1072         default:
1073                 return -EOPNOTSUPP;
1074         }
1075 }
1076
1077 static void ixgbe_get_ethtool_stats(struct net_device *netdev,
1078                                     struct ethtool_stats *stats, u64 *data)
1079 {
1080         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1081         struct rtnl_link_stats64 temp;
1082         const struct rtnl_link_stats64 *net_stats;
1083         unsigned int start;
1084         struct ixgbe_ring *ring;
1085         int i, j;
1086         char *p = NULL;
1087
1088         ixgbe_update_stats(adapter);
1089         net_stats = dev_get_stats(netdev, &temp);
1090         for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1091                 switch (ixgbe_gstrings_stats[i].type) {
1092                 case NETDEV_STATS:
1093                         p = (char *) net_stats +
1094                                         ixgbe_gstrings_stats[i].stat_offset;
1095                         break;
1096                 case IXGBE_STATS:
1097                         p = (char *) adapter +
1098                                         ixgbe_gstrings_stats[i].stat_offset;
1099                         break;
1100                 default:
1101                         data[i] = 0;
1102                         continue;
1103                 }
1104
1105                 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
1106                            sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1107         }
1108         for (j = 0; j < netdev->num_tx_queues; j++) {
1109                 ring = adapter->tx_ring[j];
1110                 if (!ring) {
1111                         data[i] = 0;
1112                         data[i+1] = 0;
1113                         i += 2;
1114 #ifdef BP_EXTENDED_STATS
1115                         data[i] = 0;
1116                         data[i+1] = 0;
1117                         data[i+2] = 0;
1118                         i += 3;
1119 #endif
1120                         continue;
1121                 }
1122
1123                 do {
1124                         start = u64_stats_fetch_begin_irq(&ring->syncp);
1125                         data[i]   = ring->stats.packets;
1126                         data[i+1] = ring->stats.bytes;
1127                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1128                 i += 2;
1129 #ifdef BP_EXTENDED_STATS
1130                 data[i] = ring->stats.yields;
1131                 data[i+1] = ring->stats.misses;
1132                 data[i+2] = ring->stats.cleaned;
1133                 i += 3;
1134 #endif
1135         }
1136         for (j = 0; j < IXGBE_NUM_RX_QUEUES; j++) {
1137                 ring = adapter->rx_ring[j];
1138                 if (!ring) {
1139                         data[i] = 0;
1140                         data[i+1] = 0;
1141                         i += 2;
1142 #ifdef BP_EXTENDED_STATS
1143                         data[i] = 0;
1144                         data[i+1] = 0;
1145                         data[i+2] = 0;
1146                         i += 3;
1147 #endif
1148                         continue;
1149                 }
1150
1151                 do {
1152                         start = u64_stats_fetch_begin_irq(&ring->syncp);
1153                         data[i]   = ring->stats.packets;
1154                         data[i+1] = ring->stats.bytes;
1155                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1156                 i += 2;
1157 #ifdef BP_EXTENDED_STATS
1158                 data[i] = ring->stats.yields;
1159                 data[i+1] = ring->stats.misses;
1160                 data[i+2] = ring->stats.cleaned;
1161                 i += 3;
1162 #endif
1163         }
1164
1165         for (j = 0; j < IXGBE_MAX_PACKET_BUFFERS; j++) {
1166                 data[i++] = adapter->stats.pxontxc[j];
1167                 data[i++] = adapter->stats.pxofftxc[j];
1168         }
1169         for (j = 0; j < IXGBE_MAX_PACKET_BUFFERS; j++) {
1170                 data[i++] = adapter->stats.pxonrxc[j];
1171                 data[i++] = adapter->stats.pxoffrxc[j];
1172         }
1173 }
1174
1175 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
1176                               u8 *data)
1177 {
1178         char *p = (char *)data;
1179         int i;
1180
1181         switch (stringset) {
1182         case ETH_SS_TEST:
1183                 for (i = 0; i < IXGBE_TEST_LEN; i++) {
1184                         memcpy(data, ixgbe_gstrings_test[i], ETH_GSTRING_LEN);
1185                         data += ETH_GSTRING_LEN;
1186                 }
1187                 break;
1188         case ETH_SS_STATS:
1189                 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1190                         memcpy(p, ixgbe_gstrings_stats[i].stat_string,
1191                                ETH_GSTRING_LEN);
1192                         p += ETH_GSTRING_LEN;
1193                 }
1194                 for (i = 0; i < netdev->num_tx_queues; i++) {
1195                         sprintf(p, "tx_queue_%u_packets", i);
1196                         p += ETH_GSTRING_LEN;
1197                         sprintf(p, "tx_queue_%u_bytes", i);
1198                         p += ETH_GSTRING_LEN;
1199 #ifdef BP_EXTENDED_STATS
1200                         sprintf(p, "tx_queue_%u_bp_napi_yield", i);
1201                         p += ETH_GSTRING_LEN;
1202                         sprintf(p, "tx_queue_%u_bp_misses", i);
1203                         p += ETH_GSTRING_LEN;
1204                         sprintf(p, "tx_queue_%u_bp_cleaned", i);
1205                         p += ETH_GSTRING_LEN;
1206 #endif /* BP_EXTENDED_STATS */
1207                 }
1208                 for (i = 0; i < IXGBE_NUM_RX_QUEUES; i++) {
1209                         sprintf(p, "rx_queue_%u_packets", i);
1210                         p += ETH_GSTRING_LEN;
1211                         sprintf(p, "rx_queue_%u_bytes", i);
1212                         p += ETH_GSTRING_LEN;
1213 #ifdef BP_EXTENDED_STATS
1214                         sprintf(p, "rx_queue_%u_bp_poll_yield", i);
1215                         p += ETH_GSTRING_LEN;
1216                         sprintf(p, "rx_queue_%u_bp_misses", i);
1217                         p += ETH_GSTRING_LEN;
1218                         sprintf(p, "rx_queue_%u_bp_cleaned", i);
1219                         p += ETH_GSTRING_LEN;
1220 #endif /* BP_EXTENDED_STATS */
1221                 }
1222                 for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) {
1223                         sprintf(p, "tx_pb_%u_pxon", i);
1224                         p += ETH_GSTRING_LEN;
1225                         sprintf(p, "tx_pb_%u_pxoff", i);
1226                         p += ETH_GSTRING_LEN;
1227                 }
1228                 for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) {
1229                         sprintf(p, "rx_pb_%u_pxon", i);
1230                         p += ETH_GSTRING_LEN;
1231                         sprintf(p, "rx_pb_%u_pxoff", i);
1232                         p += ETH_GSTRING_LEN;
1233                 }
1234                 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
1235                 break;
1236         }
1237 }
1238
1239 static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data)
1240 {
1241         struct ixgbe_hw *hw = &adapter->hw;
1242         bool link_up;
1243         u32 link_speed = 0;
1244
1245         if (ixgbe_removed(hw->hw_addr)) {
1246                 *data = 1;
1247                 return 1;
1248         }
1249         *data = 0;
1250
1251         hw->mac.ops.check_link(hw, &link_speed, &link_up, true);
1252         if (link_up)
1253                 return *data;
1254         else
1255                 *data = 1;
1256         return *data;
1257 }
1258
1259 /* ethtool register test data */
1260 struct ixgbe_reg_test {
1261         u16 reg;
1262         u8  array_len;
1263         u8  test_type;
1264         u32 mask;
1265         u32 write;
1266 };
1267
1268 /* In the hardware, registers are laid out either singly, in arrays
1269  * spaced 0x40 bytes apart, or in contiguous tables.  We assume
1270  * most tests take place on arrays or single registers (handled
1271  * as a single-element array) and special-case the tables.
1272  * Table tests are always pattern tests.
1273  *
1274  * We also make provision for some required setup steps by specifying
1275  * registers to be written without any read-back testing.
1276  */
1277
1278 #define PATTERN_TEST    1
1279 #define SET_READ_TEST   2
1280 #define WRITE_NO_TEST   3
1281 #define TABLE32_TEST    4
1282 #define TABLE64_TEST_LO 5
1283 #define TABLE64_TEST_HI 6
1284
1285 /* default 82599 register test */
1286 static const struct ixgbe_reg_test reg_test_82599[] = {
1287         { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1288         { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1289         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1290         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1291         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 },
1292         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1293         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1294         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1295         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1296         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1297         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1298         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1299         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1300         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1301         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 },
1302         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 },
1303         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1304         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF },
1305         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1306         { 0, 0, 0, 0 }
1307 };
1308
1309 /* default 82598 register test */
1310 static const struct ixgbe_reg_test reg_test_82598[] = {
1311         { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1312         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1313         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1314         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1315         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1316         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1317         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1318         /* Enable all four RX queues before testing. */
1319         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1320         /* RDH is read-only for 82598, only test RDT. */
1321         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1322         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1323         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1324         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1325         { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF },
1326         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1327         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1328         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1329         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 },
1330         { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 },
1331         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1332         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF },
1333         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1334         { 0, 0, 0, 0 }
1335 };
1336
1337 static bool reg_pattern_test(struct ixgbe_adapter *adapter, u64 *data, int reg,
1338                              u32 mask, u32 write)
1339 {
1340         u32 pat, val, before;
1341         static const u32 test_pattern[] = {
1342                 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1343
1344         if (ixgbe_removed(adapter->hw.hw_addr)) {
1345                 *data = 1;
1346                 return 1;
1347         }
1348         for (pat = 0; pat < ARRAY_SIZE(test_pattern); pat++) {
1349                 before = ixgbe_read_reg(&adapter->hw, reg);
1350                 ixgbe_write_reg(&adapter->hw, reg, test_pattern[pat] & write);
1351                 val = ixgbe_read_reg(&adapter->hw, reg);
1352                 if (val != (test_pattern[pat] & write & mask)) {
1353                         e_err(drv, "pattern test reg %04X failed: got 0x%08X expected 0x%08X\n",
1354                               reg, val, (test_pattern[pat] & write & mask));
1355                         *data = reg;
1356                         ixgbe_write_reg(&adapter->hw, reg, before);
1357                         return true;
1358                 }
1359                 ixgbe_write_reg(&adapter->hw, reg, before);
1360         }
1361         return false;
1362 }
1363
1364 static bool reg_set_and_check(struct ixgbe_adapter *adapter, u64 *data, int reg,
1365                               u32 mask, u32 write)
1366 {
1367         u32 val, before;
1368
1369         if (ixgbe_removed(adapter->hw.hw_addr)) {
1370                 *data = 1;
1371                 return 1;
1372         }
1373         before = ixgbe_read_reg(&adapter->hw, reg);
1374         ixgbe_write_reg(&adapter->hw, reg, write & mask);
1375         val = ixgbe_read_reg(&adapter->hw, reg);
1376         if ((write & mask) != (val & mask)) {
1377                 e_err(drv, "set/check reg %04X test failed: got 0x%08X expected 0x%08X\n",
1378                       reg, (val & mask), (write & mask));
1379                 *data = reg;
1380                 ixgbe_write_reg(&adapter->hw, reg, before);
1381                 return true;
1382         }
1383         ixgbe_write_reg(&adapter->hw, reg, before);
1384         return false;
1385 }
1386
1387 static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
1388 {
1389         const struct ixgbe_reg_test *test;
1390         u32 value, before, after;
1391         u32 i, toggle;
1392
1393         if (ixgbe_removed(adapter->hw.hw_addr)) {
1394                 e_err(drv, "Adapter removed - register test blocked\n");
1395                 *data = 1;
1396                 return 1;
1397         }
1398         switch (adapter->hw.mac.type) {
1399         case ixgbe_mac_82598EB:
1400                 toggle = 0x7FFFF3FF;
1401                 test = reg_test_82598;
1402                 break;
1403         case ixgbe_mac_82599EB:
1404         case ixgbe_mac_X540:
1405                 toggle = 0x7FFFF30F;
1406                 test = reg_test_82599;
1407                 break;
1408         default:
1409                 *data = 1;
1410                 return 1;
1411                 break;
1412         }
1413
1414         /*
1415          * Because the status register is such a special case,
1416          * we handle it separately from the rest of the register
1417          * tests.  Some bits are read-only, some toggle, and some
1418          * are writeable on newer MACs.
1419          */
1420         before = ixgbe_read_reg(&adapter->hw, IXGBE_STATUS);
1421         value = (ixgbe_read_reg(&adapter->hw, IXGBE_STATUS) & toggle);
1422         ixgbe_write_reg(&adapter->hw, IXGBE_STATUS, toggle);
1423         after = ixgbe_read_reg(&adapter->hw, IXGBE_STATUS) & toggle;
1424         if (value != after) {
1425                 e_err(drv, "failed STATUS register test got: 0x%08X expected: 0x%08X\n",
1426                       after, value);
1427                 *data = 1;
1428                 return 1;
1429         }
1430         /* restore previous status */
1431         ixgbe_write_reg(&adapter->hw, IXGBE_STATUS, before);
1432
1433         /*
1434          * Perform the remainder of the register test, looping through
1435          * the test table until we either fail or reach the null entry.
1436          */
1437         while (test->reg) {
1438                 for (i = 0; i < test->array_len; i++) {
1439                         bool b = false;
1440
1441                         switch (test->test_type) {
1442                         case PATTERN_TEST:
1443                                 b = reg_pattern_test(adapter, data,
1444                                                      test->reg + (i * 0x40),
1445                                                      test->mask,
1446                                                      test->write);
1447                                 break;
1448                         case SET_READ_TEST:
1449                                 b = reg_set_and_check(adapter, data,
1450                                                       test->reg + (i * 0x40),
1451                                                       test->mask,
1452                                                       test->write);
1453                                 break;
1454                         case WRITE_NO_TEST:
1455                                 ixgbe_write_reg(&adapter->hw,
1456                                                 test->reg + (i * 0x40),
1457                                                 test->write);
1458                                 break;
1459                         case TABLE32_TEST:
1460                                 b = reg_pattern_test(adapter, data,
1461                                                      test->reg + (i * 4),
1462                                                      test->mask,
1463                                                      test->write);
1464                                 break;
1465                         case TABLE64_TEST_LO:
1466                                 b = reg_pattern_test(adapter, data,
1467                                                      test->reg + (i * 8),
1468                                                      test->mask,
1469                                                      test->write);
1470                                 break;
1471                         case TABLE64_TEST_HI:
1472                                 b = reg_pattern_test(adapter, data,
1473                                                      (test->reg + 4) + (i * 8),
1474                                                      test->mask,
1475                                                      test->write);
1476                                 break;
1477                         }
1478                         if (b)
1479                                 return 1;
1480                 }
1481                 test++;
1482         }
1483
1484         *data = 0;
1485         return 0;
1486 }
1487
1488 static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data)
1489 {
1490         struct ixgbe_hw *hw = &adapter->hw;
1491         if (hw->eeprom.ops.validate_checksum(hw, NULL))
1492                 *data = 1;
1493         else
1494                 *data = 0;
1495         return *data;
1496 }
1497
1498 static irqreturn_t ixgbe_test_intr(int irq, void *data)
1499 {
1500         struct net_device *netdev = (struct net_device *) data;
1501         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1502
1503         adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR);
1504
1505         return IRQ_HANDLED;
1506 }
1507
1508 static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data)
1509 {
1510         struct net_device *netdev = adapter->netdev;
1511         u32 mask, i = 0, shared_int = true;
1512         u32 irq = adapter->pdev->irq;
1513
1514         *data = 0;
1515
1516         /* Hook up test interrupt handler just for this test */
1517         if (adapter->msix_entries) {
1518                 /* NOTE: we don't test MSI-X interrupts here, yet */
1519                 return 0;
1520         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1521                 shared_int = false;
1522                 if (request_irq(irq, ixgbe_test_intr, 0, netdev->name,
1523                                 netdev)) {
1524                         *data = 1;
1525                         return -1;
1526                 }
1527         } else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED,
1528                                 netdev->name, netdev)) {
1529                 shared_int = false;
1530         } else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED,
1531                                netdev->name, netdev)) {
1532                 *data = 1;
1533                 return -1;
1534         }
1535         e_info(hw, "testing %s interrupt\n", shared_int ?
1536                "shared" : "unshared");
1537
1538         /* Disable all the interrupts */
1539         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1540         IXGBE_WRITE_FLUSH(&adapter->hw);
1541         usleep_range(10000, 20000);
1542
1543         /* Test each interrupt */
1544         for (; i < 10; i++) {
1545                 /* Interrupt to test */
1546                 mask = 1 << i;
1547
1548                 if (!shared_int) {
1549                         /*
1550                          * Disable the interrupts to be reported in
1551                          * the cause register and then force the same
1552                          * interrupt and see if one gets posted.  If
1553                          * an interrupt was posted to the bus, the
1554                          * test failed.
1555                          */
1556                         adapter->test_icr = 0;
1557                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1558                                         ~mask & 0x00007FFF);
1559                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1560                                         ~mask & 0x00007FFF);
1561                         IXGBE_WRITE_FLUSH(&adapter->hw);
1562                         usleep_range(10000, 20000);
1563
1564                         if (adapter->test_icr & mask) {
1565                                 *data = 3;
1566                                 break;
1567                         }
1568                 }
1569
1570                 /*
1571                  * Enable the interrupt to be reported in the cause
1572                  * register and then force the same interrupt and see
1573                  * if one gets posted.  If an interrupt was not posted
1574                  * to the bus, the test failed.
1575                  */
1576                 adapter->test_icr = 0;
1577                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1578                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
1579                 IXGBE_WRITE_FLUSH(&adapter->hw);
1580                 usleep_range(10000, 20000);
1581
1582                 if (!(adapter->test_icr & mask)) {
1583                         *data = 4;
1584                         break;
1585                 }
1586
1587                 if (!shared_int) {
1588                         /*
1589                          * Disable the other interrupts to be reported in
1590                          * the cause register and then force the other
1591                          * interrupts and see if any get posted.  If
1592                          * an interrupt was posted to the bus, the
1593                          * test failed.
1594                          */
1595                         adapter->test_icr = 0;
1596                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1597                                         ~mask & 0x00007FFF);
1598                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1599                                         ~mask & 0x00007FFF);
1600                         IXGBE_WRITE_FLUSH(&adapter->hw);
1601                         usleep_range(10000, 20000);
1602
1603                         if (adapter->test_icr) {
1604                                 *data = 5;
1605                                 break;
1606                         }
1607                 }
1608         }
1609
1610         /* Disable all the interrupts */
1611         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1612         IXGBE_WRITE_FLUSH(&adapter->hw);
1613         usleep_range(10000, 20000);
1614
1615         /* Unhook test interrupt handler */
1616         free_irq(irq, netdev);
1617
1618         return *data;
1619 }
1620
1621 static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter)
1622 {
1623         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1624         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1625         struct ixgbe_hw *hw = &adapter->hw;
1626         u32 reg_ctl;
1627
1628         /* shut down the DMA engines now so they can be reinitialized later */
1629
1630         /* first Rx */
1631         reg_ctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1632         reg_ctl &= ~IXGBE_RXCTRL_RXEN;
1633         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, reg_ctl);
1634         ixgbe_disable_rx_queue(adapter, rx_ring);
1635
1636         /* now Tx */
1637         reg_ctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx));
1638         reg_ctl &= ~IXGBE_TXDCTL_ENABLE;
1639         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx), reg_ctl);
1640
1641         switch (hw->mac.type) {
1642         case ixgbe_mac_82599EB:
1643         case ixgbe_mac_X540:
1644                 reg_ctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
1645                 reg_ctl &= ~IXGBE_DMATXCTL_TE;
1646                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg_ctl);
1647                 break;
1648         default:
1649                 break;
1650         }
1651
1652         ixgbe_reset(adapter);
1653
1654         ixgbe_free_tx_resources(&adapter->test_tx_ring);
1655         ixgbe_free_rx_resources(&adapter->test_rx_ring);
1656 }
1657
1658 static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter)
1659 {
1660         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1661         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1662         u32 rctl, reg_data;
1663         int ret_val;
1664         int err;
1665
1666         /* Setup Tx descriptor ring and Tx buffers */
1667         tx_ring->count = IXGBE_DEFAULT_TXD;
1668         tx_ring->queue_index = 0;
1669         tx_ring->dev = &adapter->pdev->dev;
1670         tx_ring->netdev = adapter->netdev;
1671         tx_ring->reg_idx = adapter->tx_ring[0]->reg_idx;
1672
1673         err = ixgbe_setup_tx_resources(tx_ring);
1674         if (err)
1675                 return 1;
1676
1677         switch (adapter->hw.mac.type) {
1678         case ixgbe_mac_82599EB:
1679         case ixgbe_mac_X540:
1680                 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL);
1681                 reg_data |= IXGBE_DMATXCTL_TE;
1682                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data);
1683                 break;
1684         default:
1685                 break;
1686         }
1687
1688         ixgbe_configure_tx_ring(adapter, tx_ring);
1689
1690         /* Setup Rx Descriptor ring and Rx buffers */
1691         rx_ring->count = IXGBE_DEFAULT_RXD;
1692         rx_ring->queue_index = 0;
1693         rx_ring->dev = &adapter->pdev->dev;
1694         rx_ring->netdev = adapter->netdev;
1695         rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx;
1696
1697         err = ixgbe_setup_rx_resources(rx_ring);
1698         if (err) {
1699                 ret_val = 4;
1700                 goto err_nomem;
1701         }
1702
1703         rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1704         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl & ~IXGBE_RXCTRL_RXEN);
1705
1706         ixgbe_configure_rx_ring(adapter, rx_ring);
1707
1708         rctl |= IXGBE_RXCTRL_RXEN | IXGBE_RXCTRL_DMBYPS;
1709         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl);
1710
1711         return 0;
1712
1713 err_nomem:
1714         ixgbe_free_desc_rings(adapter);
1715         return ret_val;
1716 }
1717
1718 static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter)
1719 {
1720         struct ixgbe_hw *hw = &adapter->hw;
1721         u32 reg_data;
1722
1723
1724         /* Setup MAC loopback */
1725         reg_data = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1726         reg_data |= IXGBE_HLREG0_LPBK;
1727         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, reg_data);
1728
1729         reg_data = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1730         reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE;
1731         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg_data);
1732
1733         /* X540 needs to set the MACC.FLU bit to force link up */
1734         if (adapter->hw.mac.type == ixgbe_mac_X540) {
1735                 reg_data = IXGBE_READ_REG(hw, IXGBE_MACC);
1736                 reg_data |= IXGBE_MACC_FLU;
1737                 IXGBE_WRITE_REG(hw, IXGBE_MACC, reg_data);
1738         } else {
1739                 if (hw->mac.orig_autoc) {
1740                         reg_data = hw->mac.orig_autoc | IXGBE_AUTOC_FLU;
1741                         IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_data);
1742                 } else {
1743                         return 10;
1744                 }
1745         }
1746         IXGBE_WRITE_FLUSH(hw);
1747         usleep_range(10000, 20000);
1748
1749         /* Disable Atlas Tx lanes; re-enabled in reset path */
1750         if (hw->mac.type == ixgbe_mac_82598EB) {
1751                 u8 atlas;
1752
1753                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas);
1754                 atlas |= IXGBE_ATLAS_PDN_TX_REG_EN;
1755                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas);
1756
1757                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas);
1758                 atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
1759                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas);
1760
1761                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas);
1762                 atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
1763                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas);
1764
1765                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas);
1766                 atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
1767                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas);
1768         }
1769
1770         return 0;
1771 }
1772
1773 static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter)
1774 {
1775         u32 reg_data;
1776
1777         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1778         reg_data &= ~IXGBE_HLREG0_LPBK;
1779         IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1780 }
1781
1782 static void ixgbe_create_lbtest_frame(struct sk_buff *skb,
1783                                       unsigned int frame_size)
1784 {
1785         memset(skb->data, 0xFF, frame_size);
1786         frame_size >>= 1;
1787         memset(&skb->data[frame_size], 0xAA, frame_size / 2 - 1);
1788         memset(&skb->data[frame_size + 10], 0xBE, 1);
1789         memset(&skb->data[frame_size + 12], 0xAF, 1);
1790 }
1791
1792 static bool ixgbe_check_lbtest_frame(struct ixgbe_rx_buffer *rx_buffer,
1793                                      unsigned int frame_size)
1794 {
1795         unsigned char *data;
1796         bool match = true;
1797
1798         frame_size >>= 1;
1799
1800         data = kmap(rx_buffer->page) + rx_buffer->page_offset;
1801
1802         if (data[3] != 0xFF ||
1803             data[frame_size + 10] != 0xBE ||
1804             data[frame_size + 12] != 0xAF)
1805                 match = false;
1806
1807         kunmap(rx_buffer->page);
1808
1809         return match;
1810 }
1811
1812 static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring,
1813                                   struct ixgbe_ring *tx_ring,
1814                                   unsigned int size)
1815 {
1816         union ixgbe_adv_rx_desc *rx_desc;
1817         struct ixgbe_rx_buffer *rx_buffer;
1818         struct ixgbe_tx_buffer *tx_buffer;
1819         u16 rx_ntc, tx_ntc, count = 0;
1820
1821         /* initialize next to clean and descriptor values */
1822         rx_ntc = rx_ring->next_to_clean;
1823         tx_ntc = tx_ring->next_to_clean;
1824         rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc);
1825
1826         while (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_DD)) {
1827                 /* check Rx buffer */
1828                 rx_buffer = &rx_ring->rx_buffer_info[rx_ntc];
1829
1830                 /* sync Rx buffer for CPU read */
1831                 dma_sync_single_for_cpu(rx_ring->dev,
1832                                         rx_buffer->dma,
1833                                         ixgbe_rx_bufsz(rx_ring),
1834                                         DMA_FROM_DEVICE);
1835
1836                 /* verify contents of skb */
1837                 if (ixgbe_check_lbtest_frame(rx_buffer, size))
1838                         count++;
1839
1840                 /* sync Rx buffer for device write */
1841                 dma_sync_single_for_device(rx_ring->dev,
1842                                            rx_buffer->dma,
1843                                            ixgbe_rx_bufsz(rx_ring),
1844                                            DMA_FROM_DEVICE);
1845
1846                 /* unmap buffer on Tx side */
1847                 tx_buffer = &tx_ring->tx_buffer_info[tx_ntc];
1848                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
1849
1850                 /* increment Rx/Tx next to clean counters */
1851                 rx_ntc++;
1852                 if (rx_ntc == rx_ring->count)
1853                         rx_ntc = 0;
1854                 tx_ntc++;
1855                 if (tx_ntc == tx_ring->count)
1856                         tx_ntc = 0;
1857
1858                 /* fetch next descriptor */
1859                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc);
1860         }
1861
1862         netdev_tx_reset_queue(txring_txq(tx_ring));
1863
1864         /* re-map buffers to ring, store next to clean values */
1865         ixgbe_alloc_rx_buffers(rx_ring, count);
1866         rx_ring->next_to_clean = rx_ntc;
1867         tx_ring->next_to_clean = tx_ntc;
1868
1869         return count;
1870 }
1871
1872 static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter)
1873 {
1874         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1875         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1876         int i, j, lc, good_cnt, ret_val = 0;
1877         unsigned int size = 1024;
1878         netdev_tx_t tx_ret_val;
1879         struct sk_buff *skb;
1880         u32 flags_orig = adapter->flags;
1881
1882         /* DCB can modify the frames on Tx */
1883         adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
1884
1885         /* allocate test skb */
1886         skb = alloc_skb(size, GFP_KERNEL);
1887         if (!skb)
1888                 return 11;
1889
1890         /* place data into test skb */
1891         ixgbe_create_lbtest_frame(skb, size);
1892         skb_put(skb, size);
1893
1894         /*
1895          * Calculate the loop count based on the largest descriptor ring
1896          * The idea is to wrap the largest ring a number of times using 64
1897          * send/receive pairs during each loop
1898          */
1899
1900         if (rx_ring->count <= tx_ring->count)
1901                 lc = ((tx_ring->count / 64) * 2) + 1;
1902         else
1903                 lc = ((rx_ring->count / 64) * 2) + 1;
1904
1905         for (j = 0; j <= lc; j++) {
1906                 /* reset count of good packets */
1907                 good_cnt = 0;
1908
1909                 /* place 64 packets on the transmit queue*/
1910                 for (i = 0; i < 64; i++) {
1911                         skb_get(skb);
1912                         tx_ret_val = ixgbe_xmit_frame_ring(skb,
1913                                                            adapter,
1914                                                            tx_ring);
1915                         if (tx_ret_val == NETDEV_TX_OK)
1916                                 good_cnt++;
1917                 }
1918
1919                 if (good_cnt != 64) {
1920                         ret_val = 12;
1921                         break;
1922                 }
1923
1924                 /* allow 200 milliseconds for packets to go from Tx to Rx */
1925                 msleep(200);
1926
1927                 good_cnt = ixgbe_clean_test_rings(rx_ring, tx_ring, size);
1928                 if (good_cnt != 64) {
1929                         ret_val = 13;
1930                         break;
1931                 }
1932         }
1933
1934         /* free the original skb */
1935         kfree_skb(skb);
1936         adapter->flags = flags_orig;
1937
1938         return ret_val;
1939 }
1940
1941 static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data)
1942 {
1943         *data = ixgbe_setup_desc_rings(adapter);
1944         if (*data)
1945                 goto out;
1946         *data = ixgbe_setup_loopback_test(adapter);
1947         if (*data)
1948                 goto err_loopback;
1949         *data = ixgbe_run_loopback_test(adapter);
1950         ixgbe_loopback_cleanup(adapter);
1951
1952 err_loopback:
1953         ixgbe_free_desc_rings(adapter);
1954 out:
1955         return *data;
1956 }
1957
1958 static void ixgbe_diag_test(struct net_device *netdev,
1959                             struct ethtool_test *eth_test, u64 *data)
1960 {
1961         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1962         bool if_running = netif_running(netdev);
1963
1964         if (ixgbe_removed(adapter->hw.hw_addr)) {
1965                 e_err(hw, "Adapter removed - test blocked\n");
1966                 data[0] = 1;
1967                 data[1] = 1;
1968                 data[2] = 1;
1969                 data[3] = 1;
1970                 data[4] = 1;
1971                 eth_test->flags |= ETH_TEST_FL_FAILED;
1972                 return;
1973         }
1974         set_bit(__IXGBE_TESTING, &adapter->state);
1975         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1976                 struct ixgbe_hw *hw = &adapter->hw;
1977
1978                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
1979                         int i;
1980                         for (i = 0; i < adapter->num_vfs; i++) {
1981                                 if (adapter->vfinfo[i].clear_to_send) {
1982                                         netdev_warn(netdev, "offline diagnostic is not supported when VFs are present\n");
1983                                         data[0] = 1;
1984                                         data[1] = 1;
1985                                         data[2] = 1;
1986                                         data[3] = 1;
1987                                         data[4] = 1;
1988                                         eth_test->flags |= ETH_TEST_FL_FAILED;
1989                                         clear_bit(__IXGBE_TESTING,
1990                                                   &adapter->state);
1991                                         goto skip_ol_tests;
1992                                 }
1993                         }
1994                 }
1995
1996                 /* Offline tests */
1997                 e_info(hw, "offline testing starting\n");
1998
1999                 /* Link test performed before hardware reset so autoneg doesn't
2000                  * interfere with test result
2001                  */
2002                 if (ixgbe_link_test(adapter, &data[4]))
2003                         eth_test->flags |= ETH_TEST_FL_FAILED;
2004
2005                 if (if_running)
2006                         /* indicate we're in test mode */
2007                         dev_close(netdev);
2008                 else
2009                         ixgbe_reset(adapter);
2010
2011                 e_info(hw, "register testing starting\n");
2012                 if (ixgbe_reg_test(adapter, &data[0]))
2013                         eth_test->flags |= ETH_TEST_FL_FAILED;
2014
2015                 ixgbe_reset(adapter);
2016                 e_info(hw, "eeprom testing starting\n");
2017                 if (ixgbe_eeprom_test(adapter, &data[1]))
2018                         eth_test->flags |= ETH_TEST_FL_FAILED;
2019
2020                 ixgbe_reset(adapter);
2021                 e_info(hw, "interrupt testing starting\n");
2022                 if (ixgbe_intr_test(adapter, &data[2]))
2023                         eth_test->flags |= ETH_TEST_FL_FAILED;
2024
2025                 /* If SRIOV or VMDq is enabled then skip MAC
2026                  * loopback diagnostic. */
2027                 if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED |
2028                                       IXGBE_FLAG_VMDQ_ENABLED)) {
2029                         e_info(hw, "Skip MAC loopback diagnostic in VT mode\n");
2030                         data[3] = 0;
2031                         goto skip_loopback;
2032                 }
2033
2034                 ixgbe_reset(adapter);
2035                 e_info(hw, "loopback testing starting\n");
2036                 if (ixgbe_loopback_test(adapter, &data[3]))
2037                         eth_test->flags |= ETH_TEST_FL_FAILED;
2038
2039 skip_loopback:
2040                 ixgbe_reset(adapter);
2041
2042                 /* clear testing bit and return adapter to previous state */
2043                 clear_bit(__IXGBE_TESTING, &adapter->state);
2044                 if (if_running)
2045                         dev_open(netdev);
2046                 else if (hw->mac.ops.disable_tx_laser)
2047                         hw->mac.ops.disable_tx_laser(hw);
2048         } else {
2049                 e_info(hw, "online testing starting\n");
2050
2051                 /* Online tests */
2052                 if (ixgbe_link_test(adapter, &data[4]))
2053                         eth_test->flags |= ETH_TEST_FL_FAILED;
2054
2055                 /* Offline tests aren't run; pass by default */
2056                 data[0] = 0;
2057                 data[1] = 0;
2058                 data[2] = 0;
2059                 data[3] = 0;
2060
2061                 clear_bit(__IXGBE_TESTING, &adapter->state);
2062         }
2063
2064 skip_ol_tests:
2065         msleep_interruptible(4 * 1000);
2066 }
2067
2068 static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
2069                                struct ethtool_wolinfo *wol)
2070 {
2071         struct ixgbe_hw *hw = &adapter->hw;
2072         int retval = 0;
2073
2074         /* WOL not supported for all devices */
2075         if (!ixgbe_wol_supported(adapter, hw->device_id,
2076                                  hw->subsystem_device_id)) {
2077                 retval = 1;
2078                 wol->supported = 0;
2079         }
2080
2081         return retval;
2082 }
2083
2084 static void ixgbe_get_wol(struct net_device *netdev,
2085                           struct ethtool_wolinfo *wol)
2086 {
2087         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2088
2089         wol->supported = WAKE_UCAST | WAKE_MCAST |
2090                          WAKE_BCAST | WAKE_MAGIC;
2091         wol->wolopts = 0;
2092
2093         if (ixgbe_wol_exclusion(adapter, wol) ||
2094             !device_can_wakeup(&adapter->pdev->dev))
2095                 return;
2096
2097         if (adapter->wol & IXGBE_WUFC_EX)
2098                 wol->wolopts |= WAKE_UCAST;
2099         if (adapter->wol & IXGBE_WUFC_MC)
2100                 wol->wolopts |= WAKE_MCAST;
2101         if (adapter->wol & IXGBE_WUFC_BC)
2102                 wol->wolopts |= WAKE_BCAST;
2103         if (adapter->wol & IXGBE_WUFC_MAG)
2104                 wol->wolopts |= WAKE_MAGIC;
2105 }
2106
2107 static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2108 {
2109         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2110
2111         if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
2112                 return -EOPNOTSUPP;
2113
2114         if (ixgbe_wol_exclusion(adapter, wol))
2115                 return wol->wolopts ? -EOPNOTSUPP : 0;
2116
2117         adapter->wol = 0;
2118
2119         if (wol->wolopts & WAKE_UCAST)
2120                 adapter->wol |= IXGBE_WUFC_EX;
2121         if (wol->wolopts & WAKE_MCAST)
2122                 adapter->wol |= IXGBE_WUFC_MC;
2123         if (wol->wolopts & WAKE_BCAST)
2124                 adapter->wol |= IXGBE_WUFC_BC;
2125         if (wol->wolopts & WAKE_MAGIC)
2126                 adapter->wol |= IXGBE_WUFC_MAG;
2127
2128         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
2129
2130         return 0;
2131 }
2132
2133 static int ixgbe_nway_reset(struct net_device *netdev)
2134 {
2135         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2136
2137         if (netif_running(netdev))
2138                 ixgbe_reinit_locked(adapter);
2139
2140         return 0;
2141 }
2142
2143 static int ixgbe_set_phys_id(struct net_device *netdev,
2144                              enum ethtool_phys_id_state state)
2145 {
2146         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2147         struct ixgbe_hw *hw = &adapter->hw;
2148
2149         switch (state) {
2150         case ETHTOOL_ID_ACTIVE:
2151                 adapter->led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
2152                 return 2;
2153
2154         case ETHTOOL_ID_ON:
2155                 hw->mac.ops.led_on(hw, IXGBE_LED_ON);
2156                 break;
2157
2158         case ETHTOOL_ID_OFF:
2159                 hw->mac.ops.led_off(hw, IXGBE_LED_ON);
2160                 break;
2161
2162         case ETHTOOL_ID_INACTIVE:
2163                 /* Restore LED settings */
2164                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, adapter->led_reg);
2165                 break;
2166         }
2167
2168         return 0;
2169 }
2170
2171 static int ixgbe_get_coalesce(struct net_device *netdev,
2172                               struct ethtool_coalesce *ec)
2173 {
2174         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2175
2176         /* only valid if in constant ITR mode */
2177         if (adapter->rx_itr_setting <= 1)
2178                 ec->rx_coalesce_usecs = adapter->rx_itr_setting;
2179         else
2180                 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
2181
2182         /* if in mixed tx/rx queues per vector mode, report only rx settings */
2183         if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count)
2184                 return 0;
2185
2186         /* only valid if in constant ITR mode */
2187         if (adapter->tx_itr_setting <= 1)
2188                 ec->tx_coalesce_usecs = adapter->tx_itr_setting;
2189         else
2190                 ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
2191
2192         return 0;
2193 }
2194
2195 /*
2196  * this function must be called before setting the new value of
2197  * rx_itr_setting
2198  */
2199 static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter)
2200 {
2201         struct net_device *netdev = adapter->netdev;
2202
2203         /* nothing to do if LRO or RSC are not enabled */
2204         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) ||
2205             !(netdev->features & NETIF_F_LRO))
2206                 return false;
2207
2208         /* check the feature flag value and enable RSC if necessary */
2209         if (adapter->rx_itr_setting == 1 ||
2210             adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
2211                 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
2212                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
2213                         e_info(probe, "rx-usecs value high enough to re-enable RSC\n");
2214                         return true;
2215                 }
2216         /* if interrupt rate is too high then disable RSC */
2217         } else if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2218                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
2219                 e_info(probe, "rx-usecs set too low, disabling RSC\n");
2220                 return true;
2221         }
2222         return false;
2223 }
2224
2225 static int ixgbe_set_coalesce(struct net_device *netdev,
2226                               struct ethtool_coalesce *ec)
2227 {
2228         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2229         struct ixgbe_q_vector *q_vector;
2230         int i;
2231         u16 tx_itr_param, rx_itr_param, tx_itr_prev;
2232         bool need_reset = false;
2233
2234         if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count) {
2235                 /* reject Tx specific changes in case of mixed RxTx vectors */
2236                 if (ec->tx_coalesce_usecs)
2237                         return -EINVAL;
2238                 tx_itr_prev = adapter->rx_itr_setting;
2239         } else {
2240                 tx_itr_prev = adapter->tx_itr_setting;
2241         }
2242
2243         if ((ec->rx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)) ||
2244             (ec->tx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)))
2245                 return -EINVAL;
2246
2247         if (ec->rx_coalesce_usecs > 1)
2248                 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
2249         else
2250                 adapter->rx_itr_setting = ec->rx_coalesce_usecs;
2251
2252         if (adapter->rx_itr_setting == 1)
2253                 rx_itr_param = IXGBE_20K_ITR;
2254         else
2255                 rx_itr_param = adapter->rx_itr_setting;
2256
2257         if (ec->tx_coalesce_usecs > 1)
2258                 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
2259         else
2260                 adapter->tx_itr_setting = ec->tx_coalesce_usecs;
2261
2262         if (adapter->tx_itr_setting == 1)
2263                 tx_itr_param = IXGBE_10K_ITR;
2264         else
2265                 tx_itr_param = adapter->tx_itr_setting;
2266
2267         /* mixed Rx/Tx */
2268         if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count)
2269                 adapter->tx_itr_setting = adapter->rx_itr_setting;
2270
2271 #if IS_ENABLED(CONFIG_BQL)
2272         /* detect ITR changes that require update of TXDCTL.WTHRESH */
2273         if ((adapter->tx_itr_setting != 1) &&
2274             (adapter->tx_itr_setting < IXGBE_100K_ITR)) {
2275                 if ((tx_itr_prev == 1) ||
2276                     (tx_itr_prev >= IXGBE_100K_ITR))
2277                         need_reset = true;
2278         } else {
2279                 if ((tx_itr_prev != 1) &&
2280                     (tx_itr_prev < IXGBE_100K_ITR))
2281                         need_reset = true;
2282         }
2283 #endif
2284         /* check the old value and enable RSC if necessary */
2285         need_reset |= ixgbe_update_rsc(adapter);
2286
2287         for (i = 0; i < adapter->num_q_vectors; i++) {
2288                 q_vector = adapter->q_vector[i];
2289                 if (q_vector->tx.count && !q_vector->rx.count)
2290                         /* tx only */
2291                         q_vector->itr = tx_itr_param;
2292                 else
2293                         /* rx only or mixed */
2294                         q_vector->itr = rx_itr_param;
2295                 ixgbe_write_eitr(q_vector);
2296         }
2297
2298         /*
2299          * do reset here at the end to make sure EITR==0 case is handled
2300          * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings
2301          * also locks in RSC enable/disable which requires reset
2302          */
2303         if (need_reset)
2304                 ixgbe_do_reset(netdev);
2305
2306         return 0;
2307 }
2308
2309 static int ixgbe_get_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2310                                         struct ethtool_rxnfc *cmd)
2311 {
2312         union ixgbe_atr_input *mask = &adapter->fdir_mask;
2313         struct ethtool_rx_flow_spec *fsp =
2314                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2315         struct hlist_node *node2;
2316         struct ixgbe_fdir_filter *rule = NULL;
2317
2318         /* report total rule count */
2319         cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2320
2321         hlist_for_each_entry_safe(rule, node2,
2322                                   &adapter->fdir_filter_list, fdir_node) {
2323                 if (fsp->location <= rule->sw_idx)
2324                         break;
2325         }
2326
2327         if (!rule || fsp->location != rule->sw_idx)
2328                 return -EINVAL;
2329
2330         /* fill out the flow spec entry */
2331
2332         /* set flow type field */
2333         switch (rule->filter.formatted.flow_type) {
2334         case IXGBE_ATR_FLOW_TYPE_TCPV4:
2335                 fsp->flow_type = TCP_V4_FLOW;
2336                 break;
2337         case IXGBE_ATR_FLOW_TYPE_UDPV4:
2338                 fsp->flow_type = UDP_V4_FLOW;
2339                 break;
2340         case IXGBE_ATR_FLOW_TYPE_SCTPV4:
2341                 fsp->flow_type = SCTP_V4_FLOW;
2342                 break;
2343         case IXGBE_ATR_FLOW_TYPE_IPV4:
2344                 fsp->flow_type = IP_USER_FLOW;
2345                 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
2346                 fsp->h_u.usr_ip4_spec.proto = 0;
2347                 fsp->m_u.usr_ip4_spec.proto = 0;
2348                 break;
2349         default:
2350                 return -EINVAL;
2351         }
2352
2353         fsp->h_u.tcp_ip4_spec.psrc = rule->filter.formatted.src_port;
2354         fsp->m_u.tcp_ip4_spec.psrc = mask->formatted.src_port;
2355         fsp->h_u.tcp_ip4_spec.pdst = rule->filter.formatted.dst_port;
2356         fsp->m_u.tcp_ip4_spec.pdst = mask->formatted.dst_port;
2357         fsp->h_u.tcp_ip4_spec.ip4src = rule->filter.formatted.src_ip[0];
2358         fsp->m_u.tcp_ip4_spec.ip4src = mask->formatted.src_ip[0];
2359         fsp->h_u.tcp_ip4_spec.ip4dst = rule->filter.formatted.dst_ip[0];
2360         fsp->m_u.tcp_ip4_spec.ip4dst = mask->formatted.dst_ip[0];
2361         fsp->h_ext.vlan_tci = rule->filter.formatted.vlan_id;
2362         fsp->m_ext.vlan_tci = mask->formatted.vlan_id;
2363         fsp->h_ext.vlan_etype = rule->filter.formatted.flex_bytes;
2364         fsp->m_ext.vlan_etype = mask->formatted.flex_bytes;
2365         fsp->h_ext.data[1] = htonl(rule->filter.formatted.vm_pool);
2366         fsp->m_ext.data[1] = htonl(mask->formatted.vm_pool);
2367         fsp->flow_type |= FLOW_EXT;
2368
2369         /* record action */
2370         if (rule->action == IXGBE_FDIR_DROP_QUEUE)
2371                 fsp->ring_cookie = RX_CLS_FLOW_DISC;
2372         else
2373                 fsp->ring_cookie = rule->action;
2374
2375         return 0;
2376 }
2377
2378 static int ixgbe_get_ethtool_fdir_all(struct ixgbe_adapter *adapter,
2379                                       struct ethtool_rxnfc *cmd,
2380                                       u32 *rule_locs)
2381 {
2382         struct hlist_node *node2;
2383         struct ixgbe_fdir_filter *rule;
2384         int cnt = 0;
2385
2386         /* report total rule count */
2387         cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2388
2389         hlist_for_each_entry_safe(rule, node2,
2390                                   &adapter->fdir_filter_list, fdir_node) {
2391                 if (cnt == cmd->rule_cnt)
2392                         return -EMSGSIZE;
2393                 rule_locs[cnt] = rule->sw_idx;
2394                 cnt++;
2395         }
2396
2397         cmd->rule_cnt = cnt;
2398
2399         return 0;
2400 }
2401
2402 static int ixgbe_get_rss_hash_opts(struct ixgbe_adapter *adapter,
2403                                    struct ethtool_rxnfc *cmd)
2404 {
2405         cmd->data = 0;
2406
2407         /* Report default options for RSS on ixgbe */
2408         switch (cmd->flow_type) {
2409         case TCP_V4_FLOW:
2410                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2411                 /* fallthrough */
2412         case UDP_V4_FLOW:
2413                 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
2414                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2415                 /* fallthrough */
2416         case SCTP_V4_FLOW:
2417         case AH_ESP_V4_FLOW:
2418         case AH_V4_FLOW:
2419         case ESP_V4_FLOW:
2420         case IPV4_FLOW:
2421                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2422                 break;
2423         case TCP_V6_FLOW:
2424                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2425                 /* fallthrough */
2426         case UDP_V6_FLOW:
2427                 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2428                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2429                 /* fallthrough */
2430         case SCTP_V6_FLOW:
2431         case AH_ESP_V6_FLOW:
2432         case AH_V6_FLOW:
2433         case ESP_V6_FLOW:
2434         case IPV6_FLOW:
2435                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2436                 break;
2437         default:
2438                 return -EINVAL;
2439         }
2440
2441         return 0;
2442 }
2443
2444 static int ixgbe_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
2445                            u32 *rule_locs)
2446 {
2447         struct ixgbe_adapter *adapter = netdev_priv(dev);
2448         int ret = -EOPNOTSUPP;
2449
2450         switch (cmd->cmd) {
2451         case ETHTOOL_GRXRINGS:
2452                 cmd->data = adapter->num_rx_queues;
2453                 ret = 0;
2454                 break;
2455         case ETHTOOL_GRXCLSRLCNT:
2456                 cmd->rule_cnt = adapter->fdir_filter_count;
2457                 ret = 0;
2458                 break;
2459         case ETHTOOL_GRXCLSRULE:
2460                 ret = ixgbe_get_ethtool_fdir_entry(adapter, cmd);
2461                 break;
2462         case ETHTOOL_GRXCLSRLALL:
2463                 ret = ixgbe_get_ethtool_fdir_all(adapter, cmd, rule_locs);
2464                 break;
2465         case ETHTOOL_GRXFH:
2466                 ret = ixgbe_get_rss_hash_opts(adapter, cmd);
2467                 break;
2468         default:
2469                 break;
2470         }
2471
2472         return ret;
2473 }
2474
2475 static int ixgbe_update_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2476                                            struct ixgbe_fdir_filter *input,
2477                                            u16 sw_idx)
2478 {
2479         struct ixgbe_hw *hw = &adapter->hw;
2480         struct hlist_node *node2;
2481         struct ixgbe_fdir_filter *rule, *parent;
2482         int err = -EINVAL;
2483
2484         parent = NULL;
2485         rule = NULL;
2486
2487         hlist_for_each_entry_safe(rule, node2,
2488                                   &adapter->fdir_filter_list, fdir_node) {
2489                 /* hash found, or no matching entry */
2490                 if (rule->sw_idx >= sw_idx)
2491                         break;
2492                 parent = rule;
2493         }
2494
2495         /* if there is an old rule occupying our place remove it */
2496         if (rule && (rule->sw_idx == sw_idx)) {
2497                 if (!input || (rule->filter.formatted.bkt_hash !=
2498                                input->filter.formatted.bkt_hash)) {
2499                         err = ixgbe_fdir_erase_perfect_filter_82599(hw,
2500                                                                 &rule->filter,
2501                                                                 sw_idx);
2502                 }
2503
2504                 hlist_del(&rule->fdir_node);
2505                 kfree(rule);
2506                 adapter->fdir_filter_count--;
2507         }
2508
2509         /*
2510          * If no input this was a delete, err should be 0 if a rule was
2511          * successfully found and removed from the list else -EINVAL
2512          */
2513         if (!input)
2514                 return err;
2515
2516         /* initialize node and set software index */
2517         INIT_HLIST_NODE(&input->fdir_node);
2518
2519         /* add filter to the list */
2520         if (parent)
2521                 hlist_add_after(&parent->fdir_node, &input->fdir_node);
2522         else
2523                 hlist_add_head(&input->fdir_node,
2524                                &adapter->fdir_filter_list);
2525
2526         /* update counts */
2527         adapter->fdir_filter_count++;
2528
2529         return 0;
2530 }
2531
2532 static int ixgbe_flowspec_to_flow_type(struct ethtool_rx_flow_spec *fsp,
2533                                        u8 *flow_type)
2534 {
2535         switch (fsp->flow_type & ~FLOW_EXT) {
2536         case TCP_V4_FLOW:
2537                 *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2538                 break;
2539         case UDP_V4_FLOW:
2540                 *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2541                 break;
2542         case SCTP_V4_FLOW:
2543                 *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2544                 break;
2545         case IP_USER_FLOW:
2546                 switch (fsp->h_u.usr_ip4_spec.proto) {
2547                 case IPPROTO_TCP:
2548                         *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2549                         break;
2550                 case IPPROTO_UDP:
2551                         *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2552                         break;
2553                 case IPPROTO_SCTP:
2554                         *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2555                         break;
2556                 case 0:
2557                         if (!fsp->m_u.usr_ip4_spec.proto) {
2558                                 *flow_type = IXGBE_ATR_FLOW_TYPE_IPV4;
2559                                 break;
2560                         }
2561                 default:
2562                         return 0;
2563                 }
2564                 break;
2565         default:
2566                 return 0;
2567         }
2568
2569         return 1;
2570 }
2571
2572 static int ixgbe_add_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2573                                         struct ethtool_rxnfc *cmd)
2574 {
2575         struct ethtool_rx_flow_spec *fsp =
2576                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2577         struct ixgbe_hw *hw = &adapter->hw;
2578         struct ixgbe_fdir_filter *input;
2579         union ixgbe_atr_input mask;
2580         int err;
2581
2582         if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
2583                 return -EOPNOTSUPP;
2584
2585         /*
2586          * Don't allow programming if the action is a queue greater than
2587          * the number of online Rx queues.
2588          */
2589         if ((fsp->ring_cookie != RX_CLS_FLOW_DISC) &&
2590             (fsp->ring_cookie >= adapter->num_rx_queues))
2591                 return -EINVAL;
2592
2593         /* Don't allow indexes to exist outside of available space */
2594         if (fsp->location >= ((1024 << adapter->fdir_pballoc) - 2)) {
2595                 e_err(drv, "Location out of range\n");
2596                 return -EINVAL;
2597         }
2598
2599         input = kzalloc(sizeof(*input), GFP_ATOMIC);
2600         if (!input)
2601                 return -ENOMEM;
2602
2603         memset(&mask, 0, sizeof(union ixgbe_atr_input));
2604
2605         /* set SW index */
2606         input->sw_idx = fsp->location;
2607
2608         /* record flow type */
2609         if (!ixgbe_flowspec_to_flow_type(fsp,
2610                                          &input->filter.formatted.flow_type)) {
2611                 e_err(drv, "Unrecognized flow type\n");
2612                 goto err_out;
2613         }
2614
2615         mask.formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
2616                                    IXGBE_ATR_L4TYPE_MASK;
2617
2618         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
2619                 mask.formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
2620
2621         /* Copy input into formatted structures */
2622         input->filter.formatted.src_ip[0] = fsp->h_u.tcp_ip4_spec.ip4src;
2623         mask.formatted.src_ip[0] = fsp->m_u.tcp_ip4_spec.ip4src;
2624         input->filter.formatted.dst_ip[0] = fsp->h_u.tcp_ip4_spec.ip4dst;
2625         mask.formatted.dst_ip[0] = fsp->m_u.tcp_ip4_spec.ip4dst;
2626         input->filter.formatted.src_port = fsp->h_u.tcp_ip4_spec.psrc;
2627         mask.formatted.src_port = fsp->m_u.tcp_ip4_spec.psrc;
2628         input->filter.formatted.dst_port = fsp->h_u.tcp_ip4_spec.pdst;
2629         mask.formatted.dst_port = fsp->m_u.tcp_ip4_spec.pdst;
2630
2631         if (fsp->flow_type & FLOW_EXT) {
2632                 input->filter.formatted.vm_pool =
2633                                 (unsigned char)ntohl(fsp->h_ext.data[1]);
2634                 mask.formatted.vm_pool =
2635                                 (unsigned char)ntohl(fsp->m_ext.data[1]);
2636                 input->filter.formatted.vlan_id = fsp->h_ext.vlan_tci;
2637                 mask.formatted.vlan_id = fsp->m_ext.vlan_tci;
2638                 input->filter.formatted.flex_bytes =
2639                                                 fsp->h_ext.vlan_etype;
2640                 mask.formatted.flex_bytes = fsp->m_ext.vlan_etype;
2641         }
2642
2643         /* determine if we need to drop or route the packet */
2644         if (fsp->ring_cookie == RX_CLS_FLOW_DISC)
2645                 input->action = IXGBE_FDIR_DROP_QUEUE;
2646         else
2647                 input->action = fsp->ring_cookie;
2648
2649         spin_lock(&adapter->fdir_perfect_lock);
2650
2651         if (hlist_empty(&adapter->fdir_filter_list)) {
2652                 /* save mask and program input mask into HW */
2653                 memcpy(&adapter->fdir_mask, &mask, sizeof(mask));
2654                 err = ixgbe_fdir_set_input_mask_82599(hw, &mask);
2655                 if (err) {
2656                         e_err(drv, "Error writing mask\n");
2657                         goto err_out_w_lock;
2658                 }
2659         } else if (memcmp(&adapter->fdir_mask, &mask, sizeof(mask))) {
2660                 e_err(drv, "Only one mask supported per port\n");
2661                 goto err_out_w_lock;
2662         }
2663
2664         /* apply mask and compute/store hash */
2665         ixgbe_atr_compute_perfect_hash_82599(&input->filter, &mask);
2666
2667         /* program filters to filter memory */
2668         err = ixgbe_fdir_write_perfect_filter_82599(hw,
2669                                 &input->filter, input->sw_idx,
2670                                 (input->action == IXGBE_FDIR_DROP_QUEUE) ?
2671                                 IXGBE_FDIR_DROP_QUEUE :
2672                                 adapter->rx_ring[input->action]->reg_idx);
2673         if (err)
2674                 goto err_out_w_lock;
2675
2676         ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
2677
2678         spin_unlock(&adapter->fdir_perfect_lock);
2679
2680         return err;
2681 err_out_w_lock:
2682         spin_unlock(&adapter->fdir_perfect_lock);
2683 err_out:
2684         kfree(input);
2685         return -EINVAL;
2686 }
2687
2688 static int ixgbe_del_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2689                                         struct ethtool_rxnfc *cmd)
2690 {
2691         struct ethtool_rx_flow_spec *fsp =
2692                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2693         int err;
2694
2695         spin_lock(&adapter->fdir_perfect_lock);
2696         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, fsp->location);
2697         spin_unlock(&adapter->fdir_perfect_lock);
2698
2699         return err;
2700 }
2701
2702 #define UDP_RSS_FLAGS (IXGBE_FLAG2_RSS_FIELD_IPV4_UDP | \
2703                        IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2704 static int ixgbe_set_rss_hash_opt(struct ixgbe_adapter *adapter,
2705                                   struct ethtool_rxnfc *nfc)
2706 {
2707         u32 flags2 = adapter->flags2;
2708
2709         /*
2710          * RSS does not support anything other than hashing
2711          * to queues on src and dst IPs and ports
2712          */
2713         if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
2714                           RXH_L4_B_0_1 | RXH_L4_B_2_3))
2715                 return -EINVAL;
2716
2717         switch (nfc->flow_type) {
2718         case TCP_V4_FLOW:
2719         case TCP_V6_FLOW:
2720                 if (!(nfc->data & RXH_IP_SRC) ||
2721                     !(nfc->data & RXH_IP_DST) ||
2722                     !(nfc->data & RXH_L4_B_0_1) ||
2723                     !(nfc->data & RXH_L4_B_2_3))
2724                         return -EINVAL;
2725                 break;
2726         case UDP_V4_FLOW:
2727                 if (!(nfc->data & RXH_IP_SRC) ||
2728                     !(nfc->data & RXH_IP_DST))
2729                         return -EINVAL;
2730                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2731                 case 0:
2732                         flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV4_UDP;
2733                         break;
2734                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2735                         flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV4_UDP;
2736                         break;
2737                 default:
2738                         return -EINVAL;
2739                 }
2740                 break;
2741         case UDP_V6_FLOW:
2742                 if (!(nfc->data & RXH_IP_SRC) ||
2743                     !(nfc->data & RXH_IP_DST))
2744                         return -EINVAL;
2745                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2746                 case 0:
2747                         flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV6_UDP;
2748                         break;
2749                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2750                         flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV6_UDP;
2751                         break;
2752                 default:
2753                         return -EINVAL;
2754                 }
2755                 break;
2756         case AH_ESP_V4_FLOW:
2757         case AH_V4_FLOW:
2758         case ESP_V4_FLOW:
2759         case SCTP_V4_FLOW:
2760         case AH_ESP_V6_FLOW:
2761         case AH_V6_FLOW:
2762         case ESP_V6_FLOW:
2763         case SCTP_V6_FLOW:
2764                 if (!(nfc->data & RXH_IP_SRC) ||
2765                     !(nfc->data & RXH_IP_DST) ||
2766                     (nfc->data & RXH_L4_B_0_1) ||
2767                     (nfc->data & RXH_L4_B_2_3))
2768                         return -EINVAL;
2769                 break;
2770         default:
2771                 return -EINVAL;
2772         }
2773
2774         /* if we changed something we need to update flags */
2775         if (flags2 != adapter->flags2) {
2776                 struct ixgbe_hw *hw = &adapter->hw;
2777                 u32 mrqc = IXGBE_READ_REG(hw, IXGBE_MRQC);
2778
2779                 if ((flags2 & UDP_RSS_FLAGS) &&
2780                     !(adapter->flags2 & UDP_RSS_FLAGS))
2781                         e_warn(drv, "enabling UDP RSS: fragmented packets may arrive out of order to the stack above\n");
2782
2783                 adapter->flags2 = flags2;
2784
2785                 /* Perform hash on these packet types */
2786                 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4
2787                       | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
2788                       | IXGBE_MRQC_RSS_FIELD_IPV6
2789                       | IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
2790
2791                 mrqc &= ~(IXGBE_MRQC_RSS_FIELD_IPV4_UDP |
2792                           IXGBE_MRQC_RSS_FIELD_IPV6_UDP);
2793
2794                 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
2795                         mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
2796
2797                 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2798                         mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
2799
2800                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
2801         }
2802
2803         return 0;
2804 }
2805
2806 static int ixgbe_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
2807 {
2808         struct ixgbe_adapter *adapter = netdev_priv(dev);
2809         int ret = -EOPNOTSUPP;
2810
2811         switch (cmd->cmd) {
2812         case ETHTOOL_SRXCLSRLINS:
2813                 ret = ixgbe_add_ethtool_fdir_entry(adapter, cmd);
2814                 break;
2815         case ETHTOOL_SRXCLSRLDEL:
2816                 ret = ixgbe_del_ethtool_fdir_entry(adapter, cmd);
2817                 break;
2818         case ETHTOOL_SRXFH:
2819                 ret = ixgbe_set_rss_hash_opt(adapter, cmd);
2820                 break;
2821         default:
2822                 break;
2823         }
2824
2825         return ret;
2826 }
2827
2828 static int ixgbe_get_ts_info(struct net_device *dev,
2829                              struct ethtool_ts_info *info)
2830 {
2831         struct ixgbe_adapter *adapter = netdev_priv(dev);
2832
2833         switch (adapter->hw.mac.type) {
2834         case ixgbe_mac_X540:
2835         case ixgbe_mac_82599EB:
2836                 info->so_timestamping =
2837                         SOF_TIMESTAMPING_TX_SOFTWARE |
2838                         SOF_TIMESTAMPING_RX_SOFTWARE |
2839                         SOF_TIMESTAMPING_SOFTWARE |
2840                         SOF_TIMESTAMPING_TX_HARDWARE |
2841                         SOF_TIMESTAMPING_RX_HARDWARE |
2842                         SOF_TIMESTAMPING_RAW_HARDWARE;
2843
2844                 if (adapter->ptp_clock)
2845                         info->phc_index = ptp_clock_index(adapter->ptp_clock);
2846                 else
2847                         info->phc_index = -1;
2848
2849                 info->tx_types =
2850                         (1 << HWTSTAMP_TX_OFF) |
2851                         (1 << HWTSTAMP_TX_ON);
2852
2853                 info->rx_filters =
2854                         (1 << HWTSTAMP_FILTER_NONE) |
2855                         (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2856                         (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2857                         (1 << HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
2858                         (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
2859                         (1 << HWTSTAMP_FILTER_PTP_V2_SYNC) |
2860                         (1 << HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
2861                         (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
2862                         (1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
2863                         (1 << HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) |
2864                         (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
2865                         (1 << HWTSTAMP_FILTER_PTP_V2_EVENT);
2866                 break;
2867         default:
2868                 return ethtool_op_get_ts_info(dev, info);
2869                 break;
2870         }
2871         return 0;
2872 }
2873
2874 static unsigned int ixgbe_max_channels(struct ixgbe_adapter *adapter)
2875 {
2876         unsigned int max_combined;
2877         u8 tcs = netdev_get_num_tc(adapter->netdev);
2878
2879         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
2880                 /* We only support one q_vector without MSI-X */
2881                 max_combined = 1;
2882         } else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
2883                 /* SR-IOV currently only allows one queue on the PF */
2884                 max_combined = 1;
2885         } else if (tcs > 1) {
2886                 /* For DCB report channels per traffic class */
2887                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
2888                         /* 8 TC w/ 4 queues per TC */
2889                         max_combined = 4;
2890                 } else if (tcs > 4) {
2891                         /* 8 TC w/ 8 queues per TC */
2892                         max_combined = 8;
2893                 } else {
2894                         /* 4 TC w/ 16 queues per TC */
2895                         max_combined = 16;
2896                 }
2897         } else if (adapter->atr_sample_rate) {
2898                 /* support up to 64 queues with ATR */
2899                 max_combined = IXGBE_MAX_FDIR_INDICES;
2900         } else {
2901                 /* support up to 16 queues with RSS */
2902                 max_combined = IXGBE_MAX_RSS_INDICES;
2903         }
2904
2905         return max_combined;
2906 }
2907
2908 static void ixgbe_get_channels(struct net_device *dev,
2909                                struct ethtool_channels *ch)
2910 {
2911         struct ixgbe_adapter *adapter = netdev_priv(dev);
2912
2913         /* report maximum channels */
2914         ch->max_combined = ixgbe_max_channels(adapter);
2915
2916         /* report info for other vector */
2917         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2918                 ch->max_other = NON_Q_VECTORS;
2919                 ch->other_count = NON_Q_VECTORS;
2920         }
2921
2922         /* record RSS queues */
2923         ch->combined_count = adapter->ring_feature[RING_F_RSS].indices;
2924
2925         /* nothing else to report if RSS is disabled */
2926         if (ch->combined_count == 1)
2927                 return;
2928
2929         /* we do not support ATR queueing if SR-IOV is enabled */
2930         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
2931                 return;
2932
2933         /* same thing goes for being DCB enabled */
2934         if (netdev_get_num_tc(dev) > 1)
2935                 return;
2936
2937         /* if ATR is disabled we can exit */
2938         if (!adapter->atr_sample_rate)
2939                 return;
2940
2941         /* report flow director queues as maximum channels */
2942         ch->combined_count = adapter->ring_feature[RING_F_FDIR].indices;
2943 }
2944
2945 static int ixgbe_set_channels(struct net_device *dev,
2946                               struct ethtool_channels *ch)
2947 {
2948         struct ixgbe_adapter *adapter = netdev_priv(dev);
2949         unsigned int count = ch->combined_count;
2950
2951         /* verify they are not requesting separate vectors */
2952         if (!count || ch->rx_count || ch->tx_count)
2953                 return -EINVAL;
2954
2955         /* verify other_count has not changed */
2956         if (ch->other_count != NON_Q_VECTORS)
2957                 return -EINVAL;
2958
2959         /* verify the number of channels does not exceed hardware limits */
2960         if (count > ixgbe_max_channels(adapter))
2961                 return -EINVAL;
2962
2963         /* update feature limits from largest to smallest supported values */
2964         adapter->ring_feature[RING_F_FDIR].limit = count;
2965
2966         /* cap RSS limit at 16 */
2967         if (count > IXGBE_MAX_RSS_INDICES)
2968                 count = IXGBE_MAX_RSS_INDICES;
2969         adapter->ring_feature[RING_F_RSS].limit = count;
2970
2971 #ifdef IXGBE_FCOE
2972         /* cap FCoE limit at 8 */
2973         if (count > IXGBE_FCRETA_SIZE)
2974                 count = IXGBE_FCRETA_SIZE;
2975         adapter->ring_feature[RING_F_FCOE].limit = count;
2976
2977 #endif
2978         /* use setup TC to update any traffic class queue mapping */
2979         return ixgbe_setup_tc(dev, netdev_get_num_tc(dev));
2980 }
2981
2982 static int ixgbe_get_module_info(struct net_device *dev,
2983                                        struct ethtool_modinfo *modinfo)
2984 {
2985         struct ixgbe_adapter *adapter = netdev_priv(dev);
2986         struct ixgbe_hw *hw = &adapter->hw;
2987         u32 status;
2988         u8 sff8472_rev, addr_mode;
2989         bool page_swap = false;
2990
2991         /* Check whether we support SFF-8472 or not */
2992         status = hw->phy.ops.read_i2c_eeprom(hw,
2993                                              IXGBE_SFF_SFF_8472_COMP,
2994                                              &sff8472_rev);
2995         if (status != 0)
2996                 return -EIO;
2997
2998         /* addressing mode is not supported */
2999         status = hw->phy.ops.read_i2c_eeprom(hw,
3000                                              IXGBE_SFF_SFF_8472_SWAP,
3001                                              &addr_mode);
3002         if (status != 0)
3003                 return -EIO;
3004
3005         if (addr_mode & IXGBE_SFF_ADDRESSING_MODE) {
3006                 e_err(drv, "Address change required to access page 0xA2, but not supported. Please report the module type to the driver maintainers.\n");
3007                 page_swap = true;
3008         }
3009
3010         if (sff8472_rev == IXGBE_SFF_SFF_8472_UNSUP || page_swap) {
3011                 /* We have a SFP, but it does not support SFF-8472 */
3012                 modinfo->type = ETH_MODULE_SFF_8079;
3013                 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
3014         } else {
3015                 /* We have a SFP which supports a revision of SFF-8472. */
3016                 modinfo->type = ETH_MODULE_SFF_8472;
3017                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
3018         }
3019
3020         return 0;
3021 }
3022
3023 static int ixgbe_get_module_eeprom(struct net_device *dev,
3024                                          struct ethtool_eeprom *ee,
3025                                          u8 *data)
3026 {
3027         struct ixgbe_adapter *adapter = netdev_priv(dev);
3028         struct ixgbe_hw *hw = &adapter->hw;
3029         u32 status = IXGBE_ERR_PHY_ADDR_INVALID;
3030         u8 databyte = 0xFF;
3031         int i = 0;
3032
3033         if (ee->len == 0)
3034                 return -EINVAL;
3035
3036         for (i = ee->offset; i < ee->offset + ee->len; i++) {
3037                 /* I2C reads can take long time */
3038                 if (test_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
3039                         return -EBUSY;
3040
3041                 if (i < ETH_MODULE_SFF_8079_LEN)
3042                         status = hw->phy.ops.read_i2c_eeprom(hw, i, &databyte);
3043                 else
3044                         status = hw->phy.ops.read_i2c_sff8472(hw, i, &databyte);
3045
3046                 if (status != 0)
3047                         return -EIO;
3048
3049                 data[i - ee->offset] = databyte;
3050         }
3051
3052         return 0;
3053 }
3054
3055 static const struct ethtool_ops ixgbe_ethtool_ops = {
3056         .get_settings           = ixgbe_get_settings,
3057         .set_settings           = ixgbe_set_settings,
3058         .get_drvinfo            = ixgbe_get_drvinfo,
3059         .get_regs_len           = ixgbe_get_regs_len,
3060         .get_regs               = ixgbe_get_regs,
3061         .get_wol                = ixgbe_get_wol,
3062         .set_wol                = ixgbe_set_wol,
3063         .nway_reset             = ixgbe_nway_reset,
3064         .get_link               = ethtool_op_get_link,
3065         .get_eeprom_len         = ixgbe_get_eeprom_len,
3066         .get_eeprom             = ixgbe_get_eeprom,
3067         .set_eeprom             = ixgbe_set_eeprom,
3068         .get_ringparam          = ixgbe_get_ringparam,
3069         .set_ringparam          = ixgbe_set_ringparam,
3070         .get_pauseparam         = ixgbe_get_pauseparam,
3071         .set_pauseparam         = ixgbe_set_pauseparam,
3072         .get_msglevel           = ixgbe_get_msglevel,
3073         .set_msglevel           = ixgbe_set_msglevel,
3074         .self_test              = ixgbe_diag_test,
3075         .get_strings            = ixgbe_get_strings,
3076         .set_phys_id            = ixgbe_set_phys_id,
3077         .get_sset_count         = ixgbe_get_sset_count,
3078         .get_ethtool_stats      = ixgbe_get_ethtool_stats,
3079         .get_coalesce           = ixgbe_get_coalesce,
3080         .set_coalesce           = ixgbe_set_coalesce,
3081         .get_rxnfc              = ixgbe_get_rxnfc,
3082         .set_rxnfc              = ixgbe_set_rxnfc,
3083         .get_channels           = ixgbe_get_channels,
3084         .set_channels           = ixgbe_set_channels,
3085         .get_ts_info            = ixgbe_get_ts_info,
3086         .get_module_info        = ixgbe_get_module_info,
3087         .get_module_eeprom      = ixgbe_get_module_eeprom,
3088 };
3089
3090 void ixgbe_set_ethtool_ops(struct net_device *netdev)
3091 {
3092         netdev->ethtool_ops = &ixgbe_ethtool_ops;
3093 }