Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
[pandora-kernel.git] / drivers / net / ethernet / broadcom / bnx2x / bnx2x_cmn.c
1 /* bnx2x_cmn.c: Broadcom Everest network driver.
2  *
3  * Copyright (c) 2007-2012 Broadcom Corporation
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License as published by
7  * the Free Software Foundation.
8  *
9  * Maintained by: Eilon Greenstein <eilong@broadcom.com>
10  * Written by: Eliezer Tamir
11  * Based on code from Michael Chan's bnx2 driver
12  * UDP CSUM errata workaround by Arik Gendelman
13  * Slowpath and fastpath rework by Vladislav Zolotarov
14  * Statistics and Link management by Yitchak Gertner
15  *
16  */
17
18 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19
20 #include <linux/etherdevice.h>
21 #include <linux/if_vlan.h>
22 #include <linux/interrupt.h>
23 #include <linux/ip.h>
24 #include <net/ipv6.h>
25 #include <net/ip6_checksum.h>
26 #include <linux/firmware.h>
27 #include <linux/prefetch.h>
28 #include "bnx2x_cmn.h"
29 #include "bnx2x_init.h"
30 #include "bnx2x_sp.h"
31
32
33
34 /**
35  * bnx2x_move_fp - move content of the fastpath structure.
36  *
37  * @bp:         driver handle
38  * @from:       source FP index
39  * @to:         destination FP index
40  *
41  * Makes sure the contents of the bp->fp[to].napi is kept
42  * intact. This is done by first copying the napi struct from
43  * the target to the source, and then mem copying the entire
44  * source onto the target
45  */
46 static inline void bnx2x_move_fp(struct bnx2x *bp, int from, int to)
47 {
48         struct bnx2x_fastpath *from_fp = &bp->fp[from];
49         struct bnx2x_fastpath *to_fp = &bp->fp[to];
50
51         /* Copy the NAPI object as it has been already initialized */
52         from_fp->napi = to_fp->napi;
53
54         /* Move bnx2x_fastpath contents */
55         memcpy(to_fp, from_fp, sizeof(*to_fp));
56         to_fp->index = to;
57 }
58
59 int load_count[2][3] = { {0} }; /* per-path: 0-common, 1-port0, 2-port1 */
60
61 /* free skb in the packet ring at pos idx
62  * return idx of last bd freed
63  */
64 static u16 bnx2x_free_tx_pkt(struct bnx2x *bp, struct bnx2x_fp_txdata *txdata,
65                              u16 idx, unsigned int *pkts_compl,
66                              unsigned int *bytes_compl)
67 {
68         struct sw_tx_bd *tx_buf = &txdata->tx_buf_ring[idx];
69         struct eth_tx_start_bd *tx_start_bd;
70         struct eth_tx_bd *tx_data_bd;
71         struct sk_buff *skb = tx_buf->skb;
72         u16 bd_idx = TX_BD(tx_buf->first_bd), new_cons;
73         int nbd;
74
75         /* prefetch skb end pointer to speedup dev_kfree_skb() */
76         prefetch(&skb->end);
77
78         DP(NETIF_MSG_TX_DONE, "fp[%d]: pkt_idx %d  buff @(%p)->skb %p\n",
79            txdata->txq_index, idx, tx_buf, skb);
80
81         /* unmap first bd */
82         tx_start_bd = &txdata->tx_desc_ring[bd_idx].start_bd;
83         dma_unmap_single(&bp->pdev->dev, BD_UNMAP_ADDR(tx_start_bd),
84                          BD_UNMAP_LEN(tx_start_bd), DMA_TO_DEVICE);
85
86
87         nbd = le16_to_cpu(tx_start_bd->nbd) - 1;
88 #ifdef BNX2X_STOP_ON_ERROR
89         if ((nbd - 1) > (MAX_SKB_FRAGS + 2)) {
90                 BNX2X_ERR("BAD nbd!\n");
91                 bnx2x_panic();
92         }
93 #endif
94         new_cons = nbd + tx_buf->first_bd;
95
96         /* Get the next bd */
97         bd_idx = TX_BD(NEXT_TX_IDX(bd_idx));
98
99         /* Skip a parse bd... */
100         --nbd;
101         bd_idx = TX_BD(NEXT_TX_IDX(bd_idx));
102
103         /* ...and the TSO split header bd since they have no mapping */
104         if (tx_buf->flags & BNX2X_TSO_SPLIT_BD) {
105                 --nbd;
106                 bd_idx = TX_BD(NEXT_TX_IDX(bd_idx));
107         }
108
109         /* now free frags */
110         while (nbd > 0) {
111
112                 tx_data_bd = &txdata->tx_desc_ring[bd_idx].reg_bd;
113                 dma_unmap_page(&bp->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
114                                BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
115                 if (--nbd)
116                         bd_idx = TX_BD(NEXT_TX_IDX(bd_idx));
117         }
118
119         /* release skb */
120         WARN_ON(!skb);
121         if (likely(skb)) {
122                 (*pkts_compl)++;
123                 (*bytes_compl) += skb->len;
124         }
125
126         dev_kfree_skb_any(skb);
127         tx_buf->first_bd = 0;
128         tx_buf->skb = NULL;
129
130         return new_cons;
131 }
132
133 int bnx2x_tx_int(struct bnx2x *bp, struct bnx2x_fp_txdata *txdata)
134 {
135         struct netdev_queue *txq;
136         u16 hw_cons, sw_cons, bd_cons = txdata->tx_bd_cons;
137         unsigned int pkts_compl = 0, bytes_compl = 0;
138
139 #ifdef BNX2X_STOP_ON_ERROR
140         if (unlikely(bp->panic))
141                 return -1;
142 #endif
143
144         txq = netdev_get_tx_queue(bp->dev, txdata->txq_index);
145         hw_cons = le16_to_cpu(*txdata->tx_cons_sb);
146         sw_cons = txdata->tx_pkt_cons;
147
148         while (sw_cons != hw_cons) {
149                 u16 pkt_cons;
150
151                 pkt_cons = TX_BD(sw_cons);
152
153                 DP(NETIF_MSG_TX_DONE,
154                    "queue[%d]: hw_cons %u  sw_cons %u  pkt_cons %u\n",
155                    txdata->txq_index, hw_cons, sw_cons, pkt_cons);
156
157                 bd_cons = bnx2x_free_tx_pkt(bp, txdata, pkt_cons,
158                     &pkts_compl, &bytes_compl);
159
160                 sw_cons++;
161         }
162
163         netdev_tx_completed_queue(txq, pkts_compl, bytes_compl);
164
165         txdata->tx_pkt_cons = sw_cons;
166         txdata->tx_bd_cons = bd_cons;
167
168         /* Need to make the tx_bd_cons update visible to start_xmit()
169          * before checking for netif_tx_queue_stopped().  Without the
170          * memory barrier, there is a small possibility that
171          * start_xmit() will miss it and cause the queue to be stopped
172          * forever.
173          * On the other hand we need an rmb() here to ensure the proper
174          * ordering of bit testing in the following
175          * netif_tx_queue_stopped(txq) call.
176          */
177         smp_mb();
178
179         if (unlikely(netif_tx_queue_stopped(txq))) {
180                 /* Taking tx_lock() is needed to prevent reenabling the queue
181                  * while it's empty. This could have happen if rx_action() gets
182                  * suspended in bnx2x_tx_int() after the condition before
183                  * netif_tx_wake_queue(), while tx_action (bnx2x_start_xmit()):
184                  *
185                  * stops the queue->sees fresh tx_bd_cons->releases the queue->
186                  * sends some packets consuming the whole queue again->
187                  * stops the queue
188                  */
189
190                 __netif_tx_lock(txq, smp_processor_id());
191
192                 if ((netif_tx_queue_stopped(txq)) &&
193                     (bp->state == BNX2X_STATE_OPEN) &&
194                     (bnx2x_tx_avail(bp, txdata) >= MAX_SKB_FRAGS + 3))
195                         netif_tx_wake_queue(txq);
196
197                 __netif_tx_unlock(txq);
198         }
199         return 0;
200 }
201
202 static inline void bnx2x_update_last_max_sge(struct bnx2x_fastpath *fp,
203                                              u16 idx)
204 {
205         u16 last_max = fp->last_max_sge;
206
207         if (SUB_S16(idx, last_max) > 0)
208                 fp->last_max_sge = idx;
209 }
210
211 static inline void bnx2x_update_sge_prod(struct bnx2x_fastpath *fp,
212                                          u16 sge_len,
213                                          struct eth_end_agg_rx_cqe *cqe)
214 {
215         struct bnx2x *bp = fp->bp;
216         u16 last_max, last_elem, first_elem;
217         u16 delta = 0;
218         u16 i;
219
220         if (!sge_len)
221                 return;
222
223         /* First mark all used pages */
224         for (i = 0; i < sge_len; i++)
225                 BIT_VEC64_CLEAR_BIT(fp->sge_mask,
226                         RX_SGE(le16_to_cpu(cqe->sgl_or_raw_data.sgl[i])));
227
228         DP(NETIF_MSG_RX_STATUS, "fp_cqe->sgl[%d] = %d\n",
229            sge_len - 1, le16_to_cpu(cqe->sgl_or_raw_data.sgl[sge_len - 1]));
230
231         /* Here we assume that the last SGE index is the biggest */
232         prefetch((void *)(fp->sge_mask));
233         bnx2x_update_last_max_sge(fp,
234                 le16_to_cpu(cqe->sgl_or_raw_data.sgl[sge_len - 1]));
235
236         last_max = RX_SGE(fp->last_max_sge);
237         last_elem = last_max >> BIT_VEC64_ELEM_SHIFT;
238         first_elem = RX_SGE(fp->rx_sge_prod) >> BIT_VEC64_ELEM_SHIFT;
239
240         /* If ring is not full */
241         if (last_elem + 1 != first_elem)
242                 last_elem++;
243
244         /* Now update the prod */
245         for (i = first_elem; i != last_elem; i = NEXT_SGE_MASK_ELEM(i)) {
246                 if (likely(fp->sge_mask[i]))
247                         break;
248
249                 fp->sge_mask[i] = BIT_VEC64_ELEM_ONE_MASK;
250                 delta += BIT_VEC64_ELEM_SZ;
251         }
252
253         if (delta > 0) {
254                 fp->rx_sge_prod += delta;
255                 /* clear page-end entries */
256                 bnx2x_clear_sge_mask_next_elems(fp);
257         }
258
259         DP(NETIF_MSG_RX_STATUS,
260            "fp->last_max_sge = %d  fp->rx_sge_prod = %d\n",
261            fp->last_max_sge, fp->rx_sge_prod);
262 }
263
264 /* Set Toeplitz hash value in the skb using the value from the
265  * CQE (calculated by HW).
266  */
267 static u32 bnx2x_get_rxhash(const struct bnx2x *bp,
268                             const struct eth_fast_path_rx_cqe *cqe)
269 {
270         /* Set Toeplitz hash from CQE */
271         if ((bp->dev->features & NETIF_F_RXHASH) &&
272             (cqe->status_flags & ETH_FAST_PATH_RX_CQE_RSS_HASH_FLG))
273                 return le32_to_cpu(cqe->rss_hash_result);
274         return 0;
275 }
276
277 static void bnx2x_tpa_start(struct bnx2x_fastpath *fp, u16 queue,
278                             u16 cons, u16 prod,
279                             struct eth_fast_path_rx_cqe *cqe)
280 {
281         struct bnx2x *bp = fp->bp;
282         struct sw_rx_bd *cons_rx_buf = &fp->rx_buf_ring[cons];
283         struct sw_rx_bd *prod_rx_buf = &fp->rx_buf_ring[prod];
284         struct eth_rx_bd *prod_bd = &fp->rx_desc_ring[prod];
285         dma_addr_t mapping;
286         struct bnx2x_agg_info *tpa_info = &fp->tpa_info[queue];
287         struct sw_rx_bd *first_buf = &tpa_info->first_buf;
288
289         /* print error if current state != stop */
290         if (tpa_info->tpa_state != BNX2X_TPA_STOP)
291                 BNX2X_ERR("start of bin not in stop [%d]\n", queue);
292
293         /* Try to map an empty data buffer from the aggregation info  */
294         mapping = dma_map_single(&bp->pdev->dev,
295                                  first_buf->data + NET_SKB_PAD,
296                                  fp->rx_buf_size, DMA_FROM_DEVICE);
297         /*
298          *  ...if it fails - move the skb from the consumer to the producer
299          *  and set the current aggregation state as ERROR to drop it
300          *  when TPA_STOP arrives.
301          */
302
303         if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) {
304                 /* Move the BD from the consumer to the producer */
305                 bnx2x_reuse_rx_data(fp, cons, prod);
306                 tpa_info->tpa_state = BNX2X_TPA_ERROR;
307                 return;
308         }
309
310         /* move empty data from pool to prod */
311         prod_rx_buf->data = first_buf->data;
312         dma_unmap_addr_set(prod_rx_buf, mapping, mapping);
313         /* point prod_bd to new data */
314         prod_bd->addr_hi = cpu_to_le32(U64_HI(mapping));
315         prod_bd->addr_lo = cpu_to_le32(U64_LO(mapping));
316
317         /* move partial skb from cons to pool (don't unmap yet) */
318         *first_buf = *cons_rx_buf;
319
320         /* mark bin state as START */
321         tpa_info->parsing_flags =
322                 le16_to_cpu(cqe->pars_flags.flags);
323         tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
324         tpa_info->tpa_state = BNX2X_TPA_START;
325         tpa_info->len_on_bd = le16_to_cpu(cqe->len_on_bd);
326         tpa_info->placement_offset = cqe->placement_offset;
327         tpa_info->rxhash = bnx2x_get_rxhash(bp, cqe);
328         if (fp->mode == TPA_MODE_GRO) {
329                 u16 gro_size = le16_to_cpu(cqe->pkt_len_or_gro_seg_len);
330                 tpa_info->full_page =
331                         SGE_PAGE_SIZE * PAGES_PER_SGE / gro_size * gro_size;
332                 /*
333                  * FW 7.2.16 BUG workaround:
334                  * if SGE size is (exactly) multiple gro_size
335                  * fw will place one less frag on SGE.
336                  * the calculation is done only for potentially
337                  * dangerous MTUs.
338                  */
339                 if (unlikely(bp->gro_check))
340                         if (!(SGE_PAGE_SIZE * PAGES_PER_SGE % gro_size))
341                                 tpa_info->full_page -= gro_size;
342                 tpa_info->gro_size = gro_size;
343         }
344
345 #ifdef BNX2X_STOP_ON_ERROR
346         fp->tpa_queue_used |= (1 << queue);
347 #ifdef _ASM_GENERIC_INT_L64_H
348         DP(NETIF_MSG_RX_STATUS, "fp->tpa_queue_used = 0x%lx\n",
349 #else
350         DP(NETIF_MSG_RX_STATUS, "fp->tpa_queue_used = 0x%llx\n",
351 #endif
352            fp->tpa_queue_used);
353 #endif
354 }
355
356 /* Timestamp option length allowed for TPA aggregation:
357  *
358  *              nop nop kind length echo val
359  */
360 #define TPA_TSTAMP_OPT_LEN      12
361 /**
362  * bnx2x_set_lro_mss - calculate the approximate value of the MSS
363  *
364  * @bp:                 driver handle
365  * @parsing_flags:      parsing flags from the START CQE
366  * @len_on_bd:          total length of the first packet for the
367  *                      aggregation.
368  *
369  * Approximate value of the MSS for this aggregation calculated using
370  * the first packet of it.
371  */
372 static inline u16 bnx2x_set_lro_mss(struct bnx2x *bp, u16 parsing_flags,
373                                     u16 len_on_bd)
374 {
375         /*
376          * TPA arrgregation won't have either IP options or TCP options
377          * other than timestamp or IPv6 extension headers.
378          */
379         u16 hdrs_len = ETH_HLEN + sizeof(struct tcphdr);
380
381         if (GET_FLAG(parsing_flags, PARSING_FLAGS_OVER_ETHERNET_PROTOCOL) ==
382             PRS_FLAG_OVERETH_IPV6)
383                 hdrs_len += sizeof(struct ipv6hdr);
384         else /* IPv4 */
385                 hdrs_len += sizeof(struct iphdr);
386
387
388         /* Check if there was a TCP timestamp, if there is it's will
389          * always be 12 bytes length: nop nop kind length echo val.
390          *
391          * Otherwise FW would close the aggregation.
392          */
393         if (parsing_flags & PARSING_FLAGS_TIME_STAMP_EXIST_FLAG)
394                 hdrs_len += TPA_TSTAMP_OPT_LEN;
395
396         return len_on_bd - hdrs_len;
397 }
398
399 static int bnx2x_fill_frag_skb(struct bnx2x *bp, struct bnx2x_fastpath *fp,
400                                struct bnx2x_agg_info *tpa_info,
401                                u16 pages,
402                                struct sk_buff *skb,
403                                struct eth_end_agg_rx_cqe *cqe,
404                                u16 cqe_idx)
405 {
406         struct sw_rx_page *rx_pg, old_rx_pg;
407         u32 i, frag_len, frag_size;
408         int err, j, frag_id = 0;
409         u16 len_on_bd = tpa_info->len_on_bd;
410         u16 full_page = 0, gro_size = 0;
411
412         frag_size = le16_to_cpu(cqe->pkt_len) - len_on_bd;
413
414         if (fp->mode == TPA_MODE_GRO) {
415                 gro_size = tpa_info->gro_size;
416                 full_page = tpa_info->full_page;
417         }
418
419         /* This is needed in order to enable forwarding support */
420         if (frag_size) {
421                 skb_shinfo(skb)->gso_size = bnx2x_set_lro_mss(bp,
422                                         tpa_info->parsing_flags, len_on_bd);
423
424                 /* set for GRO */
425                 if (fp->mode == TPA_MODE_GRO)
426                         skb_shinfo(skb)->gso_type =
427                             (GET_FLAG(tpa_info->parsing_flags,
428                                       PARSING_FLAGS_OVER_ETHERNET_PROTOCOL) ==
429                                                 PRS_FLAG_OVERETH_IPV6) ?
430                                 SKB_GSO_TCPV6 : SKB_GSO_TCPV4;
431         }
432
433
434 #ifdef BNX2X_STOP_ON_ERROR
435         if (pages > min_t(u32, 8, MAX_SKB_FRAGS)*SGE_PAGE_SIZE*PAGES_PER_SGE) {
436                 BNX2X_ERR("SGL length is too long: %d. CQE index is %d\n",
437                           pages, cqe_idx);
438                 BNX2X_ERR("cqe->pkt_len = %d\n", cqe->pkt_len);
439                 bnx2x_panic();
440                 return -EINVAL;
441         }
442 #endif
443
444         /* Run through the SGL and compose the fragmented skb */
445         for (i = 0, j = 0; i < pages; i += PAGES_PER_SGE, j++) {
446                 u16 sge_idx = RX_SGE(le16_to_cpu(cqe->sgl_or_raw_data.sgl[j]));
447
448                 /* FW gives the indices of the SGE as if the ring is an array
449                    (meaning that "next" element will consume 2 indices) */
450                 if (fp->mode == TPA_MODE_GRO)
451                         frag_len = min_t(u32, frag_size, (u32)full_page);
452                 else /* LRO */
453                         frag_len = min_t(u32, frag_size,
454                                          (u32)(SGE_PAGE_SIZE * PAGES_PER_SGE));
455
456                 rx_pg = &fp->rx_page_ring[sge_idx];
457                 old_rx_pg = *rx_pg;
458
459                 /* If we fail to allocate a substitute page, we simply stop
460                    where we are and drop the whole packet */
461                 err = bnx2x_alloc_rx_sge(bp, fp, sge_idx);
462                 if (unlikely(err)) {
463                         fp->eth_q_stats.rx_skb_alloc_failed++;
464                         return err;
465                 }
466
467                 /* Unmap the page as we r going to pass it to the stack */
468                 dma_unmap_page(&bp->pdev->dev,
469                                dma_unmap_addr(&old_rx_pg, mapping),
470                                SGE_PAGE_SIZE*PAGES_PER_SGE, DMA_FROM_DEVICE);
471                 /* Add one frag and update the appropriate fields in the skb */
472                 if (fp->mode == TPA_MODE_LRO)
473                         skb_fill_page_desc(skb, j, old_rx_pg.page, 0, frag_len);
474                 else { /* GRO */
475                         int rem;
476                         int offset = 0;
477                         for (rem = frag_len; rem > 0; rem -= gro_size) {
478                                 int len = rem > gro_size ? gro_size : rem;
479                                 skb_fill_page_desc(skb, frag_id++,
480                                                    old_rx_pg.page, offset, len);
481                                 if (offset)
482                                         get_page(old_rx_pg.page);
483                                 offset += len;
484                         }
485                 }
486
487                 skb->data_len += frag_len;
488                 skb->truesize += SGE_PAGE_SIZE * PAGES_PER_SGE;
489                 skb->len += frag_len;
490
491                 frag_size -= frag_len;
492         }
493
494         return 0;
495 }
496
497 static inline void bnx2x_tpa_stop(struct bnx2x *bp, struct bnx2x_fastpath *fp,
498                                   struct bnx2x_agg_info *tpa_info,
499                                   u16 pages,
500                                   struct eth_end_agg_rx_cqe *cqe,
501                                   u16 cqe_idx)
502 {
503         struct sw_rx_bd *rx_buf = &tpa_info->first_buf;
504         u8 pad = tpa_info->placement_offset;
505         u16 len = tpa_info->len_on_bd;
506         struct sk_buff *skb = NULL;
507         u8 *new_data, *data = rx_buf->data;
508         u8 old_tpa_state = tpa_info->tpa_state;
509
510         tpa_info->tpa_state = BNX2X_TPA_STOP;
511
512         /* If we there was an error during the handling of the TPA_START -
513          * drop this aggregation.
514          */
515         if (old_tpa_state == BNX2X_TPA_ERROR)
516                 goto drop;
517
518         /* Try to allocate the new data */
519         new_data = kmalloc(fp->rx_buf_size + NET_SKB_PAD, GFP_ATOMIC);
520
521         /* Unmap skb in the pool anyway, as we are going to change
522            pool entry status to BNX2X_TPA_STOP even if new skb allocation
523            fails. */
524         dma_unmap_single(&bp->pdev->dev, dma_unmap_addr(rx_buf, mapping),
525                          fp->rx_buf_size, DMA_FROM_DEVICE);
526         if (likely(new_data))
527                 skb = build_skb(data);
528
529         if (likely(skb)) {
530 #ifdef BNX2X_STOP_ON_ERROR
531                 if (pad + len > fp->rx_buf_size) {
532                         BNX2X_ERR("skb_put is about to fail...  pad %d  len %d  rx_buf_size %d\n",
533                                   pad, len, fp->rx_buf_size);
534                         bnx2x_panic();
535                         return;
536                 }
537 #endif
538
539                 skb_reserve(skb, pad + NET_SKB_PAD);
540                 skb_put(skb, len);
541                 skb->rxhash = tpa_info->rxhash;
542
543                 skb->protocol = eth_type_trans(skb, bp->dev);
544                 skb->ip_summed = CHECKSUM_UNNECESSARY;
545
546                 if (!bnx2x_fill_frag_skb(bp, fp, tpa_info, pages,
547                                          skb, cqe, cqe_idx)) {
548                         if (tpa_info->parsing_flags & PARSING_FLAGS_VLAN)
549                                 __vlan_hwaccel_put_tag(skb, tpa_info->vlan_tag);
550                         napi_gro_receive(&fp->napi, skb);
551                 } else {
552                         DP(NETIF_MSG_RX_STATUS,
553                            "Failed to allocate new pages - dropping packet!\n");
554                         dev_kfree_skb_any(skb);
555                 }
556
557
558                 /* put new data in bin */
559                 rx_buf->data = new_data;
560
561                 return;
562         }
563         kfree(new_data);
564 drop:
565         /* drop the packet and keep the buffer in the bin */
566         DP(NETIF_MSG_RX_STATUS,
567            "Failed to allocate or map a new skb - dropping packet!\n");
568         fp->eth_q_stats.rx_skb_alloc_failed++;
569 }
570
571
572 int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget)
573 {
574         struct bnx2x *bp = fp->bp;
575         u16 bd_cons, bd_prod, bd_prod_fw, comp_ring_cons;
576         u16 hw_comp_cons, sw_comp_cons, sw_comp_prod;
577         int rx_pkt = 0;
578
579 #ifdef BNX2X_STOP_ON_ERROR
580         if (unlikely(bp->panic))
581                 return 0;
582 #endif
583
584         /* CQ "next element" is of the size of the regular element,
585            that's why it's ok here */
586         hw_comp_cons = le16_to_cpu(*fp->rx_cons_sb);
587         if ((hw_comp_cons & MAX_RCQ_DESC_CNT) == MAX_RCQ_DESC_CNT)
588                 hw_comp_cons++;
589
590         bd_cons = fp->rx_bd_cons;
591         bd_prod = fp->rx_bd_prod;
592         bd_prod_fw = bd_prod;
593         sw_comp_cons = fp->rx_comp_cons;
594         sw_comp_prod = fp->rx_comp_prod;
595
596         /* Memory barrier necessary as speculative reads of the rx
597          * buffer can be ahead of the index in the status block
598          */
599         rmb();
600
601         DP(NETIF_MSG_RX_STATUS,
602            "queue[%d]:  hw_comp_cons %u  sw_comp_cons %u\n",
603            fp->index, hw_comp_cons, sw_comp_cons);
604
605         while (sw_comp_cons != hw_comp_cons) {
606                 struct sw_rx_bd *rx_buf = NULL;
607                 struct sk_buff *skb;
608                 union eth_rx_cqe *cqe;
609                 struct eth_fast_path_rx_cqe *cqe_fp;
610                 u8 cqe_fp_flags;
611                 enum eth_rx_cqe_type cqe_fp_type;
612                 u16 len, pad, queue;
613                 u8 *data;
614
615 #ifdef BNX2X_STOP_ON_ERROR
616                 if (unlikely(bp->panic))
617                         return 0;
618 #endif
619
620                 comp_ring_cons = RCQ_BD(sw_comp_cons);
621                 bd_prod = RX_BD(bd_prod);
622                 bd_cons = RX_BD(bd_cons);
623
624                 cqe = &fp->rx_comp_ring[comp_ring_cons];
625                 cqe_fp = &cqe->fast_path_cqe;
626                 cqe_fp_flags = cqe_fp->type_error_flags;
627                 cqe_fp_type = cqe_fp_flags & ETH_FAST_PATH_RX_CQE_TYPE;
628
629                 DP(NETIF_MSG_RX_STATUS,
630                    "CQE type %x  err %x  status %x  queue %x  vlan %x  len %u\n",
631                    CQE_TYPE(cqe_fp_flags),
632                    cqe_fp_flags, cqe_fp->status_flags,
633                    le32_to_cpu(cqe_fp->rss_hash_result),
634                    le16_to_cpu(cqe_fp->vlan_tag),
635                    le16_to_cpu(cqe_fp->pkt_len_or_gro_seg_len));
636
637                 /* is this a slowpath msg? */
638                 if (unlikely(CQE_TYPE_SLOW(cqe_fp_type))) {
639                         bnx2x_sp_event(fp, cqe);
640                         goto next_cqe;
641                 }
642
643                 rx_buf = &fp->rx_buf_ring[bd_cons];
644                 data = rx_buf->data;
645
646                 if (!CQE_TYPE_FAST(cqe_fp_type)) {
647                         struct bnx2x_agg_info *tpa_info;
648                         u16 frag_size, pages;
649 #ifdef BNX2X_STOP_ON_ERROR
650                         /* sanity check */
651                         if (fp->disable_tpa &&
652                             (CQE_TYPE_START(cqe_fp_type) ||
653                              CQE_TYPE_STOP(cqe_fp_type)))
654                                 BNX2X_ERR("START/STOP packet while disable_tpa type %x\n",
655                                           CQE_TYPE(cqe_fp_type));
656 #endif
657
658                         if (CQE_TYPE_START(cqe_fp_type)) {
659                                 u16 queue = cqe_fp->queue_index;
660                                 DP(NETIF_MSG_RX_STATUS,
661                                    "calling tpa_start on queue %d\n",
662                                    queue);
663
664                                 bnx2x_tpa_start(fp, queue,
665                                                 bd_cons, bd_prod,
666                                                 cqe_fp);
667
668                                 goto next_rx;
669
670                         }
671                         queue = cqe->end_agg_cqe.queue_index;
672                         tpa_info = &fp->tpa_info[queue];
673                         DP(NETIF_MSG_RX_STATUS,
674                            "calling tpa_stop on queue %d\n",
675                            queue);
676
677                         frag_size = le16_to_cpu(cqe->end_agg_cqe.pkt_len) -
678                                     tpa_info->len_on_bd;
679
680                         if (fp->mode == TPA_MODE_GRO)
681                                 pages = (frag_size + tpa_info->full_page - 1) /
682                                          tpa_info->full_page;
683                         else
684                                 pages = SGE_PAGE_ALIGN(frag_size) >>
685                                         SGE_PAGE_SHIFT;
686
687                         bnx2x_tpa_stop(bp, fp, tpa_info, pages,
688                                        &cqe->end_agg_cqe, comp_ring_cons);
689 #ifdef BNX2X_STOP_ON_ERROR
690                         if (bp->panic)
691                                 return 0;
692 #endif
693
694                         bnx2x_update_sge_prod(fp, pages, &cqe->end_agg_cqe);
695                         goto next_cqe;
696                 }
697                 /* non TPA */
698                 len = le16_to_cpu(cqe_fp->pkt_len_or_gro_seg_len);
699                 pad = cqe_fp->placement_offset;
700                 dma_sync_single_for_cpu(&bp->pdev->dev,
701                                         dma_unmap_addr(rx_buf, mapping),
702                                         pad + RX_COPY_THRESH,
703                                         DMA_FROM_DEVICE);
704                 pad += NET_SKB_PAD;
705                 prefetch(data + pad); /* speedup eth_type_trans() */
706                 /* is this an error packet? */
707                 if (unlikely(cqe_fp_flags & ETH_RX_ERROR_FALGS)) {
708                         DP(NETIF_MSG_RX_ERR | NETIF_MSG_RX_STATUS,
709                            "ERROR  flags %x  rx packet %u\n",
710                            cqe_fp_flags, sw_comp_cons);
711                         fp->eth_q_stats.rx_err_discard_pkt++;
712                         goto reuse_rx;
713                 }
714
715                 /* Since we don't have a jumbo ring
716                  * copy small packets if mtu > 1500
717                  */
718                 if ((bp->dev->mtu > ETH_MAX_PACKET_SIZE) &&
719                     (len <= RX_COPY_THRESH)) {
720                         skb = netdev_alloc_skb_ip_align(bp->dev, len);
721                         if (skb == NULL) {
722                                 DP(NETIF_MSG_RX_ERR | NETIF_MSG_RX_STATUS,
723                                    "ERROR  packet dropped because of alloc failure\n");
724                                 fp->eth_q_stats.rx_skb_alloc_failed++;
725                                 goto reuse_rx;
726                         }
727                         memcpy(skb->data, data + pad, len);
728                         bnx2x_reuse_rx_data(fp, bd_cons, bd_prod);
729                 } else {
730                         if (likely(bnx2x_alloc_rx_data(bp, fp, bd_prod) == 0)) {
731                                 dma_unmap_single(&bp->pdev->dev,
732                                                  dma_unmap_addr(rx_buf, mapping),
733                                                  fp->rx_buf_size,
734                                                  DMA_FROM_DEVICE);
735                                 skb = build_skb(data);
736                                 if (unlikely(!skb)) {
737                                         kfree(data);
738                                         fp->eth_q_stats.rx_skb_alloc_failed++;
739                                         goto next_rx;
740                                 }
741                                 skb_reserve(skb, pad);
742                         } else {
743                                 DP(NETIF_MSG_RX_ERR | NETIF_MSG_RX_STATUS,
744                                    "ERROR  packet dropped because of alloc failure\n");
745                                 fp->eth_q_stats.rx_skb_alloc_failed++;
746 reuse_rx:
747                                 bnx2x_reuse_rx_data(fp, bd_cons, bd_prod);
748                                 goto next_rx;
749                         }
750                 }
751
752                 skb_put(skb, len);
753                 skb->protocol = eth_type_trans(skb, bp->dev);
754
755                 /* Set Toeplitz hash for a none-LRO skb */
756                 skb->rxhash = bnx2x_get_rxhash(bp, cqe_fp);
757
758                 skb_checksum_none_assert(skb);
759
760                 if (bp->dev->features & NETIF_F_RXCSUM) {
761
762                         if (likely(BNX2X_RX_CSUM_OK(cqe)))
763                                 skb->ip_summed = CHECKSUM_UNNECESSARY;
764                         else
765                                 fp->eth_q_stats.hw_csum_err++;
766                 }
767
768                 skb_record_rx_queue(skb, fp->rx_queue);
769
770                 if (le16_to_cpu(cqe_fp->pars_flags.flags) &
771                     PARSING_FLAGS_VLAN)
772                         __vlan_hwaccel_put_tag(skb,
773                                                le16_to_cpu(cqe_fp->vlan_tag));
774                 napi_gro_receive(&fp->napi, skb);
775
776
777 next_rx:
778                 rx_buf->data = NULL;
779
780                 bd_cons = NEXT_RX_IDX(bd_cons);
781                 bd_prod = NEXT_RX_IDX(bd_prod);
782                 bd_prod_fw = NEXT_RX_IDX(bd_prod_fw);
783                 rx_pkt++;
784 next_cqe:
785                 sw_comp_prod = NEXT_RCQ_IDX(sw_comp_prod);
786                 sw_comp_cons = NEXT_RCQ_IDX(sw_comp_cons);
787
788                 if (rx_pkt == budget)
789                         break;
790         } /* while */
791
792         fp->rx_bd_cons = bd_cons;
793         fp->rx_bd_prod = bd_prod_fw;
794         fp->rx_comp_cons = sw_comp_cons;
795         fp->rx_comp_prod = sw_comp_prod;
796
797         /* Update producers */
798         bnx2x_update_rx_prod(bp, fp, bd_prod_fw, sw_comp_prod,
799                              fp->rx_sge_prod);
800
801         fp->rx_pkt += rx_pkt;
802         fp->rx_calls++;
803
804         return rx_pkt;
805 }
806
807 static irqreturn_t bnx2x_msix_fp_int(int irq, void *fp_cookie)
808 {
809         struct bnx2x_fastpath *fp = fp_cookie;
810         struct bnx2x *bp = fp->bp;
811         u8 cos;
812
813         DP(NETIF_MSG_INTR,
814            "got an MSI-X interrupt on IDX:SB [fp %d fw_sd %d igusb %d]\n",
815            fp->index, fp->fw_sb_id, fp->igu_sb_id);
816         bnx2x_ack_sb(bp, fp->igu_sb_id, USTORM_ID, 0, IGU_INT_DISABLE, 0);
817
818 #ifdef BNX2X_STOP_ON_ERROR
819         if (unlikely(bp->panic))
820                 return IRQ_HANDLED;
821 #endif
822
823         /* Handle Rx and Tx according to MSI-X vector */
824         prefetch(fp->rx_cons_sb);
825
826         for_each_cos_in_tx_queue(fp, cos)
827                 prefetch(fp->txdata[cos].tx_cons_sb);
828
829         prefetch(&fp->sb_running_index[SM_RX_ID]);
830         napi_schedule(&bnx2x_fp(bp, fp->index, napi));
831
832         return IRQ_HANDLED;
833 }
834
835 /* HW Lock for shared dual port PHYs */
836 void bnx2x_acquire_phy_lock(struct bnx2x *bp)
837 {
838         mutex_lock(&bp->port.phy_mutex);
839
840         if (bp->port.need_hw_lock)
841                 bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_MDIO);
842 }
843
844 void bnx2x_release_phy_lock(struct bnx2x *bp)
845 {
846         if (bp->port.need_hw_lock)
847                 bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_MDIO);
848
849         mutex_unlock(&bp->port.phy_mutex);
850 }
851
852 /* calculates MF speed according to current linespeed and MF configuration */
853 u16 bnx2x_get_mf_speed(struct bnx2x *bp)
854 {
855         u16 line_speed = bp->link_vars.line_speed;
856         if (IS_MF(bp)) {
857                 u16 maxCfg = bnx2x_extract_max_cfg(bp,
858                                                    bp->mf_config[BP_VN(bp)]);
859
860                 /* Calculate the current MAX line speed limit for the MF
861                  * devices
862                  */
863                 if (IS_MF_SI(bp))
864                         line_speed = (line_speed * maxCfg) / 100;
865                 else { /* SD mode */
866                         u16 vn_max_rate = maxCfg * 100;
867
868                         if (vn_max_rate < line_speed)
869                                 line_speed = vn_max_rate;
870                 }
871         }
872
873         return line_speed;
874 }
875
876 /**
877  * bnx2x_fill_report_data - fill link report data to report
878  *
879  * @bp:         driver handle
880  * @data:       link state to update
881  *
882  * It uses a none-atomic bit operations because is called under the mutex.
883  */
884 static inline void bnx2x_fill_report_data(struct bnx2x *bp,
885                                           struct bnx2x_link_report_data *data)
886 {
887         u16 line_speed = bnx2x_get_mf_speed(bp);
888
889         memset(data, 0, sizeof(*data));
890
891         /* Fill the report data: efective line speed */
892         data->line_speed = line_speed;
893
894         /* Link is down */
895         if (!bp->link_vars.link_up || (bp->flags & MF_FUNC_DIS))
896                 __set_bit(BNX2X_LINK_REPORT_LINK_DOWN,
897                           &data->link_report_flags);
898
899         /* Full DUPLEX */
900         if (bp->link_vars.duplex == DUPLEX_FULL)
901                 __set_bit(BNX2X_LINK_REPORT_FD, &data->link_report_flags);
902
903         /* Rx Flow Control is ON */
904         if (bp->link_vars.flow_ctrl & BNX2X_FLOW_CTRL_RX)
905                 __set_bit(BNX2X_LINK_REPORT_RX_FC_ON, &data->link_report_flags);
906
907         /* Tx Flow Control is ON */
908         if (bp->link_vars.flow_ctrl & BNX2X_FLOW_CTRL_TX)
909                 __set_bit(BNX2X_LINK_REPORT_TX_FC_ON, &data->link_report_flags);
910 }
911
912 /**
913  * bnx2x_link_report - report link status to OS.
914  *
915  * @bp:         driver handle
916  *
917  * Calls the __bnx2x_link_report() under the same locking scheme
918  * as a link/PHY state managing code to ensure a consistent link
919  * reporting.
920  */
921
922 void bnx2x_link_report(struct bnx2x *bp)
923 {
924         bnx2x_acquire_phy_lock(bp);
925         __bnx2x_link_report(bp);
926         bnx2x_release_phy_lock(bp);
927 }
928
929 /**
930  * __bnx2x_link_report - report link status to OS.
931  *
932  * @bp:         driver handle
933  *
934  * None atomic inmlementation.
935  * Should be called under the phy_lock.
936  */
937 void __bnx2x_link_report(struct bnx2x *bp)
938 {
939         struct bnx2x_link_report_data cur_data;
940
941         /* reread mf_cfg */
942         if (!CHIP_IS_E1(bp))
943                 bnx2x_read_mf_cfg(bp);
944
945         /* Read the current link report info */
946         bnx2x_fill_report_data(bp, &cur_data);
947
948         /* Don't report link down or exactly the same link status twice */
949         if (!memcmp(&cur_data, &bp->last_reported_link, sizeof(cur_data)) ||
950             (test_bit(BNX2X_LINK_REPORT_LINK_DOWN,
951                       &bp->last_reported_link.link_report_flags) &&
952              test_bit(BNX2X_LINK_REPORT_LINK_DOWN,
953                       &cur_data.link_report_flags)))
954                 return;
955
956         bp->link_cnt++;
957
958         /* We are going to report a new link parameters now -
959          * remember the current data for the next time.
960          */
961         memcpy(&bp->last_reported_link, &cur_data, sizeof(cur_data));
962
963         if (test_bit(BNX2X_LINK_REPORT_LINK_DOWN,
964                      &cur_data.link_report_flags)) {
965                 netif_carrier_off(bp->dev);
966                 netdev_err(bp->dev, "NIC Link is Down\n");
967                 return;
968         } else {
969                 const char *duplex;
970                 const char *flow;
971
972                 netif_carrier_on(bp->dev);
973
974                 if (test_and_clear_bit(BNX2X_LINK_REPORT_FD,
975                                        &cur_data.link_report_flags))
976                         duplex = "full";
977                 else
978                         duplex = "half";
979
980                 /* Handle the FC at the end so that only these flags would be
981                  * possibly set. This way we may easily check if there is no FC
982                  * enabled.
983                  */
984                 if (cur_data.link_report_flags) {
985                         if (test_bit(BNX2X_LINK_REPORT_RX_FC_ON,
986                                      &cur_data.link_report_flags)) {
987                                 if (test_bit(BNX2X_LINK_REPORT_TX_FC_ON,
988                                      &cur_data.link_report_flags))
989                                         flow = "ON - receive & transmit";
990                                 else
991                                         flow = "ON - receive";
992                         } else {
993                                 flow = "ON - transmit";
994                         }
995                 } else {
996                         flow = "none";
997                 }
998                 netdev_info(bp->dev, "NIC Link is Up, %d Mbps %s duplex, Flow control: %s\n",
999                             cur_data.line_speed, duplex, flow);
1000         }
1001 }
1002
1003 void bnx2x_init_rx_rings(struct bnx2x *bp)
1004 {
1005         int func = BP_FUNC(bp);
1006         u16 ring_prod;
1007         int i, j;
1008
1009         /* Allocate TPA resources */
1010         for_each_rx_queue(bp, j) {
1011                 struct bnx2x_fastpath *fp = &bp->fp[j];
1012
1013                 DP(NETIF_MSG_IFUP,
1014                    "mtu %d  rx_buf_size %d\n", bp->dev->mtu, fp->rx_buf_size);
1015
1016                 if (!fp->disable_tpa) {
1017                         /* Fill the per-aggregtion pool */
1018                         for (i = 0; i < MAX_AGG_QS(bp); i++) {
1019                                 struct bnx2x_agg_info *tpa_info =
1020                                         &fp->tpa_info[i];
1021                                 struct sw_rx_bd *first_buf =
1022                                         &tpa_info->first_buf;
1023
1024                                 first_buf->data = kmalloc(fp->rx_buf_size + NET_SKB_PAD,
1025                                                           GFP_ATOMIC);
1026                                 if (!first_buf->data) {
1027                                         BNX2X_ERR("Failed to allocate TPA skb pool for queue[%d] - disabling TPA on this queue!\n",
1028                                                   j);
1029                                         bnx2x_free_tpa_pool(bp, fp, i);
1030                                         fp->disable_tpa = 1;
1031                                         break;
1032                                 }
1033                                 dma_unmap_addr_set(first_buf, mapping, 0);
1034                                 tpa_info->tpa_state = BNX2X_TPA_STOP;
1035                         }
1036
1037                         /* "next page" elements initialization */
1038                         bnx2x_set_next_page_sgl(fp);
1039
1040                         /* set SGEs bit mask */
1041                         bnx2x_init_sge_ring_bit_mask(fp);
1042
1043                         /* Allocate SGEs and initialize the ring elements */
1044                         for (i = 0, ring_prod = 0;
1045                              i < MAX_RX_SGE_CNT*NUM_RX_SGE_PAGES; i++) {
1046
1047                                 if (bnx2x_alloc_rx_sge(bp, fp, ring_prod) < 0) {
1048                                         BNX2X_ERR("was only able to allocate %d rx sges\n",
1049                                                   i);
1050                                         BNX2X_ERR("disabling TPA for queue[%d]\n",
1051                                                   j);
1052                                         /* Cleanup already allocated elements */
1053                                         bnx2x_free_rx_sge_range(bp, fp,
1054                                                                 ring_prod);
1055                                         bnx2x_free_tpa_pool(bp, fp,
1056                                                             MAX_AGG_QS(bp));
1057                                         fp->disable_tpa = 1;
1058                                         ring_prod = 0;
1059                                         break;
1060                                 }
1061                                 ring_prod = NEXT_SGE_IDX(ring_prod);
1062                         }
1063
1064                         fp->rx_sge_prod = ring_prod;
1065                 }
1066         }
1067
1068         for_each_rx_queue(bp, j) {
1069                 struct bnx2x_fastpath *fp = &bp->fp[j];
1070
1071                 fp->rx_bd_cons = 0;
1072
1073                 /* Activate BD ring */
1074                 /* Warning!
1075                  * this will generate an interrupt (to the TSTORM)
1076                  * must only be done after chip is initialized
1077                  */
1078                 bnx2x_update_rx_prod(bp, fp, fp->rx_bd_prod, fp->rx_comp_prod,
1079                                      fp->rx_sge_prod);
1080
1081                 if (j != 0)
1082                         continue;
1083
1084                 if (CHIP_IS_E1(bp)) {
1085                         REG_WR(bp, BAR_USTRORM_INTMEM +
1086                                USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(func),
1087                                U64_LO(fp->rx_comp_mapping));
1088                         REG_WR(bp, BAR_USTRORM_INTMEM +
1089                                USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(func) + 4,
1090                                U64_HI(fp->rx_comp_mapping));
1091                 }
1092         }
1093 }
1094
1095 static void bnx2x_free_tx_skbs(struct bnx2x *bp)
1096 {
1097         int i;
1098         u8 cos;
1099
1100         for_each_tx_queue(bp, i) {
1101                 struct bnx2x_fastpath *fp = &bp->fp[i];
1102                 for_each_cos_in_tx_queue(fp, cos) {
1103                         struct bnx2x_fp_txdata *txdata = &fp->txdata[cos];
1104                         unsigned pkts_compl = 0, bytes_compl = 0;
1105
1106                         u16 sw_prod = txdata->tx_pkt_prod;
1107                         u16 sw_cons = txdata->tx_pkt_cons;
1108
1109                         while (sw_cons != sw_prod) {
1110                                 bnx2x_free_tx_pkt(bp, txdata, TX_BD(sw_cons),
1111                                     &pkts_compl, &bytes_compl);
1112                                 sw_cons++;
1113                         }
1114                         netdev_tx_reset_queue(
1115                             netdev_get_tx_queue(bp->dev, txdata->txq_index));
1116                 }
1117         }
1118 }
1119
1120 static void bnx2x_free_rx_bds(struct bnx2x_fastpath *fp)
1121 {
1122         struct bnx2x *bp = fp->bp;
1123         int i;
1124
1125         /* ring wasn't allocated */
1126         if (fp->rx_buf_ring == NULL)
1127                 return;
1128
1129         for (i = 0; i < NUM_RX_BD; i++) {
1130                 struct sw_rx_bd *rx_buf = &fp->rx_buf_ring[i];
1131                 u8 *data = rx_buf->data;
1132
1133                 if (data == NULL)
1134                         continue;
1135                 dma_unmap_single(&bp->pdev->dev,
1136                                  dma_unmap_addr(rx_buf, mapping),
1137                                  fp->rx_buf_size, DMA_FROM_DEVICE);
1138
1139                 rx_buf->data = NULL;
1140                 kfree(data);
1141         }
1142 }
1143
1144 static void bnx2x_free_rx_skbs(struct bnx2x *bp)
1145 {
1146         int j;
1147
1148         for_each_rx_queue(bp, j) {
1149                 struct bnx2x_fastpath *fp = &bp->fp[j];
1150
1151                 bnx2x_free_rx_bds(fp);
1152
1153                 if (!fp->disable_tpa)
1154                         bnx2x_free_tpa_pool(bp, fp, MAX_AGG_QS(bp));
1155         }
1156 }
1157
1158 void bnx2x_free_skbs(struct bnx2x *bp)
1159 {
1160         bnx2x_free_tx_skbs(bp);
1161         bnx2x_free_rx_skbs(bp);
1162 }
1163
1164 void bnx2x_update_max_mf_config(struct bnx2x *bp, u32 value)
1165 {
1166         /* load old values */
1167         u32 mf_cfg = bp->mf_config[BP_VN(bp)];
1168
1169         if (value != bnx2x_extract_max_cfg(bp, mf_cfg)) {
1170                 /* leave all but MAX value */
1171                 mf_cfg &= ~FUNC_MF_CFG_MAX_BW_MASK;
1172
1173                 /* set new MAX value */
1174                 mf_cfg |= (value << FUNC_MF_CFG_MAX_BW_SHIFT)
1175                                 & FUNC_MF_CFG_MAX_BW_MASK;
1176
1177                 bnx2x_fw_command(bp, DRV_MSG_CODE_SET_MF_BW, mf_cfg);
1178         }
1179 }
1180
1181 /**
1182  * bnx2x_free_msix_irqs - free previously requested MSI-X IRQ vectors
1183  *
1184  * @bp:         driver handle
1185  * @nvecs:      number of vectors to be released
1186  */
1187 static void bnx2x_free_msix_irqs(struct bnx2x *bp, int nvecs)
1188 {
1189         int i, offset = 0;
1190
1191         if (nvecs == offset)
1192                 return;
1193         free_irq(bp->msix_table[offset].vector, bp->dev);
1194         DP(NETIF_MSG_IFDOWN, "released sp irq (%d)\n",
1195            bp->msix_table[offset].vector);
1196         offset++;
1197 #ifdef BCM_CNIC
1198         if (nvecs == offset)
1199                 return;
1200         offset++;
1201 #endif
1202
1203         for_each_eth_queue(bp, i) {
1204                 if (nvecs == offset)
1205                         return;
1206                 DP(NETIF_MSG_IFDOWN, "about to release fp #%d->%d irq\n",
1207                    i, bp->msix_table[offset].vector);
1208
1209                 free_irq(bp->msix_table[offset++].vector, &bp->fp[i]);
1210         }
1211 }
1212
1213 void bnx2x_free_irq(struct bnx2x *bp)
1214 {
1215         if (bp->flags & USING_MSIX_FLAG)
1216                 bnx2x_free_msix_irqs(bp, BNX2X_NUM_ETH_QUEUES(bp) +
1217                                      CNIC_PRESENT + 1);
1218         else if (bp->flags & USING_MSI_FLAG)
1219                 free_irq(bp->pdev->irq, bp->dev);
1220         else
1221                 free_irq(bp->pdev->irq, bp->dev);
1222 }
1223
1224 int bnx2x_enable_msix(struct bnx2x *bp)
1225 {
1226         int msix_vec = 0, i, rc, req_cnt;
1227
1228         bp->msix_table[msix_vec].entry = msix_vec;
1229         BNX2X_DEV_INFO("msix_table[0].entry = %d (slowpath)\n",
1230            bp->msix_table[0].entry);
1231         msix_vec++;
1232
1233 #ifdef BCM_CNIC
1234         bp->msix_table[msix_vec].entry = msix_vec;
1235         BNX2X_DEV_INFO("msix_table[%d].entry = %d (CNIC)\n",
1236            bp->msix_table[msix_vec].entry, bp->msix_table[msix_vec].entry);
1237         msix_vec++;
1238 #endif
1239         /* We need separate vectors for ETH queues only (not FCoE) */
1240         for_each_eth_queue(bp, i) {
1241                 bp->msix_table[msix_vec].entry = msix_vec;
1242                 BNX2X_DEV_INFO("msix_table[%d].entry = %d (fastpath #%u)\n",
1243                                msix_vec, msix_vec, i);
1244                 msix_vec++;
1245         }
1246
1247         req_cnt = BNX2X_NUM_ETH_QUEUES(bp) + CNIC_PRESENT + 1;
1248
1249         rc = pci_enable_msix(bp->pdev, &bp->msix_table[0], req_cnt);
1250
1251         /*
1252          * reconfigure number of tx/rx queues according to available
1253          * MSI-X vectors
1254          */
1255         if (rc >= BNX2X_MIN_MSIX_VEC_CNT) {
1256                 /* how less vectors we will have? */
1257                 int diff = req_cnt - rc;
1258
1259                 BNX2X_DEV_INFO("Trying to use less MSI-X vectors: %d\n", rc);
1260
1261                 rc = pci_enable_msix(bp->pdev, &bp->msix_table[0], rc);
1262
1263                 if (rc) {
1264                         BNX2X_DEV_INFO("MSI-X is not attainable  rc %d\n", rc);
1265                         return rc;
1266                 }
1267                 /*
1268                  * decrease number of queues by number of unallocated entries
1269                  */
1270                 bp->num_queues -= diff;
1271
1272                 BNX2X_DEV_INFO("New queue configuration set: %d\n",
1273                                   bp->num_queues);
1274         } else if (rc) {
1275                 /* fall to INTx if not enough memory */
1276                 if (rc == -ENOMEM)
1277                         bp->flags |= DISABLE_MSI_FLAG;
1278                 BNX2X_DEV_INFO("MSI-X is not attainable  rc %d\n", rc);
1279                 return rc;
1280         }
1281
1282         bp->flags |= USING_MSIX_FLAG;
1283
1284         return 0;
1285 }
1286
1287 static int bnx2x_req_msix_irqs(struct bnx2x *bp)
1288 {
1289         int i, rc, offset = 0;
1290
1291         rc = request_irq(bp->msix_table[offset++].vector,
1292                          bnx2x_msix_sp_int, 0,
1293                          bp->dev->name, bp->dev);
1294         if (rc) {
1295                 BNX2X_ERR("request sp irq failed\n");
1296                 return -EBUSY;
1297         }
1298
1299 #ifdef BCM_CNIC
1300         offset++;
1301 #endif
1302         for_each_eth_queue(bp, i) {
1303                 struct bnx2x_fastpath *fp = &bp->fp[i];
1304                 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
1305                          bp->dev->name, i);
1306
1307                 rc = request_irq(bp->msix_table[offset].vector,
1308                                  bnx2x_msix_fp_int, 0, fp->name, fp);
1309                 if (rc) {
1310                         BNX2X_ERR("request fp #%d irq (%d) failed  rc %d\n", i,
1311                               bp->msix_table[offset].vector, rc);
1312                         bnx2x_free_msix_irqs(bp, offset);
1313                         return -EBUSY;
1314                 }
1315
1316                 offset++;
1317         }
1318
1319         i = BNX2X_NUM_ETH_QUEUES(bp);
1320         offset = 1 + CNIC_PRESENT;
1321         netdev_info(bp->dev, "using MSI-X  IRQs: sp %d  fp[%d] %d ... fp[%d] %d\n",
1322                bp->msix_table[0].vector,
1323                0, bp->msix_table[offset].vector,
1324                i - 1, bp->msix_table[offset + i - 1].vector);
1325
1326         return 0;
1327 }
1328
1329 int bnx2x_enable_msi(struct bnx2x *bp)
1330 {
1331         int rc;
1332
1333         rc = pci_enable_msi(bp->pdev);
1334         if (rc) {
1335                 BNX2X_DEV_INFO("MSI is not attainable\n");
1336                 return -1;
1337         }
1338         bp->flags |= USING_MSI_FLAG;
1339
1340         return 0;
1341 }
1342
1343 static int bnx2x_req_irq(struct bnx2x *bp)
1344 {
1345         unsigned long flags;
1346         int rc;
1347
1348         if (bp->flags & USING_MSI_FLAG)
1349                 flags = 0;
1350         else
1351                 flags = IRQF_SHARED;
1352
1353         rc = request_irq(bp->pdev->irq, bnx2x_interrupt, flags,
1354                          bp->dev->name, bp->dev);
1355         return rc;
1356 }
1357
1358 static inline int bnx2x_setup_irqs(struct bnx2x *bp)
1359 {
1360         int rc = 0;
1361         if (bp->flags & USING_MSIX_FLAG) {
1362                 rc = bnx2x_req_msix_irqs(bp);
1363                 if (rc)
1364                         return rc;
1365         } else {
1366                 bnx2x_ack_int(bp);
1367                 rc = bnx2x_req_irq(bp);
1368                 if (rc) {
1369                         BNX2X_ERR("IRQ request failed  rc %d, aborting\n", rc);
1370                         return rc;
1371                 }
1372                 if (bp->flags & USING_MSI_FLAG) {
1373                         bp->dev->irq = bp->pdev->irq;
1374                         netdev_info(bp->dev, "using MSI  IRQ %d\n",
1375                                bp->pdev->irq);
1376                 }
1377         }
1378
1379         return 0;
1380 }
1381
1382 static inline void bnx2x_napi_enable(struct bnx2x *bp)
1383 {
1384         int i;
1385
1386         for_each_rx_queue(bp, i)
1387                 napi_enable(&bnx2x_fp(bp, i, napi));
1388 }
1389
1390 static inline void bnx2x_napi_disable(struct bnx2x *bp)
1391 {
1392         int i;
1393
1394         for_each_rx_queue(bp, i)
1395                 napi_disable(&bnx2x_fp(bp, i, napi));
1396 }
1397
1398 void bnx2x_netif_start(struct bnx2x *bp)
1399 {
1400         if (netif_running(bp->dev)) {
1401                 bnx2x_napi_enable(bp);
1402                 bnx2x_int_enable(bp);
1403                 if (bp->state == BNX2X_STATE_OPEN)
1404                         netif_tx_wake_all_queues(bp->dev);
1405         }
1406 }
1407
1408 void bnx2x_netif_stop(struct bnx2x *bp, int disable_hw)
1409 {
1410         bnx2x_int_disable_sync(bp, disable_hw);
1411         bnx2x_napi_disable(bp);
1412 }
1413
1414 u16 bnx2x_select_queue(struct net_device *dev, struct sk_buff *skb)
1415 {
1416         struct bnx2x *bp = netdev_priv(dev);
1417
1418 #ifdef BCM_CNIC
1419         if (!NO_FCOE(bp)) {
1420                 struct ethhdr *hdr = (struct ethhdr *)skb->data;
1421                 u16 ether_type = ntohs(hdr->h_proto);
1422
1423                 /* Skip VLAN tag if present */
1424                 if (ether_type == ETH_P_8021Q) {
1425                         struct vlan_ethhdr *vhdr =
1426                                 (struct vlan_ethhdr *)skb->data;
1427
1428                         ether_type = ntohs(vhdr->h_vlan_encapsulated_proto);
1429                 }
1430
1431                 /* If ethertype is FCoE or FIP - use FCoE ring */
1432                 if ((ether_type == ETH_P_FCOE) || (ether_type == ETH_P_FIP))
1433                         return bnx2x_fcoe_tx(bp, txq_index);
1434         }
1435 #endif
1436         /* select a non-FCoE queue */
1437         return __skb_tx_hash(dev, skb, BNX2X_NUM_ETH_QUEUES(bp));
1438 }
1439
1440 void bnx2x_set_num_queues(struct bnx2x *bp)
1441 {
1442         switch (bp->multi_mode) {
1443         case ETH_RSS_MODE_DISABLED:
1444                 bp->num_queues = 1;
1445                 break;
1446         case ETH_RSS_MODE_REGULAR:
1447                 bp->num_queues = bnx2x_calc_num_queues(bp);
1448                 break;
1449
1450         default:
1451                 bp->num_queues = 1;
1452                 break;
1453         }
1454
1455 #ifdef BCM_CNIC
1456         /* override in STORAGE SD mode */
1457         if (IS_MF_STORAGE_SD(bp))
1458                 bp->num_queues = 1;
1459 #endif
1460         /* Add special queues */
1461         bp->num_queues += NON_ETH_CONTEXT_USE;
1462 }
1463
1464 /**
1465  * bnx2x_set_real_num_queues - configure netdev->real_num_[tx,rx]_queues
1466  *
1467  * @bp:         Driver handle
1468  *
1469  * We currently support for at most 16 Tx queues for each CoS thus we will
1470  * allocate a multiple of 16 for ETH L2 rings according to the value of the
1471  * bp->max_cos.
1472  *
1473  * If there is an FCoE L2 queue the appropriate Tx queue will have the next
1474  * index after all ETH L2 indices.
1475  *
1476  * If the actual number of Tx queues (for each CoS) is less than 16 then there
1477  * will be the holes at the end of each group of 16 ETh L2 indices (0..15,
1478  * 16..31,...) with indicies that are not coupled with any real Tx queue.
1479  *
1480  * The proper configuration of skb->queue_mapping is handled by
1481  * bnx2x_select_queue() and __skb_tx_hash().
1482  *
1483  * bnx2x_setup_tc() takes care of the proper TC mappings so that __skb_tx_hash()
1484  * will return a proper Tx index if TC is enabled (netdev->num_tc > 0).
1485  */
1486 static inline int bnx2x_set_real_num_queues(struct bnx2x *bp)
1487 {
1488         int rc, tx, rx;
1489
1490         tx = MAX_TXQS_PER_COS * bp->max_cos;
1491         rx = BNX2X_NUM_ETH_QUEUES(bp);
1492
1493 /* account for fcoe queue */
1494 #ifdef BCM_CNIC
1495         if (!NO_FCOE(bp)) {
1496                 rx += FCOE_PRESENT;
1497                 tx += FCOE_PRESENT;
1498         }
1499 #endif
1500
1501         rc = netif_set_real_num_tx_queues(bp->dev, tx);
1502         if (rc) {
1503                 BNX2X_ERR("Failed to set real number of Tx queues: %d\n", rc);
1504                 return rc;
1505         }
1506         rc = netif_set_real_num_rx_queues(bp->dev, rx);
1507         if (rc) {
1508                 BNX2X_ERR("Failed to set real number of Rx queues: %d\n", rc);
1509                 return rc;
1510         }
1511
1512         DP(NETIF_MSG_IFUP, "Setting real num queues to (tx, rx) (%d, %d)\n",
1513                           tx, rx);
1514
1515         return rc;
1516 }
1517
1518 static inline void bnx2x_set_rx_buf_size(struct bnx2x *bp)
1519 {
1520         int i;
1521
1522         for_each_queue(bp, i) {
1523                 struct bnx2x_fastpath *fp = &bp->fp[i];
1524                 u32 mtu;
1525
1526                 /* Always use a mini-jumbo MTU for the FCoE L2 ring */
1527                 if (IS_FCOE_IDX(i))
1528                         /*
1529                          * Although there are no IP frames expected to arrive to
1530                          * this ring we still want to add an
1531                          * IP_HEADER_ALIGNMENT_PADDING to prevent a buffer
1532                          * overrun attack.
1533                          */
1534                         mtu = BNX2X_FCOE_MINI_JUMBO_MTU;
1535                 else
1536                         mtu = bp->dev->mtu;
1537                 fp->rx_buf_size = BNX2X_FW_RX_ALIGN_START +
1538                                   IP_HEADER_ALIGNMENT_PADDING +
1539                                   ETH_OVREHEAD +
1540                                   mtu +
1541                                   BNX2X_FW_RX_ALIGN_END;
1542                 /* Note : rx_buf_size doesnt take into account NET_SKB_PAD */
1543         }
1544 }
1545
1546 static inline int bnx2x_init_rss_pf(struct bnx2x *bp)
1547 {
1548         int i;
1549         u8 ind_table[T_ETH_INDIRECTION_TABLE_SIZE] = {0};
1550         u8 num_eth_queues = BNX2X_NUM_ETH_QUEUES(bp);
1551
1552         /*
1553          * Prepare the inital contents fo the indirection table if RSS is
1554          * enabled
1555          */
1556         if (bp->multi_mode != ETH_RSS_MODE_DISABLED) {
1557                 for (i = 0; i < sizeof(ind_table); i++)
1558                         ind_table[i] =
1559                                 bp->fp->cl_id +
1560                                 ethtool_rxfh_indir_default(i, num_eth_queues);
1561         }
1562
1563         /*
1564          * For 57710 and 57711 SEARCHER configuration (rss_keys) is
1565          * per-port, so if explicit configuration is needed , do it only
1566          * for a PMF.
1567          *
1568          * For 57712 and newer on the other hand it's a per-function
1569          * configuration.
1570          */
1571         return bnx2x_config_rss_pf(bp, ind_table,
1572                                    bp->port.pmf || !CHIP_IS_E1x(bp));
1573 }
1574
1575 int bnx2x_config_rss_pf(struct bnx2x *bp, u8 *ind_table, bool config_hash)
1576 {
1577         struct bnx2x_config_rss_params params = {NULL};
1578         int i;
1579
1580         /* Although RSS is meaningless when there is a single HW queue we
1581          * still need it enabled in order to have HW Rx hash generated.
1582          *
1583          * if (!is_eth_multi(bp))
1584          *      bp->multi_mode = ETH_RSS_MODE_DISABLED;
1585          */
1586
1587         params.rss_obj = &bp->rss_conf_obj;
1588
1589         __set_bit(RAMROD_COMP_WAIT, &params.ramrod_flags);
1590
1591         /* RSS mode */
1592         switch (bp->multi_mode) {
1593         case ETH_RSS_MODE_DISABLED:
1594                 __set_bit(BNX2X_RSS_MODE_DISABLED, &params.rss_flags);
1595                 break;
1596         case ETH_RSS_MODE_REGULAR:
1597                 __set_bit(BNX2X_RSS_MODE_REGULAR, &params.rss_flags);
1598                 break;
1599         case ETH_RSS_MODE_VLAN_PRI:
1600                 __set_bit(BNX2X_RSS_MODE_VLAN_PRI, &params.rss_flags);
1601                 break;
1602         case ETH_RSS_MODE_E1HOV_PRI:
1603                 __set_bit(BNX2X_RSS_MODE_E1HOV_PRI, &params.rss_flags);
1604                 break;
1605         case ETH_RSS_MODE_IP_DSCP:
1606                 __set_bit(BNX2X_RSS_MODE_IP_DSCP, &params.rss_flags);
1607                 break;
1608         default:
1609                 BNX2X_ERR("Unknown multi_mode: %d\n", bp->multi_mode);
1610                 return -EINVAL;
1611         }
1612
1613         /* If RSS is enabled */
1614         if (bp->multi_mode != ETH_RSS_MODE_DISABLED) {
1615                 /* RSS configuration */
1616                 __set_bit(BNX2X_RSS_IPV4, &params.rss_flags);
1617                 __set_bit(BNX2X_RSS_IPV4_TCP, &params.rss_flags);
1618                 __set_bit(BNX2X_RSS_IPV6, &params.rss_flags);
1619                 __set_bit(BNX2X_RSS_IPV6_TCP, &params.rss_flags);
1620
1621                 /* Hash bits */
1622                 params.rss_result_mask = MULTI_MASK;
1623
1624                 memcpy(params.ind_table, ind_table, sizeof(params.ind_table));
1625
1626                 if (config_hash) {
1627                         /* RSS keys */
1628                         for (i = 0; i < sizeof(params.rss_key) / 4; i++)
1629                                 params.rss_key[i] = random32();
1630
1631                         __set_bit(BNX2X_RSS_SET_SRCH, &params.rss_flags);
1632                 }
1633         }
1634
1635         return bnx2x_config_rss(bp, &params);
1636 }
1637
1638 static inline int bnx2x_init_hw(struct bnx2x *bp, u32 load_code)
1639 {
1640         struct bnx2x_func_state_params func_params = {NULL};
1641
1642         /* Prepare parameters for function state transitions */
1643         __set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags);
1644
1645         func_params.f_obj = &bp->func_obj;
1646         func_params.cmd = BNX2X_F_CMD_HW_INIT;
1647
1648         func_params.params.hw_init.load_phase = load_code;
1649
1650         return bnx2x_func_state_change(bp, &func_params);
1651 }
1652
1653 /*
1654  * Cleans the object that have internal lists without sending
1655  * ramrods. Should be run when interrutps are disabled.
1656  */
1657 static void bnx2x_squeeze_objects(struct bnx2x *bp)
1658 {
1659         int rc;
1660         unsigned long ramrod_flags = 0, vlan_mac_flags = 0;
1661         struct bnx2x_mcast_ramrod_params rparam = {NULL};
1662         struct bnx2x_vlan_mac_obj *mac_obj = &bp->fp->mac_obj;
1663
1664         /***************** Cleanup MACs' object first *************************/
1665
1666         /* Wait for completion of requested */
1667         __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
1668         /* Perform a dry cleanup */
1669         __set_bit(RAMROD_DRV_CLR_ONLY, &ramrod_flags);
1670
1671         /* Clean ETH primary MAC */
1672         __set_bit(BNX2X_ETH_MAC, &vlan_mac_flags);
1673         rc = mac_obj->delete_all(bp, &bp->fp->mac_obj, &vlan_mac_flags,
1674                                  &ramrod_flags);
1675         if (rc != 0)
1676                 BNX2X_ERR("Failed to clean ETH MACs: %d\n", rc);
1677
1678         /* Cleanup UC list */
1679         vlan_mac_flags = 0;
1680         __set_bit(BNX2X_UC_LIST_MAC, &vlan_mac_flags);
1681         rc = mac_obj->delete_all(bp, mac_obj, &vlan_mac_flags,
1682                                  &ramrod_flags);
1683         if (rc != 0)
1684                 BNX2X_ERR("Failed to clean UC list MACs: %d\n", rc);
1685
1686         /***************** Now clean mcast object *****************************/
1687         rparam.mcast_obj = &bp->mcast_obj;
1688         __set_bit(RAMROD_DRV_CLR_ONLY, &rparam.ramrod_flags);
1689
1690         /* Add a DEL command... */
1691         rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_DEL);
1692         if (rc < 0)
1693                 BNX2X_ERR("Failed to add a new DEL command to a multi-cast object: %d\n",
1694                           rc);
1695
1696         /* ...and wait until all pending commands are cleared */
1697         rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT);
1698         while (rc != 0) {
1699                 if (rc < 0) {
1700                         BNX2X_ERR("Failed to clean multi-cast object: %d\n",
1701                                   rc);
1702                         return;
1703                 }
1704
1705                 rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT);
1706         }
1707 }
1708
1709 #ifndef BNX2X_STOP_ON_ERROR
1710 #define LOAD_ERROR_EXIT(bp, label) \
1711         do { \
1712                 (bp)->state = BNX2X_STATE_ERROR; \
1713                 goto label; \
1714         } while (0)
1715 #else
1716 #define LOAD_ERROR_EXIT(bp, label) \
1717         do { \
1718                 (bp)->state = BNX2X_STATE_ERROR; \
1719                 (bp)->panic = 1; \
1720                 return -EBUSY; \
1721         } while (0)
1722 #endif
1723
1724 bool bnx2x_test_firmware_version(struct bnx2x *bp, bool is_err)
1725 {
1726         /* build FW version dword */
1727         u32 my_fw = (BCM_5710_FW_MAJOR_VERSION) +
1728                     (BCM_5710_FW_MINOR_VERSION << 8) +
1729                     (BCM_5710_FW_REVISION_VERSION << 16) +
1730                     (BCM_5710_FW_ENGINEERING_VERSION << 24);
1731
1732         /* read loaded FW from chip */
1733         u32 loaded_fw = REG_RD(bp, XSEM_REG_PRAM);
1734
1735         DP(NETIF_MSG_IFUP, "loaded fw %x, my fw %x\n", loaded_fw, my_fw);
1736
1737         if (loaded_fw != my_fw) {
1738                 if (is_err)
1739                         BNX2X_ERR("bnx2x with FW %x was already loaded, which mismatches my %x FW. aborting\n",
1740                                   loaded_fw, my_fw);
1741                 return false;
1742         }
1743
1744         return true;
1745 }
1746
1747 /* must be called with rtnl_lock */
1748 int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
1749 {
1750         int port = BP_PORT(bp);
1751         u32 load_code;
1752         int i, rc;
1753
1754 #ifdef BNX2X_STOP_ON_ERROR
1755         if (unlikely(bp->panic)) {
1756                 BNX2X_ERR("Can't load NIC when there is panic\n");
1757                 return -EPERM;
1758         }
1759 #endif
1760
1761         bp->state = BNX2X_STATE_OPENING_WAIT4_LOAD;
1762
1763         /* Set the initial link reported state to link down */
1764         bnx2x_acquire_phy_lock(bp);
1765         memset(&bp->last_reported_link, 0, sizeof(bp->last_reported_link));
1766         __set_bit(BNX2X_LINK_REPORT_LINK_DOWN,
1767                 &bp->last_reported_link.link_report_flags);
1768         bnx2x_release_phy_lock(bp);
1769
1770         /* must be called before memory allocation and HW init */
1771         bnx2x_ilt_set_info(bp);
1772
1773         /*
1774          * Zero fastpath structures preserving invariants like napi, which are
1775          * allocated only once, fp index, max_cos, bp pointer.
1776          * Also set fp->disable_tpa.
1777          */
1778         DP(NETIF_MSG_IFUP, "num queues: %d", bp->num_queues);
1779         for_each_queue(bp, i)
1780                 bnx2x_bz_fp(bp, i);
1781
1782
1783         /* Set the receive queues buffer size */
1784         bnx2x_set_rx_buf_size(bp);
1785
1786         if (bnx2x_alloc_mem(bp))
1787                 return -ENOMEM;
1788
1789         /* As long as bnx2x_alloc_mem() may possibly update
1790          * bp->num_queues, bnx2x_set_real_num_queues() should always
1791          * come after it.
1792          */
1793         rc = bnx2x_set_real_num_queues(bp);
1794         if (rc) {
1795                 BNX2X_ERR("Unable to set real_num_queues\n");
1796                 LOAD_ERROR_EXIT(bp, load_error0);
1797         }
1798
1799         /* configure multi cos mappings in kernel.
1800          * this configuration may be overriden by a multi class queue discipline
1801          * or by a dcbx negotiation result.
1802          */
1803         bnx2x_setup_tc(bp->dev, bp->max_cos);
1804
1805         bnx2x_napi_enable(bp);
1806
1807         /* set pf load just before approaching the MCP */
1808         bnx2x_set_pf_load(bp);
1809
1810         /* Send LOAD_REQUEST command to MCP
1811          * Returns the type of LOAD command:
1812          * if it is the first port to be initialized
1813          * common blocks should be initialized, otherwise - not
1814          */
1815         if (!BP_NOMCP(bp)) {
1816                 /* init fw_seq */
1817                 bp->fw_seq =
1818                         (SHMEM_RD(bp, func_mb[BP_FW_MB_IDX(bp)].drv_mb_header) &
1819                          DRV_MSG_SEQ_NUMBER_MASK);
1820                 BNX2X_DEV_INFO("fw_seq 0x%08x\n", bp->fw_seq);
1821
1822                 /* Get current FW pulse sequence */
1823                 bp->fw_drv_pulse_wr_seq =
1824                         (SHMEM_RD(bp, func_mb[BP_FW_MB_IDX(bp)].drv_pulse_mb) &
1825                          DRV_PULSE_SEQ_MASK);
1826                 BNX2X_DEV_INFO("drv_pulse 0x%x\n", bp->fw_drv_pulse_wr_seq);
1827
1828                 load_code = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_REQ, 0);
1829                 if (!load_code) {
1830                         BNX2X_ERR("MCP response failure, aborting\n");
1831                         rc = -EBUSY;
1832                         LOAD_ERROR_EXIT(bp, load_error1);
1833                 }
1834                 if (load_code == FW_MSG_CODE_DRV_LOAD_REFUSED) {
1835                         BNX2X_ERR("Driver load refused\n");
1836                         rc = -EBUSY; /* other port in diagnostic mode */
1837                         LOAD_ERROR_EXIT(bp, load_error1);
1838                 }
1839                 if (load_code != FW_MSG_CODE_DRV_LOAD_COMMON_CHIP &&
1840                     load_code != FW_MSG_CODE_DRV_LOAD_COMMON) {
1841                         /* abort nic load if version mismatch */
1842                         if (!bnx2x_test_firmware_version(bp, true)) {
1843                                 rc = -EBUSY;
1844                                 LOAD_ERROR_EXIT(bp, load_error2);
1845                         }
1846                 }
1847
1848         } else {
1849                 int path = BP_PATH(bp);
1850
1851                 DP(NETIF_MSG_IFUP, "NO MCP - load counts[%d]      %d, %d, %d\n",
1852                    path, load_count[path][0], load_count[path][1],
1853                    load_count[path][2]);
1854                 load_count[path][0]++;
1855                 load_count[path][1 + port]++;
1856                 DP(NETIF_MSG_IFUP, "NO MCP - new load counts[%d]  %d, %d, %d\n",
1857                    path, load_count[path][0], load_count[path][1],
1858                    load_count[path][2]);
1859                 if (load_count[path][0] == 1)
1860                         load_code = FW_MSG_CODE_DRV_LOAD_COMMON;
1861                 else if (load_count[path][1 + port] == 1)
1862                         load_code = FW_MSG_CODE_DRV_LOAD_PORT;
1863                 else
1864                         load_code = FW_MSG_CODE_DRV_LOAD_FUNCTION;
1865         }
1866
1867         if ((load_code == FW_MSG_CODE_DRV_LOAD_COMMON) ||
1868             (load_code == FW_MSG_CODE_DRV_LOAD_COMMON_CHIP) ||
1869             (load_code == FW_MSG_CODE_DRV_LOAD_PORT)) {
1870                 bp->port.pmf = 1;
1871                 /*
1872                  * We need the barrier to ensure the ordering between the
1873                  * writing to bp->port.pmf here and reading it from the
1874                  * bnx2x_periodic_task().
1875                  */
1876                 smp_mb();
1877         } else
1878                 bp->port.pmf = 0;
1879
1880         DP(NETIF_MSG_IFUP, "pmf %d\n", bp->port.pmf);
1881
1882         /* Init Function state controlling object */
1883         bnx2x__init_func_obj(bp);
1884
1885         /* Initialize HW */
1886         rc = bnx2x_init_hw(bp, load_code);
1887         if (rc) {
1888                 BNX2X_ERR("HW init failed, aborting\n");
1889                 bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0);
1890                 LOAD_ERROR_EXIT(bp, load_error2);
1891         }
1892
1893         /* Connect to IRQs */
1894         rc = bnx2x_setup_irqs(bp);
1895         if (rc) {
1896                 BNX2X_ERR("IRQs setup failed\n");
1897                 bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0);
1898                 LOAD_ERROR_EXIT(bp, load_error2);
1899         }
1900
1901         /* Setup NIC internals and enable interrupts */
1902         bnx2x_nic_init(bp, load_code);
1903
1904         /* Init per-function objects */
1905         bnx2x_init_bp_objs(bp);
1906
1907         if (((load_code == FW_MSG_CODE_DRV_LOAD_COMMON) ||
1908             (load_code == FW_MSG_CODE_DRV_LOAD_COMMON_CHIP)) &&
1909             (bp->common.shmem2_base)) {
1910                 if (SHMEM2_HAS(bp, dcc_support))
1911                         SHMEM2_WR(bp, dcc_support,
1912                                   (SHMEM_DCC_SUPPORT_DISABLE_ENABLE_PF_TLV |
1913                                    SHMEM_DCC_SUPPORT_BANDWIDTH_ALLOCATION_TLV));
1914         }
1915
1916         bp->state = BNX2X_STATE_OPENING_WAIT4_PORT;
1917         rc = bnx2x_func_start(bp);
1918         if (rc) {
1919                 BNX2X_ERR("Function start failed!\n");
1920                 bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0);
1921                 LOAD_ERROR_EXIT(bp, load_error3);
1922         }
1923
1924         /* Send LOAD_DONE command to MCP */
1925         if (!BP_NOMCP(bp)) {
1926                 load_code = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0);
1927                 if (!load_code) {
1928                         BNX2X_ERR("MCP response failure, aborting\n");
1929                         rc = -EBUSY;
1930                         LOAD_ERROR_EXIT(bp, load_error3);
1931                 }
1932         }
1933
1934         rc = bnx2x_setup_leading(bp);
1935         if (rc) {
1936                 BNX2X_ERR("Setup leading failed!\n");
1937                 LOAD_ERROR_EXIT(bp, load_error3);
1938         }
1939
1940 #ifdef BCM_CNIC
1941         /* Enable Timer scan */
1942         REG_WR(bp, TM_REG_EN_LINEAR0_TIMER + port*4, 1);
1943 #endif
1944
1945         for_each_nondefault_queue(bp, i) {
1946                 rc = bnx2x_setup_queue(bp, &bp->fp[i], 0);
1947                 if (rc) {
1948                         BNX2X_ERR("Queue setup failed\n");
1949                         LOAD_ERROR_EXIT(bp, load_error4);
1950                 }
1951         }
1952
1953         rc = bnx2x_init_rss_pf(bp);
1954         if (rc) {
1955                 BNX2X_ERR("PF RSS init failed\n");
1956                 LOAD_ERROR_EXIT(bp, load_error4);
1957         }
1958
1959         /* Now when Clients are configured we are ready to work */
1960         bp->state = BNX2X_STATE_OPEN;
1961
1962         /* Configure a ucast MAC */
1963         rc = bnx2x_set_eth_mac(bp, true);
1964         if (rc) {
1965                 BNX2X_ERR("Setting Ethernet MAC failed\n");
1966                 LOAD_ERROR_EXIT(bp, load_error4);
1967         }
1968
1969         if (bp->pending_max) {
1970                 bnx2x_update_max_mf_config(bp, bp->pending_max);
1971                 bp->pending_max = 0;
1972         }
1973
1974         if (bp->port.pmf)
1975                 bnx2x_initial_phy_init(bp, load_mode);
1976
1977         /* Start fast path */
1978
1979         /* Initialize Rx filter. */
1980         netif_addr_lock_bh(bp->dev);
1981         bnx2x_set_rx_mode(bp->dev);
1982         netif_addr_unlock_bh(bp->dev);
1983
1984         /* Start the Tx */
1985         switch (load_mode) {
1986         case LOAD_NORMAL:
1987                 /* Tx queue should be only reenabled */
1988                 netif_tx_wake_all_queues(bp->dev);
1989                 break;
1990
1991         case LOAD_OPEN:
1992                 netif_tx_start_all_queues(bp->dev);
1993                 smp_mb__after_clear_bit();
1994                 break;
1995
1996         case LOAD_DIAG:
1997                 bp->state = BNX2X_STATE_DIAG;
1998                 break;
1999
2000         default:
2001                 break;
2002         }
2003
2004         if (bp->port.pmf)
2005                 bnx2x_update_drv_flags(bp, 1 << DRV_FLAGS_DCB_CONFIGURED, 0);
2006         else
2007                 bnx2x__link_status_update(bp);
2008
2009         /* start the timer */
2010         mod_timer(&bp->timer, jiffies + bp->current_interval);
2011
2012 #ifdef BCM_CNIC
2013         /* re-read iscsi info */
2014         bnx2x_get_iscsi_info(bp);
2015         bnx2x_setup_cnic_irq_info(bp);
2016         if (bp->state == BNX2X_STATE_OPEN)
2017                 bnx2x_cnic_notify(bp, CNIC_CTL_START_CMD);
2018 #endif
2019
2020         /* mark driver is loaded in shmem2 */
2021         if (SHMEM2_HAS(bp, drv_capabilities_flag)) {
2022                 u32 val;
2023                 val = SHMEM2_RD(bp, drv_capabilities_flag[BP_FW_MB_IDX(bp)]);
2024                 SHMEM2_WR(bp, drv_capabilities_flag[BP_FW_MB_IDX(bp)],
2025                           val | DRV_FLAGS_CAPABILITIES_LOADED_SUPPORTED |
2026                           DRV_FLAGS_CAPABILITIES_LOADED_L2);
2027         }
2028
2029         /* Wait for all pending SP commands to complete */
2030         if (!bnx2x_wait_sp_comp(bp, ~0x0UL)) {
2031                 BNX2X_ERR("Timeout waiting for SP elements to complete\n");
2032                 bnx2x_nic_unload(bp, UNLOAD_CLOSE);
2033                 return -EBUSY;
2034         }
2035
2036         bnx2x_dcbx_init(bp);
2037         return 0;
2038
2039 #ifndef BNX2X_STOP_ON_ERROR
2040 load_error4:
2041 #ifdef BCM_CNIC
2042         /* Disable Timer scan */
2043         REG_WR(bp, TM_REG_EN_LINEAR0_TIMER + port*4, 0);
2044 #endif
2045 load_error3:
2046         bnx2x_int_disable_sync(bp, 1);
2047
2048         /* Clean queueable objects */
2049         bnx2x_squeeze_objects(bp);
2050
2051         /* Free SKBs, SGEs, TPA pool and driver internals */
2052         bnx2x_free_skbs(bp);
2053         for_each_rx_queue(bp, i)
2054                 bnx2x_free_rx_sge_range(bp, bp->fp + i, NUM_RX_SGE);
2055
2056         /* Release IRQs */
2057         bnx2x_free_irq(bp);
2058 load_error2:
2059         if (!BP_NOMCP(bp)) {
2060                 bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_REQ_WOL_MCP, 0);
2061                 bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE, 0);
2062         }
2063
2064         bp->port.pmf = 0;
2065 load_error1:
2066         bnx2x_napi_disable(bp);
2067         /* clear pf_load status, as it was already set */
2068         bnx2x_clear_pf_load(bp);
2069 load_error0:
2070         bnx2x_free_mem(bp);
2071
2072         return rc;
2073 #endif /* ! BNX2X_STOP_ON_ERROR */
2074 }
2075
2076 /* must be called with rtnl_lock */
2077 int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode)
2078 {
2079         int i;
2080         bool global = false;
2081
2082         /* mark driver is unloaded in shmem2 */
2083         if (SHMEM2_HAS(bp, drv_capabilities_flag)) {
2084                 u32 val;
2085                 val = SHMEM2_RD(bp, drv_capabilities_flag[BP_FW_MB_IDX(bp)]);
2086                 SHMEM2_WR(bp, drv_capabilities_flag[BP_FW_MB_IDX(bp)],
2087                           val & ~DRV_FLAGS_CAPABILITIES_LOADED_L2);
2088         }
2089
2090         if ((bp->state == BNX2X_STATE_CLOSED) ||
2091             (bp->state == BNX2X_STATE_ERROR)) {
2092                 /* We can get here if the driver has been unloaded
2093                  * during parity error recovery and is either waiting for a
2094                  * leader to complete or for other functions to unload and
2095                  * then ifdown has been issued. In this case we want to
2096                  * unload and let other functions to complete a recovery
2097                  * process.
2098                  */
2099                 bp->recovery_state = BNX2X_RECOVERY_DONE;
2100                 bp->is_leader = 0;
2101                 bnx2x_release_leader_lock(bp);
2102                 smp_mb();
2103
2104                 DP(NETIF_MSG_IFDOWN, "Releasing a leadership...\n");
2105                 BNX2X_ERR("Can't unload in closed or error state\n");
2106                 return -EINVAL;
2107         }
2108
2109         /*
2110          * It's important to set the bp->state to the value different from
2111          * BNX2X_STATE_OPEN and only then stop the Tx. Otherwise bnx2x_tx_int()
2112          * may restart the Tx from the NAPI context (see bnx2x_tx_int()).
2113          */
2114         bp->state = BNX2X_STATE_CLOSING_WAIT4_HALT;
2115         smp_mb();
2116
2117         /* Stop Tx */
2118         bnx2x_tx_disable(bp);
2119
2120 #ifdef BCM_CNIC
2121         bnx2x_cnic_notify(bp, CNIC_CTL_STOP_CMD);
2122 #endif
2123
2124         bp->rx_mode = BNX2X_RX_MODE_NONE;
2125
2126         del_timer_sync(&bp->timer);
2127
2128         /* Set ALWAYS_ALIVE bit in shmem */
2129         bp->fw_drv_pulse_wr_seq |= DRV_PULSE_ALWAYS_ALIVE;
2130
2131         bnx2x_drv_pulse(bp);
2132
2133         bnx2x_stats_handle(bp, STATS_EVENT_STOP);
2134         bnx2x_save_statistics(bp);
2135
2136         /* Cleanup the chip if needed */
2137         if (unload_mode != UNLOAD_RECOVERY)
2138                 bnx2x_chip_cleanup(bp, unload_mode);
2139         else {
2140                 /* Send the UNLOAD_REQUEST to the MCP */
2141                 bnx2x_send_unload_req(bp, unload_mode);
2142
2143                 /*
2144                  * Prevent transactions to host from the functions on the
2145                  * engine that doesn't reset global blocks in case of global
2146                  * attention once gloabl blocks are reset and gates are opened
2147                  * (the engine which leader will perform the recovery
2148                  * last).
2149                  */
2150                 if (!CHIP_IS_E1x(bp))
2151                         bnx2x_pf_disable(bp);
2152
2153                 /* Disable HW interrupts, NAPI */
2154                 bnx2x_netif_stop(bp, 1);
2155
2156                 /* Release IRQs */
2157                 bnx2x_free_irq(bp);
2158
2159                 /* Report UNLOAD_DONE to MCP */
2160                 bnx2x_send_unload_done(bp);
2161         }
2162
2163         /*
2164          * At this stage no more interrupts will arrive so we may safly clean
2165          * the queueable objects here in case they failed to get cleaned so far.
2166          */
2167         bnx2x_squeeze_objects(bp);
2168
2169         /* There should be no more pending SP commands at this stage */
2170         bp->sp_state = 0;
2171
2172         bp->port.pmf = 0;
2173
2174         /* Free SKBs, SGEs, TPA pool and driver internals */
2175         bnx2x_free_skbs(bp);
2176         for_each_rx_queue(bp, i)
2177                 bnx2x_free_rx_sge_range(bp, bp->fp + i, NUM_RX_SGE);
2178
2179         bnx2x_free_mem(bp);
2180
2181         bp->state = BNX2X_STATE_CLOSED;
2182
2183         /* Check if there are pending parity attentions. If there are - set
2184          * RECOVERY_IN_PROGRESS.
2185          */
2186         if (bnx2x_chk_parity_attn(bp, &global, false)) {
2187                 bnx2x_set_reset_in_progress(bp);
2188
2189                 /* Set RESET_IS_GLOBAL if needed */
2190                 if (global)
2191                         bnx2x_set_reset_global(bp);
2192         }
2193
2194
2195         /* The last driver must disable a "close the gate" if there is no
2196          * parity attention or "process kill" pending.
2197          */
2198         if (!bnx2x_clear_pf_load(bp) && bnx2x_reset_is_done(bp, BP_PATH(bp)))
2199                 bnx2x_disable_close_the_gate(bp);
2200
2201         return 0;
2202 }
2203
2204 int bnx2x_set_power_state(struct bnx2x *bp, pci_power_t state)
2205 {
2206         u16 pmcsr;
2207
2208         /* If there is no power capability, silently succeed */
2209         if (!bp->pm_cap) {
2210                 BNX2X_DEV_INFO("No power capability. Breaking.\n");
2211                 return 0;
2212         }
2213
2214         pci_read_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, &pmcsr);
2215
2216         switch (state) {
2217         case PCI_D0:
2218                 pci_write_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL,
2219                                       ((pmcsr & ~PCI_PM_CTRL_STATE_MASK) |
2220                                        PCI_PM_CTRL_PME_STATUS));
2221
2222                 if (pmcsr & PCI_PM_CTRL_STATE_MASK)
2223                         /* delay required during transition out of D3hot */
2224                         msleep(20);
2225                 break;
2226
2227         case PCI_D3hot:
2228                 /* If there are other clients above don't
2229                    shut down the power */
2230                 if (atomic_read(&bp->pdev->enable_cnt) != 1)
2231                         return 0;
2232                 /* Don't shut down the power for emulation and FPGA */
2233                 if (CHIP_REV_IS_SLOW(bp))
2234                         return 0;
2235
2236                 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
2237                 pmcsr |= 3;
2238
2239                 if (bp->wol)
2240                         pmcsr |= PCI_PM_CTRL_PME_ENABLE;
2241
2242                 pci_write_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL,
2243                                       pmcsr);
2244
2245                 /* No more memory access after this point until
2246                 * device is brought back to D0.
2247                 */
2248                 break;
2249
2250         default:
2251                 dev_err(&bp->pdev->dev, "Can't support state = %d\n", state);
2252                 return -EINVAL;
2253         }
2254         return 0;
2255 }
2256
2257 /*
2258  * net_device service functions
2259  */
2260 int bnx2x_poll(struct napi_struct *napi, int budget)
2261 {
2262         int work_done = 0;
2263         u8 cos;
2264         struct bnx2x_fastpath *fp = container_of(napi, struct bnx2x_fastpath,
2265                                                  napi);
2266         struct bnx2x *bp = fp->bp;
2267
2268         while (1) {
2269 #ifdef BNX2X_STOP_ON_ERROR
2270                 if (unlikely(bp->panic)) {
2271                         napi_complete(napi);
2272                         return 0;
2273                 }
2274 #endif
2275
2276                 for_each_cos_in_tx_queue(fp, cos)
2277                         if (bnx2x_tx_queue_has_work(&fp->txdata[cos]))
2278                                 bnx2x_tx_int(bp, &fp->txdata[cos]);
2279
2280
2281                 if (bnx2x_has_rx_work(fp)) {
2282                         work_done += bnx2x_rx_int(fp, budget - work_done);
2283
2284                         /* must not complete if we consumed full budget */
2285                         if (work_done >= budget)
2286                                 break;
2287                 }
2288
2289                 /* Fall out from the NAPI loop if needed */
2290                 if (!(bnx2x_has_rx_work(fp) || bnx2x_has_tx_work(fp))) {
2291 #ifdef BCM_CNIC
2292                         /* No need to update SB for FCoE L2 ring as long as
2293                          * it's connected to the default SB and the SB
2294                          * has been updated when NAPI was scheduled.
2295                          */
2296                         if (IS_FCOE_FP(fp)) {
2297                                 napi_complete(napi);
2298                                 break;
2299                         }
2300 #endif
2301
2302                         bnx2x_update_fpsb_idx(fp);
2303                         /* bnx2x_has_rx_work() reads the status block,
2304                          * thus we need to ensure that status block indices
2305                          * have been actually read (bnx2x_update_fpsb_idx)
2306                          * prior to this check (bnx2x_has_rx_work) so that
2307                          * we won't write the "newer" value of the status block
2308                          * to IGU (if there was a DMA right after
2309                          * bnx2x_has_rx_work and if there is no rmb, the memory
2310                          * reading (bnx2x_update_fpsb_idx) may be postponed
2311                          * to right before bnx2x_ack_sb). In this case there
2312                          * will never be another interrupt until there is
2313                          * another update of the status block, while there
2314                          * is still unhandled work.
2315                          */
2316                         rmb();
2317
2318                         if (!(bnx2x_has_rx_work(fp) || bnx2x_has_tx_work(fp))) {
2319                                 napi_complete(napi);
2320                                 /* Re-enable interrupts */
2321                                 DP(NETIF_MSG_RX_STATUS,
2322                                    "Update index to %d\n", fp->fp_hc_idx);
2323                                 bnx2x_ack_sb(bp, fp->igu_sb_id, USTORM_ID,
2324                                              le16_to_cpu(fp->fp_hc_idx),
2325                                              IGU_INT_ENABLE, 1);
2326                                 break;
2327                         }
2328                 }
2329         }
2330
2331         return work_done;
2332 }
2333
2334 /* we split the first BD into headers and data BDs
2335  * to ease the pain of our fellow microcode engineers
2336  * we use one mapping for both BDs
2337  * So far this has only been observed to happen
2338  * in Other Operating Systems(TM)
2339  */
2340 static noinline u16 bnx2x_tx_split(struct bnx2x *bp,
2341                                    struct bnx2x_fp_txdata *txdata,
2342                                    struct sw_tx_bd *tx_buf,
2343                                    struct eth_tx_start_bd **tx_bd, u16 hlen,
2344                                    u16 bd_prod, int nbd)
2345 {
2346         struct eth_tx_start_bd *h_tx_bd = *tx_bd;
2347         struct eth_tx_bd *d_tx_bd;
2348         dma_addr_t mapping;
2349         int old_len = le16_to_cpu(h_tx_bd->nbytes);
2350
2351         /* first fix first BD */
2352         h_tx_bd->nbd = cpu_to_le16(nbd);
2353         h_tx_bd->nbytes = cpu_to_le16(hlen);
2354
2355         DP(NETIF_MSG_TX_QUEUED, "TSO split header size is %d (%x:%x) nbd %d\n",
2356            h_tx_bd->nbytes, h_tx_bd->addr_hi, h_tx_bd->addr_lo, h_tx_bd->nbd);
2357
2358         /* now get a new data BD
2359          * (after the pbd) and fill it */
2360         bd_prod = TX_BD(NEXT_TX_IDX(bd_prod));
2361         d_tx_bd = &txdata->tx_desc_ring[bd_prod].reg_bd;
2362
2363         mapping = HILO_U64(le32_to_cpu(h_tx_bd->addr_hi),
2364                            le32_to_cpu(h_tx_bd->addr_lo)) + hlen;
2365
2366         d_tx_bd->addr_hi = cpu_to_le32(U64_HI(mapping));
2367         d_tx_bd->addr_lo = cpu_to_le32(U64_LO(mapping));
2368         d_tx_bd->nbytes = cpu_to_le16(old_len - hlen);
2369
2370         /* this marks the BD as one that has no individual mapping */
2371         tx_buf->flags |= BNX2X_TSO_SPLIT_BD;
2372
2373         DP(NETIF_MSG_TX_QUEUED,
2374            "TSO split data size is %d (%x:%x)\n",
2375            d_tx_bd->nbytes, d_tx_bd->addr_hi, d_tx_bd->addr_lo);
2376
2377         /* update tx_bd */
2378         *tx_bd = (struct eth_tx_start_bd *)d_tx_bd;
2379
2380         return bd_prod;
2381 }
2382
2383 static inline u16 bnx2x_csum_fix(unsigned char *t_header, u16 csum, s8 fix)
2384 {
2385         if (fix > 0)
2386                 csum = (u16) ~csum_fold(csum_sub(csum,
2387                                 csum_partial(t_header - fix, fix, 0)));
2388
2389         else if (fix < 0)
2390                 csum = (u16) ~csum_fold(csum_add(csum,
2391                                 csum_partial(t_header, -fix, 0)));
2392
2393         return swab16(csum);
2394 }
2395
2396 static inline u32 bnx2x_xmit_type(struct bnx2x *bp, struct sk_buff *skb)
2397 {
2398         u32 rc;
2399
2400         if (skb->ip_summed != CHECKSUM_PARTIAL)
2401                 rc = XMIT_PLAIN;
2402
2403         else {
2404                 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6)) {
2405                         rc = XMIT_CSUM_V6;
2406                         if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2407                                 rc |= XMIT_CSUM_TCP;
2408
2409                 } else {
2410                         rc = XMIT_CSUM_V4;
2411                         if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2412                                 rc |= XMIT_CSUM_TCP;
2413                 }
2414         }
2415
2416         if (skb_is_gso_v6(skb))
2417                 rc |= XMIT_GSO_V6 | XMIT_CSUM_TCP | XMIT_CSUM_V6;
2418         else if (skb_is_gso(skb))
2419                 rc |= XMIT_GSO_V4 | XMIT_CSUM_V4 | XMIT_CSUM_TCP;
2420
2421         return rc;
2422 }
2423
2424 #if (MAX_SKB_FRAGS >= MAX_FETCH_BD - 3)
2425 /* check if packet requires linearization (packet is too fragmented)
2426    no need to check fragmentation if page size > 8K (there will be no
2427    violation to FW restrictions) */
2428 static int bnx2x_pkt_req_lin(struct bnx2x *bp, struct sk_buff *skb,
2429                              u32 xmit_type)
2430 {
2431         int to_copy = 0;
2432         int hlen = 0;
2433         int first_bd_sz = 0;
2434
2435         /* 3 = 1 (for linear data BD) + 2 (for PBD and last BD) */
2436         if (skb_shinfo(skb)->nr_frags >= (MAX_FETCH_BD - 3)) {
2437
2438                 if (xmit_type & XMIT_GSO) {
2439                         unsigned short lso_mss = skb_shinfo(skb)->gso_size;
2440                         /* Check if LSO packet needs to be copied:
2441                            3 = 1 (for headers BD) + 2 (for PBD and last BD) */
2442                         int wnd_size = MAX_FETCH_BD - 3;
2443                         /* Number of windows to check */
2444                         int num_wnds = skb_shinfo(skb)->nr_frags - wnd_size;
2445                         int wnd_idx = 0;
2446                         int frag_idx = 0;
2447                         u32 wnd_sum = 0;
2448
2449                         /* Headers length */
2450                         hlen = (int)(skb_transport_header(skb) - skb->data) +
2451                                 tcp_hdrlen(skb);
2452
2453                         /* Amount of data (w/o headers) on linear part of SKB*/
2454                         first_bd_sz = skb_headlen(skb) - hlen;
2455
2456                         wnd_sum  = first_bd_sz;
2457
2458                         /* Calculate the first sum - it's special */
2459                         for (frag_idx = 0; frag_idx < wnd_size - 1; frag_idx++)
2460                                 wnd_sum +=
2461                                         skb_frag_size(&skb_shinfo(skb)->frags[frag_idx]);
2462
2463                         /* If there was data on linear skb data - check it */
2464                         if (first_bd_sz > 0) {
2465                                 if (unlikely(wnd_sum < lso_mss)) {
2466                                         to_copy = 1;
2467                                         goto exit_lbl;
2468                                 }
2469
2470                                 wnd_sum -= first_bd_sz;
2471                         }
2472
2473                         /* Others are easier: run through the frag list and
2474                            check all windows */
2475                         for (wnd_idx = 0; wnd_idx <= num_wnds; wnd_idx++) {
2476                                 wnd_sum +=
2477                           skb_frag_size(&skb_shinfo(skb)->frags[wnd_idx + wnd_size - 1]);
2478
2479                                 if (unlikely(wnd_sum < lso_mss)) {
2480                                         to_copy = 1;
2481                                         break;
2482                                 }
2483                                 wnd_sum -=
2484                                         skb_frag_size(&skb_shinfo(skb)->frags[wnd_idx]);
2485                         }
2486                 } else {
2487                         /* in non-LSO too fragmented packet should always
2488                            be linearized */
2489                         to_copy = 1;
2490                 }
2491         }
2492
2493 exit_lbl:
2494         if (unlikely(to_copy))
2495                 DP(NETIF_MSG_TX_QUEUED,
2496                    "Linearization IS REQUIRED for %s packet. num_frags %d  hlen %d  first_bd_sz %d\n",
2497                    (xmit_type & XMIT_GSO) ? "LSO" : "non-LSO",
2498                    skb_shinfo(skb)->nr_frags, hlen, first_bd_sz);
2499
2500         return to_copy;
2501 }
2502 #endif
2503
2504 static inline void bnx2x_set_pbd_gso_e2(struct sk_buff *skb, u32 *parsing_data,
2505                                         u32 xmit_type)
2506 {
2507         *parsing_data |= (skb_shinfo(skb)->gso_size <<
2508                               ETH_TX_PARSE_BD_E2_LSO_MSS_SHIFT) &
2509                               ETH_TX_PARSE_BD_E2_LSO_MSS;
2510         if ((xmit_type & XMIT_GSO_V6) &&
2511             (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
2512                 *parsing_data |= ETH_TX_PARSE_BD_E2_IPV6_WITH_EXT_HDR;
2513 }
2514
2515 /**
2516  * bnx2x_set_pbd_gso - update PBD in GSO case.
2517  *
2518  * @skb:        packet skb
2519  * @pbd:        parse BD
2520  * @xmit_type:  xmit flags
2521  */
2522 static inline void bnx2x_set_pbd_gso(struct sk_buff *skb,
2523                                      struct eth_tx_parse_bd_e1x *pbd,
2524                                      u32 xmit_type)
2525 {
2526         pbd->lso_mss = cpu_to_le16(skb_shinfo(skb)->gso_size);
2527         pbd->tcp_send_seq = swab32(tcp_hdr(skb)->seq);
2528         pbd->tcp_flags = pbd_tcp_flags(skb);
2529
2530         if (xmit_type & XMIT_GSO_V4) {
2531                 pbd->ip_id = swab16(ip_hdr(skb)->id);
2532                 pbd->tcp_pseudo_csum =
2533                         swab16(~csum_tcpudp_magic(ip_hdr(skb)->saddr,
2534                                                   ip_hdr(skb)->daddr,
2535                                                   0, IPPROTO_TCP, 0));
2536
2537         } else
2538                 pbd->tcp_pseudo_csum =
2539                         swab16(~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2540                                                 &ipv6_hdr(skb)->daddr,
2541                                                 0, IPPROTO_TCP, 0));
2542
2543         pbd->global_data |= ETH_TX_PARSE_BD_E1X_PSEUDO_CS_WITHOUT_LEN;
2544 }
2545
2546 /**
2547  * bnx2x_set_pbd_csum_e2 - update PBD with checksum and return header length
2548  *
2549  * @bp:                 driver handle
2550  * @skb:                packet skb
2551  * @parsing_data:       data to be updated
2552  * @xmit_type:          xmit flags
2553  *
2554  * 57712 related
2555  */
2556 static inline  u8 bnx2x_set_pbd_csum_e2(struct bnx2x *bp, struct sk_buff *skb,
2557         u32 *parsing_data, u32 xmit_type)
2558 {
2559         *parsing_data |=
2560                         ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) <<
2561                         ETH_TX_PARSE_BD_E2_TCP_HDR_START_OFFSET_W_SHIFT) &
2562                         ETH_TX_PARSE_BD_E2_TCP_HDR_START_OFFSET_W;
2563
2564         if (xmit_type & XMIT_CSUM_TCP) {
2565                 *parsing_data |= ((tcp_hdrlen(skb) / 4) <<
2566                         ETH_TX_PARSE_BD_E2_TCP_HDR_LENGTH_DW_SHIFT) &
2567                         ETH_TX_PARSE_BD_E2_TCP_HDR_LENGTH_DW;
2568
2569                 return skb_transport_header(skb) + tcp_hdrlen(skb) - skb->data;
2570         } else
2571                 /* We support checksum offload for TCP and UDP only.
2572                  * No need to pass the UDP header length - it's a constant.
2573                  */
2574                 return skb_transport_header(skb) +
2575                                 sizeof(struct udphdr) - skb->data;
2576 }
2577
2578 static inline void bnx2x_set_sbd_csum(struct bnx2x *bp, struct sk_buff *skb,
2579         struct eth_tx_start_bd *tx_start_bd, u32 xmit_type)
2580 {
2581         tx_start_bd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_L4_CSUM;
2582
2583         if (xmit_type & XMIT_CSUM_V4)
2584                 tx_start_bd->bd_flags.as_bitfield |=
2585                                         ETH_TX_BD_FLAGS_IP_CSUM;
2586         else
2587                 tx_start_bd->bd_flags.as_bitfield |=
2588                                         ETH_TX_BD_FLAGS_IPV6;
2589
2590         if (!(xmit_type & XMIT_CSUM_TCP))
2591                 tx_start_bd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_IS_UDP;
2592 }
2593
2594 /**
2595  * bnx2x_set_pbd_csum - update PBD with checksum and return header length
2596  *
2597  * @bp:         driver handle
2598  * @skb:        packet skb
2599  * @pbd:        parse BD to be updated
2600  * @xmit_type:  xmit flags
2601  */
2602 static inline u8 bnx2x_set_pbd_csum(struct bnx2x *bp, struct sk_buff *skb,
2603         struct eth_tx_parse_bd_e1x *pbd,
2604         u32 xmit_type)
2605 {
2606         u8 hlen = (skb_network_header(skb) - skb->data) >> 1;
2607
2608         /* for now NS flag is not used in Linux */
2609         pbd->global_data =
2610                 (hlen | ((skb->protocol == cpu_to_be16(ETH_P_8021Q)) <<
2611                          ETH_TX_PARSE_BD_E1X_LLC_SNAP_EN_SHIFT));
2612
2613         pbd->ip_hlen_w = (skb_transport_header(skb) -
2614                         skb_network_header(skb)) >> 1;
2615
2616         hlen += pbd->ip_hlen_w;
2617
2618         /* We support checksum offload for TCP and UDP only */
2619         if (xmit_type & XMIT_CSUM_TCP)
2620                 hlen += tcp_hdrlen(skb) / 2;
2621         else
2622                 hlen += sizeof(struct udphdr) / 2;
2623
2624         pbd->total_hlen_w = cpu_to_le16(hlen);
2625         hlen = hlen*2;
2626
2627         if (xmit_type & XMIT_CSUM_TCP) {
2628                 pbd->tcp_pseudo_csum = swab16(tcp_hdr(skb)->check);
2629
2630         } else {
2631                 s8 fix = SKB_CS_OFF(skb); /* signed! */
2632
2633                 DP(NETIF_MSG_TX_QUEUED,
2634                    "hlen %d  fix %d  csum before fix %x\n",
2635                    le16_to_cpu(pbd->total_hlen_w), fix, SKB_CS(skb));
2636
2637                 /* HW bug: fixup the CSUM */
2638                 pbd->tcp_pseudo_csum =
2639                         bnx2x_csum_fix(skb_transport_header(skb),
2640                                        SKB_CS(skb), fix);
2641
2642                 DP(NETIF_MSG_TX_QUEUED, "csum after fix %x\n",
2643                    pbd->tcp_pseudo_csum);
2644         }
2645
2646         return hlen;
2647 }
2648
2649 /* called with netif_tx_lock
2650  * bnx2x_tx_int() runs without netif_tx_lock unless it needs to call
2651  * netif_wake_queue()
2652  */
2653 netdev_tx_t bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev)
2654 {
2655         struct bnx2x *bp = netdev_priv(dev);
2656
2657         struct bnx2x_fastpath *fp;
2658         struct netdev_queue *txq;
2659         struct bnx2x_fp_txdata *txdata;
2660         struct sw_tx_bd *tx_buf;
2661         struct eth_tx_start_bd *tx_start_bd, *first_bd;
2662         struct eth_tx_bd *tx_data_bd, *total_pkt_bd = NULL;
2663         struct eth_tx_parse_bd_e1x *pbd_e1x = NULL;
2664         struct eth_tx_parse_bd_e2 *pbd_e2 = NULL;
2665         u32 pbd_e2_parsing_data = 0;
2666         u16 pkt_prod, bd_prod;
2667         int nbd, txq_index, fp_index, txdata_index;
2668         dma_addr_t mapping;
2669         u32 xmit_type = bnx2x_xmit_type(bp, skb);
2670         int i;
2671         u8 hlen = 0;
2672         __le16 pkt_size = 0;
2673         struct ethhdr *eth;
2674         u8 mac_type = UNICAST_ADDRESS;
2675
2676 #ifdef BNX2X_STOP_ON_ERROR
2677         if (unlikely(bp->panic))
2678                 return NETDEV_TX_BUSY;
2679 #endif
2680
2681         txq_index = skb_get_queue_mapping(skb);
2682         txq = netdev_get_tx_queue(dev, txq_index);
2683
2684         BUG_ON(txq_index >= MAX_ETH_TXQ_IDX(bp) + FCOE_PRESENT);
2685
2686         /* decode the fastpath index and the cos index from the txq */
2687         fp_index = TXQ_TO_FP(txq_index);
2688         txdata_index = TXQ_TO_COS(txq_index);
2689
2690 #ifdef BCM_CNIC
2691         /*
2692          * Override the above for the FCoE queue:
2693          *   - FCoE fp entry is right after the ETH entries.
2694          *   - FCoE L2 queue uses bp->txdata[0] only.
2695          */
2696         if (unlikely(!NO_FCOE(bp) && (txq_index ==
2697                                       bnx2x_fcoe_tx(bp, txq_index)))) {
2698                 fp_index = FCOE_IDX;
2699                 txdata_index = 0;
2700         }
2701 #endif
2702
2703         /* enable this debug print to view the transmission queue being used
2704         DP(NETIF_MSG_TX_QUEUED, "indices: txq %d, fp %d, txdata %d\n",
2705            txq_index, fp_index, txdata_index); */
2706
2707         /* locate the fastpath and the txdata */
2708         fp = &bp->fp[fp_index];
2709         txdata = &fp->txdata[txdata_index];
2710
2711         /* enable this debug print to view the tranmission details
2712         DP(NETIF_MSG_TX_QUEUED,
2713            "transmitting packet cid %d fp index %d txdata_index %d tx_data ptr %p fp pointer %p\n",
2714            txdata->cid, fp_index, txdata_index, txdata, fp); */
2715
2716         if (unlikely(bnx2x_tx_avail(bp, txdata) <
2717                      (skb_shinfo(skb)->nr_frags + 3))) {
2718                 fp->eth_q_stats.driver_xoff++;
2719                 netif_tx_stop_queue(txq);
2720                 BNX2X_ERR("BUG! Tx ring full when queue awake!\n");
2721                 return NETDEV_TX_BUSY;
2722         }
2723
2724         DP(NETIF_MSG_TX_QUEUED,
2725            "queue[%d]: SKB: summed %x  protocol %x protocol(%x,%x) gso type %x  xmit_type %x\n",
2726            txq_index, skb->ip_summed, skb->protocol, ipv6_hdr(skb)->nexthdr,
2727            ip_hdr(skb)->protocol, skb_shinfo(skb)->gso_type, xmit_type);
2728
2729         eth = (struct ethhdr *)skb->data;
2730
2731         /* set flag according to packet type (UNICAST_ADDRESS is default)*/
2732         if (unlikely(is_multicast_ether_addr(eth->h_dest))) {
2733                 if (is_broadcast_ether_addr(eth->h_dest))
2734                         mac_type = BROADCAST_ADDRESS;
2735                 else
2736                         mac_type = MULTICAST_ADDRESS;
2737         }
2738
2739 #if (MAX_SKB_FRAGS >= MAX_FETCH_BD - 3)
2740         /* First, check if we need to linearize the skb (due to FW
2741            restrictions). No need to check fragmentation if page size > 8K
2742            (there will be no violation to FW restrictions) */
2743         if (bnx2x_pkt_req_lin(bp, skb, xmit_type)) {
2744                 /* Statistics of linearization */
2745                 bp->lin_cnt++;
2746                 if (skb_linearize(skb) != 0) {
2747                         DP(NETIF_MSG_TX_QUEUED,
2748                            "SKB linearization failed - silently dropping this SKB\n");
2749                         dev_kfree_skb_any(skb);
2750                         return NETDEV_TX_OK;
2751                 }
2752         }
2753 #endif
2754         /* Map skb linear data for DMA */
2755         mapping = dma_map_single(&bp->pdev->dev, skb->data,
2756                                  skb_headlen(skb), DMA_TO_DEVICE);
2757         if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) {
2758                 DP(NETIF_MSG_TX_QUEUED,
2759                    "SKB mapping failed - silently dropping this SKB\n");
2760                 dev_kfree_skb_any(skb);
2761                 return NETDEV_TX_OK;
2762         }
2763         /*
2764         Please read carefully. First we use one BD which we mark as start,
2765         then we have a parsing info BD (used for TSO or xsum),
2766         and only then we have the rest of the TSO BDs.
2767         (don't forget to mark the last one as last,
2768         and to unmap only AFTER you write to the BD ...)
2769         And above all, all pdb sizes are in words - NOT DWORDS!
2770         */
2771
2772         /* get current pkt produced now - advance it just before sending packet
2773          * since mapping of pages may fail and cause packet to be dropped
2774          */
2775         pkt_prod = txdata->tx_pkt_prod;
2776         bd_prod = TX_BD(txdata->tx_bd_prod);
2777
2778         /* get a tx_buf and first BD
2779          * tx_start_bd may be changed during SPLIT,
2780          * but first_bd will always stay first
2781          */
2782         tx_buf = &txdata->tx_buf_ring[TX_BD(pkt_prod)];
2783         tx_start_bd = &txdata->tx_desc_ring[bd_prod].start_bd;
2784         first_bd = tx_start_bd;
2785
2786         tx_start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;
2787         SET_FLAG(tx_start_bd->general_data, ETH_TX_START_BD_ETH_ADDR_TYPE,
2788                  mac_type);
2789
2790         /* header nbd */
2791         SET_FLAG(tx_start_bd->general_data, ETH_TX_START_BD_HDR_NBDS, 1);
2792
2793         /* remember the first BD of the packet */
2794         tx_buf->first_bd = txdata->tx_bd_prod;
2795         tx_buf->skb = skb;
2796         tx_buf->flags = 0;
2797
2798         DP(NETIF_MSG_TX_QUEUED,
2799            "sending pkt %u @%p  next_idx %u  bd %u @%p\n",
2800            pkt_prod, tx_buf, txdata->tx_pkt_prod, bd_prod, tx_start_bd);
2801
2802         if (vlan_tx_tag_present(skb)) {
2803                 tx_start_bd->vlan_or_ethertype =
2804                     cpu_to_le16(vlan_tx_tag_get(skb));
2805                 tx_start_bd->bd_flags.as_bitfield |=
2806                     (X_ETH_OUTBAND_VLAN << ETH_TX_BD_FLAGS_VLAN_MODE_SHIFT);
2807         } else
2808                 tx_start_bd->vlan_or_ethertype = cpu_to_le16(pkt_prod);
2809
2810         /* turn on parsing and get a BD */
2811         bd_prod = TX_BD(NEXT_TX_IDX(bd_prod));
2812
2813         if (xmit_type & XMIT_CSUM)
2814                 bnx2x_set_sbd_csum(bp, skb, tx_start_bd, xmit_type);
2815
2816         if (!CHIP_IS_E1x(bp)) {
2817                 pbd_e2 = &txdata->tx_desc_ring[bd_prod].parse_bd_e2;
2818                 memset(pbd_e2, 0, sizeof(struct eth_tx_parse_bd_e2));
2819                 /* Set PBD in checksum offload case */
2820                 if (xmit_type & XMIT_CSUM)
2821                         hlen = bnx2x_set_pbd_csum_e2(bp, skb,
2822                                                      &pbd_e2_parsing_data,
2823                                                      xmit_type);
2824                 if (IS_MF_SI(bp)) {
2825                         /*
2826                          * fill in the MAC addresses in the PBD - for local
2827                          * switching
2828                          */
2829                         bnx2x_set_fw_mac_addr(&pbd_e2->src_mac_addr_hi,
2830                                               &pbd_e2->src_mac_addr_mid,
2831                                               &pbd_e2->src_mac_addr_lo,
2832                                               eth->h_source);
2833                         bnx2x_set_fw_mac_addr(&pbd_e2->dst_mac_addr_hi,
2834                                               &pbd_e2->dst_mac_addr_mid,
2835                                               &pbd_e2->dst_mac_addr_lo,
2836                                               eth->h_dest);
2837                 }
2838         } else {
2839                 pbd_e1x = &txdata->tx_desc_ring[bd_prod].parse_bd_e1x;
2840                 memset(pbd_e1x, 0, sizeof(struct eth_tx_parse_bd_e1x));
2841                 /* Set PBD in checksum offload case */
2842                 if (xmit_type & XMIT_CSUM)
2843                         hlen = bnx2x_set_pbd_csum(bp, skb, pbd_e1x, xmit_type);
2844
2845         }
2846
2847         /* Setup the data pointer of the first BD of the packet */
2848         tx_start_bd->addr_hi = cpu_to_le32(U64_HI(mapping));
2849         tx_start_bd->addr_lo = cpu_to_le32(U64_LO(mapping));
2850         nbd = 2; /* start_bd + pbd + frags (updated when pages are mapped) */
2851         tx_start_bd->nbytes = cpu_to_le16(skb_headlen(skb));
2852         pkt_size = tx_start_bd->nbytes;
2853
2854         DP(NETIF_MSG_TX_QUEUED,
2855            "first bd @%p  addr (%x:%x)  nbd %d  nbytes %d  flags %x  vlan %x\n",
2856            tx_start_bd, tx_start_bd->addr_hi, tx_start_bd->addr_lo,
2857            le16_to_cpu(tx_start_bd->nbd), le16_to_cpu(tx_start_bd->nbytes),
2858            tx_start_bd->bd_flags.as_bitfield,
2859            le16_to_cpu(tx_start_bd->vlan_or_ethertype));
2860
2861         if (xmit_type & XMIT_GSO) {
2862
2863                 DP(NETIF_MSG_TX_QUEUED,
2864                    "TSO packet len %d  hlen %d  total len %d  tso size %d\n",
2865                    skb->len, hlen, skb_headlen(skb),
2866                    skb_shinfo(skb)->gso_size);
2867
2868                 tx_start_bd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_SW_LSO;
2869
2870                 if (unlikely(skb_headlen(skb) > hlen))
2871                         bd_prod = bnx2x_tx_split(bp, txdata, tx_buf,
2872                                                  &tx_start_bd, hlen,
2873                                                  bd_prod, ++nbd);
2874                 if (!CHIP_IS_E1x(bp))
2875                         bnx2x_set_pbd_gso_e2(skb, &pbd_e2_parsing_data,
2876                                              xmit_type);
2877                 else
2878                         bnx2x_set_pbd_gso(skb, pbd_e1x, xmit_type);
2879         }
2880
2881         /* Set the PBD's parsing_data field if not zero
2882          * (for the chips newer than 57711).
2883          */
2884         if (pbd_e2_parsing_data)
2885                 pbd_e2->parsing_data = cpu_to_le32(pbd_e2_parsing_data);
2886
2887         tx_data_bd = (struct eth_tx_bd *)tx_start_bd;
2888
2889         /* Handle fragmented skb */
2890         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2891                 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2892
2893                 mapping = skb_frag_dma_map(&bp->pdev->dev, frag, 0,
2894                                            skb_frag_size(frag), DMA_TO_DEVICE);
2895                 if (unlikely(dma_mapping_error(&bp->pdev->dev, mapping))) {
2896                         unsigned int pkts_compl = 0, bytes_compl = 0;
2897
2898                         DP(NETIF_MSG_TX_QUEUED,
2899                            "Unable to map page - dropping packet...\n");
2900
2901                         /* we need unmap all buffers already mapped
2902                          * for this SKB;
2903                          * first_bd->nbd need to be properly updated
2904                          * before call to bnx2x_free_tx_pkt
2905                          */
2906                         first_bd->nbd = cpu_to_le16(nbd);
2907                         bnx2x_free_tx_pkt(bp, txdata,
2908                                           TX_BD(txdata->tx_pkt_prod),
2909                                           &pkts_compl, &bytes_compl);
2910                         return NETDEV_TX_OK;
2911                 }
2912
2913                 bd_prod = TX_BD(NEXT_TX_IDX(bd_prod));
2914                 tx_data_bd = &txdata->tx_desc_ring[bd_prod].reg_bd;
2915                 if (total_pkt_bd == NULL)
2916                         total_pkt_bd = &txdata->tx_desc_ring[bd_prod].reg_bd;
2917
2918                 tx_data_bd->addr_hi = cpu_to_le32(U64_HI(mapping));
2919                 tx_data_bd->addr_lo = cpu_to_le32(U64_LO(mapping));
2920                 tx_data_bd->nbytes = cpu_to_le16(skb_frag_size(frag));
2921                 le16_add_cpu(&pkt_size, skb_frag_size(frag));
2922                 nbd++;
2923
2924                 DP(NETIF_MSG_TX_QUEUED,
2925                    "frag %d  bd @%p  addr (%x:%x)  nbytes %d\n",
2926                    i, tx_data_bd, tx_data_bd->addr_hi, tx_data_bd->addr_lo,
2927                    le16_to_cpu(tx_data_bd->nbytes));
2928         }
2929
2930         DP(NETIF_MSG_TX_QUEUED, "last bd @%p\n", tx_data_bd);
2931
2932         /* update with actual num BDs */
2933         first_bd->nbd = cpu_to_le16(nbd);
2934
2935         bd_prod = TX_BD(NEXT_TX_IDX(bd_prod));
2936
2937         /* now send a tx doorbell, counting the next BD
2938          * if the packet contains or ends with it
2939          */
2940         if (TX_BD_POFF(bd_prod) < nbd)
2941                 nbd++;
2942
2943         /* total_pkt_bytes should be set on the first data BD if
2944          * it's not an LSO packet and there is more than one
2945          * data BD. In this case pkt_size is limited by an MTU value.
2946          * However we prefer to set it for an LSO packet (while we don't
2947          * have to) in order to save some CPU cycles in a none-LSO
2948          * case, when we much more care about them.
2949          */
2950         if (total_pkt_bd != NULL)
2951                 total_pkt_bd->total_pkt_bytes = pkt_size;
2952
2953         if (pbd_e1x)
2954                 DP(NETIF_MSG_TX_QUEUED,
2955                    "PBD (E1X) @%p  ip_data %x  ip_hlen %u  ip_id %u  lso_mss %u  tcp_flags %x  xsum %x  seq %u  hlen %u\n",
2956                    pbd_e1x, pbd_e1x->global_data, pbd_e1x->ip_hlen_w,
2957                    pbd_e1x->ip_id, pbd_e1x->lso_mss, pbd_e1x->tcp_flags,
2958                    pbd_e1x->tcp_pseudo_csum, pbd_e1x->tcp_send_seq,
2959                     le16_to_cpu(pbd_e1x->total_hlen_w));
2960         if (pbd_e2)
2961                 DP(NETIF_MSG_TX_QUEUED,
2962                    "PBD (E2) @%p  dst %x %x %x src %x %x %x parsing_data %x\n",
2963                    pbd_e2, pbd_e2->dst_mac_addr_hi, pbd_e2->dst_mac_addr_mid,
2964                    pbd_e2->dst_mac_addr_lo, pbd_e2->src_mac_addr_hi,
2965                    pbd_e2->src_mac_addr_mid, pbd_e2->src_mac_addr_lo,
2966                    pbd_e2->parsing_data);
2967         DP(NETIF_MSG_TX_QUEUED, "doorbell: nbd %d  bd %u\n", nbd, bd_prod);
2968
2969         netdev_tx_sent_queue(txq, skb->len);
2970
2971         txdata->tx_pkt_prod++;
2972         /*
2973          * Make sure that the BD data is updated before updating the producer
2974          * since FW might read the BD right after the producer is updated.
2975          * This is only applicable for weak-ordered memory model archs such
2976          * as IA-64. The following barrier is also mandatory since FW will
2977          * assumes packets must have BDs.
2978          */
2979         wmb();
2980
2981         txdata->tx_db.data.prod += nbd;
2982         barrier();
2983
2984         DOORBELL(bp, txdata->cid, txdata->tx_db.raw);
2985
2986         mmiowb();
2987
2988         txdata->tx_bd_prod += nbd;
2989
2990         if (unlikely(bnx2x_tx_avail(bp, txdata) < MAX_SKB_FRAGS + 3)) {
2991                 netif_tx_stop_queue(txq);
2992
2993                 /* paired memory barrier is in bnx2x_tx_int(), we have to keep
2994                  * ordering of set_bit() in netif_tx_stop_queue() and read of
2995                  * fp->bd_tx_cons */
2996                 smp_mb();
2997
2998                 fp->eth_q_stats.driver_xoff++;
2999                 if (bnx2x_tx_avail(bp, txdata) >= MAX_SKB_FRAGS + 3)
3000                         netif_tx_wake_queue(txq);
3001         }
3002         txdata->tx_pkt++;
3003
3004         return NETDEV_TX_OK;
3005 }
3006
3007 /**
3008  * bnx2x_setup_tc - routine to configure net_device for multi tc
3009  *
3010  * @netdev: net device to configure
3011  * @tc: number of traffic classes to enable
3012  *
3013  * callback connected to the ndo_setup_tc function pointer
3014  */
3015 int bnx2x_setup_tc(struct net_device *dev, u8 num_tc)
3016 {
3017         int cos, prio, count, offset;
3018         struct bnx2x *bp = netdev_priv(dev);
3019
3020         /* setup tc must be called under rtnl lock */
3021         ASSERT_RTNL();
3022
3023         /* no traffic classes requested. aborting */
3024         if (!num_tc) {
3025                 netdev_reset_tc(dev);
3026                 return 0;
3027         }
3028
3029         /* requested to support too many traffic classes */
3030         if (num_tc > bp->max_cos) {
3031                 BNX2X_ERR("support for too many traffic classes requested: %d. max supported is %d\n",
3032                           num_tc, bp->max_cos);
3033                 return -EINVAL;
3034         }
3035
3036         /* declare amount of supported traffic classes */
3037         if (netdev_set_num_tc(dev, num_tc)) {
3038                 BNX2X_ERR("failed to declare %d traffic classes\n", num_tc);
3039                 return -EINVAL;
3040         }
3041
3042         /* configure priority to traffic class mapping */
3043         for (prio = 0; prio < BNX2X_MAX_PRIORITY; prio++) {
3044                 netdev_set_prio_tc_map(dev, prio, bp->prio_to_cos[prio]);
3045                 DP(BNX2X_MSG_SP | NETIF_MSG_IFUP,
3046                    "mapping priority %d to tc %d\n",
3047                    prio, bp->prio_to_cos[prio]);
3048         }
3049
3050
3051         /* Use this configuration to diffrentiate tc0 from other COSes
3052            This can be used for ets or pfc, and save the effort of setting
3053            up a multio class queue disc or negotiating DCBX with a switch
3054         netdev_set_prio_tc_map(dev, 0, 0);
3055         DP(BNX2X_MSG_SP, "mapping priority %d to tc %d\n", 0, 0);
3056         for (prio = 1; prio < 16; prio++) {
3057                 netdev_set_prio_tc_map(dev, prio, 1);
3058                 DP(BNX2X_MSG_SP, "mapping priority %d to tc %d\n", prio, 1);
3059         } */
3060
3061         /* configure traffic class to transmission queue mapping */
3062         for (cos = 0; cos < bp->max_cos; cos++) {
3063                 count = BNX2X_NUM_ETH_QUEUES(bp);
3064                 offset = cos * MAX_TXQS_PER_COS;
3065                 netdev_set_tc_queue(dev, cos, count, offset);
3066                 DP(BNX2X_MSG_SP | NETIF_MSG_IFUP,
3067                    "mapping tc %d to offset %d count %d\n",
3068                    cos, offset, count);
3069         }
3070
3071         return 0;
3072 }
3073
3074 /* called with rtnl_lock */
3075 int bnx2x_change_mac_addr(struct net_device *dev, void *p)
3076 {
3077         struct sockaddr *addr = p;
3078         struct bnx2x *bp = netdev_priv(dev);
3079         int rc = 0;
3080
3081         if (!bnx2x_is_valid_ether_addr(bp, addr->sa_data)) {
3082                 BNX2X_ERR("Requested MAC address is not valid\n");
3083                 return -EINVAL;
3084         }
3085
3086 #ifdef BCM_CNIC
3087         if (IS_MF_STORAGE_SD(bp) && !is_zero_ether_addr(addr->sa_data)) {
3088                 BNX2X_ERR("Can't configure non-zero address on iSCSI or FCoE functions in MF-SD mode\n");
3089                 return -EINVAL;
3090         }
3091 #endif
3092
3093         if (netif_running(dev))  {
3094                 rc = bnx2x_set_eth_mac(bp, false);
3095                 if (rc)
3096                         return rc;
3097         }
3098
3099         dev->addr_assign_type &= ~NET_ADDR_RANDOM;
3100         memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
3101
3102         if (netif_running(dev))
3103                 rc = bnx2x_set_eth_mac(bp, true);
3104
3105         return rc;
3106 }
3107
3108 static void bnx2x_free_fp_mem_at(struct bnx2x *bp, int fp_index)
3109 {
3110         union host_hc_status_block *sb = &bnx2x_fp(bp, fp_index, status_blk);
3111         struct bnx2x_fastpath *fp = &bp->fp[fp_index];
3112         u8 cos;
3113
3114         /* Common */
3115 #ifdef BCM_CNIC
3116         if (IS_FCOE_IDX(fp_index)) {
3117                 memset(sb, 0, sizeof(union host_hc_status_block));
3118                 fp->status_blk_mapping = 0;
3119
3120         } else {
3121 #endif
3122                 /* status blocks */
3123                 if (!CHIP_IS_E1x(bp))
3124                         BNX2X_PCI_FREE(sb->e2_sb,
3125                                        bnx2x_fp(bp, fp_index,
3126                                                 status_blk_mapping),
3127                                        sizeof(struct host_hc_status_block_e2));
3128                 else
3129                         BNX2X_PCI_FREE(sb->e1x_sb,
3130                                        bnx2x_fp(bp, fp_index,
3131                                                 status_blk_mapping),
3132                                        sizeof(struct host_hc_status_block_e1x));
3133 #ifdef BCM_CNIC
3134         }
3135 #endif
3136         /* Rx */
3137         if (!skip_rx_queue(bp, fp_index)) {
3138                 bnx2x_free_rx_bds(fp);
3139
3140                 /* fastpath rx rings: rx_buf rx_desc rx_comp */
3141                 BNX2X_FREE(bnx2x_fp(bp, fp_index, rx_buf_ring));
3142                 BNX2X_PCI_FREE(bnx2x_fp(bp, fp_index, rx_desc_ring),
3143                                bnx2x_fp(bp, fp_index, rx_desc_mapping),
3144                                sizeof(struct eth_rx_bd) * NUM_RX_BD);
3145
3146                 BNX2X_PCI_FREE(bnx2x_fp(bp, fp_index, rx_comp_ring),
3147                                bnx2x_fp(bp, fp_index, rx_comp_mapping),
3148                                sizeof(struct eth_fast_path_rx_cqe) *
3149                                NUM_RCQ_BD);
3150
3151                 /* SGE ring */
3152                 BNX2X_FREE(bnx2x_fp(bp, fp_index, rx_page_ring));
3153                 BNX2X_PCI_FREE(bnx2x_fp(bp, fp_index, rx_sge_ring),
3154                                bnx2x_fp(bp, fp_index, rx_sge_mapping),
3155                                BCM_PAGE_SIZE * NUM_RX_SGE_PAGES);
3156         }
3157
3158         /* Tx */
3159         if (!skip_tx_queue(bp, fp_index)) {
3160                 /* fastpath tx rings: tx_buf tx_desc */
3161                 for_each_cos_in_tx_queue(fp, cos) {
3162                         struct bnx2x_fp_txdata *txdata = &fp->txdata[cos];
3163
3164                         DP(NETIF_MSG_IFDOWN,
3165                            "freeing tx memory of fp %d cos %d cid %d\n",
3166                            fp_index, cos, txdata->cid);
3167
3168                         BNX2X_FREE(txdata->tx_buf_ring);
3169                         BNX2X_PCI_FREE(txdata->tx_desc_ring,
3170                                 txdata->tx_desc_mapping,
3171                                 sizeof(union eth_tx_bd_types) * NUM_TX_BD);
3172                 }
3173         }
3174         /* end of fastpath */
3175 }
3176
3177 void bnx2x_free_fp_mem(struct bnx2x *bp)
3178 {
3179         int i;
3180         for_each_queue(bp, i)
3181                 bnx2x_free_fp_mem_at(bp, i);
3182 }
3183
3184 static inline void set_sb_shortcuts(struct bnx2x *bp, int index)
3185 {
3186         union host_hc_status_block status_blk = bnx2x_fp(bp, index, status_blk);
3187         if (!CHIP_IS_E1x(bp)) {
3188                 bnx2x_fp(bp, index, sb_index_values) =
3189                         (__le16 *)status_blk.e2_sb->sb.index_values;
3190                 bnx2x_fp(bp, index, sb_running_index) =
3191                         (__le16 *)status_blk.e2_sb->sb.running_index;
3192         } else {
3193                 bnx2x_fp(bp, index, sb_index_values) =
3194                         (__le16 *)status_blk.e1x_sb->sb.index_values;
3195                 bnx2x_fp(bp, index, sb_running_index) =
3196                         (__le16 *)status_blk.e1x_sb->sb.running_index;
3197         }
3198 }
3199
3200 static int bnx2x_alloc_fp_mem_at(struct bnx2x *bp, int index)
3201 {
3202         union host_hc_status_block *sb;
3203         struct bnx2x_fastpath *fp = &bp->fp[index];
3204         int ring_size = 0;
3205         u8 cos;
3206         int rx_ring_size = 0;
3207
3208 #ifdef BCM_CNIC
3209         if (!bp->rx_ring_size && IS_MF_STORAGE_SD(bp)) {
3210                 rx_ring_size = MIN_RX_SIZE_NONTPA;
3211                 bp->rx_ring_size = rx_ring_size;
3212         } else
3213 #endif
3214         if (!bp->rx_ring_size) {
3215                 u32 cfg = SHMEM_RD(bp,
3216                              dev_info.port_hw_config[BP_PORT(bp)].default_cfg);
3217
3218                 rx_ring_size = MAX_RX_AVAIL/BNX2X_NUM_RX_QUEUES(bp);
3219
3220                 /* Dercease ring size for 1G functions */
3221                 if ((cfg & PORT_HW_CFG_NET_SERDES_IF_MASK) ==
3222                     PORT_HW_CFG_NET_SERDES_IF_SGMII)
3223                         rx_ring_size /= 10;
3224
3225                 /* allocate at least number of buffers required by FW */
3226                 rx_ring_size = max_t(int, bp->disable_tpa ? MIN_RX_SIZE_NONTPA :
3227                                      MIN_RX_SIZE_TPA, rx_ring_size);
3228
3229                 bp->rx_ring_size = rx_ring_size;
3230         } else /* if rx_ring_size specified - use it */
3231                 rx_ring_size = bp->rx_ring_size;
3232
3233         /* Common */
3234         sb = &bnx2x_fp(bp, index, status_blk);
3235 #ifdef BCM_CNIC
3236         if (!IS_FCOE_IDX(index)) {
3237 #endif
3238                 /* status blocks */
3239                 if (!CHIP_IS_E1x(bp))
3240                         BNX2X_PCI_ALLOC(sb->e2_sb,
3241                                 &bnx2x_fp(bp, index, status_blk_mapping),
3242                                 sizeof(struct host_hc_status_block_e2));
3243                 else
3244                         BNX2X_PCI_ALLOC(sb->e1x_sb,
3245                                 &bnx2x_fp(bp, index, status_blk_mapping),
3246                             sizeof(struct host_hc_status_block_e1x));
3247 #ifdef BCM_CNIC
3248         }
3249 #endif
3250
3251         /* FCoE Queue uses Default SB and doesn't ACK the SB, thus no need to
3252          * set shortcuts for it.
3253          */
3254         if (!IS_FCOE_IDX(index))
3255                 set_sb_shortcuts(bp, index);
3256
3257         /* Tx */
3258         if (!skip_tx_queue(bp, index)) {
3259                 /* fastpath tx rings: tx_buf tx_desc */
3260                 for_each_cos_in_tx_queue(fp, cos) {
3261                         struct bnx2x_fp_txdata *txdata = &fp->txdata[cos];
3262
3263                         DP(NETIF_MSG_IFUP,
3264                            "allocating tx memory of fp %d cos %d\n",
3265                            index, cos);
3266
3267                         BNX2X_ALLOC(txdata->tx_buf_ring,
3268                                 sizeof(struct sw_tx_bd) * NUM_TX_BD);
3269                         BNX2X_PCI_ALLOC(txdata->tx_desc_ring,
3270                                 &txdata->tx_desc_mapping,
3271                                 sizeof(union eth_tx_bd_types) * NUM_TX_BD);
3272                 }
3273         }
3274
3275         /* Rx */
3276         if (!skip_rx_queue(bp, index)) {
3277                 /* fastpath rx rings: rx_buf rx_desc rx_comp */
3278                 BNX2X_ALLOC(bnx2x_fp(bp, index, rx_buf_ring),
3279                                 sizeof(struct sw_rx_bd) * NUM_RX_BD);
3280                 BNX2X_PCI_ALLOC(bnx2x_fp(bp, index, rx_desc_ring),
3281                                 &bnx2x_fp(bp, index, rx_desc_mapping),
3282                                 sizeof(struct eth_rx_bd) * NUM_RX_BD);
3283
3284                 BNX2X_PCI_ALLOC(bnx2x_fp(bp, index, rx_comp_ring),
3285                                 &bnx2x_fp(bp, index, rx_comp_mapping),
3286                                 sizeof(struct eth_fast_path_rx_cqe) *
3287                                 NUM_RCQ_BD);
3288
3289                 /* SGE ring */
3290                 BNX2X_ALLOC(bnx2x_fp(bp, index, rx_page_ring),
3291                                 sizeof(struct sw_rx_page) * NUM_RX_SGE);
3292                 BNX2X_PCI_ALLOC(bnx2x_fp(bp, index, rx_sge_ring),
3293                                 &bnx2x_fp(bp, index, rx_sge_mapping),
3294                                 BCM_PAGE_SIZE * NUM_RX_SGE_PAGES);
3295                 /* RX BD ring */
3296                 bnx2x_set_next_page_rx_bd(fp);
3297
3298                 /* CQ ring */
3299                 bnx2x_set_next_page_rx_cq(fp);
3300
3301                 /* BDs */
3302                 ring_size = bnx2x_alloc_rx_bds(fp, rx_ring_size);
3303                 if (ring_size < rx_ring_size)
3304                         goto alloc_mem_err;
3305         }
3306
3307         return 0;
3308
3309 /* handles low memory cases */
3310 alloc_mem_err:
3311         BNX2X_ERR("Unable to allocate full memory for queue %d (size %d)\n",
3312                                                 index, ring_size);
3313         /* FW will drop all packets if queue is not big enough,
3314          * In these cases we disable the queue
3315          * Min size is different for OOO, TPA and non-TPA queues
3316          */
3317         if (ring_size < (fp->disable_tpa ?
3318                                 MIN_RX_SIZE_NONTPA : MIN_RX_SIZE_TPA)) {
3319                         /* release memory allocated for this queue */
3320                         bnx2x_free_fp_mem_at(bp, index);
3321                         return -ENOMEM;
3322         }
3323         return 0;
3324 }
3325
3326 int bnx2x_alloc_fp_mem(struct bnx2x *bp)
3327 {
3328         int i;
3329
3330         /**
3331          * 1. Allocate FP for leading - fatal if error
3332          * 2. {CNIC} Allocate FCoE FP - fatal if error
3333          * 3. {CNIC} Allocate OOO + FWD - disable OOO if error
3334          * 4. Allocate RSS - fix number of queues if error
3335          */
3336
3337         /* leading */
3338         if (bnx2x_alloc_fp_mem_at(bp, 0))
3339                 return -ENOMEM;
3340
3341 #ifdef BCM_CNIC
3342         if (!NO_FCOE(bp))
3343                 /* FCoE */
3344                 if (bnx2x_alloc_fp_mem_at(bp, FCOE_IDX))
3345                         /* we will fail load process instead of mark
3346                          * NO_FCOE_FLAG
3347                          */
3348                         return -ENOMEM;
3349 #endif
3350
3351         /* RSS */
3352         for_each_nondefault_eth_queue(bp, i)
3353                 if (bnx2x_alloc_fp_mem_at(bp, i))
3354                         break;
3355
3356         /* handle memory failures */
3357         if (i != BNX2X_NUM_ETH_QUEUES(bp)) {
3358                 int delta = BNX2X_NUM_ETH_QUEUES(bp) - i;
3359
3360                 WARN_ON(delta < 0);
3361 #ifdef BCM_CNIC
3362                 /**
3363                  * move non eth FPs next to last eth FP
3364                  * must be done in that order
3365                  * FCOE_IDX < FWD_IDX < OOO_IDX
3366                  */
3367
3368                 /* move FCoE fp even NO_FCOE_FLAG is on */
3369                 bnx2x_move_fp(bp, FCOE_IDX, FCOE_IDX - delta);
3370 #endif
3371                 bp->num_queues -= delta;
3372                 BNX2X_ERR("Adjusted num of queues from %d to %d\n",
3373                           bp->num_queues + delta, bp->num_queues);
3374         }
3375
3376         return 0;
3377 }
3378
3379 void bnx2x_free_mem_bp(struct bnx2x *bp)
3380 {
3381         kfree(bp->fp);
3382         kfree(bp->msix_table);
3383         kfree(bp->ilt);
3384 }
3385
3386 int __devinit bnx2x_alloc_mem_bp(struct bnx2x *bp)
3387 {
3388         struct bnx2x_fastpath *fp;
3389         struct msix_entry *tbl;
3390         struct bnx2x_ilt *ilt;
3391         int msix_table_size = 0;
3392
3393         /*
3394          * The biggest MSI-X table we might need is as a maximum number of fast
3395          * path IGU SBs plus default SB (for PF).
3396          */
3397         msix_table_size = bp->igu_sb_cnt + 1;
3398
3399         /* fp array: RSS plus CNIC related L2 queues */
3400         fp = kcalloc(BNX2X_MAX_RSS_COUNT(bp) + NON_ETH_CONTEXT_USE,
3401                      sizeof(*fp), GFP_KERNEL);
3402         if (!fp)
3403                 goto alloc_err;
3404         bp->fp = fp;
3405
3406         /* msix table */
3407         tbl = kcalloc(msix_table_size, sizeof(*tbl), GFP_KERNEL);
3408         if (!tbl)
3409                 goto alloc_err;
3410         bp->msix_table = tbl;
3411
3412         /* ilt */
3413         ilt = kzalloc(sizeof(*ilt), GFP_KERNEL);
3414         if (!ilt)
3415                 goto alloc_err;
3416         bp->ilt = ilt;
3417
3418         return 0;
3419 alloc_err:
3420         bnx2x_free_mem_bp(bp);
3421         return -ENOMEM;
3422
3423 }
3424
3425 int bnx2x_reload_if_running(struct net_device *dev)
3426 {
3427         struct bnx2x *bp = netdev_priv(dev);
3428
3429         if (unlikely(!netif_running(dev)))
3430                 return 0;
3431
3432         bnx2x_nic_unload(bp, UNLOAD_NORMAL);
3433         return bnx2x_nic_load(bp, LOAD_NORMAL);
3434 }
3435
3436 int bnx2x_get_cur_phy_idx(struct bnx2x *bp)
3437 {
3438         u32 sel_phy_idx = 0;
3439         if (bp->link_params.num_phys <= 1)
3440                 return INT_PHY;
3441
3442         if (bp->link_vars.link_up) {
3443                 sel_phy_idx = EXT_PHY1;
3444                 /* In case link is SERDES, check if the EXT_PHY2 is the one */
3445                 if ((bp->link_vars.link_status & LINK_STATUS_SERDES_LINK) &&
3446                     (bp->link_params.phy[EXT_PHY2].supported & SUPPORTED_FIBRE))
3447                         sel_phy_idx = EXT_PHY2;
3448         } else {
3449
3450                 switch (bnx2x_phy_selection(&bp->link_params)) {
3451                 case PORT_HW_CFG_PHY_SELECTION_HARDWARE_DEFAULT:
3452                 case PORT_HW_CFG_PHY_SELECTION_FIRST_PHY:
3453                 case PORT_HW_CFG_PHY_SELECTION_FIRST_PHY_PRIORITY:
3454                        sel_phy_idx = EXT_PHY1;
3455                        break;
3456                 case PORT_HW_CFG_PHY_SELECTION_SECOND_PHY:
3457                 case PORT_HW_CFG_PHY_SELECTION_SECOND_PHY_PRIORITY:
3458                        sel_phy_idx = EXT_PHY2;
3459                        break;
3460                 }
3461         }
3462
3463         return sel_phy_idx;
3464
3465 }
3466 int bnx2x_get_link_cfg_idx(struct bnx2x *bp)
3467 {
3468         u32 sel_phy_idx = bnx2x_get_cur_phy_idx(bp);
3469         /*
3470          * The selected actived PHY is always after swapping (in case PHY
3471          * swapping is enabled). So when swapping is enabled, we need to reverse
3472          * the configuration
3473          */
3474
3475         if (bp->link_params.multi_phy_config &
3476             PORT_HW_CFG_PHY_SWAPPED_ENABLED) {
3477                 if (sel_phy_idx == EXT_PHY1)
3478                         sel_phy_idx = EXT_PHY2;
3479                 else if (sel_phy_idx == EXT_PHY2)
3480                         sel_phy_idx = EXT_PHY1;
3481         }
3482         return LINK_CONFIG_IDX(sel_phy_idx);
3483 }
3484
3485 #if defined(NETDEV_FCOE_WWNN) && defined(BCM_CNIC)
3486 int bnx2x_fcoe_get_wwn(struct net_device *dev, u64 *wwn, int type)
3487 {
3488         struct bnx2x *bp = netdev_priv(dev);
3489         struct cnic_eth_dev *cp = &bp->cnic_eth_dev;
3490
3491         switch (type) {
3492         case NETDEV_FCOE_WWNN:
3493                 *wwn = HILO_U64(cp->fcoe_wwn_node_name_hi,
3494                                 cp->fcoe_wwn_node_name_lo);
3495                 break;
3496         case NETDEV_FCOE_WWPN:
3497                 *wwn = HILO_U64(cp->fcoe_wwn_port_name_hi,
3498                                 cp->fcoe_wwn_port_name_lo);
3499                 break;
3500         default:
3501                 BNX2X_ERR("Wrong WWN type requested - %d\n", type);
3502                 return -EINVAL;
3503         }
3504
3505         return 0;
3506 }
3507 #endif
3508
3509 /* called with rtnl_lock */
3510 int bnx2x_change_mtu(struct net_device *dev, int new_mtu)
3511 {
3512         struct bnx2x *bp = netdev_priv(dev);
3513
3514         if (bp->recovery_state != BNX2X_RECOVERY_DONE) {
3515                 BNX2X_ERR("Can't perform change MTU during parity recovery\n");
3516                 return -EAGAIN;
3517         }
3518
3519         if ((new_mtu > ETH_MAX_JUMBO_PACKET_SIZE) ||
3520             ((new_mtu + ETH_HLEN) < ETH_MIN_PACKET_SIZE)) {
3521                 BNX2X_ERR("Can't support requested MTU size\n");
3522                 return -EINVAL;
3523         }
3524
3525         /* This does not race with packet allocation
3526          * because the actual alloc size is
3527          * only updated as part of load
3528          */
3529         dev->mtu = new_mtu;
3530
3531         bp->gro_check = bnx2x_need_gro_check(new_mtu);
3532
3533         return bnx2x_reload_if_running(dev);
3534 }
3535
3536 netdev_features_t bnx2x_fix_features(struct net_device *dev,
3537                                      netdev_features_t features)
3538 {
3539         struct bnx2x *bp = netdev_priv(dev);
3540
3541         /* TPA requires Rx CSUM offloading */
3542         if (!(features & NETIF_F_RXCSUM) || bp->disable_tpa) {
3543                 features &= ~NETIF_F_LRO;
3544                 features &= ~NETIF_F_GRO;
3545         }
3546
3547         return features;
3548 }
3549
3550 int bnx2x_set_features(struct net_device *dev, netdev_features_t features)
3551 {
3552         struct bnx2x *bp = netdev_priv(dev);
3553         u32 flags = bp->flags;
3554         bool bnx2x_reload = false;
3555
3556         if (features & NETIF_F_LRO)
3557                 flags |= TPA_ENABLE_FLAG;
3558         else
3559                 flags &= ~TPA_ENABLE_FLAG;
3560
3561         if (features & NETIF_F_GRO)
3562                 flags |= GRO_ENABLE_FLAG;
3563         else
3564                 flags &= ~GRO_ENABLE_FLAG;
3565
3566         if (features & NETIF_F_LOOPBACK) {
3567                 if (bp->link_params.loopback_mode != LOOPBACK_BMAC) {
3568                         bp->link_params.loopback_mode = LOOPBACK_BMAC;
3569                         bnx2x_reload = true;
3570                 }
3571         } else {
3572                 if (bp->link_params.loopback_mode != LOOPBACK_NONE) {
3573                         bp->link_params.loopback_mode = LOOPBACK_NONE;
3574                         bnx2x_reload = true;
3575                 }
3576         }
3577
3578         if (flags ^ bp->flags) {
3579                 bp->flags = flags;
3580                 bnx2x_reload = true;
3581         }
3582
3583         if (bnx2x_reload) {
3584                 if (bp->recovery_state == BNX2X_RECOVERY_DONE)
3585                         return bnx2x_reload_if_running(dev);
3586                 /* else: bnx2x_nic_load() will be called at end of recovery */
3587         }
3588
3589         return 0;
3590 }
3591
3592 void bnx2x_tx_timeout(struct net_device *dev)
3593 {
3594         struct bnx2x *bp = netdev_priv(dev);
3595
3596 #ifdef BNX2X_STOP_ON_ERROR
3597         if (!bp->panic)
3598                 bnx2x_panic();
3599 #endif
3600
3601         smp_mb__before_clear_bit();
3602         set_bit(BNX2X_SP_RTNL_TX_TIMEOUT, &bp->sp_rtnl_state);
3603         smp_mb__after_clear_bit();
3604
3605         /* This allows the netif to be shutdown gracefully before resetting */
3606         schedule_delayed_work(&bp->sp_rtnl_task, 0);
3607 }
3608
3609 int bnx2x_suspend(struct pci_dev *pdev, pm_message_t state)
3610 {
3611         struct net_device *dev = pci_get_drvdata(pdev);
3612         struct bnx2x *bp;
3613
3614         if (!dev) {
3615                 dev_err(&pdev->dev, "BAD net device from bnx2x_init_one\n");
3616                 return -ENODEV;
3617         }
3618         bp = netdev_priv(dev);
3619
3620         rtnl_lock();
3621
3622         pci_save_state(pdev);
3623
3624         if (!netif_running(dev)) {
3625                 rtnl_unlock();
3626                 return 0;
3627         }
3628
3629         netif_device_detach(dev);
3630
3631         bnx2x_nic_unload(bp, UNLOAD_CLOSE);
3632
3633         bnx2x_set_power_state(bp, pci_choose_state(pdev, state));
3634
3635         rtnl_unlock();
3636
3637         return 0;
3638 }
3639
3640 int bnx2x_resume(struct pci_dev *pdev)
3641 {
3642         struct net_device *dev = pci_get_drvdata(pdev);
3643         struct bnx2x *bp;
3644         int rc;
3645
3646         if (!dev) {
3647                 dev_err(&pdev->dev, "BAD net device from bnx2x_init_one\n");
3648                 return -ENODEV;
3649         }
3650         bp = netdev_priv(dev);
3651
3652         if (bp->recovery_state != BNX2X_RECOVERY_DONE) {
3653                 BNX2X_ERR("Handling parity error recovery. Try again later\n");
3654                 return -EAGAIN;
3655         }
3656
3657         rtnl_lock();
3658
3659         pci_restore_state(pdev);
3660
3661         if (!netif_running(dev)) {
3662                 rtnl_unlock();
3663                 return 0;
3664         }
3665
3666         bnx2x_set_power_state(bp, PCI_D0);
3667         netif_device_attach(dev);
3668
3669         rc = bnx2x_nic_load(bp, LOAD_OPEN);
3670
3671         rtnl_unlock();
3672
3673         return rc;
3674 }
3675
3676
3677 void bnx2x_set_ctx_validation(struct bnx2x *bp, struct eth_context *cxt,
3678                               u32 cid)
3679 {
3680         /* ustorm cxt validation */
3681         cxt->ustorm_ag_context.cdu_usage =
3682                 CDU_RSRVD_VALUE_TYPE_A(HW_CID(bp, cid),
3683                         CDU_REGION_NUMBER_UCM_AG, ETH_CONNECTION_TYPE);
3684         /* xcontext validation */
3685         cxt->xstorm_ag_context.cdu_reserved =
3686                 CDU_RSRVD_VALUE_TYPE_A(HW_CID(bp, cid),
3687                         CDU_REGION_NUMBER_XCM_AG, ETH_CONNECTION_TYPE);
3688 }
3689
3690 static inline void storm_memset_hc_timeout(struct bnx2x *bp, u8 port,
3691                                              u8 fw_sb_id, u8 sb_index,
3692                                              u8 ticks)
3693 {
3694
3695         u32 addr = BAR_CSTRORM_INTMEM +
3696                    CSTORM_STATUS_BLOCK_DATA_TIMEOUT_OFFSET(fw_sb_id, sb_index);
3697         REG_WR8(bp, addr, ticks);
3698         DP(NETIF_MSG_IFUP,
3699            "port %x fw_sb_id %d sb_index %d ticks %d\n",
3700            port, fw_sb_id, sb_index, ticks);
3701 }
3702
3703 static inline void storm_memset_hc_disable(struct bnx2x *bp, u8 port,
3704                                              u16 fw_sb_id, u8 sb_index,
3705                                              u8 disable)
3706 {
3707         u32 enable_flag = disable ? 0 : (1 << HC_INDEX_DATA_HC_ENABLED_SHIFT);
3708         u32 addr = BAR_CSTRORM_INTMEM +
3709                    CSTORM_STATUS_BLOCK_DATA_FLAGS_OFFSET(fw_sb_id, sb_index);
3710         u16 flags = REG_RD16(bp, addr);
3711         /* clear and set */
3712         flags &= ~HC_INDEX_DATA_HC_ENABLED;
3713         flags |= enable_flag;
3714         REG_WR16(bp, addr, flags);
3715         DP(NETIF_MSG_IFUP,
3716            "port %x fw_sb_id %d sb_index %d disable %d\n",
3717            port, fw_sb_id, sb_index, disable);
3718 }
3719
3720 void bnx2x_update_coalesce_sb_index(struct bnx2x *bp, u8 fw_sb_id,
3721                                     u8 sb_index, u8 disable, u16 usec)
3722 {
3723         int port = BP_PORT(bp);
3724         u8 ticks = usec / BNX2X_BTR;
3725
3726         storm_memset_hc_timeout(bp, port, fw_sb_id, sb_index, ticks);
3727
3728         disable = disable ? 1 : (usec ? 0 : 1);
3729         storm_memset_hc_disable(bp, port, fw_sb_id, sb_index, disable);
3730 }