drivers/net/cxgb4/cxgb4_main.c

   1 /*
   2  * This file is part of the Chelsio T4 Ethernet driver for Linux.
   3  *
   4  * Copyright (c) 2003-2010 Chelsio Communications, Inc. All rights reserved.
   5  *
   6  * This software is available to you under a choice of one of two
   7  * licenses.  You may choose to be licensed under the terms of the GNU
   8  * General Public License (GPL) Version 2, available from the file
   9  * COPYING in the main directory of this source tree, or the
  10  * OpenIB.org BSD license below:
  11  *
  12  *     Redistribution and use in source and binary forms, with or
  13  *     without modification, are permitted provided that the following
  14  *     conditions are met:
  15  *
  16  *      - Redistributions of source code must retain the above
  17  *        copyright notice, this list of conditions and the following
  18  *        disclaimer.
  19  *
  20  *      - Redistributions in binary form must reproduce the above
  21  *        copyright notice, this list of conditions and the following
  22  *        disclaimer in the documentation and/or other materials
  23  *        provided with the distribution.
  24  *
  25  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32  * SOFTWARE.
  33  */
  34
  35 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  36
  37 #include <linux/bitmap.h>
  38 #include <linux/crc32.h>
  39 #include <linux/ctype.h>
  40 #include <linux/debugfs.h>
  41 #include <linux/err.h>
  42 #include <linux/etherdevice.h>
  43 #include <linux/firmware.h>
  44 #include <linux/if_vlan.h>
  45 #include <linux/init.h>
  46 #include <linux/log2.h>
  47 #include <linux/mdio.h>
  48 #include <linux/module.h>
  49 #include <linux/moduleparam.h>
  50 #include <linux/mutex.h>
  51 #include <linux/netdevice.h>
  52 #include <linux/pci.h>
  53 #include <linux/aer.h>
  54 #include <linux/rtnetlink.h>
  55 #include <linux/sched.h>
  56 #include <linux/seq_file.h>
  57 #include <linux/sockios.h>
  58 #include <linux/vmalloc.h>
  59 #include <linux/workqueue.h>
  60 #include <net/neighbour.h>
  61 #include <net/netevent.h>
  62 #include <asm/uaccess.h>
  63
  64 #include "cxgb4.h"
  65 #include "t4_regs.h"
  66 #include "t4_msg.h"
  67 #include "t4fw_api.h"
  68 #include "l2t.h"
  69
  70 #define DRV_VERSION "1.3.0-ko"
  71 #define DRV_DESC "Chelsio T4 Network Driver"
  72
  73 /*
  74  * Max interrupt hold-off timer value in us.  Queues fall back to this value
  75  * under extreme memory pressure so it's largish to give the system time to
  76  * recover.
  77  */
  78 #define MAX_SGE_TIMERVAL 200U
  79
  80 #ifdef CONFIG_PCI_IOV
  81 /*
  82  * Virtual Function provisioning constants.  We need two extra Ingress Queues
  83  * with Interrupt capability to serve as the VF's Firmware Event Queue and
  84  * Forwarded Interrupt Queue (when using MSI mode) -- neither will have Free
  85  * Lists associated with them).  For each Ethernet/Control Egress Queue and
  86  * for each Free List, we need an Egress Context.
  87  */
  88 enum {
  89         VFRES_NPORTS = 1,               /* # of "ports" per VF */
  90         VFRES_NQSETS = 2,               /* # of "Queue Sets" per VF */
  91
  92         VFRES_NVI = VFRES_NPORTS,       /* # of Virtual Interfaces */
  93         VFRES_NETHCTRL = VFRES_NQSETS,  /* # of EQs used for ETH or CTRL Qs */
  94         VFRES_NIQFLINT = VFRES_NQSETS+2,/* # of ingress Qs/w Free List(s)/intr */
  95         VFRES_NIQ = 0,                  /* # of non-fl/int ingress queues */
  96         VFRES_NEQ = VFRES_NQSETS*2,     /* # of egress queues */
  97         VFRES_TC = 0,                   /* PCI-E traffic class */
  98         VFRES_NEXACTF = 16,             /* # of exact MPS filters */
  99
 100         VFRES_R_CAPS = FW_CMD_CAP_DMAQ|FW_CMD_CAP_VF|FW_CMD_CAP_PORT,
 101         VFRES_WX_CAPS = FW_CMD_CAP_DMAQ|FW_CMD_CAP_VF,
 102 };
 103
 104 /*
 105  * Provide a Port Access Rights Mask for the specified PF/VF.  This is very
 106  * static and likely not to be useful in the long run.  We really need to
 107  * implement some form of persistent configuration which the firmware
 108  * controls.
 109  */
 110 static unsigned int pfvfres_pmask(struct adapter *adapter,
 111                                   unsigned int pf, unsigned int vf)
 112 {
 113         unsigned int portn, portvec;
 114
 115         /*
 116          * Give PF's access to all of the ports.
 117          */
 118         if (vf == 0)
 119                 return FW_PFVF_CMD_PMASK_MASK;
 120
 121         /*
 122          * For VFs, we'll assign them access to the ports based purely on the
 123          * PF.  We assign active ports in order, wrapping around if there are
 124          * fewer active ports than PFs: e.g. active port[pf % nports].
 125          * Unfortunately the adapter's port_info structs haven't been
 126          * initialized yet so we have to compute this.
 127          */
 128         if (adapter->params.nports == 0)
 129                 return 0;
 130
 131         portn = pf % adapter->params.nports;
 132         portvec = adapter->params.portvec;
 133         for (;;) {
 134                 /*
 135                  * Isolate the lowest set bit in the port vector.  If we're at
 136                  * the port number that we want, return that as the pmask.
 137                  * otherwise mask that bit out of the port vector and
 138                  * decrement our port number ...
 139                  */
 140                 unsigned int pmask = portvec ^ (portvec & (portvec-1));
 141                 if (portn == 0)
 142                         return pmask;
 143                 portn--;
 144                 portvec &= ~pmask;
 145         }
 146         /*NOTREACHED*/
 147 }
 148 #endif
 149
 150 enum {
 151         MEMWIN0_APERTURE = 65536,
 152         MEMWIN0_BASE     = 0x30000,
 153         MEMWIN1_APERTURE = 32768,
 154         MEMWIN1_BASE     = 0x28000,
 155         MEMWIN2_APERTURE = 2048,
 156         MEMWIN2_BASE     = 0x1b800,
 157 };
 158
 159 enum {
 160         MAX_TXQ_ENTRIES      = 16384,
 161         MAX_CTRL_TXQ_ENTRIES = 1024,
 162         MAX_RSPQ_ENTRIES     = 16384,
 163         MAX_RX_BUFFERS       = 16384,
 164         MIN_TXQ_ENTRIES      = 32,
 165         MIN_CTRL_TXQ_ENTRIES = 32,
 166         MIN_RSPQ_ENTRIES     = 128,
 167         MIN_FL_ENTRIES       = 16
 168 };
 169
 170 #define DFLT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK | \
 171                          NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP |\
 172                          NETIF_MSG_RX_ERR | NETIF_MSG_TX_ERR)
 173
 174 #define CH_DEVICE(devid, data) { PCI_VDEVICE(CHELSIO, devid), (data) }
 175
 176 static DEFINE_PCI_DEVICE_TABLE(cxgb4_pci_tbl) = {
 177         CH_DEVICE(0xa000, 0),  /* PE10K */
 178         CH_DEVICE(0x4001, -1),
 179         CH_DEVICE(0x4002, -1),
 180         CH_DEVICE(0x4003, -1),
 181         CH_DEVICE(0x4004, -1),
 182         CH_DEVICE(0x4005, -1),
 183         CH_DEVICE(0x4006, -1),
 184         CH_DEVICE(0x4007, -1),
 185         CH_DEVICE(0x4008, -1),
 186         CH_DEVICE(0x4009, -1),
 187         CH_DEVICE(0x400a, -1),
 188         CH_DEVICE(0x4401, 4),
 189         CH_DEVICE(0x4402, 4),
 190         CH_DEVICE(0x4403, 4),
 191         CH_DEVICE(0x4404, 4),
 192         CH_DEVICE(0x4405, 4),
 193         CH_DEVICE(0x4406, 4),
 194         CH_DEVICE(0x4407, 4),
 195         CH_DEVICE(0x4408, 4),
 196         CH_DEVICE(0x4409, 4),
 197         CH_DEVICE(0x440a, 4),
 198         { 0, }
 199 };
 200
 201 #define FW_FNAME "cxgb4/t4fw.bin"
 202
 203 MODULE_DESCRIPTION(DRV_DESC);
 204 MODULE_AUTHOR("Chelsio Communications");
 205 MODULE_LICENSE("Dual BSD/GPL");
 206 MODULE_VERSION(DRV_VERSION);
 207 MODULE_DEVICE_TABLE(pci, cxgb4_pci_tbl);
 208 MODULE_FIRMWARE(FW_FNAME);
 209
 210 static int dflt_msg_enable = DFLT_MSG_ENABLE;
 211
 212 module_param(dflt_msg_enable, int, 0644);
 213 MODULE_PARM_DESC(dflt_msg_enable, "Chelsio T4 default message enable bitmap");
 214
 215 /*
 216  * The driver uses the best interrupt scheme available on a platform in the
 217  * order MSI-X, MSI, legacy INTx interrupts.  This parameter determines which
 218  * of these schemes the driver may consider as follows:
 219  *
 220  * msi = 2: choose from among all three options
 221  * msi = 1: only consider MSI and INTx interrupts
 222  * msi = 0: force INTx interrupts
 223  */
 224 static int msi = 2;
 225
 226 module_param(msi, int, 0644);
 227 MODULE_PARM_DESC(msi, "whether to use INTx (0), MSI (1) or MSI-X (2)");
 228
 229 /*
 230  * Queue interrupt hold-off timer values.  Queues default to the first of these
 231  * upon creation.
 232  */
 233 static unsigned int intr_holdoff[SGE_NTIMERS - 1] = { 5, 10, 20, 50, 100 };
 234
 235 module_param_array(intr_holdoff, uint, NULL, 0644);
 236 MODULE_PARM_DESC(intr_holdoff, "values for queue interrupt hold-off timers "
 237                  "0..4 in microseconds");
 238
 239 static unsigned int intr_cnt[SGE_NCOUNTERS - 1] = { 4, 8, 16 };
 240
 241 module_param_array(intr_cnt, uint, NULL, 0644);
 242 MODULE_PARM_DESC(intr_cnt,
 243                  "thresholds 1..3 for queue interrupt packet counters");
 244
 245 static int vf_acls;
 246
 247 #ifdef CONFIG_PCI_IOV
 248 module_param(vf_acls, bool, 0644);
 249 MODULE_PARM_DESC(vf_acls, "if set enable virtualization L2 ACL enforcement");
 250
 251 static unsigned int num_vf[4];
 252
 253 module_param_array(num_vf, uint, NULL, 0644);
 254 MODULE_PARM_DESC(num_vf, "number of VFs for each of PFs 0-3");
 255 #endif
 256
 257 static struct dentry *cxgb4_debugfs_root;
 258
 259 static LIST_HEAD(adapter_list);
 260 static DEFINE_MUTEX(uld_mutex);
 261 static struct cxgb4_uld_info ulds[CXGB4_ULD_MAX];
 262 static const char *uld_str[] = { "RDMA", "iSCSI" };
 263
 264 static void link_report(struct net_device *dev)
 265 {
 266         if (!netif_carrier_ok(dev))
 267                 netdev_info(dev, "link down\n");
 268         else {
 269                 static const char *fc[] = { "no", "Rx", "Tx", "Tx/Rx" };
 270
 271                 const char *s = "10Mbps";
 272                 const struct port_info *p = netdev_priv(dev);
 273
 274                 switch (p->link_cfg.speed) {
 275                 case SPEED_10000:
 276                         s = "10Gbps";
 277                         break;
 278                 case SPEED_1000:
 279                         s = "1000Mbps";
 280                         break;
 281                 case SPEED_100:
 282                         s = "100Mbps";
 283                         break;
 284                 }
 285
 286                 netdev_info(dev, "link up, %s, full-duplex, %s PAUSE\n", s,
 287                             fc[p->link_cfg.fc]);
 288         }
 289 }
 290
 291 void t4_os_link_changed(struct adapter *adapter, int port_id, int link_stat)
 292 {
 293         struct net_device *dev = adapter->port[port_id];
 294
 295         /* Skip changes from disabled ports. */
 296         if (netif_running(dev) && link_stat != netif_carrier_ok(dev)) {
 297                 if (link_stat)
 298                         netif_carrier_on(dev);
 299                 else
 300                         netif_carrier_off(dev);
 301
 302                 link_report(dev);
 303         }
 304 }
 305
 306 void t4_os_portmod_changed(const struct adapter *adap, int port_id)
 307 {
 308         static const char *mod_str[] = {
 309                 NULL, "LR", "SR", "ER", "passive DA", "active DA", "LRM"
 310         };
 311
 312         const struct net_device *dev = adap->port[port_id];
 313         const struct port_info *pi = netdev_priv(dev);
 314
 315         if (pi->mod_type == FW_PORT_MOD_TYPE_NONE)
 316                 netdev_info(dev, "port module unplugged\n");
 317         else if (pi->mod_type < ARRAY_SIZE(mod_str))
 318                 netdev_info(dev, "%s module inserted\n", mod_str[pi->mod_type]);
 319 }
 320
 321 /*
 322  * Configure the exact and hash address filters to handle a port's multicast
 323  * and secondary unicast MAC addresses.
 324  */
 325 static int set_addr_filters(const struct net_device *dev, bool sleep)
 326 {
 327         u64 mhash = 0;
 328         u64 uhash = 0;
 329         bool free = true;
 330         u16 filt_idx[7];
 331         const u8 *addr[7];
 332         int ret, naddr = 0;
 333         const struct netdev_hw_addr *ha;
 334         int uc_cnt = netdev_uc_count(dev);
 335         int mc_cnt = netdev_mc_count(dev);
 336         const struct port_info *pi = netdev_priv(dev);
 337         unsigned int mb = pi->adapter->fn;
 338
 339         /* first do the secondary unicast addresses */
 340         netdev_for_each_uc_addr(ha, dev) {
 341                 addr[naddr++] = ha->addr;
 342                 if (--uc_cnt == 0 || naddr >= ARRAY_SIZE(addr)) {
 343                         ret = t4_alloc_mac_filt(pi->adapter, mb, pi->viid, free,
 344                                         naddr, addr, filt_idx, &uhash, sleep);
 345                         if (ret < 0)
 346                                 return ret;
 347
 348                         free = false;
 349                         naddr = 0;
 350                 }
 351         }
 352
 353         /* next set up the multicast addresses */
 354         netdev_for_each_mc_addr(ha, dev) {
 355                 addr[naddr++] = ha->addr;
 356                 if (--mc_cnt == 0 || naddr >= ARRAY_SIZE(addr)) {
 357                         ret = t4_alloc_mac_filt(pi->adapter, mb, pi->viid, free,
 358                                         naddr, addr, filt_idx, &mhash, sleep);
 359                         if (ret < 0)
 360                                 return ret;
 361
 362                         free = false;
 363                         naddr = 0;
 364                 }
 365         }
 366
 367         return t4_set_addr_hash(pi->adapter, mb, pi->viid, uhash != 0,
 368                                 uhash | mhash, sleep);
 369 }
 370
 371 /*
 372  * Set Rx properties of a port, such as promiscruity, address filters, and MTU.
 373  * If @mtu is -1 it is left unchanged.
 374  */
 375 static int set_rxmode(struct net_device *dev, int mtu, bool sleep_ok)
 376 {
 377         int ret;
 378         struct port_info *pi = netdev_priv(dev);
 379
 380         ret = set_addr_filters(dev, sleep_ok);
 381         if (ret == 0)
 382                 ret = t4_set_rxmode(pi->adapter, pi->adapter->fn, pi->viid, mtu,
 383                                     (dev->flags & IFF_PROMISC) ? 1 : 0,
 384                                     (dev->flags & IFF_ALLMULTI) ? 1 : 0, 1, -1,
 385                                     sleep_ok);
 386         return ret;
 387 }
 388
 389 /**
 390  *      link_start - enable a port
 391  *      @dev: the port to enable
 392  *
 393  *      Performs the MAC and PHY actions needed to enable a port.
 394  */
 395 static int link_start(struct net_device *dev)
 396 {
 397         int ret;
 398         struct port_info *pi = netdev_priv(dev);
 399         unsigned int mb = pi->adapter->fn;
 400
 401         /*
 402          * We do not set address filters and promiscuity here, the stack does
 403          * that step explicitly.
 404          */
 405         ret = t4_set_rxmode(pi->adapter, mb, pi->viid, dev->mtu, -1, -1, -1,
 406                             pi->vlan_grp != NULL, true);
 407         if (ret == 0) {
 408                 ret = t4_change_mac(pi->adapter, mb, pi->viid,
 409                                     pi->xact_addr_filt, dev->dev_addr, true,
 410                                     true);
 411                 if (ret >= 0) {
 412                         pi->xact_addr_filt = ret;
 413                         ret = 0;
 414                 }
 415         }
 416         if (ret == 0)
 417                 ret = t4_link_start(pi->adapter, mb, pi->tx_chan,
 418                                     &pi->link_cfg);
 419         if (ret == 0)
 420                 ret = t4_enable_vi(pi->adapter, mb, pi->viid, true, true);
 421         return ret;
 422 }
 423
 424 /*
 425  * Response queue handler for the FW event queue.
 426  */
 427 static int fwevtq_handler(struct sge_rspq *q, const __be64 *rsp,
 428                           const struct pkt_gl *gl)
 429 {
 430         u8 opcode = ((const struct rss_header *)rsp)->opcode;
 431
 432         rsp++;                                          /* skip RSS header */
 433         if (likely(opcode == CPL_SGE_EGR_UPDATE)) {
 434                 const struct cpl_sge_egr_update *p = (void *)rsp;
 435                 unsigned int qid = EGR_QID(ntohl(p->opcode_qid));
 436                 struct sge_txq *txq;
 437
 438                 txq = q->adap->sge.egr_map[qid - q->adap->sge.egr_start];
 439                 txq->restarts++;
 440                 if ((u8 *)txq < (u8 *)q->adap->sge.ofldtxq) {
 441                         struct sge_eth_txq *eq;
 442
 443                         eq = container_of(txq, struct sge_eth_txq, q);
 444                         netif_tx_wake_queue(eq->txq);
 445                 } else {
 446                         struct sge_ofld_txq *oq;
 447
 448                         oq = container_of(txq, struct sge_ofld_txq, q);
 449                         tasklet_schedule(&oq->qresume_tsk);
 450                 }
 451         } else if (opcode == CPL_FW6_MSG || opcode == CPL_FW4_MSG) {
 452                 const struct cpl_fw6_msg *p = (void *)rsp;
 453
 454                 if (p->type == 0)
 455                         t4_handle_fw_rpl(q->adap, p->data);
 456         } else if (opcode == CPL_L2T_WRITE_RPL) {
 457                 const struct cpl_l2t_write_rpl *p = (void *)rsp;
 458
 459                 do_l2t_write_rpl(q->adap, p);
 460         } else
 461                 dev_err(q->adap->pdev_dev,
 462                         "unexpected CPL %#x on FW event queue\n", opcode);
 463         return 0;
 464 }
 465
 466 /**
 467  *      uldrx_handler - response queue handler for ULD queues
 468  *      @q: the response queue that received the packet
 469  *      @rsp: the response queue descriptor holding the offload message
 470  *      @gl: the gather list of packet fragments
 471  *
 472  *      Deliver an ingress offload packet to a ULD.  All processing is done by
 473  *      the ULD, we just maintain statistics.
 474  */
 475 static int uldrx_handler(struct sge_rspq *q, const __be64 *rsp,
 476                          const struct pkt_gl *gl)
 477 {
 478         struct sge_ofld_rxq *rxq = container_of(q, struct sge_ofld_rxq, rspq);
 479
 480         if (ulds[q->uld].rx_handler(q->adap->uld_handle[q->uld], rsp, gl)) {
 481                 rxq->stats.nomem++;
 482                 return -1;
 483         }
 484         if (gl == NULL)
 485                 rxq->stats.imm++;
 486         else if (gl == CXGB4_MSG_AN)
 487                 rxq->stats.an++;
 488         else
 489                 rxq->stats.pkts++;
 490         return 0;
 491 }
 492
 493 static void disable_msi(struct adapter *adapter)
 494 {
 495         if (adapter->flags & USING_MSIX) {
 496                 pci_disable_msix(adapter->pdev);
 497                 adapter->flags &= ~USING_MSIX;
 498         } else if (adapter->flags & USING_MSI) {
 499                 pci_disable_msi(adapter->pdev);
 500                 adapter->flags &= ~USING_MSI;
 501         }
 502 }
 503
 504 /*
 505  * Interrupt handler for non-data events used with MSI-X.
 506  */
 507 static irqreturn_t t4_nondata_intr(int irq, void *cookie)
 508 {
 509         struct adapter *adap = cookie;
 510
 511         u32 v = t4_read_reg(adap, MYPF_REG(PL_PF_INT_CAUSE));
 512         if (v & PFSW) {
 513                 adap->swintr = 1;
 514                 t4_write_reg(adap, MYPF_REG(PL_PF_INT_CAUSE), v);
 515         }
 516         t4_slow_intr_handler(adap);
 517         return IRQ_HANDLED;
 518 }
 519
 520 /*
 521  * Name the MSI-X interrupts.
 522  */
 523 static void name_msix_vecs(struct adapter *adap)
 524 {
 525         int i, j, msi_idx = 2, n = sizeof(adap->msix_info[0].desc) - 1;
 526
 527         /* non-data interrupts */
 528         snprintf(adap->msix_info[0].desc, n, "%s", adap->name);
 529         adap->msix_info[0].desc[n] = 0;
 530
 531         /* FW events */
 532         snprintf(adap->msix_info[1].desc, n, "%s-FWeventq", adap->name);
 533         adap->msix_info[1].desc[n] = 0;
 534
 535         /* Ethernet queues */
 536         for_each_port(adap, j) {
 537                 struct net_device *d = adap->port[j];
 538                 const struct port_info *pi = netdev_priv(d);
 539
 540                 for (i = 0; i < pi->nqsets; i++, msi_idx++) {
 541                         snprintf(adap->msix_info[msi_idx].desc, n, "%s-Rx%d",
 542                                  d->name, i);
 543                         adap->msix_info[msi_idx].desc[n] = 0;
 544                 }
 545         }
 546
 547         /* offload queues */
 548         for_each_ofldrxq(&adap->sge, i) {
 549                 snprintf(adap->msix_info[msi_idx].desc, n, "%s-ofld%d",
 550                          adap->name, i);
 551                 adap->msix_info[msi_idx++].desc[n] = 0;
 552         }
 553         for_each_rdmarxq(&adap->sge, i) {
 554                 snprintf(adap->msix_info[msi_idx].desc, n, "%s-rdma%d",
 555                          adap->name, i);
 556                 adap->msix_info[msi_idx++].desc[n] = 0;
 557         }
 558 }
 559
 560 static int request_msix_queue_irqs(struct adapter *adap)
 561 {
 562         struct sge *s = &adap->sge;
 563         int err, ethqidx, ofldqidx = 0, rdmaqidx = 0, msi = 2;
 564
 565         err = request_irq(adap->msix_info[1].vec, t4_sge_intr_msix, 0,
 566                           adap->msix_info[1].desc, &s->fw_evtq);
 567         if (err)
 568                 return err;
 569
 570         for_each_ethrxq(s, ethqidx) {
 571                 err = request_irq(adap->msix_info[msi].vec, t4_sge_intr_msix, 0,
 572                                   adap->msix_info[msi].desc,
 573                                   &s->ethrxq[ethqidx].rspq);
 574                 if (err)
 575                         goto unwind;
 576                 msi++;
 577         }
 578         for_each_ofldrxq(s, ofldqidx) {
 579                 err = request_irq(adap->msix_info[msi].vec, t4_sge_intr_msix, 0,
 580                                   adap->msix_info[msi].desc,
 581                                   &s->ofldrxq[ofldqidx].rspq);
 582                 if (err)
 583                         goto unwind;
 584                 msi++;
 585         }
 586         for_each_rdmarxq(s, rdmaqidx) {
 587                 err = request_irq(adap->msix_info[msi].vec, t4_sge_intr_msix, 0,
 588                                   adap->msix_info[msi].desc,
 589                                   &s->rdmarxq[rdmaqidx].rspq);
 590                 if (err)
 591                         goto unwind;
 592                 msi++;
 593         }
 594         return 0;
 595
 596 unwind:
 597         while (--rdmaqidx >= 0)
 598                 free_irq(adap->msix_info[--msi].vec,
 599                          &s->rdmarxq[rdmaqidx].rspq);
 600         while (--ofldqidx >= 0)
 601                 free_irq(adap->msix_info[--msi].vec,
 602                          &s->ofldrxq[ofldqidx].rspq);
 603         while (--ethqidx >= 0)
 604                 free_irq(adap->msix_info[--msi].vec, &s->ethrxq[ethqidx].rspq);
 605         free_irq(adap->msix_info[1].vec, &s->fw_evtq);
 606         return err;
 607 }
 608
 609 static void free_msix_queue_irqs(struct adapter *adap)
 610 {
 611         int i, msi = 2;
 612         struct sge *s = &adap->sge;
 613
 614         free_irq(adap->msix_info[1].vec, &s->fw_evtq);
 615         for_each_ethrxq(s, i)
 616                 free_irq(adap->msix_info[msi++].vec, &s->ethrxq[i].rspq);
 617         for_each_ofldrxq(s, i)
 618                 free_irq(adap->msix_info[msi++].vec, &s->ofldrxq[i].rspq);
 619         for_each_rdmarxq(s, i)
 620                 free_irq(adap->msix_info[msi++].vec, &s->rdmarxq[i].rspq);
 621 }
 622
 623 /**
 624  *      write_rss - write the RSS table for a given port
 625  *      @pi: the port
 626  *      @queues: array of queue indices for RSS
 627  *
 628  *      Sets up the portion of the HW RSS table for the port's VI to distribute
 629  *      packets to the Rx queues in @queues.
 630  */
 631 static int write_rss(const struct port_info *pi, const u16 *queues)
 632 {
 633         u16 *rss;
 634         int i, err;
 635         const struct sge_eth_rxq *q = &pi->adapter->sge.ethrxq[pi->first_qset];
 636
 637         rss = kmalloc(pi->rss_size * sizeof(u16), GFP_KERNEL);
 638         if (!rss)
 639                 return -ENOMEM;
 640
 641         /* map the queue indices to queue ids */
 642         for (i = 0; i < pi->rss_size; i++, queues++)
 643                 rss[i] = q[*queues].rspq.abs_id;
 644
 645         err = t4_config_rss_range(pi->adapter, pi->adapter->fn, pi->viid, 0,
 646                                   pi->rss_size, rss, pi->rss_size);
 647         kfree(rss);
 648         return err;
 649 }
 650
 651 /**
 652  *      setup_rss - configure RSS
 653  *      @adap: the adapter
 654  *
 655  *      Sets up RSS for each port.
 656  */
 657 static int setup_rss(struct adapter *adap)
 658 {
 659         int i, err;
 660
 661         for_each_port(adap, i) {
 662                 const struct port_info *pi = adap2pinfo(adap, i);
 663
 664                 err = write_rss(pi, pi->rss);
 665                 if (err)
 666                         return err;
 667         }
 668         return 0;
 669 }
 670
 671 /*
 672  * Return the channel of the ingress queue with the given qid.
 673  */
 674 static unsigned int rxq_to_chan(const struct sge *p, unsigned int qid)
 675 {
 676         qid -= p->ingr_start;
 677         return netdev2pinfo(p->ingr_map[qid]->netdev)->tx_chan;
 678 }
 679
 680 /*
 681  * Wait until all NAPI handlers are descheduled.
 682  */
 683 static void quiesce_rx(struct adapter *adap)
 684 {
 685         int i;
 686
 687         for (i = 0; i < ARRAY_SIZE(adap->sge.ingr_map); i++) {
 688                 struct sge_rspq *q = adap->sge.ingr_map[i];
 689
 690                 if (q && q->handler)
 691                         napi_disable(&q->napi);
 692         }
 693 }
 694
 695 /*
 696  * Enable NAPI scheduling and interrupt generation for all Rx queues.
 697  */
 698 static void enable_rx(struct adapter *adap)
 699 {
 700         int i;
 701
 702         for (i = 0; i < ARRAY_SIZE(adap->sge.ingr_map); i++) {
 703                 struct sge_rspq *q = adap->sge.ingr_map[i];
 704
 705                 if (!q)
 706                         continue;
 707                 if (q->handler)
 708                         napi_enable(&q->napi);
 709                 /* 0-increment GTS to start the timer and enable interrupts */
 710                 t4_write_reg(adap, MYPF_REG(SGE_PF_GTS),
 711                              SEINTARM(q->intr_params) |
 712                              INGRESSQID(q->cntxt_id));
 713         }
 714 }
 715
 716 /**
 717  *      setup_sge_queues - configure SGE Tx/Rx/response queues
 718  *      @adap: the adapter
 719  *
 720  *      Determines how many sets of SGE queues to use and initializes them.
 721  *      We support multiple queue sets per port if we have MSI-X, otherwise
 722  *      just one queue set per port.
 723  */
 724 static int setup_sge_queues(struct adapter *adap)
 725 {
 726         int err, msi_idx, i, j;
 727         struct sge *s = &adap->sge;
 728
 729         bitmap_zero(s->starving_fl, MAX_EGRQ);
 730         bitmap_zero(s->txq_maperr, MAX_EGRQ);
 731
 732         if (adap->flags & USING_MSIX)
 733                 msi_idx = 1;         /* vector 0 is for non-queue interrupts */
 734         else {
 735                 err = t4_sge_alloc_rxq(adap, &s->intrq, false, adap->port[0], 0,
 736                                        NULL, NULL);
 737                 if (err)
 738                         return err;
 739                 msi_idx = -((int)s->intrq.abs_id + 1);
 740         }
 741
 742         err = t4_sge_alloc_rxq(adap, &s->fw_evtq, true, adap->port[0],
 743                                msi_idx, NULL, fwevtq_handler);
 744         if (err) {
 745 freeout:        t4_free_sge_resources(adap);
 746                 return err;
 747         }
 748
 749         for_each_port(adap, i) {
 750                 struct net_device *dev = adap->port[i];
 751                 struct port_info *pi = netdev_priv(dev);
 752                 struct sge_eth_rxq *q = &s->ethrxq[pi->first_qset];
 753                 struct sge_eth_txq *t = &s->ethtxq[pi->first_qset];
 754
 755                 for (j = 0; j < pi->nqsets; j++, q++) {
 756                         if (msi_idx > 0)
 757                                 msi_idx++;
 758                         err = t4_sge_alloc_rxq(adap, &q->rspq, false, dev,
 759                                                msi_idx, &q->fl,
 760                                                t4_ethrx_handler);
 761                         if (err)
 762                                 goto freeout;
 763                         q->rspq.idx = j;
 764                         memset(&q->stats, 0, sizeof(q->stats));
 765                 }
 766                 for (j = 0; j < pi->nqsets; j++, t++) {
 767                         err = t4_sge_alloc_eth_txq(adap, t, dev,
 768                                         netdev_get_tx_queue(dev, j),
 769                                         s->fw_evtq.cntxt_id);
 770                         if (err)
 771                                 goto freeout;
 772                 }
 773         }
 774
 775         j = s->ofldqsets / adap->params.nports; /* ofld queues per channel */
 776         for_each_ofldrxq(s, i) {
 777                 struct sge_ofld_rxq *q = &s->ofldrxq[i];
 778                 struct net_device *dev = adap->port[i / j];
 779
 780                 if (msi_idx > 0)
 781                         msi_idx++;
 782                 err = t4_sge_alloc_rxq(adap, &q->rspq, false, dev, msi_idx,
 783                                        &q->fl, uldrx_handler);
 784                 if (err)
 785                         goto freeout;
 786                 memset(&q->stats, 0, sizeof(q->stats));
 787                 s->ofld_rxq[i] = q->rspq.abs_id;
 788                 err = t4_sge_alloc_ofld_txq(adap, &s->ofldtxq[i], dev,
 789                                             s->fw_evtq.cntxt_id);
 790                 if (err)
 791                         goto freeout;
 792         }
 793
 794         for_each_rdmarxq(s, i) {
 795                 struct sge_ofld_rxq *q = &s->rdmarxq[i];
 796
 797                 if (msi_idx > 0)
 798                         msi_idx++;
 799                 err = t4_sge_alloc_rxq(adap, &q->rspq, false, adap->port[i],
 800                                        msi_idx, &q->fl, uldrx_handler);
 801                 if (err)
 802                         goto freeout;
 803                 memset(&q->stats, 0, sizeof(q->stats));
 804                 s->rdma_rxq[i] = q->rspq.abs_id;
 805         }
 806
 807         for_each_port(adap, i) {
 808                 /*
 809                  * Note that ->rdmarxq[i].rspq.cntxt_id below is 0 if we don't
 810                  * have RDMA queues, and that's the right value.
 811                  */
 812                 err = t4_sge_alloc_ctrl_txq(adap, &s->ctrlq[i], adap->port[i],
 813                                             s->fw_evtq.cntxt_id,
 814                                             s->rdmarxq[i].rspq.cntxt_id);
 815                 if (err)
 816                         goto freeout;
 817         }
 818
 819         t4_write_reg(adap, MPS_TRC_RSS_CONTROL,
 820                      RSSCONTROL(netdev2pinfo(adap->port[0])->tx_chan) |
 821                      QUEUENUMBER(s->ethrxq[0].rspq.abs_id));
 822         return 0;
 823 }
 824
 825 /*
 826  * Returns 0 if new FW was successfully loaded, a positive errno if a load was
 827  * started but failed, and a negative errno if flash load couldn't start.
 828  */
 829 static int upgrade_fw(struct adapter *adap)
 830 {
 831         int ret;
 832         u32 vers;
 833         const struct fw_hdr *hdr;
 834         const struct firmware *fw;
 835         struct device *dev = adap->pdev_dev;
 836
 837         ret = request_firmware(&fw, FW_FNAME, dev);
 838         if (ret < 0) {
 839                 dev_err(dev, "unable to load firmware image " FW_FNAME
 840                         ", error %d\n", ret);
 841                 return ret;
 842         }
 843
 844         hdr = (const struct fw_hdr *)fw->data;
 845         vers = ntohl(hdr->fw_ver);
 846         if (FW_HDR_FW_VER_MAJOR_GET(vers) != FW_VERSION_MAJOR) {
 847                 ret = -EINVAL;              /* wrong major version, won't do */
 848                 goto out;
 849         }
 850
 851         /*
 852          * If the flash FW is unusable or we found something newer, load it.
 853          */
 854         if (FW_HDR_FW_VER_MAJOR_GET(adap->params.fw_vers) != FW_VERSION_MAJOR ||
 855             vers > adap->params.fw_vers) {
 856                 ret = -t4_load_fw(adap, fw->data, fw->size);
 857                 if (!ret)
 858                         dev_info(dev, "firmware upgraded to version %pI4 from "
 859                                  FW_FNAME "\n", &hdr->fw_ver);
 860         }
 861 out:    release_firmware(fw);
 862         return ret;
 863 }
 864
 865 /*
 866  * Allocate a chunk of memory using kmalloc or, if that fails, vmalloc.
 867  * The allocated memory is cleared.
 868  */
 869 void *t4_alloc_mem(size_t size)
 870 {
 871         void *p = kmalloc(size, GFP_KERNEL);
 872
 873         if (!p)
 874                 p = vmalloc(size);
 875         if (p)
 876                 memset(p, 0, size);
 877         return p;
 878 }
 879
 880 /*
 881  * Free memory allocated through alloc_mem().
 882  */
 883 static void t4_free_mem(void *addr)
 884 {
 885         if (is_vmalloc_addr(addr))
 886                 vfree(addr);
 887         else
 888                 kfree(addr);
 889 }
 890
 891 static inline int is_offload(const struct adapter *adap)
 892 {
 893         return adap->params.offload;
 894 }
 895
 896 /*
 897  * Implementation of ethtool operations.
 898  */
 899
 900 static u32 get_msglevel(struct net_device *dev)
 901 {
 902         return netdev2adap(dev)->msg_enable;
 903 }
 904
 905 static void set_msglevel(struct net_device *dev, u32 val)
 906 {
 907         netdev2adap(dev)->msg_enable = val;
 908 }
 909
 910 static char stats_strings[][ETH_GSTRING_LEN] = {
 911         "TxOctetsOK         ",
 912         "TxFramesOK         ",
 913         "TxBroadcastFrames  ",
 914         "TxMulticastFrames  ",
 915         "TxUnicastFrames    ",
 916         "TxErrorFrames      ",
 917
 918         "TxFrames64         ",
 919         "TxFrames65To127    ",
 920         "TxFrames128To255   ",
 921         "TxFrames256To511   ",
 922         "TxFrames512To1023  ",
 923         "TxFrames1024To1518 ",
 924         "TxFrames1519ToMax  ",
 925
 926         "TxFramesDropped    ",
 927         "TxPauseFrames      ",
 928         "TxPPP0Frames       ",
 929         "TxPPP1Frames       ",
 930         "TxPPP2Frames       ",
 931         "TxPPP3Frames       ",
 932         "TxPPP4Frames       ",
 933         "TxPPP5Frames       ",
 934         "TxPPP6Frames       ",
 935         "TxPPP7Frames       ",
 936
 937         "RxOctetsOK         ",
 938         "RxFramesOK         ",
 939         "RxBroadcastFrames  ",
 940         "RxMulticastFrames  ",
 941         "RxUnicastFrames    ",
 942
 943         "RxFramesTooLong    ",
 944         "RxJabberErrors     ",
 945         "RxFCSErrors        ",
 946         "RxLengthErrors     ",
 947         "RxSymbolErrors     ",
 948         "RxRuntFrames       ",
 949
 950         "RxFrames64         ",
 951         "RxFrames65To127    ",
 952         "RxFrames128To255   ",
 953         "RxFrames256To511   ",
 954         "RxFrames512To1023  ",
 955         "RxFrames1024To1518 ",
 956         "RxFrames1519ToMax  ",
 957
 958         "RxPauseFrames      ",
 959         "RxPPP0Frames       ",
 960         "RxPPP1Frames       ",
 961         "RxPPP2Frames       ",
 962         "RxPPP3Frames       ",
 963         "RxPPP4Frames       ",
 964         "RxPPP5Frames       ",
 965         "RxPPP6Frames       ",
 966         "RxPPP7Frames       ",
 967
 968         "RxBG0FramesDropped ",
 969         "RxBG1FramesDropped ",
 970         "RxBG2FramesDropped ",
 971         "RxBG3FramesDropped ",
 972         "RxBG0FramesTrunc   ",
 973         "RxBG1FramesTrunc   ",
 974         "RxBG2FramesTrunc   ",
 975         "RxBG3FramesTrunc   ",
 976
 977         "TSO                ",
 978         "TxCsumOffload      ",
 979         "RxCsumGood         ",
 980         "VLANextractions    ",
 981         "VLANinsertions     ",
 982         "GROpackets         ",
 983         "GROmerged          ",
 984 };
 985
 986 static int get_sset_count(struct net_device *dev, int sset)
 987 {
 988         switch (sset) {
 989         case ETH_SS_STATS:
 990                 return ARRAY_SIZE(stats_strings);
 991         default:
 992                 return -EOPNOTSUPP;
 993         }
 994 }
 995
 996 #define T4_REGMAP_SIZE (160 * 1024)
 997
 998 static int get_regs_len(struct net_device *dev)
 999 {
1000         return T4_REGMAP_SIZE;
1001 }
1002
1003 static int get_eeprom_len(struct net_device *dev)
1004 {
1005         return EEPROMSIZE;
1006 }
1007
1008 static void get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1009 {
1010         struct adapter *adapter = netdev2adap(dev);
1011
1012         strcpy(info->driver, KBUILD_MODNAME);
1013         strcpy(info->version, DRV_VERSION);
1014         strcpy(info->bus_info, pci_name(adapter->pdev));
1015
1016         if (!adapter->params.fw_vers)
1017                 strcpy(info->fw_version, "N/A");
1018         else
1019                 snprintf(info->fw_version, sizeof(info->fw_version),
1020                         "%u.%u.%u.%u, TP %u.%u.%u.%u",
1021                         FW_HDR_FW_VER_MAJOR_GET(adapter->params.fw_vers),
1022                         FW_HDR_FW_VER_MINOR_GET(adapter->params.fw_vers),
1023                         FW_HDR_FW_VER_MICRO_GET(adapter->params.fw_vers),
1024                         FW_HDR_FW_VER_BUILD_GET(adapter->params.fw_vers),
1025                         FW_HDR_FW_VER_MAJOR_GET(adapter->params.tp_vers),
1026                         FW_HDR_FW_VER_MINOR_GET(adapter->params.tp_vers),
1027                         FW_HDR_FW_VER_MICRO_GET(adapter->params.tp_vers),
1028                         FW_HDR_FW_VER_BUILD_GET(adapter->params.tp_vers));
1029 }
1030
1031 static void get_strings(struct net_device *dev, u32 stringset, u8 *data)
1032 {
1033         if (stringset == ETH_SS_STATS)
1034                 memcpy(data, stats_strings, sizeof(stats_strings));
1035 }
1036
1037 /*
1038  * port stats maintained per queue of the port.  They should be in the same
1039  * order as in stats_strings above.
1040  */
1041 struct queue_port_stats {
1042         u64 tso;
1043         u64 tx_csum;
1044         u64 rx_csum;
1045         u64 vlan_ex;
1046         u64 vlan_ins;
1047         u64 gro_pkts;
1048         u64 gro_merged;
1049 };
1050
1051 static void collect_sge_port_stats(const struct adapter *adap,
1052                 const struct port_info *p, struct queue_port_stats *s)
1053 {
1054         int i;
1055         const struct sge_eth_txq *tx = &adap->sge.ethtxq[p->first_qset];
1056         const struct sge_eth_rxq *rx = &adap->sge.ethrxq[p->first_qset];
1057
1058         memset(s, 0, sizeof(*s));
1059         for (i = 0; i < p->nqsets; i++, rx++, tx++) {
1060                 s->tso += tx->tso;
1061                 s->tx_csum += tx->tx_cso;
1062                 s->rx_csum += rx->stats.rx_cso;
1063                 s->vlan_ex += rx->stats.vlan_ex;
1064                 s->vlan_ins += tx->vlan_ins;
1065                 s->gro_pkts += rx->stats.lro_pkts;
1066                 s->gro_merged += rx->stats.lro_merged;
1067         }
1068 }
1069
1070 static void get_stats(struct net_device *dev, struct ethtool_stats *stats,
1071                       u64 *data)
1072 {
1073         struct port_info *pi = netdev_priv(dev);
1074         struct adapter *adapter = pi->adapter;
1075
1076         t4_get_port_stats(adapter, pi->tx_chan, (struct port_stats *)data);
1077
1078         data += sizeof(struct port_stats) / sizeof(u64);
1079         collect_sge_port_stats(adapter, pi, (struct queue_port_stats *)data);
1080 }
1081
1082 /*
1083  * Return a version number to identify the type of adapter.  The scheme is:
1084  * - bits 0..9: chip version
1085  * - bits 10..15: chip revision
1086  * - bits 16..23: register dump version
1087  */
1088 static inline unsigned int mk_adap_vers(const struct adapter *ap)
1089 {
1090         return 4 | (ap->params.rev << 10) | (1 << 16);
1091 }
1092
1093 static void reg_block_dump(struct adapter *ap, void *buf, unsigned int start,
1094                            unsigned int end)
1095 {
1096         u32 *p = buf + start;
1097
1098         for ( ; start <= end; start += sizeof(u32))
1099                 *p++ = t4_read_reg(ap, start);
1100 }
1101
1102 static void get_regs(struct net_device *dev, struct ethtool_regs *regs,
1103                      void *buf)
1104 {
1105         static const unsigned int reg_ranges[] = {
1106                 0x1008, 0x1108,
1107                 0x1180, 0x11b4,
1108                 0x11fc, 0x123c,
1109                 0x1300, 0x173c,
1110                 0x1800, 0x18fc,
1111                 0x3000, 0x30d8,
1112                 0x30e0, 0x5924,
1113                 0x5960, 0x59d4,
1114                 0x5a00, 0x5af8,
1115                 0x6000, 0x6098,
1116                 0x6100, 0x6150,
1117                 0x6200, 0x6208,
1118                 0x6240, 0x6248,
1119                 0x6280, 0x6338,
1120                 0x6370, 0x638c,
1121                 0x6400, 0x643c,
1122                 0x6500, 0x6524,
1123                 0x6a00, 0x6a38,
1124                 0x6a60, 0x6a78,
1125                 0x6b00, 0x6b84,
1126                 0x6bf0, 0x6c84,
1127                 0x6cf0, 0x6d84,
1128                 0x6df0, 0x6e84,
1129                 0x6ef0, 0x6f84,
1130                 0x6ff0, 0x7084,
1131                 0x70f0, 0x7184,
1132                 0x71f0, 0x7284,
1133                 0x72f0, 0x7384,
1134                 0x73f0, 0x7450,
1135                 0x7500, 0x7530,
1136                 0x7600, 0x761c,
1137                 0x7680, 0x76cc,
1138                 0x7700, 0x7798,
1139                 0x77c0, 0x77fc,
1140                 0x7900, 0x79fc,
1141                 0x7b00, 0x7c38,
1142                 0x7d00, 0x7efc,
1143                 0x8dc0, 0x8e1c,
1144                 0x8e30, 0x8e78,
1145                 0x8ea0, 0x8f6c,
1146                 0x8fc0, 0x9074,
1147                 0x90fc, 0x90fc,
1148                 0x9400, 0x9458,
1149                 0x9600, 0x96bc,
1150                 0x9800, 0x9808,
1151                 0x9820, 0x983c,
1152                 0x9850, 0x9864,
1153                 0x9c00, 0x9c6c,
1154                 0x9c80, 0x9cec,
1155                 0x9d00, 0x9d6c,
1156                 0x9d80, 0x9dec,
1157                 0x9e00, 0x9e6c,
1158                 0x9e80, 0x9eec,
1159                 0x9f00, 0x9f6c,
1160                 0x9f80, 0x9fec,
1161                 0xd004, 0xd03c,
1162                 0xdfc0, 0xdfe0,
1163                 0xe000, 0xea7c,
1164                 0xf000, 0x11190,
1165                 0x19040, 0x1906c,
1166                 0x19078, 0x19080,
1167                 0x1908c, 0x19124,
1168                 0x19150, 0x191b0,
1169                 0x191d0, 0x191e8,
1170                 0x19238, 0x1924c,
1171                 0x193f8, 0x19474,
1172                 0x19490, 0x194f8,
1173                 0x19800, 0x19f30,
1174                 0x1a000, 0x1a06c,
1175                 0x1a0b0, 0x1a120,
1176                 0x1a128, 0x1a138,
1177                 0x1a190, 0x1a1c4,
1178                 0x1a1fc, 0x1a1fc,
1179                 0x1e040, 0x1e04c,
1180                 0x1e284, 0x1e28c,
1181                 0x1e2c0, 0x1e2c0,
1182                 0x1e2e0, 0x1e2e0,
1183                 0x1e300, 0x1e384,
1184                 0x1e3c0, 0x1e3c8,
1185                 0x1e440, 0x1e44c,
1186                 0x1e684, 0x1e68c,
1187                 0x1e6c0, 0x1e6c0,
1188                 0x1e6e0, 0x1e6e0,
1189                 0x1e700, 0x1e784,
1190                 0x1e7c0, 0x1e7c8,
1191                 0x1e840, 0x1e84c,
1192                 0x1ea84, 0x1ea8c,
1193                 0x1eac0, 0x1eac0,
1194                 0x1eae0, 0x1eae0,
1195                 0x1eb00, 0x1eb84,
1196                 0x1ebc0, 0x1ebc8,
1197                 0x1ec40, 0x1ec4c,
1198                 0x1ee84, 0x1ee8c,
1199                 0x1eec0, 0x1eec0,
1200                 0x1eee0, 0x1eee0,
1201                 0x1ef00, 0x1ef84,
1202                 0x1efc0, 0x1efc8,
1203                 0x1f040, 0x1f04c,
1204                 0x1f284, 0x1f28c,
1205                 0x1f2c0, 0x1f2c0,
1206                 0x1f2e0, 0x1f2e0,
1207                 0x1f300, 0x1f384,
1208                 0x1f3c0, 0x1f3c8,
1209                 0x1f440, 0x1f44c,
1210                 0x1f684, 0x1f68c,
1211                 0x1f6c0, 0x1f6c0,
1212                 0x1f6e0, 0x1f6e0,
1213                 0x1f700, 0x1f784,
1214                 0x1f7c0, 0x1f7c8,
1215                 0x1f840, 0x1f84c,
1216                 0x1fa84, 0x1fa8c,
1217                 0x1fac0, 0x1fac0,
1218                 0x1fae0, 0x1fae0,
1219                 0x1fb00, 0x1fb84,
1220                 0x1fbc0, 0x1fbc8,
1221                 0x1fc40, 0x1fc4c,
1222                 0x1fe84, 0x1fe8c,
1223                 0x1fec0, 0x1fec0,
1224                 0x1fee0, 0x1fee0,
1225                 0x1ff00, 0x1ff84,
1226                 0x1ffc0, 0x1ffc8,
1227                 0x20000, 0x2002c,
1228                 0x20100, 0x2013c,
1229                 0x20190, 0x201c8,
1230                 0x20200, 0x20318,
1231                 0x20400, 0x20528,
1232                 0x20540, 0x20614,
1233                 0x21000, 0x21040,
1234                 0x2104c, 0x21060,
1235                 0x210c0, 0x210ec,
1236                 0x21200, 0x21268,
1237                 0x21270, 0x21284,
1238                 0x212fc, 0x21388,
1239                 0x21400, 0x21404,
1240                 0x21500, 0x21518,
1241                 0x2152c, 0x2153c,
1242                 0x21550, 0x21554,
1243                 0x21600, 0x21600,
1244                 0x21608, 0x21628,
1245                 0x21630, 0x2163c,
1246                 0x21700, 0x2171c,
1247                 0x21780, 0x2178c,
1248                 0x21800, 0x21c38,
1249                 0x21c80, 0x21d7c,
1250                 0x21e00, 0x21e04,
1251                 0x22000, 0x2202c,
1252                 0x22100, 0x2213c,
1253                 0x22190, 0x221c8,
1254                 0x22200, 0x22318,
1255                 0x22400, 0x22528,
1256                 0x22540, 0x22614,
1257                 0x23000, 0x23040,
1258                 0x2304c, 0x23060,
1259                 0x230c0, 0x230ec,
1260                 0x23200, 0x23268,
1261                 0x23270, 0x23284,
1262                 0x232fc, 0x23388,
1263                 0x23400, 0x23404,
1264                 0x23500, 0x23518,
1265                 0x2352c, 0x2353c,
1266                 0x23550, 0x23554,
1267                 0x23600, 0x23600,
1268                 0x23608, 0x23628,
1269                 0x23630, 0x2363c,
1270                 0x23700, 0x2371c,
1271                 0x23780, 0x2378c,
1272                 0x23800, 0x23c38,
1273                 0x23c80, 0x23d7c,
1274                 0x23e00, 0x23e04,
1275                 0x24000, 0x2402c,
1276                 0x24100, 0x2413c,
1277                 0x24190, 0x241c8,
1278                 0x24200, 0x24318,
1279                 0x24400, 0x24528,
1280                 0x24540, 0x24614,
1281                 0x25000, 0x25040,
1282                 0x2504c, 0x25060,
1283                 0x250c0, 0x250ec,
1284                 0x25200, 0x25268,
1285                 0x25270, 0x25284,
1286                 0x252fc, 0x25388,
1287                 0x25400, 0x25404,
1288                 0x25500, 0x25518,
1289                 0x2552c, 0x2553c,
1290                 0x25550, 0x25554,
1291                 0x25600, 0x25600,
1292                 0x25608, 0x25628,
1293                 0x25630, 0x2563c,
1294                 0x25700, 0x2571c,
1295                 0x25780, 0x2578c,
1296                 0x25800, 0x25c38,
1297                 0x25c80, 0x25d7c,
1298                 0x25e00, 0x25e04,
1299                 0x26000, 0x2602c,
1300                 0x26100, 0x2613c,
1301                 0x26190, 0x261c8,
1302                 0x26200, 0x26318,
1303                 0x26400, 0x26528,
1304                 0x26540, 0x26614,
1305                 0x27000, 0x27040,
1306                 0x2704c, 0x27060,
1307                 0x270c0, 0x270ec,
1308                 0x27200, 0x27268,
1309                 0x27270, 0x27284,
1310                 0x272fc, 0x27388,
1311                 0x27400, 0x27404,
1312                 0x27500, 0x27518,
1313                 0x2752c, 0x2753c,
1314                 0x27550, 0x27554,
1315                 0x27600, 0x27600,
1316                 0x27608, 0x27628,
1317                 0x27630, 0x2763c,
1318                 0x27700, 0x2771c,
1319                 0x27780, 0x2778c,
1320                 0x27800, 0x27c38,
1321                 0x27c80, 0x27d7c,
1322                 0x27e00, 0x27e04
1323         };
1324
1325         int i;
1326         struct adapter *ap = netdev2adap(dev);
1327
1328         regs->version = mk_adap_vers(ap);
1329
1330         memset(buf, 0, T4_REGMAP_SIZE);
1331         for (i = 0; i < ARRAY_SIZE(reg_ranges); i += 2)
1332                 reg_block_dump(ap, buf, reg_ranges[i], reg_ranges[i + 1]);
1333 }
1334
1335 static int restart_autoneg(struct net_device *dev)
1336 {
1337         struct port_info *p = netdev_priv(dev);
1338
1339         if (!netif_running(dev))
1340                 return -EAGAIN;
1341         if (p->link_cfg.autoneg != AUTONEG_ENABLE)
1342                 return -EINVAL;
1343         t4_restart_aneg(p->adapter, p->adapter->fn, p->tx_chan);
1344         return 0;
1345 }
1346
1347 static int identify_port(struct net_device *dev, u32 data)
1348 {
1349         struct adapter *adap = netdev2adap(dev);
1350
1351         if (data == 0)
1352                 data = 2;     /* default to 2 seconds */
1353
1354         return t4_identify_port(adap, adap->fn, netdev2pinfo(dev)->viid,
1355                                 data * 5);
1356 }
1357
1358 static unsigned int from_fw_linkcaps(unsigned int type, unsigned int caps)
1359 {
1360         unsigned int v = 0;
1361
1362         if (type == FW_PORT_TYPE_BT_SGMII || type == FW_PORT_TYPE_BT_XFI ||
1363             type == FW_PORT_TYPE_BT_XAUI) {
1364                 v |= SUPPORTED_TP;
1365                 if (caps & FW_PORT_CAP_SPEED_100M)
1366                         v |= SUPPORTED_100baseT_Full;
1367                 if (caps & FW_PORT_CAP_SPEED_1G)
1368                         v |= SUPPORTED_1000baseT_Full;
1369                 if (caps & FW_PORT_CAP_SPEED_10G)
1370                         v |= SUPPORTED_10000baseT_Full;
1371         } else if (type == FW_PORT_TYPE_KX4 || type == FW_PORT_TYPE_KX) {
1372                 v |= SUPPORTED_Backplane;
1373                 if (caps & FW_PORT_CAP_SPEED_1G)
1374                         v |= SUPPORTED_1000baseKX_Full;
1375                 if (caps & FW_PORT_CAP_SPEED_10G)
1376                         v |= SUPPORTED_10000baseKX4_Full;
1377         } else if (type == FW_PORT_TYPE_KR)
1378                 v |= SUPPORTED_Backplane | SUPPORTED_10000baseKR_Full;
1379         else if (type == FW_PORT_TYPE_BP_AP)
1380                 v |= SUPPORTED_Backplane | SUPPORTED_10000baseR_FEC;
1381         else if (type == FW_PORT_TYPE_FIBER_XFI ||
1382                  type == FW_PORT_TYPE_FIBER_XAUI || type == FW_PORT_TYPE_SFP)
1383                 v |= SUPPORTED_FIBRE;
1384
1385         if (caps & FW_PORT_CAP_ANEG)
1386                 v |= SUPPORTED_Autoneg;
1387         return v;
1388 }
1389
1390 static unsigned int to_fw_linkcaps(unsigned int caps)
1391 {
1392         unsigned int v = 0;
1393
1394         if (caps & ADVERTISED_100baseT_Full)
1395                 v |= FW_PORT_CAP_SPEED_100M;
1396         if (caps & ADVERTISED_1000baseT_Full)
1397                 v |= FW_PORT_CAP_SPEED_1G;
1398         if (caps & ADVERTISED_10000baseT_Full)
1399                 v |= FW_PORT_CAP_SPEED_10G;
1400         return v;
1401 }
1402
1403 static int get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1404 {
1405         const struct port_info *p = netdev_priv(dev);
1406
1407         if (p->port_type == FW_PORT_TYPE_BT_SGMII ||
1408             p->port_type == FW_PORT_TYPE_BT_XFI ||
1409             p->port_type == FW_PORT_TYPE_BT_XAUI)
1410                 cmd->port = PORT_TP;
1411         else if (p->port_type == FW_PORT_TYPE_FIBER_XFI ||
1412                  p->port_type == FW_PORT_TYPE_FIBER_XAUI)
1413                 cmd->port = PORT_FIBRE;
1414         else if (p->port_type == FW_PORT_TYPE_SFP) {
1415                 if (p->mod_type == FW_PORT_MOD_TYPE_TWINAX_PASSIVE ||
1416                     p->mod_type == FW_PORT_MOD_TYPE_TWINAX_ACTIVE)
1417                         cmd->port = PORT_DA;
1418                 else
1419                         cmd->port = PORT_FIBRE;
1420         } else
1421                 cmd->port = PORT_OTHER;
1422
1423         if (p->mdio_addr >= 0) {
1424                 cmd->phy_address = p->mdio_addr;
1425                 cmd->transceiver = XCVR_EXTERNAL;
1426                 cmd->mdio_support = p->port_type == FW_PORT_TYPE_BT_SGMII ?
1427                         MDIO_SUPPORTS_C22 : MDIO_SUPPORTS_C45;
1428         } else {
1429                 cmd->phy_address = 0;  /* not really, but no better option */
1430                 cmd->transceiver = XCVR_INTERNAL;
1431                 cmd->mdio_support = 0;
1432         }
1433
1434         cmd->supported = from_fw_linkcaps(p->port_type, p->link_cfg.supported);
1435         cmd->advertising = from_fw_linkcaps(p->port_type,
1436                                             p->link_cfg.advertising);
1437         cmd->speed = netif_carrier_ok(dev) ? p->link_cfg.speed : 0;
1438         cmd->duplex = DUPLEX_FULL;
1439         cmd->autoneg = p->link_cfg.autoneg;
1440         cmd->maxtxpkt = 0;
1441         cmd->maxrxpkt = 0;
1442         return 0;
1443 }
1444
1445 static unsigned int speed_to_caps(int speed)
1446 {
1447         if (speed == SPEED_100)
1448                 return FW_PORT_CAP_SPEED_100M;
1449         if (speed == SPEED_1000)
1450                 return FW_PORT_CAP_SPEED_1G;
1451         if (speed == SPEED_10000)
1452                 return FW_PORT_CAP_SPEED_10G;
1453         return 0;
1454 }
1455
1456 static int set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1457 {
1458         unsigned int cap;
1459         struct port_info *p = netdev_priv(dev);
1460         struct link_config *lc = &p->link_cfg;
1461
1462         if (cmd->duplex != DUPLEX_FULL)     /* only full-duplex supported */
1463                 return -EINVAL;
1464
1465         if (!(lc->supported & FW_PORT_CAP_ANEG)) {
1466                 /*
1467                  * PHY offers a single speed.  See if that's what's
1468                  * being requested.
1469                  */
1470                 if (cmd->autoneg == AUTONEG_DISABLE &&
1471                     (lc->supported & speed_to_caps(cmd->speed)))
1472                                 return 0;
1473                 return -EINVAL;
1474         }
1475
1476         if (cmd->autoneg == AUTONEG_DISABLE) {
1477                 cap = speed_to_caps(cmd->speed);
1478
1479                 if (!(lc->supported & cap) || cmd->speed == SPEED_1000 ||
1480                     cmd->speed == SPEED_10000)
1481                         return -EINVAL;
1482                 lc->requested_speed = cap;
1483                 lc->advertising = 0;
1484         } else {
1485                 cap = to_fw_linkcaps(cmd->advertising);
1486                 if (!(lc->supported & cap))
1487                         return -EINVAL;
1488                 lc->requested_speed = 0;
1489                 lc->advertising = cap | FW_PORT_CAP_ANEG;
1490         }
1491         lc->autoneg = cmd->autoneg;
1492
1493         if (netif_running(dev))
1494                 return t4_link_start(p->adapter, p->adapter->fn, p->tx_chan,
1495                                      lc);
1496         return 0;
1497 }
1498
1499 static void get_pauseparam(struct net_device *dev,
1500                            struct ethtool_pauseparam *epause)
1501 {
1502         struct port_info *p = netdev_priv(dev);
1503
1504         epause->autoneg = (p->link_cfg.requested_fc & PAUSE_AUTONEG) != 0;
1505         epause->rx_pause = (p->link_cfg.fc & PAUSE_RX) != 0;
1506         epause->tx_pause = (p->link_cfg.fc & PAUSE_TX) != 0;
1507 }
1508
1509 static int set_pauseparam(struct net_device *dev,
1510                           struct ethtool_pauseparam *epause)
1511 {
1512         struct port_info *p = netdev_priv(dev);
1513         struct link_config *lc = &p->link_cfg;
1514
1515         if (epause->autoneg == AUTONEG_DISABLE)
1516                 lc->requested_fc = 0;
1517         else if (lc->supported & FW_PORT_CAP_ANEG)
1518                 lc->requested_fc = PAUSE_AUTONEG;
1519         else
1520                 return -EINVAL;
1521
1522         if (epause->rx_pause)
1523                 lc->requested_fc |= PAUSE_RX;
1524         if (epause->tx_pause)
1525                 lc->requested_fc |= PAUSE_TX;
1526         if (netif_running(dev))
1527                 return t4_link_start(p->adapter, p->adapter->fn, p->tx_chan,
1528                                      lc);
1529         return 0;
1530 }
1531
1532 static u32 get_rx_csum(struct net_device *dev)
1533 {
1534         struct port_info *p = netdev_priv(dev);
1535
1536         return p->rx_offload & RX_CSO;
1537 }
1538
1539 static int set_rx_csum(struct net_device *dev, u32 data)
1540 {
1541         struct port_info *p = netdev_priv(dev);
1542
1543         if (data)
1544                 p->rx_offload |= RX_CSO;
1545         else
1546                 p->rx_offload &= ~RX_CSO;
1547         return 0;
1548 }
1549
1550 static void get_sge_param(struct net_device *dev, struct ethtool_ringparam *e)
1551 {
1552         const struct port_info *pi = netdev_priv(dev);
1553         const struct sge *s = &pi->adapter->sge;
1554
1555         e->rx_max_pending = MAX_RX_BUFFERS;
1556         e->rx_mini_max_pending = MAX_RSPQ_ENTRIES;
1557         e->rx_jumbo_max_pending = 0;
1558         e->tx_max_pending = MAX_TXQ_ENTRIES;
1559
1560         e->rx_pending = s->ethrxq[pi->first_qset].fl.size - 8;
1561         e->rx_mini_pending = s->ethrxq[pi->first_qset].rspq.size;
1562         e->rx_jumbo_pending = 0;
1563         e->tx_pending = s->ethtxq[pi->first_qset].q.size;
1564 }
1565
1566 static int set_sge_param(struct net_device *dev, struct ethtool_ringparam *e)
1567 {
1568         int i;
1569         const struct port_info *pi = netdev_priv(dev);
1570         struct adapter *adapter = pi->adapter;
1571         struct sge *s = &adapter->sge;
1572
1573         if (e->rx_pending > MAX_RX_BUFFERS || e->rx_jumbo_pending ||
1574             e->tx_pending > MAX_TXQ_ENTRIES ||
1575             e->rx_mini_pending > MAX_RSPQ_ENTRIES ||
1576             e->rx_mini_pending < MIN_RSPQ_ENTRIES ||
1577             e->rx_pending < MIN_FL_ENTRIES || e->tx_pending < MIN_TXQ_ENTRIES)
1578                 return -EINVAL;
1579
1580         if (adapter->flags & FULL_INIT_DONE)
1581                 return -EBUSY;
1582
1583         for (i = 0; i < pi->nqsets; ++i) {
1584                 s->ethtxq[pi->first_qset + i].q.size = e->tx_pending;
1585                 s->ethrxq[pi->first_qset + i].fl.size = e->rx_pending + 8;
1586                 s->ethrxq[pi->first_qset + i].rspq.size = e->rx_mini_pending;
1587         }
1588         return 0;
1589 }
1590
1591 static int closest_timer(const struct sge *s, int time)
1592 {
1593         int i, delta, match = 0, min_delta = INT_MAX;
1594
1595         for (i = 0; i < ARRAY_SIZE(s->timer_val); i++) {
1596                 delta = time - s->timer_val[i];
1597                 if (delta < 0)
1598                         delta = -delta;
1599                 if (delta < min_delta) {
1600                         min_delta = delta;
1601                         match = i;
1602                 }
1603         }
1604         return match;
1605 }
1606
1607 static int closest_thres(const struct sge *s, int thres)
1608 {
1609         int i, delta, match = 0, min_delta = INT_MAX;
1610
1611         for (i = 0; i < ARRAY_SIZE(s->counter_val); i++) {
1612                 delta = thres - s->counter_val[i];
1613                 if (delta < 0)
1614                         delta = -delta;
1615                 if (delta < min_delta) {
1616                         min_delta = delta;
1617                         match = i;
1618                 }
1619         }
1620         return match;
1621 }
1622
1623 /*
1624  * Return a queue's interrupt hold-off time in us.  0 means no timer.
1625  */
1626 static unsigned int qtimer_val(const struct adapter *adap,
1627                                const struct sge_rspq *q)
1628 {
1629         unsigned int idx = q->intr_params >> 1;
1630
1631         return idx < SGE_NTIMERS ? adap->sge.timer_val[idx] : 0;
1632 }
1633
1634 /**
1635  *      set_rxq_intr_params - set a queue's interrupt holdoff parameters
1636  *      @adap: the adapter
1637  *      @q: the Rx queue
1638  *      @us: the hold-off time in us, or 0 to disable timer
1639  *      @cnt: the hold-off packet count, or 0 to disable counter
1640  *
1641  *      Sets an Rx queue's interrupt hold-off time and packet count.  At least
1642  *      one of the two needs to be enabled for the queue to generate interrupts.
1643  */
1644 static int set_rxq_intr_params(struct adapter *adap, struct sge_rspq *q,
1645                                unsigned int us, unsigned int cnt)
1646 {
1647         if ((us | cnt) == 0)
1648                 cnt = 1;
1649
1650         if (cnt) {
1651                 int err;
1652                 u32 v, new_idx;
1653
1654                 new_idx = closest_thres(&adap->sge, cnt);
1655                 if (q->desc && q->pktcnt_idx != new_idx) {
1656                         /* the queue has already been created, update it */
1657                         v = FW_PARAMS_MNEM(FW_PARAMS_MNEM_DMAQ) |
1658                             FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DMAQ_IQ_INTCNTTHRESH) |
1659                             FW_PARAMS_PARAM_YZ(q->cntxt_id);
1660                         err = t4_set_params(adap, adap->fn, adap->fn, 0, 1, &v,
1661                                             &new_idx);
1662                         if (err)
1663                                 return err;
1664                 }
1665                 q->pktcnt_idx = new_idx;
1666         }
1667
1668         us = us == 0 ? 6 : closest_timer(&adap->sge, us);
1669         q->intr_params = QINTR_TIMER_IDX(us) | (cnt > 0 ? QINTR_CNT_EN : 0);
1670         return 0;
1671 }
1672
1673 static int set_coalesce(struct net_device *dev, struct ethtool_coalesce *c)
1674 {
1675         const struct port_info *pi = netdev_priv(dev);
1676         struct adapter *adap = pi->adapter;
1677
1678         return set_rxq_intr_params(adap, &adap->sge.ethrxq[pi->first_qset].rspq,
1679                         c->rx_coalesce_usecs, c->rx_max_coalesced_frames);
1680 }
1681
1682 static int get_coalesce(struct net_device *dev, struct ethtool_coalesce *c)
1683 {
1684         const struct port_info *pi = netdev_priv(dev);
1685         const struct adapter *adap = pi->adapter;
1686         const struct sge_rspq *rq = &adap->sge.ethrxq[pi->first_qset].rspq;
1687
1688         c->rx_coalesce_usecs = qtimer_val(adap, rq);
1689         c->rx_max_coalesced_frames = (rq->intr_params & QINTR_CNT_EN) ?
1690                 adap->sge.counter_val[rq->pktcnt_idx] : 0;
1691         return 0;
1692 }
1693
1694 /**
1695  *      eeprom_ptov - translate a physical EEPROM address to virtual
1696  *      @phys_addr: the physical EEPROM address
1697  *      @fn: the PCI function number
1698  *      @sz: size of function-specific area
1699  *
1700  *      Translate a physical EEPROM address to virtual.  The first 1K is
1701  *      accessed through virtual addresses starting at 31K, the rest is
1702  *      accessed through virtual addresses starting at 0.
1703  *
1704  *      The mapping is as follows:
1705  *      [0..1K) -> [31K..32K)
1706  *      [1K..1K+A) -> [31K-A..31K)
1707  *      [1K+A..ES) -> [0..ES-A-1K)
1708  *
1709  *      where A = @fn * @sz, and ES = EEPROM size.
1710  */
1711 static int eeprom_ptov(unsigned int phys_addr, unsigned int fn, unsigned int sz)
1712 {
1713         fn *= sz;
1714         if (phys_addr < 1024)
1715                 return phys_addr + (31 << 10);
1716         if (phys_addr < 1024 + fn)
1717                 return 31744 - fn + phys_addr - 1024;
1718         if (phys_addr < EEPROMSIZE)
1719                 return phys_addr - 1024 - fn;
1720         return -EINVAL;
1721 }
1722
1723 /*
1724  * The next two routines implement eeprom read/write from physical addresses.
1725  */
1726 static int eeprom_rd_phys(struct adapter *adap, unsigned int phys_addr, u32 *v)
1727 {
1728         int vaddr = eeprom_ptov(phys_addr, adap->fn, EEPROMPFSIZE);
1729
1730         if (vaddr >= 0)
1731                 vaddr = pci_read_vpd(adap->pdev, vaddr, sizeof(u32), v);
1732         return vaddr < 0 ? vaddr : 0;
1733 }
1734
1735 static int eeprom_wr_phys(struct adapter *adap, unsigned int phys_addr, u32 v)
1736 {
1737         int vaddr = eeprom_ptov(phys_addr, adap->fn, EEPROMPFSIZE);
1738
1739         if (vaddr >= 0)
1740                 vaddr = pci_write_vpd(adap->pdev, vaddr, sizeof(u32), &v);
1741         return vaddr < 0 ? vaddr : 0;
1742 }
1743
1744 #define EEPROM_MAGIC 0x38E2F10C
1745
1746 static int get_eeprom(struct net_device *dev, struct ethtool_eeprom *e,
1747                       u8 *data)
1748 {
1749         int i, err = 0;
1750         struct adapter *adapter = netdev2adap(dev);
1751
1752         u8 *buf = kmalloc(EEPROMSIZE, GFP_KERNEL);
1753         if (!buf)
1754                 return -ENOMEM;
1755
1756         e->magic = EEPROM_MAGIC;
1757         for (i = e->offset & ~3; !err && i < e->offset + e->len; i += 4)
1758                 err = eeprom_rd_phys(adapter, i, (u32 *)&buf[i]);
1759
1760         if (!err)
1761                 memcpy(data, buf + e->offset, e->len);
1762         kfree(buf);
1763         return err;
1764 }
1765
1766 static int set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
1767                       u8 *data)
1768 {
1769         u8 *buf;
1770         int err = 0;
1771         u32 aligned_offset, aligned_len, *p;
1772         struct adapter *adapter = netdev2adap(dev);
1773
1774         if (eeprom->magic != EEPROM_MAGIC)
1775                 return -EINVAL;
1776
1777         aligned_offset = eeprom->offset & ~3;
1778         aligned_len = (eeprom->len + (eeprom->offset & 3) + 3) & ~3;
1779
1780         if (adapter->fn > 0) {
1781                 u32 start = 1024 + adapter->fn * EEPROMPFSIZE;
1782
1783                 if (aligned_offset < start ||
1784                     aligned_offset + aligned_len > start + EEPROMPFSIZE)
1785                         return -EPERM;
1786         }
1787
1788         if (aligned_offset != eeprom->offset || aligned_len != eeprom->len) {
1789                 /*
1790                  * RMW possibly needed for first or last words.
1791                  */
1792                 buf = kmalloc(aligned_len, GFP_KERNEL);
1793                 if (!buf)
1794                         return -ENOMEM;
1795                 err = eeprom_rd_phys(adapter, aligned_offset, (u32 *)buf);
1796                 if (!err && aligned_len > 4)
1797                         err = eeprom_rd_phys(adapter,
1798                                              aligned_offset + aligned_len - 4,
1799                                              (u32 *)&buf[aligned_len - 4]);
1800                 if (err)
1801                         goto out;
1802                 memcpy(buf + (eeprom->offset & 3), data, eeprom->len);
1803         } else
1804                 buf = data;
1805
1806         err = t4_seeprom_wp(adapter, false);
1807         if (err)
1808                 goto out;
1809
1810         for (p = (u32 *)buf; !err && aligned_len; aligned_len -= 4, p++) {
1811                 err = eeprom_wr_phys(adapter, aligned_offset, *p);
1812                 aligned_offset += 4;
1813         }
1814
1815         if (!err)
1816                 err = t4_seeprom_wp(adapter, true);
1817 out:
1818         if (buf != data)
1819                 kfree(buf);
1820         return err;
1821 }
1822
1823 static int set_flash(struct net_device *netdev, struct ethtool_flash *ef)
1824 {
1825         int ret;
1826         const struct firmware *fw;
1827         struct adapter *adap = netdev2adap(netdev);
1828
1829         ef->data[sizeof(ef->data) - 1] = '\0';
1830         ret = request_firmware(&fw, ef->data, adap->pdev_dev);
1831         if (ret < 0)
1832                 return ret;
1833
1834         ret = t4_load_fw(adap, fw->data, fw->size);
1835         release_firmware(fw);
1836         if (!ret)
1837                 dev_info(adap->pdev_dev, "loaded firmware %s\n", ef->data);
1838         return ret;
1839 }
1840
1841 #define WOL_SUPPORTED (WAKE_BCAST | WAKE_MAGIC)
1842 #define BCAST_CRC 0xa0ccc1a6
1843
1844 static void get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
1845 {
1846         wol->supported = WAKE_BCAST | WAKE_MAGIC;
1847         wol->wolopts = netdev2adap(dev)->wol;
1848         memset(&wol->sopass, 0, sizeof(wol->sopass));
1849 }
1850
1851 static int set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
1852 {
1853         int err = 0;
1854         struct port_info *pi = netdev_priv(dev);
1855
1856         if (wol->wolopts & ~WOL_SUPPORTED)
1857                 return -EINVAL;
1858         t4_wol_magic_enable(pi->adapter, pi->tx_chan,
1859                             (wol->wolopts & WAKE_MAGIC) ? dev->dev_addr : NULL);
1860         if (wol->wolopts & WAKE_BCAST) {
1861                 err = t4_wol_pat_enable(pi->adapter, pi->tx_chan, 0xfe, ~0ULL,
1862                                         ~0ULL, 0, false);
1863                 if (!err)
1864                         err = t4_wol_pat_enable(pi->adapter, pi->tx_chan, 1,
1865                                                 ~6ULL, ~0ULL, BCAST_CRC, true);
1866         } else
1867                 t4_wol_pat_enable(pi->adapter, pi->tx_chan, 0, 0, 0, 0, false);
1868         return err;
1869 }
1870
1871 #define TSO_FLAGS (NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_TSO_ECN)
1872
1873 static int set_tso(struct net_device *dev, u32 value)
1874 {
1875         if (value)
1876                 dev->features |= TSO_FLAGS;
1877         else
1878                 dev->features &= ~TSO_FLAGS;
1879         return 0;
1880 }
1881
1882 static int set_flags(struct net_device *dev, u32 flags)
1883 {
1884         return ethtool_op_set_flags(dev, flags, ETH_FLAG_RXHASH);
1885 }
1886
1887 static int get_rss_table(struct net_device *dev, struct ethtool_rxfh_indir *p)
1888 {
1889         const struct port_info *pi = netdev_priv(dev);
1890         unsigned int n = min_t(unsigned int, p->size, pi->rss_size);
1891
1892         p->size = pi->rss_size;
1893         while (n--)
1894                 p->ring_index[n] = pi->rss[n];
1895         return 0;
1896 }
1897
1898 static int set_rss_table(struct net_device *dev,
1899                          const struct ethtool_rxfh_indir *p)
1900 {
1901         unsigned int i;
1902         struct port_info *pi = netdev_priv(dev);
1903
1904         if (p->size != pi->rss_size)
1905                 return -EINVAL;
1906         for (i = 0; i < p->size; i++)
1907                 if (p->ring_index[i] >= pi->nqsets)
1908                         return -EINVAL;
1909         for (i = 0; i < p->size; i++)
1910                 pi->rss[i] = p->ring_index[i];
1911         if (pi->adapter->flags & FULL_INIT_DONE)
1912                 return write_rss(pi, pi->rss);
1913         return 0;
1914 }
1915
1916 static int get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
1917                      void *rules)
1918 {
1919         const struct port_info *pi = netdev_priv(dev);
1920
1921         switch (info->cmd) {
1922         case ETHTOOL_GRXFH: {
1923                 unsigned int v = pi->rss_mode;
1924
1925                 info->data = 0;
1926                 switch (info->flow_type) {
1927                 case TCP_V4_FLOW:
1928                         if (v & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN)
1929                                 info->data = RXH_IP_SRC | RXH_IP_DST |
1930                                              RXH_L4_B_0_1 | RXH_L4_B_2_3;
1931                         else if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN)
1932                                 info->data = RXH_IP_SRC | RXH_IP_DST;
1933                         break;
1934                 case UDP_V4_FLOW:
1935                         if ((v & FW_RSS_VI_CONFIG_CMD_IP4FOURTUPEN) &&
1936                             (v & FW_RSS_VI_CONFIG_CMD_UDPEN))
1937                                 info->data = RXH_IP_SRC | RXH_IP_DST |
1938                                              RXH_L4_B_0_1 | RXH_L4_B_2_3;
1939                         else if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN)
1940                                 info->data = RXH_IP_SRC | RXH_IP_DST;
1941                         break;
1942                 case SCTP_V4_FLOW:
1943                 case AH_ESP_V4_FLOW:
1944                 case IPV4_FLOW:
1945                         if (v & FW_RSS_VI_CONFIG_CMD_IP4TWOTUPEN)
1946                                 info->data = RXH_IP_SRC | RXH_IP_DST;
1947                         break;
1948                 case TCP_V6_FLOW:
1949                         if (v & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN)
1950                                 info->data = RXH_IP_SRC | RXH_IP_DST |
1951                                              RXH_L4_B_0_1 | RXH_L4_B_2_3;
1952                         else if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN)
1953                                 info->data = RXH_IP_SRC | RXH_IP_DST;
1954                         break;
1955                 case UDP_V6_FLOW:
1956                         if ((v & FW_RSS_VI_CONFIG_CMD_IP6FOURTUPEN) &&
1957                             (v & FW_RSS_VI_CONFIG_CMD_UDPEN))
1958                                 info->data = RXH_IP_SRC | RXH_IP_DST |
1959                                              RXH_L4_B_0_1 | RXH_L4_B_2_3;
1960                         else if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN)
1961                                 info->data = RXH_IP_SRC | RXH_IP_DST;
1962                         break;
1963                 case SCTP_V6_FLOW:
1964                 case AH_ESP_V6_FLOW:
1965                 case IPV6_FLOW:
1966                         if (v & FW_RSS_VI_CONFIG_CMD_IP6TWOTUPEN)
1967                                 info->data = RXH_IP_SRC | RXH_IP_DST;
1968                         break;
1969                 }
1970                 return 0;
1971         }
1972         case ETHTOOL_GRXRINGS:
1973                 info->data = pi->nqsets;
1974                 return 0;
1975         }
1976         return -EOPNOTSUPP;
1977 }
1978
1979 static struct ethtool_ops cxgb_ethtool_ops = {
1980         .get_settings      = get_settings,
1981         .set_settings      = set_settings,
1982         .get_drvinfo       = get_drvinfo,
1983         .get_msglevel      = get_msglevel,
1984         .set_msglevel      = set_msglevel,
1985         .get_ringparam     = get_sge_param,
1986         .set_ringparam     = set_sge_param,
1987         .get_coalesce      = get_coalesce,
1988         .set_coalesce      = set_coalesce,
1989         .get_eeprom_len    = get_eeprom_len,
1990         .get_eeprom        = get_eeprom,
1991         .set_eeprom        = set_eeprom,
1992         .get_pauseparam    = get_pauseparam,
1993         .set_pauseparam    = set_pauseparam,
1994         .get_rx_csum       = get_rx_csum,
1995         .set_rx_csum       = set_rx_csum,
1996         .set_tx_csum       = ethtool_op_set_tx_ipv6_csum,
1997         .set_sg            = ethtool_op_set_sg,
1998         .get_link          = ethtool_op_get_link,
1999         .get_strings       = get_strings,
2000         .phys_id           = identify_port,
2001         .nway_reset        = restart_autoneg,
2002         .get_sset_count    = get_sset_count,
2003         .get_ethtool_stats = get_stats,
2004         .get_regs_len      = get_regs_len,
2005         .get_regs          = get_regs,
2006         .get_wol           = get_wol,
2007         .set_wol           = set_wol,
2008         .set_tso           = set_tso,
2009         .set_flags         = set_flags,
2010         .get_rxnfc         = get_rxnfc,
2011         .get_rxfh_indir    = get_rss_table,
2012         .set_rxfh_indir    = set_rss_table,
2013         .flash_device      = set_flash,
2014 };
2015
2016 /*
2017  * debugfs support
2018  */
2019
2020 static int mem_open(struct inode *inode, struct file *file)
2021 {
2022         file->private_data = inode->i_private;
2023         return 0;
2024 }
2025
2026 static ssize_t mem_read(struct file *file, char __user *buf, size_t count,
2027                         loff_t *ppos)
2028 {
2029         loff_t pos = *ppos;
2030         loff_t avail = file->f_path.dentry->d_inode->i_size;
2031         unsigned int mem = (uintptr_t)file->private_data & 3;
2032         struct adapter *adap = file->private_data - mem;
2033
2034         if (pos < 0)
2035                 return -EINVAL;
2036         if (pos >= avail)
2037                 return 0;
2038         if (count > avail - pos)
2039                 count = avail - pos;
2040
2041         while (count) {
2042                 size_t len;
2043                 int ret, ofst;
2044                 __be32 data[16];
2045
2046                 if (mem == MEM_MC)
2047                         ret = t4_mc_read(adap, pos, data, NULL);
2048                 else
2049                         ret = t4_edc_read(adap, mem, pos, data, NULL);
2050                 if (ret)
2051                         return ret;
2052
2053                 ofst = pos % sizeof(data);
2054                 len = min(count, sizeof(data) - ofst);
2055                 if (copy_to_user(buf, (u8 *)data + ofst, len))
2056                         return -EFAULT;
2057
2058                 buf += len;
2059                 pos += len;
2060                 count -= len;
2061         }
2062         count = pos - *ppos;
2063         *ppos = pos;
2064         return count;
2065 }
2066
2067 static const struct file_operations mem_debugfs_fops = {
2068         .owner   = THIS_MODULE,
2069         .open    = mem_open,
2070         .read    = mem_read,
2071         .llseek  = default_llseek,
2072 };
2073
2074 static void __devinit add_debugfs_mem(struct adapter *adap, const char *name,
2075                                       unsigned int idx, unsigned int size_mb)
2076 {
2077         struct dentry *de;
2078
2079         de = debugfs_create_file(name, S_IRUSR, adap->debugfs_root,
2080                                  (void *)adap + idx, &mem_debugfs_fops);
2081         if (de && de->d_inode)
2082                 de->d_inode->i_size = size_mb << 20;
2083 }
2084
2085 static int __devinit setup_debugfs(struct adapter *adap)
2086 {
2087         int i;
2088
2089         if (IS_ERR_OR_NULL(adap->debugfs_root))
2090                 return -1;
2091
2092         i = t4_read_reg(adap, MA_TARGET_MEM_ENABLE);
2093         if (i & EDRAM0_ENABLE)
2094                 add_debugfs_mem(adap, "edc0", MEM_EDC0, 5);
2095         if (i & EDRAM1_ENABLE)
2096                 add_debugfs_mem(adap, "edc1", MEM_EDC1, 5);
2097         if (i & EXT_MEM_ENABLE)
2098                 add_debugfs_mem(adap, "mc", MEM_MC,
2099                         EXT_MEM_SIZE_GET(t4_read_reg(adap, MA_EXT_MEMORY_BAR)));
2100         if (adap->l2t)
2101                 debugfs_create_file("l2t", S_IRUSR, adap->debugfs_root, adap,
2102                                     &t4_l2t_fops);
2103         return 0;
2104 }
2105
2106 /*
2107  * upper-layer driver support
2108  */
2109
2110 /*
2111  * Allocate an active-open TID and set it to the supplied value.
2112  */
2113 int cxgb4_alloc_atid(struct tid_info *t, void *data)
2114 {
2115         int atid = -1;
2116
2117         spin_lock_bh(&t->atid_lock);
2118         if (t->afree) {
2119                 union aopen_entry *p = t->afree;
2120
2121                 atid = p - t->atid_tab;
2122                 t->afree = p->next;
2123                 p->data = data;
2124                 t->atids_in_use++;
2125         }
2126         spin_unlock_bh(&t->atid_lock);
2127         return atid;
2128 }
2129 EXPORT_SYMBOL(cxgb4_alloc_atid);
2130
2131 /*
2132  * Release an active-open TID.
2133  */
2134 void cxgb4_free_atid(struct tid_info *t, unsigned int atid)
2135 {
2136         union aopen_entry *p = &t->atid_tab[atid];
2137
2138         spin_lock_bh(&t->atid_lock);
2139         p->next = t->afree;
2140         t->afree = p;
2141         t->atids_in_use--;
2142         spin_unlock_bh(&t->atid_lock);
2143 }
2144 EXPORT_SYMBOL(cxgb4_free_atid);
2145
2146 /*
2147  * Allocate a server TID and set it to the supplied value.
2148  */
2149 int cxgb4_alloc_stid(struct tid_info *t, int family, void *data)
2150 {
2151         int stid;
2152
2153         spin_lock_bh(&t->stid_lock);
2154         if (family == PF_INET) {
2155                 stid = find_first_zero_bit(t->stid_bmap, t->nstids);
2156                 if (stid < t->nstids)
2157                         __set_bit(stid, t->stid_bmap);
2158                 else
2159                         stid = -1;
2160         } else {
2161                 stid = bitmap_find_free_region(t->stid_bmap, t->nstids, 2);
2162                 if (stid < 0)
2163                         stid = -1;
2164         }
2165         if (stid >= 0) {
2166                 t->stid_tab[stid].data = data;
2167                 stid += t->stid_base;
2168                 t->stids_in_use++;
2169         }
2170         spin_unlock_bh(&t->stid_lock);
2171         return stid;
2172 }
2173 EXPORT_SYMBOL(cxgb4_alloc_stid);
2174
2175 /*
2176  * Release a server TID.
2177  */
2178 void cxgb4_free_stid(struct tid_info *t, unsigned int stid, int family)
2179 {
2180         stid -= t->stid_base;
2181         spin_lock_bh(&t->stid_lock);
2182         if (family == PF_INET)
2183                 __clear_bit(stid, t->stid_bmap);
2184         else
2185                 bitmap_release_region(t->stid_bmap, stid, 2);
2186         t->stid_tab[stid].data = NULL;
2187         t->stids_in_use--;
2188         spin_unlock_bh(&t->stid_lock);
2189 }
2190 EXPORT_SYMBOL(cxgb4_free_stid);
2191
2192 /*
2193  * Populate a TID_RELEASE WR.  Caller must properly size the skb.
2194  */
2195 static void mk_tid_release(struct sk_buff *skb, unsigned int chan,
2196                            unsigned int tid)
2197 {
2198         struct cpl_tid_release *req;
2199
2200         set_wr_txq(skb, CPL_PRIORITY_SETUP, chan);
2201         req = (struct cpl_tid_release *)__skb_put(skb, sizeof(*req));
2202         INIT_TP_WR(req, tid);
2203         OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_TID_RELEASE, tid));
2204 }
2205
2206 /*
2207  * Queue a TID release request and if necessary schedule a work queue to
2208  * process it.
2209  */
2210 static void cxgb4_queue_tid_release(struct tid_info *t, unsigned int chan,
2211                                     unsigned int tid)
2212 {
2213         void **p = &t->tid_tab[tid];
2214         struct adapter *adap = container_of(t, struct adapter, tids);
2215
2216         spin_lock_bh(&adap->tid_release_lock);
2217         *p = adap->tid_release_head;
2218         /* Low 2 bits encode the Tx channel number */
2219         adap->tid_release_head = (void **)((uintptr_t)p | chan);
2220         if (!adap->tid_release_task_busy) {
2221                 adap->tid_release_task_busy = true;
2222                 schedule_work(&adap->tid_release_task);
2223         }
2224         spin_unlock_bh(&adap->tid_release_lock);
2225 }
2226
2227 /*
2228  * Process the list of pending TID release requests.
2229  */
2230 static void process_tid_release_list(struct work_struct *work)
2231 {
2232         struct sk_buff *skb;
2233         struct adapter *adap;
2234
2235         adap = container_of(work, struct adapter, tid_release_task);
2236
2237         spin_lock_bh(&adap->tid_release_lock);
2238         while (adap->tid_release_head) {
2239                 void **p = adap->tid_release_head;
2240                 unsigned int chan = (uintptr_t)p & 3;
2241                 p = (void *)p - chan;
2242
2243                 adap->tid_release_head = *p;
2244                 *p = NULL;
2245                 spin_unlock_bh(&adap->tid_release_lock);
2246
2247                 while (!(skb = alloc_skb(sizeof(struct cpl_tid_release),
2248                                          GFP_KERNEL)))
2249                         schedule_timeout_uninterruptible(1);
2250
2251                 mk_tid_release(skb, chan, p - adap->tids.tid_tab);
2252                 t4_ofld_send(adap, skb);
2253                 spin_lock_bh(&adap->tid_release_lock);
2254         }
2255         adap->tid_release_task_busy = false;
2256         spin_unlock_bh(&adap->tid_release_lock);
2257 }
2258
2259 /*
2260  * Release a TID and inform HW.  If we are unable to allocate the release
2261  * message we defer to a work queue.
2262  */
2263 void cxgb4_remove_tid(struct tid_info *t, unsigned int chan, unsigned int tid)
2264 {
2265         void *old;
2266         struct sk_buff *skb;
2267         struct adapter *adap = container_of(t, struct adapter, tids);
2268
2269         old = t->tid_tab[tid];
2270         skb = alloc_skb(sizeof(struct cpl_tid_release), GFP_ATOMIC);
2271         if (likely(skb)) {
2272                 t->tid_tab[tid] = NULL;
2273                 mk_tid_release(skb, chan, tid);
2274                 t4_ofld_send(adap, skb);
2275         } else
2276                 cxgb4_queue_tid_release(t, chan, tid);
2277         if (old)
2278                 atomic_dec(&t->tids_in_use);
2279 }
2280 EXPORT_SYMBOL(cxgb4_remove_tid);
2281
2282 /*
2283  * Allocate and initialize the TID tables.  Returns 0 on success.
2284  */
2285 static int tid_init(struct tid_info *t)
2286 {
2287         size_t size;
2288         unsigned int natids = t->natids;
2289
2290         size = t->ntids * sizeof(*t->tid_tab) + natids * sizeof(*t->atid_tab) +
2291                t->nstids * sizeof(*t->stid_tab) +
2292                BITS_TO_LONGS(t->nstids) * sizeof(long);
2293         t->tid_tab = t4_alloc_mem(size);
2294         if (!t->tid_tab)
2295                 return -ENOMEM;
2296
2297         t->atid_tab = (union aopen_entry *)&t->tid_tab[t->ntids];
2298         t->stid_tab = (struct serv_entry *)&t->atid_tab[natids];
2299         t->stid_bmap = (unsigned long *)&t->stid_tab[t->nstids];
2300         spin_lock_init(&t->stid_lock);
2301         spin_lock_init(&t->atid_lock);
2302
2303         t->stids_in_use = 0;
2304         t->afree = NULL;
2305         t->atids_in_use = 0;
2306         atomic_set(&t->tids_in_use, 0);
2307
2308         /* Setup the free list for atid_tab and clear the stid bitmap. */
2309         if (natids) {
2310                 while (--natids)
2311                         t->atid_tab[natids - 1].next = &t->atid_tab[natids];
2312                 t->afree = t->atid_tab;
2313         }
2314         bitmap_zero(t->stid_bmap, t->nstids);
2315         return 0;
2316 }
2317
2318 /**
2319  *      cxgb4_create_server - create an IP server
2320  *      @dev: the device
2321  *      @stid: the server TID
2322  *      @sip: local IP address to bind server to
2323  *      @sport: the server's TCP port
2324  *      @queue: queue to direct messages from this server to
2325  *
2326  *      Create an IP server for the given port and address.
2327  *      Returns <0 on error and one of the %NET_XMIT_* values on success.
2328  */
2329 int cxgb4_create_server(const struct net_device *dev, unsigned int stid,
2330                         __be32 sip, __be16 sport, unsigned int queue)
2331 {
2332         unsigned int chan;
2333         struct sk_buff *skb;
2334         struct adapter *adap;
2335         struct cpl_pass_open_req *req;
2336
2337         skb = alloc_skb(sizeof(*req), GFP_KERNEL);
2338         if (!skb)
2339                 return -ENOMEM;
2340
2341         adap = netdev2adap(dev);
2342         req = (struct cpl_pass_open_req *)__skb_put(skb, sizeof(*req));
2343         INIT_TP_WR(req, 0);
2344         OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_PASS_OPEN_REQ, stid));
2345         req->local_port = sport;
2346         req->peer_port = htons(0);
2347         req->local_ip = sip;
2348         req->peer_ip = htonl(0);
2349         chan = rxq_to_chan(&adap->sge, queue);
2350         req->opt0 = cpu_to_be64(TX_CHAN(chan));
2351         req->opt1 = cpu_to_be64(CONN_POLICY_ASK |
2352                                 SYN_RSS_ENABLE | SYN_RSS_QUEUE(queue));
2353         return t4_mgmt_tx(adap, skb);
2354 }
2355 EXPORT_SYMBOL(cxgb4_create_server);
2356
2357 /**
2358  *      cxgb4_best_mtu - find the entry in the MTU table closest to an MTU
2359  *      @mtus: the HW MTU table
2360  *      @mtu: the target MTU
2361  *      @idx: index of selected entry in the MTU table
2362  *
2363  *      Returns the index and the value in the HW MTU table that is closest to
2364  *      but does not exceed @mtu, unless @mtu is smaller than any value in the
2365  *      table, in which case that smallest available value is selected.
2366  */
2367 unsigned int cxgb4_best_mtu(const unsigned short *mtus, unsigned short mtu,
2368                             unsigned int *idx)
2369 {
2370         unsigned int i = 0;
2371
2372         while (i < NMTUS - 1 && mtus[i + 1] <= mtu)
2373                 ++i;
2374         if (idx)
2375                 *idx = i;
2376         return mtus[i];
2377 }
2378 EXPORT_SYMBOL(cxgb4_best_mtu);
2379
2380 /**
2381  *      cxgb4_port_chan - get the HW channel of a port
2382  *      @dev: the net device for the port
2383  *
2384  *      Return the HW Tx channel of the given port.
2385  */
2386 unsigned int cxgb4_port_chan(const struct net_device *dev)
2387 {
2388         return netdev2pinfo(dev)->tx_chan;
2389 }
2390 EXPORT_SYMBOL(cxgb4_port_chan);
2391
2392 /**
2393  *      cxgb4_port_viid - get the VI id of a port
2394  *      @dev: the net device for the port
2395  *
2396  *      Return the VI id of the given port.
2397  */
2398 unsigned int cxgb4_port_viid(const struct net_device *dev)
2399 {
2400         return netdev2pinfo(dev)->viid;
2401 }
2402 EXPORT_SYMBOL(cxgb4_port_viid);
2403
2404 /**
2405  *      cxgb4_port_idx - get the index of a port
2406  *      @dev: the net device for the port
2407  *
2408  *      Return the index of the given port.
2409  */
2410 unsigned int cxgb4_port_idx(const struct net_device *dev)
2411 {
2412         return netdev2pinfo(dev)->port_id;
2413 }
2414 EXPORT_SYMBOL(cxgb4_port_idx);
2415
2416 void cxgb4_get_tcp_stats(struct pci_dev *pdev, struct tp_tcp_stats *v4,
2417                          struct tp_tcp_stats *v6)
2418 {
2419         struct adapter *adap = pci_get_drvdata(pdev);
2420
2421         spin_lock(&adap->stats_lock);
2422         t4_tp_get_tcp_stats(adap, v4, v6);
2423         spin_unlock(&adap->stats_lock);
2424 }
2425 EXPORT_SYMBOL(cxgb4_get_tcp_stats);
2426
2427 void cxgb4_iscsi_init(struct net_device *dev, unsigned int tag_mask,
2428                       const unsigned int *pgsz_order)
2429 {
2430         struct adapter *adap = netdev2adap(dev);
2431
2432         t4_write_reg(adap, ULP_RX_ISCSI_TAGMASK, tag_mask);
2433         t4_write_reg(adap, ULP_RX_ISCSI_PSZ, HPZ0(pgsz_order[0]) |
2434                      HPZ1(pgsz_order[1]) | HPZ2(pgsz_order[2]) |
2435                      HPZ3(pgsz_order[3]));
2436 }
2437 EXPORT_SYMBOL(cxgb4_iscsi_init);
2438
2439 static struct pci_driver cxgb4_driver;
2440
2441 static void check_neigh_update(struct neighbour *neigh)
2442 {
2443         const struct device *parent;
2444         const struct net_device *netdev = neigh->dev;
2445
2446         if (netdev->priv_flags & IFF_802_1Q_VLAN)
2447                 netdev = vlan_dev_real_dev(netdev);
2448         parent = netdev->dev.parent;
2449         if (parent && parent->driver == &cxgb4_driver.driver)
2450                 t4_l2t_update(dev_get_drvdata(parent), neigh);
2451 }
2452
2453 static int netevent_cb(struct notifier_block *nb, unsigned long event,
2454                        void *data)
2455 {
2456         switch (event) {
2457         case NETEVENT_NEIGH_UPDATE:
2458                 check_neigh_update(data);
2459                 break;
2460         case NETEVENT_PMTU_UPDATE:
2461         case NETEVENT_REDIRECT:
2462         default:
2463                 break;
2464         }
2465         return 0;
2466 }
2467
2468 static bool netevent_registered;
2469 static struct notifier_block cxgb4_netevent_nb = {
2470         .notifier_call = netevent_cb
2471 };
2472
2473 static void uld_attach(struct adapter *adap, unsigned int uld)
2474 {
2475         void *handle;
2476         struct cxgb4_lld_info lli;
2477
2478         lli.pdev = adap->pdev;
2479         lli.l2t = adap->l2t;
2480         lli.tids = &adap->tids;
2481         lli.ports = adap->port;
2482         lli.vr = &adap->vres;
2483         lli.mtus = adap->params.mtus;
2484         if (uld == CXGB4_ULD_RDMA) {
2485                 lli.rxq_ids = adap->sge.rdma_rxq;
2486                 lli.nrxq = adap->sge.rdmaqs;
2487         } else if (uld == CXGB4_ULD_ISCSI) {
2488                 lli.rxq_ids = adap->sge.ofld_rxq;
2489                 lli.nrxq = adap->sge.ofldqsets;
2490         }
2491         lli.ntxq = adap->sge.ofldqsets;
2492         lli.nchan = adap->params.nports;
2493         lli.nports = adap->params.nports;
2494         lli.wr_cred = adap->params.ofldq_wr_cred;
2495         lli.adapter_type = adap->params.rev;
2496         lli.iscsi_iolen = MAXRXDATA_GET(t4_read_reg(adap, TP_PARA_REG2));
2497         lli.udb_density = 1 << QUEUESPERPAGEPF0_GET(
2498                         t4_read_reg(adap, SGE_EGRESS_QUEUES_PER_PAGE_PF) >>
2499                         (adap->fn * 4));
2500         lli.ucq_density = 1 << QUEUESPERPAGEPF0_GET(
2501                         t4_read_reg(adap, SGE_INGRESS_QUEUES_PER_PAGE_PF) >>
2502                         (adap->fn * 4));
2503         lli.gts_reg = adap->regs + MYPF_REG(SGE_PF_GTS);
2504         lli.db_reg = adap->regs + MYPF_REG(SGE_PF_KDOORBELL);
2505         lli.fw_vers = adap->params.fw_vers;
2506
2507         handle = ulds[uld].add(&lli);
2508         if (IS_ERR(handle)) {
2509                 dev_warn(adap->pdev_dev,
2510                          "could not attach to the %s driver, error %ld\n",
2511                          uld_str[uld], PTR_ERR(handle));
2512                 return;
2513         }
2514
2515         adap->uld_handle[uld] = handle;
2516
2517         if (!netevent_registered) {
2518                 register_netevent_notifier(&cxgb4_netevent_nb);
2519                 netevent_registered = true;
2520         }
2521
2522         if (adap->flags & FULL_INIT_DONE)
2523                 ulds[uld].state_change(handle, CXGB4_STATE_UP);
2524 }
2525
2526 static void attach_ulds(struct adapter *adap)
2527 {
2528         unsigned int i;
2529
2530         mutex_lock(&uld_mutex);
2531         list_add_tail(&adap->list_node, &adapter_list);
2532         for (i = 0; i < CXGB4_ULD_MAX; i++)
2533                 if (ulds[i].add)
2534                         uld_attach(adap, i);
2535         mutex_unlock(&uld_mutex);
2536 }
2537
2538 static void detach_ulds(struct adapter *adap)
2539 {
2540         unsigned int i;
2541
2542         mutex_lock(&uld_mutex);
2543         list_del(&adap->list_node);
2544         for (i = 0; i < CXGB4_ULD_MAX; i++)
2545                 if (adap->uld_handle[i]) {
2546                         ulds[i].state_change(adap->uld_handle[i],
2547                                              CXGB4_STATE_DETACH);
2548                         adap->uld_handle[i] = NULL;
2549                 }
2550         if (netevent_registered && list_empty(&adapter_list)) {
2551                 unregister_netevent_notifier(&cxgb4_netevent_nb);
2552                 netevent_registered = false;
2553         }
2554         mutex_unlock(&uld_mutex);
2555 }
2556
2557 static void notify_ulds(struct adapter *adap, enum cxgb4_state new_state)
2558 {
2559         unsigned int i;
2560
2561         mutex_lock(&uld_mutex);
2562         for (i = 0; i < CXGB4_ULD_MAX; i++)
2563                 if (adap->uld_handle[i])
2564                         ulds[i].state_change(adap->uld_handle[i], new_state);
2565         mutex_unlock(&uld_mutex);
2566 }
2567
2568 /**
2569  *      cxgb4_register_uld - register an upper-layer driver
2570  *      @type: the ULD type
2571  *      @p: the ULD methods
2572  *
2573  *      Registers an upper-layer driver with this driver and notifies the ULD
2574  *      about any presently available devices that support its type.  Returns
2575  *      %-EBUSY if a ULD of the same type is already registered.
2576  */
2577 int cxgb4_register_uld(enum cxgb4_uld type, const struct cxgb4_uld_info *p)
2578 {
2579         int ret = 0;
2580         struct adapter *adap;
2581
2582         if (type >= CXGB4_ULD_MAX)
2583                 return -EINVAL;
2584         mutex_lock(&uld_mutex);
2585         if (ulds[type].add) {
2586                 ret = -EBUSY;
2587                 goto out;
2588         }
2589         ulds[type] = *p;
2590         list_for_each_entry(adap, &adapter_list, list_node)
2591                 uld_attach(adap, type);
2592 out:    mutex_unlock(&uld_mutex);
2593         return ret;
2594 }
2595 EXPORT_SYMBOL(cxgb4_register_uld);
2596
2597 /**
2598  *      cxgb4_unregister_uld - unregister an upper-layer driver
2599  *      @type: the ULD type
2600  *
2601  *      Unregisters an existing upper-layer driver.
2602  */
2603 int cxgb4_unregister_uld(enum cxgb4_uld type)
2604 {
2605         struct adapter *adap;
2606
2607         if (type >= CXGB4_ULD_MAX)
2608                 return -EINVAL;
2609         mutex_lock(&uld_mutex);
2610         list_for_each_entry(adap, &adapter_list, list_node)
2611                 adap->uld_handle[type] = NULL;
2612         ulds[type].add = NULL;
2613         mutex_unlock(&uld_mutex);
2614         return 0;
2615 }
2616 EXPORT_SYMBOL(cxgb4_unregister_uld);
2617
2618 /**
2619  *      cxgb_up - enable the adapter
2620  *      @adap: adapter being enabled
2621  *
2622  *      Called when the first port is enabled, this function performs the
2623  *      actions necessary to make an adapter operational, such as completing
2624  *      the initialization of HW modules, and enabling interrupts.
2625  *
2626  *      Must be called with the rtnl lock held.
2627  */
2628 static int cxgb_up(struct adapter *adap)
2629 {
2630         int err;
2631
2632         err = setup_sge_queues(adap);
2633         if (err)
2634                 goto out;
2635         err = setup_rss(adap);
2636         if (err)
2637                 goto freeq;
2638
2639         if (adap->flags & USING_MSIX) {
2640                 name_msix_vecs(adap);
2641                 err = request_irq(adap->msix_info[0].vec, t4_nondata_intr, 0,
2642                                   adap->msix_info[0].desc, adap);
2643                 if (err)
2644                         goto irq_err;
2645
2646                 err = request_msix_queue_irqs(adap);
2647                 if (err) {
2648                         free_irq(adap->msix_info[0].vec, adap);
2649                         goto irq_err;
2650                 }
2651         } else {
2652                 err = request_irq(adap->pdev->irq, t4_intr_handler(adap),
2653                                   (adap->flags & USING_MSI) ? 0 : IRQF_SHARED,
2654                                   adap->name, adap);
2655                 if (err)
2656                         goto irq_err;
2657         }
2658         enable_rx(adap);
2659         t4_sge_start(adap);
2660         t4_intr_enable(adap);
2661         adap->flags |= FULL_INIT_DONE;
2662         notify_ulds(adap, CXGB4_STATE_UP);
2663  out:
2664         return err;
2665  irq_err:
2666         dev_err(adap->pdev_dev, "request_irq failed, err %d\n", err);
2667  freeq:
2668         t4_free_sge_resources(adap);
2669         goto out;
2670 }
2671
2672 static void cxgb_down(struct adapter *adapter)
2673 {
2674         t4_intr_disable(adapter);
2675         cancel_work_sync(&adapter->tid_release_task);
2676         adapter->tid_release_task_busy = false;
2677         adapter->tid_release_head = NULL;
2678
2679         if (adapter->flags & USING_MSIX) {
2680                 free_msix_queue_irqs(adapter);
2681                 free_irq(adapter->msix_info[0].vec, adapter);
2682         } else
2683                 free_irq(adapter->pdev->irq, adapter);
2684         quiesce_rx(adapter);
2685         t4_sge_stop(adapter);
2686         t4_free_sge_resources(adapter);
2687         adapter->flags &= ~FULL_INIT_DONE;
2688 }
2689
2690 /*
2691  * net_device operations
2692  */
2693 static int cxgb_open(struct net_device *dev)
2694 {
2695         int err;
2696         struct port_info *pi = netdev_priv(dev);
2697         struct adapter *adapter = pi->adapter;
2698
2699         if (!(adapter->flags & FULL_INIT_DONE)) {
2700                 err = cxgb_up(adapter);
2701                 if (err < 0)
2702                         return err;
2703         }
2704
2705         netif_set_real_num_tx_queues(dev, pi->nqsets);
2706         err = netif_set_real_num_rx_queues(dev, pi->nqsets);
2707         if (err)
2708                 return err;
2709         err = link_start(dev);
2710         if (!err)
2711                 netif_tx_start_all_queues(dev);
2712         return err;
2713 }
2714
2715 static int cxgb_close(struct net_device *dev)
2716 {
2717         struct port_info *pi = netdev_priv(dev);
2718         struct adapter *adapter = pi->adapter;
2719
2720         netif_tx_stop_all_queues(dev);
2721         netif_carrier_off(dev);
2722         return t4_enable_vi(adapter, adapter->fn, pi->viid, false, false);
2723 }
2724
2725 static struct rtnl_link_stats64 *cxgb_get_stats(struct net_device *dev,
2726                                                 struct rtnl_link_stats64 *ns)
2727 {
2728         struct port_stats stats;
2729         struct port_info *p = netdev_priv(dev);
2730         struct adapter *adapter = p->adapter;
2731
2732         spin_lock(&adapter->stats_lock);
2733         t4_get_port_stats(adapter, p->tx_chan, &stats);
2734         spin_unlock(&adapter->stats_lock);
2735
2736         ns->tx_bytes   = stats.tx_octets;
2737         ns->tx_packets = stats.tx_frames;
2738         ns->rx_bytes   = stats.rx_octets;
2739         ns->rx_packets = stats.rx_frames;
2740         ns->multicast  = stats.rx_mcast_frames;
2741
2742         /* detailed rx_errors */
2743         ns->rx_length_errors = stats.rx_jabber + stats.rx_too_long +
2744                                stats.rx_runt;
2745         ns->rx_over_errors   = 0;
2746         ns->rx_crc_errors    = stats.rx_fcs_err;
2747         ns->rx_frame_errors  = stats.rx_symbol_err;
2748         ns->rx_fifo_errors   = stats.rx_ovflow0 + stats.rx_ovflow1 +
2749                                stats.rx_ovflow2 + stats.rx_ovflow3 +
2750                                stats.rx_trunc0 + stats.rx_trunc1 +
2751                                stats.rx_trunc2 + stats.rx_trunc3;
2752         ns->rx_missed_errors = 0;
2753
2754         /* detailed tx_errors */
2755         ns->tx_aborted_errors   = 0;
2756         ns->tx_carrier_errors   = 0;
2757         ns->tx_fifo_errors      = 0;
2758         ns->tx_heartbeat_errors = 0;
2759         ns->tx_window_errors    = 0;
2760
2761         ns->tx_errors = stats.tx_error_frames;
2762         ns->rx_errors = stats.rx_symbol_err + stats.rx_fcs_err +
2763                 ns->rx_length_errors + stats.rx_len_err + ns->rx_fifo_errors;
2764         return ns;
2765 }
2766
2767 static int cxgb_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
2768 {
2769         unsigned int mbox;
2770         int ret = 0, prtad, devad;
2771         struct port_info *pi = netdev_priv(dev);
2772         struct mii_ioctl_data *data = (struct mii_ioctl_data *)&req->ifr_data;
2773
2774         switch (cmd) {
2775         case SIOCGMIIPHY:
2776                 if (pi->mdio_addr < 0)
2777                         return -EOPNOTSUPP;
2778                 data->phy_id = pi->mdio_addr;
2779                 break;
2780         case SIOCGMIIREG:
2781         case SIOCSMIIREG:
2782                 if (mdio_phy_id_is_c45(data->phy_id)) {
2783                         prtad = mdio_phy_id_prtad(data->phy_id);
2784                         devad = mdio_phy_id_devad(data->phy_id);
2785                 } else if (data->phy_id < 32) {
2786                         prtad = data->phy_id;
2787                         devad = 0;
2788                         data->reg_num &= 0x1f;
2789                 } else
2790                         return -EINVAL;
2791
2792                 mbox = pi->adapter->fn;
2793                 if (cmd == SIOCGMIIREG)
2794                         ret = t4_mdio_rd(pi->adapter, mbox, prtad, devad,
2795                                          data->reg_num, &data->val_out);
2796                 else
2797                         ret = t4_mdio_wr(pi->adapter, mbox, prtad, devad,
2798                                          data->reg_num, data->val_in);
2799                 break;
2800         default:
2801                 return -EOPNOTSUPP;
2802         }
2803         return ret;
2804 }
2805
2806 static void cxgb_set_rxmode(struct net_device *dev)
2807 {
2808         /* unfortunately we can't return errors to the stack */
2809         set_rxmode(dev, -1, false);
2810 }
2811
2812 static int cxgb_change_mtu(struct net_device *dev, int new_mtu)
2813 {
2814         int ret;
2815         struct port_info *pi = netdev_priv(dev);
2816
2817         if (new_mtu < 81 || new_mtu > MAX_MTU)         /* accommodate SACK */
2818                 return -EINVAL;
2819         ret = t4_set_rxmode(pi->adapter, pi->adapter->fn, pi->viid, new_mtu, -1,
2820                             -1, -1, -1, true);
2821         if (!ret)
2822                 dev->mtu = new_mtu;
2823         return ret;
2824 }
2825
2826 static int cxgb_set_mac_addr(struct net_device *dev, void *p)
2827 {
2828         int ret;
2829         struct sockaddr *addr = p;
2830         struct port_info *pi = netdev_priv(dev);
2831
2832         if (!is_valid_ether_addr(addr->sa_data))
2833                 return -EINVAL;
2834
2835         ret = t4_change_mac(pi->adapter, pi->adapter->fn, pi->viid,
2836                             pi->xact_addr_filt, addr->sa_data, true, true);
2837         if (ret < 0)
2838                 return ret;
2839
2840         memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
2841         pi->xact_addr_filt = ret;
2842         return 0;
2843 }
2844
2845 static void vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
2846 {
2847         struct port_info *pi = netdev_priv(dev);
2848
2849         pi->vlan_grp = grp;
2850         t4_set_rxmode(pi->adapter, pi->adapter->fn, pi->viid, -1, -1, -1, -1,
2851                       grp != NULL, true);
2852 }
2853
2854 #ifdef CONFIG_NET_POLL_CONTROLLER
2855 static void cxgb_netpoll(struct net_device *dev)
2856 {
2857         struct port_info *pi = netdev_priv(dev);
2858         struct adapter *adap = pi->adapter;
2859
2860         if (adap->flags & USING_MSIX) {
2861                 int i;
2862                 struct sge_eth_rxq *rx = &adap->sge.ethrxq[pi->first_qset];
2863
2864                 for (i = pi->nqsets; i; i--, rx++)
2865                         t4_sge_intr_msix(0, &rx->rspq);
2866         } else
2867                 t4_intr_handler(adap)(0, adap);
2868 }
2869 #endif
2870
2871 static const struct net_device_ops cxgb4_netdev_ops = {
2872         .ndo_open             = cxgb_open,
2873         .ndo_stop             = cxgb_close,
2874         .ndo_start_xmit       = t4_eth_xmit,
2875         .ndo_get_stats64      = cxgb_get_stats,
2876         .ndo_set_rx_mode      = cxgb_set_rxmode,
2877         .ndo_set_mac_address  = cxgb_set_mac_addr,
2878         .ndo_validate_addr    = eth_validate_addr,
2879         .ndo_do_ioctl         = cxgb_ioctl,
2880         .ndo_change_mtu       = cxgb_change_mtu,
2881         .ndo_vlan_rx_register = vlan_rx_register,
2882 #ifdef CONFIG_NET_POLL_CONTROLLER
2883         .ndo_poll_controller  = cxgb_netpoll,
2884 #endif
2885 };
2886
2887 void t4_fatal_err(struct adapter *adap)
2888 {
2889         t4_set_reg_field(adap, SGE_CONTROL, GLOBALENABLE, 0);
2890         t4_intr_disable(adap);
2891         dev_alert(adap->pdev_dev, "encountered fatal error, adapter stopped\n");
2892 }
2893
2894 static void setup_memwin(struct adapter *adap)
2895 {
2896         u32 bar0;
2897
2898         bar0 = pci_resource_start(adap->pdev, 0);  /* truncation intentional */
2899         t4_write_reg(adap, PCIE_MEM_ACCESS_REG(PCIE_MEM_ACCESS_BASE_WIN, 0),
2900                      (bar0 + MEMWIN0_BASE) | BIR(0) |
2901                      WINDOW(ilog2(MEMWIN0_APERTURE) - 10));
2902         t4_write_reg(adap, PCIE_MEM_ACCESS_REG(PCIE_MEM_ACCESS_BASE_WIN, 1),
2903                      (bar0 + MEMWIN1_BASE) | BIR(0) |
2904                      WINDOW(ilog2(MEMWIN1_APERTURE) - 10));
2905         t4_write_reg(adap, PCIE_MEM_ACCESS_REG(PCIE_MEM_ACCESS_BASE_WIN, 2),
2906                      (bar0 + MEMWIN2_BASE) | BIR(0) |
2907                      WINDOW(ilog2(MEMWIN2_APERTURE) - 10));
2908         if (adap->vres.ocq.size) {
2909                 unsigned int start, sz_kb;
2910
2911                 start = pci_resource_start(adap->pdev, 2) +
2912                         OCQ_WIN_OFFSET(adap->pdev, &adap->vres);
2913                 sz_kb = roundup_pow_of_two(adap->vres.ocq.size) >> 10;
2914                 t4_write_reg(adap,
2915                              PCIE_MEM_ACCESS_REG(PCIE_MEM_ACCESS_BASE_WIN, 3),
2916                              start | BIR(1) | WINDOW(ilog2(sz_kb)));
2917                 t4_write_reg(adap,
2918                              PCIE_MEM_ACCESS_REG(PCIE_MEM_ACCESS_OFFSET, 3),
2919                              adap->vres.ocq.start);
2920                 t4_read_reg(adap,
2921                             PCIE_MEM_ACCESS_REG(PCIE_MEM_ACCESS_OFFSET, 3));
2922         }
2923 }
2924
2925 static int adap_init1(struct adapter *adap, struct fw_caps_config_cmd *c)
2926 {
2927         u32 v;
2928         int ret;
2929
2930         /* get device capabilities */
2931         memset(c, 0, sizeof(*c));
2932         c->op_to_write = htonl(FW_CMD_OP(FW_CAPS_CONFIG_CMD) |
2933                                FW_CMD_REQUEST | FW_CMD_READ);
2934         c->retval_len16 = htonl(FW_LEN16(*c));
2935         ret = t4_wr_mbox(adap, adap->fn, c, sizeof(*c), c);
2936         if (ret < 0)
2937                 return ret;
2938
2939         /* select capabilities we'll be using */
2940         if (c->niccaps & htons(FW_CAPS_CONFIG_NIC_VM)) {
2941                 if (!vf_acls)
2942                         c->niccaps ^= htons(FW_CAPS_CONFIG_NIC_VM);
2943                 else
2944                         c->niccaps = htons(FW_CAPS_CONFIG_NIC_VM);
2945         } else if (vf_acls) {
2946                 dev_err(adap->pdev_dev, "virtualization ACLs not supported");
2947                 return ret;
2948         }
2949         c->op_to_write = htonl(FW_CMD_OP(FW_CAPS_CONFIG_CMD) |
2950                                FW_CMD_REQUEST | FW_CMD_WRITE);
2951         ret = t4_wr_mbox(adap, adap->fn, c, sizeof(*c), NULL);
2952         if (ret < 0)
2953                 return ret;
2954
2955         ret = t4_config_glbl_rss(adap, adap->fn,
2956                                  FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL,
2957                                  FW_RSS_GLB_CONFIG_CMD_TNLMAPEN |
2958                                  FW_RSS_GLB_CONFIG_CMD_TNLALLLKP);
2959         if (ret < 0)
2960                 return ret;
2961
2962         ret = t4_cfg_pfvf(adap, adap->fn, adap->fn, 0, MAX_EGRQ, 64, MAX_INGQ,
2963                           0, 0, 4, 0xf, 0xf, 16, FW_CMD_CAP_PF, FW_CMD_CAP_PF);
2964         if (ret < 0)
2965                 return ret;
2966
2967         t4_sge_init(adap);
2968
2969         /* tweak some settings */
2970         t4_write_reg(adap, TP_SHIFT_CNT, 0x64f8849);
2971         t4_write_reg(adap, ULP_RX_TDDP_PSZ, HPZ0(PAGE_SHIFT - 12));
2972         t4_write_reg(adap, TP_PIO_ADDR, TP_INGRESS_CONFIG);
2973         v = t4_read_reg(adap, TP_PIO_DATA);
2974         t4_write_reg(adap, TP_PIO_DATA, v & ~CSUM_HAS_PSEUDO_HDR);
2975
2976         /* get basic stuff going */
2977         return t4_early_init(adap, adap->fn);
2978 }
2979
2980 /*
2981  * Max # of ATIDs.  The absolute HW max is 16K but we keep it lower.
2982  */
2983 #define MAX_ATIDS 8192U
2984
2985 /*
2986  * Phase 0 of initialization: contact FW, obtain config, perform basic init.
2987  */
2988 static int adap_init0(struct adapter *adap)
2989 {
2990         int ret;
2991         u32 v, port_vec;
2992         enum dev_state state;
2993         u32 params[7], val[7];
2994         struct fw_caps_config_cmd c;
2995
2996         ret = t4_check_fw_version(adap);
2997         if (ret == -EINVAL || ret > 0) {
2998                 if (upgrade_fw(adap) >= 0)             /* recache FW version */
2999                         ret = t4_check_fw_version(adap);
3000         }
3001         if (ret < 0)
3002                 return ret;
3003
3004         /* contact FW, request master */
3005         ret = t4_fw_hello(adap, adap->fn, adap->fn, MASTER_MUST, &state);
3006         if (ret < 0) {
3007                 dev_err(adap->pdev_dev, "could not connect to FW, error %d\n",
3008                         ret);
3009                 return ret;
3010         }
3011
3012         /* reset device */
3013         ret = t4_fw_reset(adap, adap->fn, PIORSTMODE | PIORST);
3014         if (ret < 0)
3015                 goto bye;
3016
3017         for (v = 0; v < SGE_NTIMERS - 1; v++)
3018                 adap->sge.timer_val[v] = min(intr_holdoff[v], MAX_SGE_TIMERVAL);
3019         adap->sge.timer_val[SGE_NTIMERS - 1] = MAX_SGE_TIMERVAL;
3020         adap->sge.counter_val[0] = 1;
3021         for (v = 1; v < SGE_NCOUNTERS; v++)
3022                 adap->sge.counter_val[v] = min(intr_cnt[v - 1],
3023                                                THRESHOLD_3_MASK);
3024 #define FW_PARAM_DEV(param) \
3025         (FW_PARAMS_MNEM(FW_PARAMS_MNEM_DEV) | \
3026          FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DEV_##param))
3027
3028         params[0] = FW_PARAM_DEV(CCLK);
3029         ret = t4_query_params(adap, adap->fn, adap->fn, 0, 1, params, val);
3030         if (ret < 0)
3031                 goto bye;
3032         adap->params.vpd.cclk = val[0];
3033
3034         ret = adap_init1(adap, &c);
3035         if (ret < 0)
3036                 goto bye;
3037
3038 #define FW_PARAM_PFVF(param) \
3039         (FW_PARAMS_MNEM(FW_PARAMS_MNEM_PFVF) | \
3040          FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_PFVF_##param) | \
3041          FW_PARAMS_PARAM_Y(adap->fn))
3042
3043         params[0] = FW_PARAM_DEV(PORTVEC);
3044         params[1] = FW_PARAM_PFVF(L2T_START);
3045         params[2] = FW_PARAM_PFVF(L2T_END);
3046         params[3] = FW_PARAM_PFVF(FILTER_START);
3047         params[4] = FW_PARAM_PFVF(FILTER_END);
3048         params[5] = FW_PARAM_PFVF(IQFLINT_START);
3049         params[6] = FW_PARAM_PFVF(EQ_START);
3050         ret = t4_query_params(adap, adap->fn, adap->fn, 0, 7, params, val);
3051         if (ret < 0)
3052                 goto bye;
3053         port_vec = val[0];
3054         adap->tids.ftid_base = val[3];
3055         adap->tids.nftids = val[4] - val[3] + 1;
3056         adap->sge.ingr_start = val[5];
3057         adap->sge.egr_start = val[6];
3058
3059         if (c.ofldcaps) {
3060                 /* query offload-related parameters */
3061                 params[0] = FW_PARAM_DEV(NTID);
3062                 params[1] = FW_PARAM_PFVF(SERVER_START);
3063                 params[2] = FW_PARAM_PFVF(SERVER_END);
3064                 params[3] = FW_PARAM_PFVF(TDDP_START);
3065                 params[4] = FW_PARAM_PFVF(TDDP_END);
3066                 params[5] = FW_PARAM_DEV(FLOWC_BUFFIFO_SZ);
3067                 ret = t4_query_params(adap, adap->fn, adap->fn, 0, 6, params,
3068                                       val);
3069                 if (ret < 0)
3070                         goto bye;
3071                 adap->tids.ntids = val[0];
3072                 adap->tids.natids = min(adap->tids.ntids / 2, MAX_ATIDS);
3073                 adap->tids.stid_base = val[1];
3074                 adap->tids.nstids = val[2] - val[1] + 1;
3075                 adap->vres.ddp.start = val[3];
3076                 adap->vres.ddp.size = val[4] - val[3] + 1;
3077                 adap->params.ofldq_wr_cred = val[5];
3078                 adap->params.offload = 1;
3079         }
3080         if (c.rdmacaps) {
3081                 params[0] = FW_PARAM_PFVF(STAG_START);
3082                 params[1] = FW_PARAM_PFVF(STAG_END);
3083                 params[2] = FW_PARAM_PFVF(RQ_START);
3084                 params[3] = FW_PARAM_PFVF(RQ_END);
3085                 params[4] = FW_PARAM_PFVF(PBL_START);
3086                 params[5] = FW_PARAM_PFVF(PBL_END);
3087                 ret = t4_query_params(adap, adap->fn, adap->fn, 0, 6, params,
3088                                       val);
3089                 if (ret < 0)
3090                         goto bye;
3091                 adap->vres.stag.start = val[0];
3092                 adap->vres.stag.size = val[1] - val[0] + 1;
3093                 adap->vres.rq.start = val[2];
3094                 adap->vres.rq.size = val[3] - val[2] + 1;
3095                 adap->vres.pbl.start = val[4];
3096                 adap->vres.pbl.size = val[5] - val[4] + 1;
3097
3098                 params[0] = FW_PARAM_PFVF(SQRQ_START);
3099                 params[1] = FW_PARAM_PFVF(SQRQ_END);
3100                 params[2] = FW_PARAM_PFVF(CQ_START);
3101                 params[3] = FW_PARAM_PFVF(CQ_END);
3102                 params[4] = FW_PARAM_PFVF(OCQ_START);
3103                 params[5] = FW_PARAM_PFVF(OCQ_END);
3104                 ret = t4_query_params(adap, adap->fn, adap->fn, 0, 6, params,
3105                                       val);
3106                 if (ret < 0)
3107                         goto bye;
3108                 adap->vres.qp.start = val[0];
3109                 adap->vres.qp.size = val[1] - val[0] + 1;
3110                 adap->vres.cq.start = val[2];
3111                 adap->vres.cq.size = val[3] - val[2] + 1;
3112                 adap->vres.ocq.start = val[4];
3113                 adap->vres.ocq.size = val[5] - val[4] + 1;
3114         }
3115         if (c.iscsicaps) {
3116                 params[0] = FW_PARAM_PFVF(ISCSI_START);
3117                 params[1] = FW_PARAM_PFVF(ISCSI_END);
3118                 ret = t4_query_params(adap, adap->fn, adap->fn, 0, 2, params,
3119                                       val);
3120                 if (ret < 0)
3121                         goto bye;
3122                 adap->vres.iscsi.start = val[0];
3123                 adap->vres.iscsi.size = val[1] - val[0] + 1;
3124         }
3125 #undef FW_PARAM_PFVF
3126 #undef FW_PARAM_DEV
3127
3128         adap->params.nports = hweight32(port_vec);
3129         adap->params.portvec = port_vec;
3130         adap->flags |= FW_OK;
3131
3132         /* These are finalized by FW initialization, load their values now */
3133         v = t4_read_reg(adap, TP_TIMER_RESOLUTION);
3134         adap->params.tp.tre = TIMERRESOLUTION_GET(v);
3135         t4_read_mtu_tbl(adap, adap->params.mtus, NULL);
3136         t4_load_mtus(adap, adap->params.mtus, adap->params.a_wnd,
3137                      adap->params.b_wnd);
3138
3139 #ifdef CONFIG_PCI_IOV
3140         /*
3141          * Provision resource limits for Virtual Functions.  We currently
3142          * grant them all the same static resource limits except for the Port
3143          * Access Rights Mask which we're assigning based on the PF.  All of
3144          * the static provisioning stuff for both the PF and VF really needs
3145          * to be managed in a persistent manner for each device which the
3146          * firmware controls.
3147          */
3148         {
3149                 int pf, vf;
3150
3151                 for (pf = 0; pf < ARRAY_SIZE(num_vf); pf++) {
3152                         if (num_vf[pf] <= 0)
3153                                 continue;
3154
3155                         /* VF numbering starts at 1! */
3156                         for (vf = 1; vf <= num_vf[pf]; vf++) {
3157                                 ret = t4_cfg_pfvf(adap, adap->fn, pf, vf,
3158                                                   VFRES_NEQ, VFRES_NETHCTRL,
3159                                                   VFRES_NIQFLINT, VFRES_NIQ,
3160                                                   VFRES_TC, VFRES_NVI,
3161                                                   FW_PFVF_CMD_CMASK_MASK,
3162                                                   pfvfres_pmask(adap, pf, vf),
3163                                                   VFRES_NEXACTF,
3164                                                   VFRES_R_CAPS, VFRES_WX_CAPS);
3165                                 if (ret < 0)
3166                                         dev_warn(adap->pdev_dev, "failed to "
3167                                                  "provision pf/vf=%d/%d; "
3168                                                  "err=%d\n", pf, vf, ret);
3169                         }
3170                 }
3171         }
3172 #endif
3173
3174         setup_memwin(adap);
3175         return 0;
3176
3177         /*
3178          * If a command timed out or failed with EIO FW does not operate within
3179          * its spec or something catastrophic happened to HW/FW, stop issuing
3180          * commands.
3181          */
3182 bye:    if (ret != -ETIMEDOUT && ret != -EIO)
3183                 t4_fw_bye(adap, adap->fn);
3184         return ret;
3185 }
3186
3187 /* EEH callbacks */
3188
3189 static pci_ers_result_t eeh_err_detected(struct pci_dev *pdev,
3190                                          pci_channel_state_t state)
3191 {
3192         int i;
3193         struct adapter *adap = pci_get_drvdata(pdev);
3194
3195         if (!adap)
3196                 goto out;
3197
3198         rtnl_lock();
3199         adap->flags &= ~FW_OK;
3200         notify_ulds(adap, CXGB4_STATE_START_RECOVERY);
3201         for_each_port(adap, i) {
3202                 struct net_device *dev = adap->port[i];
3203
3204                 netif_device_detach(dev);
3205                 netif_carrier_off(dev);
3206         }
3207         if (adap->flags & FULL_INIT_DONE)
3208                 cxgb_down(adap);
3209         rtnl_unlock();
3210         pci_disable_device(pdev);
3211 out:    return state == pci_channel_io_perm_failure ?
3212                 PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_NEED_RESET;
3213 }
3214
3215 static pci_ers_result_t eeh_slot_reset(struct pci_dev *pdev)
3216 {
3217         int i, ret;
3218         struct fw_caps_config_cmd c;
3219         struct adapter *adap = pci_get_drvdata(pdev);
3220
3221         if (!adap) {
3222                 pci_restore_state(pdev);
3223                 pci_save_state(pdev);
3224                 return PCI_ERS_RESULT_RECOVERED;
3225         }
3226
3227         if (pci_enable_device(pdev)) {
3228                 dev_err(&pdev->dev, "cannot reenable PCI device after reset\n");
3229                 return PCI_ERS_RESULT_DISCONNECT;
3230         }
3231
3232         pci_set_master(pdev);
3233         pci_restore_state(pdev);
3234         pci_save_state(pdev);
3235         pci_cleanup_aer_uncorrect_error_status(pdev);
3236
3237         if (t4_wait_dev_ready(adap) < 0)
3238                 return PCI_ERS_RESULT_DISCONNECT;
3239         if (t4_fw_hello(adap, adap->fn, adap->fn, MASTER_MUST, NULL))
3240                 return PCI_ERS_RESULT_DISCONNECT;
3241         adap->flags |= FW_OK;
3242         if (adap_init1(adap, &c))
3243                 return PCI_ERS_RESULT_DISCONNECT;
3244
3245         for_each_port(adap, i) {
3246                 struct port_info *p = adap2pinfo(adap, i);
3247
3248                 ret = t4_alloc_vi(adap, adap->fn, p->tx_chan, adap->fn, 0, 1,
3249                                   NULL, NULL);
3250                 if (ret < 0)
3251                         return PCI_ERS_RESULT_DISCONNECT;
3252                 p->viid = ret;
3253                 p->xact_addr_filt = -1;
3254         }
3255
3256         t4_load_mtus(adap, adap->params.mtus, adap->params.a_wnd,
3257                      adap->params.b_wnd);
3258         setup_memwin(adap);
3259         if (cxgb_up(adap))
3260                 return PCI_ERS_RESULT_DISCONNECT;
3261         return PCI_ERS_RESULT_RECOVERED;
3262 }
3263
3264 static void eeh_resume(struct pci_dev *pdev)
3265 {
3266         int i;
3267         struct adapter *adap = pci_get_drvdata(pdev);
3268
3269         if (!adap)
3270                 return;
3271
3272         rtnl_lock();
3273         for_each_port(adap, i) {
3274                 struct net_device *dev = adap->port[i];
3275
3276                 if (netif_running(dev)) {
3277                         link_start(dev);
3278                         cxgb_set_rxmode(dev);
3279                 }
3280                 netif_device_attach(dev);
3281         }
3282         rtnl_unlock();
3283 }
3284
3285 static struct pci_error_handlers cxgb4_eeh = {
3286         .error_detected = eeh_err_detected,
3287         .slot_reset     = eeh_slot_reset,
3288         .resume         = eeh_resume,
3289 };
3290
3291 static inline bool is_10g_port(const struct link_config *lc)
3292 {
3293         return (lc->supported & FW_PORT_CAP_SPEED_10G) != 0;
3294 }
3295
3296 static inline void init_rspq(struct sge_rspq *q, u8 timer_idx, u8 pkt_cnt_idx,
3297                              unsigned int size, unsigned int iqe_size)
3298 {
3299         q->intr_params = QINTR_TIMER_IDX(timer_idx) |
3300                          (pkt_cnt_idx < SGE_NCOUNTERS ? QINTR_CNT_EN : 0);
3301         q->pktcnt_idx = pkt_cnt_idx < SGE_NCOUNTERS ? pkt_cnt_idx : 0;
3302         q->iqe_len = iqe_size;
3303         q->size = size;
3304 }
3305
3306 /*
3307  * Perform default configuration of DMA queues depending on the number and type
3308  * of ports we found and the number of available CPUs.  Most settings can be
3309  * modified by the admin prior to actual use.
3310  */
3311 static void __devinit cfg_queues(struct adapter *adap)
3312 {
3313         struct sge *s = &adap->sge;
3314         int i, q10g = 0, n10g = 0, qidx = 0;
3315
3316         for_each_port(adap, i)
3317                 n10g += is_10g_port(&adap2pinfo(adap, i)->link_cfg);
3318
3319         /*
3320          * We default to 1 queue per non-10G port and up to # of cores queues
3321          * per 10G port.
3322          */
3323         if (n10g)
3324                 q10g = (MAX_ETH_QSETS - (adap->params.nports - n10g)) / n10g;
3325         if (q10g > num_online_cpus())
3326                 q10g = num_online_cpus();
3327
3328         for_each_port(adap, i) {
3329                 struct port_info *pi = adap2pinfo(adap, i);
3330
3331                 pi->first_qset = qidx;
3332                 pi->nqsets = is_10g_port(&pi->link_cfg) ? q10g : 1;
3333                 qidx += pi->nqsets;
3334         }
3335
3336         s->ethqsets = qidx;
3337         s->max_ethqsets = qidx;   /* MSI-X may lower it later */
3338
3339         if (is_offload(adap)) {
3340                 /*
3341                  * For offload we use 1 queue/channel if all ports are up to 1G,
3342                  * otherwise we divide all available queues amongst the channels
3343                  * capped by the number of available cores.
3344                  */
3345                 if (n10g) {
3346                         i = min_t(int, ARRAY_SIZE(s->ofldrxq),
3347                                   num_online_cpus());
3348                         s->ofldqsets = roundup(i, adap->params.nports);
3349                 } else
3350                         s->ofldqsets = adap->params.nports;
3351                 /* For RDMA one Rx queue per channel suffices */
3352                 s->rdmaqs = adap->params.nports;
3353         }
3354
3355         for (i = 0; i < ARRAY_SIZE(s->ethrxq); i++) {
3356                 struct sge_eth_rxq *r = &s->ethrxq[i];
3357
3358                 init_rspq(&r->rspq, 0, 0, 1024, 64);
3359                 r->fl.size = 72;
3360         }
3361
3362         for (i = 0; i < ARRAY_SIZE(s->ethtxq); i++)
3363                 s->ethtxq[i].q.size = 1024;
3364
3365         for (i = 0; i < ARRAY_SIZE(s->ctrlq); i++)
3366                 s->ctrlq[i].q.size = 512;
3367
3368         for (i = 0; i < ARRAY_SIZE(s->ofldtxq); i++)
3369                 s->ofldtxq[i].q.size = 1024;
3370
3371         for (i = 0; i < ARRAY_SIZE(s->ofldrxq); i++) {
3372                 struct sge_ofld_rxq *r = &s->ofldrxq[i];
3373
3374                 init_rspq(&r->rspq, 0, 0, 1024, 64);
3375                 r->rspq.uld = CXGB4_ULD_ISCSI;
3376                 r->fl.size = 72;
3377         }
3378
3379         for (i = 0; i < ARRAY_SIZE(s->rdmarxq); i++) {
3380                 struct sge_ofld_rxq *r = &s->rdmarxq[i];
3381
3382                 init_rspq(&r->rspq, 0, 0, 511, 64);
3383                 r->rspq.uld = CXGB4_ULD_RDMA;
3384                 r->fl.size = 72;
3385         }
3386
3387         init_rspq(&s->fw_evtq, 6, 0, 512, 64);
3388         init_rspq(&s->intrq, 6, 0, 2 * MAX_INGQ, 64);
3389 }
3390
3391 /*
3392  * Reduce the number of Ethernet queues across all ports to at most n.
3393  * n provides at least one queue per port.
3394  */
3395 static void __devinit reduce_ethqs(struct adapter *adap, int n)
3396 {
3397         int i;
3398         struct port_info *pi;
3399
3400         while (n < adap->sge.ethqsets)
3401                 for_each_port(adap, i) {
3402                         pi = adap2pinfo(adap, i);
3403                         if (pi->nqsets > 1) {
3404                                 pi->nqsets--;
3405                                 adap->sge.ethqsets--;
3406                                 if (adap->sge.ethqsets <= n)
3407                                         break;
3408                         }
3409                 }
3410
3411         n = 0;
3412         for_each_port(adap, i) {
3413                 pi = adap2pinfo(adap, i);
3414                 pi->first_qset = n;
3415                 n += pi->nqsets;
3416         }
3417 }
3418
3419 /* 2 MSI-X vectors needed for the FW queue and non-data interrupts */
3420 #define EXTRA_VECS 2
3421
3422 static int __devinit enable_msix(struct adapter *adap)
3423 {
3424         int ofld_need = 0;
3425         int i, err, want, need;
3426         struct sge *s = &adap->sge;
3427         unsigned int nchan = adap->params.nports;
3428         struct msix_entry entries[MAX_INGQ + 1];
3429
3430         for (i = 0; i < ARRAY_SIZE(entries); ++i)
3431                 entries[i].entry = i;
3432
3433         want = s->max_ethqsets + EXTRA_VECS;
3434         if (is_offload(adap)) {
3435                 want += s->rdmaqs + s->ofldqsets;
3436                 /* need nchan for each possible ULD */
3437                 ofld_need = 2 * nchan;
3438         }
3439         need = adap->params.nports + EXTRA_VECS + ofld_need;
3440
3441         while ((err = pci_enable_msix(adap->pdev, entries, want)) >= need)
3442                 want = err;
3443
3444         if (!err) {
3445                 /*
3446                  * Distribute available vectors to the various queue groups.
3447                  * Every group gets its minimum requirement and NIC gets top
3448                  * priority for leftovers.
3449                  */
3450                 i = want - EXTRA_VECS - ofld_need;
3451                 if (i < s->max_ethqsets) {
3452                         s->max_ethqsets = i;
3453                         if (i < s->ethqsets)
3454                                 reduce_ethqs(adap, i);
3455                 }
3456                 if (is_offload(adap)) {
3457                         i = want - EXTRA_VECS - s->max_ethqsets;
3458                         i -= ofld_need - nchan;
3459                         s->ofldqsets = (i / nchan) * nchan;  /* round down */
3460                 }
3461                 for (i = 0; i < want; ++i)
3462                         adap->msix_info[i].vec = entries[i].vector;
3463         } else if (err > 0)
3464                 dev_info(adap->pdev_dev,
3465                          "only %d MSI-X vectors left, not using MSI-X\n", err);
3466         return err;
3467 }
3468
3469 #undef EXTRA_VECS
3470
3471 static int __devinit init_rss(struct adapter *adap)
3472 {
3473         unsigned int i, j;
3474
3475         for_each_port(adap, i) {
3476                 struct port_info *pi = adap2pinfo(adap, i);
3477
3478                 pi->rss = kcalloc(pi->rss_size, sizeof(u16), GFP_KERNEL);
3479                 if (!pi->rss)
3480                         return -ENOMEM;
3481                 for (j = 0; j < pi->rss_size; j++)
3482                         pi->rss[j] = j % pi->nqsets;
3483         }
3484         return 0;
3485 }
3486
3487 static void __devinit print_port_info(struct adapter *adap)
3488 {
3489         static const char *base[] = {
3490                 "R XFI", "R XAUI", "T SGMII", "T XFI", "T XAUI", "KX4", "CX4",
3491                 "KX", "KR", "KR SFP+", "KR FEC"
3492         };
3493
3494         int i;
3495         char buf[80];
3496         const char *spd = "";
3497
3498         if (adap->params.pci.speed == PCI_EXP_LNKSTA_CLS_2_5GB)
3499                 spd = " 2.5 GT/s";
3500         else if (adap->params.pci.speed == PCI_EXP_LNKSTA_CLS_5_0GB)
3501                 spd = " 5 GT/s";
3502
3503         for_each_port(adap, i) {
3504                 struct net_device *dev = adap->port[i];
3505                 const struct port_info *pi = netdev_priv(dev);
3506                 char *bufp = buf;
3507
3508                 if (!test_bit(i, &adap->registered_device_map))
3509                         continue;
3510
3511                 if (pi->link_cfg.supported & FW_PORT_CAP_SPEED_100M)
3512                         bufp += sprintf(bufp, "100/");
3513                 if (pi->link_cfg.supported & FW_PORT_CAP_SPEED_1G)
3514                         bufp += sprintf(bufp, "1000/");
3515                 if (pi->link_cfg.supported & FW_PORT_CAP_SPEED_10G)
3516                         bufp += sprintf(bufp, "10G/");
3517                 if (bufp != buf)
3518                         --bufp;
3519                 sprintf(bufp, "BASE-%s", base[pi->port_type]);
3520
3521                 netdev_info(dev, "Chelsio %s rev %d %s %sNIC PCIe x%d%s%s\n",
3522                             adap->params.vpd.id, adap->params.rev,
3523                             buf, is_offload(adap) ? "R" : "",
3524                             adap->params.pci.width, spd,
3525                             (adap->flags & USING_MSIX) ? " MSI-X" :
3526                             (adap->flags & USING_MSI) ? " MSI" : "");
3527                 if (adap->name == dev->name)
3528                         netdev_info(dev, "S/N: %s, E/C: %s\n",
3529                                     adap->params.vpd.sn, adap->params.vpd.ec);
3530         }
3531 }
3532
3533 /*
3534  * Free the following resources:
3535  * - memory used for tables
3536  * - MSI/MSI-X
3537  * - net devices
3538  * - resources FW is holding for us
3539  */
3540 static void free_some_resources(struct adapter *adapter)
3541 {
3542         unsigned int i;
3543
3544         t4_free_mem(adapter->l2t);
3545         t4_free_mem(adapter->tids.tid_tab);
3546         disable_msi(adapter);
3547
3548         for_each_port(adapter, i)
3549                 if (adapter->port[i]) {
3550                         kfree(adap2pinfo(adapter, i)->rss);
3551                         free_netdev(adapter->port[i]);
3552                 }
3553         if (adapter->flags & FW_OK)
3554                 t4_fw_bye(adapter, adapter->fn);
3555 }
3556
3557 #define VLAN_FEAT (NETIF_F_SG | NETIF_F_IP_CSUM | TSO_FLAGS | \
3558                    NETIF_F_IPV6_CSUM | NETIF_F_HIGHDMA)
3559
3560 static int __devinit init_one(struct pci_dev *pdev,
3561                               const struct pci_device_id *ent)
3562 {
3563         int func, i, err;
3564         struct port_info *pi;
3565         unsigned int highdma = 0;
3566         struct adapter *adapter = NULL;
3567
3568         printk_once(KERN_INFO "%s - version %s\n", DRV_DESC, DRV_VERSION);
3569
3570         err = pci_request_regions(pdev, KBUILD_MODNAME);
3571         if (err) {
3572                 /* Just info, some other driver may have claimed the device. */
3573                 dev_info(&pdev->dev, "cannot obtain PCI resources\n");
3574                 return err;
3575         }
3576
3577         /* We control everything through one PF */
3578         func = PCI_FUNC(pdev->devfn);
3579         if (func != ent->driver_data) {
3580                 pci_save_state(pdev);        /* to restore SR-IOV later */
3581                 goto sriov;
3582         }
3583
3584         err = pci_enable_device(pdev);
3585         if (err) {
3586                 dev_err(&pdev->dev, "cannot enable PCI device\n");
3587                 goto out_release_regions;
3588         }
3589
3590         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
3591                 highdma = NETIF_F_HIGHDMA;
3592                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
3593                 if (err) {
3594                         dev_err(&pdev->dev, "unable to obtain 64-bit DMA for "
3595                                 "coherent allocations\n");
3596                         goto out_disable_device;
3597                 }
3598         } else {
3599                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3600                 if (err) {
3601                         dev_err(&pdev->dev, "no usable DMA configuration\n");
3602                         goto out_disable_device;
3603                 }
3604         }
3605
3606         pci_enable_pcie_error_reporting(pdev);
3607         pci_set_master(pdev);
3608         pci_save_state(pdev);
3609
3610         adapter = kzalloc(sizeof(*adapter), GFP_KERNEL);
3611         if (!adapter) {
3612                 err = -ENOMEM;
3613                 goto out_disable_device;
3614         }
3615
3616         adapter->regs = pci_ioremap_bar(pdev, 0);
3617         if (!adapter->regs) {
3618                 dev_err(&pdev->dev, "cannot map device registers\n");
3619                 err = -ENOMEM;
3620                 goto out_free_adapter;
3621         }
3622
3623         adapter->pdev = pdev;
3624         adapter->pdev_dev = &pdev->dev;
3625         adapter->fn = func;
3626         adapter->name = pci_name(pdev);
3627         adapter->msg_enable = dflt_msg_enable;
3628         memset(adapter->chan_map, 0xff, sizeof(adapter->chan_map));
3629
3630         spin_lock_init(&adapter->stats_lock);
3631         spin_lock_init(&adapter->tid_release_lock);
3632
3633         INIT_WORK(&adapter->tid_release_task, process_tid_release_list);
3634
3635         err = t4_prep_adapter(adapter);
3636         if (err)
3637                 goto out_unmap_bar;
3638         err = adap_init0(adapter);
3639         if (err)
3640                 goto out_unmap_bar;
3641
3642         for_each_port(adapter, i) {
3643                 struct net_device *netdev;
3644
3645                 netdev = alloc_etherdev_mq(sizeof(struct port_info),
3646                                            MAX_ETH_QSETS);
3647                 if (!netdev) {
3648                         err = -ENOMEM;
3649                         goto out_free_dev;
3650                 }
3651
3652                 SET_NETDEV_DEV(netdev, &pdev->dev);
3653
3654                 adapter->port[i] = netdev;
3655                 pi = netdev_priv(netdev);
3656                 pi->adapter = adapter;
3657                 pi->xact_addr_filt = -1;
3658                 pi->rx_offload = RX_CSO;
3659                 pi->port_id = i;
3660                 netif_carrier_off(netdev);
3661                 netif_tx_stop_all_queues(netdev);
3662                 netdev->irq = pdev->irq;
3663
3664                 netdev->features |= NETIF_F_SG | TSO_FLAGS;
3665                 netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
3666                 netdev->features |= NETIF_F_GRO | NETIF_F_RXHASH | highdma;
3667                 netdev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
3668                 netdev->vlan_features = netdev->features & VLAN_FEAT;
3669
3670                 netdev->netdev_ops = &cxgb4_netdev_ops;
3671                 SET_ETHTOOL_OPS(netdev, &cxgb_ethtool_ops);
3672         }
3673
3674         pci_set_drvdata(pdev, adapter);
3675
3676         if (adapter->flags & FW_OK) {
3677                 err = t4_port_init(adapter, func, func, 0);
3678                 if (err)
3679                         goto out_free_dev;
3680         }
3681
3682         /*
3683          * Configure queues and allocate tables now, they can be needed as
3684          * soon as the first register_netdev completes.
3685          */
3686         cfg_queues(adapter);
3687
3688         adapter->l2t = t4_init_l2t();
3689         if (!adapter->l2t) {
3690                 /* We tolerate a lack of L2T, giving up some functionality */
3691                 dev_warn(&pdev->dev, "could not allocate L2T, continuing\n");
3692                 adapter->params.offload = 0;
3693         }
3694
3695         if (is_offload(adapter) && tid_init(&adapter->tids) < 0) {
3696                 dev_warn(&pdev->dev, "could not allocate TID table, "
3697                          "continuing\n");
3698                 adapter->params.offload = 0;
3699         }
3700
3701         /* See what interrupts we'll be using */
3702         if (msi > 1 && enable_msix(adapter) == 0)
3703                 adapter->flags |= USING_MSIX;
3704         else if (msi > 0 && pci_enable_msi(pdev) == 0)
3705                 adapter->flags |= USING_MSI;
3706
3707         err = init_rss(adapter);
3708         if (err)
3709                 goto out_free_dev;
3710
3711         /*
3712          * The card is now ready to go.  If any errors occur during device
3713          * registration we do not fail the whole card but rather proceed only
3714          * with the ports we manage to register successfully.  However we must
3715          * register at least one net device.
3716          */
3717         for_each_port(adapter, i) {
3718                 err = register_netdev(adapter->port[i]);
3719                 if (err)
3720                         dev_warn(&pdev->dev,
3721                                  "cannot register net device %s, skipping\n",
3722                                  adapter->port[i]->name);
3723                 else {
3724                         /*
3725                          * Change the name we use for messages to the name of
3726                          * the first successfully registered interface.
3727                          */
3728                         if (!adapter->registered_device_map)
3729                                 adapter->name = adapter->port[i]->name;
3730
3731                         __set_bit(i, &adapter->registered_device_map);
3732                         adapter->chan_map[adap2pinfo(adapter, i)->tx_chan] = i;
3733                 }
3734         }
3735         if (!adapter->registered_device_map) {
3736                 dev_err(&pdev->dev, "could not register any net devices\n");
3737                 goto out_free_dev;
3738         }
3739
3740         if (cxgb4_debugfs_root) {
3741                 adapter->debugfs_root = debugfs_create_dir(pci_name(pdev),
3742                                                            cxgb4_debugfs_root);
3743                 setup_debugfs(adapter);
3744         }
3745
3746         if (is_offload(adapter))
3747                 attach_ulds(adapter);
3748
3749         print_port_info(adapter);
3750
3751 sriov:
3752 #ifdef CONFIG_PCI_IOV
3753         if (func < ARRAY_SIZE(num_vf) && num_vf[func] > 0)
3754                 if (pci_enable_sriov(pdev, num_vf[func]) == 0)
3755                         dev_info(&pdev->dev,
3756                                  "instantiated %u virtual functions\n",
3757                                  num_vf[func]);
3758 #endif
3759         return 0;
3760
3761  out_free_dev:
3762         free_some_resources(adapter);
3763  out_unmap_bar:
3764         iounmap(adapter->regs);
3765  out_free_adapter:
3766         kfree(adapter);
3767  out_disable_device:
3768         pci_disable_pcie_error_reporting(pdev);
3769         pci_disable_device(pdev);
3770  out_release_regions:
3771         pci_release_regions(pdev);
3772         pci_set_drvdata(pdev, NULL);
3773         return err;
3774 }
3775
3776 static void __devexit remove_one(struct pci_dev *pdev)
3777 {
3778         struct adapter *adapter = pci_get_drvdata(pdev);
3779
3780         pci_disable_sriov(pdev);
3781
3782         if (adapter) {
3783                 int i;
3784
3785                 if (is_offload(adapter))
3786                         detach_ulds(adapter);
3787
3788                 for_each_port(adapter, i)
3789                         if (test_bit(i, &adapter->registered_device_map))
3790                                 unregister_netdev(adapter->port[i]);
3791
3792                 if (adapter->debugfs_root)
3793                         debugfs_remove_recursive(adapter->debugfs_root);
3794
3795                 if (adapter->flags & FULL_INIT_DONE)
3796                         cxgb_down(adapter);
3797
3798                 free_some_resources(adapter);
3799                 iounmap(adapter->regs);
3800                 kfree(adapter);
3801                 pci_disable_pcie_error_reporting(pdev);
3802                 pci_disable_device(pdev);
3803                 pci_release_regions(pdev);
3804                 pci_set_drvdata(pdev, NULL);
3805         } else
3806                 pci_release_regions(pdev);
3807 }
3808
3809 static struct pci_driver cxgb4_driver = {
3810         .name     = KBUILD_MODNAME,
3811         .id_table = cxgb4_pci_tbl,
3812         .probe    = init_one,
3813         .remove   = __devexit_p(remove_one),
3814         .err_handler = &cxgb4_eeh,
3815 };
3816
3817 static int __init cxgb4_init_module(void)
3818 {
3819         int ret;
3820
3821         /* Debugfs support is optional, just warn if this fails */
3822         cxgb4_debugfs_root = debugfs_create_dir(KBUILD_MODNAME, NULL);
3823         if (!cxgb4_debugfs_root)
3824                 pr_warning("could not create debugfs entry, continuing\n");
3825
3826         ret = pci_register_driver(&cxgb4_driver);
3827         if (ret < 0)
3828                 debugfs_remove(cxgb4_debugfs_root);
3829         return ret;
3830 }
3831
3832 static void __exit cxgb4_cleanup_module(void)
3833 {
3834         pci_unregister_driver(&cxgb4_driver);
3835         debugfs_remove(cxgb4_debugfs_root);  /* NULL ok */
3836 }
3837
3838 module_init(cxgb4_init_module);
3839 module_exit(cxgb4_cleanup_module);