drivers/net/cnic.c

   1 /* cnic.c: Broadcom CNIC core network driver.
   2  *
   3  * Copyright (c) 2006-2010 Broadcom Corporation
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation.
   8  *
   9  * Original skeleton written by: John(Zongxi) Chen (zongxi@broadcom.com)
  10  * Modified and maintained by: Michael Chan <mchan@broadcom.com>
  11  */
  12
  13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  14
  15 #include <linux/module.h>
  16
  17 #include <linux/kernel.h>
  18 #include <linux/errno.h>
  19 #include <linux/list.h>
  20 #include <linux/slab.h>
  21 #include <linux/pci.h>
  22 #include <linux/init.h>
  23 #include <linux/netdevice.h>
  24 #include <linux/uio_driver.h>
  25 #include <linux/in.h>
  26 #include <linux/dma-mapping.h>
  27 #include <linux/delay.h>
  28 #include <linux/ethtool.h>
  29 #include <linux/if_vlan.h>
  30 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
  31 #define BCM_VLAN 1
  32 #endif
  33 #include <net/ip.h>
  34 #include <net/tcp.h>
  35 #include <net/route.h>
  36 #include <net/ipv6.h>
  37 #include <net/ip6_route.h>
  38 #include <net/ip6_checksum.h>
  39 #include <scsi/iscsi_if.h>
  40
  41 #include "cnic_if.h"
  42 #include "bnx2.h"
  43 #include "bnx2x/bnx2x_reg.h"
  44 #include "bnx2x/bnx2x_fw_defs.h"
  45 #include "bnx2x/bnx2x_hsi.h"
  46 #include "../scsi/bnx2i/57xx_iscsi_constants.h"
  47 #include "../scsi/bnx2i/57xx_iscsi_hsi.h"
  48 #include "cnic.h"
  49 #include "cnic_defs.h"
  50
  51 #define DRV_MODULE_NAME         "cnic"
  52
  53 static char version[] __devinitdata =
  54         "Broadcom NetXtreme II CNIC Driver " DRV_MODULE_NAME " v" CNIC_MODULE_VERSION " (" CNIC_MODULE_RELDATE ")\n";
  55
  56 MODULE_AUTHOR("Michael Chan <mchan@broadcom.com> and John(Zongxi) "
  57               "Chen (zongxi@broadcom.com");
  58 MODULE_DESCRIPTION("Broadcom NetXtreme II CNIC Driver");
  59 MODULE_LICENSE("GPL");
  60 MODULE_VERSION(CNIC_MODULE_VERSION);
  61
  62 /* cnic_dev_list modifications are protected by both rtnl and cnic_dev_lock */
  63 static LIST_HEAD(cnic_dev_list);
  64 static LIST_HEAD(cnic_udev_list);
  65 static DEFINE_RWLOCK(cnic_dev_lock);
  66 static DEFINE_MUTEX(cnic_lock);
  67
  68 static struct cnic_ulp_ops *cnic_ulp_tbl[MAX_CNIC_ULP_TYPE];
  69
  70 static int cnic_service_bnx2(void *, void *);
  71 static int cnic_service_bnx2x(void *, void *);
  72 static int cnic_ctl(void *, struct cnic_ctl_info *);
  73
  74 static struct cnic_ops cnic_bnx2_ops = {
  75         .cnic_owner     = THIS_MODULE,
  76         .cnic_handler   = cnic_service_bnx2,
  77         .cnic_ctl       = cnic_ctl,
  78 };
  79
  80 static struct cnic_ops cnic_bnx2x_ops = {
  81         .cnic_owner     = THIS_MODULE,
  82         .cnic_handler   = cnic_service_bnx2x,
  83         .cnic_ctl       = cnic_ctl,
  84 };
  85
  86 static struct workqueue_struct *cnic_wq;
  87
  88 static void cnic_shutdown_rings(struct cnic_dev *);
  89 static void cnic_init_rings(struct cnic_dev *);
  90 static int cnic_cm_set_pg(struct cnic_sock *);
  91
  92 static int cnic_uio_open(struct uio_info *uinfo, struct inode *inode)
  93 {
  94         struct cnic_uio_dev *udev = uinfo->priv;
  95         struct cnic_dev *dev;
  96
  97         if (!capable(CAP_NET_ADMIN))
  98                 return -EPERM;
  99
 100         if (udev->uio_dev != -1)
 101                 return -EBUSY;
 102
 103         rtnl_lock();
 104         dev = udev->dev;
 105
 106         if (!dev || !test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
 107                 rtnl_unlock();
 108                 return -ENODEV;
 109         }
 110
 111         udev->uio_dev = iminor(inode);
 112
 113         cnic_shutdown_rings(dev);
 114         cnic_init_rings(dev);
 115         rtnl_unlock();
 116
 117         return 0;
 118 }
 119
 120 static int cnic_uio_close(struct uio_info *uinfo, struct inode *inode)
 121 {
 122         struct cnic_uio_dev *udev = uinfo->priv;
 123
 124         udev->uio_dev = -1;
 125         return 0;
 126 }
 127
 128 static inline void cnic_hold(struct cnic_dev *dev)
 129 {
 130         atomic_inc(&dev->ref_count);
 131 }
 132
 133 static inline void cnic_put(struct cnic_dev *dev)
 134 {
 135         atomic_dec(&dev->ref_count);
 136 }
 137
 138 static inline void csk_hold(struct cnic_sock *csk)
 139 {
 140         atomic_inc(&csk->ref_count);
 141 }
 142
 143 static inline void csk_put(struct cnic_sock *csk)
 144 {
 145         atomic_dec(&csk->ref_count);
 146 }
 147
 148 static struct cnic_dev *cnic_from_netdev(struct net_device *netdev)
 149 {
 150         struct cnic_dev *cdev;
 151
 152         read_lock(&cnic_dev_lock);
 153         list_for_each_entry(cdev, &cnic_dev_list, list) {
 154                 if (netdev == cdev->netdev) {
 155                         cnic_hold(cdev);
 156                         read_unlock(&cnic_dev_lock);
 157                         return cdev;
 158                 }
 159         }
 160         read_unlock(&cnic_dev_lock);
 161         return NULL;
 162 }
 163
 164 static inline void ulp_get(struct cnic_ulp_ops *ulp_ops)
 165 {
 166         atomic_inc(&ulp_ops->ref_count);
 167 }
 168
 169 static inline void ulp_put(struct cnic_ulp_ops *ulp_ops)
 170 {
 171         atomic_dec(&ulp_ops->ref_count);
 172 }
 173
 174 static void cnic_ctx_wr(struct cnic_dev *dev, u32 cid_addr, u32 off, u32 val)
 175 {
 176         struct cnic_local *cp = dev->cnic_priv;
 177         struct cnic_eth_dev *ethdev = cp->ethdev;
 178         struct drv_ctl_info info;
 179         struct drv_ctl_io *io = &info.data.io;
 180
 181         info.cmd = DRV_CTL_CTX_WR_CMD;
 182         io->cid_addr = cid_addr;
 183         io->offset = off;
 184         io->data = val;
 185         ethdev->drv_ctl(dev->netdev, &info);
 186 }
 187
 188 static void cnic_ctx_tbl_wr(struct cnic_dev *dev, u32 off, dma_addr_t addr)
 189 {
 190         struct cnic_local *cp = dev->cnic_priv;
 191         struct cnic_eth_dev *ethdev = cp->ethdev;
 192         struct drv_ctl_info info;
 193         struct drv_ctl_io *io = &info.data.io;
 194
 195         info.cmd = DRV_CTL_CTXTBL_WR_CMD;
 196         io->offset = off;
 197         io->dma_addr = addr;
 198         ethdev->drv_ctl(dev->netdev, &info);
 199 }
 200
 201 static void cnic_ring_ctl(struct cnic_dev *dev, u32 cid, u32 cl_id, int start)
 202 {
 203         struct cnic_local *cp = dev->cnic_priv;
 204         struct cnic_eth_dev *ethdev = cp->ethdev;
 205         struct drv_ctl_info info;
 206         struct drv_ctl_l2_ring *ring = &info.data.ring;
 207
 208         if (start)
 209                 info.cmd = DRV_CTL_START_L2_CMD;
 210         else
 211                 info.cmd = DRV_CTL_STOP_L2_CMD;
 212
 213         ring->cid = cid;
 214         ring->client_id = cl_id;
 215         ethdev->drv_ctl(dev->netdev, &info);
 216 }
 217
 218 static void cnic_reg_wr_ind(struct cnic_dev *dev, u32 off, u32 val)
 219 {
 220         struct cnic_local *cp = dev->cnic_priv;
 221         struct cnic_eth_dev *ethdev = cp->ethdev;
 222         struct drv_ctl_info info;
 223         struct drv_ctl_io *io = &info.data.io;
 224
 225         info.cmd = DRV_CTL_IO_WR_CMD;
 226         io->offset = off;
 227         io->data = val;
 228         ethdev->drv_ctl(dev->netdev, &info);
 229 }
 230
 231 static u32 cnic_reg_rd_ind(struct cnic_dev *dev, u32 off)
 232 {
 233         struct cnic_local *cp = dev->cnic_priv;
 234         struct cnic_eth_dev *ethdev = cp->ethdev;
 235         struct drv_ctl_info info;
 236         struct drv_ctl_io *io = &info.data.io;
 237
 238         info.cmd = DRV_CTL_IO_RD_CMD;
 239         io->offset = off;
 240         ethdev->drv_ctl(dev->netdev, &info);
 241         return io->data;
 242 }
 243
 244 static int cnic_in_use(struct cnic_sock *csk)
 245 {
 246         return test_bit(SK_F_INUSE, &csk->flags);
 247 }
 248
 249 static void cnic_spq_completion(struct cnic_dev *dev, int cmd, u32 count)
 250 {
 251         struct cnic_local *cp = dev->cnic_priv;
 252         struct cnic_eth_dev *ethdev = cp->ethdev;
 253         struct drv_ctl_info info;
 254
 255         info.cmd = cmd;
 256         info.data.credit.credit_count = count;
 257         ethdev->drv_ctl(dev->netdev, &info);
 258 }
 259
 260 static int cnic_get_l5_cid(struct cnic_local *cp, u32 cid, u32 *l5_cid)
 261 {
 262         u32 i;
 263
 264         for (i = 0; i < cp->max_cid_space; i++) {
 265                 if (cp->ctx_tbl[i].cid == cid) {
 266                         *l5_cid = i;
 267                         return 0;
 268                 }
 269         }
 270         return -EINVAL;
 271 }
 272
 273 static int cnic_send_nlmsg(struct cnic_local *cp, u32 type,
 274                            struct cnic_sock *csk)
 275 {
 276         struct iscsi_path path_req;
 277         char *buf = NULL;
 278         u16 len = 0;
 279         u32 msg_type = ISCSI_KEVENT_IF_DOWN;
 280         struct cnic_ulp_ops *ulp_ops;
 281         struct cnic_uio_dev *udev = cp->udev;
 282         int rc = 0, retry = 0;
 283
 284         if (!udev || udev->uio_dev == -1)
 285                 return -ENODEV;
 286
 287         if (csk) {
 288                 len = sizeof(path_req);
 289                 buf = (char *) &path_req;
 290                 memset(&path_req, 0, len);
 291
 292                 msg_type = ISCSI_KEVENT_PATH_REQ;
 293                 path_req.handle = (u64) csk->l5_cid;
 294                 if (test_bit(SK_F_IPV6, &csk->flags)) {
 295                         memcpy(&path_req.dst.v6_addr, &csk->dst_ip[0],
 296                                sizeof(struct in6_addr));
 297                         path_req.ip_addr_len = 16;
 298                 } else {
 299                         memcpy(&path_req.dst.v4_addr, &csk->dst_ip[0],
 300                                sizeof(struct in_addr));
 301                         path_req.ip_addr_len = 4;
 302                 }
 303                 path_req.vlan_id = csk->vlan_id;
 304                 path_req.pmtu = csk->mtu;
 305         }
 306
 307         while (retry < 3) {
 308                 rc = 0;
 309                 rcu_read_lock();
 310                 ulp_ops = rcu_dereference(cnic_ulp_tbl[CNIC_ULP_ISCSI]);
 311                 if (ulp_ops)
 312                         rc = ulp_ops->iscsi_nl_send_msg(
 313                                 cp->ulp_handle[CNIC_ULP_ISCSI],
 314                                 msg_type, buf, len);
 315                 rcu_read_unlock();
 316                 if (rc == 0 || msg_type != ISCSI_KEVENT_PATH_REQ)
 317                         break;
 318
 319                 msleep(100);
 320                 retry++;
 321         }
 322         return 0;
 323 }
 324
 325 static void cnic_cm_upcall(struct cnic_local *, struct cnic_sock *, u8);
 326
 327 static int cnic_iscsi_nl_msg_recv(struct cnic_dev *dev, u32 msg_type,
 328                                   char *buf, u16 len)
 329 {
 330         int rc = -EINVAL;
 331
 332         switch (msg_type) {
 333         case ISCSI_UEVENT_PATH_UPDATE: {
 334                 struct cnic_local *cp;
 335                 u32 l5_cid;
 336                 struct cnic_sock *csk;
 337                 struct iscsi_path *path_resp;
 338
 339                 if (len < sizeof(*path_resp))
 340                         break;
 341
 342                 path_resp = (struct iscsi_path *) buf;
 343                 cp = dev->cnic_priv;
 344                 l5_cid = (u32) path_resp->handle;
 345                 if (l5_cid >= MAX_CM_SK_TBL_SZ)
 346                         break;
 347
 348                 rcu_read_lock();
 349                 if (!rcu_dereference(cp->ulp_ops[CNIC_ULP_L4])) {
 350                         rc = -ENODEV;
 351                         rcu_read_unlock();
 352                         break;
 353                 }
 354                 csk = &cp->csk_tbl[l5_cid];
 355                 csk_hold(csk);
 356                 if (cnic_in_use(csk) &&
 357                     test_bit(SK_F_CONNECT_START, &csk->flags)) {
 358
 359                         memcpy(csk->ha, path_resp->mac_addr, 6);
 360                         if (test_bit(SK_F_IPV6, &csk->flags))
 361                                 memcpy(&csk->src_ip[0], &path_resp->src.v6_addr,
 362                                        sizeof(struct in6_addr));
 363                         else
 364                                 memcpy(&csk->src_ip[0], &path_resp->src.v4_addr,
 365                                        sizeof(struct in_addr));
 366
 367                         if (is_valid_ether_addr(csk->ha)) {
 368                                 cnic_cm_set_pg(csk);
 369                         } else if (!test_bit(SK_F_OFFLD_SCHED, &csk->flags) &&
 370                                 !test_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
 371
 372                                 cnic_cm_upcall(cp, csk,
 373                                         L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
 374                                 clear_bit(SK_F_CONNECT_START, &csk->flags);
 375                         }
 376                 }
 377                 csk_put(csk);
 378                 rcu_read_unlock();
 379                 rc = 0;
 380         }
 381         }
 382
 383         return rc;
 384 }
 385
 386 static int cnic_offld_prep(struct cnic_sock *csk)
 387 {
 388         if (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
 389                 return 0;
 390
 391         if (!test_bit(SK_F_CONNECT_START, &csk->flags)) {
 392                 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
 393                 return 0;
 394         }
 395
 396         return 1;
 397 }
 398
 399 static int cnic_close_prep(struct cnic_sock *csk)
 400 {
 401         clear_bit(SK_F_CONNECT_START, &csk->flags);
 402         smp_mb__after_clear_bit();
 403
 404         if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
 405                 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
 406                         msleep(1);
 407
 408                 return 1;
 409         }
 410         return 0;
 411 }
 412
 413 static int cnic_abort_prep(struct cnic_sock *csk)
 414 {
 415         clear_bit(SK_F_CONNECT_START, &csk->flags);
 416         smp_mb__after_clear_bit();
 417
 418         while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
 419                 msleep(1);
 420
 421         if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
 422                 csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
 423                 return 1;
 424         }
 425
 426         return 0;
 427 }
 428
 429 int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops)
 430 {
 431         struct cnic_dev *dev;
 432
 433         if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
 434                 pr_err("%s: Bad type %d\n", __func__, ulp_type);
 435                 return -EINVAL;
 436         }
 437         mutex_lock(&cnic_lock);
 438         if (cnic_ulp_tbl[ulp_type]) {
 439                 pr_err("%s: Type %d has already been registered\n",
 440                        __func__, ulp_type);
 441                 mutex_unlock(&cnic_lock);
 442                 return -EBUSY;
 443         }
 444
 445         read_lock(&cnic_dev_lock);
 446         list_for_each_entry(dev, &cnic_dev_list, list) {
 447                 struct cnic_local *cp = dev->cnic_priv;
 448
 449                 clear_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]);
 450         }
 451         read_unlock(&cnic_dev_lock);
 452
 453         atomic_set(&ulp_ops->ref_count, 0);
 454         rcu_assign_pointer(cnic_ulp_tbl[ulp_type], ulp_ops);
 455         mutex_unlock(&cnic_lock);
 456
 457         /* Prevent race conditions with netdev_event */
 458         rtnl_lock();
 459         list_for_each_entry(dev, &cnic_dev_list, list) {
 460                 struct cnic_local *cp = dev->cnic_priv;
 461
 462                 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]))
 463                         ulp_ops->cnic_init(dev);
 464         }
 465         rtnl_unlock();
 466
 467         return 0;
 468 }
 469
 470 int cnic_unregister_driver(int ulp_type)
 471 {
 472         struct cnic_dev *dev;
 473         struct cnic_ulp_ops *ulp_ops;
 474         int i = 0;
 475
 476         if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
 477                 pr_err("%s: Bad type %d\n", __func__, ulp_type);
 478                 return -EINVAL;
 479         }
 480         mutex_lock(&cnic_lock);
 481         ulp_ops = cnic_ulp_tbl[ulp_type];
 482         if (!ulp_ops) {
 483                 pr_err("%s: Type %d has not been registered\n",
 484                        __func__, ulp_type);
 485                 goto out_unlock;
 486         }
 487         read_lock(&cnic_dev_lock);
 488         list_for_each_entry(dev, &cnic_dev_list, list) {
 489                 struct cnic_local *cp = dev->cnic_priv;
 490
 491                 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
 492                         pr_err("%s: Type %d still has devices registered\n",
 493                                __func__, ulp_type);
 494                         read_unlock(&cnic_dev_lock);
 495                         goto out_unlock;
 496                 }
 497         }
 498         read_unlock(&cnic_dev_lock);
 499
 500         rcu_assign_pointer(cnic_ulp_tbl[ulp_type], NULL);
 501
 502         mutex_unlock(&cnic_lock);
 503         synchronize_rcu();
 504         while ((atomic_read(&ulp_ops->ref_count) != 0) && (i < 20)) {
 505                 msleep(100);
 506                 i++;
 507         }
 508
 509         if (atomic_read(&ulp_ops->ref_count) != 0)
 510                 netdev_warn(dev->netdev, "Failed waiting for ref count to go to zero\n");
 511         return 0;
 512
 513 out_unlock:
 514         mutex_unlock(&cnic_lock);
 515         return -EINVAL;
 516 }
 517
 518 static int cnic_start_hw(struct cnic_dev *);
 519 static void cnic_stop_hw(struct cnic_dev *);
 520
 521 static int cnic_register_device(struct cnic_dev *dev, int ulp_type,
 522                                 void *ulp_ctx)
 523 {
 524         struct cnic_local *cp = dev->cnic_priv;
 525         struct cnic_ulp_ops *ulp_ops;
 526
 527         if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
 528                 pr_err("%s: Bad type %d\n", __func__, ulp_type);
 529                 return -EINVAL;
 530         }
 531         mutex_lock(&cnic_lock);
 532         if (cnic_ulp_tbl[ulp_type] == NULL) {
 533                 pr_err("%s: Driver with type %d has not been registered\n",
 534                        __func__, ulp_type);
 535                 mutex_unlock(&cnic_lock);
 536                 return -EAGAIN;
 537         }
 538         if (rcu_dereference(cp->ulp_ops[ulp_type])) {
 539                 pr_err("%s: Type %d has already been registered to this device\n",
 540                        __func__, ulp_type);
 541                 mutex_unlock(&cnic_lock);
 542                 return -EBUSY;
 543         }
 544
 545         clear_bit(ULP_F_START, &cp->ulp_flags[ulp_type]);
 546         cp->ulp_handle[ulp_type] = ulp_ctx;
 547         ulp_ops = cnic_ulp_tbl[ulp_type];
 548         rcu_assign_pointer(cp->ulp_ops[ulp_type], ulp_ops);
 549         cnic_hold(dev);
 550
 551         if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
 552                 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[ulp_type]))
 553                         ulp_ops->cnic_start(cp->ulp_handle[ulp_type]);
 554
 555         mutex_unlock(&cnic_lock);
 556
 557         return 0;
 558
 559 }
 560 EXPORT_SYMBOL(cnic_register_driver);
 561
 562 static int cnic_unregister_device(struct cnic_dev *dev, int ulp_type)
 563 {
 564         struct cnic_local *cp = dev->cnic_priv;
 565         int i = 0;
 566
 567         if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
 568                 pr_err("%s: Bad type %d\n", __func__, ulp_type);
 569                 return -EINVAL;
 570         }
 571         mutex_lock(&cnic_lock);
 572         if (rcu_dereference(cp->ulp_ops[ulp_type])) {
 573                 rcu_assign_pointer(cp->ulp_ops[ulp_type], NULL);
 574                 cnic_put(dev);
 575         } else {
 576                 pr_err("%s: device not registered to this ulp type %d\n",
 577                        __func__, ulp_type);
 578                 mutex_unlock(&cnic_lock);
 579                 return -EINVAL;
 580         }
 581         mutex_unlock(&cnic_lock);
 582
 583         if (ulp_type == CNIC_ULP_ISCSI)
 584                 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
 585
 586         synchronize_rcu();
 587
 588         while (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]) &&
 589                i < 20) {
 590                 msleep(100);
 591                 i++;
 592         }
 593         if (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]))
 594                 netdev_warn(dev->netdev, "Failed waiting for ULP up call to complete\n");
 595
 596         return 0;
 597 }
 598 EXPORT_SYMBOL(cnic_unregister_driver);
 599
 600 static int cnic_init_id_tbl(struct cnic_id_tbl *id_tbl, u32 size, u32 start_id)
 601 {
 602         id_tbl->start = start_id;
 603         id_tbl->max = size;
 604         id_tbl->next = 0;
 605         spin_lock_init(&id_tbl->lock);
 606         id_tbl->table = kzalloc(DIV_ROUND_UP(size, 32) * 4, GFP_KERNEL);
 607         if (!id_tbl->table)
 608                 return -ENOMEM;
 609
 610         return 0;
 611 }
 612
 613 static void cnic_free_id_tbl(struct cnic_id_tbl *id_tbl)
 614 {
 615         kfree(id_tbl->table);
 616         id_tbl->table = NULL;
 617 }
 618
 619 static int cnic_alloc_id(struct cnic_id_tbl *id_tbl, u32 id)
 620 {
 621         int ret = -1;
 622
 623         id -= id_tbl->start;
 624         if (id >= id_tbl->max)
 625                 return ret;
 626
 627         spin_lock(&id_tbl->lock);
 628         if (!test_bit(id, id_tbl->table)) {
 629                 set_bit(id, id_tbl->table);
 630                 ret = 0;
 631         }
 632         spin_unlock(&id_tbl->lock);
 633         return ret;
 634 }
 635
 636 /* Returns -1 if not successful */
 637 static u32 cnic_alloc_new_id(struct cnic_id_tbl *id_tbl)
 638 {
 639         u32 id;
 640
 641         spin_lock(&id_tbl->lock);
 642         id = find_next_zero_bit(id_tbl->table, id_tbl->max, id_tbl->next);
 643         if (id >= id_tbl->max) {
 644                 id = -1;
 645                 if (id_tbl->next != 0) {
 646                         id = find_first_zero_bit(id_tbl->table, id_tbl->next);
 647                         if (id >= id_tbl->next)
 648                                 id = -1;
 649                 }
 650         }
 651
 652         if (id < id_tbl->max) {
 653                 set_bit(id, id_tbl->table);
 654                 id_tbl->next = (id + 1) & (id_tbl->max - 1);
 655                 id += id_tbl->start;
 656         }
 657
 658         spin_unlock(&id_tbl->lock);
 659
 660         return id;
 661 }
 662
 663 static void cnic_free_id(struct cnic_id_tbl *id_tbl, u32 id)
 664 {
 665         if (id == -1)
 666                 return;
 667
 668         id -= id_tbl->start;
 669         if (id >= id_tbl->max)
 670                 return;
 671
 672         clear_bit(id, id_tbl->table);
 673 }
 674
 675 static void cnic_free_dma(struct cnic_dev *dev, struct cnic_dma *dma)
 676 {
 677         int i;
 678
 679         if (!dma->pg_arr)
 680                 return;
 681
 682         for (i = 0; i < dma->num_pages; i++) {
 683                 if (dma->pg_arr[i]) {
 684                         dma_free_coherent(&dev->pcidev->dev, BCM_PAGE_SIZE,
 685                                           dma->pg_arr[i], dma->pg_map_arr[i]);
 686                         dma->pg_arr[i] = NULL;
 687                 }
 688         }
 689         if (dma->pgtbl) {
 690                 dma_free_coherent(&dev->pcidev->dev, dma->pgtbl_size,
 691                                   dma->pgtbl, dma->pgtbl_map);
 692                 dma->pgtbl = NULL;
 693         }
 694         kfree(dma->pg_arr);
 695         dma->pg_arr = NULL;
 696         dma->num_pages = 0;
 697 }
 698
 699 static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma)
 700 {
 701         int i;
 702         __le32 *page_table = (__le32 *) dma->pgtbl;
 703
 704         for (i = 0; i < dma->num_pages; i++) {
 705                 /* Each entry needs to be in big endian format. */
 706                 *page_table = cpu_to_le32((u64) dma->pg_map_arr[i] >> 32);
 707                 page_table++;
 708                 *page_table = cpu_to_le32(dma->pg_map_arr[i] & 0xffffffff);
 709                 page_table++;
 710         }
 711 }
 712
 713 static void cnic_setup_page_tbl_le(struct cnic_dev *dev, struct cnic_dma *dma)
 714 {
 715         int i;
 716         __le32 *page_table = (__le32 *) dma->pgtbl;
 717
 718         for (i = 0; i < dma->num_pages; i++) {
 719                 /* Each entry needs to be in little endian format. */
 720                 *page_table = cpu_to_le32(dma->pg_map_arr[i] & 0xffffffff);
 721                 page_table++;
 722                 *page_table = cpu_to_le32((u64) dma->pg_map_arr[i] >> 32);
 723                 page_table++;
 724         }
 725 }
 726
 727 static int cnic_alloc_dma(struct cnic_dev *dev, struct cnic_dma *dma,
 728                           int pages, int use_pg_tbl)
 729 {
 730         int i, size;
 731         struct cnic_local *cp = dev->cnic_priv;
 732
 733         size = pages * (sizeof(void *) + sizeof(dma_addr_t));
 734         dma->pg_arr = kzalloc(size, GFP_ATOMIC);
 735         if (dma->pg_arr == NULL)
 736                 return -ENOMEM;
 737
 738         dma->pg_map_arr = (dma_addr_t *) (dma->pg_arr + pages);
 739         dma->num_pages = pages;
 740
 741         for (i = 0; i < pages; i++) {
 742                 dma->pg_arr[i] = dma_alloc_coherent(&dev->pcidev->dev,
 743                                                     BCM_PAGE_SIZE,
 744                                                     &dma->pg_map_arr[i],
 745                                                     GFP_ATOMIC);
 746                 if (dma->pg_arr[i] == NULL)
 747                         goto error;
 748         }
 749         if (!use_pg_tbl)
 750                 return 0;
 751
 752         dma->pgtbl_size = ((pages * 8) + BCM_PAGE_SIZE - 1) &
 753                           ~(BCM_PAGE_SIZE - 1);
 754         dma->pgtbl = dma_alloc_coherent(&dev->pcidev->dev, dma->pgtbl_size,
 755                                         &dma->pgtbl_map, GFP_ATOMIC);
 756         if (dma->pgtbl == NULL)
 757                 goto error;
 758
 759         cp->setup_pgtbl(dev, dma);
 760
 761         return 0;
 762
 763 error:
 764         cnic_free_dma(dev, dma);
 765         return -ENOMEM;
 766 }
 767
 768 static void cnic_free_context(struct cnic_dev *dev)
 769 {
 770         struct cnic_local *cp = dev->cnic_priv;
 771         int i;
 772
 773         for (i = 0; i < cp->ctx_blks; i++) {
 774                 if (cp->ctx_arr[i].ctx) {
 775                         dma_free_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
 776                                           cp->ctx_arr[i].ctx,
 777                                           cp->ctx_arr[i].mapping);
 778                         cp->ctx_arr[i].ctx = NULL;
 779                 }
 780         }
 781 }
 782
 783 static void __cnic_free_uio(struct cnic_uio_dev *udev)
 784 {
 785         uio_unregister_device(&udev->cnic_uinfo);
 786
 787         if (udev->l2_buf) {
 788                 dma_free_coherent(&udev->pdev->dev, udev->l2_buf_size,
 789                                   udev->l2_buf, udev->l2_buf_map);
 790                 udev->l2_buf = NULL;
 791         }
 792
 793         if (udev->l2_ring) {
 794                 dma_free_coherent(&udev->pdev->dev, udev->l2_ring_size,
 795                                   udev->l2_ring, udev->l2_ring_map);
 796                 udev->l2_ring = NULL;
 797         }
 798
 799         pci_dev_put(udev->pdev);
 800         kfree(udev);
 801 }
 802
 803 static void cnic_free_uio(struct cnic_uio_dev *udev)
 804 {
 805         if (!udev)
 806                 return;
 807
 808         write_lock(&cnic_dev_lock);
 809         list_del_init(&udev->list);
 810         write_unlock(&cnic_dev_lock);
 811         __cnic_free_uio(udev);
 812 }
 813
 814 static void cnic_free_resc(struct cnic_dev *dev)
 815 {
 816         struct cnic_local *cp = dev->cnic_priv;
 817         struct cnic_uio_dev *udev = cp->udev;
 818
 819         if (udev) {
 820                 udev->dev = NULL;
 821                 cp->udev = NULL;
 822         }
 823
 824         cnic_free_context(dev);
 825         kfree(cp->ctx_arr);
 826         cp->ctx_arr = NULL;
 827         cp->ctx_blks = 0;
 828
 829         cnic_free_dma(dev, &cp->gbl_buf_info);
 830         cnic_free_dma(dev, &cp->conn_buf_info);
 831         cnic_free_dma(dev, &cp->kwq_info);
 832         cnic_free_dma(dev, &cp->kwq_16_data_info);
 833         cnic_free_dma(dev, &cp->kcq2.dma);
 834         cnic_free_dma(dev, &cp->kcq1.dma);
 835         kfree(cp->iscsi_tbl);
 836         cp->iscsi_tbl = NULL;
 837         kfree(cp->ctx_tbl);
 838         cp->ctx_tbl = NULL;
 839
 840         cnic_free_id_tbl(&cp->fcoe_cid_tbl);
 841         cnic_free_id_tbl(&cp->cid_tbl);
 842 }
 843
 844 static int cnic_alloc_context(struct cnic_dev *dev)
 845 {
 846         struct cnic_local *cp = dev->cnic_priv;
 847
 848         if (CHIP_NUM(cp) == CHIP_NUM_5709) {
 849                 int i, k, arr_size;
 850
 851                 cp->ctx_blk_size = BCM_PAGE_SIZE;
 852                 cp->cids_per_blk = BCM_PAGE_SIZE / 128;
 853                 arr_size = BNX2_MAX_CID / cp->cids_per_blk *
 854                            sizeof(struct cnic_ctx);
 855                 cp->ctx_arr = kzalloc(arr_size, GFP_KERNEL);
 856                 if (cp->ctx_arr == NULL)
 857                         return -ENOMEM;
 858
 859                 k = 0;
 860                 for (i = 0; i < 2; i++) {
 861                         u32 j, reg, off, lo, hi;
 862
 863                         if (i == 0)
 864                                 off = BNX2_PG_CTX_MAP;
 865                         else
 866                                 off = BNX2_ISCSI_CTX_MAP;
 867
 868                         reg = cnic_reg_rd_ind(dev, off);
 869                         lo = reg >> 16;
 870                         hi = reg & 0xffff;
 871                         for (j = lo; j < hi; j += cp->cids_per_blk, k++)
 872                                 cp->ctx_arr[k].cid = j;
 873                 }
 874
 875                 cp->ctx_blks = k;
 876                 if (cp->ctx_blks >= (BNX2_MAX_CID / cp->cids_per_blk)) {
 877                         cp->ctx_blks = 0;
 878                         return -ENOMEM;
 879                 }
 880
 881                 for (i = 0; i < cp->ctx_blks; i++) {
 882                         cp->ctx_arr[i].ctx =
 883                                 dma_alloc_coherent(&dev->pcidev->dev,
 884                                                    BCM_PAGE_SIZE,
 885                                                    &cp->ctx_arr[i].mapping,
 886                                                    GFP_KERNEL);
 887                         if (cp->ctx_arr[i].ctx == NULL)
 888                                 return -ENOMEM;
 889                 }
 890         }
 891         return 0;
 892 }
 893
 894 static int cnic_alloc_kcq(struct cnic_dev *dev, struct kcq_info *info)
 895 {
 896         int err, i, is_bnx2 = 0;
 897         struct kcqe **kcq;
 898
 899         if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags))
 900                 is_bnx2 = 1;
 901
 902         err = cnic_alloc_dma(dev, &info->dma, KCQ_PAGE_CNT, is_bnx2);
 903         if (err)
 904                 return err;
 905
 906         kcq = (struct kcqe **) info->dma.pg_arr;
 907         info->kcq = kcq;
 908
 909         if (is_bnx2)
 910                 return 0;
 911
 912         for (i = 0; i < KCQ_PAGE_CNT; i++) {
 913                 struct bnx2x_bd_chain_next *next =
 914                         (struct bnx2x_bd_chain_next *) &kcq[i][MAX_KCQE_CNT];
 915                 int j = i + 1;
 916
 917                 if (j >= KCQ_PAGE_CNT)
 918                         j = 0;
 919                 next->addr_hi = (u64) info->dma.pg_map_arr[j] >> 32;
 920                 next->addr_lo = info->dma.pg_map_arr[j] & 0xffffffff;
 921         }
 922         return 0;
 923 }
 924
 925 static int cnic_alloc_uio_rings(struct cnic_dev *dev, int pages)
 926 {
 927         struct cnic_local *cp = dev->cnic_priv;
 928         struct cnic_uio_dev *udev;
 929
 930         read_lock(&cnic_dev_lock);
 931         list_for_each_entry(udev, &cnic_udev_list, list) {
 932                 if (udev->pdev == dev->pcidev) {
 933                         udev->dev = dev;
 934                         cp->udev = udev;
 935                         read_unlock(&cnic_dev_lock);
 936                         return 0;
 937                 }
 938         }
 939         read_unlock(&cnic_dev_lock);
 940
 941         udev = kzalloc(sizeof(struct cnic_uio_dev), GFP_ATOMIC);
 942         if (!udev)
 943                 return -ENOMEM;
 944
 945         udev->uio_dev = -1;
 946
 947         udev->dev = dev;
 948         udev->pdev = dev->pcidev;
 949         udev->l2_ring_size = pages * BCM_PAGE_SIZE;
 950         udev->l2_ring = dma_alloc_coherent(&udev->pdev->dev, udev->l2_ring_size,
 951                                            &udev->l2_ring_map,
 952                                            GFP_KERNEL | __GFP_COMP);
 953         if (!udev->l2_ring)
 954                 goto err_udev;
 955
 956         udev->l2_buf_size = (cp->l2_rx_ring_size + 1) * cp->l2_single_buf_size;
 957         udev->l2_buf_size = PAGE_ALIGN(udev->l2_buf_size);
 958         udev->l2_buf = dma_alloc_coherent(&udev->pdev->dev, udev->l2_buf_size,
 959                                           &udev->l2_buf_map,
 960                                           GFP_KERNEL | __GFP_COMP);
 961         if (!udev->l2_buf)
 962                 goto err_dma;
 963
 964         write_lock(&cnic_dev_lock);
 965         list_add(&udev->list, &cnic_udev_list);
 966         write_unlock(&cnic_dev_lock);
 967
 968         pci_dev_get(udev->pdev);
 969
 970         cp->udev = udev;
 971
 972         return 0;
 973  err_dma:
 974         dma_free_coherent(&udev->pdev->dev, udev->l2_ring_size,
 975                           udev->l2_ring, udev->l2_ring_map);
 976  err_udev:
 977         kfree(udev);
 978         return -ENOMEM;
 979 }
 980
 981 static int cnic_init_uio(struct cnic_dev *dev)
 982 {
 983         struct cnic_local *cp = dev->cnic_priv;
 984         struct cnic_uio_dev *udev = cp->udev;
 985         struct uio_info *uinfo;
 986         int ret = 0;
 987
 988         if (!udev)
 989                 return -ENOMEM;
 990
 991         uinfo = &udev->cnic_uinfo;
 992
 993         uinfo->mem[0].addr = dev->netdev->base_addr;
 994         uinfo->mem[0].internal_addr = dev->regview;
 995         uinfo->mem[0].size = dev->netdev->mem_end - dev->netdev->mem_start;
 996         uinfo->mem[0].memtype = UIO_MEM_PHYS;
 997
 998         if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
 999                 uinfo->mem[1].addr = (unsigned long) cp->status_blk.gen &
1000                                         PAGE_MASK;
1001                 if (cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
1002                         uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE * 9;
1003                 else
1004                         uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE;
1005
1006                 uinfo->name = "bnx2_cnic";
1007         } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
1008                 uinfo->mem[1].addr = (unsigned long) cp->bnx2x_def_status_blk &
1009                         PAGE_MASK;
1010                 uinfo->mem[1].size = sizeof(*cp->bnx2x_def_status_blk);
1011
1012                 uinfo->name = "bnx2x_cnic";
1013         }
1014
1015         uinfo->mem[1].memtype = UIO_MEM_LOGICAL;
1016
1017         uinfo->mem[2].addr = (unsigned long) udev->l2_ring;
1018         uinfo->mem[2].size = udev->l2_ring_size;
1019         uinfo->mem[2].memtype = UIO_MEM_LOGICAL;
1020
1021         uinfo->mem[3].addr = (unsigned long) udev->l2_buf;
1022         uinfo->mem[3].size = udev->l2_buf_size;
1023         uinfo->mem[3].memtype = UIO_MEM_LOGICAL;
1024
1025         uinfo->version = CNIC_MODULE_VERSION;
1026         uinfo->irq = UIO_IRQ_CUSTOM;
1027
1028         uinfo->open = cnic_uio_open;
1029         uinfo->release = cnic_uio_close;
1030
1031         if (udev->uio_dev == -1) {
1032                 if (!uinfo->priv) {
1033                         uinfo->priv = udev;
1034
1035                         ret = uio_register_device(&udev->pdev->dev, uinfo);
1036                 }
1037         } else {
1038                 cnic_init_rings(dev);
1039         }
1040
1041         return ret;
1042 }
1043
1044 static int cnic_alloc_bnx2_resc(struct cnic_dev *dev)
1045 {
1046         struct cnic_local *cp = dev->cnic_priv;
1047         int ret;
1048
1049         ret = cnic_alloc_dma(dev, &cp->kwq_info, KWQ_PAGE_CNT, 1);
1050         if (ret)
1051                 goto error;
1052         cp->kwq = (struct kwqe **) cp->kwq_info.pg_arr;
1053
1054         ret = cnic_alloc_kcq(dev, &cp->kcq1);
1055         if (ret)
1056                 goto error;
1057
1058         ret = cnic_alloc_context(dev);
1059         if (ret)
1060                 goto error;
1061
1062         ret = cnic_alloc_uio_rings(dev, 2);
1063         if (ret)
1064                 goto error;
1065
1066         ret = cnic_init_uio(dev);
1067         if (ret)
1068                 goto error;
1069
1070         return 0;
1071
1072 error:
1073         cnic_free_resc(dev);
1074         return ret;
1075 }
1076
1077 static int cnic_alloc_bnx2x_context(struct cnic_dev *dev)
1078 {
1079         struct cnic_local *cp = dev->cnic_priv;
1080         int ctx_blk_size = cp->ethdev->ctx_blk_size;
1081         int total_mem, blks, i;
1082
1083         total_mem = BNX2X_CONTEXT_MEM_SIZE * cp->max_cid_space;
1084         blks = total_mem / ctx_blk_size;
1085         if (total_mem % ctx_blk_size)
1086                 blks++;
1087
1088         if (blks > cp->ethdev->ctx_tbl_len)
1089                 return -ENOMEM;
1090
1091         cp->ctx_arr = kcalloc(blks, sizeof(struct cnic_ctx), GFP_KERNEL);
1092         if (cp->ctx_arr == NULL)
1093                 return -ENOMEM;
1094
1095         cp->ctx_blks = blks;
1096         cp->ctx_blk_size = ctx_blk_size;
1097         if (!BNX2X_CHIP_IS_57710(cp->chip_id))
1098                 cp->ctx_align = 0;
1099         else
1100                 cp->ctx_align = ctx_blk_size;
1101
1102         cp->cids_per_blk = ctx_blk_size / BNX2X_CONTEXT_MEM_SIZE;
1103
1104         for (i = 0; i < blks; i++) {
1105                 cp->ctx_arr[i].ctx =
1106                         dma_alloc_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
1107                                            &cp->ctx_arr[i].mapping,
1108                                            GFP_KERNEL);
1109                 if (cp->ctx_arr[i].ctx == NULL)
1110                         return -ENOMEM;
1111
1112                 if (cp->ctx_align && cp->ctx_blk_size == ctx_blk_size) {
1113                         if (cp->ctx_arr[i].mapping & (cp->ctx_align - 1)) {
1114                                 cnic_free_context(dev);
1115                                 cp->ctx_blk_size += cp->ctx_align;
1116                                 i = -1;
1117                                 continue;
1118                         }
1119                 }
1120         }
1121         return 0;
1122 }
1123
1124 static int cnic_alloc_bnx2x_resc(struct cnic_dev *dev)
1125 {
1126         struct cnic_local *cp = dev->cnic_priv;
1127         struct cnic_eth_dev *ethdev = cp->ethdev;
1128         u32 start_cid = ethdev->starting_cid;
1129         int i, j, n, ret, pages;
1130         struct cnic_dma *kwq_16_dma = &cp->kwq_16_data_info;
1131
1132         cp->iro_arr = ethdev->iro_arr;
1133
1134         cp->max_cid_space = MAX_ISCSI_TBL_SZ + BNX2X_FCOE_NUM_CONNECTIONS;
1135         cp->iscsi_start_cid = start_cid;
1136         cp->fcoe_start_cid = start_cid + MAX_ISCSI_TBL_SZ;
1137
1138         if (BNX2X_CHIP_IS_E2(cp->chip_id)) {
1139                 cp->max_cid_space += BNX2X_FCOE_NUM_CONNECTIONS;
1140                 cp->fcoe_init_cid = ethdev->fcoe_init_cid;
1141                 if (!cp->fcoe_init_cid)
1142                         cp->fcoe_init_cid = 0x10;
1143         }
1144
1145         if (start_cid < BNX2X_ISCSI_START_CID) {
1146                 u32 delta = BNX2X_ISCSI_START_CID - start_cid;
1147
1148                 cp->iscsi_start_cid = BNX2X_ISCSI_START_CID;
1149                 cp->fcoe_start_cid += delta;
1150                 cp->max_cid_space += delta;
1151         }
1152
1153         cp->iscsi_tbl = kzalloc(sizeof(struct cnic_iscsi) * MAX_ISCSI_TBL_SZ,
1154                                 GFP_KERNEL);
1155         if (!cp->iscsi_tbl)
1156                 goto error;
1157
1158         cp->ctx_tbl = kzalloc(sizeof(struct cnic_context) *
1159                                 cp->max_cid_space, GFP_KERNEL);
1160         if (!cp->ctx_tbl)
1161                 goto error;
1162
1163         for (i = 0; i < MAX_ISCSI_TBL_SZ; i++) {
1164                 cp->ctx_tbl[i].proto.iscsi = &cp->iscsi_tbl[i];
1165                 cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_ISCSI;
1166         }
1167
1168         for (i = MAX_ISCSI_TBL_SZ; i < cp->max_cid_space; i++)
1169                 cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_FCOE;
1170
1171         pages = PAGE_ALIGN(cp->max_cid_space * CNIC_KWQ16_DATA_SIZE) /
1172                 PAGE_SIZE;
1173
1174         ret = cnic_alloc_dma(dev, kwq_16_dma, pages, 0);
1175         if (ret)
1176                 return -ENOMEM;
1177
1178         n = PAGE_SIZE / CNIC_KWQ16_DATA_SIZE;
1179         for (i = 0, j = 0; i < cp->max_cid_space; i++) {
1180                 long off = CNIC_KWQ16_DATA_SIZE * (i % n);
1181
1182                 cp->ctx_tbl[i].kwqe_data = kwq_16_dma->pg_arr[j] + off;
1183                 cp->ctx_tbl[i].kwqe_data_mapping = kwq_16_dma->pg_map_arr[j] +
1184                                                    off;
1185
1186                 if ((i % n) == (n - 1))
1187                         j++;
1188         }
1189
1190         ret = cnic_alloc_kcq(dev, &cp->kcq1);
1191         if (ret)
1192                 goto error;
1193
1194         if (BNX2X_CHIP_IS_E2(cp->chip_id)) {
1195                 ret = cnic_alloc_kcq(dev, &cp->kcq2);
1196                 if (ret)
1197                         goto error;
1198         }
1199
1200         pages = PAGE_ALIGN(BNX2X_ISCSI_NUM_CONNECTIONS *
1201                            BNX2X_ISCSI_CONN_BUF_SIZE) / PAGE_SIZE;
1202         ret = cnic_alloc_dma(dev, &cp->conn_buf_info, pages, 1);
1203         if (ret)
1204                 goto error;
1205
1206         pages = PAGE_ALIGN(BNX2X_ISCSI_GLB_BUF_SIZE) / PAGE_SIZE;
1207         ret = cnic_alloc_dma(dev, &cp->gbl_buf_info, pages, 0);
1208         if (ret)
1209                 goto error;
1210
1211         ret = cnic_alloc_bnx2x_context(dev);
1212         if (ret)
1213                 goto error;
1214
1215         cp->bnx2x_def_status_blk = cp->ethdev->irq_arr[1].status_blk;
1216
1217         cp->l2_rx_ring_size = 15;
1218
1219         ret = cnic_alloc_uio_rings(dev, 4);
1220         if (ret)
1221                 goto error;
1222
1223         ret = cnic_init_uio(dev);
1224         if (ret)
1225                 goto error;
1226
1227         return 0;
1228
1229 error:
1230         cnic_free_resc(dev);
1231         return -ENOMEM;
1232 }
1233
1234 static inline u32 cnic_kwq_avail(struct cnic_local *cp)
1235 {
1236         return cp->max_kwq_idx -
1237                 ((cp->kwq_prod_idx - cp->kwq_con_idx) & cp->max_kwq_idx);
1238 }
1239
1240 static int cnic_submit_bnx2_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
1241                                   u32 num_wqes)
1242 {
1243         struct cnic_local *cp = dev->cnic_priv;
1244         struct kwqe *prod_qe;
1245         u16 prod, sw_prod, i;
1246
1247         if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
1248                 return -EAGAIN;         /* bnx2 is down */
1249
1250         spin_lock_bh(&cp->cnic_ulp_lock);
1251         if (num_wqes > cnic_kwq_avail(cp) &&
1252             !test_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags)) {
1253                 spin_unlock_bh(&cp->cnic_ulp_lock);
1254                 return -EAGAIN;
1255         }
1256
1257         clear_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags);
1258
1259         prod = cp->kwq_prod_idx;
1260         sw_prod = prod & MAX_KWQ_IDX;
1261         for (i = 0; i < num_wqes; i++) {
1262                 prod_qe = &cp->kwq[KWQ_PG(sw_prod)][KWQ_IDX(sw_prod)];
1263                 memcpy(prod_qe, wqes[i], sizeof(struct kwqe));
1264                 prod++;
1265                 sw_prod = prod & MAX_KWQ_IDX;
1266         }
1267         cp->kwq_prod_idx = prod;
1268
1269         CNIC_WR16(dev, cp->kwq_io_addr, cp->kwq_prod_idx);
1270
1271         spin_unlock_bh(&cp->cnic_ulp_lock);
1272         return 0;
1273 }
1274
1275 static void *cnic_get_kwqe_16_data(struct cnic_local *cp, u32 l5_cid,
1276                                    union l5cm_specific_data *l5_data)
1277 {
1278         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1279         dma_addr_t map;
1280
1281         map = ctx->kwqe_data_mapping;
1282         l5_data->phy_address.lo = (u64) map & 0xffffffff;
1283         l5_data->phy_address.hi = (u64) map >> 32;
1284         return ctx->kwqe_data;
1285 }
1286
1287 static int cnic_submit_kwqe_16(struct cnic_dev *dev, u32 cmd, u32 cid,
1288                                 u32 type, union l5cm_specific_data *l5_data)
1289 {
1290         struct cnic_local *cp = dev->cnic_priv;
1291         struct l5cm_spe kwqe;
1292         struct kwqe_16 *kwq[1];
1293         u16 type_16;
1294         int ret;
1295
1296         kwqe.hdr.conn_and_cmd_data =
1297                 cpu_to_le32(((cmd << SPE_HDR_CMD_ID_SHIFT) |
1298                              BNX2X_HW_CID(cp, cid)));
1299
1300         type_16 = (type << SPE_HDR_CONN_TYPE_SHIFT) & SPE_HDR_CONN_TYPE;
1301         type_16 |= (cp->pfid << SPE_HDR_FUNCTION_ID_SHIFT) &
1302                    SPE_HDR_FUNCTION_ID;
1303
1304         kwqe.hdr.type = cpu_to_le16(type_16);
1305         kwqe.hdr.reserved1 = 0;
1306         kwqe.data.phy_address.lo = cpu_to_le32(l5_data->phy_address.lo);
1307         kwqe.data.phy_address.hi = cpu_to_le32(l5_data->phy_address.hi);
1308
1309         kwq[0] = (struct kwqe_16 *) &kwqe;
1310
1311         spin_lock_bh(&cp->cnic_ulp_lock);
1312         ret = cp->ethdev->drv_submit_kwqes_16(dev->netdev, kwq, 1);
1313         spin_unlock_bh(&cp->cnic_ulp_lock);
1314
1315         if (ret == 1)
1316                 return 0;
1317
1318         return -EBUSY;
1319 }
1320
1321 static void cnic_reply_bnx2x_kcqes(struct cnic_dev *dev, int ulp_type,
1322                                    struct kcqe *cqes[], u32 num_cqes)
1323 {
1324         struct cnic_local *cp = dev->cnic_priv;
1325         struct cnic_ulp_ops *ulp_ops;
1326
1327         rcu_read_lock();
1328         ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
1329         if (likely(ulp_ops)) {
1330                 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
1331                                           cqes, num_cqes);
1332         }
1333         rcu_read_unlock();
1334 }
1335
1336 static int cnic_bnx2x_iscsi_init1(struct cnic_dev *dev, struct kwqe *kwqe)
1337 {
1338         struct cnic_local *cp = dev->cnic_priv;
1339         struct iscsi_kwqe_init1 *req1 = (struct iscsi_kwqe_init1 *) kwqe;
1340         int hq_bds, pages;
1341         u32 pfid = cp->pfid;
1342
1343         cp->num_iscsi_tasks = req1->num_tasks_per_conn;
1344         cp->num_ccells = req1->num_ccells_per_conn;
1345         cp->task_array_size = BNX2X_ISCSI_TASK_CONTEXT_SIZE *
1346                               cp->num_iscsi_tasks;
1347         cp->r2tq_size = cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS *
1348                         BNX2X_ISCSI_R2TQE_SIZE;
1349         cp->hq_size = cp->num_ccells * BNX2X_ISCSI_HQ_BD_SIZE;
1350         pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1351         hq_bds = pages * (PAGE_SIZE / BNX2X_ISCSI_HQ_BD_SIZE);
1352         cp->num_cqs = req1->num_cqs;
1353
1354         if (!dev->max_iscsi_conn)
1355                 return 0;
1356
1357         /* init Tstorm RAM */
1358         CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_RQ_SIZE_OFFSET(pfid),
1359                   req1->rq_num_wqes);
1360         CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1361                   PAGE_SIZE);
1362         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1363                  TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1364         CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1365                   TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1366                   req1->num_tasks_per_conn);
1367
1368         /* init Ustorm RAM */
1369         CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1370                   USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfid),
1371                   req1->rq_buffer_size);
1372         CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1373                   PAGE_SIZE);
1374         CNIC_WR8(dev, BAR_USTRORM_INTMEM +
1375                  USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1376         CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1377                   USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1378                   req1->num_tasks_per_conn);
1379         CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_RQ_SIZE_OFFSET(pfid),
1380                   req1->rq_num_wqes);
1381         CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_CQ_SIZE_OFFSET(pfid),
1382                   req1->cq_num_wqes);
1383         CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfid),
1384                   cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1385
1386         /* init Xstorm RAM */
1387         CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1388                   PAGE_SIZE);
1389         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1390                  XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1391         CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
1392                   XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1393                   req1->num_tasks_per_conn);
1394         CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_HQ_SIZE_OFFSET(pfid),
1395                   hq_bds);
1396         CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_SQ_SIZE_OFFSET(pfid),
1397                   req1->num_tasks_per_conn);
1398         CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfid),
1399                   cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1400
1401         /* init Cstorm RAM */
1402         CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1403                   PAGE_SIZE);
1404         CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
1405                  CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1406         CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1407                   CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1408                   req1->num_tasks_per_conn);
1409         CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_CQ_SIZE_OFFSET(pfid),
1410                   req1->cq_num_wqes);
1411         CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_HQ_SIZE_OFFSET(pfid),
1412                   hq_bds);
1413
1414         return 0;
1415 }
1416
1417 static int cnic_bnx2x_iscsi_init2(struct cnic_dev *dev, struct kwqe *kwqe)
1418 {
1419         struct iscsi_kwqe_init2 *req2 = (struct iscsi_kwqe_init2 *) kwqe;
1420         struct cnic_local *cp = dev->cnic_priv;
1421         u32 pfid = cp->pfid;
1422         struct iscsi_kcqe kcqe;
1423         struct kcqe *cqes[1];
1424
1425         memset(&kcqe, 0, sizeof(kcqe));
1426         if (!dev->max_iscsi_conn) {
1427                 kcqe.completion_status =
1428                         ISCSI_KCQE_COMPLETION_STATUS_ISCSI_NOT_SUPPORTED;
1429                 goto done;
1430         }
1431
1432         CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1433                 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid), req2->error_bit_map[0]);
1434         CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1435                 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid) + 4,
1436                 req2->error_bit_map[1]);
1437
1438         CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1439                   USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfid), req2->max_cq_sqn);
1440         CNIC_WR(dev, BAR_USTRORM_INTMEM +
1441                 USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid), req2->error_bit_map[0]);
1442         CNIC_WR(dev, BAR_USTRORM_INTMEM +
1443                 USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid) + 4,
1444                 req2->error_bit_map[1]);
1445
1446         CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1447                   CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfid), req2->max_cq_sqn);
1448
1449         kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1450
1451 done:
1452         kcqe.op_code = ISCSI_KCQE_OPCODE_INIT;
1453         cqes[0] = (struct kcqe *) &kcqe;
1454         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1455
1456         return 0;
1457 }
1458
1459 static void cnic_free_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1460 {
1461         struct cnic_local *cp = dev->cnic_priv;
1462         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1463
1464         if (ctx->ulp_proto_id == CNIC_ULP_ISCSI) {
1465                 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1466
1467                 cnic_free_dma(dev, &iscsi->hq_info);
1468                 cnic_free_dma(dev, &iscsi->r2tq_info);
1469                 cnic_free_dma(dev, &iscsi->task_array_info);
1470                 cnic_free_id(&cp->cid_tbl, ctx->cid);
1471         } else {
1472                 cnic_free_id(&cp->fcoe_cid_tbl, ctx->cid);
1473         }
1474
1475         ctx->cid = 0;
1476 }
1477
1478 static int cnic_alloc_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1479 {
1480         u32 cid;
1481         int ret, pages;
1482         struct cnic_local *cp = dev->cnic_priv;
1483         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1484         struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1485
1486         if (ctx->ulp_proto_id == CNIC_ULP_FCOE) {
1487                 cid = cnic_alloc_new_id(&cp->fcoe_cid_tbl);
1488                 if (cid == -1) {
1489                         ret = -ENOMEM;
1490                         goto error;
1491                 }
1492                 ctx->cid = cid;
1493                 return 0;
1494         }
1495
1496         cid = cnic_alloc_new_id(&cp->cid_tbl);
1497         if (cid == -1) {
1498                 ret = -ENOMEM;
1499                 goto error;
1500         }
1501
1502         ctx->cid = cid;
1503         pages = PAGE_ALIGN(cp->task_array_size) / PAGE_SIZE;
1504
1505         ret = cnic_alloc_dma(dev, &iscsi->task_array_info, pages, 1);
1506         if (ret)
1507                 goto error;
1508
1509         pages = PAGE_ALIGN(cp->r2tq_size) / PAGE_SIZE;
1510         ret = cnic_alloc_dma(dev, &iscsi->r2tq_info, pages, 1);
1511         if (ret)
1512                 goto error;
1513
1514         pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1515         ret = cnic_alloc_dma(dev, &iscsi->hq_info, pages, 1);
1516         if (ret)
1517                 goto error;
1518
1519         return 0;
1520
1521 error:
1522         cnic_free_bnx2x_conn_resc(dev, l5_cid);
1523         return ret;
1524 }
1525
1526 static void *cnic_get_bnx2x_ctx(struct cnic_dev *dev, u32 cid, int init,
1527                                 struct regpair *ctx_addr)
1528 {
1529         struct cnic_local *cp = dev->cnic_priv;
1530         struct cnic_eth_dev *ethdev = cp->ethdev;
1531         int blk = (cid - ethdev->starting_cid) / cp->cids_per_blk;
1532         int off = (cid - ethdev->starting_cid) % cp->cids_per_blk;
1533         unsigned long align_off = 0;
1534         dma_addr_t ctx_map;
1535         void *ctx;
1536
1537         if (cp->ctx_align) {
1538                 unsigned long mask = cp->ctx_align - 1;
1539
1540                 if (cp->ctx_arr[blk].mapping & mask)
1541                         align_off = cp->ctx_align -
1542                                     (cp->ctx_arr[blk].mapping & mask);
1543         }
1544         ctx_map = cp->ctx_arr[blk].mapping + align_off +
1545                 (off * BNX2X_CONTEXT_MEM_SIZE);
1546         ctx = cp->ctx_arr[blk].ctx + align_off +
1547               (off * BNX2X_CONTEXT_MEM_SIZE);
1548         if (init)
1549                 memset(ctx, 0, BNX2X_CONTEXT_MEM_SIZE);
1550
1551         ctx_addr->lo = ctx_map & 0xffffffff;
1552         ctx_addr->hi = (u64) ctx_map >> 32;
1553         return ctx;
1554 }
1555
1556 static int cnic_setup_bnx2x_ctx(struct cnic_dev *dev, struct kwqe *wqes[],
1557                                 u32 num)
1558 {
1559         struct cnic_local *cp = dev->cnic_priv;
1560         struct iscsi_kwqe_conn_offload1 *req1 =
1561                         (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1562         struct iscsi_kwqe_conn_offload2 *req2 =
1563                         (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1564         struct iscsi_kwqe_conn_offload3 *req3;
1565         struct cnic_context *ctx = &cp->ctx_tbl[req1->iscsi_conn_id];
1566         struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1567         u32 cid = ctx->cid;
1568         u32 hw_cid = BNX2X_HW_CID(cp, cid);
1569         struct iscsi_context *ictx;
1570         struct regpair context_addr;
1571         int i, j, n = 2, n_max;
1572
1573         ctx->ctx_flags = 0;
1574         if (!req2->num_additional_wqes)
1575                 return -EINVAL;
1576
1577         n_max = req2->num_additional_wqes + 2;
1578
1579         ictx = cnic_get_bnx2x_ctx(dev, cid, 1, &context_addr);
1580         if (ictx == NULL)
1581                 return -ENOMEM;
1582
1583         req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1584
1585         ictx->xstorm_ag_context.hq_prod = 1;
1586
1587         ictx->xstorm_st_context.iscsi.first_burst_length =
1588                 ISCSI_DEF_FIRST_BURST_LEN;
1589         ictx->xstorm_st_context.iscsi.max_send_pdu_length =
1590                 ISCSI_DEF_MAX_RECV_SEG_LEN;
1591         ictx->xstorm_st_context.iscsi.sq_pbl_base.lo =
1592                 req1->sq_page_table_addr_lo;
1593         ictx->xstorm_st_context.iscsi.sq_pbl_base.hi =
1594                 req1->sq_page_table_addr_hi;
1595         ictx->xstorm_st_context.iscsi.sq_curr_pbe.lo = req2->sq_first_pte.hi;
1596         ictx->xstorm_st_context.iscsi.sq_curr_pbe.hi = req2->sq_first_pte.lo;
1597         ictx->xstorm_st_context.iscsi.hq_pbl_base.lo =
1598                 iscsi->hq_info.pgtbl_map & 0xffffffff;
1599         ictx->xstorm_st_context.iscsi.hq_pbl_base.hi =
1600                 (u64) iscsi->hq_info.pgtbl_map >> 32;
1601         ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.lo =
1602                 iscsi->hq_info.pgtbl[0];
1603         ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.hi =
1604                 iscsi->hq_info.pgtbl[1];
1605         ictx->xstorm_st_context.iscsi.r2tq_pbl_base.lo =
1606                 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1607         ictx->xstorm_st_context.iscsi.r2tq_pbl_base.hi =
1608                 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1609         ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.lo =
1610                 iscsi->r2tq_info.pgtbl[0];
1611         ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.hi =
1612                 iscsi->r2tq_info.pgtbl[1];
1613         ictx->xstorm_st_context.iscsi.task_pbl_base.lo =
1614                 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1615         ictx->xstorm_st_context.iscsi.task_pbl_base.hi =
1616                 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1617         ictx->xstorm_st_context.iscsi.task_pbl_cache_idx =
1618                 BNX2X_ISCSI_PBL_NOT_CACHED;
1619         ictx->xstorm_st_context.iscsi.flags.flags |=
1620                 XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA;
1621         ictx->xstorm_st_context.iscsi.flags.flags |=
1622                 XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T;
1623
1624         ictx->tstorm_st_context.iscsi.hdr_bytes_2_fetch = ISCSI_HEADER_SIZE;
1625         /* TSTORM requires the base address of RQ DB & not PTE */
1626         ictx->tstorm_st_context.iscsi.rq_db_phy_addr.lo =
1627                 req2->rq_page_table_addr_lo & PAGE_MASK;
1628         ictx->tstorm_st_context.iscsi.rq_db_phy_addr.hi =
1629                 req2->rq_page_table_addr_hi;
1630         ictx->tstorm_st_context.iscsi.iscsi_conn_id = req1->iscsi_conn_id;
1631         ictx->tstorm_st_context.tcp.cwnd = 0x5A8;
1632         ictx->tstorm_st_context.tcp.flags2 |=
1633                 TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN;
1634         ictx->tstorm_st_context.tcp.ooo_support_mode =
1635                 TCP_TSTORM_OOO_DROP_AND_PROC_ACK;
1636
1637         ictx->timers_context.flags |= TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG;
1638
1639         ictx->ustorm_st_context.ring.rq.pbl_base.lo =
1640                 req2->rq_page_table_addr_lo;
1641         ictx->ustorm_st_context.ring.rq.pbl_base.hi =
1642                 req2->rq_page_table_addr_hi;
1643         ictx->ustorm_st_context.ring.rq.curr_pbe.lo = req3->qp_first_pte[0].hi;
1644         ictx->ustorm_st_context.ring.rq.curr_pbe.hi = req3->qp_first_pte[0].lo;
1645         ictx->ustorm_st_context.ring.r2tq.pbl_base.lo =
1646                 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1647         ictx->ustorm_st_context.ring.r2tq.pbl_base.hi =
1648                 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1649         ictx->ustorm_st_context.ring.r2tq.curr_pbe.lo =
1650                 iscsi->r2tq_info.pgtbl[0];
1651         ictx->ustorm_st_context.ring.r2tq.curr_pbe.hi =
1652                 iscsi->r2tq_info.pgtbl[1];
1653         ictx->ustorm_st_context.ring.cq_pbl_base.lo =
1654                 req1->cq_page_table_addr_lo;
1655         ictx->ustorm_st_context.ring.cq_pbl_base.hi =
1656                 req1->cq_page_table_addr_hi;
1657         ictx->ustorm_st_context.ring.cq[0].cq_sn = ISCSI_INITIAL_SN;
1658         ictx->ustorm_st_context.ring.cq[0].curr_pbe.lo = req2->cq_first_pte.hi;
1659         ictx->ustorm_st_context.ring.cq[0].curr_pbe.hi = req2->cq_first_pte.lo;
1660         ictx->ustorm_st_context.task_pbe_cache_index =
1661                 BNX2X_ISCSI_PBL_NOT_CACHED;
1662         ictx->ustorm_st_context.task_pdu_cache_index =
1663                 BNX2X_ISCSI_PDU_HEADER_NOT_CACHED;
1664
1665         for (i = 1, j = 1; i < cp->num_cqs; i++, j++) {
1666                 if (j == 3) {
1667                         if (n >= n_max)
1668                                 break;
1669                         req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1670                         j = 0;
1671                 }
1672                 ictx->ustorm_st_context.ring.cq[i].cq_sn = ISCSI_INITIAL_SN;
1673                 ictx->ustorm_st_context.ring.cq[i].curr_pbe.lo =
1674                         req3->qp_first_pte[j].hi;
1675                 ictx->ustorm_st_context.ring.cq[i].curr_pbe.hi =
1676                         req3->qp_first_pte[j].lo;
1677         }
1678
1679         ictx->ustorm_st_context.task_pbl_base.lo =
1680                 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1681         ictx->ustorm_st_context.task_pbl_base.hi =
1682                 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1683         ictx->ustorm_st_context.tce_phy_addr.lo =
1684                 iscsi->task_array_info.pgtbl[0];
1685         ictx->ustorm_st_context.tce_phy_addr.hi =
1686                 iscsi->task_array_info.pgtbl[1];
1687         ictx->ustorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1688         ictx->ustorm_st_context.num_cqs = cp->num_cqs;
1689         ictx->ustorm_st_context.negotiated_rx |= ISCSI_DEF_MAX_RECV_SEG_LEN;
1690         ictx->ustorm_st_context.negotiated_rx_and_flags |=
1691                 ISCSI_DEF_MAX_BURST_LEN;
1692         ictx->ustorm_st_context.negotiated_rx |=
1693                 ISCSI_DEFAULT_MAX_OUTSTANDING_R2T <<
1694                 USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS_SHIFT;
1695
1696         ictx->cstorm_st_context.hq_pbl_base.lo =
1697                 iscsi->hq_info.pgtbl_map & 0xffffffff;
1698         ictx->cstorm_st_context.hq_pbl_base.hi =
1699                 (u64) iscsi->hq_info.pgtbl_map >> 32;
1700         ictx->cstorm_st_context.hq_curr_pbe.lo = iscsi->hq_info.pgtbl[0];
1701         ictx->cstorm_st_context.hq_curr_pbe.hi = iscsi->hq_info.pgtbl[1];
1702         ictx->cstorm_st_context.task_pbl_base.lo =
1703                 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1704         ictx->cstorm_st_context.task_pbl_base.hi =
1705                 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1706         /* CSTORM and USTORM initialization is different, CSTORM requires
1707          * CQ DB base & not PTE addr */
1708         ictx->cstorm_st_context.cq_db_base.lo =
1709                 req1->cq_page_table_addr_lo & PAGE_MASK;
1710         ictx->cstorm_st_context.cq_db_base.hi = req1->cq_page_table_addr_hi;
1711         ictx->cstorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1712         ictx->cstorm_st_context.cq_proc_en_bit_map = (1 << cp->num_cqs) - 1;
1713         for (i = 0; i < cp->num_cqs; i++) {
1714                 ictx->cstorm_st_context.cq_c_prod_sqn_arr.sqn[i] =
1715                         ISCSI_INITIAL_SN;
1716                 ictx->cstorm_st_context.cq_c_sqn_2_notify_arr.sqn[i] =
1717                         ISCSI_INITIAL_SN;
1718         }
1719
1720         ictx->xstorm_ag_context.cdu_reserved =
1721                 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_XCM_AG,
1722                                        ISCSI_CONNECTION_TYPE);
1723         ictx->ustorm_ag_context.cdu_usage =
1724                 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_UCM_AG,
1725                                        ISCSI_CONNECTION_TYPE);
1726         return 0;
1727
1728 }
1729
1730 static int cnic_bnx2x_iscsi_ofld1(struct cnic_dev *dev, struct kwqe *wqes[],
1731                                    u32 num, int *work)
1732 {
1733         struct iscsi_kwqe_conn_offload1 *req1;
1734         struct iscsi_kwqe_conn_offload2 *req2;
1735         struct cnic_local *cp = dev->cnic_priv;
1736         struct cnic_context *ctx;
1737         struct iscsi_kcqe kcqe;
1738         struct kcqe *cqes[1];
1739         u32 l5_cid;
1740         int ret = 0;
1741
1742         if (num < 2) {
1743                 *work = num;
1744                 return -EINVAL;
1745         }
1746
1747         req1 = (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1748         req2 = (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1749         if ((num - 2) < req2->num_additional_wqes) {
1750                 *work = num;
1751                 return -EINVAL;
1752         }
1753         *work = 2 + req2->num_additional_wqes;
1754
1755         l5_cid = req1->iscsi_conn_id;
1756         if (l5_cid >= MAX_ISCSI_TBL_SZ)
1757                 return -EINVAL;
1758
1759         memset(&kcqe, 0, sizeof(kcqe));
1760         kcqe.op_code = ISCSI_KCQE_OPCODE_OFFLOAD_CONN;
1761         kcqe.iscsi_conn_id = l5_cid;
1762         kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE;
1763
1764         ctx = &cp->ctx_tbl[l5_cid];
1765         if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags)) {
1766                 kcqe.completion_status =
1767                         ISCSI_KCQE_COMPLETION_STATUS_CID_BUSY;
1768                 goto done;
1769         }
1770
1771         if (atomic_inc_return(&cp->iscsi_conn) > dev->max_iscsi_conn) {
1772                 atomic_dec(&cp->iscsi_conn);
1773                 goto done;
1774         }
1775         ret = cnic_alloc_bnx2x_conn_resc(dev, l5_cid);
1776         if (ret) {
1777                 atomic_dec(&cp->iscsi_conn);
1778                 ret = 0;
1779                 goto done;
1780         }
1781         ret = cnic_setup_bnx2x_ctx(dev, wqes, num);
1782         if (ret < 0) {
1783                 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1784                 atomic_dec(&cp->iscsi_conn);
1785                 goto done;
1786         }
1787
1788         kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1789         kcqe.iscsi_conn_context_id = BNX2X_HW_CID(cp, cp->ctx_tbl[l5_cid].cid);
1790
1791 done:
1792         cqes[0] = (struct kcqe *) &kcqe;
1793         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1794         return ret;
1795 }
1796
1797
1798 static int cnic_bnx2x_iscsi_update(struct cnic_dev *dev, struct kwqe *kwqe)
1799 {
1800         struct cnic_local *cp = dev->cnic_priv;
1801         struct iscsi_kwqe_conn_update *req =
1802                 (struct iscsi_kwqe_conn_update *) kwqe;
1803         void *data;
1804         union l5cm_specific_data l5_data;
1805         u32 l5_cid, cid = BNX2X_SW_CID(req->context_id);
1806         int ret;
1807
1808         if (cnic_get_l5_cid(cp, cid, &l5_cid) != 0)
1809                 return -EINVAL;
1810
1811         data = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
1812         if (!data)
1813                 return -ENOMEM;
1814
1815         memcpy(data, kwqe, sizeof(struct kwqe));
1816
1817         ret = cnic_submit_kwqe_16(dev, ISCSI_RAMROD_CMD_ID_UPDATE_CONN,
1818                         req->context_id, ISCSI_CONNECTION_TYPE, &l5_data);
1819         return ret;
1820 }
1821
1822 static int cnic_bnx2x_destroy_ramrod(struct cnic_dev *dev, u32 l5_cid)
1823 {
1824         struct cnic_local *cp = dev->cnic_priv;
1825         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1826         union l5cm_specific_data l5_data;
1827         int ret;
1828         u32 hw_cid;
1829
1830         init_waitqueue_head(&ctx->waitq);
1831         ctx->wait_cond = 0;
1832         memset(&l5_data, 0, sizeof(l5_data));
1833         hw_cid = BNX2X_HW_CID(cp, ctx->cid);
1834
1835         ret = cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_COMMON_CFC_DEL,
1836                                   hw_cid, NONE_CONNECTION_TYPE, &l5_data);
1837
1838         if (ret == 0)
1839                 wait_event(ctx->waitq, ctx->wait_cond);
1840
1841         return ret;
1842 }
1843
1844 static int cnic_bnx2x_iscsi_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
1845 {
1846         struct cnic_local *cp = dev->cnic_priv;
1847         struct iscsi_kwqe_conn_destroy *req =
1848                 (struct iscsi_kwqe_conn_destroy *) kwqe;
1849         u32 l5_cid = req->reserved0;
1850         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1851         int ret = 0;
1852         struct iscsi_kcqe kcqe;
1853         struct kcqe *cqes[1];
1854
1855         if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
1856                 goto skip_cfc_delete;
1857
1858         if (!time_after(jiffies, ctx->timestamp + (2 * HZ))) {
1859                 unsigned long delta = ctx->timestamp + (2 * HZ) - jiffies;
1860
1861                 if (delta > (2 * HZ))
1862                         delta = 0;
1863
1864                 set_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags);
1865                 queue_delayed_work(cnic_wq, &cp->delete_task, delta);
1866                 goto destroy_reply;
1867         }
1868
1869         ret = cnic_bnx2x_destroy_ramrod(dev, l5_cid);
1870
1871 skip_cfc_delete:
1872         cnic_free_bnx2x_conn_resc(dev, l5_cid);
1873
1874         atomic_dec(&cp->iscsi_conn);
1875         clear_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
1876
1877 destroy_reply:
1878         memset(&kcqe, 0, sizeof(kcqe));
1879         kcqe.op_code = ISCSI_KCQE_OPCODE_DESTROY_CONN;
1880         kcqe.iscsi_conn_id = l5_cid;
1881         kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1882         kcqe.iscsi_conn_context_id = req->context_id;
1883
1884         cqes[0] = (struct kcqe *) &kcqe;
1885         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1886
1887         return ret;
1888 }
1889
1890 static void cnic_init_storm_conn_bufs(struct cnic_dev *dev,
1891                                       struct l4_kwq_connect_req1 *kwqe1,
1892                                       struct l4_kwq_connect_req3 *kwqe3,
1893                                       struct l5cm_active_conn_buffer *conn_buf)
1894 {
1895         struct l5cm_conn_addr_params *conn_addr = &conn_buf->conn_addr_buf;
1896         struct l5cm_xstorm_conn_buffer *xstorm_buf =
1897                 &conn_buf->xstorm_conn_buffer;
1898         struct l5cm_tstorm_conn_buffer *tstorm_buf =
1899                 &conn_buf->tstorm_conn_buffer;
1900         struct regpair context_addr;
1901         u32 cid = BNX2X_SW_CID(kwqe1->cid);
1902         struct in6_addr src_ip, dst_ip;
1903         int i;
1904         u32 *addrp;
1905
1906         addrp = (u32 *) &conn_addr->local_ip_addr;
1907         for (i = 0; i < 4; i++, addrp++)
1908                 src_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
1909
1910         addrp = (u32 *) &conn_addr->remote_ip_addr;
1911         for (i = 0; i < 4; i++, addrp++)
1912                 dst_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
1913
1914         cnic_get_bnx2x_ctx(dev, cid, 0, &context_addr);
1915
1916         xstorm_buf->context_addr.hi = context_addr.hi;
1917         xstorm_buf->context_addr.lo = context_addr.lo;
1918         xstorm_buf->mss = 0xffff;
1919         xstorm_buf->rcv_buf = kwqe3->rcv_buf;
1920         if (kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE)
1921                 xstorm_buf->params |= L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE;
1922         xstorm_buf->pseudo_header_checksum =
1923                 swab16(~csum_ipv6_magic(&src_ip, &dst_ip, 0, IPPROTO_TCP, 0));
1924
1925         if (!(kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK))
1926                 tstorm_buf->params |=
1927                         L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE;
1928         if (kwqe3->ka_timeout) {
1929                 tstorm_buf->ka_enable = 1;
1930                 tstorm_buf->ka_timeout = kwqe3->ka_timeout;
1931                 tstorm_buf->ka_interval = kwqe3->ka_interval;
1932                 tstorm_buf->ka_max_probe_count = kwqe3->ka_max_probe_count;
1933         }
1934         tstorm_buf->rcv_buf = kwqe3->rcv_buf;
1935         tstorm_buf->snd_buf = kwqe3->snd_buf;
1936         tstorm_buf->max_rt_time = 0xffffffff;
1937 }
1938
1939 static void cnic_init_bnx2x_mac(struct cnic_dev *dev)
1940 {
1941         struct cnic_local *cp = dev->cnic_priv;
1942         u32 pfid = cp->pfid;
1943         u8 *mac = dev->mac_addr;
1944
1945         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1946                  XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfid), mac[0]);
1947         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1948                  XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfid), mac[1]);
1949         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1950                  XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfid), mac[2]);
1951         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1952                  XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfid), mac[3]);
1953         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1954                  XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfid), mac[4]);
1955         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1956                  XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfid), mac[5]);
1957
1958         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1959                  TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfid), mac[5]);
1960         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1961                  TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 1,
1962                  mac[4]);
1963         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1964                  TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid), mac[3]);
1965         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1966                  TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 1,
1967                  mac[2]);
1968         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1969                  TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 2,
1970                  mac[1]);
1971         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1972                  TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 3,
1973                  mac[0]);
1974 }
1975
1976 static void cnic_bnx2x_set_tcp_timestamp(struct cnic_dev *dev, int tcp_ts)
1977 {
1978         struct cnic_local *cp = dev->cnic_priv;
1979         u8 xstorm_flags = XSTORM_L5CM_TCP_FLAGS_WND_SCL_EN;
1980         u16 tstorm_flags = 0;
1981
1982         if (tcp_ts) {
1983                 xstorm_flags |= XSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
1984                 tstorm_flags |= TSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
1985         }
1986
1987         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1988                  XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->pfid), xstorm_flags);
1989
1990         CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1991                   TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->pfid), tstorm_flags);
1992 }
1993
1994 static int cnic_bnx2x_connect(struct cnic_dev *dev, struct kwqe *wqes[],
1995                               u32 num, int *work)
1996 {
1997         struct cnic_local *cp = dev->cnic_priv;
1998         struct l4_kwq_connect_req1 *kwqe1 =
1999                 (struct l4_kwq_connect_req1 *) wqes[0];
2000         struct l4_kwq_connect_req3 *kwqe3;
2001         struct l5cm_active_conn_buffer *conn_buf;
2002         struct l5cm_conn_addr_params *conn_addr;
2003         union l5cm_specific_data l5_data;
2004         u32 l5_cid = kwqe1->pg_cid;
2005         struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
2006         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
2007         int ret;
2008
2009         if (num < 2) {
2010                 *work = num;
2011                 return -EINVAL;
2012         }
2013
2014         if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6)
2015                 *work = 3;
2016         else
2017                 *work = 2;
2018
2019         if (num < *work) {
2020                 *work = num;
2021                 return -EINVAL;
2022         }
2023
2024         if (sizeof(*conn_buf) > CNIC_KWQ16_DATA_SIZE) {
2025                 netdev_err(dev->netdev, "conn_buf size too big\n");
2026                 return -ENOMEM;
2027         }
2028         conn_buf = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2029         if (!conn_buf)
2030                 return -ENOMEM;
2031
2032         memset(conn_buf, 0, sizeof(*conn_buf));
2033
2034         conn_addr = &conn_buf->conn_addr_buf;
2035         conn_addr->remote_addr_0 = csk->ha[0];
2036         conn_addr->remote_addr_1 = csk->ha[1];
2037         conn_addr->remote_addr_2 = csk->ha[2];
2038         conn_addr->remote_addr_3 = csk->ha[3];
2039         conn_addr->remote_addr_4 = csk->ha[4];
2040         conn_addr->remote_addr_5 = csk->ha[5];
2041
2042         if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6) {
2043                 struct l4_kwq_connect_req2 *kwqe2 =
2044                         (struct l4_kwq_connect_req2 *) wqes[1];
2045
2046                 conn_addr->local_ip_addr.ip_addr_hi_hi = kwqe2->src_ip_v6_4;
2047                 conn_addr->local_ip_addr.ip_addr_hi_lo = kwqe2->src_ip_v6_3;
2048                 conn_addr->local_ip_addr.ip_addr_lo_hi = kwqe2->src_ip_v6_2;
2049
2050                 conn_addr->remote_ip_addr.ip_addr_hi_hi = kwqe2->dst_ip_v6_4;
2051                 conn_addr->remote_ip_addr.ip_addr_hi_lo = kwqe2->dst_ip_v6_3;
2052                 conn_addr->remote_ip_addr.ip_addr_lo_hi = kwqe2->dst_ip_v6_2;
2053                 conn_addr->params |= L5CM_CONN_ADDR_PARAMS_IP_VERSION;
2054         }
2055         kwqe3 = (struct l4_kwq_connect_req3 *) wqes[*work - 1];
2056
2057         conn_addr->local_ip_addr.ip_addr_lo_lo = kwqe1->src_ip;
2058         conn_addr->remote_ip_addr.ip_addr_lo_lo = kwqe1->dst_ip;
2059         conn_addr->local_tcp_port = kwqe1->src_port;
2060         conn_addr->remote_tcp_port = kwqe1->dst_port;
2061
2062         conn_addr->pmtu = kwqe3->pmtu;
2063         cnic_init_storm_conn_bufs(dev, kwqe1, kwqe3, conn_buf);
2064
2065         CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
2066                   XSTORM_ISCSI_LOCAL_VLAN_OFFSET(cp->pfid), csk->vlan_id);
2067
2068         cnic_bnx2x_set_tcp_timestamp(dev,
2069                 kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_TIME_STAMP);
2070
2071         ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_TCP_CONNECT,
2072                         kwqe1->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2073         if (!ret)
2074                 set_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
2075
2076         return ret;
2077 }
2078
2079 static int cnic_bnx2x_close(struct cnic_dev *dev, struct kwqe *kwqe)
2080 {
2081         struct l4_kwq_close_req *req = (struct l4_kwq_close_req *) kwqe;
2082         union l5cm_specific_data l5_data;
2083         int ret;
2084
2085         memset(&l5_data, 0, sizeof(l5_data));
2086         ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_CLOSE,
2087                         req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2088         return ret;
2089 }
2090
2091 static int cnic_bnx2x_reset(struct cnic_dev *dev, struct kwqe *kwqe)
2092 {
2093         struct l4_kwq_reset_req *req = (struct l4_kwq_reset_req *) kwqe;
2094         union l5cm_specific_data l5_data;
2095         int ret;
2096
2097         memset(&l5_data, 0, sizeof(l5_data));
2098         ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_ABORT,
2099                         req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2100         return ret;
2101 }
2102 static int cnic_bnx2x_offload_pg(struct cnic_dev *dev, struct kwqe *kwqe)
2103 {
2104         struct l4_kwq_offload_pg *req = (struct l4_kwq_offload_pg *) kwqe;
2105         struct l4_kcq kcqe;
2106         struct kcqe *cqes[1];
2107
2108         memset(&kcqe, 0, sizeof(kcqe));
2109         kcqe.pg_host_opaque = req->host_opaque;
2110         kcqe.pg_cid = req->host_opaque;
2111         kcqe.op_code = L4_KCQE_OPCODE_VALUE_OFFLOAD_PG;
2112         cqes[0] = (struct kcqe *) &kcqe;
2113         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
2114         return 0;
2115 }
2116
2117 static int cnic_bnx2x_update_pg(struct cnic_dev *dev, struct kwqe *kwqe)
2118 {
2119         struct l4_kwq_update_pg *req = (struct l4_kwq_update_pg *) kwqe;
2120         struct l4_kcq kcqe;
2121         struct kcqe *cqes[1];
2122
2123         memset(&kcqe, 0, sizeof(kcqe));
2124         kcqe.pg_host_opaque = req->pg_host_opaque;
2125         kcqe.pg_cid = req->pg_cid;
2126         kcqe.op_code = L4_KCQE_OPCODE_VALUE_UPDATE_PG;
2127         cqes[0] = (struct kcqe *) &kcqe;
2128         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
2129         return 0;
2130 }
2131
2132 static int cnic_bnx2x_fcoe_stat(struct cnic_dev *dev, struct kwqe *kwqe)
2133 {
2134         struct fcoe_kwqe_stat *req;
2135         struct fcoe_stat_ramrod_params *fcoe_stat;
2136         union l5cm_specific_data l5_data;
2137         struct cnic_local *cp = dev->cnic_priv;
2138         int ret;
2139         u32 cid;
2140
2141         req = (struct fcoe_kwqe_stat *) kwqe;
2142         cid = BNX2X_HW_CID(cp, cp->fcoe_init_cid);
2143
2144         fcoe_stat = cnic_get_kwqe_16_data(cp, BNX2X_FCOE_L5_CID_BASE, &l5_data);
2145         if (!fcoe_stat)
2146                 return -ENOMEM;
2147
2148         memset(fcoe_stat, 0, sizeof(*fcoe_stat));
2149         memcpy(&fcoe_stat->stat_kwqe, req, sizeof(*req));
2150
2151         ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_STAT, cid,
2152                                   FCOE_CONNECTION_TYPE, &l5_data);
2153         return ret;
2154 }
2155
2156 static int cnic_bnx2x_fcoe_init1(struct cnic_dev *dev, struct kwqe *wqes[],
2157                                  u32 num, int *work)
2158 {
2159         int ret;
2160         struct cnic_local *cp = dev->cnic_priv;
2161         u32 cid;
2162         struct fcoe_init_ramrod_params *fcoe_init;
2163         struct fcoe_kwqe_init1 *req1;
2164         struct fcoe_kwqe_init2 *req2;
2165         struct fcoe_kwqe_init3 *req3;
2166         union l5cm_specific_data l5_data;
2167
2168         if (num < 3) {
2169                 *work = num;
2170                 return -EINVAL;
2171         }
2172         req1 = (struct fcoe_kwqe_init1 *) wqes[0];
2173         req2 = (struct fcoe_kwqe_init2 *) wqes[1];
2174         req3 = (struct fcoe_kwqe_init3 *) wqes[2];
2175         if (req2->hdr.op_code != FCOE_KWQE_OPCODE_INIT2) {
2176                 *work = 1;
2177                 return -EINVAL;
2178         }
2179         if (req3->hdr.op_code != FCOE_KWQE_OPCODE_INIT3) {
2180                 *work = 2;
2181                 return -EINVAL;
2182         }
2183
2184         if (sizeof(*fcoe_init) > CNIC_KWQ16_DATA_SIZE) {
2185                 netdev_err(dev->netdev, "fcoe_init size too big\n");
2186                 return -ENOMEM;
2187         }
2188         fcoe_init = cnic_get_kwqe_16_data(cp, BNX2X_FCOE_L5_CID_BASE, &l5_data);
2189         if (!fcoe_init)
2190                 return -ENOMEM;
2191
2192         memset(fcoe_init, 0, sizeof(*fcoe_init));
2193         memcpy(&fcoe_init->init_kwqe1, req1, sizeof(*req1));
2194         memcpy(&fcoe_init->init_kwqe2, req2, sizeof(*req2));
2195         memcpy(&fcoe_init->init_kwqe3, req3, sizeof(*req3));
2196         fcoe_init->eq_addr.lo = cp->kcq2.dma.pg_map_arr[0] & 0xffffffff;
2197         fcoe_init->eq_addr.hi = (u64) cp->kcq2.dma.pg_map_arr[0] >> 32;
2198         fcoe_init->eq_next_page_addr.lo =
2199                 cp->kcq2.dma.pg_map_arr[1] & 0xffffffff;
2200         fcoe_init->eq_next_page_addr.hi =
2201                 (u64) cp->kcq2.dma.pg_map_arr[1] >> 32;
2202
2203         fcoe_init->sb_num = cp->status_blk_num;
2204         fcoe_init->eq_prod = MAX_KCQ_IDX;
2205         fcoe_init->sb_id = HC_INDEX_FCOE_EQ_CONS;
2206         cp->kcq2.sw_prod_idx = 0;
2207
2208         cid = BNX2X_HW_CID(cp, cp->fcoe_init_cid);
2209         ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_INIT, cid,
2210                                   FCOE_CONNECTION_TYPE, &l5_data);
2211         *work = 3;
2212         return ret;
2213 }
2214
2215 static int cnic_bnx2x_fcoe_ofld1(struct cnic_dev *dev, struct kwqe *wqes[],
2216                                  u32 num, int *work)
2217 {
2218         int ret = 0;
2219         u32 cid = -1, l5_cid;
2220         struct cnic_local *cp = dev->cnic_priv;
2221         struct fcoe_kwqe_conn_offload1 *req1;
2222         struct fcoe_kwqe_conn_offload2 *req2;
2223         struct fcoe_kwqe_conn_offload3 *req3;
2224         struct fcoe_kwqe_conn_offload4 *req4;
2225         struct fcoe_conn_offload_ramrod_params *fcoe_offload;
2226         struct cnic_context *ctx;
2227         struct fcoe_context *fctx;
2228         struct regpair ctx_addr;
2229         union l5cm_specific_data l5_data;
2230         struct fcoe_kcqe kcqe;
2231         struct kcqe *cqes[1];
2232
2233         if (num < 4) {
2234                 *work = num;
2235                 return -EINVAL;
2236         }
2237         req1 = (struct fcoe_kwqe_conn_offload1 *) wqes[0];
2238         req2 = (struct fcoe_kwqe_conn_offload2 *) wqes[1];
2239         req3 = (struct fcoe_kwqe_conn_offload3 *) wqes[2];
2240         req4 = (struct fcoe_kwqe_conn_offload4 *) wqes[3];
2241
2242         *work = 4;
2243
2244         l5_cid = req1->fcoe_conn_id;
2245         if (l5_cid >= BNX2X_FCOE_NUM_CONNECTIONS)
2246                 goto err_reply;
2247
2248         l5_cid += BNX2X_FCOE_L5_CID_BASE;
2249
2250         ctx = &cp->ctx_tbl[l5_cid];
2251         if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
2252                 goto err_reply;
2253
2254         ret = cnic_alloc_bnx2x_conn_resc(dev, l5_cid);
2255         if (ret) {
2256                 ret = 0;
2257                 goto err_reply;
2258         }
2259         cid = ctx->cid;
2260
2261         fctx = cnic_get_bnx2x_ctx(dev, cid, 1, &ctx_addr);
2262         if (fctx) {
2263                 u32 hw_cid = BNX2X_HW_CID(cp, cid);
2264                 u32 val;
2265
2266                 val = CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_XCM_AG,
2267                                              FCOE_CONNECTION_TYPE);
2268                 fctx->xstorm_ag_context.cdu_reserved = val;
2269                 val = CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_UCM_AG,
2270                                              FCOE_CONNECTION_TYPE);
2271                 fctx->ustorm_ag_context.cdu_usage = val;
2272         }
2273         if (sizeof(*fcoe_offload) > CNIC_KWQ16_DATA_SIZE) {
2274                 netdev_err(dev->netdev, "fcoe_offload size too big\n");
2275                 goto err_reply;
2276         }
2277         fcoe_offload = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2278         if (!fcoe_offload)
2279                 goto err_reply;
2280
2281         memset(fcoe_offload, 0, sizeof(*fcoe_offload));
2282         memcpy(&fcoe_offload->offload_kwqe1, req1, sizeof(*req1));
2283         memcpy(&fcoe_offload->offload_kwqe2, req2, sizeof(*req2));
2284         memcpy(&fcoe_offload->offload_kwqe3, req3, sizeof(*req3));
2285         memcpy(&fcoe_offload->offload_kwqe4, req4, sizeof(*req4));
2286
2287         cid = BNX2X_HW_CID(cp, cid);
2288         ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_OFFLOAD_CONN, cid,
2289                                   FCOE_CONNECTION_TYPE, &l5_data);
2290         if (!ret)
2291                 set_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
2292
2293         return ret;
2294
2295 err_reply:
2296         if (cid != -1)
2297                 cnic_free_bnx2x_conn_resc(dev, l5_cid);
2298
2299         memset(&kcqe, 0, sizeof(kcqe));
2300         kcqe.op_code = FCOE_KCQE_OPCODE_OFFLOAD_CONN;
2301         kcqe.fcoe_conn_id = req1->fcoe_conn_id;
2302         kcqe.completion_status = FCOE_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE;
2303
2304         cqes[0] = (struct kcqe *) &kcqe;
2305         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_FCOE, cqes, 1);
2306         return ret;
2307 }
2308
2309 static int cnic_bnx2x_fcoe_enable(struct cnic_dev *dev, struct kwqe *kwqe)
2310 {
2311         struct fcoe_kwqe_conn_enable_disable *req;
2312         struct fcoe_conn_enable_disable_ramrod_params *fcoe_enable;
2313         union l5cm_specific_data l5_data;
2314         int ret;
2315         u32 cid, l5_cid;
2316         struct cnic_local *cp = dev->cnic_priv;
2317
2318         req = (struct fcoe_kwqe_conn_enable_disable *) kwqe;
2319         cid = req->context_id;
2320         l5_cid = req->conn_id + BNX2X_FCOE_L5_CID_BASE;
2321
2322         if (sizeof(*fcoe_enable) > CNIC_KWQ16_DATA_SIZE) {
2323                 netdev_err(dev->netdev, "fcoe_enable size too big\n");
2324                 return -ENOMEM;
2325         }
2326         fcoe_enable = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2327         if (!fcoe_enable)
2328                 return -ENOMEM;
2329
2330         memset(fcoe_enable, 0, sizeof(*fcoe_enable));
2331         memcpy(&fcoe_enable->enable_disable_kwqe, req, sizeof(*req));
2332         ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_ENABLE_CONN, cid,
2333                                   FCOE_CONNECTION_TYPE, &l5_data);
2334         return ret;
2335 }
2336
2337 static int cnic_bnx2x_fcoe_disable(struct cnic_dev *dev, struct kwqe *kwqe)
2338 {
2339         struct fcoe_kwqe_conn_enable_disable *req;
2340         struct fcoe_conn_enable_disable_ramrod_params *fcoe_disable;
2341         union l5cm_specific_data l5_data;
2342         int ret;
2343         u32 cid, l5_cid;
2344         struct cnic_local *cp = dev->cnic_priv;
2345
2346         req = (struct fcoe_kwqe_conn_enable_disable *) kwqe;
2347         cid = req->context_id;
2348         l5_cid = req->conn_id;
2349         if (l5_cid >= BNX2X_FCOE_NUM_CONNECTIONS)
2350                 return -EINVAL;
2351
2352         l5_cid += BNX2X_FCOE_L5_CID_BASE;
2353
2354         if (sizeof(*fcoe_disable) > CNIC_KWQ16_DATA_SIZE) {
2355                 netdev_err(dev->netdev, "fcoe_disable size too big\n");
2356                 return -ENOMEM;
2357         }
2358         fcoe_disable = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2359         if (!fcoe_disable)
2360                 return -ENOMEM;
2361
2362         memset(fcoe_disable, 0, sizeof(*fcoe_disable));
2363         memcpy(&fcoe_disable->enable_disable_kwqe, req, sizeof(*req));
2364         ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_DISABLE_CONN, cid,
2365                                   FCOE_CONNECTION_TYPE, &l5_data);
2366         return ret;
2367 }
2368
2369 static int cnic_bnx2x_fcoe_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
2370 {
2371         struct fcoe_kwqe_conn_destroy *req;
2372         union l5cm_specific_data l5_data;
2373         int ret;
2374         u32 cid, l5_cid;
2375         struct cnic_local *cp = dev->cnic_priv;
2376         struct cnic_context *ctx;
2377         struct fcoe_kcqe kcqe;
2378         struct kcqe *cqes[1];
2379
2380         req = (struct fcoe_kwqe_conn_destroy *) kwqe;
2381         cid = req->context_id;
2382         l5_cid = req->conn_id;
2383         if (l5_cid >= BNX2X_FCOE_NUM_CONNECTIONS)
2384                 return -EINVAL;
2385
2386         l5_cid += BNX2X_FCOE_L5_CID_BASE;
2387
2388         ctx = &cp->ctx_tbl[l5_cid];
2389
2390         init_waitqueue_head(&ctx->waitq);
2391         ctx->wait_cond = 0;
2392
2393         memset(&l5_data, 0, sizeof(l5_data));
2394         ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_TERMINATE_CONN, cid,
2395                                   FCOE_CONNECTION_TYPE, &l5_data);
2396         if (ret == 0) {
2397                 wait_event(ctx->waitq, ctx->wait_cond);
2398                 set_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags);
2399                 queue_delayed_work(cnic_wq, &cp->delete_task,
2400                                    msecs_to_jiffies(2000));
2401         }
2402
2403         memset(&kcqe, 0, sizeof(kcqe));
2404         kcqe.op_code = FCOE_KCQE_OPCODE_DESTROY_CONN;
2405         kcqe.fcoe_conn_id = req->conn_id;
2406         kcqe.fcoe_conn_context_id = cid;
2407
2408         cqes[0] = (struct kcqe *) &kcqe;
2409         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_FCOE, cqes, 1);
2410         return ret;
2411 }
2412
2413 static int cnic_bnx2x_fcoe_fw_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
2414 {
2415         struct fcoe_kwqe_destroy *req;
2416         union l5cm_specific_data l5_data;
2417         struct cnic_local *cp = dev->cnic_priv;
2418         int ret;
2419         u32 cid;
2420
2421         req = (struct fcoe_kwqe_destroy *) kwqe;
2422         cid = BNX2X_HW_CID(cp, cp->fcoe_init_cid);
2423
2424         memset(&l5_data, 0, sizeof(l5_data));
2425         ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_DESTROY, cid,
2426                                   FCOE_CONNECTION_TYPE, &l5_data);
2427         return ret;
2428 }
2429
2430 static int cnic_submit_bnx2x_iscsi_kwqes(struct cnic_dev *dev,
2431                                          struct kwqe *wqes[], u32 num_wqes)
2432 {
2433         int i, work, ret;
2434         u32 opcode;
2435         struct kwqe *kwqe;
2436
2437         if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2438                 return -EAGAIN;         /* bnx2 is down */
2439
2440         for (i = 0; i < num_wqes; ) {
2441                 kwqe = wqes[i];
2442                 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
2443                 work = 1;
2444
2445                 switch (opcode) {
2446                 case ISCSI_KWQE_OPCODE_INIT1:
2447                         ret = cnic_bnx2x_iscsi_init1(dev, kwqe);
2448                         break;
2449                 case ISCSI_KWQE_OPCODE_INIT2:
2450                         ret = cnic_bnx2x_iscsi_init2(dev, kwqe);
2451                         break;
2452                 case ISCSI_KWQE_OPCODE_OFFLOAD_CONN1:
2453                         ret = cnic_bnx2x_iscsi_ofld1(dev, &wqes[i],
2454                                                      num_wqes - i, &work);
2455                         break;
2456                 case ISCSI_KWQE_OPCODE_UPDATE_CONN:
2457                         ret = cnic_bnx2x_iscsi_update(dev, kwqe);
2458                         break;
2459                 case ISCSI_KWQE_OPCODE_DESTROY_CONN:
2460                         ret = cnic_bnx2x_iscsi_destroy(dev, kwqe);
2461                         break;
2462                 case L4_KWQE_OPCODE_VALUE_CONNECT1:
2463                         ret = cnic_bnx2x_connect(dev, &wqes[i], num_wqes - i,
2464                                                  &work);
2465                         break;
2466                 case L4_KWQE_OPCODE_VALUE_CLOSE:
2467                         ret = cnic_bnx2x_close(dev, kwqe);
2468                         break;
2469                 case L4_KWQE_OPCODE_VALUE_RESET:
2470                         ret = cnic_bnx2x_reset(dev, kwqe);
2471                         break;
2472                 case L4_KWQE_OPCODE_VALUE_OFFLOAD_PG:
2473                         ret = cnic_bnx2x_offload_pg(dev, kwqe);
2474                         break;
2475                 case L4_KWQE_OPCODE_VALUE_UPDATE_PG:
2476                         ret = cnic_bnx2x_update_pg(dev, kwqe);
2477                         break;
2478                 case L4_KWQE_OPCODE_VALUE_UPLOAD_PG:
2479                         ret = 0;
2480                         break;
2481                 default:
2482                         ret = 0;
2483                         netdev_err(dev->netdev, "Unknown type of KWQE(0x%x)\n",
2484                                    opcode);
2485                         break;
2486                 }
2487                 if (ret < 0)
2488                         netdev_err(dev->netdev, "KWQE(0x%x) failed\n",
2489                                    opcode);
2490                 i += work;
2491         }
2492         return 0;
2493 }
2494
2495 static int cnic_submit_bnx2x_fcoe_kwqes(struct cnic_dev *dev,
2496                                         struct kwqe *wqes[], u32 num_wqes)
2497 {
2498         struct cnic_local *cp = dev->cnic_priv;
2499         int i, work, ret;
2500         u32 opcode;
2501         struct kwqe *kwqe;
2502
2503         if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2504                 return -EAGAIN;         /* bnx2 is down */
2505
2506         if (BNX2X_CHIP_NUM(cp->chip_id) == BNX2X_CHIP_NUM_57710)
2507                 return -EINVAL;
2508
2509         for (i = 0; i < num_wqes; ) {
2510                 kwqe = wqes[i];
2511                 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
2512                 work = 1;
2513
2514                 switch (opcode) {
2515                 case FCOE_KWQE_OPCODE_INIT1:
2516                         ret = cnic_bnx2x_fcoe_init1(dev, &wqes[i],
2517                                                     num_wqes - i, &work);
2518                         break;
2519                 case FCOE_KWQE_OPCODE_OFFLOAD_CONN1:
2520                         ret = cnic_bnx2x_fcoe_ofld1(dev, &wqes[i],
2521                                                     num_wqes - i, &work);
2522                         break;
2523                 case FCOE_KWQE_OPCODE_ENABLE_CONN:
2524                         ret = cnic_bnx2x_fcoe_enable(dev, kwqe);
2525                         break;
2526                 case FCOE_KWQE_OPCODE_DISABLE_CONN:
2527                         ret = cnic_bnx2x_fcoe_disable(dev, kwqe);
2528                         break;
2529                 case FCOE_KWQE_OPCODE_DESTROY_CONN:
2530                         ret = cnic_bnx2x_fcoe_destroy(dev, kwqe);
2531                         break;
2532                 case FCOE_KWQE_OPCODE_DESTROY:
2533                         ret = cnic_bnx2x_fcoe_fw_destroy(dev, kwqe);
2534                         break;
2535                 case FCOE_KWQE_OPCODE_STAT:
2536                         ret = cnic_bnx2x_fcoe_stat(dev, kwqe);
2537                         break;
2538                 default:
2539                         ret = 0;
2540                         netdev_err(dev->netdev, "Unknown type of KWQE(0x%x)\n",
2541                                    opcode);
2542                         break;
2543                 }
2544                 if (ret < 0)
2545                         netdev_err(dev->netdev, "KWQE(0x%x) failed\n",
2546                                    opcode);
2547                 i += work;
2548         }
2549         return 0;
2550 }
2551
2552 static int cnic_submit_bnx2x_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
2553                                    u32 num_wqes)
2554 {
2555         int ret = -EINVAL;
2556         u32 layer_code;
2557
2558         if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2559                 return -EAGAIN;         /* bnx2x is down */
2560
2561         if (!num_wqes)
2562                 return 0;
2563
2564         layer_code = wqes[0]->kwqe_op_flag & KWQE_LAYER_MASK;
2565         switch (layer_code) {
2566         case KWQE_FLAGS_LAYER_MASK_L5_ISCSI:
2567         case KWQE_FLAGS_LAYER_MASK_L4:
2568         case KWQE_FLAGS_LAYER_MASK_L2:
2569                 ret = cnic_submit_bnx2x_iscsi_kwqes(dev, wqes, num_wqes);
2570                 break;
2571
2572         case KWQE_FLAGS_LAYER_MASK_L5_FCOE:
2573                 ret = cnic_submit_bnx2x_fcoe_kwqes(dev, wqes, num_wqes);
2574                 break;
2575         }
2576         return ret;
2577 }
2578
2579 static inline u32 cnic_get_kcqe_layer_mask(u32 opflag)
2580 {
2581         if (unlikely(KCQE_OPCODE(opflag) == FCOE_RAMROD_CMD_ID_TERMINATE_CONN))
2582                 return KCQE_FLAGS_LAYER_MASK_L4;
2583
2584         return opflag & KCQE_FLAGS_LAYER_MASK;
2585 }
2586
2587 static void service_kcqes(struct cnic_dev *dev, int num_cqes)
2588 {
2589         struct cnic_local *cp = dev->cnic_priv;
2590         int i, j, comp = 0;
2591
2592         i = 0;
2593         j = 1;
2594         while (num_cqes) {
2595                 struct cnic_ulp_ops *ulp_ops;
2596                 int ulp_type;
2597                 u32 kcqe_op_flag = cp->completed_kcq[i]->kcqe_op_flag;
2598                 u32 kcqe_layer = cnic_get_kcqe_layer_mask(kcqe_op_flag);
2599
2600                 if (unlikely(kcqe_op_flag & KCQE_RAMROD_COMPLETION))
2601                         comp++;
2602
2603                 while (j < num_cqes) {
2604                         u32 next_op = cp->completed_kcq[i + j]->kcqe_op_flag;
2605
2606                         if (cnic_get_kcqe_layer_mask(next_op) != kcqe_layer)
2607                                 break;
2608
2609                         if (unlikely(next_op & KCQE_RAMROD_COMPLETION))
2610                                 comp++;
2611                         j++;
2612                 }
2613
2614                 if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_RDMA)
2615                         ulp_type = CNIC_ULP_RDMA;
2616                 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_ISCSI)
2617                         ulp_type = CNIC_ULP_ISCSI;
2618                 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_FCOE)
2619                         ulp_type = CNIC_ULP_FCOE;
2620                 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L4)
2621                         ulp_type = CNIC_ULP_L4;
2622                 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L2)
2623                         goto end;
2624                 else {
2625                         netdev_err(dev->netdev, "Unknown type of KCQE(0x%x)\n",
2626                                    kcqe_op_flag);
2627                         goto end;
2628                 }
2629
2630                 rcu_read_lock();
2631                 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
2632                 if (likely(ulp_ops)) {
2633                         ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
2634                                                   cp->completed_kcq + i, j);
2635                 }
2636                 rcu_read_unlock();
2637 end:
2638                 num_cqes -= j;
2639                 i += j;
2640                 j = 1;
2641         }
2642         if (unlikely(comp))
2643                 cnic_spq_completion(dev, DRV_CTL_RET_L5_SPQ_CREDIT_CMD, comp);
2644 }
2645
2646 static u16 cnic_bnx2_next_idx(u16 idx)
2647 {
2648         return idx + 1;
2649 }
2650
2651 static u16 cnic_bnx2_hw_idx(u16 idx)
2652 {
2653         return idx;
2654 }
2655
2656 static u16 cnic_bnx2x_next_idx(u16 idx)
2657 {
2658         idx++;
2659         if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
2660                 idx++;
2661
2662         return idx;
2663 }
2664
2665 static u16 cnic_bnx2x_hw_idx(u16 idx)
2666 {
2667         if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
2668                 idx++;
2669         return idx;
2670 }
2671
2672 static int cnic_get_kcqes(struct cnic_dev *dev, struct kcq_info *info)
2673 {
2674         struct cnic_local *cp = dev->cnic_priv;
2675         u16 i, ri, hw_prod, last;
2676         struct kcqe *kcqe;
2677         int kcqe_cnt = 0, last_cnt = 0;
2678
2679         i = ri = last = info->sw_prod_idx;
2680         ri &= MAX_KCQ_IDX;
2681         hw_prod = *info->hw_prod_idx_ptr;
2682         hw_prod = cp->hw_idx(hw_prod);
2683
2684         while ((i != hw_prod) && (kcqe_cnt < MAX_COMPLETED_KCQE)) {
2685                 kcqe = &info->kcq[KCQ_PG(ri)][KCQ_IDX(ri)];
2686                 cp->completed_kcq[kcqe_cnt++] = kcqe;
2687                 i = cp->next_idx(i);
2688                 ri = i & MAX_KCQ_IDX;
2689                 if (likely(!(kcqe->kcqe_op_flag & KCQE_FLAGS_NEXT))) {
2690                         last_cnt = kcqe_cnt;
2691                         last = i;
2692                 }
2693         }
2694
2695         info->sw_prod_idx = last;
2696         return last_cnt;
2697 }
2698
2699 static int cnic_l2_completion(struct cnic_local *cp)
2700 {
2701         u16 hw_cons, sw_cons;
2702         struct cnic_uio_dev *udev = cp->udev;
2703         union eth_rx_cqe *cqe, *cqe_ring = (union eth_rx_cqe *)
2704                                         (udev->l2_ring + (2 * BCM_PAGE_SIZE));
2705         u32 cmd;
2706         int comp = 0;
2707
2708         if (!test_bit(CNIC_F_BNX2X_CLASS, &cp->dev->flags))
2709                 return 0;
2710
2711         hw_cons = *cp->rx_cons_ptr;
2712         if ((hw_cons & BNX2X_MAX_RCQ_DESC_CNT) == BNX2X_MAX_RCQ_DESC_CNT)
2713                 hw_cons++;
2714
2715         sw_cons = cp->rx_cons;
2716         while (sw_cons != hw_cons) {
2717                 u8 cqe_fp_flags;
2718
2719                 cqe = &cqe_ring[sw_cons & BNX2X_MAX_RCQ_DESC_CNT];
2720                 cqe_fp_flags = cqe->fast_path_cqe.type_error_flags;
2721                 if (cqe_fp_flags & ETH_FAST_PATH_RX_CQE_TYPE) {
2722                         cmd = le32_to_cpu(cqe->ramrod_cqe.conn_and_cmd_data);
2723                         cmd >>= COMMON_RAMROD_ETH_RX_CQE_CMD_ID_SHIFT;
2724                         if (cmd == RAMROD_CMD_ID_ETH_CLIENT_SETUP ||
2725                             cmd == RAMROD_CMD_ID_ETH_HALT)
2726                                 comp++;
2727                 }
2728                 sw_cons = BNX2X_NEXT_RCQE(sw_cons);
2729         }
2730         return comp;
2731 }
2732
2733 static void cnic_chk_pkt_rings(struct cnic_local *cp)
2734 {
2735         u16 rx_cons, tx_cons;
2736         int comp = 0;
2737
2738         if (!test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
2739                 return;
2740
2741         rx_cons = *cp->rx_cons_ptr;
2742         tx_cons = *cp->tx_cons_ptr;
2743         if (cp->tx_cons != tx_cons || cp->rx_cons != rx_cons) {
2744                 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
2745                         comp = cnic_l2_completion(cp);
2746
2747                 cp->tx_cons = tx_cons;
2748                 cp->rx_cons = rx_cons;
2749
2750                 if (cp->udev)
2751                         uio_event_notify(&cp->udev->cnic_uinfo);
2752         }
2753         if (comp)
2754                 clear_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
2755 }
2756
2757 static u32 cnic_service_bnx2_queues(struct cnic_dev *dev)
2758 {
2759         struct cnic_local *cp = dev->cnic_priv;
2760         u32 status_idx = (u16) *cp->kcq1.status_idx_ptr;
2761         int kcqe_cnt;
2762
2763         /* status block index must be read before reading other fields */
2764         rmb();
2765         cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2766
2767         while ((kcqe_cnt = cnic_get_kcqes(dev, &cp->kcq1))) {
2768
2769                 service_kcqes(dev, kcqe_cnt);
2770
2771                 /* Tell compiler that status_blk fields can change. */
2772                 barrier();
2773                 if (status_idx != *cp->kcq1.status_idx_ptr) {
2774                         status_idx = (u16) *cp->kcq1.status_idx_ptr;
2775                         /* status block index must be read first */
2776                         rmb();
2777                         cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2778                 } else
2779                         break;
2780         }
2781
2782         CNIC_WR16(dev, cp->kcq1.io_addr, cp->kcq1.sw_prod_idx);
2783
2784         cnic_chk_pkt_rings(cp);
2785
2786         return status_idx;
2787 }
2788
2789 static int cnic_service_bnx2(void *data, void *status_blk)
2790 {
2791         struct cnic_dev *dev = data;
2792
2793         if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags))) {
2794                 struct status_block *sblk = status_blk;
2795
2796                 return sblk->status_idx;
2797         }
2798
2799         return cnic_service_bnx2_queues(dev);
2800 }
2801
2802 static void cnic_service_bnx2_msix(unsigned long data)
2803 {
2804         struct cnic_dev *dev = (struct cnic_dev *) data;
2805         struct cnic_local *cp = dev->cnic_priv;
2806
2807         cp->last_status_idx = cnic_service_bnx2_queues(dev);
2808
2809         CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
2810                 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
2811 }
2812
2813 static void cnic_doirq(struct cnic_dev *dev)
2814 {
2815         struct cnic_local *cp = dev->cnic_priv;
2816
2817         if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags))) {
2818                 u16 prod = cp->kcq1.sw_prod_idx & MAX_KCQ_IDX;
2819
2820                 prefetch(cp->status_blk.gen);
2821                 prefetch(&cp->kcq1.kcq[KCQ_PG(prod)][KCQ_IDX(prod)]);
2822
2823                 tasklet_schedule(&cp->cnic_irq_task);
2824         }
2825 }
2826
2827 static irqreturn_t cnic_irq(int irq, void *dev_instance)
2828 {
2829         struct cnic_dev *dev = dev_instance;
2830         struct cnic_local *cp = dev->cnic_priv;
2831
2832         if (cp->ack_int)
2833                 cp->ack_int(dev);
2834
2835         cnic_doirq(dev);
2836
2837         return IRQ_HANDLED;
2838 }
2839
2840 static inline void cnic_ack_bnx2x_int(struct cnic_dev *dev, u8 id, u8 storm,
2841                                       u16 index, u8 op, u8 update)
2842 {
2843         struct cnic_local *cp = dev->cnic_priv;
2844         u32 hc_addr = (HC_REG_COMMAND_REG + CNIC_PORT(cp) * 32 +
2845                        COMMAND_REG_INT_ACK);
2846         struct igu_ack_register igu_ack;
2847
2848         igu_ack.status_block_index = index;
2849         igu_ack.sb_id_and_flags =
2850                         ((id << IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT) |
2851                          (storm << IGU_ACK_REGISTER_STORM_ID_SHIFT) |
2852                          (update << IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT) |
2853                          (op << IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT));
2854
2855         CNIC_WR(dev, hc_addr, (*(u32 *)&igu_ack));
2856 }
2857
2858 static void cnic_ack_igu_sb(struct cnic_dev *dev, u8 igu_sb_id, u8 segment,
2859                             u16 index, u8 op, u8 update)
2860 {
2861         struct igu_regular cmd_data;
2862         u32 igu_addr = BAR_IGU_INTMEM + (IGU_CMD_INT_ACK_BASE + igu_sb_id) * 8;
2863
2864         cmd_data.sb_id_and_flags =
2865                 (index << IGU_REGULAR_SB_INDEX_SHIFT) |
2866                 (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |
2867                 (update << IGU_REGULAR_BUPDATE_SHIFT) |
2868                 (op << IGU_REGULAR_ENABLE_INT_SHIFT);
2869
2870
2871         CNIC_WR(dev, igu_addr, cmd_data.sb_id_and_flags);
2872 }
2873
2874 static void cnic_ack_bnx2x_msix(struct cnic_dev *dev)
2875 {
2876         struct cnic_local *cp = dev->cnic_priv;
2877
2878         cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, CSTORM_ID, 0,
2879                            IGU_INT_DISABLE, 0);
2880 }
2881
2882 static void cnic_ack_bnx2x_e2_msix(struct cnic_dev *dev)
2883 {
2884         struct cnic_local *cp = dev->cnic_priv;
2885
2886         cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF, 0,
2887                         IGU_INT_DISABLE, 0);
2888 }
2889
2890 static u32 cnic_service_bnx2x_kcq(struct cnic_dev *dev, struct kcq_info *info)
2891 {
2892         u32 last_status = *info->status_idx_ptr;
2893         int kcqe_cnt;
2894
2895         /* status block index must be read before reading the KCQ */
2896         rmb();
2897         while ((kcqe_cnt = cnic_get_kcqes(dev, info))) {
2898
2899                 service_kcqes(dev, kcqe_cnt);
2900
2901                 /* Tell compiler that sblk fields can change. */
2902                 barrier();
2903                 if (last_status == *info->status_idx_ptr)
2904                         break;
2905
2906                 last_status = *info->status_idx_ptr;
2907                 /* status block index must be read before reading the KCQ */
2908                 rmb();
2909         }
2910         return last_status;
2911 }
2912
2913 static void cnic_service_bnx2x_bh(unsigned long data)
2914 {
2915         struct cnic_dev *dev = (struct cnic_dev *) data;
2916         struct cnic_local *cp = dev->cnic_priv;
2917         u32 status_idx, new_status_idx;
2918
2919         if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
2920                 return;
2921
2922         while (1) {
2923                 status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq1);
2924
2925                 CNIC_WR16(dev, cp->kcq1.io_addr,
2926                           cp->kcq1.sw_prod_idx + MAX_KCQ_IDX);
2927
2928                 if (!BNX2X_CHIP_IS_E2(cp->chip_id)) {
2929                         cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, USTORM_ID,
2930                                            status_idx, IGU_INT_ENABLE, 1);
2931                         break;
2932                 }
2933
2934                 new_status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq2);
2935
2936                 if (new_status_idx != status_idx)
2937                         continue;
2938
2939                 CNIC_WR16(dev, cp->kcq2.io_addr, cp->kcq2.sw_prod_idx +
2940                           MAX_KCQ_IDX);
2941
2942                 cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF,
2943                                 status_idx, IGU_INT_ENABLE, 1);
2944
2945                 break;
2946         }
2947 }
2948
2949 static int cnic_service_bnx2x(void *data, void *status_blk)
2950 {
2951         struct cnic_dev *dev = data;
2952         struct cnic_local *cp = dev->cnic_priv;
2953
2954         if (!(cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
2955                 cnic_doirq(dev);
2956
2957         cnic_chk_pkt_rings(cp);
2958
2959         return 0;
2960 }
2961
2962 static void cnic_ulp_stop(struct cnic_dev *dev)
2963 {
2964         struct cnic_local *cp = dev->cnic_priv;
2965         int if_type;
2966
2967         cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
2968
2969         for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
2970                 struct cnic_ulp_ops *ulp_ops;
2971
2972                 mutex_lock(&cnic_lock);
2973                 ulp_ops = cp->ulp_ops[if_type];
2974                 if (!ulp_ops) {
2975                         mutex_unlock(&cnic_lock);
2976                         continue;
2977                 }
2978                 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
2979                 mutex_unlock(&cnic_lock);
2980
2981                 if (test_and_clear_bit(ULP_F_START, &cp->ulp_flags[if_type]))
2982                         ulp_ops->cnic_stop(cp->ulp_handle[if_type]);
2983
2984                 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
2985         }
2986 }
2987
2988 static void cnic_ulp_start(struct cnic_dev *dev)
2989 {
2990         struct cnic_local *cp = dev->cnic_priv;
2991         int if_type;
2992
2993         for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
2994                 struct cnic_ulp_ops *ulp_ops;
2995
2996                 mutex_lock(&cnic_lock);
2997                 ulp_ops = cp->ulp_ops[if_type];
2998                 if (!ulp_ops || !ulp_ops->cnic_start) {
2999                         mutex_unlock(&cnic_lock);
3000                         continue;
3001                 }
3002                 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3003                 mutex_unlock(&cnic_lock);
3004
3005                 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[if_type]))
3006                         ulp_ops->cnic_start(cp->ulp_handle[if_type]);
3007
3008                 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3009         }
3010 }
3011
3012 static int cnic_ctl(void *data, struct cnic_ctl_info *info)
3013 {
3014         struct cnic_dev *dev = data;
3015
3016         switch (info->cmd) {
3017         case CNIC_CTL_STOP_CMD:
3018                 cnic_hold(dev);
3019
3020                 cnic_ulp_stop(dev);
3021                 cnic_stop_hw(dev);
3022
3023                 cnic_put(dev);
3024                 break;
3025         case CNIC_CTL_START_CMD:
3026                 cnic_hold(dev);
3027
3028                 if (!cnic_start_hw(dev))
3029                         cnic_ulp_start(dev);
3030
3031                 cnic_put(dev);
3032                 break;
3033         case CNIC_CTL_COMPLETION_CMD: {
3034                 u32 cid = BNX2X_SW_CID(info->data.comp.cid);
3035                 u32 l5_cid;
3036                 struct cnic_local *cp = dev->cnic_priv;
3037
3038                 if (cnic_get_l5_cid(cp, cid, &l5_cid) == 0) {
3039                         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
3040
3041                         ctx->wait_cond = 1;
3042                         wake_up(&ctx->waitq);
3043                 }
3044                 break;
3045         }
3046         default:
3047                 return -EINVAL;
3048         }
3049         return 0;
3050 }
3051
3052 static void cnic_ulp_init(struct cnic_dev *dev)
3053 {
3054         int i;
3055         struct cnic_local *cp = dev->cnic_priv;
3056
3057         for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
3058                 struct cnic_ulp_ops *ulp_ops;
3059
3060                 mutex_lock(&cnic_lock);
3061                 ulp_ops = cnic_ulp_tbl[i];
3062                 if (!ulp_ops || !ulp_ops->cnic_init) {
3063                         mutex_unlock(&cnic_lock);
3064                         continue;
3065                 }
3066                 ulp_get(ulp_ops);
3067                 mutex_unlock(&cnic_lock);
3068
3069                 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[i]))
3070                         ulp_ops->cnic_init(dev);
3071
3072                 ulp_put(ulp_ops);
3073         }
3074 }
3075
3076 static void cnic_ulp_exit(struct cnic_dev *dev)
3077 {
3078         int i;
3079         struct cnic_local *cp = dev->cnic_priv;
3080
3081         for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
3082                 struct cnic_ulp_ops *ulp_ops;
3083
3084                 mutex_lock(&cnic_lock);
3085                 ulp_ops = cnic_ulp_tbl[i];
3086                 if (!ulp_ops || !ulp_ops->cnic_exit) {
3087                         mutex_unlock(&cnic_lock);
3088                         continue;
3089                 }
3090                 ulp_get(ulp_ops);
3091                 mutex_unlock(&cnic_lock);
3092
3093                 if (test_and_clear_bit(ULP_F_INIT, &cp->ulp_flags[i]))
3094                         ulp_ops->cnic_exit(dev);
3095
3096                 ulp_put(ulp_ops);
3097         }
3098 }
3099
3100 static int cnic_cm_offload_pg(struct cnic_sock *csk)
3101 {
3102         struct cnic_dev *dev = csk->dev;
3103         struct l4_kwq_offload_pg *l4kwqe;
3104         struct kwqe *wqes[1];
3105
3106         l4kwqe = (struct l4_kwq_offload_pg *) &csk->kwqe1;
3107         memset(l4kwqe, 0, sizeof(*l4kwqe));
3108         wqes[0] = (struct kwqe *) l4kwqe;
3109
3110         l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_OFFLOAD_PG;
3111         l4kwqe->flags =
3112                 L4_LAYER_CODE << L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT;
3113         l4kwqe->l2hdr_nbytes = ETH_HLEN;
3114
3115         l4kwqe->da0 = csk->ha[0];
3116         l4kwqe->da1 = csk->ha[1];
3117         l4kwqe->da2 = csk->ha[2];
3118         l4kwqe->da3 = csk->ha[3];
3119         l4kwqe->da4 = csk->ha[4];
3120         l4kwqe->da5 = csk->ha[5];
3121
3122         l4kwqe->sa0 = dev->mac_addr[0];
3123         l4kwqe->sa1 = dev->mac_addr[1];
3124         l4kwqe->sa2 = dev->mac_addr[2];
3125         l4kwqe->sa3 = dev->mac_addr[3];
3126         l4kwqe->sa4 = dev->mac_addr[4];
3127         l4kwqe->sa5 = dev->mac_addr[5];
3128
3129         l4kwqe->etype = ETH_P_IP;
3130         l4kwqe->ipid_start = DEF_IPID_START;
3131         l4kwqe->host_opaque = csk->l5_cid;
3132
3133         if (csk->vlan_id) {
3134                 l4kwqe->pg_flags |= L4_KWQ_OFFLOAD_PG_VLAN_TAGGING;
3135                 l4kwqe->vlan_tag = csk->vlan_id;
3136                 l4kwqe->l2hdr_nbytes += 4;
3137         }
3138
3139         return dev->submit_kwqes(dev, wqes, 1);
3140 }
3141
3142 static int cnic_cm_update_pg(struct cnic_sock *csk)
3143 {
3144         struct cnic_dev *dev = csk->dev;
3145         struct l4_kwq_update_pg *l4kwqe;
3146         struct kwqe *wqes[1];
3147
3148         l4kwqe = (struct l4_kwq_update_pg *) &csk->kwqe1;
3149         memset(l4kwqe, 0, sizeof(*l4kwqe));
3150         wqes[0] = (struct kwqe *) l4kwqe;
3151
3152         l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPDATE_PG;
3153         l4kwqe->flags =
3154                 L4_LAYER_CODE << L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT;
3155         l4kwqe->pg_cid = csk->pg_cid;
3156
3157         l4kwqe->da0 = csk->ha[0];
3158         l4kwqe->da1 = csk->ha[1];
3159         l4kwqe->da2 = csk->ha[2];
3160         l4kwqe->da3 = csk->ha[3];
3161         l4kwqe->da4 = csk->ha[4];
3162         l4kwqe->da5 = csk->ha[5];
3163
3164         l4kwqe->pg_host_opaque = csk->l5_cid;
3165         l4kwqe->pg_valids = L4_KWQ_UPDATE_PG_VALIDS_DA;
3166
3167         return dev->submit_kwqes(dev, wqes, 1);
3168 }
3169
3170 static int cnic_cm_upload_pg(struct cnic_sock *csk)
3171 {
3172         struct cnic_dev *dev = csk->dev;
3173         struct l4_kwq_upload *l4kwqe;
3174         struct kwqe *wqes[1];
3175
3176         l4kwqe = (struct l4_kwq_upload *) &csk->kwqe1;
3177         memset(l4kwqe, 0, sizeof(*l4kwqe));
3178         wqes[0] = (struct kwqe *) l4kwqe;
3179
3180         l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPLOAD_PG;
3181         l4kwqe->flags =
3182                 L4_LAYER_CODE << L4_KWQ_UPLOAD_LAYER_CODE_SHIFT;
3183         l4kwqe->cid = csk->pg_cid;
3184
3185         return dev->submit_kwqes(dev, wqes, 1);
3186 }
3187
3188 static int cnic_cm_conn_req(struct cnic_sock *csk)
3189 {
3190         struct cnic_dev *dev = csk->dev;
3191         struct l4_kwq_connect_req1 *l4kwqe1;
3192         struct l4_kwq_connect_req2 *l4kwqe2;
3193         struct l4_kwq_connect_req3 *l4kwqe3;
3194         struct kwqe *wqes[3];
3195         u8 tcp_flags = 0;
3196         int num_wqes = 2;
3197
3198         l4kwqe1 = (struct l4_kwq_connect_req1 *) &csk->kwqe1;
3199         l4kwqe2 = (struct l4_kwq_connect_req2 *) &csk->kwqe2;
3200         l4kwqe3 = (struct l4_kwq_connect_req3 *) &csk->kwqe3;
3201         memset(l4kwqe1, 0, sizeof(*l4kwqe1));
3202         memset(l4kwqe2, 0, sizeof(*l4kwqe2));
3203         memset(l4kwqe3, 0, sizeof(*l4kwqe3));
3204
3205         l4kwqe3->op_code = L4_KWQE_OPCODE_VALUE_CONNECT3;
3206         l4kwqe3->flags =
3207                 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT;
3208         l4kwqe3->ka_timeout = csk->ka_timeout;
3209         l4kwqe3->ka_interval = csk->ka_interval;
3210         l4kwqe3->ka_max_probe_count = csk->ka_max_probe_count;
3211         l4kwqe3->tos = csk->tos;
3212         l4kwqe3->ttl = csk->ttl;
3213         l4kwqe3->snd_seq_scale = csk->snd_seq_scale;
3214         l4kwqe3->pmtu = csk->mtu;
3215         l4kwqe3->rcv_buf = csk->rcv_buf;
3216         l4kwqe3->snd_buf = csk->snd_buf;
3217         l4kwqe3->seed = csk->seed;
3218
3219         wqes[0] = (struct kwqe *) l4kwqe1;
3220         if (test_bit(SK_F_IPV6, &csk->flags)) {
3221                 wqes[1] = (struct kwqe *) l4kwqe2;
3222                 wqes[2] = (struct kwqe *) l4kwqe3;
3223                 num_wqes = 3;
3224
3225                 l4kwqe1->conn_flags = L4_KWQ_CONNECT_REQ1_IP_V6;
3226                 l4kwqe2->op_code = L4_KWQE_OPCODE_VALUE_CONNECT2;
3227                 l4kwqe2->flags =
3228                         L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT |
3229                         L4_LAYER_CODE << L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT;
3230                 l4kwqe2->src_ip_v6_2 = be32_to_cpu(csk->src_ip[1]);
3231                 l4kwqe2->src_ip_v6_3 = be32_to_cpu(csk->src_ip[2]);
3232                 l4kwqe2->src_ip_v6_4 = be32_to_cpu(csk->src_ip[3]);
3233                 l4kwqe2->dst_ip_v6_2 = be32_to_cpu(csk->dst_ip[1]);
3234                 l4kwqe2->dst_ip_v6_3 = be32_to_cpu(csk->dst_ip[2]);
3235                 l4kwqe2->dst_ip_v6_4 = be32_to_cpu(csk->dst_ip[3]);
3236                 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct ipv6hdr) -
3237                                sizeof(struct tcphdr);
3238         } else {
3239                 wqes[1] = (struct kwqe *) l4kwqe3;
3240                 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct iphdr) -
3241                                sizeof(struct tcphdr);
3242         }
3243
3244         l4kwqe1->op_code = L4_KWQE_OPCODE_VALUE_CONNECT1;
3245         l4kwqe1->flags =
3246                 (L4_LAYER_CODE << L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT) |
3247                  L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT;
3248         l4kwqe1->cid = csk->cid;
3249         l4kwqe1->pg_cid = csk->pg_cid;
3250         l4kwqe1->src_ip = be32_to_cpu(csk->src_ip[0]);
3251         l4kwqe1->dst_ip = be32_to_cpu(csk->dst_ip[0]);
3252         l4kwqe1->src_port = be16_to_cpu(csk->src_port);
3253         l4kwqe1->dst_port = be16_to_cpu(csk->dst_port);
3254         if (csk->tcp_flags & SK_TCP_NO_DELAY_ACK)
3255                 tcp_flags |= L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK;
3256         if (csk->tcp_flags & SK_TCP_KEEP_ALIVE)
3257                 tcp_flags |= L4_KWQ_CONNECT_REQ1_KEEP_ALIVE;
3258         if (csk->tcp_flags & SK_TCP_NAGLE)
3259                 tcp_flags |= L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE;
3260         if (csk->tcp_flags & SK_TCP_TIMESTAMP)
3261                 tcp_flags |= L4_KWQ_CONNECT_REQ1_TIME_STAMP;
3262         if (csk->tcp_flags & SK_TCP_SACK)
3263                 tcp_flags |= L4_KWQ_CONNECT_REQ1_SACK;
3264         if (csk->tcp_flags & SK_TCP_SEG_SCALING)
3265                 tcp_flags |= L4_KWQ_CONNECT_REQ1_SEG_SCALING;
3266
3267         l4kwqe1->tcp_flags = tcp_flags;
3268
3269         return dev->submit_kwqes(dev, wqes, num_wqes);
3270 }
3271
3272 static int cnic_cm_close_req(struct cnic_sock *csk)
3273 {
3274         struct cnic_dev *dev = csk->dev;
3275         struct l4_kwq_close_req *l4kwqe;
3276         struct kwqe *wqes[1];
3277
3278         l4kwqe = (struct l4_kwq_close_req *) &csk->kwqe2;
3279         memset(l4kwqe, 0, sizeof(*l4kwqe));
3280         wqes[0] = (struct kwqe *) l4kwqe;
3281
3282         l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_CLOSE;
3283         l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT;
3284         l4kwqe->cid = csk->cid;
3285
3286         return dev->submit_kwqes(dev, wqes, 1);
3287 }
3288
3289 static int cnic_cm_abort_req(struct cnic_sock *csk)
3290 {
3291         struct cnic_dev *dev = csk->dev;
3292         struct l4_kwq_reset_req *l4kwqe;
3293         struct kwqe *wqes[1];
3294
3295         l4kwqe = (struct l4_kwq_reset_req *) &csk->kwqe2;
3296         memset(l4kwqe, 0, sizeof(*l4kwqe));
3297         wqes[0] = (struct kwqe *) l4kwqe;
3298
3299         l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_RESET;
3300         l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT;
3301         l4kwqe->cid = csk->cid;
3302
3303         return dev->submit_kwqes(dev, wqes, 1);
3304 }
3305
3306 static int cnic_cm_create(struct cnic_dev *dev, int ulp_type, u32 cid,
3307                           u32 l5_cid, struct cnic_sock **csk, void *context)
3308 {
3309         struct cnic_local *cp = dev->cnic_priv;
3310         struct cnic_sock *csk1;
3311
3312         if (l5_cid >= MAX_CM_SK_TBL_SZ)
3313                 return -EINVAL;
3314
3315         if (cp->ctx_tbl) {
3316                 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
3317
3318                 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
3319                         return -EAGAIN;
3320         }
3321
3322         csk1 = &cp->csk_tbl[l5_cid];
3323         if (atomic_read(&csk1->ref_count))
3324                 return -EAGAIN;
3325
3326         if (test_and_set_bit(SK_F_INUSE, &csk1->flags))
3327                 return -EBUSY;
3328
3329         csk1->dev = dev;
3330         csk1->cid = cid;
3331         csk1->l5_cid = l5_cid;
3332         csk1->ulp_type = ulp_type;
3333         csk1->context = context;
3334
3335         csk1->ka_timeout = DEF_KA_TIMEOUT;
3336         csk1->ka_interval = DEF_KA_INTERVAL;
3337         csk1->ka_max_probe_count = DEF_KA_MAX_PROBE_COUNT;
3338         csk1->tos = DEF_TOS;
3339         csk1->ttl = DEF_TTL;
3340         csk1->snd_seq_scale = DEF_SND_SEQ_SCALE;
3341         csk1->rcv_buf = DEF_RCV_BUF;
3342         csk1->snd_buf = DEF_SND_BUF;
3343         csk1->seed = DEF_SEED;
3344
3345         *csk = csk1;
3346         return 0;
3347 }
3348
3349 static void cnic_cm_cleanup(struct cnic_sock *csk)
3350 {
3351         if (csk->src_port) {
3352                 struct cnic_dev *dev = csk->dev;
3353                 struct cnic_local *cp = dev->cnic_priv;
3354
3355                 cnic_free_id(&cp->csk_port_tbl, be16_to_cpu(csk->src_port));
3356                 csk->src_port = 0;
3357         }
3358 }
3359
3360 static void cnic_close_conn(struct cnic_sock *csk)
3361 {
3362         if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) {
3363                 cnic_cm_upload_pg(csk);
3364                 clear_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
3365         }
3366         cnic_cm_cleanup(csk);
3367 }
3368
3369 static int cnic_cm_destroy(struct cnic_sock *csk)
3370 {
3371         if (!cnic_in_use(csk))
3372                 return -EINVAL;
3373
3374         csk_hold(csk);
3375         clear_bit(SK_F_INUSE, &csk->flags);
3376         smp_mb__after_clear_bit();
3377         while (atomic_read(&csk->ref_count) != 1)
3378                 msleep(1);
3379         cnic_cm_cleanup(csk);
3380
3381         csk->flags = 0;
3382         csk_put(csk);
3383         return 0;
3384 }
3385
3386 static inline u16 cnic_get_vlan(struct net_device *dev,
3387                                 struct net_device **vlan_dev)
3388 {
3389         if (dev->priv_flags & IFF_802_1Q_VLAN) {
3390                 *vlan_dev = vlan_dev_real_dev(dev);
3391                 return vlan_dev_vlan_id(dev);
3392         }
3393         *vlan_dev = dev;
3394         return 0;
3395 }
3396
3397 static int cnic_get_v4_route(struct sockaddr_in *dst_addr,
3398                              struct dst_entry **dst)
3399 {
3400 #if defined(CONFIG_INET)
3401         struct flowi fl;
3402         int err;
3403         struct rtable *rt;
3404
3405         memset(&fl, 0, sizeof(fl));
3406         fl.nl_u.ip4_u.daddr = dst_addr->sin_addr.s_addr;
3407
3408         err = ip_route_output_key(&init_net, &rt, &fl);
3409         if (!err)
3410                 *dst = &rt->dst;
3411         return err;
3412 #else
3413         return -ENETUNREACH;
3414 #endif
3415 }
3416
3417 static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr,
3418                              struct dst_entry **dst)
3419 {
3420 #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
3421         struct flowi fl;
3422
3423         memset(&fl, 0, sizeof(fl));
3424         ipv6_addr_copy(&fl.fl6_dst, &dst_addr->sin6_addr);
3425         if (ipv6_addr_type(&fl.fl6_dst) & IPV6_ADDR_LINKLOCAL)
3426                 fl.oif = dst_addr->sin6_scope_id;
3427
3428         *dst = ip6_route_output(&init_net, NULL, &fl);
3429         if (*dst)
3430                 return 0;
3431 #endif
3432
3433         return -ENETUNREACH;
3434 }
3435
3436 static struct cnic_dev *cnic_cm_select_dev(struct sockaddr_in *dst_addr,
3437                                            int ulp_type)
3438 {
3439         struct cnic_dev *dev = NULL;
3440         struct dst_entry *dst;
3441         struct net_device *netdev = NULL;
3442         int err = -ENETUNREACH;
3443
3444         if (dst_addr->sin_family == AF_INET)
3445                 err = cnic_get_v4_route(dst_addr, &dst);
3446         else if (dst_addr->sin_family == AF_INET6) {
3447                 struct sockaddr_in6 *dst_addr6 =
3448                         (struct sockaddr_in6 *) dst_addr;
3449
3450                 err = cnic_get_v6_route(dst_addr6, &dst);
3451         } else
3452                 return NULL;
3453
3454         if (err)
3455                 return NULL;
3456
3457         if (!dst->dev)
3458                 goto done;
3459
3460         cnic_get_vlan(dst->dev, &netdev);
3461
3462         dev = cnic_from_netdev(netdev);
3463
3464 done:
3465         dst_release(dst);
3466         if (dev)
3467                 cnic_put(dev);
3468         return dev;
3469 }
3470
3471 static int cnic_resolve_addr(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3472 {
3473         struct cnic_dev *dev = csk->dev;
3474         struct cnic_local *cp = dev->cnic_priv;
3475
3476         return cnic_send_nlmsg(cp, ISCSI_KEVENT_PATH_REQ, csk);
3477 }
3478
3479 static int cnic_get_route(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3480 {
3481         struct cnic_dev *dev = csk->dev;
3482         struct cnic_local *cp = dev->cnic_priv;
3483         int is_v6, rc = 0;
3484         struct dst_entry *dst = NULL;
3485         struct net_device *realdev;
3486         __be16 local_port;
3487         u32 port_id;
3488
3489         if (saddr->local.v6.sin6_family == AF_INET6 &&
3490             saddr->remote.v6.sin6_family == AF_INET6)
3491                 is_v6 = 1;
3492         else if (saddr->local.v4.sin_family == AF_INET &&
3493                  saddr->remote.v4.sin_family == AF_INET)
3494                 is_v6 = 0;
3495         else
3496                 return -EINVAL;
3497
3498         clear_bit(SK_F_IPV6, &csk->flags);
3499
3500         if (is_v6) {
3501                 set_bit(SK_F_IPV6, &csk->flags);
3502                 cnic_get_v6_route(&saddr->remote.v6, &dst);
3503
3504                 memcpy(&csk->dst_ip[0], &saddr->remote.v6.sin6_addr,
3505                        sizeof(struct in6_addr));
3506                 csk->dst_port = saddr->remote.v6.sin6_port;
3507                 local_port = saddr->local.v6.sin6_port;
3508
3509         } else {
3510                 cnic_get_v4_route(&saddr->remote.v4, &dst);
3511
3512                 csk->dst_ip[0] = saddr->remote.v4.sin_addr.s_addr;
3513                 csk->dst_port = saddr->remote.v4.sin_port;
3514                 local_port = saddr->local.v4.sin_port;
3515         }
3516
3517         csk->vlan_id = 0;
3518         csk->mtu = dev->netdev->mtu;
3519         if (dst && dst->dev) {
3520                 u16 vlan = cnic_get_vlan(dst->dev, &realdev);
3521                 if (realdev == dev->netdev) {
3522                         csk->vlan_id = vlan;
3523                         csk->mtu = dst_mtu(dst);
3524                 }
3525         }
3526
3527         port_id = be16_to_cpu(local_port);
3528         if (port_id >= CNIC_LOCAL_PORT_MIN &&
3529             port_id < CNIC_LOCAL_PORT_MAX) {
3530                 if (cnic_alloc_id(&cp->csk_port_tbl, port_id))
3531                         port_id = 0;
3532         } else
3533                 port_id = 0;
3534
3535         if (!port_id) {
3536                 port_id = cnic_alloc_new_id(&cp->csk_port_tbl);
3537                 if (port_id == -1) {
3538                         rc = -ENOMEM;
3539                         goto err_out;
3540                 }
3541                 local_port = cpu_to_be16(port_id);
3542         }
3543         csk->src_port = local_port;
3544
3545 err_out:
3546         dst_release(dst);
3547         return rc;
3548 }
3549
3550 static void cnic_init_csk_state(struct cnic_sock *csk)
3551 {
3552         csk->state = 0;
3553         clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3554         clear_bit(SK_F_CLOSING, &csk->flags);
3555 }
3556
3557 static int cnic_cm_connect(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3558 {
3559         int err = 0;
3560
3561         if (!cnic_in_use(csk))
3562                 return -EINVAL;
3563
3564         if (test_and_set_bit(SK_F_CONNECT_START, &csk->flags))
3565                 return -EINVAL;
3566
3567         cnic_init_csk_state(csk);
3568
3569         err = cnic_get_route(csk, saddr);
3570         if (err)
3571                 goto err_out;
3572
3573         err = cnic_resolve_addr(csk, saddr);
3574         if (!err)
3575                 return 0;
3576
3577 err_out:
3578         clear_bit(SK_F_CONNECT_START, &csk->flags);
3579         return err;
3580 }
3581
3582 static int cnic_cm_abort(struct cnic_sock *csk)
3583 {
3584         struct cnic_local *cp = csk->dev->cnic_priv;
3585         u32 opcode = L4_KCQE_OPCODE_VALUE_RESET_COMP;
3586
3587         if (!cnic_in_use(csk))
3588                 return -EINVAL;
3589
3590         if (cnic_abort_prep(csk))
3591                 return cnic_cm_abort_req(csk);
3592
3593         /* Getting here means that we haven't started connect, or
3594          * connect was not successful.
3595          */
3596
3597         cp->close_conn(csk, opcode);
3598         if (csk->state != opcode)
3599                 return -EALREADY;
3600
3601         return 0;
3602 }
3603
3604 static int cnic_cm_close(struct cnic_sock *csk)
3605 {
3606         if (!cnic_in_use(csk))
3607                 return -EINVAL;
3608
3609         if (cnic_close_prep(csk)) {
3610                 csk->state = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
3611                 return cnic_cm_close_req(csk);
3612         } else {
3613                 return -EALREADY;
3614         }
3615         return 0;
3616 }
3617
3618 static void cnic_cm_upcall(struct cnic_local *cp, struct cnic_sock *csk,
3619                            u8 opcode)
3620 {
3621         struct cnic_ulp_ops *ulp_ops;
3622         int ulp_type = csk->ulp_type;
3623
3624         rcu_read_lock();
3625         ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
3626         if (ulp_ops) {
3627                 if (opcode == L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE)
3628                         ulp_ops->cm_connect_complete(csk);
3629                 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
3630                         ulp_ops->cm_close_complete(csk);
3631                 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED)
3632                         ulp_ops->cm_remote_abort(csk);
3633                 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_COMP)
3634                         ulp_ops->cm_abort_complete(csk);
3635                 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED)
3636                         ulp_ops->cm_remote_close(csk);
3637         }
3638         rcu_read_unlock();
3639 }
3640
3641 static int cnic_cm_set_pg(struct cnic_sock *csk)
3642 {
3643         if (cnic_offld_prep(csk)) {
3644                 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3645                         cnic_cm_update_pg(csk);
3646                 else
3647                         cnic_cm_offload_pg(csk);
3648         }
3649         return 0;
3650 }
3651
3652 static void cnic_cm_process_offld_pg(struct cnic_dev *dev, struct l4_kcq *kcqe)
3653 {
3654         struct cnic_local *cp = dev->cnic_priv;
3655         u32 l5_cid = kcqe->pg_host_opaque;
3656         u8 opcode = kcqe->op_code;
3657         struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
3658
3659         csk_hold(csk);
3660         if (!cnic_in_use(csk))
3661                 goto done;
3662
3663         if (opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3664                 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3665                 goto done;
3666         }
3667         /* Possible PG kcqe status:  SUCCESS, OFFLOADED_PG, or CTX_ALLOC_FAIL */
3668         if (kcqe->status == L4_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAIL) {
3669                 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3670                 cnic_cm_upcall(cp, csk,
3671                                L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
3672                 goto done;
3673         }
3674
3675         csk->pg_cid = kcqe->pg_cid;
3676         set_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
3677         cnic_cm_conn_req(csk);
3678
3679 done:
3680         csk_put(csk);
3681 }
3682
3683 static void cnic_process_fcoe_term_conn(struct cnic_dev *dev, struct kcqe *kcqe)
3684 {
3685         struct cnic_local *cp = dev->cnic_priv;
3686         struct fcoe_kcqe *fc_kcqe = (struct fcoe_kcqe *) kcqe;
3687         u32 l5_cid = fc_kcqe->fcoe_conn_id + BNX2X_FCOE_L5_CID_BASE;
3688         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
3689
3690         ctx->timestamp = jiffies;
3691         ctx->wait_cond = 1;
3692         wake_up(&ctx->waitq);
3693 }
3694
3695 static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe)
3696 {
3697         struct cnic_local *cp = dev->cnic_priv;
3698         struct l4_kcq *l4kcqe = (struct l4_kcq *) kcqe;
3699         u8 opcode = l4kcqe->op_code;
3700         u32 l5_cid;
3701         struct cnic_sock *csk;
3702
3703         if (opcode == FCOE_RAMROD_CMD_ID_TERMINATE_CONN) {
3704                 cnic_process_fcoe_term_conn(dev, kcqe);
3705                 return;
3706         }
3707         if (opcode == L4_KCQE_OPCODE_VALUE_OFFLOAD_PG ||
3708             opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3709                 cnic_cm_process_offld_pg(dev, l4kcqe);
3710                 return;
3711         }
3712
3713         l5_cid = l4kcqe->conn_id;
3714         if (opcode & 0x80)
3715                 l5_cid = l4kcqe->cid;
3716         if (l5_cid >= MAX_CM_SK_TBL_SZ)
3717                 return;
3718
3719         csk = &cp->csk_tbl[l5_cid];
3720         csk_hold(csk);
3721
3722         if (!cnic_in_use(csk)) {
3723                 csk_put(csk);
3724                 return;
3725         }
3726
3727         switch (opcode) {
3728         case L5CM_RAMROD_CMD_ID_TCP_CONNECT:
3729                 if (l4kcqe->status != 0) {
3730                         clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3731                         cnic_cm_upcall(cp, csk,
3732                                        L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
3733                 }
3734                 break;
3735         case L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE:
3736                 if (l4kcqe->status == 0)
3737                         set_bit(SK_F_OFFLD_COMPLETE, &csk->flags);
3738
3739                 smp_mb__before_clear_bit();
3740                 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3741                 cnic_cm_upcall(cp, csk, opcode);
3742                 break;
3743
3744         case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
3745         case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
3746         case L4_KCQE_OPCODE_VALUE_RESET_COMP:
3747         case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
3748         case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
3749                 cp->close_conn(csk, opcode);
3750                 break;
3751
3752         case L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED:
3753                 cnic_cm_upcall(cp, csk, opcode);
3754                 break;
3755         }
3756         csk_put(csk);
3757 }
3758
3759 static void cnic_cm_indicate_kcqe(void *data, struct kcqe *kcqe[], u32 num)
3760 {
3761         struct cnic_dev *dev = data;
3762         int i;
3763
3764         for (i = 0; i < num; i++)
3765                 cnic_cm_process_kcqe(dev, kcqe[i]);
3766 }
3767
3768 static struct cnic_ulp_ops cm_ulp_ops = {
3769         .indicate_kcqes         = cnic_cm_indicate_kcqe,
3770 };
3771
3772 static void cnic_cm_free_mem(struct cnic_dev *dev)
3773 {
3774         struct cnic_local *cp = dev->cnic_priv;
3775
3776         kfree(cp->csk_tbl);
3777         cp->csk_tbl = NULL;
3778         cnic_free_id_tbl(&cp->csk_port_tbl);
3779 }
3780
3781 static int cnic_cm_alloc_mem(struct cnic_dev *dev)
3782 {
3783         struct cnic_local *cp = dev->cnic_priv;
3784
3785         cp->csk_tbl = kzalloc(sizeof(struct cnic_sock) * MAX_CM_SK_TBL_SZ,
3786                               GFP_KERNEL);
3787         if (!cp->csk_tbl)
3788                 return -ENOMEM;
3789
3790         if (cnic_init_id_tbl(&cp->csk_port_tbl, CNIC_LOCAL_PORT_RANGE,
3791                              CNIC_LOCAL_PORT_MIN)) {
3792                 cnic_cm_free_mem(dev);
3793                 return -ENOMEM;
3794         }
3795         return 0;
3796 }
3797
3798 static int cnic_ready_to_close(struct cnic_sock *csk, u32 opcode)
3799 {
3800         if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
3801                 /* Unsolicited RESET_COMP or RESET_RECEIVED */
3802                 opcode = L4_KCQE_OPCODE_VALUE_RESET_RECEIVED;
3803                 csk->state = opcode;
3804         }
3805
3806         /* 1. If event opcode matches the expected event in csk->state
3807          * 2. If the expected event is CLOSE_COMP, we accept any event
3808          * 3. If the expected event is 0, meaning the connection was never
3809          *    never established, we accept the opcode from cm_abort.
3810          */
3811         if (opcode == csk->state || csk->state == 0 ||
3812             csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP) {
3813                 if (!test_and_set_bit(SK_F_CLOSING, &csk->flags)) {
3814                         if (csk->state == 0)
3815                                 csk->state = opcode;
3816                         return 1;
3817                 }
3818         }
3819         return 0;
3820 }
3821
3822 static void cnic_close_bnx2_conn(struct cnic_sock *csk, u32 opcode)
3823 {
3824         struct cnic_dev *dev = csk->dev;
3825         struct cnic_local *cp = dev->cnic_priv;
3826
3827         if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED) {
3828                 cnic_cm_upcall(cp, csk, opcode);
3829                 return;
3830         }
3831
3832         clear_bit(SK_F_CONNECT_START, &csk->flags);
3833         cnic_close_conn(csk);
3834         csk->state = opcode;
3835         cnic_cm_upcall(cp, csk, opcode);
3836 }
3837
3838 static void cnic_cm_stop_bnx2_hw(struct cnic_dev *dev)
3839 {
3840 }
3841
3842 static int cnic_cm_init_bnx2_hw(struct cnic_dev *dev)
3843 {
3844         u32 seed;
3845
3846         get_random_bytes(&seed, 4);
3847         cnic_ctx_wr(dev, 45, 0, seed);
3848         return 0;
3849 }
3850
3851 static void cnic_close_bnx2x_conn(struct cnic_sock *csk, u32 opcode)
3852 {
3853         struct cnic_dev *dev = csk->dev;
3854         struct cnic_local *cp = dev->cnic_priv;
3855         struct cnic_context *ctx = &cp->ctx_tbl[csk->l5_cid];
3856         union l5cm_specific_data l5_data;
3857         u32 cmd = 0;
3858         int close_complete = 0;
3859
3860         switch (opcode) {
3861         case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
3862         case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
3863         case L4_KCQE_OPCODE_VALUE_RESET_COMP:
3864                 if (cnic_ready_to_close(csk, opcode)) {
3865                         if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3866                                 cmd = L5CM_RAMROD_CMD_ID_SEARCHER_DELETE;
3867                         else
3868                                 close_complete = 1;
3869                 }
3870                 break;
3871         case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
3872                 cmd = L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD;
3873                 break;
3874         case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
3875                 close_complete = 1;
3876                 break;
3877         }
3878         if (cmd) {
3879                 memset(&l5_data, 0, sizeof(l5_data));
3880
3881                 cnic_submit_kwqe_16(dev, cmd, csk->cid, ISCSI_CONNECTION_TYPE,
3882                                     &l5_data);
3883         } else if (close_complete) {
3884                 ctx->timestamp = jiffies;
3885                 cnic_close_conn(csk);
3886                 cnic_cm_upcall(cp, csk, csk->state);
3887         }
3888 }
3889
3890 static void cnic_cm_stop_bnx2x_hw(struct cnic_dev *dev)
3891 {
3892         struct cnic_local *cp = dev->cnic_priv;
3893         int i;
3894
3895         if (!cp->ctx_tbl)
3896                 return;
3897
3898         if (!netif_running(dev->netdev))
3899                 return;
3900
3901         for (i = 0; i < cp->max_cid_space; i++) {
3902                 struct cnic_context *ctx = &cp->ctx_tbl[i];
3903
3904                 while (test_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
3905                         msleep(10);
3906
3907                 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
3908                         netdev_warn(dev->netdev, "CID %x not deleted\n",
3909                                    ctx->cid);
3910         }
3911
3912         cancel_delayed_work(&cp->delete_task);
3913         flush_workqueue(cnic_wq);
3914
3915         if (atomic_read(&cp->iscsi_conn) != 0)
3916                 netdev_warn(dev->netdev, "%d iSCSI connections not destroyed\n",
3917                             atomic_read(&cp->iscsi_conn));
3918 }
3919
3920 static int cnic_cm_init_bnx2x_hw(struct cnic_dev *dev)
3921 {
3922         struct cnic_local *cp = dev->cnic_priv;
3923         u32 pfid = cp->pfid;
3924         u32 port = CNIC_PORT(cp);
3925
3926         cnic_init_bnx2x_mac(dev);
3927         cnic_bnx2x_set_tcp_timestamp(dev, 1);
3928
3929         CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
3930                   XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfid), 0);
3931
3932         CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3933                 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(port), 1);
3934         CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3935                 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(port),
3936                 DEF_MAX_DA_COUNT);
3937
3938         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3939                  XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfid), DEF_TTL);
3940         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3941                  XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfid), DEF_TOS);
3942         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3943                  XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfid), 2);
3944         CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3945                 XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfid), DEF_SWS_TIMER);
3946
3947         CNIC_WR(dev, BAR_TSTRORM_INTMEM + TSTORM_TCP_MAX_CWND_OFFSET(pfid),
3948                 DEF_MAX_CWND);
3949         return 0;
3950 }
3951
3952 static void cnic_delete_task(struct work_struct *work)
3953 {
3954         struct cnic_local *cp;
3955         struct cnic_dev *dev;
3956         u32 i;
3957         int need_resched = 0;
3958
3959         cp = container_of(work, struct cnic_local, delete_task.work);
3960         dev = cp->dev;
3961
3962         for (i = 0; i < cp->max_cid_space; i++) {
3963                 struct cnic_context *ctx = &cp->ctx_tbl[i];
3964
3965                 if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags) ||
3966                     !test_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
3967                         continue;
3968
3969                 if (!time_after(jiffies, ctx->timestamp + (2 * HZ))) {
3970                         need_resched = 1;
3971                         continue;
3972                 }
3973
3974                 if (!test_and_clear_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
3975                         continue;
3976
3977                 cnic_bnx2x_destroy_ramrod(dev, i);
3978
3979                 cnic_free_bnx2x_conn_resc(dev, i);
3980                 if (ctx->ulp_proto_id == CNIC_ULP_ISCSI)
3981                         atomic_dec(&cp->iscsi_conn);
3982
3983                 clear_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
3984         }
3985
3986         if (need_resched)
3987                 queue_delayed_work(cnic_wq, &cp->delete_task,
3988                                    msecs_to_jiffies(10));
3989
3990 }
3991
3992 static int cnic_cm_open(struct cnic_dev *dev)
3993 {
3994         struct cnic_local *cp = dev->cnic_priv;
3995         int err;
3996
3997         err = cnic_cm_alloc_mem(dev);
3998         if (err)
3999                 return err;
4000
4001         err = cp->start_cm(dev);
4002
4003         if (err)
4004                 goto err_out;
4005
4006         INIT_DELAYED_WORK(&cp->delete_task, cnic_delete_task);
4007
4008         dev->cm_create = cnic_cm_create;
4009         dev->cm_destroy = cnic_cm_destroy;
4010         dev->cm_connect = cnic_cm_connect;
4011         dev->cm_abort = cnic_cm_abort;
4012         dev->cm_close = cnic_cm_close;
4013         dev->cm_select_dev = cnic_cm_select_dev;
4014
4015         cp->ulp_handle[CNIC_ULP_L4] = dev;
4016         rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], &cm_ulp_ops);
4017         return 0;
4018
4019 err_out:
4020         cnic_cm_free_mem(dev);
4021         return err;
4022 }
4023
4024 static int cnic_cm_shutdown(struct cnic_dev *dev)
4025 {
4026         struct cnic_local *cp = dev->cnic_priv;
4027         int i;
4028
4029         cp->stop_cm(dev);
4030
4031         if (!cp->csk_tbl)
4032                 return 0;
4033
4034         for (i = 0; i < MAX_CM_SK_TBL_SZ; i++) {
4035                 struct cnic_sock *csk = &cp->csk_tbl[i];
4036
4037                 clear_bit(SK_F_INUSE, &csk->flags);
4038                 cnic_cm_cleanup(csk);
4039         }
4040         cnic_cm_free_mem(dev);
4041
4042         return 0;
4043 }
4044
4045 static void cnic_init_context(struct cnic_dev *dev, u32 cid)
4046 {
4047         u32 cid_addr;
4048         int i;
4049
4050         cid_addr = GET_CID_ADDR(cid);
4051
4052         for (i = 0; i < CTX_SIZE; i += 4)
4053                 cnic_ctx_wr(dev, cid_addr, i, 0);
4054 }
4055
4056 static int cnic_setup_5709_context(struct cnic_dev *dev, int valid)
4057 {
4058         struct cnic_local *cp = dev->cnic_priv;
4059         int ret = 0, i;
4060         u32 valid_bit = valid ? BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID : 0;
4061
4062         if (CHIP_NUM(cp) != CHIP_NUM_5709)
4063                 return 0;
4064
4065         for (i = 0; i < cp->ctx_blks; i++) {
4066                 int j;
4067                 u32 idx = cp->ctx_arr[i].cid / cp->cids_per_blk;
4068                 u32 val;
4069
4070                 memset(cp->ctx_arr[i].ctx, 0, BCM_PAGE_SIZE);
4071
4072                 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA0,
4073                         (cp->ctx_arr[i].mapping & 0xffffffff) | valid_bit);
4074                 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA1,
4075                         (u64) cp->ctx_arr[i].mapping >> 32);
4076                 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL, idx |
4077                         BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ);
4078                 for (j = 0; j < 10; j++) {
4079
4080                         val = CNIC_RD(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL);
4081                         if (!(val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ))
4082                                 break;
4083                         udelay(5);
4084                 }
4085                 if (val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ) {
4086                         ret = -EBUSY;
4087                         break;
4088                 }
4089         }
4090         return ret;
4091 }
4092
4093 static void cnic_free_irq(struct cnic_dev *dev)
4094 {
4095         struct cnic_local *cp = dev->cnic_priv;
4096         struct cnic_eth_dev *ethdev = cp->ethdev;
4097
4098         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4099                 cp->disable_int_sync(dev);
4100                 tasklet_kill(&cp->cnic_irq_task);
4101                 free_irq(ethdev->irq_arr[0].vector, dev);
4102         }
4103 }
4104
4105 static int cnic_request_irq(struct cnic_dev *dev)
4106 {
4107         struct cnic_local *cp = dev->cnic_priv;
4108         struct cnic_eth_dev *ethdev = cp->ethdev;
4109         int err;
4110
4111         err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0, "cnic", dev);
4112         if (err)
4113                 tasklet_disable(&cp->cnic_irq_task);
4114
4115         return err;
4116 }
4117
4118 static int cnic_init_bnx2_irq(struct cnic_dev *dev)
4119 {
4120         struct cnic_local *cp = dev->cnic_priv;
4121         struct cnic_eth_dev *ethdev = cp->ethdev;
4122
4123         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4124                 int err, i = 0;
4125                 int sblk_num = cp->status_blk_num;
4126                 u32 base = ((sblk_num - 1) * BNX2_HC_SB_CONFIG_SIZE) +
4127                            BNX2_HC_SB_CONFIG_1;
4128
4129                 CNIC_WR(dev, base, BNX2_HC_SB_CONFIG_1_ONE_SHOT);
4130
4131                 CNIC_WR(dev, base + BNX2_HC_COMP_PROD_TRIP_OFF, (2 << 16) | 8);
4132                 CNIC_WR(dev, base + BNX2_HC_COM_TICKS_OFF, (64 << 16) | 220);
4133                 CNIC_WR(dev, base + BNX2_HC_CMD_TICKS_OFF, (64 << 16) | 220);
4134
4135                 cp->last_status_idx = cp->status_blk.bnx2->status_idx;
4136                 tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2_msix,
4137                              (unsigned long) dev);
4138                 err = cnic_request_irq(dev);
4139                 if (err)
4140                         return err;
4141
4142                 while (cp->status_blk.bnx2->status_completion_producer_index &&
4143                        i < 10) {
4144                         CNIC_WR(dev, BNX2_HC_COALESCE_NOW,
4145                                 1 << (11 + sblk_num));
4146                         udelay(10);
4147                         i++;
4148                         barrier();
4149                 }
4150                 if (cp->status_blk.bnx2->status_completion_producer_index) {
4151                         cnic_free_irq(dev);
4152                         goto failed;
4153                 }
4154
4155         } else {
4156                 struct status_block *sblk = cp->status_blk.gen;
4157                 u32 hc_cmd = CNIC_RD(dev, BNX2_HC_COMMAND);
4158                 int i = 0;
4159
4160                 while (sblk->status_completion_producer_index && i < 10) {
4161                         CNIC_WR(dev, BNX2_HC_COMMAND,
4162                                 hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
4163                         udelay(10);
4164                         i++;
4165                         barrier();
4166                 }
4167                 if (sblk->status_completion_producer_index)
4168                         goto failed;
4169
4170         }
4171         return 0;
4172
4173 failed:
4174         netdev_err(dev->netdev, "KCQ index not resetting to 0\n");
4175         return -EBUSY;
4176 }
4177
4178 static void cnic_enable_bnx2_int(struct cnic_dev *dev)
4179 {
4180         struct cnic_local *cp = dev->cnic_priv;
4181         struct cnic_eth_dev *ethdev = cp->ethdev;
4182
4183         if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
4184                 return;
4185
4186         CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
4187                 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
4188 }
4189
4190 static void cnic_disable_bnx2_int_sync(struct cnic_dev *dev)
4191 {
4192         struct cnic_local *cp = dev->cnic_priv;
4193         struct cnic_eth_dev *ethdev = cp->ethdev;
4194
4195         if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
4196                 return;
4197
4198         CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
4199                 BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
4200         CNIC_RD(dev, BNX2_PCICFG_INT_ACK_CMD);
4201         synchronize_irq(ethdev->irq_arr[0].vector);
4202 }
4203
4204 static void cnic_init_bnx2_tx_ring(struct cnic_dev *dev)
4205 {
4206         struct cnic_local *cp = dev->cnic_priv;
4207         struct cnic_eth_dev *ethdev = cp->ethdev;
4208         struct cnic_uio_dev *udev = cp->udev;
4209         u32 cid_addr, tx_cid, sb_id;
4210         u32 val, offset0, offset1, offset2, offset3;
4211         int i;
4212         struct tx_bd *txbd;
4213         dma_addr_t buf_map, ring_map = udev->l2_ring_map;
4214         struct status_block *s_blk = cp->status_blk.gen;
4215
4216         sb_id = cp->status_blk_num;
4217         tx_cid = 20;
4218         cp->tx_cons_ptr = &s_blk->status_tx_quick_consumer_index2;
4219         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4220                 struct status_block_msix *sblk = cp->status_blk.bnx2;
4221
4222                 tx_cid = TX_TSS_CID + sb_id - 1;
4223                 CNIC_WR(dev, BNX2_TSCH_TSS_CFG, (sb_id << 24) |
4224                         (TX_TSS_CID << 7));
4225                 cp->tx_cons_ptr = &sblk->status_tx_quick_consumer_index;
4226         }
4227         cp->tx_cons = *cp->tx_cons_ptr;
4228
4229         cid_addr = GET_CID_ADDR(tx_cid);
4230         if (CHIP_NUM(cp) == CHIP_NUM_5709) {
4231                 u32 cid_addr2 = GET_CID_ADDR(tx_cid + 4) + 0x40;
4232
4233                 for (i = 0; i < PHY_CTX_SIZE; i += 4)
4234                         cnic_ctx_wr(dev, cid_addr2, i, 0);
4235
4236                 offset0 = BNX2_L2CTX_TYPE_XI;
4237                 offset1 = BNX2_L2CTX_CMD_TYPE_XI;
4238                 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI_XI;
4239                 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO_XI;
4240         } else {
4241                 cnic_init_context(dev, tx_cid);
4242                 cnic_init_context(dev, tx_cid + 1);
4243
4244                 offset0 = BNX2_L2CTX_TYPE;
4245                 offset1 = BNX2_L2CTX_CMD_TYPE;
4246                 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI;
4247                 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO;
4248         }
4249         val = BNX2_L2CTX_TYPE_TYPE_L2 | BNX2_L2CTX_TYPE_SIZE_L2;
4250         cnic_ctx_wr(dev, cid_addr, offset0, val);
4251
4252         val = BNX2_L2CTX_CMD_TYPE_TYPE_L2 | (8 << 16);
4253         cnic_ctx_wr(dev, cid_addr, offset1, val);
4254
4255         txbd = (struct tx_bd *) udev->l2_ring;
4256
4257         buf_map = udev->l2_buf_map;
4258         for (i = 0; i < MAX_TX_DESC_CNT; i++, txbd++) {
4259                 txbd->tx_bd_haddr_hi = (u64) buf_map >> 32;
4260                 txbd->tx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
4261         }
4262         val = (u64) ring_map >> 32;
4263         cnic_ctx_wr(dev, cid_addr, offset2, val);
4264         txbd->tx_bd_haddr_hi = val;
4265
4266         val = (u64) ring_map & 0xffffffff;
4267         cnic_ctx_wr(dev, cid_addr, offset3, val);
4268         txbd->tx_bd_haddr_lo = val;
4269 }
4270
4271 static void cnic_init_bnx2_rx_ring(struct cnic_dev *dev)
4272 {
4273         struct cnic_local *cp = dev->cnic_priv;
4274         struct cnic_eth_dev *ethdev = cp->ethdev;
4275         struct cnic_uio_dev *udev = cp->udev;
4276         u32 cid_addr, sb_id, val, coal_reg, coal_val;
4277         int i;
4278         struct rx_bd *rxbd;
4279         struct status_block *s_blk = cp->status_blk.gen;
4280         dma_addr_t ring_map = udev->l2_ring_map;
4281
4282         sb_id = cp->status_blk_num;
4283         cnic_init_context(dev, 2);
4284         cp->rx_cons_ptr = &s_blk->status_rx_quick_consumer_index2;
4285         coal_reg = BNX2_HC_COMMAND;
4286         coal_val = CNIC_RD(dev, coal_reg);
4287         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4288                 struct status_block_msix *sblk = cp->status_blk.bnx2;
4289
4290                 cp->rx_cons_ptr = &sblk->status_rx_quick_consumer_index;
4291                 coal_reg = BNX2_HC_COALESCE_NOW;
4292                 coal_val = 1 << (11 + sb_id);
4293         }
4294         i = 0;
4295         while (!(*cp->rx_cons_ptr != 0) && i < 10) {
4296                 CNIC_WR(dev, coal_reg, coal_val);
4297                 udelay(10);
4298                 i++;
4299                 barrier();
4300         }
4301         cp->rx_cons = *cp->rx_cons_ptr;
4302
4303         cid_addr = GET_CID_ADDR(2);
4304         val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE |
4305               BNX2_L2CTX_CTX_TYPE_SIZE_L2 | (0x02 << 8);
4306         cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val);
4307
4308         if (sb_id == 0)
4309                 val = 2 << BNX2_L2CTX_L2_STATUSB_NUM_SHIFT;
4310         else
4311                 val = BNX2_L2CTX_L2_STATUSB_NUM(sb_id);
4312         cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val);
4313
4314         rxbd = (struct rx_bd *) (udev->l2_ring + BCM_PAGE_SIZE);
4315         for (i = 0; i < MAX_RX_DESC_CNT; i++, rxbd++) {
4316                 dma_addr_t buf_map;
4317                 int n = (i % cp->l2_rx_ring_size) + 1;
4318
4319                 buf_map = udev->l2_buf_map + (n * cp->l2_single_buf_size);
4320                 rxbd->rx_bd_len = cp->l2_single_buf_size;
4321                 rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
4322                 rxbd->rx_bd_haddr_hi = (u64) buf_map >> 32;
4323                 rxbd->rx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
4324         }
4325         val = (u64) (ring_map + BCM_PAGE_SIZE) >> 32;
4326         cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_HI, val);
4327         rxbd->rx_bd_haddr_hi = val;
4328
4329         val = (u64) (ring_map + BCM_PAGE_SIZE) & 0xffffffff;
4330         cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_LO, val);
4331         rxbd->rx_bd_haddr_lo = val;
4332
4333         val = cnic_reg_rd_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD);
4334         cnic_reg_wr_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD, val | (1 << 2));
4335 }
4336
4337 static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *dev)
4338 {
4339         struct kwqe *wqes[1], l2kwqe;
4340
4341         memset(&l2kwqe, 0, sizeof(l2kwqe));
4342         wqes[0] = &l2kwqe;
4343         l2kwqe.kwqe_op_flag = (L2_LAYER_CODE << KWQE_LAYER_SHIFT) |
4344                               (L2_KWQE_OPCODE_VALUE_FLUSH <<
4345                                KWQE_OPCODE_SHIFT) | 2;
4346         dev->submit_kwqes(dev, wqes, 1);
4347 }
4348
4349 static void cnic_set_bnx2_mac(struct cnic_dev *dev)
4350 {
4351         struct cnic_local *cp = dev->cnic_priv;
4352         u32 val;
4353
4354         val = cp->func << 2;
4355
4356         cp->shmem_base = cnic_reg_rd_ind(dev, BNX2_SHM_HDR_ADDR_0 + val);
4357
4358         val = cnic_reg_rd_ind(dev, cp->shmem_base +
4359                               BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER);
4360         dev->mac_addr[0] = (u8) (val >> 8);
4361         dev->mac_addr[1] = (u8) val;
4362
4363         CNIC_WR(dev, BNX2_EMAC_MAC_MATCH4, val);
4364
4365         val = cnic_reg_rd_ind(dev, cp->shmem_base +
4366                               BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER);
4367         dev->mac_addr[2] = (u8) (val >> 24);
4368         dev->mac_addr[3] = (u8) (val >> 16);
4369         dev->mac_addr[4] = (u8) (val >> 8);
4370         dev->mac_addr[5] = (u8) val;
4371
4372         CNIC_WR(dev, BNX2_EMAC_MAC_MATCH5, val);
4373
4374         val = 4 | BNX2_RPM_SORT_USER2_BC_EN;
4375         if (CHIP_NUM(cp) != CHIP_NUM_5709)
4376                 val |= BNX2_RPM_SORT_USER2_PROM_VLAN;
4377
4378         CNIC_WR(dev, BNX2_RPM_SORT_USER2, 0x0);
4379         CNIC_WR(dev, BNX2_RPM_SORT_USER2, val);
4380         CNIC_WR(dev, BNX2_RPM_SORT_USER2, val | BNX2_RPM_SORT_USER2_ENA);
4381 }
4382
4383 static int cnic_start_bnx2_hw(struct cnic_dev *dev)
4384 {
4385         struct cnic_local *cp = dev->cnic_priv;
4386         struct cnic_eth_dev *ethdev = cp->ethdev;
4387         struct status_block *sblk = cp->status_blk.gen;
4388         u32 val, kcq_cid_addr, kwq_cid_addr;
4389         int err;
4390
4391         cnic_set_bnx2_mac(dev);
4392
4393         val = CNIC_RD(dev, BNX2_MQ_CONFIG);
4394         val &= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE;
4395         if (BCM_PAGE_BITS > 12)
4396                 val |= (12 - 8)  << 4;
4397         else
4398                 val |= (BCM_PAGE_BITS - 8)  << 4;
4399
4400         CNIC_WR(dev, BNX2_MQ_CONFIG, val);
4401
4402         CNIC_WR(dev, BNX2_HC_COMP_PROD_TRIP, (2 << 16) | 8);
4403         CNIC_WR(dev, BNX2_HC_COM_TICKS, (64 << 16) | 220);
4404         CNIC_WR(dev, BNX2_HC_CMD_TICKS, (64 << 16) | 220);
4405
4406         err = cnic_setup_5709_context(dev, 1);
4407         if (err)
4408                 return err;
4409
4410         cnic_init_context(dev, KWQ_CID);
4411         cnic_init_context(dev, KCQ_CID);
4412
4413         kwq_cid_addr = GET_CID_ADDR(KWQ_CID);
4414         cp->kwq_io_addr = MB_GET_CID_ADDR(KWQ_CID) + L5_KRNLQ_HOST_QIDX;
4415
4416         cp->max_kwq_idx = MAX_KWQ_IDX;
4417         cp->kwq_prod_idx = 0;
4418         cp->kwq_con_idx = 0;
4419         set_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags);
4420
4421         if (CHIP_NUM(cp) == CHIP_NUM_5706 || CHIP_NUM(cp) == CHIP_NUM_5708)
4422                 cp->kwq_con_idx_ptr = &sblk->status_rx_quick_consumer_index15;
4423         else
4424                 cp->kwq_con_idx_ptr = &sblk->status_cmd_consumer_index;
4425
4426         /* Initialize the kernel work queue context. */
4427         val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
4428               (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
4429         cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_TYPE, val);
4430
4431         val = (BCM_PAGE_SIZE / sizeof(struct kwqe) - 1) << 16;
4432         cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
4433
4434         val = ((BCM_PAGE_SIZE / sizeof(struct kwqe)) << 16) | KWQ_PAGE_CNT;
4435         cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
4436
4437         val = (u32) ((u64) cp->kwq_info.pgtbl_map >> 32);
4438         cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
4439
4440         val = (u32) cp->kwq_info.pgtbl_map;
4441         cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
4442
4443         kcq_cid_addr = GET_CID_ADDR(KCQ_CID);
4444         cp->kcq1.io_addr = MB_GET_CID_ADDR(KCQ_CID) + L5_KRNLQ_HOST_QIDX;
4445
4446         cp->kcq1.sw_prod_idx = 0;
4447         cp->kcq1.hw_prod_idx_ptr =
4448                 (u16 *) &sblk->status_completion_producer_index;
4449
4450         cp->kcq1.status_idx_ptr = (u16 *) &sblk->status_idx;
4451
4452         /* Initialize the kernel complete queue context. */
4453         val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
4454               (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
4455         cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_TYPE, val);
4456
4457         val = (BCM_PAGE_SIZE / sizeof(struct kcqe) - 1) << 16;
4458         cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
4459
4460         val = ((BCM_PAGE_SIZE / sizeof(struct kcqe)) << 16) | KCQ_PAGE_CNT;
4461         cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
4462
4463         val = (u32) ((u64) cp->kcq1.dma.pgtbl_map >> 32);
4464         cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
4465
4466         val = (u32) cp->kcq1.dma.pgtbl_map;
4467         cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
4468
4469         cp->int_num = 0;
4470         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4471                 struct status_block_msix *msblk = cp->status_blk.bnx2;
4472                 u32 sb_id = cp->status_blk_num;
4473                 u32 sb = BNX2_L2CTX_L5_STATUSB_NUM(sb_id);
4474
4475                 cp->kcq1.hw_prod_idx_ptr =
4476                         (u16 *) &msblk->status_completion_producer_index;
4477                 cp->kcq1.status_idx_ptr = (u16 *) &msblk->status_idx;
4478                 cp->kwq_con_idx_ptr = (u16 *) &msblk->status_cmd_consumer_index;
4479                 cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT;
4480                 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
4481                 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
4482         }
4483
4484         /* Enable Commnad Scheduler notification when we write to the
4485          * host producer index of the kernel contexts. */
4486         CNIC_WR(dev, BNX2_MQ_KNL_CMD_MASK1, 2);
4487
4488         /* Enable Command Scheduler notification when we write to either
4489          * the Send Queue or Receive Queue producer indexes of the kernel
4490          * bypass contexts. */
4491         CNIC_WR(dev, BNX2_MQ_KNL_BYP_CMD_MASK1, 7);
4492         CNIC_WR(dev, BNX2_MQ_KNL_BYP_WRITE_MASK1, 7);
4493
4494         /* Notify COM when the driver post an application buffer. */
4495         CNIC_WR(dev, BNX2_MQ_KNL_RX_V2P_MASK2, 0x2000);
4496
4497         /* Set the CP and COM doorbells.  These two processors polls the
4498          * doorbell for a non zero value before running.  This must be done
4499          * after setting up the kernel queue contexts. */
4500         cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 1);
4501         cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 1);
4502
4503         cnic_init_bnx2_tx_ring(dev);
4504         cnic_init_bnx2_rx_ring(dev);
4505
4506         err = cnic_init_bnx2_irq(dev);
4507         if (err) {
4508                 netdev_err(dev->netdev, "cnic_init_irq failed\n");
4509                 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
4510                 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
4511                 return err;
4512         }
4513
4514         return 0;
4515 }
4516
4517 static void cnic_setup_bnx2x_context(struct cnic_dev *dev)
4518 {
4519         struct cnic_local *cp = dev->cnic_priv;
4520         struct cnic_eth_dev *ethdev = cp->ethdev;
4521         u32 start_offset = ethdev->ctx_tbl_offset;
4522         int i;
4523
4524         for (i = 0; i < cp->ctx_blks; i++) {
4525                 struct cnic_ctx *ctx = &cp->ctx_arr[i];
4526                 dma_addr_t map = ctx->mapping;
4527
4528                 if (cp->ctx_align) {
4529                         unsigned long mask = cp->ctx_align - 1;
4530
4531                         map = (map + mask) & ~mask;
4532                 }
4533
4534                 cnic_ctx_tbl_wr(dev, start_offset + i, map);
4535         }
4536 }
4537
4538 static int cnic_init_bnx2x_irq(struct cnic_dev *dev)
4539 {
4540         struct cnic_local *cp = dev->cnic_priv;
4541         struct cnic_eth_dev *ethdev = cp->ethdev;
4542         int err = 0;
4543
4544         tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2x_bh,
4545                      (unsigned long) dev);
4546         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
4547                 err = cnic_request_irq(dev);
4548
4549         return err;
4550 }
4551
4552 static inline void cnic_storm_memset_hc_disable(struct cnic_dev *dev,
4553                                                 u16 sb_id, u8 sb_index,
4554                                                 u8 disable)
4555 {
4556
4557         u32 addr = BAR_CSTRORM_INTMEM +
4558                         CSTORM_STATUS_BLOCK_DATA_OFFSET(sb_id) +
4559                         offsetof(struct hc_status_block_data_e1x, index_data) +
4560                         sizeof(struct hc_index_data)*sb_index +
4561                         offsetof(struct hc_index_data, flags);
4562         u16 flags = CNIC_RD16(dev, addr);
4563         /* clear and set */
4564         flags &= ~HC_INDEX_DATA_HC_ENABLED;
4565         flags |= (((~disable) << HC_INDEX_DATA_HC_ENABLED_SHIFT) &
4566                   HC_INDEX_DATA_HC_ENABLED);
4567         CNIC_WR16(dev, addr, flags);
4568 }
4569
4570 static void cnic_enable_bnx2x_int(struct cnic_dev *dev)
4571 {
4572         struct cnic_local *cp = dev->cnic_priv;
4573         u8 sb_id = cp->status_blk_num;
4574
4575         CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4576                         CSTORM_STATUS_BLOCK_DATA_OFFSET(sb_id) +
4577                         offsetof(struct hc_status_block_data_e1x, index_data) +
4578                         sizeof(struct hc_index_data)*HC_INDEX_ISCSI_EQ_CONS +
4579                         offsetof(struct hc_index_data, timeout), 64 / 12);
4580         cnic_storm_memset_hc_disable(dev, sb_id, HC_INDEX_ISCSI_EQ_CONS, 0);
4581 }
4582
4583 static void cnic_disable_bnx2x_int_sync(struct cnic_dev *dev)
4584 {
4585 }
4586
4587 static void cnic_init_bnx2x_tx_ring(struct cnic_dev *dev,
4588                                     struct client_init_ramrod_data *data)
4589 {
4590         struct cnic_local *cp = dev->cnic_priv;
4591         struct cnic_uio_dev *udev = cp->udev;
4592         union eth_tx_bd_types *txbd = (union eth_tx_bd_types *) udev->l2_ring;
4593         dma_addr_t buf_map, ring_map = udev->l2_ring_map;
4594         struct host_sp_status_block *sb = cp->bnx2x_def_status_blk;
4595         int port = CNIC_PORT(cp);
4596         int i;
4597         u32 cli = cp->ethdev->iscsi_l2_client_id;
4598         u32 val;
4599
4600         memset(txbd, 0, BCM_PAGE_SIZE);
4601
4602         buf_map = udev->l2_buf_map;
4603         for (i = 0; i < MAX_TX_DESC_CNT; i += 3, txbd += 3) {
4604                 struct eth_tx_start_bd *start_bd = &txbd->start_bd;
4605                 struct eth_tx_bd *reg_bd = &((txbd + 2)->reg_bd);
4606
4607                 start_bd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
4608                 start_bd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
4609                 reg_bd->addr_hi = start_bd->addr_hi;
4610                 reg_bd->addr_lo = start_bd->addr_lo + 0x10;
4611                 start_bd->nbytes = cpu_to_le16(0x10);
4612                 start_bd->nbd = cpu_to_le16(3);
4613                 start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;
4614                 start_bd->general_data = (UNICAST_ADDRESS <<
4615                         ETH_TX_START_BD_ETH_ADDR_TYPE_SHIFT);
4616                 start_bd->general_data |= (1 << ETH_TX_START_BD_HDR_NBDS_SHIFT);
4617
4618         }
4619
4620         val = (u64) ring_map >> 32;
4621         txbd->next_bd.addr_hi = cpu_to_le32(val);
4622
4623         data->tx.tx_bd_page_base.hi = cpu_to_le32(val);
4624
4625         val = (u64) ring_map & 0xffffffff;
4626         txbd->next_bd.addr_lo = cpu_to_le32(val);
4627
4628         data->tx.tx_bd_page_base.lo = cpu_to_le32(val);
4629
4630         /* Other ramrod params */
4631         data->tx.tx_sb_index_number = HC_SP_INDEX_ETH_ISCSI_CQ_CONS;
4632         data->tx.tx_status_block_id = BNX2X_DEF_SB_ID;
4633
4634         /* reset xstorm per client statistics */
4635         if (cli < MAX_STAT_COUNTER_ID) {
4636                 val = BAR_XSTRORM_INTMEM +
4637                       XSTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
4638                 for (i = 0; i < sizeof(struct xstorm_per_client_stats) / 4; i++)
4639                         CNIC_WR(dev, val + i * 4, 0);
4640         }
4641
4642         cp->tx_cons_ptr =
4643                 &sb->sp_sb.index_values[HC_SP_INDEX_ETH_ISCSI_CQ_CONS];
4644 }
4645
4646 static void cnic_init_bnx2x_rx_ring(struct cnic_dev *dev,
4647                                     struct client_init_ramrod_data *data)
4648 {
4649         struct cnic_local *cp = dev->cnic_priv;
4650         struct cnic_uio_dev *udev = cp->udev;
4651         struct eth_rx_bd *rxbd = (struct eth_rx_bd *) (udev->l2_ring +
4652                                 BCM_PAGE_SIZE);
4653         struct eth_rx_cqe_next_page *rxcqe = (struct eth_rx_cqe_next_page *)
4654                                 (udev->l2_ring + (2 * BCM_PAGE_SIZE));
4655         struct host_sp_status_block *sb = cp->bnx2x_def_status_blk;
4656         int i;
4657         int port = CNIC_PORT(cp);
4658         u32 cli = cp->ethdev->iscsi_l2_client_id;
4659         int cl_qzone_id = BNX2X_CL_QZONE_ID(cp, cli);
4660         u32 val;
4661         dma_addr_t ring_map = udev->l2_ring_map;
4662
4663         /* General data */
4664         data->general.client_id = cli;
4665         data->general.statistics_en_flg = 1;
4666         data->general.statistics_counter_id = cli;
4667         data->general.activate_flg = 1;
4668         data->general.sp_client_id = cli;
4669
4670         for (i = 0; i < BNX2X_MAX_RX_DESC_CNT; i++, rxbd++) {
4671                 dma_addr_t buf_map;
4672                 int n = (i % cp->l2_rx_ring_size) + 1;
4673
4674                 buf_map = udev->l2_buf_map + (n * cp->l2_single_buf_size);
4675                 rxbd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
4676                 rxbd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
4677         }
4678
4679         val = (u64) (ring_map + BCM_PAGE_SIZE) >> 32;
4680         rxbd->addr_hi = cpu_to_le32(val);
4681         data->rx.bd_page_base.hi = cpu_to_le32(val);
4682
4683         val = (u64) (ring_map + BCM_PAGE_SIZE) & 0xffffffff;
4684         rxbd->addr_lo = cpu_to_le32(val);
4685         data->rx.bd_page_base.lo = cpu_to_le32(val);
4686
4687         rxcqe += BNX2X_MAX_RCQ_DESC_CNT;
4688         val = (u64) (ring_map + (2 * BCM_PAGE_SIZE)) >> 32;
4689         rxcqe->addr_hi = cpu_to_le32(val);
4690         data->rx.cqe_page_base.hi = cpu_to_le32(val);
4691
4692         val = (u64) (ring_map + (2 * BCM_PAGE_SIZE)) & 0xffffffff;
4693         rxcqe->addr_lo = cpu_to_le32(val);
4694         data->rx.cqe_page_base.lo = cpu_to_le32(val);
4695
4696         /* Other ramrod params */
4697         data->rx.client_qzone_id = cl_qzone_id;
4698         data->rx.rx_sb_index_number = HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS;
4699         data->rx.status_block_id = BNX2X_DEF_SB_ID;
4700
4701         data->rx.cache_line_alignment_log_size = L1_CACHE_SHIFT;
4702         data->rx.bd_buff_size = cpu_to_le16(cp->l2_single_buf_size);
4703
4704         data->rx.mtu = cpu_to_le16(cp->l2_single_buf_size - 14);
4705         data->rx.outer_vlan_removal_enable_flg = 1;
4706
4707         /* reset tstorm and ustorm per client statistics */
4708         if (cli < MAX_STAT_COUNTER_ID) {
4709                 val = BAR_TSTRORM_INTMEM +
4710                       TSTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
4711                 for (i = 0; i < sizeof(struct tstorm_per_client_stats) / 4; i++)
4712                         CNIC_WR(dev, val + i * 4, 0);
4713
4714                 val = BAR_USTRORM_INTMEM +
4715                       USTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
4716                 for (i = 0; i < sizeof(struct ustorm_per_client_stats) / 4; i++)
4717                         CNIC_WR(dev, val + i * 4, 0);
4718         }
4719
4720         cp->rx_cons_ptr =
4721                 &sb->sp_sb.index_values[HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS];
4722         cp->rx_cons = *cp->rx_cons_ptr;
4723 }
4724
4725 static int cnic_read_bnx2x_iscsi_mac(struct cnic_dev *dev, u32 upper_addr,
4726                                      u32 lower_addr)
4727 {
4728         u32 val;
4729         u8 mac[6];
4730
4731         val = CNIC_RD(dev, upper_addr);
4732
4733         mac[0] = (u8) (val >> 8);
4734         mac[1] = (u8) val;
4735
4736         val = CNIC_RD(dev, lower_addr);
4737
4738         mac[2] = (u8) (val >> 24);
4739         mac[3] = (u8) (val >> 16);
4740         mac[4] = (u8) (val >> 8);
4741         mac[5] = (u8) val;
4742
4743         if (is_valid_ether_addr(mac)) {
4744                 memcpy(dev->mac_addr, mac, 6);
4745                 return 0;
4746         } else {
4747                 return -EINVAL;
4748         }
4749 }
4750
4751 static void cnic_get_bnx2x_iscsi_info(struct cnic_dev *dev)
4752 {
4753         struct cnic_local *cp = dev->cnic_priv;
4754         u32 base, base2, addr, addr1, val;
4755         int port = CNIC_PORT(cp);
4756
4757         dev->max_iscsi_conn = 0;
4758         base = CNIC_RD(dev, MISC_REG_SHARED_MEM_ADDR);
4759         if (base == 0)
4760                 return;
4761
4762         base2 = CNIC_RD(dev, (CNIC_PATH(cp) ? MISC_REG_GENERIC_CR_1 :
4763                                               MISC_REG_GENERIC_CR_0));
4764         addr = BNX2X_SHMEM_ADDR(base,
4765                 dev_info.port_hw_config[port].iscsi_mac_upper);
4766
4767         addr1 = BNX2X_SHMEM_ADDR(base,
4768                 dev_info.port_hw_config[port].iscsi_mac_lower);
4769
4770         cnic_read_bnx2x_iscsi_mac(dev, addr, addr1);
4771
4772         addr = BNX2X_SHMEM_ADDR(base, validity_map[port]);
4773         val = CNIC_RD(dev, addr);
4774
4775         if (!(val & SHR_MEM_VALIDITY_LIC_NO_KEY_IN_EFFECT)) {
4776                 u16 val16;
4777
4778                 addr = BNX2X_SHMEM_ADDR(base,
4779                                 drv_lic_key[port].max_iscsi_init_conn);
4780                 val16 = CNIC_RD16(dev, addr);
4781
4782                 if (val16)
4783                         val16 ^= 0x1e1e;
4784                 dev->max_iscsi_conn = val16;
4785         }
4786
4787         if (BNX2X_CHIP_IS_E2(cp->chip_id))
4788                 dev->max_fcoe_conn = BNX2X_FCOE_NUM_CONNECTIONS;
4789
4790         if (BNX2X_CHIP_IS_E1H(cp->chip_id) || BNX2X_CHIP_IS_E2(cp->chip_id)) {
4791                 int func = CNIC_FUNC(cp);
4792                 u32 mf_cfg_addr;
4793
4794                 if (BNX2X_SHMEM2_HAS(base2, mf_cfg_addr))
4795                         mf_cfg_addr = CNIC_RD(dev, BNX2X_SHMEM2_ADDR(base2,
4796                                               mf_cfg_addr));
4797                 else
4798                         mf_cfg_addr = base + BNX2X_SHMEM_MF_BLK_OFFSET;
4799
4800                 if (BNX2X_CHIP_IS_E2(cp->chip_id)) {
4801                         /* Must determine if the MF is SD vs SI mode */
4802                         addr = BNX2X_SHMEM_ADDR(base,
4803                                         dev_info.shared_feature_config.config);
4804                         val = CNIC_RD(dev, addr);
4805                         if ((val & SHARED_FEAT_CFG_FORCE_SF_MODE_MASK) ==
4806                             SHARED_FEAT_CFG_FORCE_SF_MODE_SWITCH_INDEPT) {
4807                                 int rc;
4808
4809                                 /* MULTI_FUNCTION_SI mode */
4810                                 addr = BNX2X_MF_CFG_ADDR(mf_cfg_addr,
4811                                         func_ext_config[func].func_cfg);
4812                                 val = CNIC_RD(dev, addr);
4813                                 if (!(val & MACP_FUNC_CFG_FLAGS_ISCSI_OFFLOAD))
4814                                         dev->max_iscsi_conn = 0;
4815
4816                                 if (!(val & MACP_FUNC_CFG_FLAGS_FCOE_OFFLOAD))
4817                                         dev->max_fcoe_conn = 0;
4818
4819                                 addr = BNX2X_MF_CFG_ADDR(mf_cfg_addr,
4820                                         func_ext_config[func].
4821                                         iscsi_mac_addr_upper);
4822                                 addr1 = BNX2X_MF_CFG_ADDR(mf_cfg_addr,
4823                                         func_ext_config[func].
4824                                         iscsi_mac_addr_lower);
4825                                 rc = cnic_read_bnx2x_iscsi_mac(dev, addr,
4826                                                                 addr1);
4827                                 if (rc && func > 1)
4828                                         dev->max_iscsi_conn = 0;
4829
4830                                 return;
4831                         }
4832                 }
4833
4834                 addr = BNX2X_MF_CFG_ADDR(mf_cfg_addr,
4835                         func_mf_config[func].e1hov_tag);
4836
4837                 val = CNIC_RD(dev, addr);
4838                 val &= FUNC_MF_CFG_E1HOV_TAG_MASK;
4839                 if (val != FUNC_MF_CFG_E1HOV_TAG_DEFAULT) {
4840                         dev->max_fcoe_conn = 0;
4841                         dev->max_iscsi_conn = 0;
4842                 }
4843         }
4844         if (!is_valid_ether_addr(dev->mac_addr))
4845                 dev->max_iscsi_conn = 0;
4846 }
4847
4848 static void cnic_init_bnx2x_kcq(struct cnic_dev *dev)
4849 {
4850         struct cnic_local *cp = dev->cnic_priv;
4851         u32 pfid = cp->pfid;
4852
4853         cp->kcq1.io_addr = BAR_CSTRORM_INTMEM +
4854                            CSTORM_ISCSI_EQ_PROD_OFFSET(pfid, 0);
4855         cp->kcq1.sw_prod_idx = 0;
4856
4857         if (BNX2X_CHIP_IS_E2(cp->chip_id)) {
4858                 struct host_hc_status_block_e2 *sb = cp->status_blk.gen;
4859
4860                 cp->kcq1.hw_prod_idx_ptr =
4861                         &sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS];
4862                 cp->kcq1.status_idx_ptr =
4863                         &sb->sb.running_index[SM_RX_ID];
4864         } else {
4865                 struct host_hc_status_block_e1x *sb = cp->status_blk.gen;
4866
4867                 cp->kcq1.hw_prod_idx_ptr =
4868                         &sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS];
4869                 cp->kcq1.status_idx_ptr =
4870                         &sb->sb.running_index[SM_RX_ID];
4871         }
4872
4873         if (BNX2X_CHIP_IS_E2(cp->chip_id)) {
4874                 struct host_hc_status_block_e2 *sb = cp->status_blk.gen;
4875
4876                 cp->kcq2.io_addr = BAR_USTRORM_INTMEM +
4877                                         USTORM_FCOE_EQ_PROD_OFFSET(pfid);
4878                 cp->kcq2.sw_prod_idx = 0;
4879                 cp->kcq2.hw_prod_idx_ptr =
4880                         &sb->sb.index_values[HC_INDEX_FCOE_EQ_CONS];
4881                 cp->kcq2.status_idx_ptr =
4882                         &sb->sb.running_index[SM_RX_ID];
4883         }
4884 }
4885
4886 static int cnic_start_bnx2x_hw(struct cnic_dev *dev)
4887 {
4888         struct cnic_local *cp = dev->cnic_priv;
4889         struct cnic_eth_dev *ethdev = cp->ethdev;
4890         int func = CNIC_FUNC(cp), ret, i;
4891         u32 pfid;
4892
4893         if (BNX2X_CHIP_IS_E2(cp->chip_id)) {
4894                 u32 val = CNIC_RD(dev, MISC_REG_PORT4MODE_EN_OVWR);
4895
4896                 if (!(val & 1))
4897                         val = CNIC_RD(dev, MISC_REG_PORT4MODE_EN);
4898                 else
4899                         val = (val >> 1) & 1;
4900
4901                 if (val)
4902                         cp->pfid = func >> 1;
4903                 else
4904                         cp->pfid = func & 0x6;
4905         } else {
4906                 cp->pfid = func;
4907         }
4908         pfid = cp->pfid;
4909
4910         ret = cnic_init_id_tbl(&cp->cid_tbl, MAX_ISCSI_TBL_SZ,
4911                                cp->iscsi_start_cid);
4912
4913         if (ret)
4914                 return -ENOMEM;
4915
4916         if (BNX2X_CHIP_IS_E2(cp->chip_id)) {
4917                 ret = cnic_init_id_tbl(&cp->fcoe_cid_tbl,
4918                                         BNX2X_FCOE_NUM_CONNECTIONS,
4919                                         cp->fcoe_start_cid);
4920
4921                 if (ret)
4922                         return -ENOMEM;
4923         }
4924
4925         cp->bnx2x_igu_sb_id = ethdev->irq_arr[0].status_blk_num2;
4926
4927         cnic_init_bnx2x_kcq(dev);
4928
4929         cnic_get_bnx2x_iscsi_info(dev);
4930
4931         /* Only 1 EQ */
4932         CNIC_WR16(dev, cp->kcq1.io_addr, MAX_KCQ_IDX);
4933         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4934                 CSTORM_ISCSI_EQ_CONS_OFFSET(pfid, 0), 0);
4935         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4936                 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfid, 0),
4937                 cp->kcq1.dma.pg_map_arr[1] & 0xffffffff);
4938         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4939                 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfid, 0) + 4,
4940                 (u64) cp->kcq1.dma.pg_map_arr[1] >> 32);
4941         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4942                 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfid, 0),
4943                 cp->kcq1.dma.pg_map_arr[0] & 0xffffffff);
4944         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4945                 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfid, 0) + 4,
4946                 (u64) cp->kcq1.dma.pg_map_arr[0] >> 32);
4947         CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4948                 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfid, 0), 1);
4949         CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
4950                 CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfid, 0), cp->status_blk_num);
4951         CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4952                 CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfid, 0),
4953                 HC_INDEX_ISCSI_EQ_CONS);
4954
4955         for (i = 0; i < cp->conn_buf_info.num_pages; i++) {
4956                 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4957                         TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(pfid, i),
4958                         cp->conn_buf_info.pgtbl[2 * i]);
4959                 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4960                         TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(pfid, i) + 4,
4961                         cp->conn_buf_info.pgtbl[(2 * i) + 1]);
4962         }
4963
4964         CNIC_WR(dev, BAR_USTRORM_INTMEM +
4965                 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfid),
4966                 cp->gbl_buf_info.pg_map_arr[0] & 0xffffffff);
4967         CNIC_WR(dev, BAR_USTRORM_INTMEM +
4968                 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfid) + 4,
4969                 (u64) cp->gbl_buf_info.pg_map_arr[0] >> 32);
4970
4971         CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4972                 TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfid), DEF_RCV_BUF);
4973
4974         cnic_setup_bnx2x_context(dev);
4975
4976         ret = cnic_init_bnx2x_irq(dev);
4977         if (ret)
4978                 return ret;
4979
4980         return 0;
4981 }
4982
4983 static void cnic_init_rings(struct cnic_dev *dev)
4984 {
4985         struct cnic_local *cp = dev->cnic_priv;
4986         struct cnic_uio_dev *udev = cp->udev;
4987
4988         if (test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
4989                 return;
4990
4991         if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
4992                 cnic_init_bnx2_tx_ring(dev);
4993                 cnic_init_bnx2_rx_ring(dev);
4994                 set_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
4995         } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
4996                 u32 cli = cp->ethdev->iscsi_l2_client_id;
4997                 u32 cid = cp->ethdev->iscsi_l2_cid;
4998                 u32 cl_qzone_id;
4999                 struct client_init_ramrod_data *data;
5000                 union l5cm_specific_data l5_data;
5001                 struct ustorm_eth_rx_producers rx_prods = {0};
5002                 u32 off, i;
5003
5004                 rx_prods.bd_prod = 0;
5005                 rx_prods.cqe_prod = BNX2X_MAX_RCQ_DESC_CNT;
5006                 barrier();
5007
5008                 cl_qzone_id = BNX2X_CL_QZONE_ID(cp, cli);
5009
5010                 off = BAR_USTRORM_INTMEM +
5011                         (BNX2X_CHIP_IS_E2(cp->chip_id) ?
5012                          USTORM_RX_PRODS_E2_OFFSET(cl_qzone_id) :
5013                          USTORM_RX_PRODS_E1X_OFFSET(CNIC_PORT(cp), cli));
5014
5015                 for (i = 0; i < sizeof(struct ustorm_eth_rx_producers) / 4; i++)
5016                         CNIC_WR(dev, off + i * 4, ((u32 *) &rx_prods)[i]);
5017
5018                 set_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
5019
5020                 data = udev->l2_buf;
5021
5022                 memset(data, 0, sizeof(*data));
5023
5024                 cnic_init_bnx2x_tx_ring(dev, data);
5025                 cnic_init_bnx2x_rx_ring(dev, data);
5026
5027                 l5_data.phy_address.lo = udev->l2_buf_map & 0xffffffff;
5028                 l5_data.phy_address.hi = (u64) udev->l2_buf_map >> 32;
5029
5030                 set_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
5031
5032                 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CLIENT_SETUP,
5033                         cid, ETH_CONNECTION_TYPE, &l5_data);
5034
5035                 i = 0;
5036                 while (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags) &&
5037                        ++i < 10)
5038                         msleep(1);
5039
5040                 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
5041                         netdev_err(dev->netdev,
5042                                 "iSCSI CLIENT_SETUP did not complete\n");
5043                 cnic_spq_completion(dev, DRV_CTL_RET_L2_SPQ_CREDIT_CMD, 1);
5044                 cnic_ring_ctl(dev, cid, cli, 1);
5045         }
5046 }
5047
5048 static void cnic_shutdown_rings(struct cnic_dev *dev)
5049 {
5050         struct cnic_local *cp = dev->cnic_priv;
5051
5052         if (!test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
5053                 return;
5054
5055         if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
5056                 cnic_shutdown_bnx2_rx_ring(dev);
5057         } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
5058                 struct cnic_local *cp = dev->cnic_priv;
5059                 u32 cli = cp->ethdev->iscsi_l2_client_id;
5060                 u32 cid = cp->ethdev->iscsi_l2_cid;
5061                 union l5cm_specific_data l5_data;
5062                 int i;
5063
5064                 cnic_ring_ctl(dev, cid, cli, 0);
5065
5066                 set_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
5067
5068                 l5_data.phy_address.lo = cli;
5069                 l5_data.phy_address.hi = 0;
5070                 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_HALT,
5071                         cid, ETH_CONNECTION_TYPE, &l5_data);
5072                 i = 0;
5073                 while (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags) &&
5074                        ++i < 10)
5075                         msleep(1);
5076
5077                 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
5078                         netdev_err(dev->netdev,
5079                                 "iSCSI CLIENT_HALT did not complete\n");
5080                 cnic_spq_completion(dev, DRV_CTL_RET_L2_SPQ_CREDIT_CMD, 1);
5081
5082                 memset(&l5_data, 0, sizeof(l5_data));
5083                 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_COMMON_CFC_DEL,
5084                         cid, NONE_CONNECTION_TYPE, &l5_data);
5085                 msleep(10);
5086         }
5087         clear_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
5088 }
5089
5090 static int cnic_register_netdev(struct cnic_dev *dev)
5091 {
5092         struct cnic_local *cp = dev->cnic_priv;
5093         struct cnic_eth_dev *ethdev = cp->ethdev;
5094         int err;
5095
5096         if (!ethdev)
5097                 return -ENODEV;
5098
5099         if (ethdev->drv_state & CNIC_DRV_STATE_REGD)
5100                 return 0;
5101
5102         err = ethdev->drv_register_cnic(dev->netdev, cp->cnic_ops, dev);
5103         if (err)
5104                 netdev_err(dev->netdev, "register_cnic failed\n");
5105
5106         return err;
5107 }
5108
5109 static void cnic_unregister_netdev(struct cnic_dev *dev)
5110 {
5111         struct cnic_local *cp = dev->cnic_priv;
5112         struct cnic_eth_dev *ethdev = cp->ethdev;
5113
5114         if (!ethdev)
5115                 return;
5116
5117         ethdev->drv_unregister_cnic(dev->netdev);
5118 }
5119
5120 static int cnic_start_hw(struct cnic_dev *dev)
5121 {
5122         struct cnic_local *cp = dev->cnic_priv;
5123         struct cnic_eth_dev *ethdev = cp->ethdev;
5124         int err;
5125
5126         if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
5127                 return -EALREADY;
5128
5129         dev->regview = ethdev->io_base;
5130         pci_dev_get(dev->pcidev);
5131         cp->func = PCI_FUNC(dev->pcidev->devfn);
5132         cp->status_blk.gen = ethdev->irq_arr[0].status_blk;
5133         cp->status_blk_num = ethdev->irq_arr[0].status_blk_num;
5134
5135         err = cp->alloc_resc(dev);
5136         if (err) {
5137                 netdev_err(dev->netdev, "allocate resource failure\n");
5138                 goto err1;
5139         }
5140
5141         err = cp->start_hw(dev);
5142         if (err)
5143                 goto err1;
5144
5145         err = cnic_cm_open(dev);
5146         if (err)
5147                 goto err1;
5148
5149         set_bit(CNIC_F_CNIC_UP, &dev->flags);
5150
5151         cp->enable_int(dev);
5152
5153         return 0;
5154
5155 err1:
5156         cp->free_resc(dev);
5157         pci_dev_put(dev->pcidev);
5158         return err;
5159 }
5160
5161 static void cnic_stop_bnx2_hw(struct cnic_dev *dev)
5162 {
5163         cnic_disable_bnx2_int_sync(dev);
5164
5165         cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
5166         cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
5167
5168         cnic_init_context(dev, KWQ_CID);
5169         cnic_init_context(dev, KCQ_CID);
5170
5171         cnic_setup_5709_context(dev, 0);
5172         cnic_free_irq(dev);
5173
5174         cnic_free_resc(dev);
5175 }
5176
5177
5178 static void cnic_stop_bnx2x_hw(struct cnic_dev *dev)
5179 {
5180         struct cnic_local *cp = dev->cnic_priv;
5181
5182         cnic_free_irq(dev);
5183         *cp->kcq1.hw_prod_idx_ptr = 0;
5184         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5185                 CSTORM_ISCSI_EQ_CONS_OFFSET(cp->pfid, 0), 0);
5186         CNIC_WR16(dev, cp->kcq1.io_addr, 0);
5187         cnic_free_resc(dev);
5188 }
5189
5190 static void cnic_stop_hw(struct cnic_dev *dev)
5191 {
5192         if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
5193                 struct cnic_local *cp = dev->cnic_priv;
5194                 int i = 0;
5195
5196                 /* Need to wait for the ring shutdown event to complete
5197                  * before clearing the CNIC_UP flag.
5198                  */
5199                 while (cp->udev->uio_dev != -1 && i < 15) {
5200                         msleep(100);
5201                         i++;
5202                 }
5203                 cnic_shutdown_rings(dev);
5204                 clear_bit(CNIC_F_CNIC_UP, &dev->flags);
5205                 rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], NULL);
5206                 synchronize_rcu();
5207                 cnic_cm_shutdown(dev);
5208                 cp->stop_hw(dev);
5209                 pci_dev_put(dev->pcidev);
5210         }
5211 }
5212
5213 static void cnic_free_dev(struct cnic_dev *dev)
5214 {
5215         int i = 0;
5216
5217         while ((atomic_read(&dev->ref_count) != 0) && i < 10) {
5218                 msleep(100);
5219                 i++;
5220         }
5221         if (atomic_read(&dev->ref_count) != 0)
5222                 netdev_err(dev->netdev, "Failed waiting for ref count to go to zero\n");
5223
5224         netdev_info(dev->netdev, "Removed CNIC device\n");
5225         dev_put(dev->netdev);
5226         kfree(dev);
5227 }
5228
5229 static struct cnic_dev *cnic_alloc_dev(struct net_device *dev,
5230                                        struct pci_dev *pdev)
5231 {
5232         struct cnic_dev *cdev;
5233         struct cnic_local *cp;
5234         int alloc_size;
5235
5236         alloc_size = sizeof(struct cnic_dev) + sizeof(struct cnic_local);
5237
5238         cdev = kzalloc(alloc_size , GFP_KERNEL);
5239         if (cdev == NULL) {
5240                 netdev_err(dev, "allocate dev struct failure\n");
5241                 return NULL;
5242         }
5243
5244         cdev->netdev = dev;
5245         cdev->cnic_priv = (char *)cdev + sizeof(struct cnic_dev);
5246         cdev->register_device = cnic_register_device;
5247         cdev->unregister_device = cnic_unregister_device;
5248         cdev->iscsi_nl_msg_recv = cnic_iscsi_nl_msg_recv;
5249
5250         cp = cdev->cnic_priv;
5251         cp->dev = cdev;
5252         cp->l2_single_buf_size = 0x400;
5253         cp->l2_rx_ring_size = 3;
5254
5255         spin_lock_init(&cp->cnic_ulp_lock);
5256
5257         netdev_info(dev, "Added CNIC device\n");
5258
5259         return cdev;
5260 }
5261
5262 static struct cnic_dev *init_bnx2_cnic(struct net_device *dev)
5263 {
5264         struct pci_dev *pdev;
5265         struct cnic_dev *cdev;
5266         struct cnic_local *cp;
5267         struct cnic_eth_dev *ethdev = NULL;
5268         struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
5269
5270         probe = symbol_get(bnx2_cnic_probe);
5271         if (probe) {
5272                 ethdev = (*probe)(dev);
5273                 symbol_put(bnx2_cnic_probe);
5274         }
5275         if (!ethdev)
5276                 return NULL;
5277
5278         pdev = ethdev->pdev;
5279         if (!pdev)
5280                 return NULL;
5281
5282         dev_hold(dev);
5283         pci_dev_get(pdev);
5284         if (pdev->device == PCI_DEVICE_ID_NX2_5709 ||
5285             pdev->device == PCI_DEVICE_ID_NX2_5709S) {
5286                 u8 rev;
5287
5288                 pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
5289                 if (rev < 0x10) {
5290                         pci_dev_put(pdev);
5291                         goto cnic_err;
5292                 }
5293         }
5294         pci_dev_put(pdev);
5295
5296         cdev = cnic_alloc_dev(dev, pdev);
5297         if (cdev == NULL)
5298                 goto cnic_err;
5299
5300         set_bit(CNIC_F_BNX2_CLASS, &cdev->flags);
5301         cdev->submit_kwqes = cnic_submit_bnx2_kwqes;
5302
5303         cp = cdev->cnic_priv;
5304         cp->ethdev = ethdev;
5305         cdev->pcidev = pdev;
5306         cp->chip_id = ethdev->chip_id;
5307
5308         cp->cnic_ops = &cnic_bnx2_ops;
5309         cp->start_hw = cnic_start_bnx2_hw;
5310         cp->stop_hw = cnic_stop_bnx2_hw;
5311         cp->setup_pgtbl = cnic_setup_page_tbl;
5312         cp->alloc_resc = cnic_alloc_bnx2_resc;
5313         cp->free_resc = cnic_free_resc;
5314         cp->start_cm = cnic_cm_init_bnx2_hw;
5315         cp->stop_cm = cnic_cm_stop_bnx2_hw;
5316         cp->enable_int = cnic_enable_bnx2_int;
5317         cp->disable_int_sync = cnic_disable_bnx2_int_sync;
5318         cp->close_conn = cnic_close_bnx2_conn;
5319         cp->next_idx = cnic_bnx2_next_idx;
5320         cp->hw_idx = cnic_bnx2_hw_idx;
5321         return cdev;
5322
5323 cnic_err:
5324         dev_put(dev);
5325         return NULL;
5326 }
5327
5328 static struct cnic_dev *init_bnx2x_cnic(struct net_device *dev)
5329 {
5330         struct pci_dev *pdev;
5331         struct cnic_dev *cdev;
5332         struct cnic_local *cp;
5333         struct cnic_eth_dev *ethdev = NULL;
5334         struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
5335
5336         probe = symbol_get(bnx2x_cnic_probe);
5337         if (probe) {
5338                 ethdev = (*probe)(dev);
5339                 symbol_put(bnx2x_cnic_probe);
5340         }
5341         if (!ethdev)
5342                 return NULL;
5343
5344         pdev = ethdev->pdev;
5345         if (!pdev)
5346                 return NULL;
5347
5348         dev_hold(dev);
5349         cdev = cnic_alloc_dev(dev, pdev);
5350         if (cdev == NULL) {
5351                 dev_put(dev);
5352                 return NULL;
5353         }
5354
5355         set_bit(CNIC_F_BNX2X_CLASS, &cdev->flags);
5356         cdev->submit_kwqes = cnic_submit_bnx2x_kwqes;
5357
5358         cp = cdev->cnic_priv;
5359         cp->ethdev = ethdev;
5360         cdev->pcidev = pdev;
5361         cp->chip_id = ethdev->chip_id;
5362
5363         cp->cnic_ops = &cnic_bnx2x_ops;
5364         cp->start_hw = cnic_start_bnx2x_hw;
5365         cp->stop_hw = cnic_stop_bnx2x_hw;
5366         cp->setup_pgtbl = cnic_setup_page_tbl_le;
5367         cp->alloc_resc = cnic_alloc_bnx2x_resc;
5368         cp->free_resc = cnic_free_resc;
5369         cp->start_cm = cnic_cm_init_bnx2x_hw;
5370         cp->stop_cm = cnic_cm_stop_bnx2x_hw;
5371         cp->enable_int = cnic_enable_bnx2x_int;
5372         cp->disable_int_sync = cnic_disable_bnx2x_int_sync;
5373         if (BNX2X_CHIP_IS_E2(cp->chip_id))
5374                 cp->ack_int = cnic_ack_bnx2x_e2_msix;
5375         else
5376                 cp->ack_int = cnic_ack_bnx2x_msix;
5377         cp->close_conn = cnic_close_bnx2x_conn;
5378         cp->next_idx = cnic_bnx2x_next_idx;
5379         cp->hw_idx = cnic_bnx2x_hw_idx;
5380         return cdev;
5381 }
5382
5383 static struct cnic_dev *is_cnic_dev(struct net_device *dev)
5384 {
5385         struct ethtool_drvinfo drvinfo;
5386         struct cnic_dev *cdev = NULL;
5387
5388         if (dev->ethtool_ops && dev->ethtool_ops->get_drvinfo) {
5389                 memset(&drvinfo, 0, sizeof(drvinfo));
5390                 dev->ethtool_ops->get_drvinfo(dev, &drvinfo);
5391
5392                 if (!strcmp(drvinfo.driver, "bnx2"))
5393                         cdev = init_bnx2_cnic(dev);
5394                 if (!strcmp(drvinfo.driver, "bnx2x"))
5395                         cdev = init_bnx2x_cnic(dev);
5396                 if (cdev) {
5397                         write_lock(&cnic_dev_lock);
5398                         list_add(&cdev->list, &cnic_dev_list);
5399                         write_unlock(&cnic_dev_lock);
5400                 }
5401         }
5402         return cdev;
5403 }
5404
5405 /**
5406  * netdev event handler
5407  */
5408 static int cnic_netdev_event(struct notifier_block *this, unsigned long event,
5409                                                          void *ptr)
5410 {
5411         struct net_device *netdev = ptr;
5412         struct cnic_dev *dev;
5413         int if_type;
5414         int new_dev = 0;
5415
5416         dev = cnic_from_netdev(netdev);
5417
5418         if (!dev && (event == NETDEV_REGISTER || event == NETDEV_UP)) {
5419                 /* Check for the hot-plug device */
5420                 dev = is_cnic_dev(netdev);
5421                 if (dev) {
5422                         new_dev = 1;
5423                         cnic_hold(dev);
5424                 }
5425         }
5426         if (dev) {
5427                 struct cnic_local *cp = dev->cnic_priv;
5428
5429                 if (new_dev)
5430                         cnic_ulp_init(dev);
5431                 else if (event == NETDEV_UNREGISTER)
5432                         cnic_ulp_exit(dev);
5433
5434                 if (event == NETDEV_UP) {
5435                         if (cnic_register_netdev(dev) != 0) {
5436                                 cnic_put(dev);
5437                                 goto done;
5438                         }
5439                         if (!cnic_start_hw(dev))
5440                                 cnic_ulp_start(dev);
5441                 }
5442
5443                 rcu_read_lock();
5444                 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
5445                         struct cnic_ulp_ops *ulp_ops;
5446                         void *ctx;
5447
5448                         ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
5449                         if (!ulp_ops || !ulp_ops->indicate_netevent)
5450                                 continue;
5451
5452                         ctx = cp->ulp_handle[if_type];
5453
5454                         ulp_ops->indicate_netevent(ctx, event);
5455                 }
5456                 rcu_read_unlock();
5457
5458                 if (event == NETDEV_GOING_DOWN) {
5459                         cnic_ulp_stop(dev);
5460                         cnic_stop_hw(dev);
5461                         cnic_unregister_netdev(dev);
5462                 } else if (event == NETDEV_UNREGISTER) {
5463                         write_lock(&cnic_dev_lock);
5464                         list_del_init(&dev->list);
5465                         write_unlock(&cnic_dev_lock);
5466
5467                         cnic_put(dev);
5468                         cnic_free_dev(dev);
5469                         goto done;
5470                 }
5471                 cnic_put(dev);
5472         }
5473 done:
5474         return NOTIFY_DONE;
5475 }
5476
5477 static struct notifier_block cnic_netdev_notifier = {
5478         .notifier_call = cnic_netdev_event
5479 };
5480
5481 static void cnic_release(void)
5482 {
5483         struct cnic_dev *dev;
5484         struct cnic_uio_dev *udev;
5485
5486         while (!list_empty(&cnic_dev_list)) {
5487                 dev = list_entry(cnic_dev_list.next, struct cnic_dev, list);
5488                 if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
5489                         cnic_ulp_stop(dev);
5490                         cnic_stop_hw(dev);
5491                 }
5492
5493                 cnic_ulp_exit(dev);
5494                 cnic_unregister_netdev(dev);
5495                 list_del_init(&dev->list);
5496                 cnic_free_dev(dev);
5497         }
5498         while (!list_empty(&cnic_udev_list)) {
5499                 udev = list_entry(cnic_udev_list.next, struct cnic_uio_dev,
5500                                   list);
5501                 cnic_free_uio(udev);
5502         }
5503 }
5504
5505 static int __init cnic_init(void)
5506 {
5507         int rc = 0;
5508
5509         pr_info("%s", version);
5510
5511         rc = register_netdevice_notifier(&cnic_netdev_notifier);
5512         if (rc) {
5513                 cnic_release();
5514                 return rc;
5515         }
5516
5517         cnic_wq = create_singlethread_workqueue("cnic_wq");
5518         if (!cnic_wq) {
5519                 cnic_release();
5520                 unregister_netdevice_notifier(&cnic_netdev_notifier);
5521                 return -ENOMEM;
5522         }
5523
5524         return 0;
5525 }
5526
5527 static void __exit cnic_exit(void)
5528 {
5529         unregister_netdevice_notifier(&cnic_netdev_notifier);
5530         cnic_release();
5531         destroy_workqueue(cnic_wq);
5532 }
5533
5534 module_init(cnic_init);
5535 module_exit(cnic_exit);