2 * Copyright (C) 2005 - 2010 ServerEngines
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
10 * Contact Information:
11 * linux-drivers@serverengines.com
14 * 209 N. Fair Oaks Ave
20 #include <asm/div64.h>
22 MODULE_VERSION(DRV_VER);
23 MODULE_DEVICE_TABLE(pci, be_dev_ids);
24 MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
25 MODULE_AUTHOR("ServerEngines Corporation");
26 MODULE_LICENSE("GPL");
28 static unsigned int rx_frag_size = 2048;
29 static unsigned int num_vfs;
30 module_param(rx_frag_size, uint, S_IRUGO);
31 module_param(num_vfs, uint, S_IRUGO);
32 MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
33 MODULE_PARM_DESC(num_vfs, "Number of PCI VFs to initialize");
35 static bool multi_rxq = true;
36 module_param(multi_rxq, bool, S_IRUGO | S_IWUSR);
37 MODULE_PARM_DESC(multi_rxq, "Multi Rx Queue support. Enabled by default");
39 static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
40 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
41 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
42 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
43 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
46 MODULE_DEVICE_TABLE(pci, be_dev_ids);
47 /* UE Status Low CSR */
48 static char *ue_status_low_desc[] = {
82 /* UE Status High CSR */
83 static char *ue_status_hi_desc[] = {
118 static inline bool be_multi_rxq(struct be_adapter *adapter)
120 return (adapter->num_rx_qs > 1);
123 static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
125 struct be_dma_mem *mem = &q->dma_mem;
127 pci_free_consistent(adapter->pdev, mem->size,
131 static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
132 u16 len, u16 entry_size)
134 struct be_dma_mem *mem = &q->dma_mem;
136 memset(q, 0, sizeof(*q));
138 q->entry_size = entry_size;
139 mem->size = len * entry_size;
140 mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
143 memset(mem->va, 0, mem->size);
147 static void be_intr_set(struct be_adapter *adapter, bool enable)
149 u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
150 u32 reg = ioread32(addr);
151 u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
153 if (adapter->eeh_err)
156 if (!enabled && enable)
157 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
158 else if (enabled && !enable)
159 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
163 iowrite32(reg, addr);
166 static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
169 val |= qid & DB_RQ_RING_ID_MASK;
170 val |= posted << DB_RQ_NUM_POSTED_SHIFT;
173 iowrite32(val, adapter->db + DB_RQ_OFFSET);
176 static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
179 val |= qid & DB_TXULP_RING_ID_MASK;
180 val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
183 iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
186 static void be_eq_notify(struct be_adapter *adapter, u16 qid,
187 bool arm, bool clear_int, u16 num_popped)
190 val |= qid & DB_EQ_RING_ID_MASK;
192 if (adapter->eeh_err)
196 val |= 1 << DB_EQ_REARM_SHIFT;
198 val |= 1 << DB_EQ_CLR_SHIFT;
199 val |= 1 << DB_EQ_EVNT_SHIFT;
200 val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
201 iowrite32(val, adapter->db + DB_EQ_OFFSET);
204 void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
207 val |= qid & DB_CQ_RING_ID_MASK;
209 if (adapter->eeh_err)
213 val |= 1 << DB_CQ_REARM_SHIFT;
214 val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
215 iowrite32(val, adapter->db + DB_CQ_OFFSET);
218 static int be_mac_addr_set(struct net_device *netdev, void *p)
220 struct be_adapter *adapter = netdev_priv(netdev);
221 struct sockaddr *addr = p;
224 if (!is_valid_ether_addr(addr->sa_data))
225 return -EADDRNOTAVAIL;
227 /* MAC addr configuration will be done in hardware for VFs
228 * by their corresponding PFs. Just copy to netdev addr here
230 if (!be_physfn(adapter))
233 status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id);
237 status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
238 adapter->if_handle, &adapter->pmac_id);
241 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
246 void netdev_stats_update(struct be_adapter *adapter)
248 struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats_cmd.va);
249 struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
250 struct be_port_rxf_stats *port_stats =
251 &rxf_stats->port[adapter->port_num];
252 struct net_device_stats *dev_stats = &adapter->netdev->stats;
253 struct be_erx_stats *erx_stats = &hw_stats->erx;
254 struct be_rx_obj *rxo;
257 memset(dev_stats, 0, sizeof(*dev_stats));
258 for_all_rx_queues(adapter, rxo, i) {
259 dev_stats->rx_packets += rx_stats(rxo)->rx_pkts;
260 dev_stats->rx_bytes += rx_stats(rxo)->rx_bytes;
261 dev_stats->multicast += rx_stats(rxo)->rx_mcast_pkts;
262 /* no space in linux buffers: best possible approximation */
263 dev_stats->rx_dropped +=
264 erx_stats->rx_drops_no_fragments[rxo->q.id];
267 dev_stats->tx_packets = tx_stats(adapter)->be_tx_pkts;
268 dev_stats->tx_bytes = tx_stats(adapter)->be_tx_bytes;
270 /* bad pkts received */
271 dev_stats->rx_errors = port_stats->rx_crc_errors +
272 port_stats->rx_alignment_symbol_errors +
273 port_stats->rx_in_range_errors +
274 port_stats->rx_out_range_errors +
275 port_stats->rx_frame_too_long +
276 port_stats->rx_dropped_too_small +
277 port_stats->rx_dropped_too_short +
278 port_stats->rx_dropped_header_too_small +
279 port_stats->rx_dropped_tcp_length +
280 port_stats->rx_dropped_runt +
281 port_stats->rx_tcp_checksum_errs +
282 port_stats->rx_ip_checksum_errs +
283 port_stats->rx_udp_checksum_errs;
285 /* detailed rx errors */
286 dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
287 port_stats->rx_out_range_errors +
288 port_stats->rx_frame_too_long;
290 dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
292 /* frame alignment errors */
293 dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
295 /* receiver fifo overrun */
296 /* drops_no_pbuf is no per i/f, it's per BE card */
297 dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
298 port_stats->rx_input_fifo_overflow +
299 rxf_stats->rx_drops_no_pbuf;
302 void be_link_status_update(struct be_adapter *adapter, bool link_up)
304 struct net_device *netdev = adapter->netdev;
306 /* If link came up or went down */
307 if (adapter->link_up != link_up) {
308 adapter->link_speed = -1;
310 netif_start_queue(netdev);
311 netif_carrier_on(netdev);
312 printk(KERN_INFO "%s: Link up\n", netdev->name);
314 netif_stop_queue(netdev);
315 netif_carrier_off(netdev);
316 printk(KERN_INFO "%s: Link down\n", netdev->name);
318 adapter->link_up = link_up;
322 /* Update the EQ delay n BE based on the RX frags consumed / sec */
323 static void be_rx_eqd_update(struct be_adapter *adapter, struct be_rx_obj *rxo)
325 struct be_eq_obj *rx_eq = &rxo->rx_eq;
326 struct be_rx_stats *stats = &rxo->stats;
330 if (!rx_eq->enable_aic)
334 if (time_before(now, stats->rx_fps_jiffies)) {
335 stats->rx_fps_jiffies = now;
339 /* Update once a second */
340 if ((now - stats->rx_fps_jiffies) < HZ)
343 stats->rx_fps = (stats->rx_frags - stats->prev_rx_frags) /
344 ((now - stats->rx_fps_jiffies) / HZ);
346 stats->rx_fps_jiffies = now;
347 stats->prev_rx_frags = stats->rx_frags;
348 eqd = stats->rx_fps / 110000;
350 if (eqd > rx_eq->max_eqd)
351 eqd = rx_eq->max_eqd;
352 if (eqd < rx_eq->min_eqd)
353 eqd = rx_eq->min_eqd;
356 if (eqd != rx_eq->cur_eqd)
357 be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
359 rx_eq->cur_eqd = eqd;
362 static u32 be_calc_rate(u64 bytes, unsigned long ticks)
366 do_div(rate, ticks / HZ);
367 rate <<= 3; /* bytes/sec -> bits/sec */
368 do_div(rate, 1000000ul); /* MB/Sec */
373 static void be_tx_rate_update(struct be_adapter *adapter)
375 struct be_tx_stats *stats = tx_stats(adapter);
378 /* Wrapped around? */
379 if (time_before(now, stats->be_tx_jiffies)) {
380 stats->be_tx_jiffies = now;
384 /* Update tx rate once in two seconds */
385 if ((now - stats->be_tx_jiffies) > 2 * HZ) {
386 stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
387 - stats->be_tx_bytes_prev,
388 now - stats->be_tx_jiffies);
389 stats->be_tx_jiffies = now;
390 stats->be_tx_bytes_prev = stats->be_tx_bytes;
394 static void be_tx_stats_update(struct be_adapter *adapter,
395 u32 wrb_cnt, u32 copied, u32 gso_segs, bool stopped)
397 struct be_tx_stats *stats = tx_stats(adapter);
399 stats->be_tx_wrbs += wrb_cnt;
400 stats->be_tx_bytes += copied;
401 stats->be_tx_pkts += (gso_segs ? gso_segs : 1);
403 stats->be_tx_stops++;
406 /* Determine number of WRB entries needed to xmit data in an skb */
407 static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
409 int cnt = (skb->len > skb->data_len);
411 cnt += skb_shinfo(skb)->nr_frags;
413 /* to account for hdr wrb */
416 /* add a dummy to make it an even num */
421 BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
425 static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
427 wrb->frag_pa_hi = upper_32_bits(addr);
428 wrb->frag_pa_lo = addr & 0xFFFFFFFF;
429 wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
432 static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
433 bool vlan, u32 wrb_cnt, u32 len)
435 memset(hdr, 0, sizeof(*hdr));
437 AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
439 if (skb_is_gso(skb)) {
440 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
441 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
442 hdr, skb_shinfo(skb)->gso_size);
443 if (skb_is_gso_v6(skb))
444 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso6, hdr, 1);
445 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
447 AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
448 else if (is_udp_pkt(skb))
449 AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
452 if (vlan && vlan_tx_tag_present(skb)) {
453 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
454 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
455 hdr, vlan_tx_tag_get(skb));
458 AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
459 AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
460 AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
461 AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
464 static void unmap_tx_frag(struct pci_dev *pdev, struct be_eth_wrb *wrb,
469 be_dws_le_to_cpu(wrb, sizeof(*wrb));
471 dma = (u64)wrb->frag_pa_hi << 32 | (u64)wrb->frag_pa_lo;
474 pci_unmap_single(pdev, dma, wrb->frag_len,
477 pci_unmap_page(pdev, dma, wrb->frag_len,
482 static int make_tx_wrbs(struct be_adapter *adapter,
483 struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
487 struct pci_dev *pdev = adapter->pdev;
488 struct sk_buff *first_skb = skb;
489 struct be_queue_info *txq = &adapter->tx_obj.q;
490 struct be_eth_wrb *wrb;
491 struct be_eth_hdr_wrb *hdr;
492 bool map_single = false;
495 hdr = queue_head_node(txq);
497 map_head = txq->head;
499 if (skb->len > skb->data_len) {
500 int len = skb_headlen(skb);
501 busaddr = pci_map_single(pdev, skb->data, len,
503 if (pci_dma_mapping_error(pdev, busaddr))
506 wrb = queue_head_node(txq);
507 wrb_fill(wrb, busaddr, len);
508 be_dws_cpu_to_le(wrb, sizeof(*wrb));
513 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
514 struct skb_frag_struct *frag =
515 &skb_shinfo(skb)->frags[i];
516 busaddr = pci_map_page(pdev, frag->page,
518 frag->size, PCI_DMA_TODEVICE);
519 if (pci_dma_mapping_error(pdev, busaddr))
521 wrb = queue_head_node(txq);
522 wrb_fill(wrb, busaddr, frag->size);
523 be_dws_cpu_to_le(wrb, sizeof(*wrb));
525 copied += frag->size;
529 wrb = queue_head_node(txq);
531 be_dws_cpu_to_le(wrb, sizeof(*wrb));
535 wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
537 be_dws_cpu_to_le(hdr, sizeof(*hdr));
541 txq->head = map_head;
543 wrb = queue_head_node(txq);
544 unmap_tx_frag(pdev, wrb, map_single);
546 copied -= wrb->frag_len;
552 static netdev_tx_t be_xmit(struct sk_buff *skb,
553 struct net_device *netdev)
555 struct be_adapter *adapter = netdev_priv(netdev);
556 struct be_tx_obj *tx_obj = &adapter->tx_obj;
557 struct be_queue_info *txq = &tx_obj->q;
558 u32 wrb_cnt = 0, copied = 0;
559 u32 start = txq->head;
560 bool dummy_wrb, stopped = false;
562 wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
564 copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
566 /* record the sent skb in the sent_skb table */
567 BUG_ON(tx_obj->sent_skb_list[start]);
568 tx_obj->sent_skb_list[start] = skb;
570 /* Ensure txq has space for the next skb; Else stop the queue
571 * *BEFORE* ringing the tx doorbell, so that we serialze the
572 * tx compls of the current transmit which'll wake up the queue
574 atomic_add(wrb_cnt, &txq->used);
575 if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
577 netif_stop_queue(netdev);
581 be_txq_notify(adapter, txq->id, wrb_cnt);
583 be_tx_stats_update(adapter, wrb_cnt, copied,
584 skb_shinfo(skb)->gso_segs, stopped);
587 dev_kfree_skb_any(skb);
592 static int be_change_mtu(struct net_device *netdev, int new_mtu)
594 struct be_adapter *adapter = netdev_priv(netdev);
595 if (new_mtu < BE_MIN_MTU ||
596 new_mtu > (BE_MAX_JUMBO_FRAME_SIZE -
597 (ETH_HLEN + ETH_FCS_LEN))) {
598 dev_info(&adapter->pdev->dev,
599 "MTU must be between %d and %d bytes\n",
601 (BE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN)));
604 dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
605 netdev->mtu, new_mtu);
606 netdev->mtu = new_mtu;
611 * A max of 64 (BE_NUM_VLANS_SUPPORTED) vlans can be configured in BE.
612 * If the user configures more, place BE in vlan promiscuous mode.
614 static int be_vid_config(struct be_adapter *adapter, bool vf, u32 vf_num)
616 u16 vtag[BE_NUM_VLANS_SUPPORTED];
622 if_handle = adapter->vf_cfg[vf_num].vf_if_handle;
623 vtag[0] = cpu_to_le16(adapter->vf_cfg[vf_num].vf_vlan_tag);
624 status = be_cmd_vlan_config(adapter, if_handle, vtag, 1, 1, 0);
627 if (adapter->vlans_added <= adapter->max_vlans) {
628 /* Construct VLAN Table to give to HW */
629 for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
630 if (adapter->vlan_tag[i]) {
631 vtag[ntags] = cpu_to_le16(i);
635 status = be_cmd_vlan_config(adapter, adapter->if_handle,
638 status = be_cmd_vlan_config(adapter, adapter->if_handle,
645 static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
647 struct be_adapter *adapter = netdev_priv(netdev);
649 adapter->vlan_grp = grp;
652 static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
654 struct be_adapter *adapter = netdev_priv(netdev);
656 adapter->vlans_added++;
657 if (!be_physfn(adapter))
660 adapter->vlan_tag[vid] = 1;
661 if (adapter->vlans_added <= (adapter->max_vlans + 1))
662 be_vid_config(adapter, false, 0);
665 static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
667 struct be_adapter *adapter = netdev_priv(netdev);
669 adapter->vlans_added--;
670 vlan_group_set_device(adapter->vlan_grp, vid, NULL);
672 if (!be_physfn(adapter))
675 adapter->vlan_tag[vid] = 0;
676 if (adapter->vlans_added <= adapter->max_vlans)
677 be_vid_config(adapter, false, 0);
680 static void be_set_multicast_list(struct net_device *netdev)
682 struct be_adapter *adapter = netdev_priv(netdev);
684 if (netdev->flags & IFF_PROMISC) {
685 be_cmd_promiscuous_config(adapter, adapter->port_num, 1);
686 adapter->promiscuous = true;
690 /* BE was previously in promiscous mode; disable it */
691 if (adapter->promiscuous) {
692 adapter->promiscuous = false;
693 be_cmd_promiscuous_config(adapter, adapter->port_num, 0);
696 /* Enable multicast promisc if num configured exceeds what we support */
697 if (netdev->flags & IFF_ALLMULTI ||
698 netdev_mc_count(netdev) > BE_MAX_MC) {
699 be_cmd_multicast_set(adapter, adapter->if_handle, NULL,
700 &adapter->mc_cmd_mem);
704 be_cmd_multicast_set(adapter, adapter->if_handle, netdev,
705 &adapter->mc_cmd_mem);
710 static int be_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
712 struct be_adapter *adapter = netdev_priv(netdev);
715 if (!adapter->sriov_enabled)
718 if (!is_valid_ether_addr(mac) || (vf >= num_vfs))
721 if (adapter->vf_cfg[vf].vf_pmac_id != BE_INVALID_PMAC_ID)
722 status = be_cmd_pmac_del(adapter,
723 adapter->vf_cfg[vf].vf_if_handle,
724 adapter->vf_cfg[vf].vf_pmac_id);
726 status = be_cmd_pmac_add(adapter, mac,
727 adapter->vf_cfg[vf].vf_if_handle,
728 &adapter->vf_cfg[vf].vf_pmac_id);
731 dev_err(&adapter->pdev->dev, "MAC %pM set on VF %d Failed\n",
734 memcpy(adapter->vf_cfg[vf].vf_mac_addr, mac, ETH_ALEN);
739 static int be_get_vf_config(struct net_device *netdev, int vf,
740 struct ifla_vf_info *vi)
742 struct be_adapter *adapter = netdev_priv(netdev);
744 if (!adapter->sriov_enabled)
751 vi->tx_rate = adapter->vf_cfg[vf].vf_tx_rate;
752 vi->vlan = adapter->vf_cfg[vf].vf_vlan_tag;
754 memcpy(&vi->mac, adapter->vf_cfg[vf].vf_mac_addr, ETH_ALEN);
759 static int be_set_vf_vlan(struct net_device *netdev,
760 int vf, u16 vlan, u8 qos)
762 struct be_adapter *adapter = netdev_priv(netdev);
765 if (!adapter->sriov_enabled)
768 if ((vf >= num_vfs) || (vlan > 4095))
772 adapter->vf_cfg[vf].vf_vlan_tag = vlan;
773 adapter->vlans_added++;
775 adapter->vf_cfg[vf].vf_vlan_tag = 0;
776 adapter->vlans_added--;
779 status = be_vid_config(adapter, true, vf);
782 dev_info(&adapter->pdev->dev,
783 "VLAN %d config on VF %d failed\n", vlan, vf);
787 static int be_set_vf_tx_rate(struct net_device *netdev,
790 struct be_adapter *adapter = netdev_priv(netdev);
793 if (!adapter->sriov_enabled)
796 if ((vf >= num_vfs) || (rate < 0))
802 adapter->vf_cfg[vf].vf_tx_rate = rate;
803 status = be_cmd_set_qos(adapter, rate / 10, vf);
806 dev_info(&adapter->pdev->dev,
807 "tx rate %d on VF %d failed\n", rate, vf);
811 static void be_rx_rate_update(struct be_rx_obj *rxo)
813 struct be_rx_stats *stats = &rxo->stats;
817 if (time_before(now, stats->rx_jiffies)) {
818 stats->rx_jiffies = now;
822 /* Update the rate once in two seconds */
823 if ((now - stats->rx_jiffies) < 2 * HZ)
826 stats->rx_rate = be_calc_rate(stats->rx_bytes - stats->rx_bytes_prev,
827 now - stats->rx_jiffies);
828 stats->rx_jiffies = now;
829 stats->rx_bytes_prev = stats->rx_bytes;
832 static void be_rx_stats_update(struct be_rx_obj *rxo,
833 u32 pktsize, u16 numfrags, u8 pkt_type)
835 struct be_rx_stats *stats = &rxo->stats;
838 stats->rx_frags += numfrags;
839 stats->rx_bytes += pktsize;
841 if (pkt_type == BE_MULTICAST_PACKET)
842 stats->rx_mcast_pkts++;
845 static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
847 u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
849 l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
850 ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
851 ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
853 tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
854 udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
856 ipv6_chk = (ip_version && (tcpf || udpf));
858 return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
861 static struct be_rx_page_info *
862 get_rx_page_info(struct be_adapter *adapter,
863 struct be_rx_obj *rxo,
866 struct be_rx_page_info *rx_page_info;
867 struct be_queue_info *rxq = &rxo->q;
869 rx_page_info = &rxo->page_info_tbl[frag_idx];
870 BUG_ON(!rx_page_info->page);
872 if (rx_page_info->last_page_user) {
873 pci_unmap_page(adapter->pdev, dma_unmap_addr(rx_page_info, bus),
874 adapter->big_page_size, PCI_DMA_FROMDEVICE);
875 rx_page_info->last_page_user = false;
878 atomic_dec(&rxq->used);
882 /* Throwaway the data in the Rx completion */
883 static void be_rx_compl_discard(struct be_adapter *adapter,
884 struct be_rx_obj *rxo,
885 struct be_eth_rx_compl *rxcp)
887 struct be_queue_info *rxq = &rxo->q;
888 struct be_rx_page_info *page_info;
889 u16 rxq_idx, i, num_rcvd;
891 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
892 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
894 for (i = 0; i < num_rcvd; i++) {
895 page_info = get_rx_page_info(adapter, rxo, rxq_idx);
896 put_page(page_info->page);
897 memset(page_info, 0, sizeof(*page_info));
898 index_inc(&rxq_idx, rxq->len);
903 * skb_fill_rx_data forms a complete skb for an ether frame
906 static void skb_fill_rx_data(struct be_adapter *adapter, struct be_rx_obj *rxo,
907 struct sk_buff *skb, struct be_eth_rx_compl *rxcp,
910 struct be_queue_info *rxq = &rxo->q;
911 struct be_rx_page_info *page_info;
913 u32 pktsize, hdr_len, curr_frag_len, size;
917 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
918 pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
919 pkt_type = AMAP_GET_BITS(struct amap_eth_rx_compl, cast_enc, rxcp);
921 page_info = get_rx_page_info(adapter, rxo, rxq_idx);
923 start = page_address(page_info->page) + page_info->page_offset;
926 /* Copy data in the first descriptor of this completion */
927 curr_frag_len = min(pktsize, rx_frag_size);
929 /* Copy the header portion into skb_data */
930 hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
931 memcpy(skb->data, start, hdr_len);
932 skb->len = curr_frag_len;
933 if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
934 /* Complete packet has now been moved to data */
935 put_page(page_info->page);
937 skb->tail += curr_frag_len;
939 skb_shinfo(skb)->nr_frags = 1;
940 skb_shinfo(skb)->frags[0].page = page_info->page;
941 skb_shinfo(skb)->frags[0].page_offset =
942 page_info->page_offset + hdr_len;
943 skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
944 skb->data_len = curr_frag_len - hdr_len;
945 skb->tail += hdr_len;
947 page_info->page = NULL;
949 if (pktsize <= rx_frag_size) {
950 BUG_ON(num_rcvd != 1);
954 /* More frags present for this completion */
956 for (i = 1, j = 0; i < num_rcvd; i++) {
957 size -= curr_frag_len;
958 index_inc(&rxq_idx, rxq->len);
959 page_info = get_rx_page_info(adapter, rxo, rxq_idx);
961 curr_frag_len = min(size, rx_frag_size);
963 /* Coalesce all frags from the same physical page in one slot */
964 if (page_info->page_offset == 0) {
967 skb_shinfo(skb)->frags[j].page = page_info->page;
968 skb_shinfo(skb)->frags[j].page_offset =
969 page_info->page_offset;
970 skb_shinfo(skb)->frags[j].size = 0;
971 skb_shinfo(skb)->nr_frags++;
973 put_page(page_info->page);
976 skb_shinfo(skb)->frags[j].size += curr_frag_len;
977 skb->len += curr_frag_len;
978 skb->data_len += curr_frag_len;
980 page_info->page = NULL;
982 BUG_ON(j > MAX_SKB_FRAGS);
985 be_rx_stats_update(rxo, pktsize, num_rcvd, pkt_type);
988 /* Process the RX completion indicated by rxcp when GRO is disabled */
989 static void be_rx_compl_process(struct be_adapter *adapter,
990 struct be_rx_obj *rxo,
991 struct be_eth_rx_compl *rxcp)
998 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
999 /* Is it a flush compl that has no data */
1000 if (unlikely(num_rcvd == 0))
1003 skb = netdev_alloc_skb_ip_align(adapter->netdev, BE_HDR_LEN);
1004 if (unlikely(!skb)) {
1005 if (net_ratelimit())
1006 dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
1007 be_rx_compl_discard(adapter, rxo, rxcp);
1011 skb_fill_rx_data(adapter, rxo, skb, rxcp, num_rcvd);
1013 if (do_pkt_csum(rxcp, adapter->rx_csum))
1014 skb_checksum_none_assert(skb);
1016 skb->ip_summed = CHECKSUM_UNNECESSARY;
1018 skb->truesize = skb->len + sizeof(struct sk_buff);
1019 skb->protocol = eth_type_trans(skb, adapter->netdev);
1021 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
1022 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
1024 /* vlanf could be wrongly set in some cards.
1025 * ignore if vtm is not set */
1026 if ((adapter->function_mode & 0x400) && !vtm)
1029 if (unlikely(vlanf)) {
1030 if (!adapter->vlan_grp || adapter->vlans_added == 0) {
1034 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
1036 vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
1038 netif_receive_skb(skb);
1042 /* Process the RX completion indicated by rxcp when GRO is enabled */
1043 static void be_rx_compl_process_gro(struct be_adapter *adapter,
1044 struct be_rx_obj *rxo,
1045 struct be_eth_rx_compl *rxcp)
1047 struct be_rx_page_info *page_info;
1048 struct sk_buff *skb = NULL;
1049 struct be_queue_info *rxq = &rxo->q;
1050 struct be_eq_obj *eq_obj = &rxo->rx_eq;
1051 u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
1052 u16 i, rxq_idx = 0, vid, j;
1056 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
1057 /* Is it a flush compl that has no data */
1058 if (unlikely(num_rcvd == 0))
1061 pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
1062 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
1063 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
1064 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
1065 pkt_type = AMAP_GET_BITS(struct amap_eth_rx_compl, cast_enc, rxcp);
1067 /* vlanf could be wrongly set in some cards.
1068 * ignore if vtm is not set */
1069 if ((adapter->function_mode & 0x400) && !vtm)
1072 skb = napi_get_frags(&eq_obj->napi);
1074 be_rx_compl_discard(adapter, rxo, rxcp);
1078 remaining = pkt_size;
1079 for (i = 0, j = -1; i < num_rcvd; i++) {
1080 page_info = get_rx_page_info(adapter, rxo, rxq_idx);
1082 curr_frag_len = min(remaining, rx_frag_size);
1084 /* Coalesce all frags from the same physical page in one slot */
1085 if (i == 0 || page_info->page_offset == 0) {
1086 /* First frag or Fresh page */
1088 skb_shinfo(skb)->frags[j].page = page_info->page;
1089 skb_shinfo(skb)->frags[j].page_offset =
1090 page_info->page_offset;
1091 skb_shinfo(skb)->frags[j].size = 0;
1093 put_page(page_info->page);
1095 skb_shinfo(skb)->frags[j].size += curr_frag_len;
1097 remaining -= curr_frag_len;
1098 index_inc(&rxq_idx, rxq->len);
1099 memset(page_info, 0, sizeof(*page_info));
1101 BUG_ON(j > MAX_SKB_FRAGS);
1103 skb_shinfo(skb)->nr_frags = j + 1;
1104 skb->len = pkt_size;
1105 skb->data_len = pkt_size;
1106 skb->truesize += pkt_size;
1107 skb->ip_summed = CHECKSUM_UNNECESSARY;
1109 if (likely(!vlanf)) {
1110 napi_gro_frags(&eq_obj->napi);
1112 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
1115 if (!adapter->vlan_grp || adapter->vlans_added == 0)
1118 vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid);
1121 be_rx_stats_update(rxo, pkt_size, num_rcvd, pkt_type);
1124 static struct be_eth_rx_compl *be_rx_compl_get(struct be_rx_obj *rxo)
1126 struct be_eth_rx_compl *rxcp = queue_tail_node(&rxo->cq);
1128 if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
1132 be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
1134 queue_tail_inc(&rxo->cq);
1138 /* To reset the valid bit, we need to reset the whole word as
1139 * when walking the queue the valid entries are little-endian
1140 * and invalid entries are host endian
1142 static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
1144 rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
1147 static inline struct page *be_alloc_pages(u32 size)
1149 gfp_t alloc_flags = GFP_ATOMIC;
1150 u32 order = get_order(size);
1152 alloc_flags |= __GFP_COMP;
1153 return alloc_pages(alloc_flags, order);
1157 * Allocate a page, split it to fragments of size rx_frag_size and post as
1158 * receive buffers to BE
1160 static void be_post_rx_frags(struct be_rx_obj *rxo)
1162 struct be_adapter *adapter = rxo->adapter;
1163 struct be_rx_page_info *page_info_tbl = rxo->page_info_tbl;
1164 struct be_rx_page_info *page_info = NULL, *prev_page_info = NULL;
1165 struct be_queue_info *rxq = &rxo->q;
1166 struct page *pagep = NULL;
1167 struct be_eth_rx_d *rxd;
1168 u64 page_dmaaddr = 0, frag_dmaaddr;
1169 u32 posted, page_offset = 0;
1171 page_info = &rxo->page_info_tbl[rxq->head];
1172 for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
1174 pagep = be_alloc_pages(adapter->big_page_size);
1175 if (unlikely(!pagep)) {
1176 rxo->stats.rx_post_fail++;
1179 page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
1180 adapter->big_page_size,
1181 PCI_DMA_FROMDEVICE);
1182 page_info->page_offset = 0;
1185 page_info->page_offset = page_offset + rx_frag_size;
1187 page_offset = page_info->page_offset;
1188 page_info->page = pagep;
1189 dma_unmap_addr_set(page_info, bus, page_dmaaddr);
1190 frag_dmaaddr = page_dmaaddr + page_info->page_offset;
1192 rxd = queue_head_node(rxq);
1193 rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
1194 rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
1196 /* Any space left in the current big page for another frag? */
1197 if ((page_offset + rx_frag_size + rx_frag_size) >
1198 adapter->big_page_size) {
1200 page_info->last_page_user = true;
1203 prev_page_info = page_info;
1204 queue_head_inc(rxq);
1205 page_info = &page_info_tbl[rxq->head];
1208 prev_page_info->last_page_user = true;
1211 atomic_add(posted, &rxq->used);
1212 be_rxq_notify(adapter, rxq->id, posted);
1213 } else if (atomic_read(&rxq->used) == 0) {
1214 /* Let be_worker replenish when memory is available */
1215 rxo->rx_post_starved = true;
1219 static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
1221 struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
1223 if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
1227 be_dws_le_to_cpu(txcp, sizeof(*txcp));
1229 txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
1231 queue_tail_inc(tx_cq);
1235 static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
1237 struct be_queue_info *txq = &adapter->tx_obj.q;
1238 struct be_eth_wrb *wrb;
1239 struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
1240 struct sk_buff *sent_skb;
1241 u16 cur_index, num_wrbs = 1; /* account for hdr wrb */
1242 bool unmap_skb_hdr = true;
1244 sent_skb = sent_skbs[txq->tail];
1246 sent_skbs[txq->tail] = NULL;
1248 /* skip header wrb */
1249 queue_tail_inc(txq);
1252 cur_index = txq->tail;
1253 wrb = queue_tail_node(txq);
1254 unmap_tx_frag(adapter->pdev, wrb, (unmap_skb_hdr &&
1255 skb_headlen(sent_skb)));
1256 unmap_skb_hdr = false;
1259 queue_tail_inc(txq);
1260 } while (cur_index != last_index);
1262 atomic_sub(num_wrbs, &txq->used);
1264 kfree_skb(sent_skb);
1267 static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
1269 struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
1275 eqe->evt = le32_to_cpu(eqe->evt);
1276 queue_tail_inc(&eq_obj->q);
1280 static int event_handle(struct be_adapter *adapter,
1281 struct be_eq_obj *eq_obj)
1283 struct be_eq_entry *eqe;
1286 while ((eqe = event_get(eq_obj)) != NULL) {
1291 /* Deal with any spurious interrupts that come
1294 be_eq_notify(adapter, eq_obj->q.id, true, true, num);
1296 napi_schedule(&eq_obj->napi);
1301 /* Just read and notify events without processing them.
1302 * Used at the time of destroying event queues */
1303 static void be_eq_clean(struct be_adapter *adapter,
1304 struct be_eq_obj *eq_obj)
1306 struct be_eq_entry *eqe;
1309 while ((eqe = event_get(eq_obj)) != NULL) {
1315 be_eq_notify(adapter, eq_obj->q.id, false, true, num);
1318 static void be_rx_q_clean(struct be_adapter *adapter, struct be_rx_obj *rxo)
1320 struct be_rx_page_info *page_info;
1321 struct be_queue_info *rxq = &rxo->q;
1322 struct be_queue_info *rx_cq = &rxo->cq;
1323 struct be_eth_rx_compl *rxcp;
1326 /* First cleanup pending rx completions */
1327 while ((rxcp = be_rx_compl_get(rxo)) != NULL) {
1328 be_rx_compl_discard(adapter, rxo, rxcp);
1329 be_rx_compl_reset(rxcp);
1330 be_cq_notify(adapter, rx_cq->id, true, 1);
1333 /* Then free posted rx buffer that were not used */
1334 tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
1335 for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
1336 page_info = get_rx_page_info(adapter, rxo, tail);
1337 put_page(page_info->page);
1338 memset(page_info, 0, sizeof(*page_info));
1340 BUG_ON(atomic_read(&rxq->used));
1343 static void be_tx_compl_clean(struct be_adapter *adapter)
1345 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
1346 struct be_queue_info *txq = &adapter->tx_obj.q;
1347 struct be_eth_tx_compl *txcp;
1348 u16 end_idx, cmpl = 0, timeo = 0;
1349 struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
1350 struct sk_buff *sent_skb;
1353 /* Wait for a max of 200ms for all the tx-completions to arrive. */
1355 while ((txcp = be_tx_compl_get(tx_cq))) {
1356 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1358 be_tx_compl_process(adapter, end_idx);
1362 be_cq_notify(adapter, tx_cq->id, false, cmpl);
1366 if (atomic_read(&txq->used) == 0 || ++timeo > 200)
1372 if (atomic_read(&txq->used))
1373 dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
1374 atomic_read(&txq->used));
1376 /* free posted tx for which compls will never arrive */
1377 while (atomic_read(&txq->used)) {
1378 sent_skb = sent_skbs[txq->tail];
1379 end_idx = txq->tail;
1381 wrb_cnt_for_skb(sent_skb, &dummy_wrb) - 1, txq->len);
1382 be_tx_compl_process(adapter, end_idx);
1386 static void be_mcc_queues_destroy(struct be_adapter *adapter)
1388 struct be_queue_info *q;
1390 q = &adapter->mcc_obj.q;
1392 be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
1393 be_queue_free(adapter, q);
1395 q = &adapter->mcc_obj.cq;
1397 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1398 be_queue_free(adapter, q);
1401 /* Must be called only after TX qs are created as MCC shares TX EQ */
1402 static int be_mcc_queues_create(struct be_adapter *adapter)
1404 struct be_queue_info *q, *cq;
1406 /* Alloc MCC compl queue */
1407 cq = &adapter->mcc_obj.cq;
1408 if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
1409 sizeof(struct be_mcc_compl)))
1412 /* Ask BE to create MCC compl queue; share TX's eq */
1413 if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
1416 /* Alloc MCC queue */
1417 q = &adapter->mcc_obj.q;
1418 if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
1419 goto mcc_cq_destroy;
1421 /* Ask BE to create MCC queue */
1422 if (be_cmd_mccq_create(adapter, q, cq))
1428 be_queue_free(adapter, q);
1430 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
1432 be_queue_free(adapter, cq);
1437 static void be_tx_queues_destroy(struct be_adapter *adapter)
1439 struct be_queue_info *q;
1441 q = &adapter->tx_obj.q;
1443 be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
1444 be_queue_free(adapter, q);
1446 q = &adapter->tx_obj.cq;
1448 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1449 be_queue_free(adapter, q);
1451 /* Clear any residual events */
1452 be_eq_clean(adapter, &adapter->tx_eq);
1454 q = &adapter->tx_eq.q;
1456 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
1457 be_queue_free(adapter, q);
1460 static int be_tx_queues_create(struct be_adapter *adapter)
1462 struct be_queue_info *eq, *q, *cq;
1464 adapter->tx_eq.max_eqd = 0;
1465 adapter->tx_eq.min_eqd = 0;
1466 adapter->tx_eq.cur_eqd = 96;
1467 adapter->tx_eq.enable_aic = false;
1468 /* Alloc Tx Event queue */
1469 eq = &adapter->tx_eq.q;
1470 if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
1473 /* Ask BE to create Tx Event queue */
1474 if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
1476 adapter->base_eq_id = adapter->tx_eq.q.id;
1478 /* Alloc TX eth compl queue */
1479 cq = &adapter->tx_obj.cq;
1480 if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
1481 sizeof(struct be_eth_tx_compl)))
1484 /* Ask BE to create Tx eth compl queue */
1485 if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
1488 /* Alloc TX eth queue */
1489 q = &adapter->tx_obj.q;
1490 if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
1493 /* Ask BE to create Tx eth queue */
1494 if (be_cmd_txq_create(adapter, q, cq))
1499 be_queue_free(adapter, q);
1501 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
1503 be_queue_free(adapter, cq);
1505 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
1507 be_queue_free(adapter, eq);
1511 static void be_rx_queues_destroy(struct be_adapter *adapter)
1513 struct be_queue_info *q;
1514 struct be_rx_obj *rxo;
1517 for_all_rx_queues(adapter, rxo, i) {
1520 be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
1521 /* After the rxq is invalidated, wait for a grace time
1522 * of 1ms for all dma to end and the flush compl to
1526 be_rx_q_clean(adapter, rxo);
1528 be_queue_free(adapter, q);
1532 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1533 be_queue_free(adapter, q);
1535 /* Clear any residual events */
1538 be_eq_clean(adapter, &rxo->rx_eq);
1539 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
1541 be_queue_free(adapter, q);
1545 static int be_rx_queues_create(struct be_adapter *adapter)
1547 struct be_queue_info *eq, *q, *cq;
1548 struct be_rx_obj *rxo;
1551 adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
1552 for_all_rx_queues(adapter, rxo, i) {
1553 rxo->adapter = adapter;
1554 rxo->rx_eq.max_eqd = BE_MAX_EQD;
1555 rxo->rx_eq.enable_aic = true;
1559 rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
1560 sizeof(struct be_eq_entry));
1564 rc = be_cmd_eq_create(adapter, eq, rxo->rx_eq.cur_eqd);
1570 rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
1571 sizeof(struct be_eth_rx_compl));
1575 rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
1581 rc = be_queue_alloc(adapter, q, RX_Q_LEN,
1582 sizeof(struct be_eth_rx_d));
1586 rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
1587 BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle,
1588 (i > 0) ? 1 : 0/* rss enable */, &rxo->rss_id);
1593 if (be_multi_rxq(adapter)) {
1594 u8 rsstable[MAX_RSS_QS];
1596 for_all_rss_queues(adapter, rxo, i)
1597 rsstable[i] = rxo->rss_id;
1599 rc = be_cmd_rss_config(adapter, rsstable,
1600 adapter->num_rx_qs - 1);
1607 be_rx_queues_destroy(adapter);
1611 /* There are 8 evt ids per func. Retruns the evt id's bit number */
1612 static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id)
1614 return eq_id - adapter->base_eq_id;
1617 static irqreturn_t be_intx(int irq, void *dev)
1619 struct be_adapter *adapter = dev;
1620 struct be_rx_obj *rxo;
1623 isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
1624 (adapter->tx_eq.q.id/ 8) * CEV_ISR_SIZE);
1628 if ((1 << be_evt_bit_get(adapter, adapter->tx_eq.q.id) & isr))
1629 event_handle(adapter, &adapter->tx_eq);
1631 for_all_rx_queues(adapter, rxo, i) {
1632 if ((1 << be_evt_bit_get(adapter, rxo->rx_eq.q.id) & isr))
1633 event_handle(adapter, &rxo->rx_eq);
1639 static irqreturn_t be_msix_rx(int irq, void *dev)
1641 struct be_rx_obj *rxo = dev;
1642 struct be_adapter *adapter = rxo->adapter;
1644 event_handle(adapter, &rxo->rx_eq);
1649 static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
1651 struct be_adapter *adapter = dev;
1653 event_handle(adapter, &adapter->tx_eq);
1658 static inline bool do_gro(struct be_adapter *adapter, struct be_rx_obj *rxo,
1659 struct be_eth_rx_compl *rxcp)
1661 int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
1662 int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
1665 rxo->stats.rxcp_err++;
1667 return (tcp_frame && !err) ? true : false;
1670 int be_poll_rx(struct napi_struct *napi, int budget)
1672 struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
1673 struct be_rx_obj *rxo = container_of(rx_eq, struct be_rx_obj, rx_eq);
1674 struct be_adapter *adapter = rxo->adapter;
1675 struct be_queue_info *rx_cq = &rxo->cq;
1676 struct be_eth_rx_compl *rxcp;
1679 rxo->stats.rx_polls++;
1680 for (work_done = 0; work_done < budget; work_done++) {
1681 rxcp = be_rx_compl_get(rxo);
1685 if (do_gro(adapter, rxo, rxcp))
1686 be_rx_compl_process_gro(adapter, rxo, rxcp);
1688 be_rx_compl_process(adapter, rxo, rxcp);
1690 be_rx_compl_reset(rxcp);
1693 /* Refill the queue */
1694 if (atomic_read(&rxo->q.used) < RX_FRAGS_REFILL_WM)
1695 be_post_rx_frags(rxo);
1698 if (work_done < budget) {
1699 napi_complete(napi);
1700 be_cq_notify(adapter, rx_cq->id, true, work_done);
1702 /* More to be consumed; continue with interrupts disabled */
1703 be_cq_notify(adapter, rx_cq->id, false, work_done);
1708 /* As TX and MCC share the same EQ check for both TX and MCC completions.
1709 * For TX/MCC we don't honour budget; consume everything
1711 static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
1713 struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
1714 struct be_adapter *adapter =
1715 container_of(tx_eq, struct be_adapter, tx_eq);
1716 struct be_queue_info *txq = &adapter->tx_obj.q;
1717 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
1718 struct be_eth_tx_compl *txcp;
1719 int tx_compl = 0, mcc_compl, status = 0;
1722 while ((txcp = be_tx_compl_get(tx_cq))) {
1723 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1725 be_tx_compl_process(adapter, end_idx);
1729 mcc_compl = be_process_mcc(adapter, &status);
1731 napi_complete(napi);
1734 struct be_mcc_obj *mcc_obj = &adapter->mcc_obj;
1735 be_cq_notify(adapter, mcc_obj->cq.id, true, mcc_compl);
1739 be_cq_notify(adapter, adapter->tx_obj.cq.id, true, tx_compl);
1741 /* As Tx wrbs have been freed up, wake up netdev queue if
1742 * it was stopped due to lack of tx wrbs.
1744 if (netif_queue_stopped(adapter->netdev) &&
1745 atomic_read(&txq->used) < txq->len / 2) {
1746 netif_wake_queue(adapter->netdev);
1749 tx_stats(adapter)->be_tx_events++;
1750 tx_stats(adapter)->be_tx_compl += tx_compl;
1756 void be_detect_dump_ue(struct be_adapter *adapter)
1758 u32 ue_status_lo, ue_status_hi, ue_status_lo_mask, ue_status_hi_mask;
1761 pci_read_config_dword(adapter->pdev,
1762 PCICFG_UE_STATUS_LOW, &ue_status_lo);
1763 pci_read_config_dword(adapter->pdev,
1764 PCICFG_UE_STATUS_HIGH, &ue_status_hi);
1765 pci_read_config_dword(adapter->pdev,
1766 PCICFG_UE_STATUS_LOW_MASK, &ue_status_lo_mask);
1767 pci_read_config_dword(adapter->pdev,
1768 PCICFG_UE_STATUS_HI_MASK, &ue_status_hi_mask);
1770 ue_status_lo = (ue_status_lo & (~ue_status_lo_mask));
1771 ue_status_hi = (ue_status_hi & (~ue_status_hi_mask));
1773 if (ue_status_lo || ue_status_hi) {
1774 adapter->ue_detected = true;
1775 dev_err(&adapter->pdev->dev, "UE Detected!!\n");
1779 for (i = 0; ue_status_lo; ue_status_lo >>= 1, i++) {
1780 if (ue_status_lo & 1)
1781 dev_err(&adapter->pdev->dev,
1782 "UE: %s bit set\n", ue_status_low_desc[i]);
1786 for (i = 0; ue_status_hi; ue_status_hi >>= 1, i++) {
1787 if (ue_status_hi & 1)
1788 dev_err(&adapter->pdev->dev,
1789 "UE: %s bit set\n", ue_status_hi_desc[i]);
1795 static void be_worker(struct work_struct *work)
1797 struct be_adapter *adapter =
1798 container_of(work, struct be_adapter, work.work);
1799 struct be_rx_obj *rxo;
1802 if (!adapter->stats_ioctl_sent)
1803 be_cmd_get_stats(adapter, &adapter->stats_cmd);
1805 be_tx_rate_update(adapter);
1807 for_all_rx_queues(adapter, rxo, i) {
1808 be_rx_rate_update(rxo);
1809 be_rx_eqd_update(adapter, rxo);
1811 if (rxo->rx_post_starved) {
1812 rxo->rx_post_starved = false;
1813 be_post_rx_frags(rxo);
1817 if (!adapter->ue_detected)
1818 be_detect_dump_ue(adapter);
1820 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
1823 static void be_msix_disable(struct be_adapter *adapter)
1825 if (adapter->msix_enabled) {
1826 pci_disable_msix(adapter->pdev);
1827 adapter->msix_enabled = false;
1831 static int be_num_rxqs_get(struct be_adapter *adapter)
1833 if (multi_rxq && (adapter->function_caps & BE_FUNCTION_CAPS_RSS) &&
1834 !adapter->sriov_enabled && !(adapter->function_mode & 0x400)) {
1835 return 1 + MAX_RSS_QS; /* one default non-RSS queue */
1837 dev_warn(&adapter->pdev->dev,
1838 "No support for multiple RX queues\n");
1843 static void be_msix_enable(struct be_adapter *adapter)
1845 #define BE_MIN_MSIX_VECTORS (1 + 1) /* Rx + Tx */
1848 adapter->num_rx_qs = be_num_rxqs_get(adapter);
1850 for (i = 0; i < (adapter->num_rx_qs + 1); i++)
1851 adapter->msix_entries[i].entry = i;
1853 status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1854 adapter->num_rx_qs + 1);
1857 } else if (status >= BE_MIN_MSIX_VECTORS) {
1858 if (pci_enable_msix(adapter->pdev, adapter->msix_entries,
1860 adapter->num_rx_qs = status - 1;
1861 dev_warn(&adapter->pdev->dev,
1862 "Could alloc only %d MSIx vectors. "
1863 "Using %d RX Qs\n", status, adapter->num_rx_qs);
1869 adapter->msix_enabled = true;
1872 static void be_sriov_enable(struct be_adapter *adapter)
1874 be_check_sriov_fn_type(adapter);
1875 #ifdef CONFIG_PCI_IOV
1876 if (be_physfn(adapter) && num_vfs) {
1879 status = pci_enable_sriov(adapter->pdev, num_vfs);
1880 adapter->sriov_enabled = status ? false : true;
1885 static void be_sriov_disable(struct be_adapter *adapter)
1887 #ifdef CONFIG_PCI_IOV
1888 if (adapter->sriov_enabled) {
1889 pci_disable_sriov(adapter->pdev);
1890 adapter->sriov_enabled = false;
1895 static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
1897 return adapter->msix_entries[
1898 be_evt_bit_get(adapter, eq_id)].vector;
1901 static int be_request_irq(struct be_adapter *adapter,
1902 struct be_eq_obj *eq_obj,
1903 void *handler, char *desc, void *context)
1905 struct net_device *netdev = adapter->netdev;
1908 sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
1909 vec = be_msix_vec_get(adapter, eq_obj->q.id);
1910 return request_irq(vec, handler, 0, eq_obj->desc, context);
1913 static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj,
1916 int vec = be_msix_vec_get(adapter, eq_obj->q.id);
1917 free_irq(vec, context);
1920 static int be_msix_register(struct be_adapter *adapter)
1922 struct be_rx_obj *rxo;
1926 status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx",
1931 for_all_rx_queues(adapter, rxo, i) {
1932 sprintf(qname, "rxq%d", i);
1933 status = be_request_irq(adapter, &rxo->rx_eq, be_msix_rx,
1942 be_free_irq(adapter, &adapter->tx_eq, adapter);
1944 for (i--, rxo = &adapter->rx_obj[i]; i >= 0; i--, rxo--)
1945 be_free_irq(adapter, &rxo->rx_eq, rxo);
1948 dev_warn(&adapter->pdev->dev,
1949 "MSIX Request IRQ failed - err %d\n", status);
1950 pci_disable_msix(adapter->pdev);
1951 adapter->msix_enabled = false;
1955 static int be_irq_register(struct be_adapter *adapter)
1957 struct net_device *netdev = adapter->netdev;
1960 if (adapter->msix_enabled) {
1961 status = be_msix_register(adapter);
1964 /* INTx is not supported for VF */
1965 if (!be_physfn(adapter))
1970 netdev->irq = adapter->pdev->irq;
1971 status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
1974 dev_err(&adapter->pdev->dev,
1975 "INTx request IRQ failed - err %d\n", status);
1979 adapter->isr_registered = true;
1983 static void be_irq_unregister(struct be_adapter *adapter)
1985 struct net_device *netdev = adapter->netdev;
1986 struct be_rx_obj *rxo;
1989 if (!adapter->isr_registered)
1993 if (!adapter->msix_enabled) {
1994 free_irq(netdev->irq, adapter);
1999 be_free_irq(adapter, &adapter->tx_eq, adapter);
2001 for_all_rx_queues(adapter, rxo, i)
2002 be_free_irq(adapter, &rxo->rx_eq, rxo);
2005 adapter->isr_registered = false;
2008 static int be_close(struct net_device *netdev)
2010 struct be_adapter *adapter = netdev_priv(netdev);
2011 struct be_rx_obj *rxo;
2012 struct be_eq_obj *tx_eq = &adapter->tx_eq;
2015 cancel_delayed_work_sync(&adapter->work);
2017 be_async_mcc_disable(adapter);
2019 netif_stop_queue(netdev);
2020 netif_carrier_off(netdev);
2021 adapter->link_up = false;
2023 be_intr_set(adapter, false);
2025 if (adapter->msix_enabled) {
2026 vec = be_msix_vec_get(adapter, tx_eq->q.id);
2027 synchronize_irq(vec);
2029 for_all_rx_queues(adapter, rxo, i) {
2030 vec = be_msix_vec_get(adapter, rxo->rx_eq.q.id);
2031 synchronize_irq(vec);
2034 synchronize_irq(netdev->irq);
2036 be_irq_unregister(adapter);
2038 for_all_rx_queues(adapter, rxo, i)
2039 napi_disable(&rxo->rx_eq.napi);
2041 napi_disable(&tx_eq->napi);
2043 /* Wait for all pending tx completions to arrive so that
2044 * all tx skbs are freed.
2046 be_tx_compl_clean(adapter);
2051 static int be_open(struct net_device *netdev)
2053 struct be_adapter *adapter = netdev_priv(netdev);
2054 struct be_eq_obj *tx_eq = &adapter->tx_eq;
2055 struct be_rx_obj *rxo;
2061 for_all_rx_queues(adapter, rxo, i) {
2062 be_post_rx_frags(rxo);
2063 napi_enable(&rxo->rx_eq.napi);
2065 napi_enable(&tx_eq->napi);
2067 be_irq_register(adapter);
2069 be_intr_set(adapter, true);
2071 /* The evt queues are created in unarmed state; arm them */
2072 for_all_rx_queues(adapter, rxo, i) {
2073 be_eq_notify(adapter, rxo->rx_eq.q.id, true, false, 0);
2074 be_cq_notify(adapter, rxo->cq.id, true, 0);
2076 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
2078 /* Now that interrupts are on we can process async mcc */
2079 be_async_mcc_enable(adapter);
2081 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
2083 status = be_cmd_link_status_query(adapter, &link_up, &mac_speed,
2087 be_link_status_update(adapter, link_up);
2089 if (be_physfn(adapter)) {
2090 status = be_vid_config(adapter, false, 0);
2094 status = be_cmd_set_flow_control(adapter,
2095 adapter->tx_fc, adapter->rx_fc);
2102 be_close(adapter->netdev);
2106 static int be_setup_wol(struct be_adapter *adapter, bool enable)
2108 struct be_dma_mem cmd;
2112 memset(mac, 0, ETH_ALEN);
2114 cmd.size = sizeof(struct be_cmd_req_acpi_wol_magic_config);
2115 cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma);
2118 memset(cmd.va, 0, cmd.size);
2121 status = pci_write_config_dword(adapter->pdev,
2122 PCICFG_PM_CONTROL_OFFSET, PCICFG_PM_CONTROL_MASK);
2124 dev_err(&adapter->pdev->dev,
2125 "Could not enable Wake-on-lan\n");
2126 pci_free_consistent(adapter->pdev, cmd.size, cmd.va,
2130 status = be_cmd_enable_magic_wol(adapter,
2131 adapter->netdev->dev_addr, &cmd);
2132 pci_enable_wake(adapter->pdev, PCI_D3hot, 1);
2133 pci_enable_wake(adapter->pdev, PCI_D3cold, 1);
2135 status = be_cmd_enable_magic_wol(adapter, mac, &cmd);
2136 pci_enable_wake(adapter->pdev, PCI_D3hot, 0);
2137 pci_enable_wake(adapter->pdev, PCI_D3cold, 0);
2140 pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma);
2145 * Generate a seed MAC address from the PF MAC Address using jhash.
2146 * MAC Address for VFs are assigned incrementally starting from the seed.
2147 * These addresses are programmed in the ASIC by the PF and the VF driver
2148 * queries for the MAC address during its probe.
2150 static inline int be_vf_eth_addr_config(struct be_adapter *adapter)
2156 be_vf_eth_addr_generate(adapter, mac);
2158 for (vf = 0; vf < num_vfs; vf++) {
2159 status = be_cmd_pmac_add(adapter, mac,
2160 adapter->vf_cfg[vf].vf_if_handle,
2161 &adapter->vf_cfg[vf].vf_pmac_id);
2163 dev_err(&adapter->pdev->dev,
2164 "Mac address add failed for VF %d\n", vf);
2166 memcpy(adapter->vf_cfg[vf].vf_mac_addr, mac, ETH_ALEN);
2173 static inline void be_vf_eth_addr_rem(struct be_adapter *adapter)
2177 for (vf = 0; vf < num_vfs; vf++) {
2178 if (adapter->vf_cfg[vf].vf_pmac_id != BE_INVALID_PMAC_ID)
2179 be_cmd_pmac_del(adapter,
2180 adapter->vf_cfg[vf].vf_if_handle,
2181 adapter->vf_cfg[vf].vf_pmac_id);
2185 static int be_setup(struct be_adapter *adapter)
2187 struct net_device *netdev = adapter->netdev;
2188 u32 cap_flags, en_flags, vf = 0;
2192 cap_flags = en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST;
2194 if (be_physfn(adapter)) {
2195 cap_flags |= BE_IF_FLAGS_MCAST_PROMISCUOUS |
2196 BE_IF_FLAGS_PROMISCUOUS |
2197 BE_IF_FLAGS_PASS_L3L4_ERRORS;
2198 en_flags |= BE_IF_FLAGS_PASS_L3L4_ERRORS;
2200 if (be_multi_rxq(adapter)) {
2201 cap_flags |= BE_IF_FLAGS_RSS;
2202 en_flags |= BE_IF_FLAGS_RSS;
2206 status = be_cmd_if_create(adapter, cap_flags, en_flags,
2207 netdev->dev_addr, false/* pmac_invalid */,
2208 &adapter->if_handle, &adapter->pmac_id, 0);
2212 if (be_physfn(adapter)) {
2213 while (vf < num_vfs) {
2214 cap_flags = en_flags = BE_IF_FLAGS_UNTAGGED
2215 | BE_IF_FLAGS_BROADCAST;
2216 status = be_cmd_if_create(adapter, cap_flags, en_flags,
2218 &adapter->vf_cfg[vf].vf_if_handle,
2221 dev_err(&adapter->pdev->dev,
2222 "Interface Create failed for VF %d\n", vf);
2225 adapter->vf_cfg[vf].vf_pmac_id = BE_INVALID_PMAC_ID;
2228 } else if (!be_physfn(adapter)) {
2229 status = be_cmd_mac_addr_query(adapter, mac,
2230 MAC_ADDRESS_TYPE_NETWORK, false, adapter->if_handle);
2232 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
2233 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
2237 status = be_tx_queues_create(adapter);
2241 status = be_rx_queues_create(adapter);
2245 status = be_mcc_queues_create(adapter);
2249 if (be_physfn(adapter)) {
2250 status = be_vf_eth_addr_config(adapter);
2255 adapter->link_speed = -1;
2260 if (be_physfn(adapter))
2261 be_vf_eth_addr_rem(adapter);
2262 be_mcc_queues_destroy(adapter);
2264 be_rx_queues_destroy(adapter);
2266 be_tx_queues_destroy(adapter);
2268 for (vf = 0; vf < num_vfs; vf++)
2269 if (adapter->vf_cfg[vf].vf_if_handle)
2270 be_cmd_if_destroy(adapter,
2271 adapter->vf_cfg[vf].vf_if_handle);
2272 be_cmd_if_destroy(adapter, adapter->if_handle);
2277 static int be_clear(struct be_adapter *adapter)
2279 if (be_physfn(adapter))
2280 be_vf_eth_addr_rem(adapter);
2282 be_mcc_queues_destroy(adapter);
2283 be_rx_queues_destroy(adapter);
2284 be_tx_queues_destroy(adapter);
2286 be_cmd_if_destroy(adapter, adapter->if_handle);
2288 /* tell fw we're done with firing cmds */
2289 be_cmd_fw_clean(adapter);
2294 #define FW_FILE_HDR_SIGN "ServerEngines Corp. "
2295 char flash_cookie[2][16] = {"*** SE FLAS",
2296 "H DIRECTORY *** "};
2298 static bool be_flash_redboot(struct be_adapter *adapter,
2299 const u8 *p, u32 img_start, int image_size,
2306 crc_offset = hdr_size + img_start + image_size - 4;
2310 status = be_cmd_get_flash_crc(adapter, flashed_crc,
2313 dev_err(&adapter->pdev->dev,
2314 "could not get crc from flash, not flashing redboot\n");
2318 /*update redboot only if crc does not match*/
2319 if (!memcmp(flashed_crc, p, 4))
2325 static int be_flash_data(struct be_adapter *adapter,
2326 const struct firmware *fw,
2327 struct be_dma_mem *flash_cmd, int num_of_images)
2330 int status = 0, i, filehdr_size = 0;
2331 u32 total_bytes = 0, flash_op;
2333 const u8 *p = fw->data;
2334 struct be_cmd_write_flashrom *req = flash_cmd->va;
2335 struct flash_comp *pflashcomp;
2338 struct flash_comp gen3_flash_types[9] = {
2339 { FLASH_iSCSI_PRIMARY_IMAGE_START_g3, IMG_TYPE_ISCSI_ACTIVE,
2340 FLASH_IMAGE_MAX_SIZE_g3},
2341 { FLASH_REDBOOT_START_g3, IMG_TYPE_REDBOOT,
2342 FLASH_REDBOOT_IMAGE_MAX_SIZE_g3},
2343 { FLASH_iSCSI_BIOS_START_g3, IMG_TYPE_BIOS,
2344 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2345 { FLASH_PXE_BIOS_START_g3, IMG_TYPE_PXE_BIOS,
2346 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2347 { FLASH_FCoE_BIOS_START_g3, IMG_TYPE_FCOE_BIOS,
2348 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2349 { FLASH_iSCSI_BACKUP_IMAGE_START_g3, IMG_TYPE_ISCSI_BACKUP,
2350 FLASH_IMAGE_MAX_SIZE_g3},
2351 { FLASH_FCoE_PRIMARY_IMAGE_START_g3, IMG_TYPE_FCOE_FW_ACTIVE,
2352 FLASH_IMAGE_MAX_SIZE_g3},
2353 { FLASH_FCoE_BACKUP_IMAGE_START_g3, IMG_TYPE_FCOE_FW_BACKUP,
2354 FLASH_IMAGE_MAX_SIZE_g3},
2355 { FLASH_NCSI_START_g3, IMG_TYPE_NCSI_FW,
2356 FLASH_NCSI_IMAGE_MAX_SIZE_g3}
2358 struct flash_comp gen2_flash_types[8] = {
2359 { FLASH_iSCSI_PRIMARY_IMAGE_START_g2, IMG_TYPE_ISCSI_ACTIVE,
2360 FLASH_IMAGE_MAX_SIZE_g2},
2361 { FLASH_REDBOOT_START_g2, IMG_TYPE_REDBOOT,
2362 FLASH_REDBOOT_IMAGE_MAX_SIZE_g2},
2363 { FLASH_iSCSI_BIOS_START_g2, IMG_TYPE_BIOS,
2364 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2365 { FLASH_PXE_BIOS_START_g2, IMG_TYPE_PXE_BIOS,
2366 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2367 { FLASH_FCoE_BIOS_START_g2, IMG_TYPE_FCOE_BIOS,
2368 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2369 { FLASH_iSCSI_BACKUP_IMAGE_START_g2, IMG_TYPE_ISCSI_BACKUP,
2370 FLASH_IMAGE_MAX_SIZE_g2},
2371 { FLASH_FCoE_PRIMARY_IMAGE_START_g2, IMG_TYPE_FCOE_FW_ACTIVE,
2372 FLASH_IMAGE_MAX_SIZE_g2},
2373 { FLASH_FCoE_BACKUP_IMAGE_START_g2, IMG_TYPE_FCOE_FW_BACKUP,
2374 FLASH_IMAGE_MAX_SIZE_g2}
2377 if (adapter->generation == BE_GEN3) {
2378 pflashcomp = gen3_flash_types;
2379 filehdr_size = sizeof(struct flash_file_hdr_g3);
2382 pflashcomp = gen2_flash_types;
2383 filehdr_size = sizeof(struct flash_file_hdr_g2);
2386 for (i = 0; i < num_comp; i++) {
2387 if ((pflashcomp[i].optype == IMG_TYPE_NCSI_FW) &&
2388 memcmp(adapter->fw_ver, "3.102.148.0", 11) < 0)
2390 if ((pflashcomp[i].optype == IMG_TYPE_REDBOOT) &&
2391 (!be_flash_redboot(adapter, fw->data,
2392 pflashcomp[i].offset, pflashcomp[i].size,
2396 p += filehdr_size + pflashcomp[i].offset
2397 + (num_of_images * sizeof(struct image_hdr));
2398 if (p + pflashcomp[i].size > fw->data + fw->size)
2400 total_bytes = pflashcomp[i].size;
2401 while (total_bytes) {
2402 if (total_bytes > 32*1024)
2403 num_bytes = 32*1024;
2405 num_bytes = total_bytes;
2406 total_bytes -= num_bytes;
2409 flash_op = FLASHROM_OPER_FLASH;
2411 flash_op = FLASHROM_OPER_SAVE;
2412 memcpy(req->params.data_buf, p, num_bytes);
2414 status = be_cmd_write_flashrom(adapter, flash_cmd,
2415 pflashcomp[i].optype, flash_op, num_bytes);
2417 dev_err(&adapter->pdev->dev,
2418 "cmd to write to flash rom failed.\n");
2427 static int get_ufigen_type(struct flash_file_hdr_g2 *fhdr)
2431 if (fhdr->build[0] == '3')
2433 else if (fhdr->build[0] == '2')
2439 int be_load_fw(struct be_adapter *adapter, u8 *func)
2441 char fw_file[ETHTOOL_FLASH_MAX_FILENAME];
2442 const struct firmware *fw;
2443 struct flash_file_hdr_g2 *fhdr;
2444 struct flash_file_hdr_g3 *fhdr3;
2445 struct image_hdr *img_hdr_ptr = NULL;
2446 struct be_dma_mem flash_cmd;
2447 int status, i = 0, num_imgs = 0;
2450 strcpy(fw_file, func);
2452 status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
2457 fhdr = (struct flash_file_hdr_g2 *) p;
2458 dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
2460 flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
2461 flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size,
2463 if (!flash_cmd.va) {
2465 dev_err(&adapter->pdev->dev,
2466 "Memory allocation failure while flashing\n");
2470 if ((adapter->generation == BE_GEN3) &&
2471 (get_ufigen_type(fhdr) == BE_GEN3)) {
2472 fhdr3 = (struct flash_file_hdr_g3 *) fw->data;
2473 num_imgs = le32_to_cpu(fhdr3->num_imgs);
2474 for (i = 0; i < num_imgs; i++) {
2475 img_hdr_ptr = (struct image_hdr *) (fw->data +
2476 (sizeof(struct flash_file_hdr_g3) +
2477 i * sizeof(struct image_hdr)));
2478 if (le32_to_cpu(img_hdr_ptr->imageid) == 1)
2479 status = be_flash_data(adapter, fw, &flash_cmd,
2482 } else if ((adapter->generation == BE_GEN2) &&
2483 (get_ufigen_type(fhdr) == BE_GEN2)) {
2484 status = be_flash_data(adapter, fw, &flash_cmd, 0);
2486 dev_err(&adapter->pdev->dev,
2487 "UFI and Interface are not compatible for flashing\n");
2491 pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va,
2494 dev_err(&adapter->pdev->dev, "Firmware load error\n");
2498 dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n");
2501 release_firmware(fw);
2505 static struct net_device_ops be_netdev_ops = {
2506 .ndo_open = be_open,
2507 .ndo_stop = be_close,
2508 .ndo_start_xmit = be_xmit,
2509 .ndo_set_rx_mode = be_set_multicast_list,
2510 .ndo_set_mac_address = be_mac_addr_set,
2511 .ndo_change_mtu = be_change_mtu,
2512 .ndo_validate_addr = eth_validate_addr,
2513 .ndo_vlan_rx_register = be_vlan_register,
2514 .ndo_vlan_rx_add_vid = be_vlan_add_vid,
2515 .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
2516 .ndo_set_vf_mac = be_set_vf_mac,
2517 .ndo_set_vf_vlan = be_set_vf_vlan,
2518 .ndo_set_vf_tx_rate = be_set_vf_tx_rate,
2519 .ndo_get_vf_config = be_get_vf_config
2522 static void be_netdev_init(struct net_device *netdev)
2524 struct be_adapter *adapter = netdev_priv(netdev);
2525 struct be_rx_obj *rxo;
2528 netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
2529 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_HW_CSUM |
2530 NETIF_F_GRO | NETIF_F_TSO6;
2532 netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM;
2534 netdev->flags |= IFF_MULTICAST;
2536 adapter->rx_csum = true;
2538 /* Default settings for Rx and Tx flow control */
2539 adapter->rx_fc = true;
2540 adapter->tx_fc = true;
2542 netif_set_gso_max_size(netdev, 65535);
2544 BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
2546 SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
2548 for_all_rx_queues(adapter, rxo, i)
2549 netif_napi_add(netdev, &rxo->rx_eq.napi, be_poll_rx,
2552 netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
2555 netif_carrier_off(netdev);
2556 netif_stop_queue(netdev);
2559 static void be_unmap_pci_bars(struct be_adapter *adapter)
2562 iounmap(adapter->csr);
2564 iounmap(adapter->db);
2565 if (adapter->pcicfg && be_physfn(adapter))
2566 iounmap(adapter->pcicfg);
2569 static int be_map_pci_bars(struct be_adapter *adapter)
2572 int pcicfg_reg, db_reg;
2574 if (be_physfn(adapter)) {
2575 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
2576 pci_resource_len(adapter->pdev, 2));
2579 adapter->csr = addr;
2582 if (adapter->generation == BE_GEN2) {
2587 if (be_physfn(adapter))
2592 addr = ioremap_nocache(pci_resource_start(adapter->pdev, db_reg),
2593 pci_resource_len(adapter->pdev, db_reg));
2598 if (be_physfn(adapter)) {
2599 addr = ioremap_nocache(
2600 pci_resource_start(adapter->pdev, pcicfg_reg),
2601 pci_resource_len(adapter->pdev, pcicfg_reg));
2604 adapter->pcicfg = addr;
2606 adapter->pcicfg = adapter->db + SRIOV_VF_PCICFG_OFFSET;
2610 be_unmap_pci_bars(adapter);
2615 static void be_ctrl_cleanup(struct be_adapter *adapter)
2617 struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
2619 be_unmap_pci_bars(adapter);
2622 pci_free_consistent(adapter->pdev, mem->size,
2625 mem = &adapter->mc_cmd_mem;
2627 pci_free_consistent(adapter->pdev, mem->size,
2631 static int be_ctrl_init(struct be_adapter *adapter)
2633 struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
2634 struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
2635 struct be_dma_mem *mc_cmd_mem = &adapter->mc_cmd_mem;
2638 status = be_map_pci_bars(adapter);
2642 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
2643 mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
2644 mbox_mem_alloc->size, &mbox_mem_alloc->dma);
2645 if (!mbox_mem_alloc->va) {
2647 goto unmap_pci_bars;
2650 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
2651 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
2652 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
2653 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
2655 mc_cmd_mem->size = sizeof(struct be_cmd_req_mcast_mac_config);
2656 mc_cmd_mem->va = pci_alloc_consistent(adapter->pdev, mc_cmd_mem->size,
2658 if (mc_cmd_mem->va == NULL) {
2662 memset(mc_cmd_mem->va, 0, mc_cmd_mem->size);
2664 spin_lock_init(&adapter->mbox_lock);
2665 spin_lock_init(&adapter->mcc_lock);
2666 spin_lock_init(&adapter->mcc_cq_lock);
2668 init_completion(&adapter->flash_compl);
2669 pci_save_state(adapter->pdev);
2673 pci_free_consistent(adapter->pdev, mbox_mem_alloc->size,
2674 mbox_mem_alloc->va, mbox_mem_alloc->dma);
2677 be_unmap_pci_bars(adapter);
2683 static void be_stats_cleanup(struct be_adapter *adapter)
2685 struct be_dma_mem *cmd = &adapter->stats_cmd;
2688 pci_free_consistent(adapter->pdev, cmd->size,
2692 static int be_stats_init(struct be_adapter *adapter)
2694 struct be_dma_mem *cmd = &adapter->stats_cmd;
2696 cmd->size = sizeof(struct be_cmd_req_get_stats);
2697 cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
2698 if (cmd->va == NULL)
2700 memset(cmd->va, 0, cmd->size);
2704 static void __devexit be_remove(struct pci_dev *pdev)
2706 struct be_adapter *adapter = pci_get_drvdata(pdev);
2711 unregister_netdev(adapter->netdev);
2715 be_stats_cleanup(adapter);
2717 be_ctrl_cleanup(adapter);
2719 be_sriov_disable(adapter);
2721 be_msix_disable(adapter);
2723 pci_set_drvdata(pdev, NULL);
2724 pci_release_regions(pdev);
2725 pci_disable_device(pdev);
2727 free_netdev(adapter->netdev);
2730 static int be_get_config(struct be_adapter *adapter)
2735 status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
2739 status = be_cmd_query_fw_cfg(adapter, &adapter->port_num,
2740 &adapter->function_mode, &adapter->function_caps);
2744 memset(mac, 0, ETH_ALEN);
2746 if (be_physfn(adapter)) {
2747 status = be_cmd_mac_addr_query(adapter, mac,
2748 MAC_ADDRESS_TYPE_NETWORK, true /*permanent */, 0);
2753 if (!is_valid_ether_addr(mac))
2754 return -EADDRNOTAVAIL;
2756 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
2757 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
2760 if (adapter->function_mode & 0x400)
2761 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED/4;
2763 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED;
2768 static int __devinit be_probe(struct pci_dev *pdev,
2769 const struct pci_device_id *pdev_id)
2772 struct be_adapter *adapter;
2773 struct net_device *netdev;
2775 status = pci_enable_device(pdev);
2779 status = pci_request_regions(pdev, DRV_NAME);
2782 pci_set_master(pdev);
2784 netdev = alloc_etherdev(sizeof(struct be_adapter));
2785 if (netdev == NULL) {
2789 adapter = netdev_priv(netdev);
2791 switch (pdev->device) {
2794 adapter->generation = BE_GEN2;
2798 adapter->generation = BE_GEN3;
2801 adapter->generation = 0;
2804 adapter->pdev = pdev;
2805 pci_set_drvdata(pdev, adapter);
2806 adapter->netdev = netdev;
2807 SET_NETDEV_DEV(netdev, &pdev->dev);
2809 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
2811 netdev->features |= NETIF_F_HIGHDMA;
2813 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2815 dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
2820 be_sriov_enable(adapter);
2822 status = be_ctrl_init(adapter);
2826 /* sync up with fw's ready state */
2827 if (be_physfn(adapter)) {
2828 status = be_cmd_POST(adapter);
2833 /* tell fw we're ready to fire cmds */
2834 status = be_cmd_fw_init(adapter);
2838 if (be_physfn(adapter)) {
2839 status = be_cmd_reset_function(adapter);
2844 status = be_stats_init(adapter);
2848 status = be_get_config(adapter);
2852 be_msix_enable(adapter);
2854 INIT_DELAYED_WORK(&adapter->work, be_worker);
2856 status = be_setup(adapter);
2860 be_netdev_init(netdev);
2861 status = register_netdev(netdev);
2865 dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
2871 be_msix_disable(adapter);
2873 be_stats_cleanup(adapter);
2875 be_ctrl_cleanup(adapter);
2877 be_sriov_disable(adapter);
2878 free_netdev(adapter->netdev);
2879 pci_set_drvdata(pdev, NULL);
2881 pci_release_regions(pdev);
2883 pci_disable_device(pdev);
2885 dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
2889 static int be_suspend(struct pci_dev *pdev, pm_message_t state)
2891 struct be_adapter *adapter = pci_get_drvdata(pdev);
2892 struct net_device *netdev = adapter->netdev;
2895 be_setup_wol(adapter, true);
2897 netif_device_detach(netdev);
2898 if (netif_running(netdev)) {
2903 be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc);
2906 pci_save_state(pdev);
2907 pci_disable_device(pdev);
2908 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2912 static int be_resume(struct pci_dev *pdev)
2915 struct be_adapter *adapter = pci_get_drvdata(pdev);
2916 struct net_device *netdev = adapter->netdev;
2918 netif_device_detach(netdev);
2920 status = pci_enable_device(pdev);
2924 pci_set_power_state(pdev, 0);
2925 pci_restore_state(pdev);
2927 /* tell fw we're ready to fire cmds */
2928 status = be_cmd_fw_init(adapter);
2933 if (netif_running(netdev)) {
2938 netif_device_attach(netdev);
2941 be_setup_wol(adapter, false);
2946 * An FLR will stop BE from DMAing any data.
2948 static void be_shutdown(struct pci_dev *pdev)
2950 struct be_adapter *adapter = pci_get_drvdata(pdev);
2951 struct net_device *netdev = adapter->netdev;
2953 netif_device_detach(netdev);
2955 be_cmd_reset_function(adapter);
2958 be_setup_wol(adapter, true);
2960 pci_disable_device(pdev);
2963 static pci_ers_result_t be_eeh_err_detected(struct pci_dev *pdev,
2964 pci_channel_state_t state)
2966 struct be_adapter *adapter = pci_get_drvdata(pdev);
2967 struct net_device *netdev = adapter->netdev;
2969 dev_err(&adapter->pdev->dev, "EEH error detected\n");
2971 adapter->eeh_err = true;
2973 netif_device_detach(netdev);
2975 if (netif_running(netdev)) {
2982 if (state == pci_channel_io_perm_failure)
2983 return PCI_ERS_RESULT_DISCONNECT;
2985 pci_disable_device(pdev);
2987 return PCI_ERS_RESULT_NEED_RESET;
2990 static pci_ers_result_t be_eeh_reset(struct pci_dev *pdev)
2992 struct be_adapter *adapter = pci_get_drvdata(pdev);
2995 dev_info(&adapter->pdev->dev, "EEH reset\n");
2996 adapter->eeh_err = false;
2998 status = pci_enable_device(pdev);
3000 return PCI_ERS_RESULT_DISCONNECT;
3002 pci_set_master(pdev);
3003 pci_set_power_state(pdev, 0);
3004 pci_restore_state(pdev);
3006 /* Check if card is ok and fw is ready */
3007 status = be_cmd_POST(adapter);
3009 return PCI_ERS_RESULT_DISCONNECT;
3011 return PCI_ERS_RESULT_RECOVERED;
3014 static void be_eeh_resume(struct pci_dev *pdev)
3017 struct be_adapter *adapter = pci_get_drvdata(pdev);
3018 struct net_device *netdev = adapter->netdev;
3020 dev_info(&adapter->pdev->dev, "EEH resume\n");
3022 pci_save_state(pdev);
3024 /* tell fw we're ready to fire cmds */
3025 status = be_cmd_fw_init(adapter);
3029 status = be_setup(adapter);
3033 if (netif_running(netdev)) {
3034 status = be_open(netdev);
3038 netif_device_attach(netdev);
3041 dev_err(&adapter->pdev->dev, "EEH resume failed\n");
3044 static struct pci_error_handlers be_eeh_handlers = {
3045 .error_detected = be_eeh_err_detected,
3046 .slot_reset = be_eeh_reset,
3047 .resume = be_eeh_resume,
3050 static struct pci_driver be_driver = {
3052 .id_table = be_dev_ids,
3054 .remove = be_remove,
3055 .suspend = be_suspend,
3056 .resume = be_resume,
3057 .shutdown = be_shutdown,
3058 .err_handler = &be_eeh_handlers
3061 static int __init be_init_module(void)
3063 if (rx_frag_size != 8192 && rx_frag_size != 4096 &&
3064 rx_frag_size != 2048) {
3065 printk(KERN_WARNING DRV_NAME
3066 " : Module param rx_frag_size must be 2048/4096/8192."
3068 rx_frag_size = 2048;
3072 printk(KERN_WARNING DRV_NAME
3073 " : Module param num_vfs must not be greater than 32."
3078 return pci_register_driver(&be_driver);
3080 module_init(be_init_module);
3082 static void __exit be_exit_module(void)
3084 pci_unregister_driver(&be_driver);
3086 module_exit(be_exit_module);