drivers/mtd/onenand/onenand_base.c

   1 /*
   2  *  linux/drivers/mtd/onenand/onenand_base.c
   3  *
   4  *  Copyright (C) 2005-2007 Samsung Electronics
   5  *  Kyungmin Park <kyungmin.park@samsung.com>
   6  *
   7  *  Credits:
   8  *      Adrian Hunter <ext-adrian.hunter@nokia.com>:
   9  *      auto-placement support, read-while load support, various fixes
  10  *      Copyright (C) Nokia Corporation, 2007
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  */
  16
  17 #include <linux/kernel.h>
  18 #include <linux/module.h>
  19 #include <linux/init.h>
  20 #include <linux/sched.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/jiffies.h>
  23 #include <linux/mtd/mtd.h>
  24 #include <linux/mtd/onenand.h>
  25 #include <linux/mtd/partitions.h>
  26
  27 #include <asm/io.h>
  28
  29 /**
  30  * onenand_oob_64 - oob info for large (2KB) page
  31  */
  32 static struct nand_ecclayout onenand_oob_64 = {
  33         .eccbytes       = 20,
  34         .eccpos         = {
  35                 8, 9, 10, 11, 12,
  36                 24, 25, 26, 27, 28,
  37                 40, 41, 42, 43, 44,
  38                 56, 57, 58, 59, 60,
  39                 },
  40         .oobfree        = {
  41                 {2, 3}, {14, 2}, {18, 3}, {30, 2},
  42                 {34, 3}, {46, 2}, {50, 3}, {62, 2}
  43         }
  44 };
  45
  46 /**
  47  * onenand_oob_32 - oob info for middle (1KB) page
  48  */
  49 static struct nand_ecclayout onenand_oob_32 = {
  50         .eccbytes       = 10,
  51         .eccpos         = {
  52                 8, 9, 10, 11, 12,
  53                 24, 25, 26, 27, 28,
  54                 },
  55         .oobfree        = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
  56 };
  57
  58 static const unsigned char ffchars[] = {
  59         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  60         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
  61         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  62         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
  63         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  64         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
  65         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  66         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
  67 };
  68
  69 /**
  70  * onenand_readw - [OneNAND Interface] Read OneNAND register
  71  * @param addr          address to read
  72  *
  73  * Read OneNAND register
  74  */
  75 static unsigned short onenand_readw(void __iomem *addr)
  76 {
  77         return readw(addr);
  78 }
  79
  80 /**
  81  * onenand_writew - [OneNAND Interface] Write OneNAND register with value
  82  * @param value         value to write
  83  * @param addr          address to write
  84  *
  85  * Write OneNAND register with value
  86  */
  87 static void onenand_writew(unsigned short value, void __iomem *addr)
  88 {
  89         writew(value, addr);
  90 }
  91
  92 /**
  93  * onenand_block_address - [DEFAULT] Get block address
  94  * @param this          onenand chip data structure
  95  * @param block         the block
  96  * @return              translated block address if DDP, otherwise same
  97  *
  98  * Setup Start Address 1 Register (F100h)
  99  */
 100 static int onenand_block_address(struct onenand_chip *this, int block)
 101 {
 102         /* Device Flash Core select, NAND Flash Block Address */
 103         if (block & this->density_mask)
 104                 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
 105
 106         return block;
 107 }
 108
 109 /**
 110  * onenand_bufferram_address - [DEFAULT] Get bufferram address
 111  * @param this          onenand chip data structure
 112  * @param block         the block
 113  * @return              set DBS value if DDP, otherwise 0
 114  *
 115  * Setup Start Address 2 Register (F101h) for DDP
 116  */
 117 static int onenand_bufferram_address(struct onenand_chip *this, int block)
 118 {
 119         /* Device BufferRAM Select */
 120         if (block & this->density_mask)
 121                 return ONENAND_DDP_CHIP1;
 122
 123         return ONENAND_DDP_CHIP0;
 124 }
 125
 126 /**
 127  * onenand_page_address - [DEFAULT] Get page address
 128  * @param page          the page address
 129  * @param sector        the sector address
 130  * @return              combined page and sector address
 131  *
 132  * Setup Start Address 8 Register (F107h)
 133  */
 134 static int onenand_page_address(int page, int sector)
 135 {
 136         /* Flash Page Address, Flash Sector Address */
 137         int fpa, fsa;
 138
 139         fpa = page & ONENAND_FPA_MASK;
 140         fsa = sector & ONENAND_FSA_MASK;
 141
 142         return ((fpa << ONENAND_FPA_SHIFT) | fsa);
 143 }
 144
 145 /**
 146  * onenand_buffer_address - [DEFAULT] Get buffer address
 147  * @param dataram1      DataRAM index
 148  * @param sectors       the sector address
 149  * @param count         the number of sectors
 150  * @return              the start buffer value
 151  *
 152  * Setup Start Buffer Register (F200h)
 153  */
 154 static int onenand_buffer_address(int dataram1, int sectors, int count)
 155 {
 156         int bsa, bsc;
 157
 158         /* BufferRAM Sector Address */
 159         bsa = sectors & ONENAND_BSA_MASK;
 160
 161         if (dataram1)
 162                 bsa |= ONENAND_BSA_DATARAM1;    /* DataRAM1 */
 163         else
 164                 bsa |= ONENAND_BSA_DATARAM0;    /* DataRAM0 */
 165
 166         /* BufferRAM Sector Count */
 167         bsc = count & ONENAND_BSC_MASK;
 168
 169         return ((bsa << ONENAND_BSA_SHIFT) | bsc);
 170 }
 171
 172 /**
 173  * onenand_command - [DEFAULT] Send command to OneNAND device
 174  * @param mtd           MTD device structure
 175  * @param cmd           the command to be sent
 176  * @param addr          offset to read from or write to
 177  * @param len           number of bytes to read or write
 178  *
 179  * Send command to OneNAND device. This function is used for middle/large page
 180  * devices (1KB/2KB Bytes per page)
 181  */
 182 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
 183 {
 184         struct onenand_chip *this = mtd->priv;
 185         int value, readcmd = 0, block_cmd = 0;
 186         int block, page;
 187
 188         /* Address translation */
 189         switch (cmd) {
 190         case ONENAND_CMD_UNLOCK:
 191         case ONENAND_CMD_LOCK:
 192         case ONENAND_CMD_LOCK_TIGHT:
 193         case ONENAND_CMD_UNLOCK_ALL:
 194                 block = -1;
 195                 page = -1;
 196                 break;
 197
 198         case ONENAND_CMD_ERASE:
 199         case ONENAND_CMD_BUFFERRAM:
 200         case ONENAND_CMD_OTP_ACCESS:
 201                 block_cmd = 1;
 202                 block = (int) (addr >> this->erase_shift);
 203                 page = -1;
 204                 break;
 205
 206         default:
 207                 block = (int) (addr >> this->erase_shift);
 208                 page = (int) (addr >> this->page_shift);
 209                 page &= this->page_mask;
 210                 break;
 211         }
 212
 213         /* NOTE: The setting order of the registers is very important! */
 214         if (cmd == ONENAND_CMD_BUFFERRAM) {
 215                 /* Select DataRAM for DDP */
 216                 value = onenand_bufferram_address(this, block);
 217                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 218
 219                 /* Switch to the next data buffer */
 220                 ONENAND_SET_NEXT_BUFFERRAM(this);
 221
 222                 return 0;
 223         }
 224
 225         if (block != -1) {
 226                 /* Write 'DFS, FBA' of Flash */
 227                 value = onenand_block_address(this, block);
 228                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
 229
 230                 if (block_cmd) {
 231                         /* Select DataRAM for DDP */
 232                         value = onenand_bufferram_address(this, block);
 233                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 234                 }
 235         }
 236
 237         if (page != -1) {
 238                 /* Now we use page size operation */
 239                 int sectors = 4, count = 4;
 240                 int dataram;
 241
 242                 switch (cmd) {
 243                 case ONENAND_CMD_READ:
 244                 case ONENAND_CMD_READOOB:
 245                         dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
 246                         readcmd = 1;
 247                         break;
 248
 249                 default:
 250                         dataram = ONENAND_CURRENT_BUFFERRAM(this);
 251                         break;
 252                 }
 253
 254                 /* Write 'FPA, FSA' of Flash */
 255                 value = onenand_page_address(page, sectors);
 256                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
 257
 258                 /* Write 'BSA, BSC' of DataRAM */
 259                 value = onenand_buffer_address(dataram, sectors, count);
 260                 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
 261
 262                 if (readcmd) {
 263                         /* Select DataRAM for DDP */
 264                         value = onenand_bufferram_address(this, block);
 265                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 266                 }
 267         }
 268
 269         /* Interrupt clear */
 270         this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
 271
 272         /* Write command */
 273         this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
 274
 275         return 0;
 276 }
 277
 278 /**
 279  * onenand_wait - [DEFAULT] wait until the command is done
 280  * @param mtd           MTD device structure
 281  * @param state         state to select the max. timeout value
 282  *
 283  * Wait for command done. This applies to all OneNAND command
 284  * Read can take up to 30us, erase up to 2ms and program up to 350us
 285  * according to general OneNAND specs
 286  */
 287 static int onenand_wait(struct mtd_info *mtd, int state)
 288 {
 289         struct onenand_chip * this = mtd->priv;
 290         unsigned long timeout;
 291         unsigned int flags = ONENAND_INT_MASTER;
 292         unsigned int interrupt = 0;
 293         unsigned int ctrl;
 294
 295         /* The 20 msec is enough */
 296         timeout = jiffies + msecs_to_jiffies(20);
 297         while (time_before(jiffies, timeout)) {
 298                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 299
 300                 if (interrupt & flags)
 301                         break;
 302
 303                 if (state != FL_READING)
 304                         cond_resched();
 305         }
 306         /* To get correct interrupt status in timeout case */
 307         interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 308
 309         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
 310
 311         if (ctrl & ONENAND_CTRL_ERROR) {
 312                 printk(KERN_ERR "onenand_wait: controller error = 0x%04x\n", ctrl);
 313                 if (ctrl & ONENAND_CTRL_LOCK)
 314                         printk(KERN_ERR "onenand_wait: it's locked error.\n");
 315                 return ctrl;
 316         }
 317
 318         if (interrupt & ONENAND_INT_READ) {
 319                 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
 320                 if (ecc) {
 321                         printk(KERN_ERR "onenand_wait: ECC error = 0x%04x\n", ecc);
 322                         if (ecc & ONENAND_ECC_2BIT_ALL) {
 323                                 mtd->ecc_stats.failed++;
 324                                 return ecc;
 325                         } else if (ecc & ONENAND_ECC_1BIT_ALL)
 326                                 mtd->ecc_stats.corrected++;
 327                 }
 328         } else if (state == FL_READING) {
 329                 printk(KERN_ERR "onenand_wait: read timeout! ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
 330                 return -EIO;
 331         }
 332
 333         return 0;
 334 }
 335
 336 /*
 337  * onenand_interrupt - [DEFAULT] onenand interrupt handler
 338  * @param irq           onenand interrupt number
 339  * @param dev_id        interrupt data
 340  *
 341  * complete the work
 342  */
 343 static irqreturn_t onenand_interrupt(int irq, void *data)
 344 {
 345         struct onenand_chip *this = (struct onenand_chip *) data;
 346
 347         /* To handle shared interrupt */
 348         if (!this->complete.done)
 349                 complete(&this->complete);
 350
 351         return IRQ_HANDLED;
 352 }
 353
 354 /*
 355  * onenand_interrupt_wait - [DEFAULT] wait until the command is done
 356  * @param mtd           MTD device structure
 357  * @param state         state to select the max. timeout value
 358  *
 359  * Wait for command done.
 360  */
 361 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
 362 {
 363         struct onenand_chip *this = mtd->priv;
 364
 365         wait_for_completion(&this->complete);
 366
 367         return onenand_wait(mtd, state);
 368 }
 369
 370 /*
 371  * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
 372  * @param mtd           MTD device structure
 373  * @param state         state to select the max. timeout value
 374  *
 375  * Try interrupt based wait (It is used one-time)
 376  */
 377 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
 378 {
 379         struct onenand_chip *this = mtd->priv;
 380         unsigned long remain, timeout;
 381
 382         /* We use interrupt wait first */
 383         this->wait = onenand_interrupt_wait;
 384
 385         timeout = msecs_to_jiffies(100);
 386         remain = wait_for_completion_timeout(&this->complete, timeout);
 387         if (!remain) {
 388                 printk(KERN_INFO "OneNAND: There's no interrupt. "
 389                                 "We use the normal wait\n");
 390
 391                 /* Release the irq */
 392                 free_irq(this->irq, this);
 393
 394                 this->wait = onenand_wait;
 395         }
 396
 397         return onenand_wait(mtd, state);
 398 }
 399
 400 /*
 401  * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
 402  * @param mtd           MTD device structure
 403  *
 404  * There's two method to wait onenand work
 405  * 1. polling - read interrupt status register
 406  * 2. interrupt - use the kernel interrupt method
 407  */
 408 static void onenand_setup_wait(struct mtd_info *mtd)
 409 {
 410         struct onenand_chip *this = mtd->priv;
 411         int syscfg;
 412
 413         init_completion(&this->complete);
 414
 415         if (this->irq <= 0) {
 416                 this->wait = onenand_wait;
 417                 return;
 418         }
 419
 420         if (request_irq(this->irq, &onenand_interrupt,
 421                                 IRQF_SHARED, "onenand", this)) {
 422                 /* If we can't get irq, use the normal wait */
 423                 this->wait = onenand_wait;
 424                 return;
 425         }
 426
 427         /* Enable interrupt */
 428         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
 429         syscfg |= ONENAND_SYS_CFG1_IOBE;
 430         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
 431
 432         this->wait = onenand_try_interrupt_wait;
 433 }
 434
 435 /**
 436  * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
 437  * @param mtd           MTD data structure
 438  * @param area          BufferRAM area
 439  * @return              offset given area
 440  *
 441  * Return BufferRAM offset given area
 442  */
 443 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
 444 {
 445         struct onenand_chip *this = mtd->priv;
 446
 447         if (ONENAND_CURRENT_BUFFERRAM(this)) {
 448                 if (area == ONENAND_DATARAM)
 449                         return mtd->writesize;
 450                 if (area == ONENAND_SPARERAM)
 451                         return mtd->oobsize;
 452         }
 453
 454         return 0;
 455 }
 456
 457 /**
 458  * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
 459  * @param mtd           MTD data structure
 460  * @param area          BufferRAM area
 461  * @param buffer        the databuffer to put/get data
 462  * @param offset        offset to read from or write to
 463  * @param count         number of bytes to read/write
 464  *
 465  * Read the BufferRAM area
 466  */
 467 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
 468                 unsigned char *buffer, int offset, size_t count)
 469 {
 470         struct onenand_chip *this = mtd->priv;
 471         void __iomem *bufferram;
 472
 473         bufferram = this->base + area;
 474
 475         bufferram += onenand_bufferram_offset(mtd, area);
 476
 477         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 478                 unsigned short word;
 479
 480                 /* Align with word(16-bit) size */
 481                 count--;
 482
 483                 /* Read word and save byte */
 484                 word = this->read_word(bufferram + offset + count);
 485                 buffer[count] = (word & 0xff);
 486         }
 487
 488         memcpy(buffer, bufferram + offset, count);
 489
 490         return 0;
 491 }
 492
 493 /**
 494  * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
 495  * @param mtd           MTD data structure
 496  * @param area          BufferRAM area
 497  * @param buffer        the databuffer to put/get data
 498  * @param offset        offset to read from or write to
 499  * @param count         number of bytes to read/write
 500  *
 501  * Read the BufferRAM area with Sync. Burst Mode
 502  */
 503 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
 504                 unsigned char *buffer, int offset, size_t count)
 505 {
 506         struct onenand_chip *this = mtd->priv;
 507         void __iomem *bufferram;
 508
 509         bufferram = this->base + area;
 510
 511         bufferram += onenand_bufferram_offset(mtd, area);
 512
 513         this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
 514
 515         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 516                 unsigned short word;
 517
 518                 /* Align with word(16-bit) size */
 519                 count--;
 520
 521                 /* Read word and save byte */
 522                 word = this->read_word(bufferram + offset + count);
 523                 buffer[count] = (word & 0xff);
 524         }
 525
 526         memcpy(buffer, bufferram + offset, count);
 527
 528         this->mmcontrol(mtd, 0);
 529
 530         return 0;
 531 }
 532
 533 /**
 534  * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
 535  * @param mtd           MTD data structure
 536  * @param area          BufferRAM area
 537  * @param buffer        the databuffer to put/get data
 538  * @param offset        offset to read from or write to
 539  * @param count         number of bytes to read/write
 540  *
 541  * Write the BufferRAM area
 542  */
 543 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
 544                 const unsigned char *buffer, int offset, size_t count)
 545 {
 546         struct onenand_chip *this = mtd->priv;
 547         void __iomem *bufferram;
 548
 549         bufferram = this->base + area;
 550
 551         bufferram += onenand_bufferram_offset(mtd, area);
 552
 553         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 554                 unsigned short word;
 555                 int byte_offset;
 556
 557                 /* Align with word(16-bit) size */
 558                 count--;
 559
 560                 /* Calculate byte access offset */
 561                 byte_offset = offset + count;
 562
 563                 /* Read word and save byte */
 564                 word = this->read_word(bufferram + byte_offset);
 565                 word = (word & ~0xff) | buffer[count];
 566                 this->write_word(word, bufferram + byte_offset);
 567         }
 568
 569         memcpy(bufferram + offset, buffer, count);
 570
 571         return 0;
 572 }
 573
 574 /**
 575  * onenand_check_bufferram - [GENERIC] Check BufferRAM information
 576  * @param mtd           MTD data structure
 577  * @param addr          address to check
 578  * @return              1 if there are valid data, otherwise 0
 579  *
 580  * Check bufferram if there is data we required
 581  */
 582 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
 583 {
 584         struct onenand_chip *this = mtd->priv;
 585         int blockpage, found = 0;
 586         unsigned int i;
 587
 588         blockpage = (int) (addr >> this->page_shift);
 589
 590         /* Is there valid data? */
 591         i = ONENAND_CURRENT_BUFFERRAM(this);
 592         if (this->bufferram[i].blockpage == blockpage)
 593                 found = 1;
 594         else {
 595                 /* Check another BufferRAM */
 596                 i = ONENAND_NEXT_BUFFERRAM(this);
 597                 if (this->bufferram[i].blockpage == blockpage) {
 598                         ONENAND_SET_NEXT_BUFFERRAM(this);
 599                         found = 1;
 600                 }
 601         }
 602
 603         if (found && ONENAND_IS_DDP(this)) {
 604                 /* Select DataRAM for DDP */
 605                 int block = (int) (addr >> this->erase_shift);
 606                 int value = onenand_bufferram_address(this, block);
 607                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 608         }
 609
 610         return found;
 611 }
 612
 613 /**
 614  * onenand_update_bufferram - [GENERIC] Update BufferRAM information
 615  * @param mtd           MTD data structure
 616  * @param addr          address to update
 617  * @param valid         valid flag
 618  *
 619  * Update BufferRAM information
 620  */
 621 static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
 622                 int valid)
 623 {
 624         struct onenand_chip *this = mtd->priv;
 625         int blockpage;
 626         unsigned int i;
 627
 628         blockpage = (int) (addr >> this->page_shift);
 629
 630         /* Invalidate another BufferRAM */
 631         i = ONENAND_NEXT_BUFFERRAM(this);
 632         if (this->bufferram[i].blockpage == blockpage)
 633                 this->bufferram[i].blockpage = -1;
 634
 635         /* Update BufferRAM */
 636         i = ONENAND_CURRENT_BUFFERRAM(this);
 637         if (valid)
 638                 this->bufferram[i].blockpage = blockpage;
 639         else
 640                 this->bufferram[i].blockpage = -1;
 641 }
 642
 643 /**
 644  * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
 645  * @param mtd           MTD data structure
 646  * @param addr          start address to invalidate
 647  * @param len           length to invalidate
 648  *
 649  * Invalidate BufferRAM information
 650  */
 651 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
 652                 unsigned int len)
 653 {
 654         struct onenand_chip *this = mtd->priv;
 655         int i;
 656         loff_t end_addr = addr + len;
 657
 658         /* Invalidate BufferRAM */
 659         for (i = 0; i < MAX_BUFFERRAM; i++) {
 660                 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
 661                 if (buf_addr >= addr && buf_addr < end_addr)
 662                         this->bufferram[i].blockpage = -1;
 663         }
 664 }
 665
 666 /**
 667  * onenand_get_device - [GENERIC] Get chip for selected access
 668  * @param mtd           MTD device structure
 669  * @param new_state     the state which is requested
 670  *
 671  * Get the device and lock it for exclusive access
 672  */
 673 static int onenand_get_device(struct mtd_info *mtd, int new_state)
 674 {
 675         struct onenand_chip *this = mtd->priv;
 676         DECLARE_WAITQUEUE(wait, current);
 677
 678         /*
 679          * Grab the lock and see if the device is available
 680          */
 681         while (1) {
 682                 spin_lock(&this->chip_lock);
 683                 if (this->state == FL_READY) {
 684                         this->state = new_state;
 685                         spin_unlock(&this->chip_lock);
 686                         break;
 687                 }
 688                 if (new_state == FL_PM_SUSPENDED) {
 689                         spin_unlock(&this->chip_lock);
 690                         return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
 691                 }
 692                 set_current_state(TASK_UNINTERRUPTIBLE);
 693                 add_wait_queue(&this->wq, &wait);
 694                 spin_unlock(&this->chip_lock);
 695                 schedule();
 696                 remove_wait_queue(&this->wq, &wait);
 697         }
 698
 699         return 0;
 700 }
 701
 702 /**
 703  * onenand_release_device - [GENERIC] release chip
 704  * @param mtd           MTD device structure
 705  *
 706  * Deselect, release chip lock and wake up anyone waiting on the device
 707  */
 708 static void onenand_release_device(struct mtd_info *mtd)
 709 {
 710         struct onenand_chip *this = mtd->priv;
 711
 712         /* Release the chip */
 713         spin_lock(&this->chip_lock);
 714         this->state = FL_READY;
 715         wake_up(&this->wq);
 716         spin_unlock(&this->chip_lock);
 717 }
 718
 719 /**
 720  * onenand_read - [MTD Interface] Read data from flash
 721  * @param mtd           MTD device structure
 722  * @param from          offset to read from
 723  * @param len           number of bytes to read
 724  * @param retlen        pointer to variable to store the number of read bytes
 725  * @param buf           the databuffer to put data
 726  *
 727  * Read with ecc
 728 */
 729 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
 730         size_t *retlen, u_char *buf)
 731 {
 732         struct onenand_chip *this = mtd->priv;
 733         struct mtd_ecc_stats stats;
 734         int read = 0, column;
 735         int thislen;
 736         int ret = 0, boundary = 0;
 737
 738         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
 739
 740         /* Do not allow reads past end of device */
 741         if ((from + len) > mtd->size) {
 742                 printk(KERN_ERR "onenand_read: Attempt read beyond end of device\n");
 743                 *retlen = 0;
 744                 return -EINVAL;
 745         }
 746
 747         /* Grab the lock and see if the device is available */
 748         onenand_get_device(mtd, FL_READING);
 749
 750         stats = mtd->ecc_stats;
 751
 752         /* Read-while-load method */
 753
 754         /* Do first load to bufferRAM */
 755         if (read < len) {
 756                 if (!onenand_check_bufferram(mtd, from)) {
 757                         this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
 758                         ret = this->wait(mtd, FL_READING);
 759                         onenand_update_bufferram(mtd, from, !ret);
 760                 }
 761         }
 762
 763         thislen = min_t(int, mtd->writesize, len - read);
 764         column = from & (mtd->writesize - 1);
 765         if (column + thislen > mtd->writesize)
 766                 thislen = mtd->writesize - column;
 767
 768         while (!ret) {
 769                 /* If there is more to load then start next load */
 770                 from += thislen;
 771                 if (read + thislen < len) {
 772                         this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
 773                         /*
 774                          * Chip boundary handling in DDP
 775                          * Now we issued chip 1 read and pointed chip 1
 776                          * bufferam so we have to point chip 0 bufferam.
 777                          */
 778                         if (ONENAND_IS_DDP(this) &&
 779                             unlikely(from == (this->chipsize >> 1))) {
 780                                 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
 781                                 boundary = 1;
 782                         } else
 783                                 boundary = 0;
 784                         ONENAND_SET_PREV_BUFFERRAM(this);
 785                 }
 786                 /* While load is going, read from last bufferRAM */
 787                 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
 788                 /* See if we are done */
 789                 read += thislen;
 790                 if (read == len)
 791                         break;
 792                 /* Set up for next read from bufferRAM */
 793                 if (unlikely(boundary))
 794                         this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
 795                 ONENAND_SET_NEXT_BUFFERRAM(this);
 796                 buf += thislen;
 797                 thislen = min_t(int, mtd->writesize, len - read);
 798                 column = 0;
 799                 cond_resched();
 800                 /* Now wait for load */
 801                 ret = this->wait(mtd, FL_READING);
 802                 onenand_update_bufferram(mtd, from, !ret);
 803         }
 804
 805         /* Deselect and wake up anyone waiting on the device */
 806         onenand_release_device(mtd);
 807
 808         /*
 809          * Return success, if no ECC failures, else -EBADMSG
 810          * fs driver will take care of that, because
 811          * retlen == desired len and result == -EBADMSG
 812          */
 813         *retlen = read;
 814
 815         if (mtd->ecc_stats.failed - stats.failed)
 816                 return -EBADMSG;
 817
 818         if (ret)
 819                 return ret;
 820
 821         return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
 822 }
 823
 824 /**
 825  * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
 826  * @param mtd           MTD device structure
 827  * @param buf           destination address
 828  * @param column        oob offset to read from
 829  * @param thislen       oob length to read
 830  */
 831 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
 832                                 int thislen)
 833 {
 834         struct onenand_chip *this = mtd->priv;
 835         struct nand_oobfree *free;
 836         int readcol = column;
 837         int readend = column + thislen;
 838         int lastgap = 0;
 839         uint8_t *oob_buf = this->oob_buf;
 840
 841         for (free = this->ecclayout->oobfree; free->length; ++free) {
 842                 if (readcol >= lastgap)
 843                         readcol += free->offset - lastgap;
 844                 if (readend >= lastgap)
 845                         readend += free->offset - lastgap;
 846                 lastgap = free->offset + free->length;
 847         }
 848         this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
 849         for (free = this->ecclayout->oobfree; free->length; ++free) {
 850                 int free_end = free->offset + free->length;
 851                 if (free->offset < readend && free_end > readcol) {
 852                         int st = max_t(int,free->offset,readcol);
 853                         int ed = min_t(int,free_end,readend);
 854                         int n = ed - st;
 855                         memcpy(buf, oob_buf + st, n);
 856                         buf += n;
 857                 } else
 858                         break;
 859         }
 860         return 0;
 861 }
 862
 863 /**
 864  * onenand_do_read_oob - [MTD Interface] OneNAND read out-of-band
 865  * @param mtd           MTD device structure
 866  * @param from          offset to read from
 867  * @param len           number of bytes to read
 868  * @param retlen        pointer to variable to store the number of read bytes
 869  * @param buf           the databuffer to put data
 870  * @param mode          operation mode
 871  *
 872  * OneNAND read out-of-band data from the spare area
 873  */
 874 static int onenand_do_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
 875                         size_t *retlen, u_char *buf, mtd_oob_mode_t mode)
 876 {
 877         struct onenand_chip *this = mtd->priv;
 878         int read = 0, thislen, column, oobsize;
 879         int ret = 0;
 880
 881         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
 882
 883         /* Initialize return length value */
 884         *retlen = 0;
 885
 886         if (mode == MTD_OOB_AUTO)
 887                 oobsize = this->ecclayout->oobavail;
 888         else
 889                 oobsize = mtd->oobsize;
 890
 891         column = from & (mtd->oobsize - 1);
 892
 893         if (unlikely(column >= oobsize)) {
 894                 printk(KERN_ERR "onenand_read_oob: Attempted to start read outside oob\n");
 895                 return -EINVAL;
 896         }
 897
 898         /* Do not allow reads past end of device */
 899         if (unlikely(from >= mtd->size ||
 900                      column + len > ((mtd->size >> this->page_shift) -
 901                                      (from >> this->page_shift)) * oobsize)) {
 902                 printk(KERN_ERR "onenand_read_oob: Attempted to read beyond end of device\n");
 903                 return -EINVAL;
 904         }
 905
 906         /* Grab the lock and see if the device is available */
 907         onenand_get_device(mtd, FL_READING);
 908
 909         while (read < len) {
 910                 cond_resched();
 911
 912                 thislen = oobsize - column;
 913                 thislen = min_t(int, thislen, len);
 914
 915                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
 916
 917                 onenand_update_bufferram(mtd, from, 0);
 918
 919                 ret = this->wait(mtd, FL_READING);
 920                 /* First copy data and check return value for ECC handling */
 921
 922                 if (mode == MTD_OOB_AUTO)
 923                         onenand_transfer_auto_oob(mtd, buf, column, thislen);
 924                 else
 925                         this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
 926
 927                 if (ret) {
 928                         printk(KERN_ERR "onenand_read_oob: read failed = 0x%x\n", ret);
 929                         break;
 930                 }
 931
 932                 read += thislen;
 933
 934                 if (read == len)
 935                         break;
 936
 937                 buf += thislen;
 938
 939                 /* Read more? */
 940                 if (read < len) {
 941                         /* Page size */
 942                         from += mtd->writesize;
 943                         column = 0;
 944                 }
 945         }
 946
 947         /* Deselect and wake up anyone waiting on the device */
 948         onenand_release_device(mtd);
 949
 950         *retlen = read;
 951         return ret;
 952 }
 953
 954 /**
 955  * onenand_read_oob - [MTD Interface] NAND write data and/or out-of-band
 956  * @param mtd:          MTD device structure
 957  * @param from:         offset to read from
 958  * @param ops:          oob operation description structure
 959  */
 960 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
 961                             struct mtd_oob_ops *ops)
 962 {
 963         switch (ops->mode) {
 964         case MTD_OOB_PLACE:
 965         case MTD_OOB_AUTO:
 966                 break;
 967         case MTD_OOB_RAW:
 968                 /* Not implemented yet */
 969         default:
 970                 return -EINVAL;
 971         }
 972         return onenand_do_read_oob(mtd, from + ops->ooboffs, ops->ooblen,
 973                                    &ops->oobretlen, ops->oobbuf, ops->mode);
 974 }
 975
 976 /**
 977  * onenand_bbt_wait - [DEFAULT] wait until the command is done
 978  * @param mtd           MTD device structure
 979  * @param state         state to select the max. timeout value
 980  *
 981  * Wait for command done.
 982  */
 983 static int onenand_bbt_wait(struct mtd_info *mtd, int state)
 984 {
 985         struct onenand_chip *this = mtd->priv;
 986         unsigned long timeout;
 987         unsigned int interrupt;
 988         unsigned int ctrl;
 989
 990         /* The 20 msec is enough */
 991         timeout = jiffies + msecs_to_jiffies(20);
 992         while (time_before(jiffies, timeout)) {
 993                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 994                 if (interrupt & ONENAND_INT_MASTER)
 995                         break;
 996         }
 997         /* To get correct interrupt status in timeout case */
 998         interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 999         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
1000
1001         if (ctrl & ONENAND_CTRL_ERROR) {
1002                 printk(KERN_DEBUG "onenand_bbt_wait: controller error = 0x%04x\n", ctrl);
1003                 /* Initial bad block case */
1004                 if (ctrl & ONENAND_CTRL_LOAD)
1005                         return ONENAND_BBT_READ_ERROR;
1006                 return ONENAND_BBT_READ_FATAL_ERROR;
1007         }
1008
1009         if (interrupt & ONENAND_INT_READ) {
1010                 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
1011                 if (ecc & ONENAND_ECC_2BIT_ALL)
1012                         return ONENAND_BBT_READ_ERROR;
1013         } else {
1014                 printk(KERN_ERR "onenand_bbt_wait: read timeout!"
1015                         "ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
1016                 return ONENAND_BBT_READ_FATAL_ERROR;
1017         }
1018
1019         return 0;
1020 }
1021
1022 /**
1023  * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
1024  * @param mtd           MTD device structure
1025  * @param from          offset to read from
1026  * @param ops           oob operation description structure
1027  *
1028  * OneNAND read out-of-band data from the spare area for bbt scan
1029  */
1030 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
1031                             struct mtd_oob_ops *ops)
1032 {
1033         struct onenand_chip *this = mtd->priv;
1034         int read = 0, thislen, column;
1035         int ret = 0;
1036         size_t len = ops->ooblen;
1037         u_char *buf = ops->oobbuf;
1038
1039         DEBUG(MTD_DEBUG_LEVEL3, "onenand_bbt_read_oob: from = 0x%08x, len = %zi\n", (unsigned int) from, len);
1040
1041         /* Initialize return value */
1042         ops->oobretlen = 0;
1043
1044         /* Do not allow reads past end of device */
1045         if (unlikely((from + len) > mtd->size)) {
1046                 printk(KERN_ERR "onenand_bbt_read_oob: Attempt read beyond end of device\n");
1047                 return ONENAND_BBT_READ_FATAL_ERROR;
1048         }
1049
1050         /* Grab the lock and see if the device is available */
1051         onenand_get_device(mtd, FL_READING);
1052
1053         column = from & (mtd->oobsize - 1);
1054
1055         while (read < len) {
1056                 cond_resched();
1057
1058                 thislen = mtd->oobsize - column;
1059                 thislen = min_t(int, thislen, len);
1060
1061                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
1062
1063                 onenand_update_bufferram(mtd, from, 0);
1064
1065                 ret = onenand_bbt_wait(mtd, FL_READING);
1066                 if (ret)
1067                         break;
1068
1069                 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1070                 read += thislen;
1071                 if (read == len)
1072                         break;
1073
1074                 buf += thislen;
1075
1076                 /* Read more? */
1077                 if (read < len) {
1078                         /* Update Page size */
1079                         from += mtd->writesize;
1080                         column = 0;
1081                 }
1082         }
1083
1084         /* Deselect and wake up anyone waiting on the device */
1085         onenand_release_device(mtd);
1086
1087         ops->oobretlen = read;
1088         return ret;
1089 }
1090
1091 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
1092 /**
1093  * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1094  * @param mtd           MTD device structure
1095  * @param buf           the databuffer to verify
1096  * @param to            offset to read from
1097  *
1098  */
1099 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
1100 {
1101         struct onenand_chip *this = mtd->priv;
1102         char oobbuf[64];
1103         int status, i;
1104
1105         this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
1106         onenand_update_bufferram(mtd, to, 0);
1107         status = this->wait(mtd, FL_READING);
1108         if (status)
1109                 return status;
1110
1111         this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1112         for (i = 0; i < mtd->oobsize; i++)
1113                 if (buf[i] != 0xFF && buf[i] != oobbuf[i])
1114                         return -EBADMSG;
1115
1116         return 0;
1117 }
1118
1119 /**
1120  * onenand_verify - [GENERIC] verify the chip contents after a write
1121  * @param mtd          MTD device structure
1122  * @param buf          the databuffer to verify
1123  * @param addr         offset to read from
1124  * @param len          number of bytes to read and compare
1125  *
1126  */
1127 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
1128 {
1129         struct onenand_chip *this = mtd->priv;
1130         void __iomem *dataram;
1131         int ret = 0;
1132         int thislen, column;
1133
1134         while (len != 0) {
1135                 thislen = min_t(int, mtd->writesize, len);
1136                 column = addr & (mtd->writesize - 1);
1137                 if (column + thislen > mtd->writesize)
1138                         thislen = mtd->writesize - column;
1139
1140                 this->command(mtd, ONENAND_CMD_READ, addr, mtd->writesize);
1141
1142                 onenand_update_bufferram(mtd, addr, 0);
1143
1144                 ret = this->wait(mtd, FL_READING);
1145                 if (ret)
1146                         return ret;
1147
1148                 onenand_update_bufferram(mtd, addr, 1);
1149
1150                 dataram = this->base + ONENAND_DATARAM;
1151                 dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
1152
1153                 if (memcmp(buf, dataram + column, thislen))
1154                         return -EBADMSG;
1155
1156                 len -= thislen;
1157                 buf += thislen;
1158                 addr += thislen;
1159         }
1160
1161         return 0;
1162 }
1163 #else
1164 #define onenand_verify(...)             (0)
1165 #define onenand_verify_oob(...)         (0)
1166 #endif
1167
1168 #define NOTALIGNED(x)   ((x & (this->subpagesize - 1)) != 0)
1169
1170 /**
1171  * onenand_write - [MTD Interface] write buffer to FLASH
1172  * @param mtd           MTD device structure
1173  * @param to            offset to write to
1174  * @param len           number of bytes to write
1175  * @param retlen        pointer to variable to store the number of written bytes
1176  * @param buf           the data to write
1177  *
1178  * Write with ECC
1179  */
1180 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
1181         size_t *retlen, const u_char *buf)
1182 {
1183         struct onenand_chip *this = mtd->priv;
1184         int written = 0;
1185         int ret = 0;
1186         int column, subpage;
1187
1188         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1189
1190         /* Initialize retlen, in case of early exit */
1191         *retlen = 0;
1192
1193         /* Do not allow writes past end of device */
1194         if (unlikely((to + len) > mtd->size)) {
1195                 printk(KERN_ERR "onenand_write: Attempt write to past end of device\n");
1196                 return -EINVAL;
1197         }
1198
1199         /* Reject writes, which are not page aligned */
1200         if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
1201                 printk(KERN_ERR "onenand_write: Attempt to write not page aligned data\n");
1202                 return -EINVAL;
1203         }
1204
1205         column = to & (mtd->writesize - 1);
1206
1207         /* Grab the lock and see if the device is available */
1208         onenand_get_device(mtd, FL_WRITING);
1209
1210         /* Loop until all data write */
1211         while (written < len) {
1212                 int thislen = min_t(int, mtd->writesize - column, len - written);
1213                 u_char *wbuf = (u_char *) buf;
1214
1215                 cond_resched();
1216
1217                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1218
1219                 /* Partial page write */
1220                 subpage = thislen < mtd->writesize;
1221                 if (subpage) {
1222                         memset(this->page_buf, 0xff, mtd->writesize);
1223                         memcpy(this->page_buf + column, buf, thislen);
1224                         wbuf = this->page_buf;
1225                 }
1226
1227                 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1228                 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1229
1230                 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1231
1232                 ret = this->wait(mtd, FL_WRITING);
1233
1234                 /* In partial page write we don't update bufferram */
1235                 onenand_update_bufferram(mtd, to, !ret && !subpage);
1236
1237                 if (ret) {
1238                         printk(KERN_ERR "onenand_write: write filaed %d\n", ret);
1239                         break;
1240                 }
1241
1242                 /* Only check verify write turn on */
1243                 ret = onenand_verify(mtd, (u_char *) wbuf, to, thislen);
1244                 if (ret) {
1245                         printk(KERN_ERR "onenand_write: verify failed %d\n", ret);
1246                         break;
1247                 }
1248
1249                 written += thislen;
1250
1251                 if (written == len)
1252                         break;
1253
1254                 column = 0;
1255                 to += thislen;
1256                 buf += thislen;
1257         }
1258
1259         /* Deselect and wake up anyone waiting on the device */
1260         onenand_release_device(mtd);
1261
1262         *retlen = written;
1263
1264         return ret;
1265 }
1266
1267 /**
1268  * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
1269  * @param mtd           MTD device structure
1270  * @param oob_buf       oob buffer
1271  * @param buf           source address
1272  * @param column        oob offset to write to
1273  * @param thislen       oob length to write
1274  */
1275 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1276                                   const u_char *buf, int column, int thislen)
1277 {
1278         struct onenand_chip *this = mtd->priv;
1279         struct nand_oobfree *free;
1280         int writecol = column;
1281         int writeend = column + thislen;
1282         int lastgap = 0;
1283
1284         for (free = this->ecclayout->oobfree; free->length; ++free) {
1285                 if (writecol >= lastgap)
1286                         writecol += free->offset - lastgap;
1287                 if (writeend >= lastgap)
1288                         writeend += free->offset - lastgap;
1289                 lastgap = free->offset + free->length;
1290         }
1291         for (free = this->ecclayout->oobfree; free->length; ++free) {
1292                 int free_end = free->offset + free->length;
1293                 if (free->offset < writeend && free_end > writecol) {
1294                         int st = max_t(int,free->offset,writecol);
1295                         int ed = min_t(int,free_end,writeend);
1296                         int n = ed - st;
1297                         memcpy(oob_buf + st, buf, n);
1298                         buf += n;
1299                 } else
1300                         break;
1301         }
1302         return 0;
1303 }
1304
1305 /**
1306  * onenand_do_write_oob - [Internal] OneNAND write out-of-band
1307  * @param mtd           MTD device structure
1308  * @param to            offset to write to
1309  * @param len           number of bytes to write
1310  * @param retlen        pointer to variable to store the number of written bytes
1311  * @param buf           the data to write
1312  * @param mode          operation mode
1313  *
1314  * OneNAND write out-of-band
1315  */
1316 static int onenand_do_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
1317                                 size_t *retlen, const u_char *buf, mtd_oob_mode_t mode)
1318 {
1319         struct onenand_chip *this = mtd->priv;
1320         int column, ret = 0, oobsize;
1321         int written = 0;
1322         u_char *oobbuf;
1323
1324         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1325
1326         /* Initialize retlen, in case of early exit */
1327         *retlen = 0;
1328
1329         if (mode == MTD_OOB_AUTO)
1330                 oobsize = this->ecclayout->oobavail;
1331         else
1332                 oobsize = mtd->oobsize;
1333
1334         column = to & (mtd->oobsize - 1);
1335
1336         if (unlikely(column >= oobsize)) {
1337                 printk(KERN_ERR "onenand_write_oob: Attempted to start write outside oob\n");
1338                 return -EINVAL;
1339         }
1340
1341         /* For compatibility with NAND: Do not allow write past end of page */
1342         if (unlikely(column + len > oobsize)) {
1343                 printk(KERN_ERR "onenand_write_oob: "
1344                       "Attempt to write past end of page\n");
1345                 return -EINVAL;
1346         }
1347
1348         /* Do not allow reads past end of device */
1349         if (unlikely(to >= mtd->size ||
1350                      column + len > ((mtd->size >> this->page_shift) -
1351                                      (to >> this->page_shift)) * oobsize)) {
1352                 printk(KERN_ERR "onenand_write_oob: Attempted to write past end of device\n");
1353                 return -EINVAL;
1354         }
1355
1356         /* Grab the lock and see if the device is available */
1357         onenand_get_device(mtd, FL_WRITING);
1358
1359         oobbuf = this->oob_buf;
1360
1361         /* Loop until all data write */
1362         while (written < len) {
1363                 int thislen = min_t(int, oobsize, len - written);
1364
1365                 cond_resched();
1366
1367                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1368
1369                 /* We send data to spare ram with oobsize
1370                  * to prevent byte access */
1371                 memset(oobbuf, 0xff, mtd->oobsize);
1372                 if (mode == MTD_OOB_AUTO)
1373                         onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
1374                 else
1375                         memcpy(oobbuf + column, buf, thislen);
1376                 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1377
1378                 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1379
1380                 onenand_update_bufferram(mtd, to, 0);
1381
1382                 ret = this->wait(mtd, FL_WRITING);
1383                 if (ret) {
1384                         printk(KERN_ERR "onenand_write_oob: write failed %d\n", ret);
1385                         break;
1386                 }
1387
1388                 ret = onenand_verify_oob(mtd, oobbuf, to);
1389                 if (ret) {
1390                         printk(KERN_ERR "onenand_write_oob: verify failed %d\n", ret);
1391                         break;
1392                 }
1393
1394                 written += thislen;
1395                 if (written == len)
1396                         break;
1397
1398                 to += mtd->writesize;
1399                 buf += thislen;
1400                 column = 0;
1401         }
1402
1403         /* Deselect and wake up anyone waiting on the device */
1404         onenand_release_device(mtd);
1405
1406         *retlen = written;
1407
1408         return ret;
1409 }
1410
1411 /**
1412  * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1413  * @param mtd:          MTD device structure
1414  * @param to:           offset to write
1415  * @param ops:          oob operation description structure
1416  */
1417 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1418                              struct mtd_oob_ops *ops)
1419 {
1420         switch (ops->mode) {
1421         case MTD_OOB_PLACE:
1422         case MTD_OOB_AUTO:
1423                 break;
1424         case MTD_OOB_RAW:
1425                 /* Not implemented yet */
1426         default:
1427                 return -EINVAL;
1428         }
1429         return onenand_do_write_oob(mtd, to + ops->ooboffs, ops->ooblen,
1430                                     &ops->oobretlen, ops->oobbuf, ops->mode);
1431 }
1432
1433 /**
1434  * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
1435  * @param mtd           MTD device structure
1436  * @param ofs           offset from device start
1437  * @param getchip       0, if the chip is already selected
1438  * @param allowbbt      1, if its allowed to access the bbt area
1439  *
1440  * Check, if the block is bad. Either by reading the bad block table or
1441  * calling of the scan function.
1442  */
1443 static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
1444 {
1445         struct onenand_chip *this = mtd->priv;
1446         struct bbm_info *bbm = this->bbm;
1447
1448         /* Return info from the table */
1449         return bbm->isbad_bbt(mtd, ofs, allowbbt);
1450 }
1451
1452 /**
1453  * onenand_erase - [MTD Interface] erase block(s)
1454  * @param mtd           MTD device structure
1455  * @param instr         erase instruction
1456  *
1457  * Erase one ore more blocks
1458  */
1459 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1460 {
1461         struct onenand_chip *this = mtd->priv;
1462         unsigned int block_size;
1463         loff_t addr;
1464         int len;
1465         int ret = 0;
1466
1467         DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1468
1469         block_size = (1 << this->erase_shift);
1470
1471         /* Start address must align on block boundary */
1472         if (unlikely(instr->addr & (block_size - 1))) {
1473                 printk(KERN_ERR "onenand_erase: Unaligned address\n");
1474                 return -EINVAL;
1475         }
1476
1477         /* Length must align on block boundary */
1478         if (unlikely(instr->len & (block_size - 1))) {
1479                 printk(KERN_ERR "onenand_erase: Length not block aligned\n");
1480                 return -EINVAL;
1481         }
1482
1483         /* Do not allow erase past end of device */
1484         if (unlikely((instr->len + instr->addr) > mtd->size)) {
1485                 printk(KERN_ERR "onenand_erase: Erase past end of device\n");
1486                 return -EINVAL;
1487         }
1488
1489         instr->fail_addr = 0xffffffff;
1490
1491         /* Grab the lock and see if the device is available */
1492         onenand_get_device(mtd, FL_ERASING);
1493
1494         /* Loop throught the pages */
1495         len = instr->len;
1496         addr = instr->addr;
1497
1498         instr->state = MTD_ERASING;
1499
1500         while (len) {
1501                 cond_resched();
1502
1503                 /* Check if we have a bad block, we do not erase bad blocks */
1504                 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1505                         printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1506                         instr->state = MTD_ERASE_FAILED;
1507                         goto erase_exit;
1508                 }
1509
1510                 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1511
1512                 onenand_invalidate_bufferram(mtd, addr, block_size);
1513
1514                 ret = this->wait(mtd, FL_ERASING);
1515                 /* Check, if it is write protected */
1516                 if (ret) {
1517                         printk(KERN_ERR "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1518                         instr->state = MTD_ERASE_FAILED;
1519                         instr->fail_addr = addr;
1520                         goto erase_exit;
1521                 }
1522
1523                 len -= block_size;
1524                 addr += block_size;
1525         }
1526
1527         instr->state = MTD_ERASE_DONE;
1528
1529 erase_exit:
1530
1531         ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1532         /* Do call back function */
1533         if (!ret)
1534                 mtd_erase_callback(instr);
1535
1536         /* Deselect and wake up anyone waiting on the device */
1537         onenand_release_device(mtd);
1538
1539         return ret;
1540 }
1541
1542 /**
1543  * onenand_sync - [MTD Interface] sync
1544  * @param mtd           MTD device structure
1545  *
1546  * Sync is actually a wait for chip ready function
1547  */
1548 static void onenand_sync(struct mtd_info *mtd)
1549 {
1550         DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1551
1552         /* Grab the lock and see if the device is available */
1553         onenand_get_device(mtd, FL_SYNCING);
1554
1555         /* Release it and go back */
1556         onenand_release_device(mtd);
1557 }
1558
1559 /**
1560  * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1561  * @param mtd           MTD device structure
1562  * @param ofs           offset relative to mtd start
1563  *
1564  * Check whether the block is bad
1565  */
1566 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1567 {
1568         /* Check for invalid offset */
1569         if (ofs > mtd->size)
1570                 return -EINVAL;
1571
1572         return onenand_block_checkbad(mtd, ofs, 1, 0);
1573 }
1574
1575 /**
1576  * onenand_default_block_markbad - [DEFAULT] mark a block bad
1577  * @param mtd           MTD device structure
1578  * @param ofs           offset from device start
1579  *
1580  * This is the default implementation, which can be overridden by
1581  * a hardware specific driver.
1582  */
1583 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1584 {
1585         struct onenand_chip *this = mtd->priv;
1586         struct bbm_info *bbm = this->bbm;
1587         u_char buf[2] = {0, 0};
1588         size_t retlen;
1589         int block;
1590
1591         /* Get block number */
1592         block = ((int) ofs) >> bbm->bbt_erase_shift;
1593         if (bbm->bbt)
1594                 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1595
1596         /* We write two bytes, so we dont have to mess with 16 bit access */
1597         ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1598         return onenand_do_write_oob(mtd, ofs , 2, &retlen, buf, MTD_OOB_PLACE);
1599 }
1600
1601 /**
1602  * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1603  * @param mtd           MTD device structure
1604  * @param ofs           offset relative to mtd start
1605  *
1606  * Mark the block as bad
1607  */
1608 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1609 {
1610         struct onenand_chip *this = mtd->priv;
1611         int ret;
1612
1613         ret = onenand_block_isbad(mtd, ofs);
1614         if (ret) {
1615                 /* If it was bad already, return success and do nothing */
1616                 if (ret > 0)
1617                         return 0;
1618                 return ret;
1619         }
1620
1621         return this->block_markbad(mtd, ofs);
1622 }
1623
1624 /**
1625  * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1626  * @param mtd           MTD device structure
1627  * @param ofs           offset relative to mtd start
1628  * @param len           number of bytes to lock or unlock
1629  * @param cmd           lock or unlock command
1630  *
1631  * Lock or unlock one or more blocks
1632  */
1633 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1634 {
1635         struct onenand_chip *this = mtd->priv;
1636         int start, end, block, value, status;
1637         int wp_status_mask;
1638
1639         start = ofs >> this->erase_shift;
1640         end = len >> this->erase_shift;
1641
1642         if (cmd == ONENAND_CMD_LOCK)
1643                 wp_status_mask = ONENAND_WP_LS;
1644         else
1645                 wp_status_mask = ONENAND_WP_US;
1646
1647         /* Continuous lock scheme */
1648         if (this->options & ONENAND_HAS_CONT_LOCK) {
1649                 /* Set start block address */
1650                 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1651                 /* Set end block address */
1652                 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1653                 /* Write lock command */
1654                 this->command(mtd, cmd, 0, 0);
1655
1656                 /* There's no return value */
1657                 this->wait(mtd, FL_LOCKING);
1658
1659                 /* Sanity check */
1660                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1661                     & ONENAND_CTRL_ONGO)
1662                         continue;
1663
1664                 /* Check lock status */
1665                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1666                 if (!(status & wp_status_mask))
1667                         printk(KERN_ERR "wp status = 0x%x\n", status);
1668
1669                 return 0;
1670         }
1671
1672         /* Block lock scheme */
1673         for (block = start; block < start + end; block++) {
1674                 /* Set block address */
1675                 value = onenand_block_address(this, block);
1676                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1677                 /* Select DataRAM for DDP */
1678                 value = onenand_bufferram_address(this, block);
1679                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1680                 /* Set start block address */
1681                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1682                 /* Write lock command */
1683                 this->command(mtd, cmd, 0, 0);
1684
1685                 /* There's no return value */
1686                 this->wait(mtd, FL_LOCKING);
1687
1688                 /* Sanity check */
1689                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1690                     & ONENAND_CTRL_ONGO)
1691                         continue;
1692
1693                 /* Check lock status */
1694                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1695                 if (!(status & wp_status_mask))
1696                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1697         }
1698
1699         return 0;
1700 }
1701
1702 /**
1703  * onenand_lock - [MTD Interface] Lock block(s)
1704  * @param mtd           MTD device structure
1705  * @param ofs           offset relative to mtd start
1706  * @param len           number of bytes to unlock
1707  *
1708  * Lock one or more blocks
1709  */
1710 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
1711 {
1712         return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
1713 }
1714
1715 /**
1716  * onenand_unlock - [MTD Interface] Unlock block(s)
1717  * @param mtd           MTD device structure
1718  * @param ofs           offset relative to mtd start
1719  * @param len           number of bytes to unlock
1720  *
1721  * Unlock one or more blocks
1722  */
1723 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1724 {
1725         return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1726 }
1727
1728 /**
1729  * onenand_check_lock_status - [OneNAND Interface] Check lock status
1730  * @param this          onenand chip data structure
1731  *
1732  * Check lock status
1733  */
1734 static void onenand_check_lock_status(struct onenand_chip *this)
1735 {
1736         unsigned int value, block, status;
1737         unsigned int end;
1738
1739         end = this->chipsize >> this->erase_shift;
1740         for (block = 0; block < end; block++) {
1741                 /* Set block address */
1742                 value = onenand_block_address(this, block);
1743                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1744                 /* Select DataRAM for DDP */
1745                 value = onenand_bufferram_address(this, block);
1746                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1747                 /* Set start block address */
1748                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1749
1750                 /* Check lock status */
1751                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1752                 if (!(status & ONENAND_WP_US))
1753                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1754         }
1755 }
1756
1757 /**
1758  * onenand_unlock_all - [OneNAND Interface] unlock all blocks
1759  * @param mtd           MTD device structure
1760  *
1761  * Unlock all blocks
1762  */
1763 static int onenand_unlock_all(struct mtd_info *mtd)
1764 {
1765         struct onenand_chip *this = mtd->priv;
1766
1767         if (this->options & ONENAND_HAS_UNLOCK_ALL) {
1768                 /* Set start block address */
1769                 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1770                 /* Write unlock command */
1771                 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
1772
1773                 /* There's no return value */
1774                 this->wait(mtd, FL_LOCKING);
1775
1776                 /* Sanity check */
1777                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1778                     & ONENAND_CTRL_ONGO)
1779                         continue;
1780
1781                 /* Workaround for all block unlock in DDP */
1782                 if (ONENAND_IS_DDP(this)) {
1783                         /* 1st block on another chip */
1784                         loff_t ofs = this->chipsize >> 1;
1785                         size_t len = mtd->erasesize;
1786
1787                         onenand_unlock(mtd, ofs, len);
1788                 }
1789
1790                 onenand_check_lock_status(this);
1791
1792                 return 0;
1793         }
1794
1795         onenand_unlock(mtd, 0x0, this->chipsize);
1796
1797         return 0;
1798 }
1799
1800 #ifdef CONFIG_MTD_ONENAND_OTP
1801
1802 /* Interal OTP operation */
1803 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
1804                 size_t *retlen, u_char *buf);
1805
1806 /**
1807  * do_otp_read - [DEFAULT] Read OTP block area
1808  * @param mtd           MTD device structure
1809  * @param from          The offset to read
1810  * @param len           number of bytes to read
1811  * @param retlen        pointer to variable to store the number of readbytes
1812  * @param buf           the databuffer to put/get data
1813  *
1814  * Read OTP block area.
1815  */
1816 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
1817                 size_t *retlen, u_char *buf)
1818 {
1819         struct onenand_chip *this = mtd->priv;
1820         int ret;
1821
1822         /* Enter OTP access mode */
1823         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1824         this->wait(mtd, FL_OTPING);
1825
1826         ret = mtd->read(mtd, from, len, retlen, buf);
1827
1828         /* Exit OTP access mode */
1829         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1830         this->wait(mtd, FL_RESETING);
1831
1832         return ret;
1833 }
1834
1835 /**
1836  * do_otp_write - [DEFAULT] Write OTP block area
1837  * @param mtd           MTD device structure
1838  * @param from          The offset to write
1839  * @param len           number of bytes to write
1840  * @param retlen        pointer to variable to store the number of write bytes
1841  * @param buf           the databuffer to put/get data
1842  *
1843  * Write OTP block area.
1844  */
1845 static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len,
1846                 size_t *retlen, u_char *buf)
1847 {
1848         struct onenand_chip *this = mtd->priv;
1849         unsigned char *pbuf = buf;
1850         int ret;
1851
1852         /* Force buffer page aligned */
1853         if (len < mtd->writesize) {
1854                 memcpy(this->page_buf, buf, len);
1855                 memset(this->page_buf + len, 0xff, mtd->writesize - len);
1856                 pbuf = this->page_buf;
1857                 len = mtd->writesize;
1858         }
1859
1860         /* Enter OTP access mode */
1861         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1862         this->wait(mtd, FL_OTPING);
1863
1864         ret = mtd->write(mtd, from, len, retlen, pbuf);
1865
1866         /* Exit OTP access mode */
1867         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1868         this->wait(mtd, FL_RESETING);
1869
1870         return ret;
1871 }
1872
1873 /**
1874  * do_otp_lock - [DEFAULT] Lock OTP block area
1875  * @param mtd           MTD device structure
1876  * @param from          The offset to lock
1877  * @param len           number of bytes to lock
1878  * @param retlen        pointer to variable to store the number of lock bytes
1879  * @param buf           the databuffer to put/get data
1880  *
1881  * Lock OTP block area.
1882  */
1883 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
1884                 size_t *retlen, u_char *buf)
1885 {
1886         struct onenand_chip *this = mtd->priv;
1887         int ret;
1888
1889         /* Enter OTP access mode */
1890         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1891         this->wait(mtd, FL_OTPING);
1892
1893         ret = onenand_do_write_oob(mtd, from, len, retlen, buf, MTD_OOB_PLACE);
1894
1895         /* Exit OTP access mode */
1896         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1897         this->wait(mtd, FL_RESETING);
1898
1899         return ret;
1900 }
1901
1902 /**
1903  * onenand_otp_walk - [DEFAULT] Handle OTP operation
1904  * @param mtd           MTD device structure
1905  * @param from          The offset to read/write
1906  * @param len           number of bytes to read/write
1907  * @param retlen        pointer to variable to store the number of read bytes
1908  * @param buf           the databuffer to put/get data
1909  * @param action        do given action
1910  * @param mode          specify user and factory
1911  *
1912  * Handle OTP operation.
1913  */
1914 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
1915                         size_t *retlen, u_char *buf,
1916                         otp_op_t action, int mode)
1917 {
1918         struct onenand_chip *this = mtd->priv;
1919         int otp_pages;
1920         int density;
1921         int ret = 0;
1922
1923         *retlen = 0;
1924
1925         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1926         if (density < ONENAND_DEVICE_DENSITY_512Mb)
1927                 otp_pages = 20;
1928         else
1929                 otp_pages = 10;
1930
1931         if (mode == MTD_OTP_FACTORY) {
1932                 from += mtd->writesize * otp_pages;
1933                 otp_pages = 64 - otp_pages;
1934         }
1935
1936         /* Check User/Factory boundary */
1937         if (((mtd->writesize * otp_pages) - (from + len)) < 0)
1938                 return 0;
1939
1940         while (len > 0 && otp_pages > 0) {
1941                 if (!action) {  /* OTP Info functions */
1942                         struct otp_info *otpinfo;
1943
1944                         len -= sizeof(struct otp_info);
1945                         if (len <= 0)
1946                                 return -ENOSPC;
1947
1948                         otpinfo = (struct otp_info *) buf;
1949                         otpinfo->start = from;
1950                         otpinfo->length = mtd->writesize;
1951                         otpinfo->locked = 0;
1952
1953                         from += mtd->writesize;
1954                         buf += sizeof(struct otp_info);
1955                         *retlen += sizeof(struct otp_info);
1956                 } else {
1957                         size_t tmp_retlen;
1958                         int size = len;
1959
1960                         ret = action(mtd, from, len, &tmp_retlen, buf);
1961
1962                         buf += size;
1963                         len -= size;
1964                         *retlen += size;
1965
1966                         if (ret < 0)
1967                                 return ret;
1968                 }
1969                 otp_pages--;
1970         }
1971
1972         return 0;
1973 }
1974
1975 /**
1976  * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
1977  * @param mtd           MTD device structure
1978  * @param buf           the databuffer to put/get data
1979  * @param len           number of bytes to read
1980  *
1981  * Read factory OTP info.
1982  */
1983 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
1984                         struct otp_info *buf, size_t len)
1985 {
1986         size_t retlen;
1987         int ret;
1988
1989         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
1990
1991         return ret ? : retlen;
1992 }
1993
1994 /**
1995  * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
1996  * @param mtd           MTD device structure
1997  * @param from          The offset to read
1998  * @param len           number of bytes to read
1999  * @param retlen        pointer to variable to store the number of read bytes
2000  * @param buf           the databuffer to put/get data
2001  *
2002  * Read factory OTP area.
2003  */
2004 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
2005                         size_t len, size_t *retlen, u_char *buf)
2006 {
2007         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
2008 }
2009
2010 /**
2011  * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
2012  * @param mtd           MTD device structure
2013  * @param buf           the databuffer to put/get data
2014  * @param len           number of bytes to read
2015  *
2016  * Read user OTP info.
2017  */
2018 static int onenand_get_user_prot_info(struct mtd_info *mtd,
2019                         struct otp_info *buf, size_t len)
2020 {
2021         size_t retlen;
2022         int ret;
2023
2024         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
2025
2026         return ret ? : retlen;
2027 }
2028
2029 /**
2030  * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
2031  * @param mtd           MTD device structure
2032  * @param from          The offset to read
2033  * @param len           number of bytes to read
2034  * @param retlen        pointer to variable to store the number of read bytes
2035  * @param buf           the databuffer to put/get data
2036  *
2037  * Read user OTP area.
2038  */
2039 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
2040                         size_t len, size_t *retlen, u_char *buf)
2041 {
2042         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
2043 }
2044
2045 /**
2046  * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
2047  * @param mtd           MTD device structure
2048  * @param from          The offset to write
2049  * @param len           number of bytes to write
2050  * @param retlen        pointer to variable to store the number of write bytes
2051  * @param buf           the databuffer to put/get data
2052  *
2053  * Write user OTP area.
2054  */
2055 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
2056                         size_t len, size_t *retlen, u_char *buf)
2057 {
2058         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
2059 }
2060
2061 /**
2062  * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
2063  * @param mtd           MTD device structure
2064  * @param from          The offset to lock
2065  * @param len           number of bytes to unlock
2066  *
2067  * Write lock mark on spare area in page 0 in OTP block
2068  */
2069 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
2070                         size_t len)
2071 {
2072         unsigned char oob_buf[64];
2073         size_t retlen;
2074         int ret;
2075
2076         memset(oob_buf, 0xff, mtd->oobsize);
2077         /*
2078          * Note: OTP lock operation
2079          *       OTP block : 0xXXFC
2080          *       1st block : 0xXXF3 (If chip support)
2081          *       Both      : 0xXXF0 (If chip support)
2082          */
2083         oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
2084
2085         /*
2086          * Write lock mark to 8th word of sector0 of page0 of the spare0.
2087          * We write 16 bytes spare area instead of 2 bytes.
2088          */
2089         from = 0;
2090         len = 16;
2091
2092         ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
2093
2094         return ret ? : retlen;
2095 }
2096 #endif  /* CONFIG_MTD_ONENAND_OTP */
2097
2098 /**
2099  * onenand_check_features - Check and set OneNAND features
2100  * @param mtd           MTD data structure
2101  *
2102  * Check and set OneNAND features
2103  * - lock scheme
2104  */
2105 static void onenand_check_features(struct mtd_info *mtd)
2106 {
2107         struct onenand_chip *this = mtd->priv;
2108         unsigned int density, process;
2109
2110         /* Lock scheme depends on density and process */
2111         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2112         process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
2113
2114         /* Lock scheme */
2115         if (density >= ONENAND_DEVICE_DENSITY_1Gb) {
2116                 /* A-Die has all block unlock */
2117                 if (process) {
2118                         printk(KERN_DEBUG "Chip support all block unlock\n");
2119                         this->options |= ONENAND_HAS_UNLOCK_ALL;
2120                 }
2121         } else {
2122                 /* Some OneNAND has continues lock scheme */
2123                 if (!process) {
2124                         printk(KERN_DEBUG "Lock scheme is Continues Lock\n");
2125                         this->options |= ONENAND_HAS_CONT_LOCK;
2126                 }
2127         }
2128 }
2129
2130 /**
2131  * onenand_print_device_info - Print device & version ID
2132  * @param device        device ID
2133  * @param version       version ID
2134  *
2135  * Print device & version ID
2136  */
2137 static void onenand_print_device_info(int device, int version)
2138 {
2139         int vcc, demuxed, ddp, density;
2140
2141         vcc = device & ONENAND_DEVICE_VCC_MASK;
2142         demuxed = device & ONENAND_DEVICE_IS_DEMUX;
2143         ddp = device & ONENAND_DEVICE_IS_DDP;
2144         density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
2145         printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
2146                 demuxed ? "" : "Muxed ",
2147                 ddp ? "(DDP)" : "",
2148                 (16 << density),
2149                 vcc ? "2.65/3.3" : "1.8",
2150                 device);
2151         printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version);
2152 }
2153
2154 static const struct onenand_manufacturers onenand_manuf_ids[] = {
2155         {ONENAND_MFR_SAMSUNG, "Samsung"},
2156 };
2157
2158 /**
2159  * onenand_check_maf - Check manufacturer ID
2160  * @param manuf         manufacturer ID
2161  *
2162  * Check manufacturer ID
2163  */
2164 static int onenand_check_maf(int manuf)
2165 {
2166         int size = ARRAY_SIZE(onenand_manuf_ids);
2167         char *name;
2168         int i;
2169
2170         for (i = 0; i < size; i++)
2171                 if (manuf == onenand_manuf_ids[i].id)
2172                         break;
2173
2174         if (i < size)
2175                 name = onenand_manuf_ids[i].name;
2176         else
2177                 name = "Unknown";
2178
2179         printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
2180
2181         return (i == size);
2182 }
2183
2184 /**
2185  * onenand_probe - [OneNAND Interface] Probe the OneNAND device
2186  * @param mtd           MTD device structure
2187  *
2188  * OneNAND detection method:
2189  *   Compare the the values from command with ones from register
2190  */
2191 static int onenand_probe(struct mtd_info *mtd)
2192 {
2193         struct onenand_chip *this = mtd->priv;
2194         int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
2195         int density;
2196         int syscfg;
2197
2198         /* Save system configuration 1 */
2199         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
2200         /* Clear Sync. Burst Read mode to read BootRAM */
2201         this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
2202
2203         /* Send the command for reading device ID from BootRAM */
2204         this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
2205
2206         /* Read manufacturer and device IDs from BootRAM */
2207         bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
2208         bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
2209
2210         /* Reset OneNAND to read default register values */
2211         this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
2212         /* Wait reset */
2213         this->wait(mtd, FL_RESETING);
2214
2215         /* Restore system configuration 1 */
2216         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
2217
2218         /* Check manufacturer ID */
2219         if (onenand_check_maf(bram_maf_id))
2220                 return -ENXIO;
2221
2222         /* Read manufacturer and device IDs from Register */
2223         maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
2224         dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
2225         ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
2226
2227         /* Check OneNAND device */
2228         if (maf_id != bram_maf_id || dev_id != bram_dev_id)
2229                 return -ENXIO;
2230
2231         /* Flash device information */
2232         onenand_print_device_info(dev_id, ver_id);
2233         this->device_id = dev_id;
2234         this->version_id = ver_id;
2235
2236         density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2237         this->chipsize = (16 << density) << 20;
2238         /* Set density mask. it is used for DDP */
2239         if (ONENAND_IS_DDP(this))
2240                 this->density_mask = (1 << (density + 6));
2241         else
2242                 this->density_mask = 0;
2243
2244         /* OneNAND page size & block size */
2245         /* The data buffer size is equal to page size */
2246         mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
2247         mtd->oobsize = mtd->writesize >> 5;
2248         /* Pages per a block are always 64 in OneNAND */
2249         mtd->erasesize = mtd->writesize << 6;
2250
2251         this->erase_shift = ffs(mtd->erasesize) - 1;
2252         this->page_shift = ffs(mtd->writesize) - 1;
2253         this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
2254
2255         /* REVIST: Multichip handling */
2256
2257         mtd->size = this->chipsize;
2258
2259         /* Check OneNAND features */
2260         onenand_check_features(mtd);
2261
2262         return 0;
2263 }
2264
2265 /**
2266  * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
2267  * @param mtd           MTD device structure
2268  */
2269 static int onenand_suspend(struct mtd_info *mtd)
2270 {
2271         return onenand_get_device(mtd, FL_PM_SUSPENDED);
2272 }
2273
2274 /**
2275  * onenand_resume - [MTD Interface] Resume the OneNAND flash
2276  * @param mtd           MTD device structure
2277  */
2278 static void onenand_resume(struct mtd_info *mtd)
2279 {
2280         struct onenand_chip *this = mtd->priv;
2281
2282         if (this->state == FL_PM_SUSPENDED)
2283                 onenand_release_device(mtd);
2284         else
2285                 printk(KERN_ERR "resume() called for the chip which is not"
2286                                 "in suspended state\n");
2287 }
2288
2289 /**
2290  * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
2291  * @param mtd           MTD device structure
2292  * @param maxchips      Number of chips to scan for
2293  *
2294  * This fills out all the not initialized function pointers
2295  * with the defaults.
2296  * The flash ID is read and the mtd/chip structures are
2297  * filled with the appropriate values.
2298  */
2299 int onenand_scan(struct mtd_info *mtd, int maxchips)
2300 {
2301         int i;
2302         struct onenand_chip *this = mtd->priv;
2303
2304         if (!this->read_word)
2305                 this->read_word = onenand_readw;
2306         if (!this->write_word)
2307                 this->write_word = onenand_writew;
2308
2309         if (!this->command)
2310                 this->command = onenand_command;
2311         if (!this->wait)
2312                 onenand_setup_wait(mtd);
2313
2314         if (!this->read_bufferram)
2315                 this->read_bufferram = onenand_read_bufferram;
2316         if (!this->write_bufferram)
2317                 this->write_bufferram = onenand_write_bufferram;
2318
2319         if (!this->block_markbad)
2320                 this->block_markbad = onenand_default_block_markbad;
2321         if (!this->scan_bbt)
2322                 this->scan_bbt = onenand_default_bbt;
2323
2324         if (onenand_probe(mtd))
2325                 return -ENXIO;
2326
2327         /* Set Sync. Burst Read after probing */
2328         if (this->mmcontrol) {
2329                 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2330                 this->read_bufferram = onenand_sync_read_bufferram;
2331         }
2332
2333         /* Allocate buffers, if necessary */
2334         if (!this->page_buf) {
2335                 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
2336                 if (!this->page_buf) {
2337                         printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2338                         return -ENOMEM;
2339                 }
2340                 this->options |= ONENAND_PAGEBUF_ALLOC;
2341         }
2342         if (!this->oob_buf) {
2343                 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
2344                 if (!this->oob_buf) {
2345                         printk(KERN_ERR "onenand_scan(): Can't allocate oob_buf\n");
2346                         if (this->options & ONENAND_PAGEBUF_ALLOC) {
2347                                 this->options &= ~ONENAND_PAGEBUF_ALLOC;
2348                                 kfree(this->page_buf);
2349                         }
2350                         return -ENOMEM;
2351                 }
2352                 this->options |= ONENAND_OOBBUF_ALLOC;
2353         }
2354
2355         this->state = FL_READY;
2356         init_waitqueue_head(&this->wq);
2357         spin_lock_init(&this->chip_lock);
2358
2359         /*
2360          * Allow subpage writes up to oobsize.
2361          */
2362         switch (mtd->oobsize) {
2363         case 64:
2364                 this->ecclayout = &onenand_oob_64;
2365                 mtd->subpage_sft = 2;
2366                 break;
2367
2368         case 32:
2369                 this->ecclayout = &onenand_oob_32;
2370                 mtd->subpage_sft = 1;
2371                 break;
2372
2373         default:
2374                 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2375                         mtd->oobsize);
2376                 mtd->subpage_sft = 0;
2377                 /* To prevent kernel oops */
2378                 this->ecclayout = &onenand_oob_32;
2379                 break;
2380         }
2381
2382         this->subpagesize = mtd->writesize >> mtd->subpage_sft;
2383
2384         /*
2385          * The number of bytes available for a client to place data into
2386          * the out of band area
2387          */
2388         this->ecclayout->oobavail = 0;
2389         for (i = 0; this->ecclayout->oobfree[i].length; i++)
2390                 this->ecclayout->oobavail +=
2391                         this->ecclayout->oobfree[i].length;
2392         mtd->oobavail = this->ecclayout->oobavail;
2393
2394         mtd->ecclayout = this->ecclayout;
2395
2396         /* Fill in remaining MTD driver data */
2397         mtd->type = MTD_NANDFLASH;
2398         mtd->flags = MTD_CAP_NANDFLASH;
2399         mtd->erase = onenand_erase;
2400         mtd->point = NULL;
2401         mtd->unpoint = NULL;
2402         mtd->read = onenand_read;
2403         mtd->write = onenand_write;
2404         mtd->read_oob = onenand_read_oob;
2405         mtd->write_oob = onenand_write_oob;
2406 #ifdef CONFIG_MTD_ONENAND_OTP
2407         mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2408         mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2409         mtd->get_user_prot_info = onenand_get_user_prot_info;
2410         mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2411         mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2412         mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2413 #endif
2414         mtd->sync = onenand_sync;
2415         mtd->lock = onenand_lock;
2416         mtd->unlock = onenand_unlock;
2417         mtd->suspend = onenand_suspend;
2418         mtd->resume = onenand_resume;
2419         mtd->block_isbad = onenand_block_isbad;
2420         mtd->block_markbad = onenand_block_markbad;
2421         mtd->owner = THIS_MODULE;
2422
2423         /* Unlock whole block */
2424         onenand_unlock_all(mtd);
2425
2426         return this->scan_bbt(mtd);
2427 }
2428
2429 /**
2430  * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2431  * @param mtd           MTD device structure
2432  */
2433 void onenand_release(struct mtd_info *mtd)
2434 {
2435         struct onenand_chip *this = mtd->priv;
2436
2437 #ifdef CONFIG_MTD_PARTITIONS
2438         /* Deregister partitions */
2439         del_mtd_partitions (mtd);
2440 #endif
2441         /* Deregister the device */
2442         del_mtd_device (mtd);
2443
2444         /* Free bad block table memory, if allocated */
2445         if (this->bbm) {
2446                 struct bbm_info *bbm = this->bbm;
2447                 kfree(bbm->bbt);
2448                 kfree(this->bbm);
2449         }
2450         /* Buffers allocated by onenand_scan */
2451         if (this->options & ONENAND_PAGEBUF_ALLOC)
2452                 kfree(this->page_buf);
2453         if (this->options & ONENAND_OOBBUF_ALLOC)
2454                 kfree(this->oob_buf);
2455 }
2456
2457 EXPORT_SYMBOL_GPL(onenand_scan);
2458 EXPORT_SYMBOL_GPL(onenand_release);
2459
2460 MODULE_LICENSE("GPL");
2461 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2462 MODULE_DESCRIPTION("Generic OneNAND flash driver code");