drivers/mtd/nand/r852.c

   1 /*
   2  * Copyright © 2009 - Maxim Levitsky
   3  * driver for Ricoh xD readers
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * published by the Free Software Foundation.
   8  */
   9
  10 #include <linux/kernel.h>
  11 #include <linux/module.h>
  12 #include <linux/jiffies.h>
  13 #include <linux/workqueue.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/pci.h>
  16 #include <linux/pci_ids.h>
  17 #include <linux/delay.h>
  18 #include <linux/slab.h>
  19 #include <asm/byteorder.h>
  20 #include <linux/sched.h>
  21 #include "sm_common.h"
  22 #include "r852.h"
  23
  24
  25 static int r852_enable_dma = 1;
  26 module_param(r852_enable_dma, bool, S_IRUGO);
  27 MODULE_PARM_DESC(r852_enable_dma, "Enable usage of the DMA (default)");
  28
  29 static int debug;
  30 module_param(debug, int, S_IRUGO | S_IWUSR);
  31 MODULE_PARM_DESC(debug, "Debug level (0-2)");
  32
  33 /* read register */
  34 static inline uint8_t r852_read_reg(struct r852_device *dev, int address)
  35 {
  36         uint8_t reg = readb(dev->mmio + address);
  37         return reg;
  38 }
  39
  40 /* write register */
  41 static inline void r852_write_reg(struct r852_device *dev,
  42                                                 int address, uint8_t value)
  43 {
  44         writeb(value, dev->mmio + address);
  45         mmiowb();
  46 }
  47
  48
  49 /* read dword sized register */
  50 static inline uint32_t r852_read_reg_dword(struct r852_device *dev, int address)
  51 {
  52         uint32_t reg = le32_to_cpu(readl(dev->mmio + address));
  53         return reg;
  54 }
  55
  56 /* write dword sized register */
  57 static inline void r852_write_reg_dword(struct r852_device *dev,
  58                                                         int address, uint32_t value)
  59 {
  60         writel(cpu_to_le32(value), dev->mmio + address);
  61         mmiowb();
  62 }
  63
  64 /* returns pointer to our private structure */
  65 static inline struct r852_device *r852_get_dev(struct mtd_info *mtd)
  66 {
  67         struct nand_chip *chip = (struct nand_chip *)mtd->priv;
  68         return (struct r852_device *)chip->priv;
  69 }
  70
  71
  72 /* check if controller supports dma */
  73 static void r852_dma_test(struct r852_device *dev)
  74 {
  75         dev->dma_usable = (r852_read_reg(dev, R852_DMA_CAP) &
  76                 (R852_DMA1 | R852_DMA2)) == (R852_DMA1 | R852_DMA2);
  77
  78         if (!dev->dma_usable)
  79                 message("Non dma capable device detected, dma disabled");
  80
  81         if (!r852_enable_dma) {
  82                 message("disabling dma on user request");
  83                 dev->dma_usable = 0;
  84         }
  85 }
  86
  87 /*
  88  * Enable dma. Enables ether first or second stage of the DMA,
  89  * Expects dev->dma_dir and dev->dma_state be set
  90  */
  91 static void r852_dma_enable(struct r852_device *dev)
  92 {
  93         uint8_t dma_reg, dma_irq_reg;
  94
  95         /* Set up dma settings */
  96         dma_reg = r852_read_reg_dword(dev, R852_DMA_SETTINGS);
  97         dma_reg &= ~(R852_DMA_READ | R852_DMA_INTERNAL | R852_DMA_MEMORY);
  98
  99         if (dev->dma_dir)
 100                 dma_reg |= R852_DMA_READ;
 101
 102         if (dev->dma_state == DMA_INTERNAL) {
 103                 dma_reg |= R852_DMA_INTERNAL;
 104                 /* Precaution to make sure HW doesn't write */
 105                         /* to random kernel memory */
 106                 r852_write_reg_dword(dev, R852_DMA_ADDR,
 107                         cpu_to_le32(dev->phys_bounce_buffer));
 108         } else {
 109                 dma_reg |= R852_DMA_MEMORY;
 110                 r852_write_reg_dword(dev, R852_DMA_ADDR,
 111                         cpu_to_le32(dev->phys_dma_addr));
 112         }
 113
 114         /* Precaution: make sure write reached the device */
 115         r852_read_reg_dword(dev, R852_DMA_ADDR);
 116
 117         r852_write_reg_dword(dev, R852_DMA_SETTINGS, dma_reg);
 118
 119         /* Set dma irq */
 120         dma_irq_reg = r852_read_reg_dword(dev, R852_DMA_IRQ_ENABLE);
 121         r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE,
 122                 dma_irq_reg |
 123                 R852_DMA_IRQ_INTERNAL |
 124                 R852_DMA_IRQ_ERROR |
 125                 R852_DMA_IRQ_MEMORY);
 126 }
 127
 128 /*
 129  * Disable dma, called from the interrupt handler, which specifies
 130  * success of the operation via 'error' argument
 131  */
 132 static void r852_dma_done(struct r852_device *dev, int error)
 133 {
 134         WARN_ON(dev->dma_stage == 0);
 135
 136         r852_write_reg_dword(dev, R852_DMA_IRQ_STA,
 137                         r852_read_reg_dword(dev, R852_DMA_IRQ_STA));
 138
 139         r852_write_reg_dword(dev, R852_DMA_SETTINGS, 0);
 140         r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE, 0);
 141
 142         /* Precaution to make sure HW doesn't write to random kernel memory */
 143         r852_write_reg_dword(dev, R852_DMA_ADDR,
 144                 cpu_to_le32(dev->phys_bounce_buffer));
 145         r852_read_reg_dword(dev, R852_DMA_ADDR);
 146
 147         dev->dma_error = error;
 148         dev->dma_stage = 0;
 149
 150         if (dev->phys_dma_addr && dev->phys_dma_addr != dev->phys_bounce_buffer)
 151                 pci_unmap_single(dev->pci_dev, dev->phys_dma_addr, R852_DMA_LEN,
 152                         dev->dma_dir ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
 153         complete(&dev->dma_done);
 154 }
 155
 156 /*
 157  * Wait, till dma is done, which includes both phases of it
 158  */
 159 static int r852_dma_wait(struct r852_device *dev)
 160 {
 161         long timeout = wait_for_completion_timeout(&dev->dma_done,
 162                                 msecs_to_jiffies(1000));
 163         if (!timeout) {
 164                 dbg("timeout waiting for DMA interrupt");
 165                 return -ETIMEDOUT;
 166         }
 167
 168         return 0;
 169 }
 170
 171 /*
 172  * Read/Write one page using dma. Only pages can be read (512 bytes)
 173 */
 174 static void r852_do_dma(struct r852_device *dev, uint8_t *buf, int do_read)
 175 {
 176         int bounce = 0;
 177         unsigned long flags;
 178         int error;
 179
 180         dev->dma_error = 0;
 181
 182         /* Set dma direction */
 183         dev->dma_dir = do_read;
 184         dev->dma_stage = 1;
 185
 186         dbg_verbose("doing dma %s ", do_read ? "read" : "write");
 187
 188         /* Set intial dma state: for reading first fill on board buffer,
 189           from device, for writes first fill the buffer  from memory*/
 190         dev->dma_state = do_read ? DMA_INTERNAL : DMA_MEMORY;
 191
 192         /* if incoming buffer is not page aligned, we should do bounce */
 193         if ((unsigned long)buf & (R852_DMA_LEN-1))
 194                 bounce = 1;
 195
 196         if (!bounce) {
 197                 dev->phys_dma_addr = pci_map_single(dev->pci_dev, (void *)buf,
 198                         R852_DMA_LEN,
 199                         (do_read ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE));
 200
 201                 if (pci_dma_mapping_error(dev->pci_dev, dev->phys_dma_addr))
 202                         bounce = 1;
 203         }
 204
 205         if (bounce) {
 206                 dbg_verbose("dma: using bounce buffer");
 207                 dev->phys_dma_addr = dev->phys_bounce_buffer;
 208                 if (!do_read)
 209                         memcpy(dev->bounce_buffer, buf, R852_DMA_LEN);
 210         }
 211
 212         /* Enable DMA */
 213         spin_lock_irqsave(&dev->irqlock, flags);
 214         r852_dma_enable(dev);
 215         spin_unlock_irqrestore(&dev->irqlock, flags);
 216
 217         /* Wait till complete */
 218         error = r852_dma_wait(dev);
 219
 220         if (error) {
 221                 r852_dma_done(dev, error);
 222                 return;
 223         }
 224
 225         if (do_read && bounce)
 226                 memcpy((void *)buf, dev->bounce_buffer, R852_DMA_LEN);
 227 }
 228
 229 /*
 230  * Program data lines of the nand chip to send data to it
 231  */
 232 void r852_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
 233 {
 234         struct r852_device *dev = r852_get_dev(mtd);
 235         uint32_t reg;
 236
 237         /* Don't allow any access to hardware if we suspect card removal */
 238         if (dev->card_unstable)
 239                 return;
 240
 241         /* Special case for whole sector read */
 242         if (len == R852_DMA_LEN && dev->dma_usable) {
 243                 r852_do_dma(dev, (uint8_t *)buf, 0);
 244                 return;
 245         }
 246
 247         /* write DWORD chinks - faster */
 248         while (len) {
 249                 reg = buf[0] | buf[1] << 8 | buf[2] << 16 | buf[3] << 24;
 250                 r852_write_reg_dword(dev, R852_DATALINE, reg);
 251                 buf += 4;
 252                 len -= 4;
 253
 254         }
 255
 256         /* write rest */
 257         while (len)
 258                 r852_write_reg(dev, R852_DATALINE, *buf++);
 259 }
 260
 261 /*
 262  * Read data lines of the nand chip to retrieve data
 263  */
 264 void r852_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
 265 {
 266         struct r852_device *dev = r852_get_dev(mtd);
 267         uint32_t reg;
 268
 269         if (dev->card_unstable) {
 270                 /* since we can't signal error here, at least, return
 271                         predictable buffer */
 272                 memset(buf, 0, len);
 273                 return;
 274         }
 275
 276         /* special case for whole sector read */
 277         if (len == R852_DMA_LEN && dev->dma_usable) {
 278                 r852_do_dma(dev, buf, 1);
 279                 return;
 280         }
 281
 282         /* read in dword sized chunks */
 283         while (len >= 4) {
 284
 285                 reg = r852_read_reg_dword(dev, R852_DATALINE);
 286                 *buf++ = reg & 0xFF;
 287                 *buf++ = (reg >> 8) & 0xFF;
 288                 *buf++ = (reg >> 16) & 0xFF;
 289                 *buf++ = (reg >> 24) & 0xFF;
 290                 len -= 4;
 291         }
 292
 293         /* read the reset by bytes */
 294         while (len--)
 295                 *buf++ = r852_read_reg(dev, R852_DATALINE);
 296 }
 297
 298 /*
 299  * Read one byte from nand chip
 300  */
 301 static uint8_t r852_read_byte(struct mtd_info *mtd)
 302 {
 303         struct r852_device *dev = r852_get_dev(mtd);
 304
 305         /* Same problem as in r852_read_buf.... */
 306         if (dev->card_unstable)
 307                 return 0;
 308
 309         return r852_read_reg(dev, R852_DATALINE);
 310 }
 311
 312
 313 /*
 314  * Readback the buffer to verify it
 315  */
 316 int r852_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
 317 {
 318         struct r852_device *dev = r852_get_dev(mtd);
 319
 320         /* We can't be sure about anything here... */
 321         if (dev->card_unstable)
 322                 return -1;
 323
 324         /* This will never happen, unless you wired up a nand chip
 325                 with > 512 bytes page size to the reader */
 326         if (len > SM_SECTOR_SIZE)
 327                 return 0;
 328
 329         r852_read_buf(mtd, dev->tmp_buffer, len);
 330         return memcmp(buf, dev->tmp_buffer, len);
 331 }
 332
 333 /*
 334  * Control several chip lines & send commands
 335  */
 336 void r852_cmdctl(struct mtd_info *mtd, int dat, unsigned int ctrl)
 337 {
 338         struct r852_device *dev = r852_get_dev(mtd);
 339
 340         if (dev->card_unstable)
 341                 return;
 342
 343         if (ctrl & NAND_CTRL_CHANGE) {
 344
 345                 dev->ctlreg &= ~(R852_CTL_DATA | R852_CTL_COMMAND |
 346                                  R852_CTL_ON | R852_CTL_CARDENABLE);
 347
 348                 if (ctrl & NAND_ALE)
 349                         dev->ctlreg |= R852_CTL_DATA;
 350
 351                 if (ctrl & NAND_CLE)
 352                         dev->ctlreg |= R852_CTL_COMMAND;
 353
 354                 if (ctrl & NAND_NCE)
 355                         dev->ctlreg |= (R852_CTL_CARDENABLE | R852_CTL_ON);
 356                 else
 357                         dev->ctlreg &= ~R852_CTL_WRITE;
 358
 359                 /* when write is stareted, enable write access */
 360                 if (dat == NAND_CMD_ERASE1)
 361                         dev->ctlreg |= R852_CTL_WRITE;
 362
 363                 r852_write_reg(dev, R852_CTL, dev->ctlreg);
 364         }
 365
 366          /* HACK: NAND_CMD_SEQIN is called without NAND_CTRL_CHANGE, but we need
 367                 to set write mode */
 368         if (dat == NAND_CMD_SEQIN && (dev->ctlreg & R852_CTL_COMMAND)) {
 369                 dev->ctlreg |= R852_CTL_WRITE;
 370                 r852_write_reg(dev, R852_CTL, dev->ctlreg);
 371         }
 372
 373         if (dat != NAND_CMD_NONE)
 374                 r852_write_reg(dev, R852_DATALINE, dat);
 375 }
 376
 377 /*
 378  * Wait till card is ready.
 379  * based on nand_wait, but returns errors on DMA error
 380  */
 381 int r852_wait(struct mtd_info *mtd, struct nand_chip *chip)
 382 {
 383         struct r852_device *dev = (struct r852_device *)chip->priv;
 384
 385         unsigned long timeout;
 386         int status;
 387
 388         timeout = jiffies + (chip->state == FL_ERASING ?
 389                 msecs_to_jiffies(400) : msecs_to_jiffies(20));
 390
 391         while (time_before(jiffies, timeout))
 392                 if (chip->dev_ready(mtd))
 393                         break;
 394
 395         chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
 396         status = (int)chip->read_byte(mtd);
 397
 398         /* Unfortunelly, no way to send detailed error status... */
 399         if (dev->dma_error) {
 400                 status |= NAND_STATUS_FAIL;
 401                 dev->dma_error = 0;
 402         }
 403         return status;
 404 }
 405
 406 /*
 407  * Check if card is ready
 408  */
 409
 410 int r852_ready(struct mtd_info *mtd)
 411 {
 412         struct r852_device *dev = r852_get_dev(mtd);
 413         return !(r852_read_reg(dev, R852_CARD_STA) & R852_CARD_STA_BUSY);
 414 }
 415
 416
 417 /*
 418  * Set ECC engine mode
 419 */
 420
 421 void r852_ecc_hwctl(struct mtd_info *mtd, int mode)
 422 {
 423         struct r852_device *dev = r852_get_dev(mtd);
 424
 425         if (dev->card_unstable)
 426                 return;
 427
 428         switch (mode) {
 429         case NAND_ECC_READ:
 430         case NAND_ECC_WRITE:
 431                 /* enable ecc generation/check*/
 432                 dev->ctlreg |= R852_CTL_ECC_ENABLE;
 433
 434                 /* flush ecc buffer */
 435                 r852_write_reg(dev, R852_CTL,
 436                         dev->ctlreg | R852_CTL_ECC_ACCESS);
 437
 438                 r852_read_reg_dword(dev, R852_DATALINE);
 439                 r852_write_reg(dev, R852_CTL, dev->ctlreg);
 440                 return;
 441
 442         case NAND_ECC_READSYN:
 443                 /* disable ecc generation */
 444                 dev->ctlreg &= ~R852_CTL_ECC_ENABLE;
 445                 r852_write_reg(dev, R852_CTL, dev->ctlreg);
 446         }
 447 }
 448
 449 /*
 450  * Calculate ECC, only used for writes
 451  */
 452
 453 int r852_ecc_calculate(struct mtd_info *mtd, const uint8_t *dat,
 454                                                         uint8_t *ecc_code)
 455 {
 456         struct r852_device *dev = r852_get_dev(mtd);
 457         struct sm_oob *oob = (struct sm_oob *)ecc_code;
 458         uint32_t ecc1, ecc2;
 459
 460         if (dev->card_unstable)
 461                 return 0;
 462
 463         dev->ctlreg &= ~R852_CTL_ECC_ENABLE;
 464         r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS);
 465
 466         ecc1 = r852_read_reg_dword(dev, R852_DATALINE);
 467         ecc2 = r852_read_reg_dword(dev, R852_DATALINE);
 468
 469         oob->ecc1[0] = (ecc1) & 0xFF;
 470         oob->ecc1[1] = (ecc1 >> 8) & 0xFF;
 471         oob->ecc1[2] = (ecc1 >> 16) & 0xFF;
 472
 473         oob->ecc2[0] = (ecc2) & 0xFF;
 474         oob->ecc2[1] = (ecc2 >> 8) & 0xFF;
 475         oob->ecc2[2] = (ecc2 >> 16) & 0xFF;
 476
 477         r852_write_reg(dev, R852_CTL, dev->ctlreg);
 478         return 0;
 479 }
 480
 481 /*
 482  * Correct the data using ECC, hw did almost everything for us
 483  */
 484
 485 int r852_ecc_correct(struct mtd_info *mtd, uint8_t *dat,
 486                                 uint8_t *read_ecc, uint8_t *calc_ecc)
 487 {
 488         uint16_t ecc_reg;
 489         uint8_t ecc_status, err_byte;
 490         int i, error = 0;
 491
 492         struct r852_device *dev = r852_get_dev(mtd);
 493
 494         if (dev->card_unstable)
 495                 return 0;
 496
 497         r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS);
 498         ecc_reg = r852_read_reg_dword(dev, R852_DATALINE);
 499         r852_write_reg(dev, R852_CTL, dev->ctlreg);
 500
 501         for (i = 0 ; i <= 1 ; i++) {
 502
 503                 ecc_status = (ecc_reg >> 8) & 0xFF;
 504
 505                 /* ecc uncorrectable error */
 506                 if (ecc_status & R852_ECC_FAIL) {
 507                         dbg("ecc: unrecoverable error, in half %d", i);
 508                         error = -1;
 509                         goto exit;
 510                 }
 511
 512                 /* correctable error */
 513                 if (ecc_status & R852_ECC_CORRECTABLE) {
 514
 515                         err_byte = ecc_reg & 0xFF;
 516                         dbg("ecc: recoverable error, "
 517                                 "in half %d, byte %d, bit %d", i,
 518                                 err_byte, ecc_status & R852_ECC_ERR_BIT_MSK);
 519
 520                         dat[err_byte] ^=
 521                                 1 << (ecc_status & R852_ECC_ERR_BIT_MSK);
 522                         error++;
 523                 }
 524
 525                 dat += 256;
 526                 ecc_reg >>= 16;
 527         }
 528 exit:
 529         return error;
 530 }
 531
 532 /*
 533  * This is copy of nand_read_oob_std
 534  * nand_read_oob_syndrome assumes we can send column address - we can't
 535  */
 536 static int r852_read_oob(struct mtd_info *mtd, struct nand_chip *chip,
 537                              int page, int sndcmd)
 538 {
 539         if (sndcmd) {
 540                 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
 541                 sndcmd = 0;
 542         }
 543         chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
 544         return sndcmd;
 545 }
 546
 547 /*
 548  * Start the nand engine
 549  */
 550
 551 void r852_engine_enable(struct r852_device *dev)
 552 {
 553         if (r852_read_reg_dword(dev, R852_HW) & R852_HW_UNKNOWN) {
 554                 r852_write_reg(dev, R852_CTL, R852_CTL_RESET | R852_CTL_ON);
 555                 r852_write_reg_dword(dev, R852_HW, R852_HW_ENABLED);
 556         } else {
 557                 r852_write_reg_dword(dev, R852_HW, R852_HW_ENABLED);
 558                 r852_write_reg(dev, R852_CTL, R852_CTL_RESET | R852_CTL_ON);
 559         }
 560         msleep(300);
 561         r852_write_reg(dev, R852_CTL, 0);
 562 }
 563
 564
 565 /*
 566  * Stop the nand engine
 567  */
 568
 569 void r852_engine_disable(struct r852_device *dev)
 570 {
 571         r852_write_reg_dword(dev, R852_HW, 0);
 572         r852_write_reg(dev, R852_CTL, R852_CTL_RESET);
 573 }
 574
 575 /*
 576  * Test if card is present
 577  */
 578
 579 void r852_card_update_present(struct r852_device *dev)
 580 {
 581         unsigned long flags;
 582         uint8_t reg;
 583
 584         spin_lock_irqsave(&dev->irqlock, flags);
 585         reg = r852_read_reg(dev, R852_CARD_STA);
 586         dev->card_detected = !!(reg & R852_CARD_STA_PRESENT);
 587         spin_unlock_irqrestore(&dev->irqlock, flags);
 588 }
 589
 590 /*
 591  * Update card detection IRQ state according to current card state
 592  * which is read in r852_card_update_present
 593  */
 594 void r852_update_card_detect(struct r852_device *dev)
 595 {
 596         int card_detect_reg = r852_read_reg(dev, R852_CARD_IRQ_ENABLE);
 597         dev->card_unstable = 0;
 598
 599         card_detect_reg &= ~(R852_CARD_IRQ_REMOVE | R852_CARD_IRQ_INSERT);
 600         card_detect_reg |= R852_CARD_IRQ_GENABLE;
 601
 602         card_detect_reg |= dev->card_detected ?
 603                 R852_CARD_IRQ_REMOVE : R852_CARD_IRQ_INSERT;
 604
 605         r852_write_reg(dev, R852_CARD_IRQ_ENABLE, card_detect_reg);
 606 }
 607
 608 ssize_t r852_media_type_show(struct device *sys_dev,
 609                 struct device_attribute *attr, char *buf)
 610 {
 611         struct mtd_info *mtd = container_of(sys_dev, struct mtd_info, dev);
 612         struct r852_device *dev = r852_get_dev(mtd);
 613         char *data = dev->sm ? "smartmedia" : "xd";
 614
 615         strcpy(buf, data);
 616         return strlen(data);
 617 }
 618
 619 DEVICE_ATTR(media_type, S_IRUGO, r852_media_type_show, NULL);
 620
 621
 622 /* Detect properties of card in slot */
 623 void r852_update_media_status(struct r852_device *dev)
 624 {
 625         uint8_t reg;
 626         unsigned long flags;
 627         int readonly;
 628
 629         spin_lock_irqsave(&dev->irqlock, flags);
 630         if (!dev->card_detected) {
 631                 message("card removed");
 632                 spin_unlock_irqrestore(&dev->irqlock, flags);
 633                 return ;
 634         }
 635
 636         readonly  = r852_read_reg(dev, R852_CARD_STA) & R852_CARD_STA_RO;
 637         reg = r852_read_reg(dev, R852_DMA_CAP);
 638         dev->sm = (reg & (R852_DMA1 | R852_DMA2)) && (reg & R852_SMBIT);
 639
 640         message("detected %s %s card in slot",
 641                 dev->sm ? "SmartMedia" : "xD",
 642                 readonly ? "readonly" : "writeable");
 643
 644         dev->readonly = readonly;
 645         spin_unlock_irqrestore(&dev->irqlock, flags);
 646 }
 647
 648 /*
 649  * Register the nand device
 650  * Called when the card is detected
 651  */
 652 int r852_register_nand_device(struct r852_device *dev)
 653 {
 654         dev->mtd = kzalloc(sizeof(struct mtd_info), GFP_KERNEL);
 655
 656         if (!dev->mtd)
 657                 goto error1;
 658
 659         WARN_ON(dev->card_registred);
 660
 661         dev->mtd->owner = THIS_MODULE;
 662         dev->mtd->priv = dev->chip;
 663         dev->mtd->dev.parent = &dev->pci_dev->dev;
 664
 665         if (dev->readonly)
 666                 dev->chip->options |= NAND_ROM;
 667
 668         r852_engine_enable(dev);
 669
 670         if (sm_register_device(dev->mtd, dev->sm))
 671                 goto error2;
 672
 673         if (device_create_file(&dev->mtd->dev, &dev_attr_media_type))
 674                 message("can't create media type sysfs attribute");
 675
 676         dev->card_registred = 1;
 677         return 0;
 678 error2:
 679         kfree(dev->mtd);
 680 error1:
 681         /* Force card redetect */
 682         dev->card_detected = 0;
 683         return -1;
 684 }
 685
 686 /*
 687  * Unregister the card
 688  */
 689
 690 void r852_unregister_nand_device(struct r852_device *dev)
 691 {
 692         if (!dev->card_registred)
 693                 return;
 694
 695         device_remove_file(&dev->mtd->dev, &dev_attr_media_type);
 696         nand_release(dev->mtd);
 697         r852_engine_disable(dev);
 698         dev->card_registred = 0;
 699         kfree(dev->mtd);
 700         dev->mtd = NULL;
 701 }
 702
 703 /* Card state updater */
 704 void r852_card_detect_work(struct work_struct *work)
 705 {
 706         struct r852_device *dev =
 707                 container_of(work, struct r852_device, card_detect_work.work);
 708
 709         r852_card_update_present(dev);
 710         dev->card_unstable = 0;
 711
 712         /* False alarm */
 713         if (dev->card_detected == dev->card_registred)
 714                 goto exit;
 715
 716         /* Read media properties */
 717         r852_update_media_status(dev);
 718
 719         /* Register the card */
 720         if (dev->card_detected)
 721                 r852_register_nand_device(dev);
 722         else
 723                 r852_unregister_nand_device(dev);
 724 exit:
 725         /* Update detection logic */
 726         r852_update_card_detect(dev);
 727 }
 728
 729 /* Ack + disable IRQ generation */
 730 static void r852_disable_irqs(struct r852_device *dev)
 731 {
 732         uint8_t reg;
 733         reg = r852_read_reg(dev, R852_CARD_IRQ_ENABLE);
 734         r852_write_reg(dev, R852_CARD_IRQ_ENABLE, reg & ~R852_CARD_IRQ_MASK);
 735
 736         reg = r852_read_reg_dword(dev, R852_DMA_IRQ_ENABLE);
 737         r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE,
 738                                         reg & ~R852_DMA_IRQ_MASK);
 739
 740         r852_write_reg(dev, R852_CARD_IRQ_STA, R852_CARD_IRQ_MASK);
 741         r852_write_reg_dword(dev, R852_DMA_IRQ_STA, R852_DMA_IRQ_MASK);
 742 }
 743
 744 /* Interrupt handler */
 745 static irqreturn_t r852_irq(int irq, void *data)
 746 {
 747         struct r852_device *dev = (struct r852_device *)data;
 748
 749         uint8_t card_status, dma_status;
 750         unsigned long flags;
 751         irqreturn_t ret = IRQ_NONE;
 752
 753         spin_lock_irqsave(&dev->irqlock, flags);
 754
 755         /* We can recieve shared interrupt while pci is suspended
 756                 in that case reads will return 0xFFFFFFFF.... */
 757         if (dev->insuspend)
 758                 goto out;
 759
 760         /* handle card detection interrupts first */
 761         card_status = r852_read_reg(dev, R852_CARD_IRQ_STA);
 762         r852_write_reg(dev, R852_CARD_IRQ_STA, card_status);
 763
 764         if (card_status & (R852_CARD_IRQ_INSERT|R852_CARD_IRQ_REMOVE)) {
 765
 766                 ret = IRQ_HANDLED;
 767                 dev->card_detected = !!(card_status & R852_CARD_IRQ_INSERT);
 768
 769                 /* we shouldn't recieve any interrupts if we wait for card
 770                         to settle */
 771                 WARN_ON(dev->card_unstable);
 772
 773                 /* disable irqs while card is unstable */
 774                 /* this will timeout DMA if active, but better that garbage */
 775                 r852_disable_irqs(dev);
 776
 777                 if (dev->card_unstable)
 778                         goto out;
 779
 780                 /* let, card state to settle a bit, and then do the work */
 781                 dev->card_unstable = 1;
 782                 queue_delayed_work(dev->card_workqueue,
 783                         &dev->card_detect_work, msecs_to_jiffies(100));
 784                 goto out;
 785         }
 786
 787
 788         /* Handle dma interrupts */
 789         dma_status = r852_read_reg_dword(dev, R852_DMA_IRQ_STA);
 790         r852_write_reg_dword(dev, R852_DMA_IRQ_STA, dma_status);
 791
 792         if (dma_status & R852_DMA_IRQ_MASK) {
 793
 794                 ret = IRQ_HANDLED;
 795
 796                 if (dma_status & R852_DMA_IRQ_ERROR) {
 797                         dbg("recieved dma error IRQ");
 798                         r852_dma_done(dev, -EIO);
 799                         goto out;
 800                 }
 801
 802                 /* recieved DMA interrupt out of nowhere? */
 803                 WARN_ON_ONCE(dev->dma_stage == 0);
 804
 805                 if (dev->dma_stage == 0)
 806                         goto out;
 807
 808                 /* done device access */
 809                 if (dev->dma_state == DMA_INTERNAL &&
 810                                 (dma_status & R852_DMA_IRQ_INTERNAL)) {
 811
 812                         dev->dma_state = DMA_MEMORY;
 813                         dev->dma_stage++;
 814                 }
 815
 816                 /* done memory DMA */
 817                 if (dev->dma_state == DMA_MEMORY &&
 818                                 (dma_status & R852_DMA_IRQ_MEMORY)) {
 819                         dev->dma_state = DMA_INTERNAL;
 820                         dev->dma_stage++;
 821                 }
 822
 823                 /* Enable 2nd half of dma dance */
 824                 if (dev->dma_stage == 2)
 825                         r852_dma_enable(dev);
 826
 827                 /* Operation done */
 828                 if (dev->dma_stage == 3)
 829                         r852_dma_done(dev, 0);
 830                 goto out;
 831         }
 832
 833         /* Handle unknown interrupts */
 834         if (dma_status)
 835                 dbg("bad dma IRQ status = %x", dma_status);
 836
 837         if (card_status & ~R852_CARD_STA_CD)
 838                 dbg("strange card status = %x", card_status);
 839
 840 out:
 841         spin_unlock_irqrestore(&dev->irqlock, flags);
 842         return ret;
 843 }
 844
 845 int  r852_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
 846 {
 847         int error;
 848         struct nand_chip *chip;
 849         struct r852_device *dev;
 850
 851         /* pci initialization */
 852         error = pci_enable_device(pci_dev);
 853
 854         if (error)
 855                 goto error1;
 856
 857         pci_set_master(pci_dev);
 858
 859         error = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32));
 860         if (error)
 861                 goto error2;
 862
 863         error = pci_request_regions(pci_dev, DRV_NAME);
 864
 865         if (error)
 866                 goto error3;
 867
 868         error = -ENOMEM;
 869
 870         /* init nand chip, but register it only on card insert */
 871         chip = kzalloc(sizeof(struct nand_chip), GFP_KERNEL);
 872
 873         if (!chip)
 874                 goto error4;
 875
 876         /* commands */
 877         chip->cmd_ctrl = r852_cmdctl;
 878         chip->waitfunc = r852_wait;
 879         chip->dev_ready = r852_ready;
 880
 881         /* I/O */
 882         chip->read_byte = r852_read_byte;
 883         chip->read_buf = r852_read_buf;
 884         chip->write_buf = r852_write_buf;
 885         chip->verify_buf = r852_verify_buf;
 886
 887         /* ecc */
 888         chip->ecc.mode = NAND_ECC_HW_SYNDROME;
 889         chip->ecc.size = R852_DMA_LEN;
 890         chip->ecc.bytes = SM_OOB_SIZE;
 891         chip->ecc.hwctl = r852_ecc_hwctl;
 892         chip->ecc.calculate = r852_ecc_calculate;
 893         chip->ecc.correct = r852_ecc_correct;
 894
 895         /* TODO: hack */
 896         chip->ecc.read_oob = r852_read_oob;
 897
 898         /* init our device structure */
 899         dev = kzalloc(sizeof(struct r852_device), GFP_KERNEL);
 900
 901         if (!dev)
 902                 goto error5;
 903
 904         chip->priv = dev;
 905         dev->chip = chip;
 906         dev->pci_dev = pci_dev;
 907         pci_set_drvdata(pci_dev, dev);
 908
 909         dev->bounce_buffer = pci_alloc_consistent(pci_dev, R852_DMA_LEN,
 910                 &dev->phys_bounce_buffer);
 911
 912         if (!dev->bounce_buffer)
 913                 goto error6;
 914
 915
 916         error = -ENODEV;
 917         dev->mmio = pci_ioremap_bar(pci_dev, 0);
 918
 919         if (!dev->mmio)
 920                 goto error7;
 921
 922         error = -ENOMEM;
 923         dev->tmp_buffer = kzalloc(SM_SECTOR_SIZE, GFP_KERNEL);
 924
 925         if (!dev->tmp_buffer)
 926                 goto error8;
 927
 928         init_completion(&dev->dma_done);
 929
 930         dev->card_workqueue = create_freezeable_workqueue(DRV_NAME);
 931
 932         if (!dev->card_workqueue)
 933                 goto error9;
 934
 935         INIT_DELAYED_WORK(&dev->card_detect_work, r852_card_detect_work);
 936
 937         /* shutdown everything - precation */
 938         r852_engine_disable(dev);
 939         r852_disable_irqs(dev);
 940
 941         r852_dma_test(dev);
 942
 943         /*register irq handler*/
 944         error = -ENODEV;
 945         if (request_irq(pci_dev->irq, &r852_irq, IRQF_SHARED,
 946                           DRV_NAME, dev))
 947                 goto error10;
 948
 949         dev->irq = pci_dev->irq;
 950         spin_lock_init(&dev->irqlock);
 951
 952         /* kick initial present test */
 953         dev->card_detected = 0;
 954         r852_card_update_present(dev);
 955         queue_delayed_work(dev->card_workqueue,
 956                 &dev->card_detect_work, 0);
 957
 958
 959         printk(KERN_NOTICE DRV_NAME ": driver loaded succesfully\n");
 960         return 0;
 961
 962 error10:
 963         destroy_workqueue(dev->card_workqueue);
 964 error9:
 965         kfree(dev->tmp_buffer);
 966 error8:
 967         pci_iounmap(pci_dev, dev->mmio);
 968 error7:
 969         pci_free_consistent(pci_dev, R852_DMA_LEN,
 970                 dev->bounce_buffer, dev->phys_bounce_buffer);
 971 error6:
 972         kfree(dev);
 973 error5:
 974         kfree(chip);
 975 error4:
 976         pci_release_regions(pci_dev);
 977 error3:
 978 error2:
 979         pci_disable_device(pci_dev);
 980 error1:
 981         return error;
 982 }
 983
 984 void r852_remove(struct pci_dev *pci_dev)
 985 {
 986         struct r852_device *dev = pci_get_drvdata(pci_dev);
 987
 988         /* Stop detect workqueue -
 989                 we are going to unregister the device anyway*/
 990         cancel_delayed_work_sync(&dev->card_detect_work);
 991         destroy_workqueue(dev->card_workqueue);
 992
 993         /* Unregister the device, this might make more IO */
 994         r852_unregister_nand_device(dev);
 995
 996         /* Stop interrupts */
 997         r852_disable_irqs(dev);
 998         synchronize_irq(dev->irq);
 999         free_irq(dev->irq, dev);
1000
1001         /* Cleanup */
1002         kfree(dev->tmp_buffer);
1003         pci_iounmap(pci_dev, dev->mmio);
1004         pci_free_consistent(pci_dev, R852_DMA_LEN,
1005                 dev->bounce_buffer, dev->phys_bounce_buffer);
1006
1007         kfree(dev->chip);
1008         kfree(dev);
1009
1010         /* Shutdown the PCI device */
1011         pci_release_regions(pci_dev);
1012         pci_disable_device(pci_dev);
1013 }
1014
1015 void r852_shutdown(struct pci_dev *pci_dev)
1016 {
1017         struct r852_device *dev = pci_get_drvdata(pci_dev);
1018
1019         cancel_delayed_work_sync(&dev->card_detect_work);
1020         r852_disable_irqs(dev);
1021         synchronize_irq(dev->irq);
1022         pci_disable_device(pci_dev);
1023 }
1024
1025 #ifdef CONFIG_PM
1026 int r852_suspend(struct device *device)
1027 {
1028         struct r852_device *dev = pci_get_drvdata(to_pci_dev(device));
1029         unsigned long flags;
1030
1031         if (dev->ctlreg & R852_CTL_CARDENABLE)
1032                 return -EBUSY;
1033
1034         /* First make sure the detect work is gone */
1035         cancel_delayed_work_sync(&dev->card_detect_work);
1036
1037         /* Turn off the interrupts and stop the device */
1038         r852_disable_irqs(dev);
1039         r852_engine_disable(dev);
1040
1041         spin_lock_irqsave(&dev->irqlock, flags);
1042         dev->insuspend = 1;
1043         spin_unlock_irqrestore(&dev->irqlock, flags);
1044
1045         /* At that point, even if interrupt handler is running, it will quit */
1046         /* So wait for this to happen explictly */
1047         synchronize_irq(dev->irq);
1048
1049         /* If card was pulled off just during the suspend, which is very
1050                 unlikely, we will remove it on resume, it too late now
1051                 anyway... */
1052         dev->card_unstable = 0;
1053
1054         pci_save_state(to_pci_dev(device));
1055         return pci_prepare_to_sleep(to_pci_dev(device));
1056 }
1057
1058 int r852_resume(struct device *device)
1059 {
1060         struct r852_device *dev = pci_get_drvdata(to_pci_dev(device));
1061         unsigned long flags;
1062
1063         /* Turn on the hardware */
1064         pci_back_from_sleep(to_pci_dev(device));
1065         pci_restore_state(to_pci_dev(device));
1066
1067         r852_disable_irqs(dev);
1068         r852_card_update_present(dev);
1069         r852_engine_disable(dev);
1070
1071
1072         /* Now its safe for IRQ to run */
1073         spin_lock_irqsave(&dev->irqlock, flags);
1074         dev->insuspend = 0;
1075         spin_unlock_irqrestore(&dev->irqlock, flags);
1076
1077
1078         /* If card status changed, just do the work */
1079         if (dev->card_detected != dev->card_registred) {
1080                 dbg("card was %s during low power state",
1081                         dev->card_detected ? "added" : "removed");
1082
1083                 queue_delayed_work(dev->card_workqueue,
1084                 &dev->card_detect_work, 1000);
1085                 return 0;
1086         }
1087
1088         /* Otherwise, initialize the card */
1089         if (dev->card_registred) {
1090                 r852_engine_enable(dev);
1091                 dev->chip->select_chip(dev->mtd, 0);
1092                 dev->chip->cmdfunc(dev->mtd, NAND_CMD_RESET, -1, -1);
1093                 dev->chip->select_chip(dev->mtd, -1);
1094         }
1095
1096         /* Program card detection IRQ */
1097         r852_update_card_detect(dev);
1098         return 0;
1099 }
1100 #else
1101 #define r852_suspend    NULL
1102 #define r852_resume     NULL
1103 #endif
1104
1105 static const struct pci_device_id r852_pci_id_tbl[] = {
1106
1107         { PCI_VDEVICE(RICOH, 0x0852), },
1108         { },
1109 };
1110
1111 MODULE_DEVICE_TABLE(pci, r852_pci_id_tbl);
1112
1113 SIMPLE_DEV_PM_OPS(r852_pm_ops, r852_suspend, r852_resume);
1114
1115
1116 static struct pci_driver r852_pci_driver = {
1117         .name           = DRV_NAME,
1118         .id_table       = r852_pci_id_tbl,
1119         .probe          = r852_probe,
1120         .remove         = r852_remove,
1121         .shutdown       = r852_shutdown,
1122         .driver.pm      = &r852_pm_ops,
1123 };
1124
1125 static __init int r852_module_init(void)
1126 {
1127         return pci_register_driver(&r852_pci_driver);
1128 }
1129
1130 static void __exit r852_module_exit(void)
1131 {
1132         pci_unregister_driver(&r852_pci_driver);
1133 }
1134
1135 module_init(r852_module_init);
1136 module_exit(r852_module_exit);
1137
1138 MODULE_LICENSE("GPL");
1139 MODULE_AUTHOR("Maxim Levitsky <maximlevitsky@gmail.com>");
1140 MODULE_DESCRIPTION("Ricoh 85xx xD/smartmedia card reader driver");