drivers/mtd/chips/jedec_probe.c

   1 /*
   2    Common Flash Interface probe code.
   3    (C) 2000 Red Hat. GPL'd.
   4    See JEDEC (http://www.jedec.org/) standard JESD21C (section 3.5)
   5    for the standard this probe goes back to.
   6
   7    Occasionally maintained by Thayne Harbaugh tharbaugh at lnxi dot com
   8 */
   9
  10 #include <linux/module.h>
  11 #include <linux/init.h>
  12 #include <linux/types.h>
  13 #include <linux/kernel.h>
  14 #include <asm/io.h>
  15 #include <asm/byteorder.h>
  16 #include <linux/errno.h>
  17 #include <linux/slab.h>
  18 #include <linux/interrupt.h>
  19
  20 #include <linux/mtd/mtd.h>
  21 #include <linux/mtd/map.h>
  22 #include <linux/mtd/cfi.h>
  23 #include <linux/mtd/gen_probe.h>
  24
  25 /* AMD */
  26 #define AM29DL800BB     0x22CB
  27 #define AM29DL800BT     0x224A
  28
  29 #define AM29F800BB      0x2258
  30 #define AM29F800BT      0x22D6
  31 #define AM29LV400BB     0x22BA
  32 #define AM29LV400BT     0x22B9
  33 #define AM29LV800BB     0x225B
  34 #define AM29LV800BT     0x22DA
  35 #define AM29LV160DT     0x22C4
  36 #define AM29LV160DB     0x2249
  37 #define AM29F017D       0x003D
  38 #define AM29F016D       0x00AD
  39 #define AM29F080        0x00D5
  40 #define AM29F040        0x00A4
  41 #define AM29LV040B      0x004F
  42 #define AM29F032B       0x0041
  43 #define AM29F002T       0x00B0
  44 #define AM29SL800DB     0x226B
  45 #define AM29SL800DT     0x22EA
  46
  47 /* Atmel */
  48 #define AT49BV512       0x0003
  49 #define AT29LV512       0x003d
  50 #define AT49BV16X       0x00C0
  51 #define AT49BV16XT      0x00C2
  52 #define AT49BV32X       0x00C8
  53 #define AT49BV32XT      0x00C9
  54
  55 /* Eon */
  56 #define EN29SL800BB     0x226B
  57 #define EN29SL800BT     0x22EA
  58
  59 /* Fujitsu */
  60 #define MBM29F040C      0x00A4
  61 #define MBM29F800BA     0x2258
  62 #define MBM29LV650UE    0x22D7
  63 #define MBM29LV320TE    0x22F6
  64 #define MBM29LV320BE    0x22F9
  65 #define MBM29LV160TE    0x22C4
  66 #define MBM29LV160BE    0x2249
  67 #define MBM29LV800BA    0x225B
  68 #define MBM29LV800TA    0x22DA
  69 #define MBM29LV400TC    0x22B9
  70 #define MBM29LV400BC    0x22BA
  71
  72 /* Hyundai */
  73 #define HY29F002T       0x00B0
  74
  75 /* Intel */
  76 #define I28F004B3T      0x00d4
  77 #define I28F004B3B      0x00d5
  78 #define I28F400B3T      0x8894
  79 #define I28F400B3B      0x8895
  80 #define I28F008S5       0x00a6
  81 #define I28F016S5       0x00a0
  82 #define I28F008SA       0x00a2
  83 #define I28F008B3T      0x00d2
  84 #define I28F008B3B      0x00d3
  85 #define I28F800B3T      0x8892
  86 #define I28F800B3B      0x8893
  87 #define I28F016S3       0x00aa
  88 #define I28F016B3T      0x00d0
  89 #define I28F016B3B      0x00d1
  90 #define I28F160B3T      0x8890
  91 #define I28F160B3B      0x8891
  92 #define I28F320B3T      0x8896
  93 #define I28F320B3B      0x8897
  94 #define I28F640B3T      0x8898
  95 #define I28F640B3B      0x8899
  96 #define I28F640C3B      0x88CD
  97 #define I28F160F3T      0x88F3
  98 #define I28F160F3B      0x88F4
  99 #define I28F160C3T      0x88C2
 100 #define I28F160C3B      0x88C3
 101 #define I82802AB        0x00ad
 102 #define I82802AC        0x00ac
 103
 104 /* Macronix */
 105 #define MX29LV040C      0x004F
 106 #define MX29LV160T      0x22C4
 107 #define MX29LV160B      0x2249
 108 #define MX29F040        0x00A4
 109 #define MX29F016        0x00AD
 110 #define MX29F002T       0x00B0
 111 #define MX29F004T       0x0045
 112 #define MX29F004B       0x0046
 113
 114 /* NEC */
 115 #define UPD29F064115    0x221C
 116
 117 /* PMC */
 118 #define PM49FL002       0x006D
 119 #define PM49FL004       0x006E
 120 #define PM49FL008       0x006A
 121
 122 /* Sharp */
 123 #define LH28F640BF      0x00b0
 124
 125 /* ST - www.st.com */
 126 #define M29F800AB       0x0058
 127 #define M29W800DT       0x22D7
 128 #define M29W800DB       0x225B
 129 #define M29W400DT       0x00EE
 130 #define M29W400DB       0x00EF
 131 #define M29W160DT       0x22C4
 132 #define M29W160DB       0x2249
 133 #define M29W040B        0x00E3
 134 #define M50FW040        0x002C
 135 #define M50FW080        0x002D
 136 #define M50FW016        0x002E
 137 #define M50LPW080       0x002F
 138 #define M50FLW080A      0x0080
 139 #define M50FLW080B      0x0081
 140 #define PSD4256G6V      0x00e9
 141
 142 /* SST */
 143 #define SST29EE020      0x0010
 144 #define SST29LE020      0x0012
 145 #define SST29EE512      0x005d
 146 #define SST29LE512      0x003d
 147 #define SST39LF800      0x2781
 148 #define SST39LF160      0x2782
 149 #define SST39VF1601     0x234b
 150 #define SST39VF3201     0x235b
 151 #define SST39LF512      0x00D4
 152 #define SST39LF010      0x00D5
 153 #define SST39LF020      0x00D6
 154 #define SST39LF040      0x00D7
 155 #define SST39SF010A     0x00B5
 156 #define SST39SF020A     0x00B6
 157 #define SST39SF040      0x00B7
 158 #define SST49LF004B     0x0060
 159 #define SST49LF040B     0x0050
 160 #define SST49LF008A     0x005a
 161 #define SST49LF030A     0x001C
 162 #define SST49LF040A     0x0051
 163 #define SST49LF080A     0x005B
 164 #define SST36VF3203     0x7354
 165
 166 /* Toshiba */
 167 #define TC58FVT160      0x00C2
 168 #define TC58FVB160      0x0043
 169 #define TC58FVT321      0x009A
 170 #define TC58FVB321      0x009C
 171 #define TC58FVT641      0x0093
 172 #define TC58FVB641      0x0095
 173
 174 /* Winbond */
 175 #define W49V002A        0x00b0
 176
 177
 178 /*
 179  * Unlock address sets for AMD command sets.
 180  * Intel command sets use the MTD_UADDR_UNNECESSARY.
 181  * Each identifier, except MTD_UADDR_UNNECESSARY, and
 182  * MTD_UADDR_NO_SUPPORT must be defined below in unlock_addrs[].
 183  * MTD_UADDR_NOT_SUPPORTED must be 0 so that structure
 184  * initialization need not require initializing all of the
 185  * unlock addresses for all bit widths.
 186  */
 187 enum uaddr {
 188         MTD_UADDR_NOT_SUPPORTED = 0,    /* data width not supported */
 189         MTD_UADDR_0x0555_0x02AA,
 190         MTD_UADDR_0x0555_0x0AAA,
 191         MTD_UADDR_0x5555_0x2AAA,
 192         MTD_UADDR_0x0AAA_0x0554,
 193         MTD_UADDR_0x0AAA_0x0555,
 194         MTD_UADDR_0xAAAA_0x5555,
 195         MTD_UADDR_DONT_CARE,            /* Requires an arbitrary address */
 196         MTD_UADDR_UNNECESSARY,          /* Does not require any address */
 197 };
 198
 199
 200 struct unlock_addr {
 201         uint32_t addr1;
 202         uint32_t addr2;
 203 };
 204
 205
 206 /*
 207  * I don't like the fact that the first entry in unlock_addrs[]
 208  * exists, but is for MTD_UADDR_NOT_SUPPORTED - and, therefore,
 209  * should not be used.  The  problem is that structures with
 210  * initializers have extra fields initialized to 0.  It is _very_
 211  * desirable to have the unlock address entries for unsupported
 212  * data widths automatically initialized - that means that
 213  * MTD_UADDR_NOT_SUPPORTED must be 0 and the first entry here
 214  * must go unused.
 215  */
 216 static const struct unlock_addr  unlock_addrs[] = {
 217         [MTD_UADDR_NOT_SUPPORTED] = {
 218                 .addr1 = 0xffff,
 219                 .addr2 = 0xffff
 220         },
 221
 222         [MTD_UADDR_0x0555_0x02AA] = {
 223                 .addr1 = 0x0555,
 224                 .addr2 = 0x02aa
 225         },
 226
 227         [MTD_UADDR_0x0555_0x0AAA] = {
 228                 .addr1 = 0x0555,
 229                 .addr2 = 0x0aaa
 230         },
 231
 232         [MTD_UADDR_0x5555_0x2AAA] = {
 233                 .addr1 = 0x5555,
 234                 .addr2 = 0x2aaa
 235         },
 236
 237         [MTD_UADDR_0x0AAA_0x0554] = {
 238                 .addr1 = 0x0AAA,
 239                 .addr2 = 0x0554
 240         },
 241
 242         [MTD_UADDR_0x0AAA_0x0555] = {
 243                 .addr1 = 0x0AAA,
 244                 .addr2 = 0x0555
 245         },
 246
 247         [MTD_UADDR_0xAAAA_0x5555] = {
 248                 .addr1 = 0xaaaa,
 249                 .addr2 = 0x5555
 250         },
 251
 252         [MTD_UADDR_DONT_CARE] = {
 253                 .addr1 = 0x0000,      /* Doesn't matter which address */
 254                 .addr2 = 0x0000       /* is used - must be last entry */
 255         },
 256
 257         [MTD_UADDR_UNNECESSARY] = {
 258                 .addr1 = 0x0000,
 259                 .addr2 = 0x0000
 260         }
 261 };
 262
 263 struct amd_flash_info {
 264         const char *name;
 265         const uint16_t mfr_id;
 266         const uint16_t dev_id;
 267         const uint8_t dev_size;
 268         const uint8_t nr_regions;
 269         const uint16_t cmd_set;
 270         const uint32_t regions[6];
 271         const uint8_t devtypes;         /* Bitmask for x8, x16 etc. */
 272         const uint8_t uaddr;            /* unlock addrs for 8, 16, 32, 64 */
 273 };
 274
 275 #define ERASEINFO(size,blocks) (size<<8)|(blocks-1)
 276
 277 #define SIZE_64KiB  16
 278 #define SIZE_128KiB 17
 279 #define SIZE_256KiB 18
 280 #define SIZE_512KiB 19
 281 #define SIZE_1MiB   20
 282 #define SIZE_2MiB   21
 283 #define SIZE_4MiB   22
 284 #define SIZE_8MiB   23
 285
 286
 287 /*
 288  * Please keep this list ordered by manufacturer!
 289  * Fortunately, the list isn't searched often and so a
 290  * slow, linear search isn't so bad.
 291  */
 292 static const struct amd_flash_info jedec_table[] = {
 293         {
 294                 .mfr_id         = CFI_MFR_AMD,
 295                 .dev_id         = AM29F032B,
 296                 .name           = "AMD AM29F032B",
 297                 .uaddr          = MTD_UADDR_0x0555_0x02AA,
 298                 .devtypes       = CFI_DEVICETYPE_X8,
 299                 .dev_size       = SIZE_4MiB,
 300                 .cmd_set        = P_ID_AMD_STD,
 301                 .nr_regions     = 1,
 302                 .regions        = {
 303                         ERASEINFO(0x10000,64)
 304                 }
 305         }, {
 306                 .mfr_id         = CFI_MFR_AMD,
 307                 .dev_id         = AM29LV160DT,
 308                 .name           = "AMD AM29LV160DT",
 309                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 310                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 311                 .dev_size       = SIZE_2MiB,
 312                 .cmd_set        = P_ID_AMD_STD,
 313                 .nr_regions     = 4,
 314                 .regions        = {
 315                         ERASEINFO(0x10000,31),
 316                         ERASEINFO(0x08000,1),
 317                         ERASEINFO(0x02000,2),
 318                         ERASEINFO(0x04000,1)
 319                 }
 320         }, {
 321                 .mfr_id         = CFI_MFR_AMD,
 322                 .dev_id         = AM29LV160DB,
 323                 .name           = "AMD AM29LV160DB",
 324                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 325                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 326                 .dev_size       = SIZE_2MiB,
 327                 .cmd_set        = P_ID_AMD_STD,
 328                 .nr_regions     = 4,
 329                 .regions        = {
 330                         ERASEINFO(0x04000,1),
 331                         ERASEINFO(0x02000,2),
 332                         ERASEINFO(0x08000,1),
 333                         ERASEINFO(0x10000,31)
 334                 }
 335         }, {
 336                 .mfr_id         = CFI_MFR_AMD,
 337                 .dev_id         = AM29LV400BB,
 338                 .name           = "AMD AM29LV400BB",
 339                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 340                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 341                 .dev_size       = SIZE_512KiB,
 342                 .cmd_set        = P_ID_AMD_STD,
 343                 .nr_regions     = 4,
 344                 .regions        = {
 345                         ERASEINFO(0x04000,1),
 346                         ERASEINFO(0x02000,2),
 347                         ERASEINFO(0x08000,1),
 348                         ERASEINFO(0x10000,7)
 349                 }
 350         }, {
 351                 .mfr_id         = CFI_MFR_AMD,
 352                 .dev_id         = AM29LV400BT,
 353                 .name           = "AMD AM29LV400BT",
 354                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 355                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 356                 .dev_size       = SIZE_512KiB,
 357                 .cmd_set        = P_ID_AMD_STD,
 358                 .nr_regions     = 4,
 359                 .regions        = {
 360                         ERASEINFO(0x10000,7),
 361                         ERASEINFO(0x08000,1),
 362                         ERASEINFO(0x02000,2),
 363                         ERASEINFO(0x04000,1)
 364                 }
 365         }, {
 366                 .mfr_id         = CFI_MFR_AMD,
 367                 .dev_id         = AM29LV800BB,
 368                 .name           = "AMD AM29LV800BB",
 369                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 370                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 371                 .dev_size       = SIZE_1MiB,
 372                 .cmd_set        = P_ID_AMD_STD,
 373                 .nr_regions     = 4,
 374                 .regions        = {
 375                         ERASEINFO(0x04000,1),
 376                         ERASEINFO(0x02000,2),
 377                         ERASEINFO(0x08000,1),
 378                         ERASEINFO(0x10000,15),
 379                 }
 380         }, {
 381 /* add DL */
 382                 .mfr_id         = CFI_MFR_AMD,
 383                 .dev_id         = AM29DL800BB,
 384                 .name           = "AMD AM29DL800BB",
 385                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 386                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 387                 .dev_size       = SIZE_1MiB,
 388                 .cmd_set        = P_ID_AMD_STD,
 389                 .nr_regions     = 6,
 390                 .regions        = {
 391                         ERASEINFO(0x04000,1),
 392                         ERASEINFO(0x08000,1),
 393                         ERASEINFO(0x02000,4),
 394                         ERASEINFO(0x08000,1),
 395                         ERASEINFO(0x04000,1),
 396                         ERASEINFO(0x10000,14)
 397                 }
 398         }, {
 399                 .mfr_id         = CFI_MFR_AMD,
 400                 .dev_id         = AM29DL800BT,
 401                 .name           = "AMD AM29DL800BT",
 402                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 403                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 404                 .dev_size       = SIZE_1MiB,
 405                 .cmd_set        = P_ID_AMD_STD,
 406                 .nr_regions     = 6,
 407                 .regions        = {
 408                         ERASEINFO(0x10000,14),
 409                         ERASEINFO(0x04000,1),
 410                         ERASEINFO(0x08000,1),
 411                         ERASEINFO(0x02000,4),
 412                         ERASEINFO(0x08000,1),
 413                         ERASEINFO(0x04000,1)
 414                 }
 415         }, {
 416                 .mfr_id         = CFI_MFR_AMD,
 417                 .dev_id         = AM29F800BB,
 418                 .name           = "AMD AM29F800BB",
 419                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 420                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 421                 .dev_size       = SIZE_1MiB,
 422                 .cmd_set        = P_ID_AMD_STD,
 423                 .nr_regions     = 4,
 424                 .regions        = {
 425                         ERASEINFO(0x04000,1),
 426                         ERASEINFO(0x02000,2),
 427                         ERASEINFO(0x08000,1),
 428                         ERASEINFO(0x10000,15),
 429                 }
 430         }, {
 431                 .mfr_id         = CFI_MFR_AMD,
 432                 .dev_id         = AM29LV800BT,
 433                 .name           = "AMD AM29LV800BT",
 434                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 435                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 436                 .dev_size       = SIZE_1MiB,
 437                 .cmd_set        = P_ID_AMD_STD,
 438                 .nr_regions     = 4,
 439                 .regions        = {
 440                         ERASEINFO(0x10000,15),
 441                         ERASEINFO(0x08000,1),
 442                         ERASEINFO(0x02000,2),
 443                         ERASEINFO(0x04000,1)
 444                 }
 445         }, {
 446                 .mfr_id         = CFI_MFR_AMD,
 447                 .dev_id         = AM29F800BT,
 448                 .name           = "AMD AM29F800BT",
 449                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 450                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 451                 .dev_size       = SIZE_1MiB,
 452                 .cmd_set        = P_ID_AMD_STD,
 453                 .nr_regions     = 4,
 454                 .regions        = {
 455                         ERASEINFO(0x10000,15),
 456                         ERASEINFO(0x08000,1),
 457                         ERASEINFO(0x02000,2),
 458                         ERASEINFO(0x04000,1)
 459                 }
 460         }, {
 461                 .mfr_id         = CFI_MFR_AMD,
 462                 .dev_id         = AM29F017D,
 463                 .name           = "AMD AM29F017D",
 464                 .devtypes       = CFI_DEVICETYPE_X8,
 465                 .uaddr          = MTD_UADDR_DONT_CARE,
 466                 .dev_size       = SIZE_2MiB,
 467                 .cmd_set        = P_ID_AMD_STD,
 468                 .nr_regions     = 1,
 469                 .regions        = {
 470                         ERASEINFO(0x10000,32),
 471                 }
 472         }, {
 473                 .mfr_id         = CFI_MFR_AMD,
 474                 .dev_id         = AM29F016D,
 475                 .name           = "AMD AM29F016D",
 476                 .devtypes       = CFI_DEVICETYPE_X8,
 477                 .uaddr          = MTD_UADDR_0x0555_0x02AA,
 478                 .dev_size       = SIZE_2MiB,
 479                 .cmd_set        = P_ID_AMD_STD,
 480                 .nr_regions     = 1,
 481                 .regions        = {
 482                         ERASEINFO(0x10000,32),
 483                 }
 484         }, {
 485                 .mfr_id         = CFI_MFR_AMD,
 486                 .dev_id         = AM29F080,
 487                 .name           = "AMD AM29F080",
 488                 .devtypes       = CFI_DEVICETYPE_X8,
 489                 .uaddr          = MTD_UADDR_0x0555_0x02AA,
 490                 .dev_size       = SIZE_1MiB,
 491                 .cmd_set        = P_ID_AMD_STD,
 492                 .nr_regions     = 1,
 493                 .regions        = {
 494                         ERASEINFO(0x10000,16),
 495                 }
 496         }, {
 497                 .mfr_id         = CFI_MFR_AMD,
 498                 .dev_id         = AM29F040,
 499                 .name           = "AMD AM29F040",
 500                 .devtypes       = CFI_DEVICETYPE_X8,
 501                 .uaddr          = MTD_UADDR_0x0555_0x02AA,
 502                 .dev_size       = SIZE_512KiB,
 503                 .cmd_set        = P_ID_AMD_STD,
 504                 .nr_regions     = 1,
 505                 .regions        = {
 506                         ERASEINFO(0x10000,8),
 507                 }
 508         }, {
 509                 .mfr_id         = CFI_MFR_AMD,
 510                 .dev_id         = AM29LV040B,
 511                 .name           = "AMD AM29LV040B",
 512                 .devtypes       = CFI_DEVICETYPE_X8,
 513                 .uaddr          = MTD_UADDR_0x0555_0x02AA,
 514                 .dev_size       = SIZE_512KiB,
 515                 .cmd_set        = P_ID_AMD_STD,
 516                 .nr_regions     = 1,
 517                 .regions        = {
 518                         ERASEINFO(0x10000,8),
 519                 }
 520         }, {
 521                 .mfr_id         = CFI_MFR_AMD,
 522                 .dev_id         = AM29F002T,
 523                 .name           = "AMD AM29F002T",
 524                 .devtypes       = CFI_DEVICETYPE_X8,
 525                 .uaddr          = MTD_UADDR_0x0555_0x02AA,
 526                 .dev_size       = SIZE_256KiB,
 527                 .cmd_set        = P_ID_AMD_STD,
 528                 .nr_regions     = 4,
 529                 .regions        = {
 530                         ERASEINFO(0x10000,3),
 531                         ERASEINFO(0x08000,1),
 532                         ERASEINFO(0x02000,2),
 533                         ERASEINFO(0x04000,1),
 534                 }
 535         }, {
 536                 .mfr_id         = CFI_MFR_AMD,
 537                 .dev_id         = AM29SL800DT,
 538                 .name           = "AMD AM29SL800DT",
 539                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 540                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 541                 .dev_size       = SIZE_1MiB,
 542                 .cmd_set        = P_ID_AMD_STD,
 543                 .nr_regions     = 4,
 544                 .regions        = {
 545                         ERASEINFO(0x10000,15),
 546                         ERASEINFO(0x08000,1),
 547                         ERASEINFO(0x02000,2),
 548                         ERASEINFO(0x04000,1),
 549                 }
 550         }, {
 551                 .mfr_id         = CFI_MFR_AMD,
 552                 .dev_id         = AM29SL800DB,
 553                 .name           = "AMD AM29SL800DB",
 554                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 555                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 556                 .dev_size       = SIZE_1MiB,
 557                 .cmd_set        = P_ID_AMD_STD,
 558                 .nr_regions     = 4,
 559                 .regions        = {
 560                         ERASEINFO(0x04000,1),
 561                         ERASEINFO(0x02000,2),
 562                         ERASEINFO(0x08000,1),
 563                         ERASEINFO(0x10000,15),
 564                 }
 565         }, {
 566                 .mfr_id         = CFI_MFR_ATMEL,
 567                 .dev_id         = AT49BV512,
 568                 .name           = "Atmel AT49BV512",
 569                 .devtypes       = CFI_DEVICETYPE_X8,
 570                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
 571                 .dev_size       = SIZE_64KiB,
 572                 .cmd_set        = P_ID_AMD_STD,
 573                 .nr_regions     = 1,
 574                 .regions        = {
 575                         ERASEINFO(0x10000,1)
 576                 }
 577         }, {
 578                 .mfr_id         = CFI_MFR_ATMEL,
 579                 .dev_id         = AT29LV512,
 580                 .name           = "Atmel AT29LV512",
 581                 .devtypes       = CFI_DEVICETYPE_X8,
 582                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
 583                 .dev_size       = SIZE_64KiB,
 584                 .cmd_set        = P_ID_AMD_STD,
 585                 .nr_regions     = 1,
 586                 .regions        = {
 587                         ERASEINFO(0x80,256),
 588                         ERASEINFO(0x80,256)
 589                 }
 590         }, {
 591                 .mfr_id         = CFI_MFR_ATMEL,
 592                 .dev_id         = AT49BV16X,
 593                 .name           = "Atmel AT49BV16X",
 594                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 595                 .uaddr          = MTD_UADDR_0x0555_0x0AAA,      /* ???? */
 596                 .dev_size       = SIZE_2MiB,
 597                 .cmd_set        = P_ID_AMD_STD,
 598                 .nr_regions     = 2,
 599                 .regions        = {
 600                         ERASEINFO(0x02000,8),
 601                         ERASEINFO(0x10000,31)
 602                 }
 603         }, {
 604                 .mfr_id         = CFI_MFR_ATMEL,
 605                 .dev_id         = AT49BV16XT,
 606                 .name           = "Atmel AT49BV16XT",
 607                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 608                 .uaddr          = MTD_UADDR_0x0555_0x0AAA,      /* ???? */
 609                 .dev_size       = SIZE_2MiB,
 610                 .cmd_set        = P_ID_AMD_STD,
 611                 .nr_regions     = 2,
 612                 .regions        = {
 613                         ERASEINFO(0x10000,31),
 614                         ERASEINFO(0x02000,8)
 615                 }
 616         }, {
 617                 .mfr_id         = CFI_MFR_ATMEL,
 618                 .dev_id         = AT49BV32X,
 619                 .name           = "Atmel AT49BV32X",
 620                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 621                 .uaddr          = MTD_UADDR_0x0555_0x0AAA,      /* ???? */
 622                 .dev_size       = SIZE_4MiB,
 623                 .cmd_set        = P_ID_AMD_STD,
 624                 .nr_regions     = 2,
 625                 .regions        = {
 626                         ERASEINFO(0x02000,8),
 627                         ERASEINFO(0x10000,63)
 628                 }
 629         }, {
 630                 .mfr_id         = CFI_MFR_ATMEL,
 631                 .dev_id         = AT49BV32XT,
 632                 .name           = "Atmel AT49BV32XT",
 633                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 634                 .uaddr          = MTD_UADDR_0x0555_0x0AAA,      /* ???? */
 635                 .dev_size       = SIZE_4MiB,
 636                 .cmd_set        = P_ID_AMD_STD,
 637                 .nr_regions     = 2,
 638                 .regions        = {
 639                         ERASEINFO(0x10000,63),
 640                         ERASEINFO(0x02000,8)
 641                 }
 642         }, {
 643                 .mfr_id         = CFI_MFR_EON,
 644                 .dev_id         = EN29SL800BT,
 645                 .name           = "Eon EN29SL800BT",
 646                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 647                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 648                 .dev_size       = SIZE_1MiB,
 649                 .cmd_set        = P_ID_AMD_STD,
 650                 .nr_regions     = 4,
 651                 .regions        = {
 652                         ERASEINFO(0x10000,15),
 653                         ERASEINFO(0x08000,1),
 654                         ERASEINFO(0x02000,2),
 655                         ERASEINFO(0x04000,1),
 656                 }
 657         }, {
 658                 .mfr_id         = CFI_MFR_EON,
 659                 .dev_id         = EN29SL800BB,
 660                 .name           = "Eon EN29SL800BB",
 661                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 662                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 663                 .dev_size       = SIZE_1MiB,
 664                 .cmd_set        = P_ID_AMD_STD,
 665                 .nr_regions     = 4,
 666                 .regions        = {
 667                         ERASEINFO(0x04000,1),
 668                         ERASEINFO(0x02000,2),
 669                         ERASEINFO(0x08000,1),
 670                         ERASEINFO(0x10000,15),
 671                 }
 672         }, {
 673                 .mfr_id         = CFI_MFR_FUJITSU,
 674                 .dev_id         = MBM29F040C,
 675                 .name           = "Fujitsu MBM29F040C",
 676                 .devtypes       = CFI_DEVICETYPE_X8,
 677                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 678                 .dev_size       = SIZE_512KiB,
 679                 .cmd_set        = P_ID_AMD_STD,
 680                 .nr_regions     = 1,
 681                 .regions        = {
 682                         ERASEINFO(0x10000,8)
 683                 }
 684         }, {
 685                 .mfr_id         = CFI_MFR_FUJITSU,
 686                 .dev_id         = MBM29F800BA,
 687                 .name           = "Fujitsu MBM29F800BA",
 688                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 689                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 690                 .dev_size       = SIZE_1MiB,
 691                 .cmd_set        = P_ID_AMD_STD,
 692                 .nr_regions     = 4,
 693                 .regions        = {
 694                         ERASEINFO(0x04000,1),
 695                         ERASEINFO(0x02000,2),
 696                         ERASEINFO(0x08000,1),
 697                         ERASEINFO(0x10000,15),
 698                 }
 699         }, {
 700                 .mfr_id         = CFI_MFR_FUJITSU,
 701                 .dev_id         = MBM29LV650UE,
 702                 .name           = "Fujitsu MBM29LV650UE",
 703                 .devtypes       = CFI_DEVICETYPE_X8,
 704                 .uaddr          = MTD_UADDR_DONT_CARE,
 705                 .dev_size       = SIZE_8MiB,
 706                 .cmd_set        = P_ID_AMD_STD,
 707                 .nr_regions     = 1,
 708                 .regions        = {
 709                         ERASEINFO(0x10000,128)
 710                 }
 711         }, {
 712                 .mfr_id         = CFI_MFR_FUJITSU,
 713                 .dev_id         = MBM29LV320TE,
 714                 .name           = "Fujitsu MBM29LV320TE",
 715                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 716                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 717                 .dev_size       = SIZE_4MiB,
 718                 .cmd_set        = P_ID_AMD_STD,
 719                 .nr_regions     = 2,
 720                 .regions        = {
 721                         ERASEINFO(0x10000,63),
 722                         ERASEINFO(0x02000,8)
 723                 }
 724         }, {
 725                 .mfr_id         = CFI_MFR_FUJITSU,
 726                 .dev_id         = MBM29LV320BE,
 727                 .name           = "Fujitsu MBM29LV320BE",
 728                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 729                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 730                 .dev_size       = SIZE_4MiB,
 731                 .cmd_set        = P_ID_AMD_STD,
 732                 .nr_regions     = 2,
 733                 .regions        = {
 734                         ERASEINFO(0x02000,8),
 735                         ERASEINFO(0x10000,63)
 736                 }
 737         }, {
 738                 .mfr_id         = CFI_MFR_FUJITSU,
 739                 .dev_id         = MBM29LV160TE,
 740                 .name           = "Fujitsu MBM29LV160TE",
 741                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 742                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 743                 .dev_size       = SIZE_2MiB,
 744                 .cmd_set        = P_ID_AMD_STD,
 745                 .nr_regions     = 4,
 746                 .regions        = {
 747                         ERASEINFO(0x10000,31),
 748                         ERASEINFO(0x08000,1),
 749                         ERASEINFO(0x02000,2),
 750                         ERASEINFO(0x04000,1)
 751                 }
 752         }, {
 753                 .mfr_id         = CFI_MFR_FUJITSU,
 754                 .dev_id         = MBM29LV160BE,
 755                 .name           = "Fujitsu MBM29LV160BE",
 756                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 757                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 758                 .dev_size       = SIZE_2MiB,
 759                 .cmd_set        = P_ID_AMD_STD,
 760                 .nr_regions     = 4,
 761                 .regions        = {
 762                         ERASEINFO(0x04000,1),
 763                         ERASEINFO(0x02000,2),
 764                         ERASEINFO(0x08000,1),
 765                         ERASEINFO(0x10000,31)
 766                 }
 767         }, {
 768                 .mfr_id         = CFI_MFR_FUJITSU,
 769                 .dev_id         = MBM29LV800BA,
 770                 .name           = "Fujitsu MBM29LV800BA",
 771                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 772                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 773                 .dev_size       = SIZE_1MiB,
 774                 .cmd_set        = P_ID_AMD_STD,
 775                 .nr_regions     = 4,
 776                 .regions        = {
 777                         ERASEINFO(0x04000,1),
 778                         ERASEINFO(0x02000,2),
 779                         ERASEINFO(0x08000,1),
 780                         ERASEINFO(0x10000,15)
 781                 }
 782         }, {
 783                 .mfr_id         = CFI_MFR_FUJITSU,
 784                 .dev_id         = MBM29LV800TA,
 785                 .name           = "Fujitsu MBM29LV800TA",
 786                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 787                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 788                 .dev_size       = SIZE_1MiB,
 789                 .cmd_set        = P_ID_AMD_STD,
 790                 .nr_regions     = 4,
 791                 .regions        = {
 792                         ERASEINFO(0x10000,15),
 793                         ERASEINFO(0x08000,1),
 794                         ERASEINFO(0x02000,2),
 795                         ERASEINFO(0x04000,1)
 796                 }
 797         }, {
 798                 .mfr_id         = CFI_MFR_FUJITSU,
 799                 .dev_id         = MBM29LV400BC,
 800                 .name           = "Fujitsu MBM29LV400BC",
 801                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 802                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 803                 .dev_size       = SIZE_512KiB,
 804                 .cmd_set        = P_ID_AMD_STD,
 805                 .nr_regions     = 4,
 806                 .regions        = {
 807                         ERASEINFO(0x04000,1),
 808                         ERASEINFO(0x02000,2),
 809                         ERASEINFO(0x08000,1),
 810                         ERASEINFO(0x10000,7)
 811                 }
 812         }, {
 813                 .mfr_id         = CFI_MFR_FUJITSU,
 814                 .dev_id         = MBM29LV400TC,
 815                 .name           = "Fujitsu MBM29LV400TC",
 816                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 817                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
 818                 .dev_size       = SIZE_512KiB,
 819                 .cmd_set        = P_ID_AMD_STD,
 820                 .nr_regions     = 4,
 821                 .regions        = {
 822                         ERASEINFO(0x10000,7),
 823                         ERASEINFO(0x08000,1),
 824                         ERASEINFO(0x02000,2),
 825                         ERASEINFO(0x04000,1)
 826                 }
 827         }, {
 828                 .mfr_id         = CFI_MFR_HYUNDAI,
 829                 .dev_id         = HY29F002T,
 830                 .name           = "Hyundai HY29F002T",
 831                 .devtypes       = CFI_DEVICETYPE_X8,
 832                 .uaddr          = MTD_UADDR_0x0555_0x02AA,
 833                 .dev_size       = SIZE_256KiB,
 834                 .cmd_set        = P_ID_AMD_STD,
 835                 .nr_regions     = 4,
 836                 .regions        = {
 837                         ERASEINFO(0x10000,3),
 838                         ERASEINFO(0x08000,1),
 839                         ERASEINFO(0x02000,2),
 840                         ERASEINFO(0x04000,1),
 841                 }
 842         }, {
 843                 .mfr_id         = CFI_MFR_INTEL,
 844                 .dev_id         = I28F004B3B,
 845                 .name           = "Intel 28F004B3B",
 846                 .devtypes       = CFI_DEVICETYPE_X8,
 847                 .uaddr          = MTD_UADDR_UNNECESSARY,
 848                 .dev_size       = SIZE_512KiB,
 849                 .cmd_set        = P_ID_INTEL_STD,
 850                 .nr_regions     = 2,
 851                 .regions        = {
 852                         ERASEINFO(0x02000, 8),
 853                         ERASEINFO(0x10000, 7),
 854                 }
 855         }, {
 856                 .mfr_id         = CFI_MFR_INTEL,
 857                 .dev_id         = I28F004B3T,
 858                 .name           = "Intel 28F004B3T",
 859                 .devtypes       = CFI_DEVICETYPE_X8,
 860                 .uaddr          = MTD_UADDR_UNNECESSARY,
 861                 .dev_size       = SIZE_512KiB,
 862                 .cmd_set        = P_ID_INTEL_STD,
 863                 .nr_regions     = 2,
 864                 .regions        = {
 865                         ERASEINFO(0x10000, 7),
 866                         ERASEINFO(0x02000, 8),
 867                 }
 868         }, {
 869                 .mfr_id         = CFI_MFR_INTEL,
 870                 .dev_id         = I28F400B3B,
 871                 .name           = "Intel 28F400B3B",
 872                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 873                 .uaddr          = MTD_UADDR_UNNECESSARY,
 874                 .dev_size       = SIZE_512KiB,
 875                 .cmd_set        = P_ID_INTEL_STD,
 876                 .nr_regions     = 2,
 877                 .regions        = {
 878                         ERASEINFO(0x02000, 8),
 879                         ERASEINFO(0x10000, 7),
 880                 }
 881         }, {
 882                 .mfr_id         = CFI_MFR_INTEL,
 883                 .dev_id         = I28F400B3T,
 884                 .name           = "Intel 28F400B3T",
 885                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
 886                 .uaddr          = MTD_UADDR_UNNECESSARY,
 887                 .dev_size       = SIZE_512KiB,
 888                 .cmd_set        = P_ID_INTEL_STD,
 889                 .nr_regions     = 2,
 890                 .regions        = {
 891                         ERASEINFO(0x10000, 7),
 892                         ERASEINFO(0x02000, 8),
 893                 }
 894         }, {
 895                 .mfr_id         = CFI_MFR_INTEL,
 896                 .dev_id         = I28F008B3B,
 897                 .name           = "Intel 28F008B3B",
 898                 .devtypes       = CFI_DEVICETYPE_X8,
 899                 .uaddr          = MTD_UADDR_UNNECESSARY,
 900                 .dev_size       = SIZE_1MiB,
 901                 .cmd_set        = P_ID_INTEL_STD,
 902                 .nr_regions     = 2,
 903                 .regions        = {
 904                         ERASEINFO(0x02000, 8),
 905                         ERASEINFO(0x10000, 15),
 906                 }
 907         }, {
 908                 .mfr_id         = CFI_MFR_INTEL,
 909                 .dev_id         = I28F008B3T,
 910                 .name           = "Intel 28F008B3T",
 911                 .devtypes       = CFI_DEVICETYPE_X8,
 912                 .uaddr          = MTD_UADDR_UNNECESSARY,
 913                 .dev_size       = SIZE_1MiB,
 914                 .cmd_set        = P_ID_INTEL_STD,
 915                 .nr_regions     = 2,
 916                 .regions        = {
 917                         ERASEINFO(0x10000, 15),
 918                         ERASEINFO(0x02000, 8),
 919                 }
 920         }, {
 921                 .mfr_id         = CFI_MFR_INTEL,
 922                 .dev_id         = I28F008S5,
 923                 .name           = "Intel 28F008S5",
 924                 .devtypes       = CFI_DEVICETYPE_X8,
 925                 .uaddr          = MTD_UADDR_UNNECESSARY,
 926                 .dev_size       = SIZE_1MiB,
 927                 .cmd_set        = P_ID_INTEL_EXT,
 928                 .nr_regions     = 1,
 929                 .regions        = {
 930                         ERASEINFO(0x10000,16),
 931                 }
 932         }, {
 933                 .mfr_id         = CFI_MFR_INTEL,
 934                 .dev_id         = I28F016S5,
 935                 .name           = "Intel 28F016S5",
 936                 .devtypes       = CFI_DEVICETYPE_X8,
 937                 .uaddr          = MTD_UADDR_UNNECESSARY,
 938                 .dev_size       = SIZE_2MiB,
 939                 .cmd_set        = P_ID_INTEL_EXT,
 940                 .nr_regions     = 1,
 941                 .regions        = {
 942                         ERASEINFO(0x10000,32),
 943                 }
 944         }, {
 945                 .mfr_id         = CFI_MFR_INTEL,
 946                 .dev_id         = I28F008SA,
 947                 .name           = "Intel 28F008SA",
 948                 .devtypes       = CFI_DEVICETYPE_X8,
 949                 .uaddr          = MTD_UADDR_UNNECESSARY,
 950                 .dev_size       = SIZE_1MiB,
 951                 .cmd_set        = P_ID_INTEL_STD,
 952                 .nr_regions     = 1,
 953                 .regions        = {
 954                         ERASEINFO(0x10000, 16),
 955                 }
 956         }, {
 957                 .mfr_id         = CFI_MFR_INTEL,
 958                 .dev_id         = I28F800B3B,
 959                 .name           = "Intel 28F800B3B",
 960                 .devtypes       = CFI_DEVICETYPE_X16,
 961                 .uaddr          = MTD_UADDR_UNNECESSARY,
 962                 .dev_size       = SIZE_1MiB,
 963                 .cmd_set        = P_ID_INTEL_STD,
 964                 .nr_regions     = 2,
 965                 .regions        = {
 966                         ERASEINFO(0x02000, 8),
 967                         ERASEINFO(0x10000, 15),
 968                 }
 969         }, {
 970                 .mfr_id         = CFI_MFR_INTEL,
 971                 .dev_id         = I28F800B3T,
 972                 .name           = "Intel 28F800B3T",
 973                 .devtypes       = CFI_DEVICETYPE_X16,
 974                 .uaddr          = MTD_UADDR_UNNECESSARY,
 975                 .dev_size       = SIZE_1MiB,
 976                 .cmd_set        = P_ID_INTEL_STD,
 977                 .nr_regions     = 2,
 978                 .regions        = {
 979                         ERASEINFO(0x10000, 15),
 980                         ERASEINFO(0x02000, 8),
 981                 }
 982         }, {
 983                 .mfr_id         = CFI_MFR_INTEL,
 984                 .dev_id         = I28F016B3B,
 985                 .name           = "Intel 28F016B3B",
 986                 .devtypes       = CFI_DEVICETYPE_X8,
 987                 .uaddr          = MTD_UADDR_UNNECESSARY,
 988                 .dev_size       = SIZE_2MiB,
 989                 .cmd_set        = P_ID_INTEL_STD,
 990                 .nr_regions     = 2,
 991                 .regions        = {
 992                         ERASEINFO(0x02000, 8),
 993                         ERASEINFO(0x10000, 31),
 994                 }
 995         }, {
 996                 .mfr_id         = CFI_MFR_INTEL,
 997                 .dev_id         = I28F016S3,
 998                 .name           = "Intel I28F016S3",
 999                 .devtypes       = CFI_DEVICETYPE_X8,
1000                 .uaddr          = MTD_UADDR_UNNECESSARY,
1001                 .dev_size       = SIZE_2MiB,
1002                 .cmd_set        = P_ID_INTEL_STD,
1003                 .nr_regions     = 1,
1004                 .regions        = {
1005                         ERASEINFO(0x10000, 32),
1006                 }
1007         }, {
1008                 .mfr_id         = CFI_MFR_INTEL,
1009                 .dev_id         = I28F016B3T,
1010                 .name           = "Intel 28F016B3T",
1011                 .devtypes       = CFI_DEVICETYPE_X8,
1012                 .uaddr          = MTD_UADDR_UNNECESSARY,
1013                 .dev_size       = SIZE_2MiB,
1014                 .cmd_set        = P_ID_INTEL_STD,
1015                 .nr_regions     = 2,
1016                 .regions        = {
1017                         ERASEINFO(0x10000, 31),
1018                         ERASEINFO(0x02000, 8),
1019                 }
1020         }, {
1021                 .mfr_id         = CFI_MFR_INTEL,
1022                 .dev_id         = I28F160B3B,
1023                 .name           = "Intel 28F160B3B",
1024                 .devtypes       = CFI_DEVICETYPE_X16,
1025                 .uaddr          = MTD_UADDR_UNNECESSARY,
1026                 .dev_size       = SIZE_2MiB,
1027                 .cmd_set        = P_ID_INTEL_STD,
1028                 .nr_regions     = 2,
1029                 .regions        = {
1030                         ERASEINFO(0x02000, 8),
1031                         ERASEINFO(0x10000, 31),
1032                 }
1033         }, {
1034                 .mfr_id         = CFI_MFR_INTEL,
1035                 .dev_id         = I28F160B3T,
1036                 .name           = "Intel 28F160B3T",
1037                 .devtypes       = CFI_DEVICETYPE_X16,
1038                 .uaddr          = MTD_UADDR_UNNECESSARY,
1039                 .dev_size       = SIZE_2MiB,
1040                 .cmd_set        = P_ID_INTEL_STD,
1041                 .nr_regions     = 2,
1042                 .regions        = {
1043                         ERASEINFO(0x10000, 31),
1044                         ERASEINFO(0x02000, 8),
1045                 }
1046         }, {
1047                 .mfr_id         = CFI_MFR_INTEL,
1048                 .dev_id         = I28F320B3B,
1049                 .name           = "Intel 28F320B3B",
1050                 .devtypes       = CFI_DEVICETYPE_X16,
1051                 .uaddr          = MTD_UADDR_UNNECESSARY,
1052                 .dev_size       = SIZE_4MiB,
1053                 .cmd_set        = P_ID_INTEL_STD,
1054                 .nr_regions     = 2,
1055                 .regions        = {
1056                         ERASEINFO(0x02000, 8),
1057                         ERASEINFO(0x10000, 63),
1058                 }
1059         }, {
1060                 .mfr_id         = CFI_MFR_INTEL,
1061                 .dev_id         = I28F320B3T,
1062                 .name           = "Intel 28F320B3T",
1063                 .devtypes       = CFI_DEVICETYPE_X16,
1064                 .uaddr          = MTD_UADDR_UNNECESSARY,
1065                 .dev_size       = SIZE_4MiB,
1066                 .cmd_set        = P_ID_INTEL_STD,
1067                 .nr_regions     = 2,
1068                 .regions        = {
1069                         ERASEINFO(0x10000, 63),
1070                         ERASEINFO(0x02000, 8),
1071                 }
1072         }, {
1073                 .mfr_id         = CFI_MFR_INTEL,
1074                 .dev_id         = I28F640B3B,
1075                 .name           = "Intel 28F640B3B",
1076                 .devtypes       = CFI_DEVICETYPE_X16,
1077                 .uaddr          = MTD_UADDR_UNNECESSARY,
1078                 .dev_size       = SIZE_8MiB,
1079                 .cmd_set        = P_ID_INTEL_STD,
1080                 .nr_regions     = 2,
1081                 .regions        = {
1082                         ERASEINFO(0x02000, 8),
1083                         ERASEINFO(0x10000, 127),
1084                 }
1085         }, {
1086                 .mfr_id         = CFI_MFR_INTEL,
1087                 .dev_id         = I28F640B3T,
1088                 .name           = "Intel 28F640B3T",
1089                 .devtypes       = CFI_DEVICETYPE_X16,
1090                 .uaddr          = MTD_UADDR_UNNECESSARY,
1091                 .dev_size       = SIZE_8MiB,
1092                 .cmd_set        = P_ID_INTEL_STD,
1093                 .nr_regions     = 2,
1094                 .regions        = {
1095                         ERASEINFO(0x10000, 127),
1096                         ERASEINFO(0x02000, 8),
1097                 }
1098         }, {
1099                 .mfr_id         = CFI_MFR_INTEL,
1100                 .dev_id         = I28F640C3B,
1101                 .name           = "Intel 28F640C3B",
1102                 .devtypes       = CFI_DEVICETYPE_X16,
1103                 .uaddr          = MTD_UADDR_UNNECESSARY,
1104                 .dev_size       = SIZE_8MiB,
1105                 .cmd_set        = P_ID_INTEL_STD,
1106                 .nr_regions     = 2,
1107                 .regions        = {
1108                         ERASEINFO(0x02000, 8),
1109                         ERASEINFO(0x10000, 127),
1110                 }
1111         }, {
1112                 .mfr_id         = CFI_MFR_INTEL,
1113                 .dev_id         = I82802AB,
1114                 .name           = "Intel 82802AB",
1115                 .devtypes       = CFI_DEVICETYPE_X8,
1116                 .uaddr          = MTD_UADDR_UNNECESSARY,
1117                 .dev_size       = SIZE_512KiB,
1118                 .cmd_set        = P_ID_INTEL_EXT,
1119                 .nr_regions     = 1,
1120                 .regions        = {
1121                         ERASEINFO(0x10000,8),
1122                 }
1123         }, {
1124                 .mfr_id         = CFI_MFR_INTEL,
1125                 .dev_id         = I82802AC,
1126                 .name           = "Intel 82802AC",
1127                 .devtypes       = CFI_DEVICETYPE_X8,
1128                 .uaddr          = MTD_UADDR_UNNECESSARY,
1129                 .dev_size       = SIZE_1MiB,
1130                 .cmd_set        = P_ID_INTEL_EXT,
1131                 .nr_regions     = 1,
1132                 .regions        = {
1133                         ERASEINFO(0x10000,16),
1134                 }
1135         }, {
1136                 .mfr_id         = CFI_MFR_MACRONIX,
1137                 .dev_id         = MX29LV040C,
1138                 .name           = "Macronix MX29LV040C",
1139                 .devtypes       = CFI_DEVICETYPE_X8,
1140                 .uaddr          = MTD_UADDR_0x0555_0x02AA,
1141                 .dev_size       = SIZE_512KiB,
1142                 .cmd_set        = P_ID_AMD_STD,
1143                 .nr_regions     = 1,
1144                 .regions        = {
1145                         ERASEINFO(0x10000,8),
1146                 }
1147         }, {
1148                 .mfr_id         = CFI_MFR_MACRONIX,
1149                 .dev_id         = MX29LV160T,
1150                 .name           = "MXIC MX29LV160T",
1151                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1152                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1153                 .dev_size       = SIZE_2MiB,
1154                 .cmd_set        = P_ID_AMD_STD,
1155                 .nr_regions     = 4,
1156                 .regions        = {
1157                         ERASEINFO(0x10000,31),
1158                         ERASEINFO(0x08000,1),
1159                         ERASEINFO(0x02000,2),
1160                         ERASEINFO(0x04000,1)
1161                 }
1162         }, {
1163                 .mfr_id         = CFI_MFR_NEC,
1164                 .dev_id         = UPD29F064115,
1165                 .name           = "NEC uPD29F064115",
1166                 .devtypes       = CFI_DEVICETYPE_X16,
1167                 .uaddr          = MTD_UADDR_0xAAAA_0x5555,
1168                 .dev_size       = SIZE_8MiB,
1169                 .cmd_set        = P_ID_AMD_STD,
1170                 .nr_regions     = 3,
1171                 .regions        = {
1172                         ERASEINFO(0x2000,8),
1173                         ERASEINFO(0x10000,126),
1174                         ERASEINFO(0x2000,8),
1175                 }
1176         }, {
1177                 .mfr_id         = CFI_MFR_MACRONIX,
1178                 .dev_id         = MX29LV160B,
1179                 .name           = "MXIC MX29LV160B",
1180                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1181                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1182                 .dev_size       = SIZE_2MiB,
1183                 .cmd_set        = P_ID_AMD_STD,
1184                 .nr_regions     = 4,
1185                 .regions        = {
1186                         ERASEINFO(0x04000,1),
1187                         ERASEINFO(0x02000,2),
1188                         ERASEINFO(0x08000,1),
1189                         ERASEINFO(0x10000,31)
1190                 }
1191         }, {
1192                 .mfr_id         = CFI_MFR_MACRONIX,
1193                 .dev_id         = MX29F040,
1194                 .name           = "Macronix MX29F040",
1195                 .devtypes       = CFI_DEVICETYPE_X8,
1196                 .uaddr          = MTD_UADDR_0x0555_0x02AA,
1197                 .dev_size       = SIZE_512KiB,
1198                 .cmd_set        = P_ID_AMD_STD,
1199                 .nr_regions     = 1,
1200                 .regions        = {
1201                         ERASEINFO(0x10000,8),
1202                 }
1203         }, {
1204                 .mfr_id         = CFI_MFR_MACRONIX,
1205                 .dev_id         = MX29F016,
1206                 .name           = "Macronix MX29F016",
1207                 .devtypes       = CFI_DEVICETYPE_X8,
1208                 .uaddr          = MTD_UADDR_0x0555_0x02AA,
1209                 .dev_size       = SIZE_2MiB,
1210                 .cmd_set        = P_ID_AMD_STD,
1211                 .nr_regions     = 1,
1212                 .regions        = {
1213                         ERASEINFO(0x10000,32),
1214                 }
1215         }, {
1216                 .mfr_id         = CFI_MFR_MACRONIX,
1217                 .dev_id         = MX29F004T,
1218                 .name           = "Macronix MX29F004T",
1219                 .devtypes       = CFI_DEVICETYPE_X8,
1220                 .uaddr          = MTD_UADDR_0x0555_0x02AA,
1221                 .dev_size       = SIZE_512KiB,
1222                 .cmd_set        = P_ID_AMD_STD,
1223                 .nr_regions     = 4,
1224                 .regions        = {
1225                         ERASEINFO(0x10000,7),
1226                         ERASEINFO(0x08000,1),
1227                         ERASEINFO(0x02000,2),
1228                         ERASEINFO(0x04000,1),
1229                 }
1230         }, {
1231                 .mfr_id         = CFI_MFR_MACRONIX,
1232                 .dev_id         = MX29F004B,
1233                 .name           = "Macronix MX29F004B",
1234                 .devtypes       = CFI_DEVICETYPE_X8,
1235                 .uaddr          = MTD_UADDR_0x0555_0x02AA,
1236                 .dev_size       = SIZE_512KiB,
1237                 .cmd_set        = P_ID_AMD_STD,
1238                 .nr_regions     = 4,
1239                 .regions        = {
1240                         ERASEINFO(0x04000,1),
1241                         ERASEINFO(0x02000,2),
1242                         ERASEINFO(0x08000,1),
1243                         ERASEINFO(0x10000,7),
1244                 }
1245         }, {
1246                 .mfr_id         = CFI_MFR_MACRONIX,
1247                 .dev_id         = MX29F002T,
1248                 .name           = "Macronix MX29F002T",
1249                 .devtypes       = CFI_DEVICETYPE_X8,
1250                 .uaddr          = MTD_UADDR_0x0555_0x02AA,
1251                 .dev_size       = SIZE_256KiB,
1252                 .cmd_set        = P_ID_AMD_STD,
1253                 .nr_regions     = 4,
1254                 .regions        = {
1255                         ERASEINFO(0x10000,3),
1256                         ERASEINFO(0x08000,1),
1257                         ERASEINFO(0x02000,2),
1258                         ERASEINFO(0x04000,1),
1259                 }
1260         }, {
1261                 .mfr_id         = CFI_MFR_PMC,
1262                 .dev_id         = PM49FL002,
1263                 .name           = "PMC Pm49FL002",
1264                 .devtypes       = CFI_DEVICETYPE_X8,
1265                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1266                 .dev_size       = SIZE_256KiB,
1267                 .cmd_set        = P_ID_AMD_STD,
1268                 .nr_regions     = 1,
1269                 .regions        = {
1270                         ERASEINFO( 0x01000, 64 )
1271                 }
1272         }, {
1273                 .mfr_id         = CFI_MFR_PMC,
1274                 .dev_id         = PM49FL004,
1275                 .name           = "PMC Pm49FL004",
1276                 .devtypes       = CFI_DEVICETYPE_X8,
1277                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1278                 .dev_size       = SIZE_512KiB,
1279                 .cmd_set        = P_ID_AMD_STD,
1280                 .nr_regions     = 1,
1281                 .regions        = {
1282                         ERASEINFO( 0x01000, 128 )
1283                 }
1284         }, {
1285                 .mfr_id         = CFI_MFR_PMC,
1286                 .dev_id         = PM49FL008,
1287                 .name           = "PMC Pm49FL008",
1288                 .devtypes       = CFI_DEVICETYPE_X8,
1289                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1290                 .dev_size       = SIZE_1MiB,
1291                 .cmd_set        = P_ID_AMD_STD,
1292                 .nr_regions     = 1,
1293                 .regions        = {
1294                         ERASEINFO( 0x01000, 256 )
1295                 }
1296         }, {
1297                 .mfr_id         = CFI_MFR_SHARP,
1298                 .dev_id         = LH28F640BF,
1299                 .name           = "LH28F640BF",
1300                 .devtypes       = CFI_DEVICETYPE_X8,
1301                 .uaddr          = MTD_UADDR_UNNECESSARY,
1302                 .dev_size       = SIZE_4MiB,
1303                 .cmd_set        = P_ID_INTEL_STD,
1304                 .nr_regions     = 1,
1305                 .regions        = {
1306                         ERASEINFO(0x40000,16),
1307                 }
1308         }, {
1309                 .mfr_id         = CFI_MFR_SST,
1310                 .dev_id         = SST39LF512,
1311                 .name           = "SST 39LF512",
1312                 .devtypes       = CFI_DEVICETYPE_X8,
1313                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1314                 .dev_size       = SIZE_64KiB,
1315                 .cmd_set        = P_ID_AMD_STD,
1316                 .nr_regions     = 1,
1317                 .regions        = {
1318                         ERASEINFO(0x01000,16),
1319                 }
1320         }, {
1321                 .mfr_id         = CFI_MFR_SST,
1322                 .dev_id         = SST39LF010,
1323                 .name           = "SST 39LF010",
1324                 .devtypes       = CFI_DEVICETYPE_X8,
1325                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1326                 .dev_size       = SIZE_128KiB,
1327                 .cmd_set        = P_ID_AMD_STD,
1328                 .nr_regions     = 1,
1329                 .regions        = {
1330                         ERASEINFO(0x01000,32),
1331                 }
1332         }, {
1333                 .mfr_id         = CFI_MFR_SST,
1334                 .dev_id         = SST29EE020,
1335                 .name           = "SST 29EE020",
1336                 .devtypes       = CFI_DEVICETYPE_X8,
1337                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1338                 .dev_size       = SIZE_256KiB,
1339                 .cmd_set        = P_ID_SST_PAGE,
1340                 .nr_regions     = 1,
1341                 .regions = {ERASEINFO(0x01000,64),
1342                 }
1343         }, {
1344                 .mfr_id         = CFI_MFR_SST,
1345                 .dev_id         = SST29LE020,
1346                 .name           = "SST 29LE020",
1347                 .devtypes       = CFI_DEVICETYPE_X8,
1348                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1349                 .dev_size       = SIZE_256KiB,
1350                 .cmd_set        = P_ID_SST_PAGE,
1351                 .nr_regions     = 1,
1352                 .regions = {ERASEINFO(0x01000,64),
1353                 }
1354         }, {
1355                 .mfr_id         = CFI_MFR_SST,
1356                 .dev_id         = SST39LF020,
1357                 .name           = "SST 39LF020",
1358                 .devtypes       = CFI_DEVICETYPE_X8,
1359                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1360                 .dev_size       = SIZE_256KiB,
1361                 .cmd_set        = P_ID_AMD_STD,
1362                 .nr_regions     = 1,
1363                 .regions        = {
1364                         ERASEINFO(0x01000,64),
1365                 }
1366         }, {
1367                 .mfr_id         = CFI_MFR_SST,
1368                 .dev_id         = SST39LF040,
1369                 .name           = "SST 39LF040",
1370                 .devtypes       = CFI_DEVICETYPE_X8,
1371                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1372                 .dev_size       = SIZE_512KiB,
1373                 .cmd_set        = P_ID_AMD_STD,
1374                 .nr_regions     = 1,
1375                 .regions        = {
1376                         ERASEINFO(0x01000,128),
1377                 }
1378         }, {
1379                 .mfr_id         = CFI_MFR_SST,
1380                 .dev_id         = SST39SF010A,
1381                 .name           = "SST 39SF010A",
1382                 .devtypes       = CFI_DEVICETYPE_X8,
1383                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1384                 .dev_size       = SIZE_128KiB,
1385                 .cmd_set        = P_ID_AMD_STD,
1386                 .nr_regions     = 1,
1387                 .regions        = {
1388                         ERASEINFO(0x01000,32),
1389                 }
1390         }, {
1391                 .mfr_id         = CFI_MFR_SST,
1392                 .dev_id         = SST39SF020A,
1393                 .name           = "SST 39SF020A",
1394                 .devtypes       = CFI_DEVICETYPE_X8,
1395                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1396                 .dev_size       = SIZE_256KiB,
1397                 .cmd_set        = P_ID_AMD_STD,
1398                 .nr_regions     = 1,
1399                 .regions        = {
1400                         ERASEINFO(0x01000,64),
1401                 }
1402         }, {
1403                 .mfr_id         = CFI_MFR_SST,
1404                 .dev_id         = SST39SF040,
1405                 .name           = "SST 39SF040",
1406                 .devtypes       = CFI_DEVICETYPE_X8,
1407                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1408                 .dev_size       = SIZE_512KiB,
1409                 .cmd_set        = P_ID_AMD_STD,
1410                 .nr_regions     = 1,
1411                 .regions        = {
1412                         ERASEINFO(0x01000,128),
1413                 }
1414         }, {
1415                 .mfr_id         = CFI_MFR_SST,
1416                 .dev_id         = SST49LF040B,
1417                 .name           = "SST 49LF040B",
1418                 .devtypes       = CFI_DEVICETYPE_X8,
1419                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1420                 .dev_size       = SIZE_512KiB,
1421                 .cmd_set        = P_ID_AMD_STD,
1422                 .nr_regions     = 1,
1423                 .regions        = {
1424                         ERASEINFO(0x01000,128),
1425                 }
1426         }, {
1427
1428                 .mfr_id         = CFI_MFR_SST,
1429                 .dev_id         = SST49LF004B,
1430                 .name           = "SST 49LF004B",
1431                 .devtypes       = CFI_DEVICETYPE_X8,
1432                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1433                 .dev_size       = SIZE_512KiB,
1434                 .cmd_set        = P_ID_AMD_STD,
1435                 .nr_regions     = 1,
1436                 .regions        = {
1437                         ERASEINFO(0x01000,128),
1438                 }
1439         }, {
1440                 .mfr_id         = CFI_MFR_SST,
1441                 .dev_id         = SST49LF008A,
1442                 .name           = "SST 49LF008A",
1443                 .devtypes       = CFI_DEVICETYPE_X8,
1444                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1445                 .dev_size       = SIZE_1MiB,
1446                 .cmd_set        = P_ID_AMD_STD,
1447                 .nr_regions     = 1,
1448                 .regions        = {
1449                         ERASEINFO(0x01000,256),
1450                 }
1451         }, {
1452                 .mfr_id         = CFI_MFR_SST,
1453                 .dev_id         = SST49LF030A,
1454                 .name           = "SST 49LF030A",
1455                 .devtypes       = CFI_DEVICETYPE_X8,
1456                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1457                 .dev_size       = SIZE_512KiB,
1458                 .cmd_set        = P_ID_AMD_STD,
1459                 .nr_regions     = 1,
1460                 .regions        = {
1461                         ERASEINFO(0x01000,96),
1462                 }
1463         }, {
1464                 .mfr_id         = CFI_MFR_SST,
1465                 .dev_id         = SST49LF040A,
1466                 .name           = "SST 49LF040A",
1467                 .devtypes       = CFI_DEVICETYPE_X8,
1468                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1469                 .dev_size       = SIZE_512KiB,
1470                 .cmd_set        = P_ID_AMD_STD,
1471                 .nr_regions     = 1,
1472                 .regions        = {
1473                         ERASEINFO(0x01000,128),
1474                 }
1475         }, {
1476                 .mfr_id         = CFI_MFR_SST,
1477                 .dev_id         = SST49LF080A,
1478                 .name           = "SST 49LF080A",
1479                 .devtypes       = CFI_DEVICETYPE_X8,
1480                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1481                 .dev_size       = SIZE_1MiB,
1482                 .cmd_set        = P_ID_AMD_STD,
1483                 .nr_regions     = 1,
1484                 .regions        = {
1485                         ERASEINFO(0x01000,256),
1486                 }
1487         }, {
1488                 .mfr_id         = CFI_MFR_SST,     /* should be CFI */
1489                 .dev_id         = SST39LF160,
1490                 .name           = "SST 39LF160",
1491                 .devtypes       = CFI_DEVICETYPE_X16,
1492                 .uaddr          = MTD_UADDR_0xAAAA_0x5555,
1493                 .dev_size       = SIZE_2MiB,
1494                 .cmd_set        = P_ID_AMD_STD,
1495                 .nr_regions     = 2,
1496                 .regions        = {
1497                         ERASEINFO(0x1000,256),
1498                         ERASEINFO(0x1000,256)
1499                 }
1500         }, {
1501                 .mfr_id         = CFI_MFR_SST,     /* should be CFI */
1502                 .dev_id         = SST39VF1601,
1503                 .name           = "SST 39VF1601",
1504                 .devtypes       = CFI_DEVICETYPE_X16,
1505                 .uaddr          = MTD_UADDR_0xAAAA_0x5555,
1506                 .dev_size       = SIZE_2MiB,
1507                 .cmd_set        = P_ID_AMD_STD,
1508                 .nr_regions     = 2,
1509                 .regions        = {
1510                         ERASEINFO(0x1000,256),
1511                         ERASEINFO(0x1000,256)
1512                 }
1513         }, {
1514                 .mfr_id         = CFI_MFR_SST,     /* should be CFI */
1515                 .dev_id         = SST39VF3201,
1516                 .name           = "SST 39VF3201",
1517                 .devtypes       = CFI_DEVICETYPE_X16,
1518                 .uaddr          = MTD_UADDR_0xAAAA_0x5555,
1519                 .dev_size       = SIZE_4MiB,
1520                 .cmd_set        = P_ID_AMD_STD,
1521                 .nr_regions     = 4,
1522                 .regions        = {
1523                         ERASEINFO(0x1000,256),
1524                         ERASEINFO(0x1000,256),
1525                         ERASEINFO(0x1000,256),
1526                         ERASEINFO(0x1000,256)
1527                 }
1528         }, {
1529                 .mfr_id         = CFI_MFR_SST,
1530                 .dev_id         = SST36VF3203,
1531                 .name           = "SST 36VF3203",
1532                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1533                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1534                 .dev_size       = SIZE_4MiB,
1535                 .cmd_set        = P_ID_AMD_STD,
1536                 .nr_regions     = 1,
1537                 .regions        = {
1538                         ERASEINFO(0x10000,64),
1539                 }
1540         }, {
1541                 .mfr_id         = CFI_MFR_ST,
1542                 .dev_id         = M29F800AB,
1543                 .name           = "ST M29F800AB",
1544                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1545                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1546                 .dev_size       = SIZE_1MiB,
1547                 .cmd_set        = P_ID_AMD_STD,
1548                 .nr_regions     = 4,
1549                 .regions        = {
1550                         ERASEINFO(0x04000,1),
1551                         ERASEINFO(0x02000,2),
1552                         ERASEINFO(0x08000,1),
1553                         ERASEINFO(0x10000,15),
1554                 }
1555         }, {
1556                 .mfr_id         = CFI_MFR_ST,   /* FIXME - CFI device? */
1557                 .dev_id         = M29W800DT,
1558                 .name           = "ST M29W800DT",
1559                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1560                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1561                 .dev_size       = SIZE_1MiB,
1562                 .cmd_set        = P_ID_AMD_STD,
1563                 .nr_regions     = 4,
1564                 .regions        = {
1565                         ERASEINFO(0x10000,15),
1566                         ERASEINFO(0x08000,1),
1567                         ERASEINFO(0x02000,2),
1568                         ERASEINFO(0x04000,1)
1569                 }
1570         }, {
1571                 .mfr_id         = CFI_MFR_ST,   /* FIXME - CFI device? */
1572                 .dev_id         = M29W800DB,
1573                 .name           = "ST M29W800DB",
1574                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1575                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1576                 .dev_size       = SIZE_1MiB,
1577                 .cmd_set        = P_ID_AMD_STD,
1578                 .nr_regions     = 4,
1579                 .regions        = {
1580                         ERASEINFO(0x04000,1),
1581                         ERASEINFO(0x02000,2),
1582                         ERASEINFO(0x08000,1),
1583                         ERASEINFO(0x10000,15)
1584                 }
1585         },  {
1586                 .mfr_id         = CFI_MFR_ST,
1587                 .dev_id         = M29W400DT,
1588                 .name           = "ST M29W400DT",
1589                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1590                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1591                 .dev_size       = SIZE_512KiB,
1592                 .cmd_set        = P_ID_AMD_STD,
1593                 .nr_regions     = 4,
1594                 .regions        = {
1595                         ERASEINFO(0x04000,7),
1596                         ERASEINFO(0x02000,1),
1597                         ERASEINFO(0x08000,2),
1598                         ERASEINFO(0x10000,1)
1599                 }
1600         }, {
1601                 .mfr_id         = CFI_MFR_ST,
1602                 .dev_id         = M29W400DB,
1603                 .name           = "ST M29W400DB",
1604                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1605                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1606                 .dev_size       = SIZE_512KiB,
1607                 .cmd_set        = P_ID_AMD_STD,
1608                 .nr_regions     = 4,
1609                 .regions        = {
1610                         ERASEINFO(0x04000,1),
1611                         ERASEINFO(0x02000,2),
1612                         ERASEINFO(0x08000,1),
1613                         ERASEINFO(0x10000,7)
1614                 }
1615         }, {
1616                 .mfr_id         = CFI_MFR_ST,   /* FIXME - CFI device? */
1617                 .dev_id         = M29W160DT,
1618                 .name           = "ST M29W160DT",
1619                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1620                 .uaddr          = MTD_UADDR_0x0555_0x02AA,      /* ???? */
1621                 .dev_size       = SIZE_2MiB,
1622                 .cmd_set        = P_ID_AMD_STD,
1623                 .nr_regions     = 4,
1624                 .regions        = {
1625                         ERASEINFO(0x10000,31),
1626                         ERASEINFO(0x08000,1),
1627                         ERASEINFO(0x02000,2),
1628                         ERASEINFO(0x04000,1)
1629                 }
1630         }, {
1631                 .mfr_id         = CFI_MFR_ST,   /* FIXME - CFI device? */
1632                 .dev_id         = M29W160DB,
1633                 .name           = "ST M29W160DB",
1634                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1635                 .uaddr          = MTD_UADDR_0x0555_0x02AA,      /* ???? */
1636                 .dev_size       = SIZE_2MiB,
1637                 .cmd_set        = P_ID_AMD_STD,
1638                 .nr_regions     = 4,
1639                 .regions        = {
1640                         ERASEINFO(0x04000,1),
1641                         ERASEINFO(0x02000,2),
1642                         ERASEINFO(0x08000,1),
1643                         ERASEINFO(0x10000,31)
1644                 }
1645         }, {
1646                 .mfr_id         = CFI_MFR_ST,
1647                 .dev_id         = M29W040B,
1648                 .name           = "ST M29W040B",
1649                 .devtypes       = CFI_DEVICETYPE_X8,
1650                 .uaddr          = MTD_UADDR_0x0555_0x02AA,
1651                 .dev_size       = SIZE_512KiB,
1652                 .cmd_set        = P_ID_AMD_STD,
1653                 .nr_regions     = 1,
1654                 .regions        = {
1655                         ERASEINFO(0x10000,8),
1656                 }
1657         }, {
1658                 .mfr_id         = CFI_MFR_ST,
1659                 .dev_id         = M50FW040,
1660                 .name           = "ST M50FW040",
1661                 .devtypes       = CFI_DEVICETYPE_X8,
1662                 .uaddr          = MTD_UADDR_UNNECESSARY,
1663                 .dev_size       = SIZE_512KiB,
1664                 .cmd_set        = P_ID_INTEL_EXT,
1665                 .nr_regions     = 1,
1666                 .regions        = {
1667                         ERASEINFO(0x10000,8),
1668                 }
1669         }, {
1670                 .mfr_id         = CFI_MFR_ST,
1671                 .dev_id         = M50FW080,
1672                 .name           = "ST M50FW080",
1673                 .devtypes       = CFI_DEVICETYPE_X8,
1674                 .uaddr          = MTD_UADDR_UNNECESSARY,
1675                 .dev_size       = SIZE_1MiB,
1676                 .cmd_set        = P_ID_INTEL_EXT,
1677                 .nr_regions     = 1,
1678                 .regions        = {
1679                         ERASEINFO(0x10000,16),
1680                 }
1681         }, {
1682                 .mfr_id         = CFI_MFR_ST,
1683                 .dev_id         = M50FW016,
1684                 .name           = "ST M50FW016",
1685                 .devtypes       = CFI_DEVICETYPE_X8,
1686                 .uaddr          = MTD_UADDR_UNNECESSARY,
1687                 .dev_size       = SIZE_2MiB,
1688                 .cmd_set        = P_ID_INTEL_EXT,
1689                 .nr_regions     = 1,
1690                 .regions        = {
1691                         ERASEINFO(0x10000,32),
1692                 }
1693         }, {
1694                 .mfr_id         = CFI_MFR_ST,
1695                 .dev_id         = M50LPW080,
1696                 .name           = "ST M50LPW080",
1697                 .devtypes       = CFI_DEVICETYPE_X8,
1698                 .uaddr          = MTD_UADDR_UNNECESSARY,
1699                 .dev_size       = SIZE_1MiB,
1700                 .cmd_set        = P_ID_INTEL_EXT,
1701                 .nr_regions     = 1,
1702                 .regions        = {
1703                         ERASEINFO(0x10000,16),
1704                 },
1705         }, {
1706                 .mfr_id         = CFI_MFR_ST,
1707                 .dev_id         = M50FLW080A,
1708                 .name           = "ST M50FLW080A",
1709                 .devtypes       = CFI_DEVICETYPE_X8,
1710                 .uaddr          = MTD_UADDR_UNNECESSARY,
1711                 .dev_size       = SIZE_1MiB,
1712                 .cmd_set        = P_ID_INTEL_EXT,
1713                 .nr_regions     = 4,
1714                 .regions        = {
1715                         ERASEINFO(0x1000,16),
1716                         ERASEINFO(0x10000,13),
1717                         ERASEINFO(0x1000,16),
1718                         ERASEINFO(0x1000,16),
1719                 }
1720         }, {
1721                 .mfr_id         = CFI_MFR_ST,
1722                 .dev_id         = M50FLW080B,
1723                 .name           = "ST M50FLW080B",
1724                 .devtypes       = CFI_DEVICETYPE_X8,
1725                 .uaddr          = MTD_UADDR_UNNECESSARY,
1726                 .dev_size       = SIZE_1MiB,
1727                 .cmd_set        = P_ID_INTEL_EXT,
1728                 .nr_regions     = 4,
1729                 .regions        = {
1730                         ERASEINFO(0x1000,16),
1731                         ERASEINFO(0x1000,16),
1732                         ERASEINFO(0x10000,13),
1733                         ERASEINFO(0x1000,16),
1734                 }
1735         }, {
1736                 .mfr_id         = 0xff00 | CFI_MFR_ST,
1737                 .dev_id         = 0xff00 | PSD4256G6V,
1738                 .name           = "ST PSD4256G6V",
1739                 .devtypes       = CFI_DEVICETYPE_X16,
1740                 .uaddr          = MTD_UADDR_0x0AAA_0x0554,
1741                 .dev_size       = SIZE_1MiB,
1742                 .cmd_set        = P_ID_AMD_STD,
1743                 .nr_regions     = 1,
1744                 .regions        = {
1745                         ERASEINFO(0x10000,16),
1746                 }
1747         }, {
1748                 .mfr_id         = CFI_MFR_TOSHIBA,
1749                 .dev_id         = TC58FVT160,
1750                 .name           = "Toshiba TC58FVT160",
1751                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1752                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1753                 .dev_size       = SIZE_2MiB,
1754                 .cmd_set        = P_ID_AMD_STD,
1755                 .nr_regions     = 4,
1756                 .regions        = {
1757                         ERASEINFO(0x10000,31),
1758                         ERASEINFO(0x08000,1),
1759                         ERASEINFO(0x02000,2),
1760                         ERASEINFO(0x04000,1)
1761                 }
1762         }, {
1763                 .mfr_id         = CFI_MFR_TOSHIBA,
1764                 .dev_id         = TC58FVB160,
1765                 .name           = "Toshiba TC58FVB160",
1766                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1767                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1768                 .dev_size       = SIZE_2MiB,
1769                 .cmd_set        = P_ID_AMD_STD,
1770                 .nr_regions     = 4,
1771                 .regions        = {
1772                         ERASEINFO(0x04000,1),
1773                         ERASEINFO(0x02000,2),
1774                         ERASEINFO(0x08000,1),
1775                         ERASEINFO(0x10000,31)
1776                 }
1777         }, {
1778                 .mfr_id         = CFI_MFR_TOSHIBA,
1779                 .dev_id         = TC58FVB321,
1780                 .name           = "Toshiba TC58FVB321",
1781                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1782                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1783                 .dev_size       = SIZE_4MiB,
1784                 .cmd_set        = P_ID_AMD_STD,
1785                 .nr_regions     = 2,
1786                 .regions        = {
1787                         ERASEINFO(0x02000,8),
1788                         ERASEINFO(0x10000,63)
1789                 }
1790         }, {
1791                 .mfr_id         = CFI_MFR_TOSHIBA,
1792                 .dev_id         = TC58FVT321,
1793                 .name           = "Toshiba TC58FVT321",
1794                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1795                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1796                 .dev_size       = SIZE_4MiB,
1797                 .cmd_set        = P_ID_AMD_STD,
1798                 .nr_regions     = 2,
1799                 .regions        = {
1800                         ERASEINFO(0x10000,63),
1801                         ERASEINFO(0x02000,8)
1802                 }
1803         }, {
1804                 .mfr_id         = CFI_MFR_TOSHIBA,
1805                 .dev_id         = TC58FVB641,
1806                 .name           = "Toshiba TC58FVB641",
1807                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1808                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1809                 .dev_size       = SIZE_8MiB,
1810                 .cmd_set        = P_ID_AMD_STD,
1811                 .nr_regions     = 2,
1812                 .regions        = {
1813                         ERASEINFO(0x02000,8),
1814                         ERASEINFO(0x10000,127)
1815                 }
1816         }, {
1817                 .mfr_id         = CFI_MFR_TOSHIBA,
1818                 .dev_id         = TC58FVT641,
1819                 .name           = "Toshiba TC58FVT641",
1820                 .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1821                 .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1822                 .dev_size       = SIZE_8MiB,
1823                 .cmd_set        = P_ID_AMD_STD,
1824                 .nr_regions     = 2,
1825                 .regions        = {
1826                         ERASEINFO(0x10000,127),
1827                         ERASEINFO(0x02000,8)
1828                 }
1829         }, {
1830                 .mfr_id         = CFI_MFR_WINBOND,
1831                 .dev_id         = W49V002A,
1832                 .name           = "Winbond W49V002A",
1833                 .devtypes       = CFI_DEVICETYPE_X8,
1834                 .uaddr          = MTD_UADDR_0x5555_0x2AAA,
1835                 .dev_size       = SIZE_256KiB,
1836                 .cmd_set        = P_ID_AMD_STD,
1837                 .nr_regions     = 4,
1838                 .regions        = {
1839                         ERASEINFO(0x10000, 3),
1840                         ERASEINFO(0x08000, 1),
1841                         ERASEINFO(0x02000, 2),
1842                         ERASEINFO(0x04000, 1),
1843                 }
1844         }
1845 };
1846
1847 static inline u32 jedec_read_mfr(struct map_info *map, uint32_t base,
1848         struct cfi_private *cfi)
1849 {
1850         map_word result;
1851         unsigned long mask;
1852         int bank = 0;
1853
1854         /* According to JEDEC "Standard Manufacturer's Identification Code"
1855          * (http://www.jedec.org/download/search/jep106W.pdf)
1856          * several first banks can contain 0x7f instead of actual ID
1857          */
1858         do {
1859                 uint32_t ofs = cfi_build_cmd_addr(0 + (bank << 8), map, cfi);
1860                 mask = (1 << (cfi->device_type * 8)) - 1;
1861                 result = map_read(map, base + ofs);
1862                 bank++;
1863         } while ((result.x[0] & mask) == CFI_MFR_CONTINUATION);
1864
1865         return result.x[0] & mask;
1866 }
1867
1868 static inline u32 jedec_read_id(struct map_info *map, uint32_t base,
1869         struct cfi_private *cfi)
1870 {
1871         map_word result;
1872         unsigned long mask;
1873         u32 ofs = cfi_build_cmd_addr(1, map, cfi);
1874         mask = (1 << (cfi->device_type * 8)) -1;
1875         result = map_read(map, base + ofs);
1876         return result.x[0] & mask;
1877 }
1878
1879 static void jedec_reset(u32 base, struct map_info *map, struct cfi_private *cfi)
1880 {
1881         /* Reset */
1882
1883         /* after checking the datasheets for SST, MACRONIX and ATMEL
1884          * (oh and incidentaly the jedec spec - 3.5.3.3) the reset
1885          * sequence is *supposed* to be 0xaa at 0x5555, 0x55 at
1886          * 0x2aaa, 0xF0 at 0x5555 this will not affect the AMD chips
1887          * as they will ignore the writes and dont care what address
1888          * the F0 is written to */
1889         if (cfi->addr_unlock1) {
1890                 DEBUG( MTD_DEBUG_LEVEL3,
1891                        "reset unlock called %x %x \n",
1892                        cfi->addr_unlock1,cfi->addr_unlock2);
1893                 cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
1894                 cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL);
1895         }
1896
1897         cfi_send_gen_cmd(0xF0, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
1898         /* Some misdesigned Intel chips do not respond for 0xF0 for a reset,
1899          * so ensure we're in read mode.  Send both the Intel and the AMD command
1900          * for this.  Intel uses 0xff for this, AMD uses 0xff for NOP, so
1901          * this should be safe.
1902          */
1903         cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL);
1904         /* FIXME - should have reset delay before continuing */
1905 }
1906
1907
1908 static int cfi_jedec_setup(struct cfi_private *p_cfi, int index)
1909 {
1910         int i,num_erase_regions;
1911         uint8_t uaddr;
1912
1913         if (! (jedec_table[index].devtypes & p_cfi->device_type)) {
1914                 DEBUG(MTD_DEBUG_LEVEL1, "Rejecting potential %s with incompatible %d-bit device type\n",
1915                       jedec_table[index].name, 4 * (1<<p_cfi->device_type));
1916                 return 0;
1917         }
1918
1919         printk(KERN_INFO "Found: %s\n",jedec_table[index].name);
1920
1921         num_erase_regions = jedec_table[index].nr_regions;
1922
1923         p_cfi->cfiq = kmalloc(sizeof(struct cfi_ident) + num_erase_regions * 4, GFP_KERNEL);
1924         if (!p_cfi->cfiq) {
1925                 //xx printk(KERN_WARNING "%s: kmalloc failed for CFI ident structure\n", map->name);
1926                 return 0;
1927         }
1928
1929         memset(p_cfi->cfiq,0,sizeof(struct cfi_ident));
1930
1931         p_cfi->cfiq->P_ID = jedec_table[index].cmd_set;
1932         p_cfi->cfiq->NumEraseRegions = jedec_table[index].nr_regions;
1933         p_cfi->cfiq->DevSize = jedec_table[index].dev_size;
1934         p_cfi->cfi_mode = CFI_MODE_JEDEC;
1935
1936         for (i=0; i<num_erase_regions; i++){
1937                 p_cfi->cfiq->EraseRegionInfo[i] = jedec_table[index].regions[i];
1938         }
1939         p_cfi->cmdset_priv = NULL;
1940
1941         /* This may be redundant for some cases, but it doesn't hurt */
1942         p_cfi->mfr = jedec_table[index].mfr_id;
1943         p_cfi->id = jedec_table[index].dev_id;
1944
1945         uaddr = jedec_table[index].uaddr;
1946
1947         /* The table has unlock addresses in _bytes_, and we try not to let
1948            our brains explode when we see the datasheets talking about address
1949            lines numbered from A-1 to A18. The CFI table has unlock addresses
1950            in device-words according to the mode the device is connected in */
1951         p_cfi->addr_unlock1 = unlock_addrs[uaddr].addr1 / p_cfi->device_type;
1952         p_cfi->addr_unlock2 = unlock_addrs[uaddr].addr2 / p_cfi->device_type;
1953
1954         return 1;       /* ok */
1955 }
1956
1957
1958 /*
1959  * There is a BIG problem properly ID'ing the JEDEC device and guaranteeing
1960  * the mapped address, unlock addresses, and proper chip ID.  This function
1961  * attempts to minimize errors.  It is doubtfull that this probe will ever
1962  * be perfect - consequently there should be some module parameters that
1963  * could be manually specified to force the chip info.
1964  */
1965 static inline int jedec_match( uint32_t base,
1966                                struct map_info *map,
1967                                struct cfi_private *cfi,
1968                                const struct amd_flash_info *finfo )
1969 {
1970         int rc = 0;           /* failure until all tests pass */
1971         u32 mfr, id;
1972         uint8_t uaddr;
1973
1974         /*
1975          * The IDs must match.  For X16 and X32 devices operating in
1976          * a lower width ( X8 or X16 ), the device ID's are usually just
1977          * the lower byte(s) of the larger device ID for wider mode.  If
1978          * a part is found that doesn't fit this assumption (device id for
1979          * smaller width mode is completely unrealated to full-width mode)
1980          * then the jedec_table[] will have to be augmented with the IDs
1981          * for different widths.
1982          */
1983         switch (cfi->device_type) {
1984         case CFI_DEVICETYPE_X8:
1985                 mfr = (uint8_t)finfo->mfr_id;
1986                 id = (uint8_t)finfo->dev_id;
1987
1988                 /* bjd: it seems that if we do this, we can end up
1989                  * detecting 16bit flashes as an 8bit device, even though
1990                  * there aren't.
1991                  */
1992                 if (finfo->dev_id > 0xff) {
1993                         DEBUG( MTD_DEBUG_LEVEL3, "%s(): ID is not 8bit\n",
1994                                __func__);
1995                         goto match_done;
1996                 }
1997                 break;
1998         case CFI_DEVICETYPE_X16:
1999                 mfr = (uint16_t)finfo->mfr_id;
2000                 id = (uint16_t)finfo->dev_id;
2001                 break;
2002         case CFI_DEVICETYPE_X32:
2003                 mfr = (uint16_t)finfo->mfr_id;
2004                 id = (uint32_t)finfo->dev_id;
2005                 break;
2006         default:
2007                 printk(KERN_WARNING
2008                        "MTD %s(): Unsupported device type %d\n",
2009                        __func__, cfi->device_type);
2010                 goto match_done;
2011         }
2012         if ( cfi->mfr != mfr || cfi->id != id ) {
2013                 goto match_done;
2014         }
2015
2016         /* the part size must fit in the memory window */
2017         DEBUG( MTD_DEBUG_LEVEL3,
2018                "MTD %s(): Check fit 0x%.8x + 0x%.8x = 0x%.8x\n",
2019                __func__, base, 1 << finfo->dev_size, base + (1 << finfo->dev_size) );
2020         if ( base + cfi_interleave(cfi) * ( 1 << finfo->dev_size ) > map->size ) {
2021                 DEBUG( MTD_DEBUG_LEVEL3,
2022                        "MTD %s(): 0x%.4x 0x%.4x %dKiB doesn't fit\n",
2023                        __func__, finfo->mfr_id, finfo->dev_id,
2024                        1 << finfo->dev_size );
2025                 goto match_done;
2026         }
2027
2028         if (! (finfo->devtypes & cfi->device_type))
2029                 goto match_done;
2030
2031         uaddr = finfo->uaddr;
2032
2033         DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): check unlock addrs 0x%.4x 0x%.4x\n",
2034                __func__, cfi->addr_unlock1, cfi->addr_unlock2 );
2035         if ( MTD_UADDR_UNNECESSARY != uaddr && MTD_UADDR_DONT_CARE != uaddr
2036              && ( unlock_addrs[uaddr].addr1 / cfi->device_type != cfi->addr_unlock1 ||
2037                   unlock_addrs[uaddr].addr2 / cfi->device_type != cfi->addr_unlock2 ) ) {
2038                 DEBUG( MTD_DEBUG_LEVEL3,
2039                         "MTD %s(): 0x%.4x 0x%.4x did not match\n",
2040                         __func__,
2041                         unlock_addrs[uaddr].addr1,
2042                         unlock_addrs[uaddr].addr2);
2043                 goto match_done;
2044         }
2045
2046         /*
2047          * Make sure the ID's dissappear when the device is taken out of
2048          * ID mode.  The only time this should fail when it should succeed
2049          * is when the ID's are written as data to the same
2050          * addresses.  For this rare and unfortunate case the chip
2051          * cannot be probed correctly.
2052          * FIXME - write a driver that takes all of the chip info as
2053          * module parameters, doesn't probe but forces a load.
2054          */
2055         DEBUG( MTD_DEBUG_LEVEL3,
2056                "MTD %s(): check ID's disappear when not in ID mode\n",
2057                __func__ );
2058         jedec_reset( base, map, cfi );
2059         mfr = jedec_read_mfr( map, base, cfi );
2060         id = jedec_read_id( map, base, cfi );
2061         if ( mfr == cfi->mfr && id == cfi->id ) {
2062                 DEBUG( MTD_DEBUG_LEVEL3,
2063                        "MTD %s(): ID 0x%.2x:0x%.2x did not change after reset:\n"
2064                        "You might need to manually specify JEDEC parameters.\n",
2065                         __func__, cfi->mfr, cfi->id );
2066                 goto match_done;
2067         }
2068
2069         /* all tests passed - mark  as success */
2070         rc = 1;
2071
2072         /*
2073          * Put the device back in ID mode - only need to do this if we
2074          * were truly frobbing a real device.
2075          */
2076         DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): return to ID mode\n", __func__ );
2077         if (cfi->addr_unlock1) {
2078                 cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
2079                 cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL);
2080         }
2081         cfi_send_gen_cmd(0x90, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
2082         /* FIXME - should have a delay before continuing */
2083
2084  match_done:
2085         return rc;
2086 }
2087
2088
2089 static int jedec_probe_chip(struct map_info *map, __u32 base,
2090                             unsigned long *chip_map, struct cfi_private *cfi)
2091 {
2092         int i;
2093         enum uaddr uaddr_idx = MTD_UADDR_NOT_SUPPORTED;
2094         u32 probe_offset1, probe_offset2;
2095
2096  retry:
2097         if (!cfi->numchips) {
2098                 uaddr_idx++;
2099
2100                 if (MTD_UADDR_UNNECESSARY == uaddr_idx)
2101                         return 0;
2102
2103                 cfi->addr_unlock1 = unlock_addrs[uaddr_idx].addr1 / cfi->device_type;
2104                 cfi->addr_unlock2 = unlock_addrs[uaddr_idx].addr2 / cfi->device_type;
2105         }
2106
2107         /* Make certain we aren't probing past the end of map */
2108         if (base >= map->size) {
2109                 printk(KERN_NOTICE
2110                         "Probe at base(0x%08x) past the end of the map(0x%08lx)\n",
2111                         base, map->size -1);
2112                 return 0;
2113
2114         }
2115         /* Ensure the unlock addresses we try stay inside the map */
2116         probe_offset1 = cfi_build_cmd_addr(cfi->addr_unlock1, map, cfi);
2117         probe_offset2 = cfi_build_cmd_addr(cfi->addr_unlock2, map, cfi);
2118         if (    ((base + probe_offset1 + map_bankwidth(map)) >= map->size) ||
2119                 ((base + probe_offset2 + map_bankwidth(map)) >= map->size))
2120                 goto retry;
2121
2122         /* Reset */
2123         jedec_reset(base, map, cfi);
2124
2125         /* Autoselect Mode */
2126         if(cfi->addr_unlock1) {
2127                 cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
2128                 cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL);
2129         }
2130         cfi_send_gen_cmd(0x90, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
2131         /* FIXME - should have a delay before continuing */
2132
2133         if (!cfi->numchips) {
2134                 /* This is the first time we're called. Set up the CFI
2135                    stuff accordingly and return */
2136
2137                 cfi->mfr = jedec_read_mfr(map, base, cfi);
2138                 cfi->id = jedec_read_id(map, base, cfi);
2139                 DEBUG(MTD_DEBUG_LEVEL3,
2140                       "Search for id:(%02x %02x) interleave(%d) type(%d)\n",
2141                         cfi->mfr, cfi->id, cfi_interleave(cfi), cfi->device_type);
2142                 for (i = 0; i < ARRAY_SIZE(jedec_table); i++) {
2143                         if ( jedec_match( base, map, cfi, &jedec_table[i] ) ) {
2144                                 DEBUG( MTD_DEBUG_LEVEL3,
2145                                        "MTD %s(): matched device 0x%x,0x%x unlock_addrs: 0x%.4x 0x%.4x\n",
2146                                        __func__, cfi->mfr, cfi->id,
2147                                        cfi->addr_unlock1, cfi->addr_unlock2 );
2148                                 if (!cfi_jedec_setup(cfi, i))
2149                                         return 0;
2150                                 goto ok_out;
2151                         }
2152                 }
2153                 goto retry;
2154         } else {
2155                 uint16_t mfr;
2156                 uint16_t id;
2157
2158                 /* Make sure it is a chip of the same manufacturer and id */
2159                 mfr = jedec_read_mfr(map, base, cfi);
2160                 id = jedec_read_id(map, base, cfi);
2161
2162                 if ((mfr != cfi->mfr) || (id != cfi->id)) {
2163                         printk(KERN_DEBUG "%s: Found different chip or no chip at all (mfr 0x%x, id 0x%x) at 0x%x\n",
2164                                map->name, mfr, id, base);
2165                         jedec_reset(base, map, cfi);
2166                         return 0;
2167                 }
2168         }
2169
2170         /* Check each previous chip locations to see if it's an alias */
2171         for (i=0; i < (base >> cfi->chipshift); i++) {
2172                 unsigned long start;
2173                 if(!test_bit(i, chip_map)) {
2174                         continue; /* Skip location; no valid chip at this address */
2175                 }
2176                 start = i << cfi->chipshift;
2177                 if (jedec_read_mfr(map, start, cfi) == cfi->mfr &&
2178                     jedec_read_id(map, start, cfi) == cfi->id) {
2179                         /* Eep. This chip also looks like it's in autoselect mode.
2180                            Is it an alias for the new one? */
2181                         jedec_reset(start, map, cfi);
2182
2183                         /* If the device IDs go away, it's an alias */
2184                         if (jedec_read_mfr(map, base, cfi) != cfi->mfr ||
2185                             jedec_read_id(map, base, cfi) != cfi->id) {
2186                                 printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
2187                                        map->name, base, start);
2188                                 return 0;
2189                         }
2190
2191                         /* Yes, it's actually got the device IDs as data. Most
2192                          * unfortunate. Stick the new chip in read mode
2193                          * too and if it's the same, assume it's an alias. */
2194                         /* FIXME: Use other modes to do a proper check */
2195                         jedec_reset(base, map, cfi);
2196                         if (jedec_read_mfr(map, base, cfi) == cfi->mfr &&
2197                             jedec_read_id(map, base, cfi) == cfi->id) {
2198                                 printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
2199                                        map->name, base, start);
2200                                 return 0;
2201                         }
2202                 }
2203         }
2204
2205         /* OK, if we got to here, then none of the previous chips appear to
2206            be aliases for the current one. */
2207         set_bit((base >> cfi->chipshift), chip_map); /* Update chip map */
2208         cfi->numchips++;
2209
2210 ok_out:
2211         /* Put it back into Read Mode */
2212         jedec_reset(base, map, cfi);
2213
2214         printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank\n",
2215                map->name, cfi_interleave(cfi), cfi->device_type*8, base,
2216                map->bankwidth*8);
2217
2218         return 1;
2219 }
2220
2221 static struct chip_probe jedec_chip_probe = {
2222         .name = "JEDEC",
2223         .probe_chip = jedec_probe_chip
2224 };
2225
2226 static struct mtd_info *jedec_probe(struct map_info *map)
2227 {
2228         /*
2229          * Just use the generic probe stuff to call our CFI-specific
2230          * chip_probe routine in all the possible permutations, etc.
2231          */
2232         return mtd_do_chip_probe(map, &jedec_chip_probe);
2233 }
2234
2235 static struct mtd_chip_driver jedec_chipdrv = {
2236         .probe  = jedec_probe,
2237         .name   = "jedec_probe",
2238         .module = THIS_MODULE
2239 };
2240
2241 static int __init jedec_probe_init(void)
2242 {
2243         register_mtd_chip_driver(&jedec_chipdrv);
2244         return 0;
2245 }
2246
2247 static void __exit jedec_probe_exit(void)
2248 {
2249         unregister_mtd_chip_driver(&jedec_chipdrv);
2250 }
2251
2252 module_init(jedec_probe_init);
2253 module_exit(jedec_probe_exit);
2254
2255 MODULE_LICENSE("GPL");
2256 MODULE_AUTHOR("Erwin Authried <eauth@softsys.co.at> et al.");
2257 MODULE_DESCRIPTION("Probe code for JEDEC-compliant flash chips");