1 /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
3 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or (at
8 * your option) any later version.
10 * Thanks to the following companies for their support:
12 * - JMicron (hardware and technical support)
15 #include <linux/delay.h>
16 #include <linux/highmem.h>
17 #include <linux/pci.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/slab.h>
20 #include <linux/device.h>
21 #include <linux/mmc/host.h>
22 #include <linux/scatterlist.h>
31 #define PCI_SDHCI_IFPIO 0x00
32 #define PCI_SDHCI_IFDMA 0x01
33 #define PCI_SDHCI_IFVENDOR 0x02
35 #define PCI_SLOT_INFO 0x40 /* 8 bits */
36 #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
37 #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
41 struct sdhci_pci_chip;
42 struct sdhci_pci_slot;
44 struct sdhci_pci_fixes {
47 int (*probe) (struct sdhci_pci_chip *);
49 int (*probe_slot) (struct sdhci_pci_slot *);
50 void (*remove_slot) (struct sdhci_pci_slot *, int);
52 int (*suspend) (struct sdhci_pci_chip *,
54 int (*resume) (struct sdhci_pci_chip *);
57 struct sdhci_pci_slot {
58 struct sdhci_pci_chip *chip;
59 struct sdhci_host *host;
64 struct sdhci_pci_chip {
68 const struct sdhci_pci_fixes *fixes;
70 int num_slots; /* Slots on controller */
71 struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */
75 /*****************************************************************************\
77 * Hardware specific quirk handling *
79 \*****************************************************************************/
81 static int ricoh_probe(struct sdhci_pci_chip *chip)
83 if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
84 chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
85 chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
89 static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot)
92 ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT)
93 & SDHCI_TIMEOUT_CLK_MASK) |
95 ((0x21 << SDHCI_CLOCK_BASE_SHIFT)
96 & SDHCI_CLOCK_BASE_MASK) |
98 SDHCI_TIMEOUT_CLK_UNIT |
104 static int ricoh_mmc_resume(struct sdhci_pci_chip *chip)
106 /* Apply a delay to allow controller to settle */
107 /* Otherwise it becomes confused if card state changed
113 static const struct sdhci_pci_fixes sdhci_ricoh = {
114 .probe = ricoh_probe,
115 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
116 SDHCI_QUIRK_FORCE_DMA |
117 SDHCI_QUIRK_CLOCK_BEFORE_RESET,
120 static const struct sdhci_pci_fixes sdhci_ricoh_mmc = {
121 .probe_slot = ricoh_mmc_probe_slot,
122 .resume = ricoh_mmc_resume,
123 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
124 SDHCI_QUIRK_CLOCK_BEFORE_RESET |
125 SDHCI_QUIRK_NO_CARD_NO_RESET |
126 SDHCI_QUIRK_MISSING_CAPS
129 static const struct sdhci_pci_fixes sdhci_ene_712 = {
130 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
131 SDHCI_QUIRK_BROKEN_DMA,
134 static const struct sdhci_pci_fixes sdhci_ene_714 = {
135 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
136 SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
137 SDHCI_QUIRK_BROKEN_DMA,
140 static const struct sdhci_pci_fixes sdhci_cafe = {
141 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
142 SDHCI_QUIRK_NO_BUSY_IRQ |
143 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
146 static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot)
148 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
153 * ADMA operation is disabled for Moorestown platform due to
156 static int mrst_hc_probe(struct sdhci_pci_chip *chip)
159 * slots number is fixed here for MRST as SDIO3/5 are never used and
160 * have hardware bugs.
166 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = {
167 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
168 .probe_slot = mrst_hc_probe_slot,
171 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = {
172 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
173 .probe = mrst_hc_probe,
176 static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = {
177 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
180 static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc_sdio = {
181 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
184 /* O2Micro extra registers */
185 #define O2_SD_LOCK_WP 0xD3
186 #define O2_SD_MULTI_VCC3V 0xEE
187 #define O2_SD_CLKREQ 0xEC
188 #define O2_SD_CAPS 0xE0
189 #define O2_SD_ADMA1 0xE2
190 #define O2_SD_ADMA2 0xE7
191 #define O2_SD_INF_MOD 0xF1
193 static int o2_probe(struct sdhci_pci_chip *chip)
198 switch (chip->pdev->device) {
199 case PCI_DEVICE_ID_O2_8220:
200 case PCI_DEVICE_ID_O2_8221:
201 case PCI_DEVICE_ID_O2_8320:
202 case PCI_DEVICE_ID_O2_8321:
203 /* This extra setup is required due to broken ADMA. */
204 ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
208 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
210 /* Set Multi 3 to VCC3V# */
211 pci_write_config_byte(chip->pdev, O2_SD_MULTI_VCC3V, 0x08);
213 /* Disable CLK_REQ# support after media DET */
214 ret = pci_read_config_byte(chip->pdev, O2_SD_CLKREQ, &scratch);
218 pci_write_config_byte(chip->pdev, O2_SD_CLKREQ, scratch);
220 /* Choose capabilities, enable SDMA. We have to write 0x01
221 * to the capabilities register first to unlock it.
223 ret = pci_read_config_byte(chip->pdev, O2_SD_CAPS, &scratch);
227 pci_write_config_byte(chip->pdev, O2_SD_CAPS, scratch);
228 pci_write_config_byte(chip->pdev, O2_SD_CAPS, 0x73);
230 /* Disable ADMA1/2 */
231 pci_write_config_byte(chip->pdev, O2_SD_ADMA1, 0x39);
232 pci_write_config_byte(chip->pdev, O2_SD_ADMA2, 0x08);
234 /* Disable the infinite transfer mode */
235 ret = pci_read_config_byte(chip->pdev, O2_SD_INF_MOD, &scratch);
239 pci_write_config_byte(chip->pdev, O2_SD_INF_MOD, scratch);
242 ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
246 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
252 static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
257 ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
262 * Turn PMOS on [bit 0], set over current detection to 2.4 V
263 * [bit 1:2] and enable over current debouncing [bit 6].
270 ret = pci_write_config_byte(chip->pdev, 0xAE, scratch);
277 static int jmicron_probe(struct sdhci_pci_chip *chip)
282 if (chip->pdev->revision == 0) {
283 chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
284 SDHCI_QUIRK_32BIT_DMA_SIZE |
285 SDHCI_QUIRK_32BIT_ADMA_SIZE |
286 SDHCI_QUIRK_RESET_AFTER_REQUEST |
287 SDHCI_QUIRK_BROKEN_SMALL_PIO;
291 * JMicron chips can have two interfaces to the same hardware
292 * in order to work around limitations in Microsoft's driver.
293 * We need to make sure we only bind to one of them.
295 * This code assumes two things:
297 * 1. The PCI code adds subfunctions in order.
299 * 2. The MMC interface has a lower subfunction number
300 * than the SD interface.
302 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD)
303 mmcdev = PCI_DEVICE_ID_JMICRON_JMB38X_MMC;
304 else if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD)
305 mmcdev = PCI_DEVICE_ID_JMICRON_JMB388_ESD;
308 struct pci_dev *sd_dev;
311 while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
312 mmcdev, sd_dev)) != NULL) {
313 if ((PCI_SLOT(chip->pdev->devfn) ==
314 PCI_SLOT(sd_dev->devfn)) &&
315 (chip->pdev->bus == sd_dev->bus))
321 dev_info(&chip->pdev->dev, "Refusing to bind to "
322 "secondary interface.\n");
328 * JMicron chips need a bit of a nudge to enable the power
331 ret = jmicron_pmos(chip, 1);
333 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
337 /* quirk for unsable RO-detection on JM388 chips */
338 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD ||
339 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
340 chip->quirks |= SDHCI_QUIRK_UNSTABLE_RO_DETECT;
345 static void jmicron_enable_mmc(struct sdhci_host *host, int on)
349 scratch = readb(host->ioaddr + 0xC0);
356 writeb(scratch, host->ioaddr + 0xC0);
359 static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
361 if (slot->chip->pdev->revision == 0) {
364 version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
365 version = (version & SDHCI_VENDOR_VER_MASK) >>
366 SDHCI_VENDOR_VER_SHIFT;
369 * Older versions of the chip have lots of nasty glitches
370 * in the ADMA engine. It's best just to avoid it
374 slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
377 /* JM388 MMC doesn't support 1.8V while SD supports it */
378 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
379 slot->host->ocr_avail_sd = MMC_VDD_32_33 | MMC_VDD_33_34 |
380 MMC_VDD_29_30 | MMC_VDD_30_31 |
381 MMC_VDD_165_195; /* allow 1.8V */
382 slot->host->ocr_avail_mmc = MMC_VDD_32_33 | MMC_VDD_33_34 |
383 MMC_VDD_29_30 | MMC_VDD_30_31; /* no 1.8V for MMC */
387 * The secondary interface requires a bit set to get the
390 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
391 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
392 jmicron_enable_mmc(slot->host, 1);
394 slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST;
399 static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
404 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
405 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
406 jmicron_enable_mmc(slot->host, 0);
409 static int jmicron_suspend(struct sdhci_pci_chip *chip, pm_message_t state)
413 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
414 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
415 for (i = 0; i < chip->num_slots; i++)
416 jmicron_enable_mmc(chip->slots[i]->host, 0);
422 static int jmicron_resume(struct sdhci_pci_chip *chip)
426 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
427 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
428 for (i = 0; i < chip->num_slots; i++)
429 jmicron_enable_mmc(chip->slots[i]->host, 1);
432 ret = jmicron_pmos(chip, 1);
434 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
441 static const struct sdhci_pci_fixes sdhci_o2 = {
445 static const struct sdhci_pci_fixes sdhci_jmicron = {
446 .probe = jmicron_probe,
448 .probe_slot = jmicron_probe_slot,
449 .remove_slot = jmicron_remove_slot,
451 .suspend = jmicron_suspend,
452 .resume = jmicron_resume,
455 /* SysKonnect CardBus2SDIO extra registers */
456 #define SYSKT_CTRL 0x200
457 #define SYSKT_RDFIFO_STAT 0x204
458 #define SYSKT_WRFIFO_STAT 0x208
459 #define SYSKT_POWER_DATA 0x20c
460 #define SYSKT_POWER_330 0xef
461 #define SYSKT_POWER_300 0xf8
462 #define SYSKT_POWER_184 0xcc
463 #define SYSKT_POWER_CMD 0x20d
464 #define SYSKT_POWER_START (1 << 7)
465 #define SYSKT_POWER_STATUS 0x20e
466 #define SYSKT_POWER_STATUS_OK (1 << 0)
467 #define SYSKT_BOARD_REV 0x210
468 #define SYSKT_CHIP_REV 0x211
469 #define SYSKT_CONF_DATA 0x212
470 #define SYSKT_CONF_DATA_1V8 (1 << 2)
471 #define SYSKT_CONF_DATA_2V5 (1 << 1)
472 #define SYSKT_CONF_DATA_3V3 (1 << 0)
474 static int syskt_probe(struct sdhci_pci_chip *chip)
476 if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
477 chip->pdev->class &= ~0x0000FF;
478 chip->pdev->class |= PCI_SDHCI_IFDMA;
483 static int syskt_probe_slot(struct sdhci_pci_slot *slot)
487 u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV);
488 u8 chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV);
489 dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, "
490 "board rev %d.%d, chip rev %d.%d\n",
491 board_rev >> 4, board_rev & 0xf,
492 chip_rev >> 4, chip_rev & 0xf);
493 if (chip_rev >= 0x20)
494 slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA;
496 writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA);
497 writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD);
499 tm = 10; /* Wait max 1 ms */
501 ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS);
502 if (ps & SYSKT_POWER_STATUS_OK)
507 dev_err(&slot->chip->pdev->dev,
508 "power regulator never stabilized");
509 writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD);
516 static const struct sdhci_pci_fixes sdhci_syskt = {
517 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER,
518 .probe = syskt_probe,
519 .probe_slot = syskt_probe_slot,
522 static int via_probe(struct sdhci_pci_chip *chip)
524 if (chip->pdev->revision == 0x10)
525 chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
530 static const struct sdhci_pci_fixes sdhci_via = {
534 static const struct pci_device_id pci_ids[] __devinitdata = {
536 .vendor = PCI_VENDOR_ID_RICOH,
537 .device = PCI_DEVICE_ID_RICOH_R5C822,
538 .subvendor = PCI_ANY_ID,
539 .subdevice = PCI_ANY_ID,
540 .driver_data = (kernel_ulong_t)&sdhci_ricoh,
544 .vendor = PCI_VENDOR_ID_RICOH,
546 .subvendor = PCI_ANY_ID,
547 .subdevice = PCI_ANY_ID,
548 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
552 .vendor = PCI_VENDOR_ID_RICOH,
554 .subvendor = PCI_ANY_ID,
555 .subdevice = PCI_ANY_ID,
556 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
560 .vendor = PCI_VENDOR_ID_RICOH,
562 .subvendor = PCI_ANY_ID,
563 .subdevice = PCI_ANY_ID,
564 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
568 .vendor = PCI_VENDOR_ID_ENE,
569 .device = PCI_DEVICE_ID_ENE_CB712_SD,
570 .subvendor = PCI_ANY_ID,
571 .subdevice = PCI_ANY_ID,
572 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
576 .vendor = PCI_VENDOR_ID_ENE,
577 .device = PCI_DEVICE_ID_ENE_CB712_SD_2,
578 .subvendor = PCI_ANY_ID,
579 .subdevice = PCI_ANY_ID,
580 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
584 .vendor = PCI_VENDOR_ID_ENE,
585 .device = PCI_DEVICE_ID_ENE_CB714_SD,
586 .subvendor = PCI_ANY_ID,
587 .subdevice = PCI_ANY_ID,
588 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
592 .vendor = PCI_VENDOR_ID_ENE,
593 .device = PCI_DEVICE_ID_ENE_CB714_SD_2,
594 .subvendor = PCI_ANY_ID,
595 .subdevice = PCI_ANY_ID,
596 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
600 .vendor = PCI_VENDOR_ID_MARVELL,
601 .device = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
602 .subvendor = PCI_ANY_ID,
603 .subdevice = PCI_ANY_ID,
604 .driver_data = (kernel_ulong_t)&sdhci_cafe,
608 .vendor = PCI_VENDOR_ID_JMICRON,
609 .device = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
610 .subvendor = PCI_ANY_ID,
611 .subdevice = PCI_ANY_ID,
612 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
616 .vendor = PCI_VENDOR_ID_JMICRON,
617 .device = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
618 .subvendor = PCI_ANY_ID,
619 .subdevice = PCI_ANY_ID,
620 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
624 .vendor = PCI_VENDOR_ID_JMICRON,
625 .device = PCI_DEVICE_ID_JMICRON_JMB388_SD,
626 .subvendor = PCI_ANY_ID,
627 .subdevice = PCI_ANY_ID,
628 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
632 .vendor = PCI_VENDOR_ID_JMICRON,
633 .device = PCI_DEVICE_ID_JMICRON_JMB388_ESD,
634 .subvendor = PCI_ANY_ID,
635 .subdevice = PCI_ANY_ID,
636 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
640 .vendor = PCI_VENDOR_ID_SYSKONNECT,
642 .subvendor = PCI_ANY_ID,
643 .subdevice = PCI_ANY_ID,
644 .driver_data = (kernel_ulong_t)&sdhci_syskt,
648 .vendor = PCI_VENDOR_ID_VIA,
650 .subvendor = PCI_ANY_ID,
651 .subdevice = PCI_ANY_ID,
652 .driver_data = (kernel_ulong_t)&sdhci_via,
656 .vendor = PCI_VENDOR_ID_INTEL,
657 .device = PCI_DEVICE_ID_INTEL_MRST_SD0,
658 .subvendor = PCI_ANY_ID,
659 .subdevice = PCI_ANY_ID,
660 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc0,
664 .vendor = PCI_VENDOR_ID_INTEL,
665 .device = PCI_DEVICE_ID_INTEL_MRST_SD1,
666 .subvendor = PCI_ANY_ID,
667 .subdevice = PCI_ANY_ID,
668 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
672 .vendor = PCI_VENDOR_ID_INTEL,
673 .device = PCI_DEVICE_ID_INTEL_MRST_SD2,
674 .subvendor = PCI_ANY_ID,
675 .subdevice = PCI_ANY_ID,
676 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
680 .vendor = PCI_VENDOR_ID_INTEL,
681 .device = PCI_DEVICE_ID_INTEL_MFD_SD,
682 .subvendor = PCI_ANY_ID,
683 .subdevice = PCI_ANY_ID,
684 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sd,
688 .vendor = PCI_VENDOR_ID_INTEL,
689 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO1,
690 .subvendor = PCI_ANY_ID,
691 .subdevice = PCI_ANY_ID,
692 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc_sdio,
696 .vendor = PCI_VENDOR_ID_INTEL,
697 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO2,
698 .subvendor = PCI_ANY_ID,
699 .subdevice = PCI_ANY_ID,
700 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc_sdio,
704 .vendor = PCI_VENDOR_ID_INTEL,
705 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC0,
706 .subvendor = PCI_ANY_ID,
707 .subdevice = PCI_ANY_ID,
708 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc_sdio,
712 .vendor = PCI_VENDOR_ID_INTEL,
713 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC1,
714 .subvendor = PCI_ANY_ID,
715 .subdevice = PCI_ANY_ID,
716 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc_sdio,
720 .vendor = PCI_VENDOR_ID_O2,
721 .device = PCI_DEVICE_ID_O2_8120,
722 .subvendor = PCI_ANY_ID,
723 .subdevice = PCI_ANY_ID,
724 .driver_data = (kernel_ulong_t)&sdhci_o2,
728 .vendor = PCI_VENDOR_ID_O2,
729 .device = PCI_DEVICE_ID_O2_8220,
730 .subvendor = PCI_ANY_ID,
731 .subdevice = PCI_ANY_ID,
732 .driver_data = (kernel_ulong_t)&sdhci_o2,
736 .vendor = PCI_VENDOR_ID_O2,
737 .device = PCI_DEVICE_ID_O2_8221,
738 .subvendor = PCI_ANY_ID,
739 .subdevice = PCI_ANY_ID,
740 .driver_data = (kernel_ulong_t)&sdhci_o2,
744 .vendor = PCI_VENDOR_ID_O2,
745 .device = PCI_DEVICE_ID_O2_8320,
746 .subvendor = PCI_ANY_ID,
747 .subdevice = PCI_ANY_ID,
748 .driver_data = (kernel_ulong_t)&sdhci_o2,
752 .vendor = PCI_VENDOR_ID_O2,
753 .device = PCI_DEVICE_ID_O2_8321,
754 .subvendor = PCI_ANY_ID,
755 .subdevice = PCI_ANY_ID,
756 .driver_data = (kernel_ulong_t)&sdhci_o2,
759 { /* Generic SD host controller */
760 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
763 { /* end: all zeroes */ },
766 MODULE_DEVICE_TABLE(pci, pci_ids);
768 /*****************************************************************************\
770 * SDHCI core callbacks *
772 \*****************************************************************************/
774 static int sdhci_pci_enable_dma(struct sdhci_host *host)
776 struct sdhci_pci_slot *slot;
777 struct pci_dev *pdev;
780 slot = sdhci_priv(host);
781 pdev = slot->chip->pdev;
783 if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
784 ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
785 (host->flags & SDHCI_USE_SDMA)) {
786 dev_warn(&pdev->dev, "Will use DMA mode even though HW "
787 "doesn't fully claim to support it.\n");
790 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
794 pci_set_master(pdev);
799 static int sdhci_pci_8bit_width(struct sdhci_host *host, int width)
803 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
806 case MMC_BUS_WIDTH_8:
807 ctrl |= SDHCI_CTRL_8BITBUS;
808 ctrl &= ~SDHCI_CTRL_4BITBUS;
810 case MMC_BUS_WIDTH_4:
811 ctrl |= SDHCI_CTRL_4BITBUS;
812 ctrl &= ~SDHCI_CTRL_8BITBUS;
815 ctrl &= ~(SDHCI_CTRL_8BITBUS | SDHCI_CTRL_4BITBUS);
819 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
824 static struct sdhci_ops sdhci_pci_ops = {
825 .enable_dma = sdhci_pci_enable_dma,
826 .platform_8bit_width = sdhci_pci_8bit_width,
829 /*****************************************************************************\
833 \*****************************************************************************/
837 static int sdhci_pci_suspend(struct pci_dev *pdev, pm_message_t state)
839 struct sdhci_pci_chip *chip;
840 struct sdhci_pci_slot *slot;
841 mmc_pm_flag_t slot_pm_flags;
842 mmc_pm_flag_t pm_flags = 0;
845 chip = pci_get_drvdata(pdev);
849 for (i = 0; i < chip->num_slots; i++) {
850 slot = chip->slots[i];
854 ret = sdhci_suspend_host(slot->host, state);
857 for (i--; i >= 0; i--)
858 sdhci_resume_host(chip->slots[i]->host);
862 slot_pm_flags = slot->host->mmc->pm_flags;
863 if (slot_pm_flags & MMC_PM_WAKE_SDIO_IRQ)
864 sdhci_enable_irq_wakeups(slot->host);
866 pm_flags |= slot_pm_flags;
869 if (chip->fixes && chip->fixes->suspend) {
870 ret = chip->fixes->suspend(chip, state);
872 for (i = chip->num_slots - 1; i >= 0; i--)
873 sdhci_resume_host(chip->slots[i]->host);
878 pci_save_state(pdev);
879 if (pm_flags & MMC_PM_KEEP_POWER) {
880 if (pm_flags & MMC_PM_WAKE_SDIO_IRQ) {
881 pci_pme_active(pdev, true);
882 pci_enable_wake(pdev, PCI_D3hot, 1);
884 pci_set_power_state(pdev, PCI_D3hot);
886 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
887 pci_disable_device(pdev);
888 pci_set_power_state(pdev, pci_choose_state(pdev, state));
894 static int sdhci_pci_resume(struct pci_dev *pdev)
896 struct sdhci_pci_chip *chip;
897 struct sdhci_pci_slot *slot;
900 chip = pci_get_drvdata(pdev);
904 pci_set_power_state(pdev, PCI_D0);
905 pci_restore_state(pdev);
906 ret = pci_enable_device(pdev);
910 if (chip->fixes && chip->fixes->resume) {
911 ret = chip->fixes->resume(chip);
916 for (i = 0; i < chip->num_slots; i++) {
917 slot = chip->slots[i];
921 ret = sdhci_resume_host(slot->host);
929 #else /* CONFIG_PM */
931 #define sdhci_pci_suspend NULL
932 #define sdhci_pci_resume NULL
934 #endif /* CONFIG_PM */
936 /*****************************************************************************\
938 * Device probing/removal *
940 \*****************************************************************************/
942 static struct sdhci_pci_slot * __devinit sdhci_pci_probe_slot(
943 struct pci_dev *pdev, struct sdhci_pci_chip *chip, int bar)
945 struct sdhci_pci_slot *slot;
946 struct sdhci_host *host;
949 if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
950 dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
951 return ERR_PTR(-ENODEV);
954 if (pci_resource_len(pdev, bar) != 0x100) {
955 dev_err(&pdev->dev, "Invalid iomem size. You may "
956 "experience problems.\n");
959 if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
960 dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
961 return ERR_PTR(-ENODEV);
964 if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
965 dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
966 return ERR_PTR(-ENODEV);
969 host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
971 dev_err(&pdev->dev, "cannot allocate host\n");
972 return ERR_CAST(host);
975 slot = sdhci_priv(host);
981 host->hw_name = "PCI";
982 host->ops = &sdhci_pci_ops;
983 host->quirks = chip->quirks;
985 host->irq = pdev->irq;
987 ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
989 dev_err(&pdev->dev, "cannot request region\n");
993 host->ioaddr = pci_ioremap_bar(pdev, bar);
995 dev_err(&pdev->dev, "failed to remap registers\n");
1000 if (chip->fixes && chip->fixes->probe_slot) {
1001 ret = chip->fixes->probe_slot(slot);
1006 host->mmc->pm_caps = MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ;
1008 ret = sdhci_add_host(host);
1015 if (chip->fixes && chip->fixes->remove_slot)
1016 chip->fixes->remove_slot(slot, 0);
1019 iounmap(host->ioaddr);
1022 pci_release_region(pdev, bar);
1025 sdhci_free_host(host);
1027 return ERR_PTR(ret);
1030 static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
1036 scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
1037 if (scratch == (u32)-1)
1040 sdhci_remove_host(slot->host, dead);
1042 if (slot->chip->fixes && slot->chip->fixes->remove_slot)
1043 slot->chip->fixes->remove_slot(slot, dead);
1045 pci_release_region(slot->chip->pdev, slot->pci_bar);
1047 sdhci_free_host(slot->host);
1050 static int __devinit sdhci_pci_probe(struct pci_dev *pdev,
1051 const struct pci_device_id *ent)
1053 struct sdhci_pci_chip *chip;
1054 struct sdhci_pci_slot *slot;
1056 u8 slots, first_bar;
1059 BUG_ON(pdev == NULL);
1060 BUG_ON(ent == NULL);
1062 dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
1063 (int)pdev->vendor, (int)pdev->device, (int)pdev->revision);
1065 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1069 slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1070 dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
1074 BUG_ON(slots > MAX_SLOTS);
1076 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1080 first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1082 if (first_bar > 5) {
1083 dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
1087 ret = pci_enable_device(pdev);
1091 chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL);
1098 chip->fixes = (const struct sdhci_pci_fixes *)ent->driver_data;
1100 chip->quirks = chip->fixes->quirks;
1101 chip->num_slots = slots;
1103 pci_set_drvdata(pdev, chip);
1105 if (chip->fixes && chip->fixes->probe) {
1106 ret = chip->fixes->probe(chip);
1111 slots = chip->num_slots; /* Quirk may have changed this */
1113 for (i = 0; i < slots; i++) {
1114 slot = sdhci_pci_probe_slot(pdev, chip, first_bar + i);
1116 for (i--; i >= 0; i--)
1117 sdhci_pci_remove_slot(chip->slots[i]);
1118 ret = PTR_ERR(slot);
1122 chip->slots[i] = slot;
1128 pci_set_drvdata(pdev, NULL);
1132 pci_disable_device(pdev);
1136 static void __devexit sdhci_pci_remove(struct pci_dev *pdev)
1139 struct sdhci_pci_chip *chip;
1141 chip = pci_get_drvdata(pdev);
1144 for (i = 0; i < chip->num_slots; i++)
1145 sdhci_pci_remove_slot(chip->slots[i]);
1147 pci_set_drvdata(pdev, NULL);
1151 pci_disable_device(pdev);
1154 static struct pci_driver sdhci_driver = {
1155 .name = "sdhci-pci",
1156 .id_table = pci_ids,
1157 .probe = sdhci_pci_probe,
1158 .remove = __devexit_p(sdhci_pci_remove),
1159 .suspend = sdhci_pci_suspend,
1160 .resume = sdhci_pci_resume,
1163 /*****************************************************************************\
1165 * Driver init/exit *
1167 \*****************************************************************************/
1169 static int __init sdhci_drv_init(void)
1171 return pci_register_driver(&sdhci_driver);
1174 static void __exit sdhci_drv_exit(void)
1176 pci_unregister_driver(&sdhci_driver);
1179 module_init(sdhci_drv_init);
1180 module_exit(sdhci_drv_exit);
1182 MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1183 MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
1184 MODULE_LICENSE("GPL");