drivers/mmc/host/msm_sdcc.c

   1 /*
   2  *  linux/drivers/mmc/host/msm_sdcc.c - Qualcomm MSM 7X00A SDCC Driver
   3  *
   4  *  Copyright (C) 2007 Google Inc,
   5  *  Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
   6  *  Copyright (C) 2009, Code Aurora Forum. All Rights Reserved.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * Based on mmci.c
  13  *
  14  * Author: San Mehat (san@android.com)
  15  *
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/moduleparam.h>
  20 #include <linux/init.h>
  21 #include <linux/ioport.h>
  22 #include <linux/device.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/delay.h>
  25 #include <linux/err.h>
  26 #include <linux/highmem.h>
  27 #include <linux/log2.h>
  28 #include <linux/mmc/host.h>
  29 #include <linux/mmc/card.h>
  30 #include <linux/mmc/sdio.h>
  31 #include <linux/clk.h>
  32 #include <linux/scatterlist.h>
  33 #include <linux/platform_device.h>
  34 #include <linux/dma-mapping.h>
  35 #include <linux/debugfs.h>
  36 #include <linux/io.h>
  37 #include <linux/memory.h>
  38 #include <linux/gfp.h>
  39
  40 #include <asm/cacheflush.h>
  41 #include <asm/div64.h>
  42 #include <asm/sizes.h>
  43
  44 #include <mach/mmc.h>
  45 #include <mach/msm_iomap.h>
  46 #include <mach/dma.h>
  47 #include <mach/clk.h>
  48
  49 #include "msm_sdcc.h"
  50
  51 #define DRIVER_NAME "msm-sdcc"
  52
  53 #define BUSCLK_PWRSAVE 1
  54 #define BUSCLK_TIMEOUT (HZ)
  55 static unsigned int msmsdcc_fmin = 144000;
  56 static unsigned int msmsdcc_fmax = 50000000;
  57 static unsigned int msmsdcc_4bit = 1;
  58 static unsigned int msmsdcc_pwrsave = 1;
  59 static unsigned int msmsdcc_piopoll = 1;
  60 static unsigned int msmsdcc_sdioirq;
  61
  62 #define PIO_SPINMAX 30
  63 #define CMD_SPINMAX 20
  64
  65
  66 static inline void
  67 msmsdcc_disable_clocks(struct msmsdcc_host *host, int deferr)
  68 {
  69         WARN_ON(!host->clks_on);
  70
  71         BUG_ON(host->curr.mrq);
  72
  73         if (deferr) {
  74                 mod_timer(&host->busclk_timer, jiffies + BUSCLK_TIMEOUT);
  75         } else {
  76                 del_timer_sync(&host->busclk_timer);
  77                 /* Need to check clks_on again in case the busclk
  78                  * timer fired
  79                  */
  80                 if (host->clks_on) {
  81                         clk_disable(host->clk);
  82                         clk_disable(host->pclk);
  83                         host->clks_on = 0;
  84                 }
  85         }
  86 }
  87
  88 static inline int
  89 msmsdcc_enable_clocks(struct msmsdcc_host *host)
  90 {
  91         int rc;
  92
  93         del_timer_sync(&host->busclk_timer);
  94
  95         if (!host->clks_on) {
  96                 rc = clk_enable(host->pclk);
  97                 if (rc)
  98                         return rc;
  99                 rc = clk_enable(host->clk);
 100                 if (rc) {
 101                         clk_disable(host->pclk);
 102                         return rc;
 103                 }
 104                 udelay(1 + ((3 * USEC_PER_SEC) /
 105                        (host->clk_rate ? host->clk_rate : msmsdcc_fmin)));
 106                 host->clks_on = 1;
 107         }
 108         return 0;
 109 }
 110
 111 static inline unsigned int
 112 msmsdcc_readl(struct msmsdcc_host *host, unsigned int reg)
 113 {
 114         return readl(host->base + reg);
 115 }
 116
 117 static inline void
 118 msmsdcc_writel(struct msmsdcc_host *host, u32 data, unsigned int reg)
 119 {
 120         writel(data, host->base + reg);
 121         /* 3 clk delay required! */
 122         udelay(1 + ((3 * USEC_PER_SEC) /
 123                (host->clk_rate ? host->clk_rate : msmsdcc_fmin)));
 124 }
 125
 126 static void
 127 msmsdcc_start_command(struct msmsdcc_host *host, struct mmc_command *cmd,
 128                       u32 c);
 129
 130 static void msmsdcc_reset_and_restore(struct msmsdcc_host *host)
 131 {
 132         u32     mci_clk = 0;
 133         u32     mci_mask0 = 0;
 134         int     ret = 0;
 135
 136         /* Save the controller state */
 137         mci_clk = readl(host->base + MMCICLOCK);
 138         mci_mask0 = readl(host->base + MMCIMASK0);
 139
 140         /* Reset the controller */
 141         ret = clk_reset(host->clk, CLK_RESET_ASSERT);
 142         if (ret)
 143                 pr_err("%s: Clock assert failed at %u Hz with err %d\n",
 144                                 mmc_hostname(host->mmc), host->clk_rate, ret);
 145
 146         ret = clk_reset(host->clk, CLK_RESET_DEASSERT);
 147         if (ret)
 148                 pr_err("%s: Clock deassert failed at %u Hz with err %d\n",
 149                                 mmc_hostname(host->mmc), host->clk_rate, ret);
 150
 151         pr_info("%s: Controller has been re-initialiazed\n",
 152                         mmc_hostname(host->mmc));
 153
 154         /* Restore the contoller state */
 155         writel(host->pwr, host->base + MMCIPOWER);
 156         writel(mci_clk, host->base + MMCICLOCK);
 157         writel(mci_mask0, host->base + MMCIMASK0);
 158         ret = clk_set_rate(host->clk, host->clk_rate);
 159         if (ret)
 160                 pr_err("%s: Failed to set clk rate %u Hz (%d)\n",
 161                                 mmc_hostname(host->mmc), host->clk_rate, ret);
 162 }
 163
 164 static void
 165 msmsdcc_request_end(struct msmsdcc_host *host, struct mmc_request *mrq)
 166 {
 167         BUG_ON(host->curr.data);
 168
 169         host->curr.mrq = NULL;
 170         host->curr.cmd = NULL;
 171
 172         if (mrq->data)
 173                 mrq->data->bytes_xfered = host->curr.data_xfered;
 174         if (mrq->cmd->error == -ETIMEDOUT)
 175                 mdelay(5);
 176
 177 #if BUSCLK_PWRSAVE
 178         msmsdcc_disable_clocks(host, 1);
 179 #endif
 180         /*
 181          * Need to drop the host lock here; mmc_request_done may call
 182          * back into the driver...
 183          */
 184         spin_unlock(&host->lock);
 185         mmc_request_done(host->mmc, mrq);
 186         spin_lock(&host->lock);
 187 }
 188
 189 static void
 190 msmsdcc_stop_data(struct msmsdcc_host *host)
 191 {
 192         host->curr.data = NULL;
 193         host->curr.got_dataend = 0;
 194 }
 195
 196 uint32_t msmsdcc_fifo_addr(struct msmsdcc_host *host)
 197 {
 198         return host->memres->start + MMCIFIFO;
 199 }
 200
 201 static inline void
 202 msmsdcc_start_command_exec(struct msmsdcc_host *host, u32 arg, u32 c) {
 203        msmsdcc_writel(host, arg, MMCIARGUMENT);
 204        msmsdcc_writel(host, c, MMCICOMMAND);
 205 }
 206
 207 static void
 208 msmsdcc_dma_exec_func(struct msm_dmov_cmd *cmd)
 209 {
 210         struct msmsdcc_host *host = (struct msmsdcc_host *)cmd->data;
 211
 212         msmsdcc_writel(host, host->cmd_timeout, MMCIDATATIMER);
 213         msmsdcc_writel(host, (unsigned int)host->curr.xfer_size,
 214                        MMCIDATALENGTH);
 215         msmsdcc_writel(host, host->cmd_pio_irqmask, MMCIMASK1);
 216         msmsdcc_writel(host, host->cmd_datactrl, MMCIDATACTRL);
 217
 218         if (host->cmd_cmd) {
 219                 msmsdcc_start_command_exec(host,
 220                                            (u32) host->cmd_cmd->arg,
 221                                            (u32) host->cmd_c);
 222         }
 223         host->dma.active = 1;
 224 }
 225
 226 static void
 227 msmsdcc_dma_complete_tlet(unsigned long data)
 228 {
 229         struct msmsdcc_host *host = (struct msmsdcc_host *)data;
 230         unsigned long           flags;
 231         struct mmc_request      *mrq;
 232         struct msm_dmov_errdata err;
 233
 234         spin_lock_irqsave(&host->lock, flags);
 235         host->dma.active = 0;
 236
 237         err = host->dma.err;
 238         mrq = host->curr.mrq;
 239         BUG_ON(!mrq);
 240         WARN_ON(!mrq->data);
 241
 242         if (!(host->dma.result & DMOV_RSLT_VALID)) {
 243                 pr_err("msmsdcc: Invalid DataMover result\n");
 244                 goto out;
 245         }
 246
 247         if (host->dma.result & DMOV_RSLT_DONE) {
 248                 host->curr.data_xfered = host->curr.xfer_size;
 249         } else {
 250                 /* Error or flush  */
 251                 if (host->dma.result & DMOV_RSLT_ERROR)
 252                         pr_err("%s: DMA error (0x%.8x)\n",
 253                                mmc_hostname(host->mmc), host->dma.result);
 254                 if (host->dma.result & DMOV_RSLT_FLUSH)
 255                         pr_err("%s: DMA channel flushed (0x%.8x)\n",
 256                                mmc_hostname(host->mmc), host->dma.result);
 257
 258                 pr_err("Flush data: %.8x %.8x %.8x %.8x %.8x %.8x\n",
 259                        err.flush[0], err.flush[1], err.flush[2],
 260                        err.flush[3], err.flush[4], err.flush[5]);
 261
 262                 msmsdcc_reset_and_restore(host);
 263                 if (!mrq->data->error)
 264                         mrq->data->error = -EIO;
 265         }
 266         dma_unmap_sg(mmc_dev(host->mmc), host->dma.sg, host->dma.num_ents,
 267                      host->dma.dir);
 268
 269         if (host->curr.user_pages) {
 270                 struct scatterlist *sg = host->dma.sg;
 271                 int i;
 272
 273                 for (i = 0; i < host->dma.num_ents; i++)
 274                         flush_dcache_page(sg_page(sg++));
 275         }
 276
 277         host->dma.sg = NULL;
 278         host->dma.busy = 0;
 279
 280         if (host->curr.got_dataend || mrq->data->error) {
 281
 282                 /*
 283                  * If we've already gotten our DATAEND / DATABLKEND
 284                  * for this request, then complete it through here.
 285                  */
 286                 msmsdcc_stop_data(host);
 287
 288                 if (!mrq->data->error)
 289                         host->curr.data_xfered = host->curr.xfer_size;
 290                 if (!mrq->data->stop || mrq->cmd->error) {
 291                         host->curr.mrq = NULL;
 292                         host->curr.cmd = NULL;
 293                         mrq->data->bytes_xfered = host->curr.data_xfered;
 294
 295                         spin_unlock_irqrestore(&host->lock, flags);
 296 #if BUSCLK_PWRSAVE
 297                         msmsdcc_disable_clocks(host, 1);
 298 #endif
 299                         mmc_request_done(host->mmc, mrq);
 300                         return;
 301                 } else
 302                         msmsdcc_start_command(host, mrq->data->stop, 0);
 303         }
 304
 305 out:
 306         spin_unlock_irqrestore(&host->lock, flags);
 307         return;
 308 }
 309
 310 static void
 311 msmsdcc_dma_complete_func(struct msm_dmov_cmd *cmd,
 312                           unsigned int result,
 313                           struct msm_dmov_errdata *err)
 314 {
 315         struct msmsdcc_dma_data *dma_data =
 316                 container_of(cmd, struct msmsdcc_dma_data, hdr);
 317         struct msmsdcc_host *host = dma_data->host;
 318
 319         dma_data->result = result;
 320         if (err)
 321                 memcpy(&dma_data->err, err, sizeof(struct msm_dmov_errdata));
 322
 323         tasklet_schedule(&host->dma_tlet);
 324 }
 325
 326 static int validate_dma(struct msmsdcc_host *host, struct mmc_data *data)
 327 {
 328         if (host->dma.channel == -1)
 329                 return -ENOENT;
 330
 331         if ((data->blksz * data->blocks) < MCI_FIFOSIZE)
 332                 return -EINVAL;
 333         if ((data->blksz * data->blocks) % MCI_FIFOSIZE)
 334                 return -EINVAL;
 335         return 0;
 336 }
 337
 338 static int msmsdcc_config_dma(struct msmsdcc_host *host, struct mmc_data *data)
 339 {
 340         struct msmsdcc_nc_dmadata *nc;
 341         dmov_box *box;
 342         uint32_t rows;
 343         uint32_t crci;
 344         unsigned int n;
 345         int i, rc;
 346         struct scatterlist *sg = data->sg;
 347
 348         rc = validate_dma(host, data);
 349         if (rc)
 350                 return rc;
 351
 352         host->dma.sg = data->sg;
 353         host->dma.num_ents = data->sg_len;
 354
 355        BUG_ON(host->dma.num_ents > NR_SG); /* Prevent memory corruption */
 356
 357         nc = host->dma.nc;
 358
 359         switch (host->pdev_id) {
 360         case 1:
 361                 crci = MSMSDCC_CRCI_SDC1;
 362                 break;
 363         case 2:
 364                 crci = MSMSDCC_CRCI_SDC2;
 365                 break;
 366         case 3:
 367                 crci = MSMSDCC_CRCI_SDC3;
 368                 break;
 369         case 4:
 370                 crci = MSMSDCC_CRCI_SDC4;
 371                 break;
 372         default:
 373                 host->dma.sg = NULL;
 374                 host->dma.num_ents = 0;
 375                 return -ENOENT;
 376         }
 377
 378         if (data->flags & MMC_DATA_READ)
 379                 host->dma.dir = DMA_FROM_DEVICE;
 380         else
 381                 host->dma.dir = DMA_TO_DEVICE;
 382
 383         host->curr.user_pages = 0;
 384
 385         box = &nc->cmd[0];
 386         for (i = 0; i < host->dma.num_ents; i++) {
 387                 box->cmd = CMD_MODE_BOX;
 388
 389         /* Initialize sg dma address */
 390         sg->dma_address = page_to_dma(mmc_dev(host->mmc), sg_page(sg))
 391                                 + sg->offset;
 392
 393         if (i == (host->dma.num_ents - 1))
 394                         box->cmd |= CMD_LC;
 395                 rows = (sg_dma_len(sg) % MCI_FIFOSIZE) ?
 396                         (sg_dma_len(sg) / MCI_FIFOSIZE) + 1 :
 397                         (sg_dma_len(sg) / MCI_FIFOSIZE) ;
 398
 399                 if (data->flags & MMC_DATA_READ) {
 400                         box->src_row_addr = msmsdcc_fifo_addr(host);
 401                         box->dst_row_addr = sg_dma_address(sg);
 402
 403                         box->src_dst_len = (MCI_FIFOSIZE << 16) |
 404                                            (MCI_FIFOSIZE);
 405                         box->row_offset = MCI_FIFOSIZE;
 406
 407                         box->num_rows = rows * ((1 << 16) + 1);
 408                         box->cmd |= CMD_SRC_CRCI(crci);
 409                 } else {
 410                         box->src_row_addr = sg_dma_address(sg);
 411                         box->dst_row_addr = msmsdcc_fifo_addr(host);
 412
 413                         box->src_dst_len = (MCI_FIFOSIZE << 16) |
 414                                            (MCI_FIFOSIZE);
 415                         box->row_offset = (MCI_FIFOSIZE << 16);
 416
 417                         box->num_rows = rows * ((1 << 16) + 1);
 418                         box->cmd |= CMD_DST_CRCI(crci);
 419                 }
 420                 box++;
 421                 sg++;
 422         }
 423
 424         /* location of command block must be 64 bit aligned */
 425         BUG_ON(host->dma.cmd_busaddr & 0x07);
 426
 427         nc->cmdptr = (host->dma.cmd_busaddr >> 3) | CMD_PTR_LP;
 428         host->dma.hdr.cmdptr = DMOV_CMD_PTR_LIST |
 429                                DMOV_CMD_ADDR(host->dma.cmdptr_busaddr);
 430         host->dma.hdr.complete_func = msmsdcc_dma_complete_func;
 431
 432         n = dma_map_sg(mmc_dev(host->mmc), host->dma.sg,
 433                         host->dma.num_ents, host->dma.dir);
 434 /* dsb inside dma_map_sg will write nc out to mem as well */
 435
 436         if (n != host->dma.num_ents) {
 437                 printk(KERN_ERR "%s: Unable to map in all sg elements\n",
 438                         mmc_hostname(host->mmc));
 439                 host->dma.sg = NULL;
 440                 host->dma.num_ents = 0;
 441                 return -ENOMEM;
 442         }
 443
 444         return 0;
 445 }
 446
 447 static int
 448 snoop_cccr_abort(struct mmc_command *cmd)
 449 {
 450         if ((cmd->opcode == 52) &&
 451             (cmd->arg & 0x80000000) &&
 452             (((cmd->arg >> 9) & 0x1ffff) == SDIO_CCCR_ABORT))
 453                 return 1;
 454         return 0;
 455 }
 456
 457 static void
 458 msmsdcc_start_command_deferred(struct msmsdcc_host *host,
 459                                 struct mmc_command *cmd, u32 *c)
 460 {
 461         *c |= (cmd->opcode | MCI_CPSM_ENABLE);
 462
 463         if (cmd->flags & MMC_RSP_PRESENT) {
 464                 if (cmd->flags & MMC_RSP_136)
 465                         *c |= MCI_CPSM_LONGRSP;
 466                 *c |= MCI_CPSM_RESPONSE;
 467         }
 468
 469         if (/*interrupt*/0)
 470                 *c |= MCI_CPSM_INTERRUPT;
 471
 472         if ((((cmd->opcode == 17) || (cmd->opcode == 18))  ||
 473              ((cmd->opcode == 24) || (cmd->opcode == 25))) ||
 474               (cmd->opcode == 53))
 475                 *c |= MCI_CSPM_DATCMD;
 476
 477         if (host->prog_scan && (cmd->opcode == 12)) {
 478                 *c |= MCI_CPSM_PROGENA;
 479                 host->prog_enable = true;
 480         }
 481
 482         if (cmd == cmd->mrq->stop)
 483                 *c |= MCI_CSPM_MCIABORT;
 484
 485         if (snoop_cccr_abort(cmd))
 486                 *c |= MCI_CSPM_MCIABORT;
 487
 488         if (host->curr.cmd != NULL) {
 489                 printk(KERN_ERR "%s: Overlapping command requests\n",
 490                         mmc_hostname(host->mmc));
 491         }
 492         host->curr.cmd = cmd;
 493 }
 494
 495 static void
 496 msmsdcc_start_data(struct msmsdcc_host *host, struct mmc_data *data,
 497                         struct mmc_command *cmd, u32 c)
 498 {
 499         unsigned int datactrl, timeout;
 500         unsigned long long clks;
 501         unsigned int pio_irqmask = 0;
 502
 503         host->curr.data = data;
 504         host->curr.xfer_size = data->blksz * data->blocks;
 505         host->curr.xfer_remain = host->curr.xfer_size;
 506         host->curr.data_xfered = 0;
 507         host->curr.got_dataend = 0;
 508
 509         memset(&host->pio, 0, sizeof(host->pio));
 510
 511         datactrl = MCI_DPSM_ENABLE | (data->blksz << 4);
 512
 513         if (!msmsdcc_config_dma(host, data))
 514                 datactrl |= MCI_DPSM_DMAENABLE;
 515         else {
 516                 host->pio.sg = data->sg;
 517                 host->pio.sg_len = data->sg_len;
 518                 host->pio.sg_off = 0;
 519
 520                 if (data->flags & MMC_DATA_READ) {
 521                         pio_irqmask = MCI_RXFIFOHALFFULLMASK;
 522                         if (host->curr.xfer_remain < MCI_FIFOSIZE)
 523                                 pio_irqmask |= MCI_RXDATAAVLBLMASK;
 524                 } else
 525                         pio_irqmask = MCI_TXFIFOHALFEMPTYMASK;
 526         }
 527
 528         if (data->flags & MMC_DATA_READ)
 529                 datactrl |= MCI_DPSM_DIRECTION;
 530
 531         clks = (unsigned long long)data->timeout_ns * host->clk_rate;
 532         do_div(clks, NSEC_PER_SEC);
 533         timeout = data->timeout_clks + (unsigned int)clks*2 ;
 534
 535         if (datactrl & MCI_DPSM_DMAENABLE) {
 536                 /* Save parameters for the exec function */
 537                 host->cmd_timeout = timeout;
 538                 host->cmd_pio_irqmask = pio_irqmask;
 539                 host->cmd_datactrl = datactrl;
 540                 host->cmd_cmd = cmd;
 541
 542                 host->dma.hdr.execute_func = msmsdcc_dma_exec_func;
 543                 host->dma.hdr.data = (void *)host;
 544                 host->dma.busy = 1;
 545
 546                 if (cmd) {
 547                         msmsdcc_start_command_deferred(host, cmd, &c);
 548                         host->cmd_c = c;
 549                 }
 550                 msm_dmov_enqueue_cmd(host->dma.channel, &host->dma.hdr);
 551                 if (data->flags & MMC_DATA_WRITE)
 552                         host->prog_scan = true;
 553         } else {
 554                 msmsdcc_writel(host, timeout, MMCIDATATIMER);
 555
 556                 msmsdcc_writel(host, host->curr.xfer_size, MMCIDATALENGTH);
 557
 558                 msmsdcc_writel(host, pio_irqmask, MMCIMASK1);
 559                 msmsdcc_writel(host, datactrl, MMCIDATACTRL);
 560
 561                 if (cmd) {
 562                         /* Daisy-chain the command if requested */
 563                         msmsdcc_start_command(host, cmd, c);
 564                 }
 565         }
 566 }
 567
 568 static void
 569 msmsdcc_start_command(struct msmsdcc_host *host, struct mmc_command *cmd, u32 c)
 570 {
 571         if (cmd == cmd->mrq->stop)
 572                 c |= MCI_CSPM_MCIABORT;
 573
 574         host->stats.cmds++;
 575
 576         msmsdcc_start_command_deferred(host, cmd, &c);
 577         msmsdcc_start_command_exec(host, cmd->arg, c);
 578 }
 579
 580 static void
 581 msmsdcc_data_err(struct msmsdcc_host *host, struct mmc_data *data,
 582                  unsigned int status)
 583 {
 584         if (status & MCI_DATACRCFAIL) {
 585                 pr_err("%s: Data CRC error\n", mmc_hostname(host->mmc));
 586                 pr_err("%s: opcode 0x%.8x\n", __func__,
 587                        data->mrq->cmd->opcode);
 588                 pr_err("%s: blksz %d, blocks %d\n", __func__,
 589                        data->blksz, data->blocks);
 590                 data->error = -EILSEQ;
 591         } else if (status & MCI_DATATIMEOUT) {
 592                 pr_err("%s: Data timeout\n", mmc_hostname(host->mmc));
 593                 data->error = -ETIMEDOUT;
 594         } else if (status & MCI_RXOVERRUN) {
 595                 pr_err("%s: RX overrun\n", mmc_hostname(host->mmc));
 596                 data->error = -EIO;
 597         } else if (status & MCI_TXUNDERRUN) {
 598                 pr_err("%s: TX underrun\n", mmc_hostname(host->mmc));
 599                 data->error = -EIO;
 600         } else {
 601                 pr_err("%s: Unknown error (0x%.8x)\n",
 602                        mmc_hostname(host->mmc), status);
 603                 data->error = -EIO;
 604         }
 605 }
 606
 607
 608 static int
 609 msmsdcc_pio_read(struct msmsdcc_host *host, char *buffer, unsigned int remain)
 610 {
 611         uint32_t        *ptr = (uint32_t *) buffer;
 612         int             count = 0;
 613
 614         if (remain % 4)
 615                 remain = ((remain >> 2) + 1) << 2;
 616
 617         while (msmsdcc_readl(host, MMCISTATUS) & MCI_RXDATAAVLBL) {
 618                 *ptr = msmsdcc_readl(host, MMCIFIFO + (count % MCI_FIFOSIZE));
 619                 ptr++;
 620                 count += sizeof(uint32_t);
 621
 622                 remain -=  sizeof(uint32_t);
 623                 if (remain == 0)
 624                         break;
 625         }
 626         return count;
 627 }
 628
 629 static int
 630 msmsdcc_pio_write(struct msmsdcc_host *host, char *buffer,
 631                   unsigned int remain, u32 status)
 632 {
 633         void __iomem *base = host->base;
 634         char *ptr = buffer;
 635
 636         do {
 637                 unsigned int count, maxcnt, sz;
 638
 639                 maxcnt = status & MCI_TXFIFOEMPTY ? MCI_FIFOSIZE :
 640                                                     MCI_FIFOHALFSIZE;
 641                 count = min(remain, maxcnt);
 642
 643                 sz = count % 4 ? (count >> 2) + 1 : (count >> 2);
 644                 writesl(base + MMCIFIFO, ptr, sz);
 645                 ptr += count;
 646                 remain -= count;
 647
 648                 if (remain == 0)
 649                         break;
 650
 651                 status = msmsdcc_readl(host, MMCISTATUS);
 652         } while (status & MCI_TXFIFOHALFEMPTY);
 653
 654         return ptr - buffer;
 655 }
 656
 657 static int
 658 msmsdcc_spin_on_status(struct msmsdcc_host *host, uint32_t mask, int maxspin)
 659 {
 660         while (maxspin) {
 661                 if ((msmsdcc_readl(host, MMCISTATUS) & mask))
 662                         return 0;
 663                 udelay(1);
 664                 --maxspin;
 665         }
 666         return -ETIMEDOUT;
 667 }
 668
 669 static irqreturn_t
 670 msmsdcc_pio_irq(int irq, void *dev_id)
 671 {
 672         struct msmsdcc_host     *host = dev_id;
 673         uint32_t                status;
 674
 675         status = msmsdcc_readl(host, MMCISTATUS);
 676
 677         do {
 678                 unsigned long flags;
 679                 unsigned int remain, len;
 680                 char *buffer;
 681
 682                 if (!(status & (MCI_TXFIFOHALFEMPTY | MCI_RXDATAAVLBL))) {
 683                         if (host->curr.xfer_remain == 0 || !msmsdcc_piopoll)
 684                                 break;
 685
 686                         if (msmsdcc_spin_on_status(host,
 687                                                    (MCI_TXFIFOHALFEMPTY |
 688                                                    MCI_RXDATAAVLBL),
 689                                                    PIO_SPINMAX)) {
 690                                 break;
 691                         }
 692                 }
 693
 694                 /* Map the current scatter buffer */
 695                 local_irq_save(flags);
 696                 buffer = kmap_atomic(sg_page(host->pio.sg),
 697                                      KM_BIO_SRC_IRQ) + host->pio.sg->offset;
 698                 buffer += host->pio.sg_off;
 699                 remain = host->pio.sg->length - host->pio.sg_off;
 700                 len = 0;
 701                 if (status & MCI_RXACTIVE)
 702                         len = msmsdcc_pio_read(host, buffer, remain);
 703                 if (status & MCI_TXACTIVE)
 704                         len = msmsdcc_pio_write(host, buffer, remain, status);
 705
 706                 /* Unmap the buffer */
 707                 kunmap_atomic(buffer, KM_BIO_SRC_IRQ);
 708                 local_irq_restore(flags);
 709
 710                 host->pio.sg_off += len;
 711                 host->curr.xfer_remain -= len;
 712                 host->curr.data_xfered += len;
 713                 remain -= len;
 714
 715                 if (remain == 0) {
 716                         /* This sg page is full - do some housekeeping */
 717                         if (status & MCI_RXACTIVE && host->curr.user_pages)
 718                                 flush_dcache_page(sg_page(host->pio.sg));
 719
 720                         if (!--host->pio.sg_len) {
 721                                 memset(&host->pio, 0, sizeof(host->pio));
 722                                 break;
 723                         }
 724
 725                         /* Advance to next sg */
 726                         host->pio.sg++;
 727                         host->pio.sg_off = 0;
 728                 }
 729
 730                 status = msmsdcc_readl(host, MMCISTATUS);
 731         } while (1);
 732
 733         if (status & MCI_RXACTIVE && host->curr.xfer_remain < MCI_FIFOSIZE)
 734                 msmsdcc_writel(host, MCI_RXDATAAVLBLMASK, MMCIMASK1);
 735
 736         if (!host->curr.xfer_remain)
 737                 msmsdcc_writel(host, 0, MMCIMASK1);
 738
 739         return IRQ_HANDLED;
 740 }
 741
 742 static void msmsdcc_do_cmdirq(struct msmsdcc_host *host, uint32_t status)
 743 {
 744         struct mmc_command *cmd = host->curr.cmd;
 745
 746         host->curr.cmd = NULL;
 747         cmd->resp[0] = msmsdcc_readl(host, MMCIRESPONSE0);
 748         cmd->resp[1] = msmsdcc_readl(host, MMCIRESPONSE1);
 749         cmd->resp[2] = msmsdcc_readl(host, MMCIRESPONSE2);
 750         cmd->resp[3] = msmsdcc_readl(host, MMCIRESPONSE3);
 751
 752         if (status & MCI_CMDTIMEOUT) {
 753                 cmd->error = -ETIMEDOUT;
 754         } else if (status & MCI_CMDCRCFAIL &&
 755                    cmd->flags & MMC_RSP_CRC) {
 756                 pr_err("%s: Command CRC error\n", mmc_hostname(host->mmc));
 757                 cmd->error = -EILSEQ;
 758         }
 759
 760         if (!cmd->data || cmd->error) {
 761                 if (host->curr.data && host->dma.sg)
 762                         msm_dmov_stop_cmd(host->dma.channel,
 763                                           &host->dma.hdr, 0);
 764                 else if (host->curr.data) { /* Non DMA */
 765                         msmsdcc_reset_and_restore(host);
 766                         msmsdcc_stop_data(host);
 767                         msmsdcc_request_end(host, cmd->mrq);
 768                 } else { /* host->data == NULL */
 769                         if (!cmd->error && host->prog_enable) {
 770                                 if (status & MCI_PROGDONE) {
 771                                         host->prog_scan = false;
 772                                         host->prog_enable = false;
 773                                         msmsdcc_request_end(host, cmd->mrq);
 774                                 } else {
 775                                         host->curr.cmd = cmd;
 776                                 }
 777                         } else {
 778                                 if (host->prog_enable) {
 779                                         host->prog_scan = false;
 780                                         host->prog_enable = false;
 781                                 }
 782                                 msmsdcc_request_end(host, cmd->mrq);
 783                         }
 784                 }
 785         } else if (cmd->data)
 786                 if (!(cmd->data->flags & MMC_DATA_READ))
 787                         msmsdcc_start_data(host, cmd->data,
 788                                                 NULL, 0);
 789 }
 790
 791 static void
 792 msmsdcc_handle_irq_data(struct msmsdcc_host *host, u32 status,
 793                         void __iomem *base)
 794 {
 795         struct mmc_data *data = host->curr.data;
 796
 797         if (status & (MCI_CMDSENT | MCI_CMDRESPEND | MCI_CMDCRCFAIL |
 798                         MCI_CMDTIMEOUT | MCI_PROGDONE) && host->curr.cmd) {
 799                 msmsdcc_do_cmdirq(host, status);
 800         }
 801
 802         if (!data)
 803                 return;
 804
 805         /* Check for data errors */
 806         if (status & (MCI_DATACRCFAIL | MCI_DATATIMEOUT |
 807                       MCI_TXUNDERRUN | MCI_RXOVERRUN)) {
 808                 msmsdcc_data_err(host, data, status);
 809                 host->curr.data_xfered = 0;
 810                 if (host->dma.sg)
 811                         msm_dmov_stop_cmd(host->dma.channel,
 812                                           &host->dma.hdr, 0);
 813                 else {
 814                         msmsdcc_reset_and_restore(host);
 815                         if (host->curr.data)
 816                                 msmsdcc_stop_data(host);
 817                         if (!data->stop)
 818                                 msmsdcc_request_end(host, data->mrq);
 819                         else
 820                                 msmsdcc_start_command(host, data->stop, 0);
 821                 }
 822         }
 823
 824         /* Check for data done */
 825         if (!host->curr.got_dataend && (status & MCI_DATAEND))
 826                 host->curr.got_dataend = 1;
 827
 828         /*
 829          * If DMA is still in progress, we complete via the completion handler
 830          */
 831         if (host->curr.got_dataend && !host->dma.busy) {
 832                 /*
 833                  * There appears to be an issue in the controller where
 834                  * if you request a small block transfer (< fifo size),
 835                  * you may get your DATAEND/DATABLKEND irq without the
 836                  * PIO data irq.
 837                  *
 838                  * Check to see if there is still data to be read,
 839                  * and simulate a PIO irq.
 840                  */
 841                 if (readl(base + MMCISTATUS) & MCI_RXDATAAVLBL)
 842                         msmsdcc_pio_irq(1, host);
 843
 844                 msmsdcc_stop_data(host);
 845                 if (!data->error)
 846                         host->curr.data_xfered = host->curr.xfer_size;
 847
 848                 if (!data->stop)
 849                         msmsdcc_request_end(host, data->mrq);
 850                 else
 851                         msmsdcc_start_command(host, data->stop, 0);
 852         }
 853 }
 854
 855 static irqreturn_t
 856 msmsdcc_irq(int irq, void *dev_id)
 857 {
 858         struct msmsdcc_host     *host = dev_id;
 859         void __iomem            *base = host->base;
 860         u32                     status;
 861         int                     ret = 0;
 862         int                     cardint = 0;
 863
 864         spin_lock(&host->lock);
 865
 866         do {
 867                 status = msmsdcc_readl(host, MMCISTATUS);
 868                 status &= msmsdcc_readl(host, MMCIMASK0);
 869                 msmsdcc_writel(host, status, MMCICLEAR);
 870
 871                 if (status & MCI_SDIOINTR)
 872                         status &= ~MCI_SDIOINTR;
 873
 874                 if (!status)
 875                         break;
 876
 877                 msmsdcc_handle_irq_data(host, status, base);
 878
 879                 if (status & MCI_SDIOINTOPER) {
 880                         cardint = 1;
 881                         status &= ~MCI_SDIOINTOPER;
 882                 }
 883                 ret = 1;
 884         } while (status);
 885
 886         spin_unlock(&host->lock);
 887
 888         /*
 889          * We have to delay handling the card interrupt as it calls
 890          * back into the driver.
 891          */
 892         if (cardint)
 893                 mmc_signal_sdio_irq(host->mmc);
 894
 895         return IRQ_RETVAL(ret);
 896 }
 897
 898 static void
 899 msmsdcc_request(struct mmc_host *mmc, struct mmc_request *mrq)
 900 {
 901         struct msmsdcc_host *host = mmc_priv(mmc);
 902         unsigned long flags;
 903
 904         WARN_ON(host->curr.mrq != NULL);
 905         WARN_ON(host->pwr == 0);
 906
 907         spin_lock_irqsave(&host->lock, flags);
 908
 909         host->stats.reqs++;
 910
 911         if (host->eject) {
 912                 if (mrq->data && !(mrq->data->flags & MMC_DATA_READ)) {
 913                         mrq->cmd->error = 0;
 914                         mrq->data->bytes_xfered = mrq->data->blksz *
 915                                                   mrq->data->blocks;
 916                 } else
 917                         mrq->cmd->error = -ENOMEDIUM;
 918
 919                 spin_unlock_irqrestore(&host->lock, flags);
 920                 mmc_request_done(mmc, mrq);
 921                 return;
 922         }
 923
 924         msmsdcc_enable_clocks(host);
 925
 926         host->curr.mrq = mrq;
 927
 928         if (mrq->data && mrq->data->flags & MMC_DATA_READ)
 929                 /* Queue/read data, daisy-chain command when data starts */
 930                 msmsdcc_start_data(host, mrq->data, mrq->cmd, 0);
 931         else
 932                 msmsdcc_start_command(host, mrq->cmd, 0);
 933
 934         if (host->cmdpoll && !msmsdcc_spin_on_status(host,
 935                                 MCI_CMDRESPEND|MCI_CMDCRCFAIL|MCI_CMDTIMEOUT,
 936                                 CMD_SPINMAX)) {
 937                 uint32_t status = msmsdcc_readl(host, MMCISTATUS);
 938                 msmsdcc_do_cmdirq(host, status);
 939                 msmsdcc_writel(host,
 940                                MCI_CMDRESPEND | MCI_CMDCRCFAIL | MCI_CMDTIMEOUT,
 941                                MMCICLEAR);
 942                 host->stats.cmdpoll_hits++;
 943         } else {
 944                 host->stats.cmdpoll_misses++;
 945         }
 946         spin_unlock_irqrestore(&host->lock, flags);
 947 }
 948
 949 static void
 950 msmsdcc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 951 {
 952         struct msmsdcc_host *host = mmc_priv(mmc);
 953         u32 clk = 0, pwr = 0;
 954         int rc;
 955         unsigned long flags;
 956
 957         spin_lock_irqsave(&host->lock, flags);
 958
 959         msmsdcc_enable_clocks(host);
 960
 961         if (ios->clock) {
 962                 if (ios->clock != host->clk_rate) {
 963                         rc = clk_set_rate(host->clk, ios->clock);
 964                         if (rc < 0)
 965                                 pr_err("%s: Error setting clock rate (%d)\n",
 966                                        mmc_hostname(host->mmc), rc);
 967                         else
 968                                 host->clk_rate = ios->clock;
 969                 }
 970                 clk |= MCI_CLK_ENABLE;
 971         }
 972
 973         if (ios->bus_width == MMC_BUS_WIDTH_4)
 974                 clk |= (2 << 10); /* Set WIDEBUS */
 975
 976         if (ios->clock > 400000 && msmsdcc_pwrsave)
 977                 clk |= (1 << 9); /* PWRSAVE */
 978
 979         clk |= (1 << 12); /* FLOW_ENA */
 980         clk |= (1 << 15); /* feedback clock */
 981
 982         if (host->plat->translate_vdd)
 983                 pwr |= host->plat->translate_vdd(mmc_dev(mmc), ios->vdd);
 984
 985         switch (ios->power_mode) {
 986         case MMC_POWER_OFF:
 987                 break;
 988         case MMC_POWER_UP:
 989                 pwr |= MCI_PWR_UP;
 990                 break;
 991         case MMC_POWER_ON:
 992                 pwr |= MCI_PWR_ON;
 993                 break;
 994         }
 995
 996         if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN)
 997                 pwr |= MCI_OD;
 998
 999         msmsdcc_writel(host, clk, MMCICLOCK);
1000
1001         if (host->pwr != pwr) {
1002                 host->pwr = pwr;
1003                 msmsdcc_writel(host, pwr, MMCIPOWER);
1004         }
1005 #if BUSCLK_PWRSAVE
1006         msmsdcc_disable_clocks(host, 1);
1007 #endif
1008         spin_unlock_irqrestore(&host->lock, flags);
1009 }
1010
1011 static void msmsdcc_enable_sdio_irq(struct mmc_host *mmc, int enable)
1012 {
1013         struct msmsdcc_host *host = mmc_priv(mmc);
1014         unsigned long flags;
1015         u32 status;
1016
1017         spin_lock_irqsave(&host->lock, flags);
1018         if (msmsdcc_sdioirq == 1) {
1019                 status = msmsdcc_readl(host, MMCIMASK0);
1020                 if (enable)
1021                         status |= MCI_SDIOINTOPERMASK;
1022                 else
1023                         status &= ~MCI_SDIOINTOPERMASK;
1024                 host->saved_irq0mask = status;
1025                 msmsdcc_writel(host, status, MMCIMASK0);
1026         }
1027         spin_unlock_irqrestore(&host->lock, flags);
1028 }
1029
1030 static const struct mmc_host_ops msmsdcc_ops = {
1031         .request        = msmsdcc_request,
1032         .set_ios        = msmsdcc_set_ios,
1033         .enable_sdio_irq = msmsdcc_enable_sdio_irq,
1034 };
1035
1036 static void
1037 msmsdcc_check_status(unsigned long data)
1038 {
1039         struct msmsdcc_host *host = (struct msmsdcc_host *)data;
1040         unsigned int status;
1041
1042         if (!host->plat->status) {
1043                 mmc_detect_change(host->mmc, 0);
1044                 goto out;
1045         }
1046
1047         status = host->plat->status(mmc_dev(host->mmc));
1048         host->eject = !status;
1049         if (status ^ host->oldstat) {
1050                 pr_info("%s: Slot status change detected (%d -> %d)\n",
1051                         mmc_hostname(host->mmc), host->oldstat, status);
1052                 if (status)
1053                         mmc_detect_change(host->mmc, (5 * HZ) / 2);
1054                 else
1055                         mmc_detect_change(host->mmc, 0);
1056         }
1057
1058         host->oldstat = status;
1059
1060 out:
1061         if (host->timer.function)
1062                 mod_timer(&host->timer, jiffies + HZ);
1063 }
1064
1065 static irqreturn_t
1066 msmsdcc_platform_status_irq(int irq, void *dev_id)
1067 {
1068         struct msmsdcc_host *host = dev_id;
1069
1070         printk(KERN_DEBUG "%s: %d\n", __func__, irq);
1071         msmsdcc_check_status((unsigned long) host);
1072         return IRQ_HANDLED;
1073 }
1074
1075 static void
1076 msmsdcc_status_notify_cb(int card_present, void *dev_id)
1077 {
1078         struct msmsdcc_host *host = dev_id;
1079
1080         printk(KERN_DEBUG "%s: card_present %d\n", mmc_hostname(host->mmc),
1081                card_present);
1082         msmsdcc_check_status((unsigned long) host);
1083 }
1084
1085 static void
1086 msmsdcc_busclk_expired(unsigned long _data)
1087 {
1088         struct msmsdcc_host     *host = (struct msmsdcc_host *) _data;
1089
1090         if (host->clks_on)
1091                 msmsdcc_disable_clocks(host, 0);
1092 }
1093
1094 static int
1095 msmsdcc_init_dma(struct msmsdcc_host *host)
1096 {
1097         memset(&host->dma, 0, sizeof(struct msmsdcc_dma_data));
1098         host->dma.host = host;
1099         host->dma.channel = -1;
1100
1101         if (!host->dmares)
1102                 return -ENODEV;
1103
1104         host->dma.nc = dma_alloc_coherent(NULL,
1105                                           sizeof(struct msmsdcc_nc_dmadata),
1106                                           &host->dma.nc_busaddr,
1107                                           GFP_KERNEL);
1108         if (host->dma.nc == NULL) {
1109                 pr_err("Unable to allocate DMA buffer\n");
1110                 return -ENOMEM;
1111         }
1112         memset(host->dma.nc, 0x00, sizeof(struct msmsdcc_nc_dmadata));
1113         host->dma.cmd_busaddr = host->dma.nc_busaddr;
1114         host->dma.cmdptr_busaddr = host->dma.nc_busaddr +
1115                                 offsetof(struct msmsdcc_nc_dmadata, cmdptr);
1116         host->dma.channel = host->dmares->start;
1117
1118         return 0;
1119 }
1120
1121 static int
1122 msmsdcc_probe(struct platform_device *pdev)
1123 {
1124         struct msm_mmc_platform_data *plat = pdev->dev.platform_data;
1125         struct msmsdcc_host *host;
1126         struct mmc_host *mmc;
1127         struct resource *cmd_irqres = NULL;
1128         struct resource *pio_irqres = NULL;
1129         struct resource *stat_irqres = NULL;
1130         struct resource *memres = NULL;
1131         struct resource *dmares = NULL;
1132         int ret;
1133
1134         /* must have platform data */
1135         if (!plat) {
1136                 pr_err("%s: Platform data not available\n", __func__);
1137                 ret = -EINVAL;
1138                 goto out;
1139         }
1140
1141         if (pdev->id < 1 || pdev->id > 4)
1142                 return -EINVAL;
1143
1144         if (pdev->resource == NULL || pdev->num_resources < 2) {
1145                 pr_err("%s: Invalid resource\n", __func__);
1146                 return -ENXIO;
1147         }
1148
1149         memres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1150         dmares = platform_get_resource(pdev, IORESOURCE_DMA, 0);
1151         cmd_irqres = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
1152                                                   "cmd_irq");
1153         pio_irqres = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
1154                                                   "pio_irq");
1155         stat_irqres = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
1156                                                    "status_irq");
1157
1158         if (!cmd_irqres || !pio_irqres || !memres) {
1159                 pr_err("%s: Invalid resource\n", __func__);
1160                 return -ENXIO;
1161         }
1162
1163         /*
1164          * Setup our host structure
1165          */
1166
1167         mmc = mmc_alloc_host(sizeof(struct msmsdcc_host), &pdev->dev);
1168         if (!mmc) {
1169                 ret = -ENOMEM;
1170                 goto out;
1171         }
1172
1173         host = mmc_priv(mmc);
1174         host->pdev_id = pdev->id;
1175         host->plat = plat;
1176         host->mmc = mmc;
1177         host->curr.cmd = NULL;
1178
1179         host->cmdpoll = 1;
1180
1181         host->base = ioremap(memres->start, PAGE_SIZE);
1182         if (!host->base) {
1183                 ret = -ENOMEM;
1184                 goto out;
1185         }
1186
1187         host->cmd_irqres = cmd_irqres;
1188         host->pio_irqres = pio_irqres;
1189         host->memres = memres;
1190         host->dmares = dmares;
1191         spin_lock_init(&host->lock);
1192
1193         tasklet_init(&host->dma_tlet, msmsdcc_dma_complete_tlet,
1194                         (unsigned long)host);
1195
1196         /*
1197          * Setup DMA
1198          */
1199         msmsdcc_init_dma(host);
1200
1201         /* Get our clocks */
1202         host->pclk = clk_get(&pdev->dev, "sdc_pclk");
1203         if (IS_ERR(host->pclk)) {
1204                 ret = PTR_ERR(host->pclk);
1205                 goto host_free;
1206         }
1207
1208         host->clk = clk_get(&pdev->dev, "sdc_clk");
1209         if (IS_ERR(host->clk)) {
1210                 ret = PTR_ERR(host->clk);
1211                 goto pclk_put;
1212         }
1213
1214         /* Enable clocks */
1215         ret = msmsdcc_enable_clocks(host);
1216         if (ret)
1217                 goto clk_put;
1218
1219         ret = clk_set_rate(host->clk, msmsdcc_fmin);
1220         if (ret) {
1221                 pr_err("%s: Clock rate set failed (%d)\n", __func__, ret);
1222                 goto clk_disable;
1223         }
1224
1225         host->pclk_rate = clk_get_rate(host->pclk);
1226         host->clk_rate = clk_get_rate(host->clk);
1227
1228         /*
1229          * Setup MMC host structure
1230          */
1231         mmc->ops = &msmsdcc_ops;
1232         mmc->f_min = msmsdcc_fmin;
1233         mmc->f_max = msmsdcc_fmax;
1234         mmc->ocr_avail = plat->ocr_mask;
1235
1236         if (msmsdcc_4bit)
1237                 mmc->caps |= MMC_CAP_4_BIT_DATA;
1238         if (msmsdcc_sdioirq)
1239                 mmc->caps |= MMC_CAP_SDIO_IRQ;
1240         mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED;
1241
1242         mmc->max_segs = NR_SG;
1243         mmc->max_blk_size = 4096;       /* MCI_DATA_CTL BLOCKSIZE up to 4096 */
1244         mmc->max_blk_count = 65536;
1245
1246         mmc->max_req_size = 33554432;   /* MCI_DATA_LENGTH is 25 bits */
1247         mmc->max_seg_size = mmc->max_req_size;
1248
1249         msmsdcc_writel(host, 0, MMCIMASK0);
1250         msmsdcc_writel(host, 0x5e007ff, MMCICLEAR);
1251
1252         msmsdcc_writel(host, MCI_IRQENABLE, MMCIMASK0);
1253         host->saved_irq0mask = MCI_IRQENABLE;
1254
1255         /*
1256          * Setup card detect change
1257          */
1258
1259         memset(&host->timer, 0, sizeof(host->timer));
1260
1261         if (stat_irqres && !(stat_irqres->flags & IORESOURCE_DISABLED)) {
1262                 unsigned long irqflags = IRQF_SHARED |
1263                         (stat_irqres->flags & IRQF_TRIGGER_MASK);
1264
1265                 host->stat_irq = stat_irqres->start;
1266                 ret = request_irq(host->stat_irq,
1267                                   msmsdcc_platform_status_irq,
1268                                   irqflags,
1269                                   DRIVER_NAME " (slot)",
1270                                   host);
1271                 if (ret) {
1272                         pr_err("%s: Unable to get slot IRQ %d (%d)\n",
1273                                mmc_hostname(mmc), host->stat_irq, ret);
1274                         goto clk_disable;
1275                 }
1276         } else if (plat->register_status_notify) {
1277                 plat->register_status_notify(msmsdcc_status_notify_cb, host);
1278         } else if (!plat->status)
1279                 pr_err("%s: No card detect facilities available\n",
1280                        mmc_hostname(mmc));
1281         else {
1282                 init_timer(&host->timer);
1283                 host->timer.data = (unsigned long)host;
1284                 host->timer.function = msmsdcc_check_status;
1285                 host->timer.expires = jiffies + HZ;
1286                 add_timer(&host->timer);
1287         }
1288
1289         if (plat->status) {
1290                 host->oldstat = host->plat->status(mmc_dev(host->mmc));
1291                 host->eject = !host->oldstat;
1292         }
1293
1294         init_timer(&host->busclk_timer);
1295         host->busclk_timer.data = (unsigned long) host;
1296         host->busclk_timer.function = msmsdcc_busclk_expired;
1297
1298         ret = request_irq(cmd_irqres->start, msmsdcc_irq, IRQF_SHARED,
1299                           DRIVER_NAME " (cmd)", host);
1300         if (ret)
1301                 goto stat_irq_free;
1302
1303         ret = request_irq(pio_irqres->start, msmsdcc_pio_irq, IRQF_SHARED,
1304                           DRIVER_NAME " (pio)", host);
1305         if (ret)
1306                 goto cmd_irq_free;
1307
1308         mmc_set_drvdata(pdev, mmc);
1309         mmc_add_host(mmc);
1310
1311         pr_info("%s: Qualcomm MSM SDCC at 0x%016llx irq %d,%d dma %d\n",
1312                 mmc_hostname(mmc), (unsigned long long)memres->start,
1313                 (unsigned int) cmd_irqres->start,
1314                 (unsigned int) host->stat_irq, host->dma.channel);
1315         pr_info("%s: 4 bit data mode %s\n", mmc_hostname(mmc),
1316                 (mmc->caps & MMC_CAP_4_BIT_DATA ? "enabled" : "disabled"));
1317         pr_info("%s: MMC clock %u -> %u Hz, PCLK %u Hz\n",
1318                 mmc_hostname(mmc), msmsdcc_fmin, msmsdcc_fmax, host->pclk_rate);
1319         pr_info("%s: Slot eject status = %d\n", mmc_hostname(mmc), host->eject);
1320         pr_info("%s: Power save feature enable = %d\n",
1321                 mmc_hostname(mmc), msmsdcc_pwrsave);
1322
1323         if (host->dma.channel != -1) {
1324                 pr_info("%s: DM non-cached buffer at %p, dma_addr 0x%.8x\n",
1325                         mmc_hostname(mmc), host->dma.nc, host->dma.nc_busaddr);
1326                 pr_info("%s: DM cmd busaddr 0x%.8x, cmdptr busaddr 0x%.8x\n",
1327                         mmc_hostname(mmc), host->dma.cmd_busaddr,
1328                         host->dma.cmdptr_busaddr);
1329         } else
1330                 pr_info("%s: PIO transfer enabled\n", mmc_hostname(mmc));
1331         if (host->timer.function)
1332                 pr_info("%s: Polling status mode enabled\n", mmc_hostname(mmc));
1333
1334 #if BUSCLK_PWRSAVE
1335         msmsdcc_disable_clocks(host, 1);
1336 #endif
1337         return 0;
1338  cmd_irq_free:
1339         free_irq(cmd_irqres->start, host);
1340  stat_irq_free:
1341         if (host->stat_irq)
1342                 free_irq(host->stat_irq, host);
1343  clk_disable:
1344         msmsdcc_disable_clocks(host, 0);
1345  clk_put:
1346         clk_put(host->clk);
1347  pclk_put:
1348         clk_put(host->pclk);
1349  host_free:
1350         mmc_free_host(mmc);
1351  out:
1352         return ret;
1353 }
1354
1355 #ifdef CONFIG_PM
1356 #ifdef CONFIG_MMC_MSM7X00A_RESUME_IN_WQ
1357 static void
1358 do_resume_work(struct work_struct *work)
1359 {
1360         struct msmsdcc_host *host =
1361                 container_of(work, struct msmsdcc_host, resume_task);
1362         struct mmc_host *mmc = host->mmc;
1363
1364         if (mmc) {
1365                 mmc_resume_host(mmc);
1366                 if (host->stat_irq)
1367                         enable_irq(host->stat_irq);
1368         }
1369 }
1370 #endif
1371
1372
1373 static int
1374 msmsdcc_suspend(struct platform_device *dev, pm_message_t state)
1375 {
1376         struct mmc_host *mmc = mmc_get_drvdata(dev);
1377         int rc = 0;
1378
1379         if (mmc) {
1380                 struct msmsdcc_host *host = mmc_priv(mmc);
1381
1382                 if (host->stat_irq)
1383                         disable_irq(host->stat_irq);
1384
1385                 if (mmc->card && mmc->card->type != MMC_TYPE_SDIO)
1386                         rc = mmc_suspend_host(mmc);
1387                 if (!rc)
1388                         msmsdcc_writel(host, 0, MMCIMASK0);
1389                 if (host->clks_on)
1390                         msmsdcc_disable_clocks(host, 0);
1391         }
1392         return rc;
1393 }
1394
1395 static int
1396 msmsdcc_resume(struct platform_device *dev)
1397 {
1398         struct mmc_host *mmc = mmc_get_drvdata(dev);
1399
1400         if (mmc) {
1401                 struct msmsdcc_host *host = mmc_priv(mmc);
1402
1403                 msmsdcc_enable_clocks(host);
1404
1405                 msmsdcc_writel(host, host->saved_irq0mask, MMCIMASK0);
1406
1407                 if (mmc->card && mmc->card->type != MMC_TYPE_SDIO)
1408                         mmc_resume_host(mmc);
1409                 if (host->stat_irq)
1410                         enable_irq(host->stat_irq);
1411 #if BUSCLK_PWRSAVE
1412                 msmsdcc_disable_clocks(host, 1);
1413 #endif
1414         }
1415         return 0;
1416 }
1417 #else
1418 #define msmsdcc_suspend 0
1419 #define msmsdcc_resume 0
1420 #endif
1421
1422 static struct platform_driver msmsdcc_driver = {
1423         .probe          = msmsdcc_probe,
1424         .suspend        = msmsdcc_suspend,
1425         .resume         = msmsdcc_resume,
1426         .driver         = {
1427                 .name   = "msm_sdcc",
1428         },
1429 };
1430
1431 static int __init msmsdcc_init(void)
1432 {
1433         return platform_driver_register(&msmsdcc_driver);
1434 }
1435
1436 static void __exit msmsdcc_exit(void)
1437 {
1438         platform_driver_unregister(&msmsdcc_driver);
1439 }
1440
1441 module_init(msmsdcc_init);
1442 module_exit(msmsdcc_exit);
1443
1444 MODULE_DESCRIPTION("Qualcomm MSM 7X00A Multimedia Card Interface driver");
1445 MODULE_LICENSE("GPL");