2 * Atmel MultiMedia Card Interface driver
4 * Copyright (C) 2004-2008 Atmel Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #include <linux/blkdev.h>
11 #include <linux/clk.h>
12 #include <linux/debugfs.h>
13 #include <linux/device.h>
14 #include <linux/dmaengine.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/err.h>
17 #include <linux/gpio.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/ioport.h>
21 #include <linux/module.h>
22 #include <linux/platform_device.h>
23 #include <linux/scatterlist.h>
24 #include <linux/seq_file.h>
25 #include <linux/stat.h>
27 #include <linux/mmc/host.h>
29 #include <asm/atmel-mci.h>
31 #include <asm/unaligned.h>
33 #include <mach/board.h>
35 #include "atmel-mci-regs.h"
37 #define ATMCI_DATA_ERROR_FLAGS (MCI_DCRCE | MCI_DTOE | MCI_OVRE | MCI_UNRE)
38 #define ATMCI_DMA_THRESHOLD 16
41 EVENT_CMD_COMPLETE = 0,
47 enum atmel_mci_state {
56 struct atmel_mci_dma {
57 #ifdef CONFIG_MMC_ATMELMCI_DMA
58 struct dma_client client;
59 struct dma_chan *chan;
60 struct dma_async_tx_descriptor *data_desc;
65 * struct atmel_mci - MMC controller state shared between all slots
66 * @lock: Spinlock protecting the queue and associated data.
67 * @regs: Pointer to MMIO registers.
68 * @sg: Scatterlist entry currently being processed by PIO code, if any.
69 * @pio_offset: Offset into the current scatterlist entry.
70 * @cur_slot: The slot which is currently using the controller.
71 * @mrq: The request currently being processed on @cur_slot,
72 * or NULL if the controller is idle.
73 * @cmd: The command currently being sent to the card, or NULL.
74 * @data: The data currently being transferred, or NULL if no data
75 * transfer is in progress.
76 * @dma: DMA client state.
77 * @data_chan: DMA channel being used for the current data transfer.
78 * @cmd_status: Snapshot of SR taken upon completion of the current
79 * command. Only valid when EVENT_CMD_COMPLETE is pending.
80 * @data_status: Snapshot of SR taken upon completion of the current
81 * data transfer. Only valid when EVENT_DATA_COMPLETE or
82 * EVENT_DATA_ERROR is pending.
83 * @stop_cmdr: Value to be loaded into CMDR when the stop command is
85 * @tasklet: Tasklet running the request state machine.
86 * @pending_events: Bitmask of events flagged by the interrupt handler
87 * to be processed by the tasklet.
88 * @completed_events: Bitmask of events which the state machine has
90 * @state: Tasklet state.
91 * @queue: List of slots waiting for access to the controller.
92 * @need_clock_update: Update the clock rate before the next request.
93 * @need_reset: Reset controller before next request.
94 * @mode_reg: Value of the MR register.
95 * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus
96 * rate and timeout calculations.
97 * @mapbase: Physical address of the MMIO registers.
98 * @mck: The peripheral bus clock hooked up to the MMC controller.
99 * @pdev: Platform device associated with the MMC controller.
100 * @slot: Slots sharing this MMC controller.
105 * @lock is a softirq-safe spinlock protecting @queue as well as
106 * @cur_slot, @mrq and @state. These must always be updated
107 * at the same time while holding @lock.
109 * @lock also protects mode_reg and need_clock_update since these are
110 * used to synchronize mode register updates with the queue
113 * The @mrq field of struct atmel_mci_slot is also protected by @lock,
114 * and must always be written at the same time as the slot is added to
117 * @pending_events and @completed_events are accessed using atomic bit
118 * operations, so they don't need any locking.
120 * None of the fields touched by the interrupt handler need any
121 * locking. However, ordering is important: Before EVENT_DATA_ERROR or
122 * EVENT_DATA_COMPLETE is set in @pending_events, all data-related
123 * interrupts must be disabled and @data_status updated with a
124 * snapshot of SR. Similarly, before EVENT_CMD_COMPLETE is set, the
125 * CMDRDY interupt must be disabled and @cmd_status updated with a
126 * snapshot of SR, and before EVENT_XFER_COMPLETE can be set, the
127 * bytes_xfered field of @data must be written. This is ensured by
134 struct scatterlist *sg;
135 unsigned int pio_offset;
137 struct atmel_mci_slot *cur_slot;
138 struct mmc_request *mrq;
139 struct mmc_command *cmd;
140 struct mmc_data *data;
142 struct atmel_mci_dma dma;
143 struct dma_chan *data_chan;
149 struct tasklet_struct tasklet;
150 unsigned long pending_events;
151 unsigned long completed_events;
152 enum atmel_mci_state state;
153 struct list_head queue;
155 bool need_clock_update;
158 unsigned long bus_hz;
159 unsigned long mapbase;
161 struct platform_device *pdev;
163 struct atmel_mci_slot *slot[ATMEL_MCI_MAX_NR_SLOTS];
167 * struct atmel_mci_slot - MMC slot state
168 * @mmc: The mmc_host representing this slot.
169 * @host: The MMC controller this slot is using.
170 * @sdc_reg: Value of SDCR to be written before using this slot.
171 * @mrq: mmc_request currently being processed or waiting to be
172 * processed, or NULL when the slot is idle.
173 * @queue_node: List node for placing this node in the @queue list of
175 * @clock: Clock rate configured by set_ios(). Protected by host->lock.
176 * @flags: Random state bits associated with the slot.
177 * @detect_pin: GPIO pin used for card detection, or negative if not
179 * @wp_pin: GPIO pin used for card write protect sending, or negative
181 * @detect_timer: Timer used for debouncing @detect_pin interrupts.
183 struct atmel_mci_slot {
184 struct mmc_host *mmc;
185 struct atmel_mci *host;
189 struct mmc_request *mrq;
190 struct list_head queue_node;
194 #define ATMCI_CARD_PRESENT 0
195 #define ATMCI_CARD_NEED_INIT 1
196 #define ATMCI_SHUTDOWN 2
201 struct timer_list detect_timer;
204 #define atmci_test_and_clear_pending(host, event) \
205 test_and_clear_bit(event, &host->pending_events)
206 #define atmci_set_completed(host, event) \
207 set_bit(event, &host->completed_events)
208 #define atmci_set_pending(host, event) \
209 set_bit(event, &host->pending_events)
212 * The debugfs stuff below is mostly optimized away when
213 * CONFIG_DEBUG_FS is not set.
215 static int atmci_req_show(struct seq_file *s, void *v)
217 struct atmel_mci_slot *slot = s->private;
218 struct mmc_request *mrq;
219 struct mmc_command *cmd;
220 struct mmc_command *stop;
221 struct mmc_data *data;
223 /* Make sure we get a consistent snapshot */
224 spin_lock_bh(&slot->host->lock);
234 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
235 cmd->opcode, cmd->arg, cmd->flags,
236 cmd->resp[0], cmd->resp[1], cmd->resp[2],
237 cmd->resp[2], cmd->error);
239 seq_printf(s, "DATA %u / %u * %u flg %x err %d\n",
240 data->bytes_xfered, data->blocks,
241 data->blksz, data->flags, data->error);
244 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
245 stop->opcode, stop->arg, stop->flags,
246 stop->resp[0], stop->resp[1], stop->resp[2],
247 stop->resp[2], stop->error);
250 spin_unlock_bh(&slot->host->lock);
255 static int atmci_req_open(struct inode *inode, struct file *file)
257 return single_open(file, atmci_req_show, inode->i_private);
260 static const struct file_operations atmci_req_fops = {
261 .owner = THIS_MODULE,
262 .open = atmci_req_open,
265 .release = single_release,
268 static void atmci_show_status_reg(struct seq_file *s,
269 const char *regname, u32 value)
271 static const char *sr_bit[] = {
292 seq_printf(s, "%s:\t0x%08x", regname, value);
293 for (i = 0; i < ARRAY_SIZE(sr_bit); i++) {
294 if (value & (1 << i)) {
296 seq_printf(s, " %s", sr_bit[i]);
298 seq_puts(s, " UNKNOWN");
304 static int atmci_regs_show(struct seq_file *s, void *v)
306 struct atmel_mci *host = s->private;
309 buf = kmalloc(MCI_REGS_SIZE, GFP_KERNEL);
314 * Grab a more or less consistent snapshot. Note that we're
315 * not disabling interrupts, so IMR and SR may not be
318 spin_lock_bh(&host->lock);
319 clk_enable(host->mck);
320 memcpy_fromio(buf, host->regs, MCI_REGS_SIZE);
321 clk_disable(host->mck);
322 spin_unlock_bh(&host->lock);
324 seq_printf(s, "MR:\t0x%08x%s%s CLKDIV=%u\n",
326 buf[MCI_MR / 4] & MCI_MR_RDPROOF ? " RDPROOF" : "",
327 buf[MCI_MR / 4] & MCI_MR_WRPROOF ? " WRPROOF" : "",
328 buf[MCI_MR / 4] & 0xff);
329 seq_printf(s, "DTOR:\t0x%08x\n", buf[MCI_DTOR / 4]);
330 seq_printf(s, "SDCR:\t0x%08x\n", buf[MCI_SDCR / 4]);
331 seq_printf(s, "ARGR:\t0x%08x\n", buf[MCI_ARGR / 4]);
332 seq_printf(s, "BLKR:\t0x%08x BCNT=%u BLKLEN=%u\n",
334 buf[MCI_BLKR / 4] & 0xffff,
335 (buf[MCI_BLKR / 4] >> 16) & 0xffff);
337 /* Don't read RSPR and RDR; it will consume the data there */
339 atmci_show_status_reg(s, "SR", buf[MCI_SR / 4]);
340 atmci_show_status_reg(s, "IMR", buf[MCI_IMR / 4]);
347 static int atmci_regs_open(struct inode *inode, struct file *file)
349 return single_open(file, atmci_regs_show, inode->i_private);
352 static const struct file_operations atmci_regs_fops = {
353 .owner = THIS_MODULE,
354 .open = atmci_regs_open,
357 .release = single_release,
360 static void atmci_init_debugfs(struct atmel_mci_slot *slot)
362 struct mmc_host *mmc = slot->mmc;
363 struct atmel_mci *host = slot->host;
367 root = mmc->debugfs_root;
371 node = debugfs_create_file("regs", S_IRUSR, root, host,
378 node = debugfs_create_file("req", S_IRUSR, root, slot, &atmci_req_fops);
382 node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state);
386 node = debugfs_create_x32("pending_events", S_IRUSR, root,
387 (u32 *)&host->pending_events);
391 node = debugfs_create_x32("completed_events", S_IRUSR, root,
392 (u32 *)&host->completed_events);
399 dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n");
402 static inline unsigned int ns_to_clocks(struct atmel_mci *host,
405 return (ns * (host->bus_hz / 1000000) + 999) / 1000;
408 static void atmci_set_timeout(struct atmel_mci *host,
409 struct atmel_mci_slot *slot, struct mmc_data *data)
411 static unsigned dtomul_to_shift[] = {
412 0, 4, 7, 8, 10, 12, 16, 20
418 timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
420 for (dtomul = 0; dtomul < 8; dtomul++) {
421 unsigned shift = dtomul_to_shift[dtomul];
422 dtocyc = (timeout + (1 << shift) - 1) >> shift;
432 dev_vdbg(&slot->mmc->class_dev, "setting timeout to %u cycles\n",
433 dtocyc << dtomul_to_shift[dtomul]);
434 mci_writel(host, DTOR, (MCI_DTOMUL(dtomul) | MCI_DTOCYC(dtocyc)));
438 * Return mask with command flags to be enabled for this command.
440 static u32 atmci_prepare_command(struct mmc_host *mmc,
441 struct mmc_command *cmd)
443 struct mmc_data *data;
446 cmd->error = -EINPROGRESS;
448 cmdr = MCI_CMDR_CMDNB(cmd->opcode);
450 if (cmd->flags & MMC_RSP_PRESENT) {
451 if (cmd->flags & MMC_RSP_136)
452 cmdr |= MCI_CMDR_RSPTYP_136BIT;
454 cmdr |= MCI_CMDR_RSPTYP_48BIT;
458 * This should really be MAXLAT_5 for CMD2 and ACMD41, but
459 * it's too difficult to determine whether this is an ACMD or
460 * not. Better make it 64.
462 cmdr |= MCI_CMDR_MAXLAT_64CYC;
464 if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
465 cmdr |= MCI_CMDR_OPDCMD;
469 cmdr |= MCI_CMDR_START_XFER;
470 if (data->flags & MMC_DATA_STREAM)
471 cmdr |= MCI_CMDR_STREAM;
472 else if (data->blocks > 1)
473 cmdr |= MCI_CMDR_MULTI_BLOCK;
475 cmdr |= MCI_CMDR_BLOCK;
477 if (data->flags & MMC_DATA_READ)
478 cmdr |= MCI_CMDR_TRDIR_READ;
484 static void atmci_start_command(struct atmel_mci *host,
485 struct mmc_command *cmd, u32 cmd_flags)
490 dev_vdbg(&host->pdev->dev,
491 "start command: ARGR=0x%08x CMDR=0x%08x\n",
492 cmd->arg, cmd_flags);
494 mci_writel(host, ARGR, cmd->arg);
495 mci_writel(host, CMDR, cmd_flags);
498 static void send_stop_cmd(struct atmel_mci *host, struct mmc_data *data)
500 atmci_start_command(host, data->stop, host->stop_cmdr);
501 mci_writel(host, IER, MCI_CMDRDY);
504 #ifdef CONFIG_MMC_ATMELMCI_DMA
505 static void atmci_dma_cleanup(struct atmel_mci *host)
507 struct mmc_data *data = host->data;
509 dma_unmap_sg(&host->pdev->dev, data->sg, data->sg_len,
510 ((data->flags & MMC_DATA_WRITE)
511 ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
514 static void atmci_stop_dma(struct atmel_mci *host)
516 struct dma_chan *chan = host->data_chan;
519 chan->device->device_terminate_all(chan);
520 atmci_dma_cleanup(host);
522 /* Data transfer was stopped by the interrupt handler */
523 atmci_set_pending(host, EVENT_XFER_COMPLETE);
524 mci_writel(host, IER, MCI_NOTBUSY);
528 /* This function is called by the DMA driver from tasklet context. */
529 static void atmci_dma_complete(void *arg)
531 struct atmel_mci *host = arg;
532 struct mmc_data *data = host->data;
534 dev_vdbg(&host->pdev->dev, "DMA complete\n");
536 atmci_dma_cleanup(host);
539 * If the card was removed, data will be NULL. No point trying
540 * to send the stop command or waiting for NBUSY in this case.
543 atmci_set_pending(host, EVENT_XFER_COMPLETE);
544 tasklet_schedule(&host->tasklet);
547 * Regardless of what the documentation says, we have
548 * to wait for NOTBUSY even after block read
551 * When the DMA transfer is complete, the controller
552 * may still be reading the CRC from the card, i.e.
553 * the data transfer is still in progress and we
554 * haven't seen all the potential error bits yet.
556 * The interrupt handler will schedule a different
557 * tasklet to finish things up when the data transfer
558 * is completely done.
560 * We may not complete the mmc request here anyway
561 * because the mmc layer may call back and cause us to
562 * violate the "don't submit new operations from the
563 * completion callback" rule of the dma engine
566 mci_writel(host, IER, MCI_NOTBUSY);
571 atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data)
573 struct dma_chan *chan;
574 struct dma_async_tx_descriptor *desc;
575 struct scatterlist *sg;
577 enum dma_data_direction direction;
580 * We don't do DMA on "complex" transfers, i.e. with
581 * non-word-aligned buffers or lengths. Also, we don't bother
582 * with all the DMA setup overhead for short transfers.
584 if (data->blocks * data->blksz < ATMCI_DMA_THRESHOLD)
589 for_each_sg(data->sg, sg, data->sg_len, i) {
590 if (sg->offset & 3 || sg->length & 3)
594 /* If we don't have a channel, we can't do DMA */
595 chan = host->dma.chan;
597 host->data_chan = chan;
602 if (data->flags & MMC_DATA_READ)
603 direction = DMA_FROM_DEVICE;
605 direction = DMA_TO_DEVICE;
607 desc = chan->device->device_prep_slave_sg(chan,
608 data->sg, data->sg_len, direction,
609 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
613 host->dma.data_desc = desc;
614 desc->callback = atmci_dma_complete;
615 desc->callback_param = host;
616 desc->tx_submit(desc);
619 chan->device->device_issue_pending(chan);
624 #else /* CONFIG_MMC_ATMELMCI_DMA */
626 static int atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data)
631 static void atmci_stop_dma(struct atmel_mci *host)
633 /* Data transfer was stopped by the interrupt handler */
634 atmci_set_pending(host, EVENT_XFER_COMPLETE);
635 mci_writel(host, IER, MCI_NOTBUSY);
638 #endif /* CONFIG_MMC_ATMELMCI_DMA */
641 * Returns a mask of interrupt flags to be enabled after the whole
642 * request has been prepared.
644 static u32 atmci_submit_data(struct atmel_mci *host, struct mmc_data *data)
648 data->error = -EINPROGRESS;
654 iflags = ATMCI_DATA_ERROR_FLAGS;
655 if (atmci_submit_data_dma(host, data)) {
656 host->data_chan = NULL;
659 * Errata: MMC data write operation with less than 12
660 * bytes is impossible.
662 * Errata: MCI Transmit Data Register (TDR) FIFO
663 * corruption when length is not multiple of 4.
665 if (data->blocks * data->blksz < 12
666 || (data->blocks * data->blksz) & 3)
667 host->need_reset = true;
670 host->pio_offset = 0;
671 if (data->flags & MMC_DATA_READ)
680 static void atmci_start_request(struct atmel_mci *host,
681 struct atmel_mci_slot *slot)
683 struct mmc_request *mrq;
684 struct mmc_command *cmd;
685 struct mmc_data *data;
690 host->cur_slot = slot;
693 host->pending_events = 0;
694 host->completed_events = 0;
695 host->data_status = 0;
697 if (host->need_reset) {
698 mci_writel(host, CR, MCI_CR_SWRST);
699 mci_writel(host, CR, MCI_CR_MCIEN);
700 mci_writel(host, MR, host->mode_reg);
701 host->need_reset = false;
703 mci_writel(host, SDCR, slot->sdc_reg);
705 iflags = mci_readl(host, IMR);
707 dev_warn(&slot->mmc->class_dev, "WARNING: IMR=0x%08x\n",
710 if (unlikely(test_and_clear_bit(ATMCI_CARD_NEED_INIT, &slot->flags))) {
711 /* Send init sequence (74 clock cycles) */
712 mci_writel(host, CMDR, MCI_CMDR_SPCMD_INIT);
713 while (!(mci_readl(host, SR) & MCI_CMDRDY))
718 atmci_set_timeout(host, slot, data);
720 /* Must set block count/size before sending command */
721 mci_writel(host, BLKR, MCI_BCNT(data->blocks)
722 | MCI_BLKLEN(data->blksz));
723 dev_vdbg(&slot->mmc->class_dev, "BLKR=0x%08x\n",
724 MCI_BCNT(data->blocks) | MCI_BLKLEN(data->blksz));
729 cmdflags = atmci_prepare_command(slot->mmc, cmd);
730 atmci_start_command(host, cmd, cmdflags);
733 iflags |= atmci_submit_data(host, data);
736 host->stop_cmdr = atmci_prepare_command(slot->mmc, mrq->stop);
737 host->stop_cmdr |= MCI_CMDR_STOP_XFER;
738 if (!(data->flags & MMC_DATA_WRITE))
739 host->stop_cmdr |= MCI_CMDR_TRDIR_READ;
740 if (data->flags & MMC_DATA_STREAM)
741 host->stop_cmdr |= MCI_CMDR_STREAM;
743 host->stop_cmdr |= MCI_CMDR_MULTI_BLOCK;
747 * We could have enabled interrupts earlier, but I suspect
748 * that would open up a nice can of interesting race
749 * conditions (e.g. command and data complete, but stop not
752 mci_writel(host, IER, iflags);
755 static void atmci_queue_request(struct atmel_mci *host,
756 struct atmel_mci_slot *slot, struct mmc_request *mrq)
758 dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n",
761 spin_lock_bh(&host->lock);
763 if (host->state == STATE_IDLE) {
764 host->state = STATE_SENDING_CMD;
765 atmci_start_request(host, slot);
767 list_add_tail(&slot->queue_node, &host->queue);
769 spin_unlock_bh(&host->lock);
772 static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
774 struct atmel_mci_slot *slot = mmc_priv(mmc);
775 struct atmel_mci *host = slot->host;
776 struct mmc_data *data;
781 * We may "know" the card is gone even though there's still an
782 * electrical connection. If so, we really need to communicate
783 * this to the MMC core since there won't be any more
784 * interrupts as the card is completely removed. Otherwise,
785 * the MMC core might believe the card is still there even
786 * though the card was just removed very slowly.
788 if (!test_bit(ATMCI_CARD_PRESENT, &slot->flags)) {
789 mrq->cmd->error = -ENOMEDIUM;
790 mmc_request_done(mmc, mrq);
794 /* We don't support multiple blocks of weird lengths. */
796 if (data && data->blocks > 1 && data->blksz & 3) {
797 mrq->cmd->error = -EINVAL;
798 mmc_request_done(mmc, mrq);
801 atmci_queue_request(host, slot, mrq);
804 static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
806 struct atmel_mci_slot *slot = mmc_priv(mmc);
807 struct atmel_mci *host = slot->host;
810 slot->sdc_reg &= ~MCI_SDCBUS_MASK;
811 switch (ios->bus_width) {
812 case MMC_BUS_WIDTH_1:
813 slot->sdc_reg |= MCI_SDCBUS_1BIT;
815 case MMC_BUS_WIDTH_4:
816 slot->sdc_reg = MCI_SDCBUS_4BIT;
821 unsigned int clock_min = ~0U;
824 spin_lock_bh(&host->lock);
825 if (!host->mode_reg) {
826 clk_enable(host->mck);
827 mci_writel(host, CR, MCI_CR_SWRST);
828 mci_writel(host, CR, MCI_CR_MCIEN);
832 * Use mirror of ios->clock to prevent race with mmc
833 * core ios update when finding the minimum.
835 slot->clock = ios->clock;
836 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
837 if (host->slot[i] && host->slot[i]->clock
838 && host->slot[i]->clock < clock_min)
839 clock_min = host->slot[i]->clock;
842 /* Calculate clock divider */
843 clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * clock_min) - 1;
845 dev_warn(&mmc->class_dev,
846 "clock %u too slow; using %lu\n",
847 clock_min, host->bus_hz / (2 * 256));
852 * WRPROOF and RDPROOF prevent overruns/underruns by
853 * stopping the clock when the FIFO is full/empty.
854 * This state is not expected to last for long.
856 host->mode_reg = MCI_MR_CLKDIV(clkdiv) | MCI_MR_WRPROOF
859 if (list_empty(&host->queue))
860 mci_writel(host, MR, host->mode_reg);
862 host->need_clock_update = true;
864 spin_unlock_bh(&host->lock);
866 bool any_slot_active = false;
868 spin_lock_bh(&host->lock);
870 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
871 if (host->slot[i] && host->slot[i]->clock) {
872 any_slot_active = true;
876 if (!any_slot_active) {
877 mci_writel(host, CR, MCI_CR_MCIDIS);
878 if (host->mode_reg) {
880 clk_disable(host->mck);
884 spin_unlock_bh(&host->lock);
887 switch (ios->power_mode) {
889 set_bit(ATMCI_CARD_NEED_INIT, &slot->flags);
893 * TODO: None of the currently available AVR32-based
894 * boards allow MMC power to be turned off. Implement
895 * power control when this can be tested properly.
897 * We also need to hook this into the clock management
898 * somehow so that newly inserted cards aren't
899 * subjected to a fast clock before we have a chance
900 * to figure out what the maximum rate is. Currently,
901 * there's no way to avoid this, and there never will
902 * be for boards that don't support power control.
908 static int atmci_get_ro(struct mmc_host *mmc)
910 int read_only = -ENOSYS;
911 struct atmel_mci_slot *slot = mmc_priv(mmc);
913 if (gpio_is_valid(slot->wp_pin)) {
914 read_only = gpio_get_value(slot->wp_pin);
915 dev_dbg(&mmc->class_dev, "card is %s\n",
916 read_only ? "read-only" : "read-write");
922 static int atmci_get_cd(struct mmc_host *mmc)
924 int present = -ENOSYS;
925 struct atmel_mci_slot *slot = mmc_priv(mmc);
927 if (gpio_is_valid(slot->detect_pin)) {
928 present = !gpio_get_value(slot->detect_pin);
929 dev_dbg(&mmc->class_dev, "card is %spresent\n",
930 present ? "" : "not ");
936 static const struct mmc_host_ops atmci_ops = {
937 .request = atmci_request,
938 .set_ios = atmci_set_ios,
939 .get_ro = atmci_get_ro,
940 .get_cd = atmci_get_cd,
943 /* Called with host->lock held */
944 static void atmci_request_end(struct atmel_mci *host, struct mmc_request *mrq)
945 __releases(&host->lock)
946 __acquires(&host->lock)
948 struct atmel_mci_slot *slot = NULL;
949 struct mmc_host *prev_mmc = host->cur_slot->mmc;
951 WARN_ON(host->cmd || host->data);
954 * Update the MMC clock rate if necessary. This may be
955 * necessary if set_ios() is called when a different slot is
956 * busy transfering data.
958 if (host->need_clock_update)
959 mci_writel(host, MR, host->mode_reg);
961 host->cur_slot->mrq = NULL;
963 if (!list_empty(&host->queue)) {
964 slot = list_entry(host->queue.next,
965 struct atmel_mci_slot, queue_node);
966 list_del(&slot->queue_node);
967 dev_vdbg(&host->pdev->dev, "list not empty: %s is next\n",
968 mmc_hostname(slot->mmc));
969 host->state = STATE_SENDING_CMD;
970 atmci_start_request(host, slot);
972 dev_vdbg(&host->pdev->dev, "list empty\n");
973 host->state = STATE_IDLE;
976 spin_unlock(&host->lock);
977 mmc_request_done(prev_mmc, mrq);
978 spin_lock(&host->lock);
981 static void atmci_command_complete(struct atmel_mci *host,
982 struct mmc_command *cmd)
984 u32 status = host->cmd_status;
986 /* Read the response from the card (up to 16 bytes) */
987 cmd->resp[0] = mci_readl(host, RSPR);
988 cmd->resp[1] = mci_readl(host, RSPR);
989 cmd->resp[2] = mci_readl(host, RSPR);
990 cmd->resp[3] = mci_readl(host, RSPR);
992 if (status & MCI_RTOE)
993 cmd->error = -ETIMEDOUT;
994 else if ((cmd->flags & MMC_RSP_CRC) && (status & MCI_RCRCE))
995 cmd->error = -EILSEQ;
996 else if (status & (MCI_RINDE | MCI_RDIRE | MCI_RENDE))
1002 dev_dbg(&host->pdev->dev,
1003 "command error: status=0x%08x\n", status);
1007 atmci_stop_dma(host);
1008 mci_writel(host, IDR, MCI_NOTBUSY
1009 | MCI_TXRDY | MCI_RXRDY
1010 | ATMCI_DATA_ERROR_FLAGS);
1015 static void atmci_detect_change(unsigned long data)
1017 struct atmel_mci_slot *slot = (struct atmel_mci_slot *)data;
1022 * atmci_cleanup_slot() sets the ATMCI_SHUTDOWN flag before
1023 * freeing the interrupt. We must not re-enable the interrupt
1024 * if it has been freed, and if we're shutting down, it
1025 * doesn't really matter whether the card is present or not.
1028 if (test_bit(ATMCI_SHUTDOWN, &slot->flags))
1031 enable_irq(gpio_to_irq(slot->detect_pin));
1032 present = !gpio_get_value(slot->detect_pin);
1033 present_old = test_bit(ATMCI_CARD_PRESENT, &slot->flags);
1035 dev_vdbg(&slot->mmc->class_dev, "detect change: %d (was %d)\n",
1036 present, present_old);
1038 if (present != present_old) {
1039 struct atmel_mci *host = slot->host;
1040 struct mmc_request *mrq;
1042 dev_dbg(&slot->mmc->class_dev, "card %s\n",
1043 present ? "inserted" : "removed");
1045 spin_lock(&host->lock);
1048 clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1050 set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1052 /* Clean up queue if present */
1055 if (mrq == host->mrq) {
1057 * Reset controller to terminate any ongoing
1058 * commands or data transfers.
1060 mci_writel(host, CR, MCI_CR_SWRST);
1061 mci_writel(host, CR, MCI_CR_MCIEN);
1062 mci_writel(host, MR, host->mode_reg);
1067 switch (host->state) {
1070 case STATE_SENDING_CMD:
1071 mrq->cmd->error = -ENOMEDIUM;
1075 case STATE_SENDING_DATA:
1076 mrq->data->error = -ENOMEDIUM;
1077 atmci_stop_dma(host);
1079 case STATE_DATA_BUSY:
1080 case STATE_DATA_ERROR:
1081 if (mrq->data->error == -EINPROGRESS)
1082 mrq->data->error = -ENOMEDIUM;
1086 case STATE_SENDING_STOP:
1087 mrq->stop->error = -ENOMEDIUM;
1091 atmci_request_end(host, mrq);
1093 list_del(&slot->queue_node);
1094 mrq->cmd->error = -ENOMEDIUM;
1096 mrq->data->error = -ENOMEDIUM;
1098 mrq->stop->error = -ENOMEDIUM;
1100 spin_unlock(&host->lock);
1101 mmc_request_done(slot->mmc, mrq);
1102 spin_lock(&host->lock);
1105 spin_unlock(&host->lock);
1107 mmc_detect_change(slot->mmc, 0);
1111 static void atmci_tasklet_func(unsigned long priv)
1113 struct atmel_mci *host = (struct atmel_mci *)priv;
1114 struct mmc_request *mrq = host->mrq;
1115 struct mmc_data *data = host->data;
1116 struct mmc_command *cmd = host->cmd;
1117 enum atmel_mci_state state = host->state;
1118 enum atmel_mci_state prev_state;
1121 spin_lock(&host->lock);
1123 state = host->state;
1125 dev_vdbg(&host->pdev->dev,
1126 "tasklet: state %u pending/completed/mask %lx/%lx/%x\n",
1127 state, host->pending_events, host->completed_events,
1128 mci_readl(host, IMR));
1137 case STATE_SENDING_CMD:
1138 if (!atmci_test_and_clear_pending(host,
1139 EVENT_CMD_COMPLETE))
1143 atmci_set_completed(host, EVENT_CMD_COMPLETE);
1144 atmci_command_complete(host, mrq->cmd);
1145 if (!mrq->data || cmd->error) {
1146 atmci_request_end(host, host->mrq);
1150 prev_state = state = STATE_SENDING_DATA;
1153 case STATE_SENDING_DATA:
1154 if (atmci_test_and_clear_pending(host,
1155 EVENT_DATA_ERROR)) {
1156 atmci_stop_dma(host);
1158 send_stop_cmd(host, data);
1159 state = STATE_DATA_ERROR;
1163 if (!atmci_test_and_clear_pending(host,
1164 EVENT_XFER_COMPLETE))
1167 atmci_set_completed(host, EVENT_XFER_COMPLETE);
1168 prev_state = state = STATE_DATA_BUSY;
1171 case STATE_DATA_BUSY:
1172 if (!atmci_test_and_clear_pending(host,
1173 EVENT_DATA_COMPLETE))
1177 atmci_set_completed(host, EVENT_DATA_COMPLETE);
1178 status = host->data_status;
1179 if (unlikely(status & ATMCI_DATA_ERROR_FLAGS)) {
1180 if (status & MCI_DTOE) {
1181 dev_dbg(&host->pdev->dev,
1182 "data timeout error\n");
1183 data->error = -ETIMEDOUT;
1184 } else if (status & MCI_DCRCE) {
1185 dev_dbg(&host->pdev->dev,
1186 "data CRC error\n");
1187 data->error = -EILSEQ;
1189 dev_dbg(&host->pdev->dev,
1190 "data FIFO error (status=%08x)\n",
1195 data->bytes_xfered = data->blocks * data->blksz;
1200 atmci_request_end(host, host->mrq);
1204 prev_state = state = STATE_SENDING_STOP;
1206 send_stop_cmd(host, data);
1209 case STATE_SENDING_STOP:
1210 if (!atmci_test_and_clear_pending(host,
1211 EVENT_CMD_COMPLETE))
1215 atmci_command_complete(host, mrq->stop);
1216 atmci_request_end(host, host->mrq);
1219 case STATE_DATA_ERROR:
1220 if (!atmci_test_and_clear_pending(host,
1221 EVENT_XFER_COMPLETE))
1224 state = STATE_DATA_BUSY;
1227 } while (state != prev_state);
1229 host->state = state;
1232 spin_unlock(&host->lock);
1235 static void atmci_read_data_pio(struct atmel_mci *host)
1237 struct scatterlist *sg = host->sg;
1238 void *buf = sg_virt(sg);
1239 unsigned int offset = host->pio_offset;
1240 struct mmc_data *data = host->data;
1243 unsigned int nbytes = 0;
1246 value = mci_readl(host, RDR);
1247 if (likely(offset + 4 <= sg->length)) {
1248 put_unaligned(value, (u32 *)(buf + offset));
1253 if (offset == sg->length) {
1254 flush_dcache_page(sg_page(sg));
1255 host->sg = sg = sg_next(sg);
1263 unsigned int remaining = sg->length - offset;
1264 memcpy(buf + offset, &value, remaining);
1265 nbytes += remaining;
1267 flush_dcache_page(sg_page(sg));
1268 host->sg = sg = sg_next(sg);
1272 offset = 4 - remaining;
1274 memcpy(buf, (u8 *)&value + remaining, offset);
1278 status = mci_readl(host, SR);
1279 if (status & ATMCI_DATA_ERROR_FLAGS) {
1280 mci_writel(host, IDR, (MCI_NOTBUSY | MCI_RXRDY
1281 | ATMCI_DATA_ERROR_FLAGS));
1282 host->data_status = status;
1283 data->bytes_xfered += nbytes;
1285 atmci_set_pending(host, EVENT_DATA_ERROR);
1286 tasklet_schedule(&host->tasklet);
1289 } while (status & MCI_RXRDY);
1291 host->pio_offset = offset;
1292 data->bytes_xfered += nbytes;
1297 mci_writel(host, IDR, MCI_RXRDY);
1298 mci_writel(host, IER, MCI_NOTBUSY);
1299 data->bytes_xfered += nbytes;
1301 atmci_set_pending(host, EVENT_XFER_COMPLETE);
1304 static void atmci_write_data_pio(struct atmel_mci *host)
1306 struct scatterlist *sg = host->sg;
1307 void *buf = sg_virt(sg);
1308 unsigned int offset = host->pio_offset;
1309 struct mmc_data *data = host->data;
1312 unsigned int nbytes = 0;
1315 if (likely(offset + 4 <= sg->length)) {
1316 value = get_unaligned((u32 *)(buf + offset));
1317 mci_writel(host, TDR, value);
1321 if (offset == sg->length) {
1322 host->sg = sg = sg_next(sg);
1330 unsigned int remaining = sg->length - offset;
1333 memcpy(&value, buf + offset, remaining);
1334 nbytes += remaining;
1336 host->sg = sg = sg_next(sg);
1338 mci_writel(host, TDR, value);
1342 offset = 4 - remaining;
1344 memcpy((u8 *)&value + remaining, buf, offset);
1345 mci_writel(host, TDR, value);
1349 status = mci_readl(host, SR);
1350 if (status & ATMCI_DATA_ERROR_FLAGS) {
1351 mci_writel(host, IDR, (MCI_NOTBUSY | MCI_TXRDY
1352 | ATMCI_DATA_ERROR_FLAGS));
1353 host->data_status = status;
1354 data->bytes_xfered += nbytes;
1356 atmci_set_pending(host, EVENT_DATA_ERROR);
1357 tasklet_schedule(&host->tasklet);
1360 } while (status & MCI_TXRDY);
1362 host->pio_offset = offset;
1363 data->bytes_xfered += nbytes;
1368 mci_writel(host, IDR, MCI_TXRDY);
1369 mci_writel(host, IER, MCI_NOTBUSY);
1370 data->bytes_xfered += nbytes;
1372 atmci_set_pending(host, EVENT_XFER_COMPLETE);
1375 static void atmci_cmd_interrupt(struct atmel_mci *host, u32 status)
1377 mci_writel(host, IDR, MCI_CMDRDY);
1379 host->cmd_status = status;
1381 atmci_set_pending(host, EVENT_CMD_COMPLETE);
1382 tasklet_schedule(&host->tasklet);
1385 static irqreturn_t atmci_interrupt(int irq, void *dev_id)
1387 struct atmel_mci *host = dev_id;
1388 u32 status, mask, pending;
1389 unsigned int pass_count = 0;
1392 status = mci_readl(host, SR);
1393 mask = mci_readl(host, IMR);
1394 pending = status & mask;
1398 if (pending & ATMCI_DATA_ERROR_FLAGS) {
1399 mci_writel(host, IDR, ATMCI_DATA_ERROR_FLAGS
1400 | MCI_RXRDY | MCI_TXRDY);
1401 pending &= mci_readl(host, IMR);
1403 host->data_status = status;
1405 atmci_set_pending(host, EVENT_DATA_ERROR);
1406 tasklet_schedule(&host->tasklet);
1408 if (pending & MCI_NOTBUSY) {
1409 mci_writel(host, IDR,
1410 ATMCI_DATA_ERROR_FLAGS | MCI_NOTBUSY);
1411 if (!host->data_status)
1412 host->data_status = status;
1414 atmci_set_pending(host, EVENT_DATA_COMPLETE);
1415 tasklet_schedule(&host->tasklet);
1417 if (pending & MCI_RXRDY)
1418 atmci_read_data_pio(host);
1419 if (pending & MCI_TXRDY)
1420 atmci_write_data_pio(host);
1422 if (pending & MCI_CMDRDY)
1423 atmci_cmd_interrupt(host, status);
1424 } while (pass_count++ < 5);
1426 return pass_count ? IRQ_HANDLED : IRQ_NONE;
1429 static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id)
1431 struct atmel_mci_slot *slot = dev_id;
1434 * Disable interrupts until the pin has stabilized and check
1435 * the state then. Use mod_timer() since we may be in the
1436 * middle of the timer routine when this interrupt triggers.
1438 disable_irq_nosync(irq);
1439 mod_timer(&slot->detect_timer, jiffies + msecs_to_jiffies(20));
1444 static int __init atmci_init_slot(struct atmel_mci *host,
1445 struct mci_slot_pdata *slot_data, unsigned int id,
1448 struct mmc_host *mmc;
1449 struct atmel_mci_slot *slot;
1451 mmc = mmc_alloc_host(sizeof(struct atmel_mci_slot), &host->pdev->dev);
1455 slot = mmc_priv(mmc);
1458 slot->detect_pin = slot_data->detect_pin;
1459 slot->wp_pin = slot_data->wp_pin;
1460 slot->sdc_reg = sdc_reg;
1462 mmc->ops = &atmci_ops;
1463 mmc->f_min = DIV_ROUND_UP(host->bus_hz, 512);
1464 mmc->f_max = host->bus_hz / 2;
1465 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
1466 if (slot_data->bus_width >= 4)
1467 mmc->caps |= MMC_CAP_4_BIT_DATA;
1469 mmc->max_hw_segs = 64;
1470 mmc->max_phys_segs = 64;
1471 mmc->max_req_size = 32768 * 512;
1472 mmc->max_blk_size = 32768;
1473 mmc->max_blk_count = 512;
1475 /* Assume card is present initially */
1476 set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1477 if (gpio_is_valid(slot->detect_pin)) {
1478 if (gpio_request(slot->detect_pin, "mmc_detect")) {
1479 dev_dbg(&mmc->class_dev, "no detect pin available\n");
1480 slot->detect_pin = -EBUSY;
1481 } else if (gpio_get_value(slot->detect_pin)) {
1482 clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1486 if (!gpio_is_valid(slot->detect_pin))
1487 mmc->caps |= MMC_CAP_NEEDS_POLL;
1489 if (gpio_is_valid(slot->wp_pin)) {
1490 if (gpio_request(slot->wp_pin, "mmc_wp")) {
1491 dev_dbg(&mmc->class_dev, "no WP pin available\n");
1492 slot->wp_pin = -EBUSY;
1496 host->slot[id] = slot;
1499 if (gpio_is_valid(slot->detect_pin)) {
1502 setup_timer(&slot->detect_timer, atmci_detect_change,
1503 (unsigned long)slot);
1505 ret = request_irq(gpio_to_irq(slot->detect_pin),
1506 atmci_detect_interrupt,
1507 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
1508 "mmc-detect", slot);
1510 dev_dbg(&mmc->class_dev,
1511 "could not request IRQ %d for detect pin\n",
1512 gpio_to_irq(slot->detect_pin));
1513 gpio_free(slot->detect_pin);
1514 slot->detect_pin = -EBUSY;
1518 atmci_init_debugfs(slot);
1523 static void __exit atmci_cleanup_slot(struct atmel_mci_slot *slot,
1526 /* Debugfs stuff is cleaned up by mmc core */
1528 set_bit(ATMCI_SHUTDOWN, &slot->flags);
1531 mmc_remove_host(slot->mmc);
1533 if (gpio_is_valid(slot->detect_pin)) {
1534 int pin = slot->detect_pin;
1536 free_irq(gpio_to_irq(pin), slot);
1537 del_timer_sync(&slot->detect_timer);
1540 if (gpio_is_valid(slot->wp_pin))
1541 gpio_free(slot->wp_pin);
1543 slot->host->slot[id] = NULL;
1544 mmc_free_host(slot->mmc);
1547 #ifdef CONFIG_MMC_ATMELMCI_DMA
1548 static enum dma_state_client filter(struct dma_chan *chan, void *slave)
1550 struct dw_dma_slave *dws = slave;
1552 if (dws->dma_dev == chan->device->dev)
1559 static int __init atmci_probe(struct platform_device *pdev)
1561 struct mci_platform_data *pdata;
1562 struct atmel_mci *host;
1563 struct resource *regs;
1564 unsigned int nr_slots;
1568 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1571 pdata = pdev->dev.platform_data;
1574 irq = platform_get_irq(pdev, 0);
1578 host = kzalloc(sizeof(struct atmel_mci), GFP_KERNEL);
1583 spin_lock_init(&host->lock);
1584 INIT_LIST_HEAD(&host->queue);
1586 host->mck = clk_get(&pdev->dev, "mci_clk");
1587 if (IS_ERR(host->mck)) {
1588 ret = PTR_ERR(host->mck);
1593 host->regs = ioremap(regs->start, regs->end - regs->start + 1);
1597 clk_enable(host->mck);
1598 mci_writel(host, CR, MCI_CR_SWRST);
1599 host->bus_hz = clk_get_rate(host->mck);
1600 clk_disable(host->mck);
1602 host->mapbase = regs->start;
1604 tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)host);
1606 ret = request_irq(irq, atmci_interrupt, 0, pdev->dev.bus_id, host);
1608 goto err_request_irq;
1610 #ifdef CONFIG_MMC_ATMELMCI_DMA
1611 if (pdata->dma_slave.dma_dev) {
1612 struct dw_dma_slave *dws = &pdata->dma_slave;
1613 dma_cap_mask_t mask;
1615 dws->tx_reg = regs->start + MCI_TDR;
1616 dws->rx_reg = regs->start + MCI_RDR;
1618 /* Try to grab a DMA channel */
1620 dma_cap_set(DMA_SLAVE, mask);
1621 host->dma.chan = dma_request_channel(mask, filter, dws);
1623 if (!host->dma.chan)
1624 dev_notice(&pdev->dev, "DMA not available, using PIO\n");
1625 #endif /* CONFIG_MMC_ATMELMCI_DMA */
1627 platform_set_drvdata(pdev, host);
1629 /* We need at least one slot to succeed */
1632 if (pdata->slot[0].bus_width) {
1633 ret = atmci_init_slot(host, &pdata->slot[0],
1634 MCI_SDCSEL_SLOT_A, 0);
1638 if (pdata->slot[1].bus_width) {
1639 ret = atmci_init_slot(host, &pdata->slot[1],
1640 MCI_SDCSEL_SLOT_B, 1);
1648 dev_info(&pdev->dev,
1649 "Atmel MCI controller at 0x%08lx irq %d, %u slots\n",
1650 host->mapbase, irq, nr_slots);
1655 #ifdef CONFIG_MMC_ATMELMCI_DMA
1657 dma_release_channel(host->dma.chan);
1659 free_irq(irq, host);
1661 iounmap(host->regs);
1669 static int __exit atmci_remove(struct platform_device *pdev)
1671 struct atmel_mci *host = platform_get_drvdata(pdev);
1674 platform_set_drvdata(pdev, NULL);
1676 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
1678 atmci_cleanup_slot(host->slot[i], i);
1681 clk_enable(host->mck);
1682 mci_writel(host, IDR, ~0UL);
1683 mci_writel(host, CR, MCI_CR_MCIDIS);
1684 mci_readl(host, SR);
1685 clk_disable(host->mck);
1687 #ifdef CONFIG_MMC_ATMELMCI_DMA
1689 dma_release_channel(host->dma.chan);
1692 free_irq(platform_get_irq(pdev, 0), host);
1693 iounmap(host->regs);
1701 static struct platform_driver atmci_driver = {
1702 .remove = __exit_p(atmci_remove),
1704 .name = "atmel_mci",
1708 static int __init atmci_init(void)
1710 return platform_driver_probe(&atmci_driver, atmci_probe);
1713 static void __exit atmci_exit(void)
1715 platform_driver_unregister(&atmci_driver);
1718 late_initcall(atmci_init); /* try to load after dma driver when built-in */
1719 module_exit(atmci_exit);
1721 MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
1722 MODULE_AUTHOR("Haavard Skinnemoen <haavard.skinnemoen@atmel.com>");
1723 MODULE_LICENSE("GPL v2");