2 * OMAP CPU overclocking hacks
4 * Licensed under the GPL-2 or later.
6 #include <linux/kernel.h>
7 #include <linux/module.h>
8 #include <linux/proc_fs.h>
10 #include <linux/clk.h>
11 #include <linux/uaccess.h>
12 #include <linux/regulator/consumer.h>
14 #include <plat/omap_device.h>
16 #define PROC_DIR "pandora"
17 #define PROC_CPUMHZ "pandora/cpu_mhz_max"
18 #define PROC_DSPMHZ "pandora/dsp_mhz_max"
19 #define PROC_CPUOPP "pandora/cpu_opp_max"
20 #define PROC_SYSMHZ "pandora/sys_mhz_max"
22 static struct device *mpu_dev;
24 static struct device *iva_dev;
25 static struct regulator *iva_reg;
26 static struct clk *iva_clk;
27 static DEFINE_MUTEX(iva_lock);
28 static struct delayed_work iva_work;
29 static int iva_mhz_max;
30 static int iva_opp_min;
31 static int iva_active;
33 /* XXX: could use opp3xxx_data.c, but that's initdata.. */
34 static const unsigned long nominal_f_mpu_35xx[] = {
35 125000000, 250000000, 500000000, 550000000, 600000000,
38 static const unsigned long nominal_f_mpu_36xx[] = {
39 300000000, 600000000, 800000000, 1000000000,
42 static const unsigned long nominal_f_iva_35xx[] = {
43 90000000, 180000000, 360000000, 400000000, 430000000,
46 static const unsigned long nominal_f_iva_36xx[] = {
47 260000000, 520000000, 660000000, 800000000,
50 static const unsigned long *nominal_freqs_mpu;
51 static const unsigned long *nominal_freqs_iva;
53 /* IVA voltages (MPU ones are managed by cpufreq) */
54 static unsigned long iva_voltages[5];
56 static int opp_max_avail, opp_max_now, opp_max_ceil;
58 static int set_mpu_opp_max(int new_opp_max)
62 if (new_opp_max == opp_max_now)
65 for (i = 1; i < new_opp_max; i++) {
66 ret = opp_enable_i(mpu_dev, i);
68 dev_err(mpu_dev, "%s: mpu opp_enable returned %d\n",
72 for (i = new_opp_max; i < opp_max_avail; i++) {
73 ret = opp_disable_i(mpu_dev, i);
75 dev_err(mpu_dev, "%s: mpu opp_disable returned %d\n",
79 dev_info(mpu_dev, "max MPU OPP set to %d\n", new_opp_max);
80 opp_max_now = new_opp_max;
85 static int set_opp_max_ceil(int new_opp_max)
87 opp_max_ceil = new_opp_max;
88 return set_mpu_opp_max(new_opp_max);
91 static int set_mpu_mhz_max(unsigned long new_mhz_max)
93 unsigned long cur_mhz_max = 0;
96 new_mhz_max *= 1000000;
98 if (opp_max_ceil < 1 || opp_max_ceil > opp_max_avail) {
99 pr_err("%s: corrupt opp_max_ceil: %d\n",
100 __func__, opp_max_ceil);
104 /* determine minimum OPP needed for given MPU clock limit,
105 * and limit that opp as maximum OPP.
106 * This is for cpufreq governors only. */
107 index = opp_max_ceil - 1;
108 while (index > 0 && new_mhz_max <= nominal_freqs_mpu[index - 1])
111 set_mpu_opp_max(index + 1);
113 opp_hack_get_freq(mpu_dev, index, &cur_mhz_max);
114 if (cur_mhz_max == new_mhz_max)
117 ret = opp_hack_set_freq(mpu_dev, index, new_mhz_max);
119 dev_err(mpu_dev, "%s: opp_hack_set_freq returned %d\n",
127 static int get_mpu_mhz_max(void)
129 unsigned long cur_mhz_max = 0;
131 if (opp_max_now < 1 || opp_max_now > opp_max_avail) {
132 pr_err("%s: corrupt opp_max: %d\n", __func__, opp_max_now);
136 opp_hack_get_freq(mpu_dev, opp_max_now - 1, &cur_mhz_max);
138 return cur_mhz_max / 1000000;
141 static void update_iva_opp_limit(int target_mhz)
146 for (i = 0; i < opp_max_ceil - 1; i++) {
147 if (target_mhz * 1000000 <= nominal_freqs_iva[i])
151 if (iva_opp_min == i + 1)
154 //dev_info(iva_dev, "new IVA OPP %d for clock %d\n",
155 // i + 1, target_mhz);
157 volt_max = iva_voltages[opp_max_avail - 1];
158 volt_max += volt_max * 4 / 100;
160 ret = regulator_set_voltage(iva_reg, iva_voltages[i], volt_max);
162 dev_warn(iva_dev, "unable to set IVA OPP limits: %d\n", ret);
167 static int set_dsp_mhz_max(unsigned long new_mhz_max)
171 mutex_lock(&iva_lock);
173 if (iva_active && new_mhz_max > iva_mhz_max)
175 update_iva_opp_limit(new_mhz_max);
177 ret = clk_set_rate(iva_clk, new_mhz_max * 1000000);
179 dev_warn(iva_dev, "unable to change IVA clock to %lu: %d\n",
184 if (iva_active && new_mhz_max < iva_mhz_max)
186 update_iva_opp_limit(new_mhz_max);
188 iva_mhz_max = new_mhz_max;
190 mutex_unlock(&iva_lock);
195 static int get_dsp_mhz_max(void)
200 static void iva_unneeded_work(struct work_struct *work)
202 mutex_lock(&iva_lock);
204 update_iva_opp_limit(0);
207 mutex_unlock(&iva_lock);
210 /* called from c64_tools */
211 void dsp_power_notify(int enable)
214 cancel_delayed_work_sync(&iva_work);
216 mutex_lock(&iva_lock);
219 mutex_unlock(&iva_lock);
223 /* apply the OPP limit */
224 update_iva_opp_limit(iva_mhz_max);
227 mutex_unlock(&iva_lock);
233 cancel_delayed_work_sync(&iva_work);
234 schedule_delayed_work(&iva_work, HZ * 2);
237 EXPORT_SYMBOL(dsp_power_notify);
239 static int init_opp_hacks(void)
245 if (cpu_is_omap3630()) {
246 nominal_freqs_mpu = nominal_f_mpu_36xx;
247 nominal_freqs_iva = nominal_f_iva_36xx;
248 opp_max_avail = sizeof(nominal_f_mpu_36xx) / sizeof(nominal_f_mpu_36xx[0]);
250 } else if (cpu_is_omap34xx()) {
251 nominal_freqs_mpu = nominal_f_mpu_35xx;
252 nominal_freqs_iva = nominal_f_iva_35xx;
253 opp_max_avail = sizeof(nominal_f_mpu_35xx) / sizeof(nominal_f_mpu_35xx[0]);
254 opp_max_ceil = opp_max_avail;
256 dev_err(mpu_dev, "%s: unsupported CPU\n", __func__);
259 opp_max_now = opp_max_ceil;
261 for (i = 0; i < opp_max_avail; i++) {
262 /* enable all OPPs for MPU so that cpufreq can find out
263 * maximum voltage to supply to regulator as max */
264 ret = opp_enable_i(mpu_dev, i);
266 dev_err(mpu_dev, "opp_enable returned %d\n", ret);
270 ret = opp_enable_i(iva_dev, i);
272 dev_err(iva_dev, "opp_enable returned %d\n", ret);
276 opp = opp_find_freq_exact(iva_dev, nominal_freqs_iva[i], true);
278 dev_err(iva_dev, "mising opp %d, %lu\n",
279 i, nominal_freqs_iva[i]);
282 iva_voltages[i] = opp_get_voltage(opp);
285 iva_init_freq = nominal_freqs_iva[(i + 1) / 2];
286 ret = clk_set_rate(iva_clk, iva_init_freq);
288 iva_mhz_max = iva_init_freq / 1000000;
289 dev_info(iva_dev, "IVA freq set to %dMHz\n", iva_mhz_max);
292 dev_err(iva_dev, "IVA freq set failed: %d\n", ret);
297 static int set_sys_mhz_max(unsigned long rate)
299 struct clk *dpll3_m2_ck;
304 dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck");
305 if (IS_ERR(dpll3_m2_ck)) {
306 pr_err("%s: dpll3_m2_clk not available: %ld\n",
307 __func__, PTR_ERR(dpll3_m2_ck));
311 pr_info("Reprogramming CORE clock to %luHz\n", rate);
312 ret = clk_set_rate(dpll3_m2_ck, rate);
314 pr_err("dpll3_m2_clk rate change failed: %d\n", ret);
316 clk_put(dpll3_m2_ck);
321 static int get_sys_mhz_max(void)
323 struct clk *dpll3_m2_ck;
326 dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck");
327 if (IS_ERR(dpll3_m2_ck)) {
328 pr_err("%s: dpll3_m2_clk not available: %ld\n",
329 __func__, PTR_ERR(dpll3_m2_ck));
333 ret = clk_get_rate(dpll3_m2_ck);
334 clk_put(dpll3_m2_ck);
336 return ret / 1000000;
339 static int proc_read_val(char *page, char **start, off_t off, int count,
345 p += sprintf(p, "%d\n", val);
347 len = (p - page) - off;
351 *eof = (len <= count) ? 1 : 0;
357 static int proc_write_val(struct file *file, const char __user *buffer,
358 unsigned long count, unsigned long *val)
363 count = strncpy_from_user(buff, buffer,
364 count < sizeof(buff) ? count : sizeof(buff) - 1);
367 ret = strict_strtoul(buff, 0, val);
369 pr_err("error %i parsing %s\n", ret, buff);
376 static int cpu_clk_read(char *page, char **start, off_t off, int count,
377 int *eof, void *data)
379 return proc_read_val(page, start, off, count, eof, get_mpu_mhz_max());
382 static int cpu_clk_write(struct file *file, const char __user *buffer,
383 unsigned long count, void *data)
388 retval = proc_write_val(file, buffer, count, &val);
392 ret = set_mpu_mhz_max(val);
399 static int dsp_clk_read(char *page, char **start, off_t off, int count,
400 int *eof, void *data)
402 return proc_read_val(page, start, off, count, eof, get_dsp_mhz_max());
405 static int dsp_clk_write(struct file *file, const char __user *buffer,
406 unsigned long count, void *data)
411 retval = proc_write_val(file, buffer, count, &val);
415 ret = set_dsp_mhz_max(val);
422 static int cpu_maxopp_read(char *page, char **start, off_t off, int count,
423 int *eof, void *data)
425 return proc_read_val(page, start, off, count, eof, opp_max_ceil);
428 static int cpu_maxopp_write(struct file *file, const char __user *buffer,
429 unsigned long count, void *data)
434 retval = proc_write_val(file, buffer, count, &val);
438 if (val > opp_max_avail)
444 ret = set_opp_max_ceil(val);
451 static int sys_clk_read(char *page, char **start, off_t off, int count,
452 int *eof, void *data)
454 return proc_read_val(page, start, off, count, eof, get_sys_mhz_max());
457 static int sys_clk_write(struct file *file, const char __user *buffer,
458 unsigned long count, void *data)
463 retval = proc_write_val(file, buffer, count, &val);
467 ret = set_sys_mhz_max(val);
474 static void proc_create_rw(const char *name, void *pdata,
475 read_proc_t *read_proc, write_proc_t *write_proc)
477 struct proc_dir_entry *pret;
479 pret = create_proc_entry(name, S_IWUSR | S_IRUGO, NULL);
481 proc_mkdir(PROC_DIR, NULL);
482 pret = create_proc_entry(name, S_IWUSR | S_IRUGO, NULL);
484 pr_err("%s: failed to create proc file %s\n",
491 pret->read_proc = read_proc;
492 pret->write_proc = write_proc;
495 static int pndctrl_init(void)
499 INIT_DELAYED_WORK(&iva_work, iva_unneeded_work);
501 mpu_dev = omap_device_get_by_hwmod_name("mpu");
502 if (IS_ERR(mpu_dev)) {
503 pr_err("%s: mpu device not available (%ld)\n",
504 __func__, PTR_ERR(mpu_dev));
508 iva_dev = omap_device_get_by_hwmod_name("iva");
509 if (IS_ERR(iva_dev)) {
510 pr_err("%s: iva device not available (%ld)\n",
511 __func__, PTR_ERR(iva_dev));
515 /* regulator to constrain OPPs while DSP is running */
516 iva_reg = regulator_get(iva_dev, "vcc");
517 if (IS_ERR(iva_reg)) {
518 dev_err(iva_dev, "unable to get MPU regulator\n");
523 * Ensure physical regulator is present.
524 * (e.g. could be dummy regulator.)
526 if (regulator_get_voltage(iva_reg) < 0) {
527 dev_err(iva_dev, "IVA regulator is not physical?\n");
532 iva_clk = clk_get(NULL, "dpll2_ck");
533 if (IS_ERR(iva_clk)) {
534 dev_err(iva_dev, "IVA clock not available.\n");
535 ret = PTR_ERR(iva_clk);
539 ret = init_opp_hacks();
541 pr_err("init_opp_hacks failed: %d\n", ret);
545 proc_create_rw(PROC_CPUMHZ, NULL, cpu_clk_read, cpu_clk_write);
546 proc_create_rw(PROC_DSPMHZ, NULL, dsp_clk_read, dsp_clk_write);
547 proc_create_rw(PROC_CPUOPP, NULL, cpu_maxopp_read, cpu_maxopp_write);
548 proc_create_rw(PROC_SYSMHZ, NULL, sys_clk_read, sys_clk_write);
550 pr_info("OMAP overclocker loaded.\n");
556 regulator_put(iva_reg);
561 static void pndctrl_cleanup(void)
563 remove_proc_entry(PROC_SYSMHZ, NULL);
564 remove_proc_entry(PROC_CPUOPP, NULL);
565 remove_proc_entry(PROC_DSPMHZ, NULL);
566 remove_proc_entry(PROC_CPUMHZ, NULL);
568 cancel_delayed_work_sync(&iva_work);
569 regulator_put(iva_reg);
573 module_init(pndctrl_init);
574 module_exit(pndctrl_cleanup);
576 MODULE_AUTHOR("GraÅžvydas Ignotas");
577 MODULE_LICENSE("GPL");
578 MODULE_DESCRIPTION("OMAP overclocking support");