drivers/message/fusion/lsi/mpi_ioc.h

   1 /*
   2  *  Copyright (c) 2000-2005 LSI Logic Corporation.
   3  *
   4  *
   5  *           Name:  mpi_ioc.h
   6  *          Title:  MPI IOC, Port, Event, FW Download, and FW Upload messages
   7  *  Creation Date:  August 11, 2000
   8  *
   9  *    mpi_ioc.h Version:  01.05.11
  10  *
  11  *  Version History
  12  *  ---------------
  13  *
  14  *  Date      Version   Description
  15  *  --------  --------  ------------------------------------------------------
  16  *  05-08-00  00.10.01  Original release for 0.10 spec dated 4/26/2000.
  17  *  05-24-00  00.10.02  Added _MSG_IOC_INIT_REPLY structure.
  18  *  06-06-00  01.00.01  Added CurReplyFrameSize field to _MSG_IOC_FACTS_REPLY.
  19  *  06-12-00  01.00.02  Added _MSG_PORT_ENABLE_REPLY structure.
  20  *                      Added _MSG_EVENT_ACK_REPLY structure.
  21  *                      Added _MSG_FW_DOWNLOAD_REPLY structure.
  22  *                      Added _MSG_TOOLBOX_REPLY structure.
  23  *  06-30-00  01.00.03  Added MaxLanBuckets to _PORT_FACT_REPLY structure.
  24  *  07-27-00  01.00.04  Added _EVENT_DATA structure definitions for _SCSI,
  25  *                      _LINK_STATUS, _LOOP_STATE and _LOGOUT.
  26  *  08-11-00  01.00.05  Switched positions of MsgLength and Function fields in
  27  *                      _MSG_EVENT_ACK_REPLY structure to match specification.
  28  *  11-02-00  01.01.01  Original release for post 1.0 work.
  29  *                      Added a value for Manufacturer to WhoInit.
  30  *  12-04-00  01.01.02  Modified IOCFacts reply, added FWUpload messages, and
  31  *                      removed toolbox message.
  32  *  01-09-01  01.01.03  Added event enabled and disabled defines.
  33  *                      Added structures for FwHeader and DataHeader.
  34  *                      Added ImageType to FwUpload reply.
  35  *  02-20-01  01.01.04  Started using MPI_POINTER.
  36  *  02-27-01  01.01.05  Added event for RAID status change and its event data.
  37  *                      Added IocNumber field to MSG_IOC_FACTS_REPLY.
  38  *  03-27-01  01.01.06  Added defines for ProductId field of MPI_FW_HEADER.
  39  *                      Added structure offset comments.
  40  *  04-09-01  01.01.07  Added structure EVENT_DATA_EVENT_CHANGE.
  41  *  08-08-01  01.02.01  Original release for v1.2 work.
  42  *                      New format for FWVersion and ProductId in
  43  *                      MSG_IOC_FACTS_REPLY and MPI_FW_HEADER.
  44  *  08-31-01  01.02.02  Addded event MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE and
  45  *                      related structure and defines.
  46  *                      Added event MPI_EVENT_ON_BUS_TIMER_EXPIRED.
  47  *                      Added MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE.
  48  *                      Replaced a reserved field in MSG_IOC_FACTS_REPLY with
  49  *                      IOCExceptions and changed DataImageSize to reserved.
  50  *                      Added MPI_FW_DOWNLOAD_ITYPE_NVSTORE_DATA and
  51  *                      MPI_FW_UPLOAD_ITYPE_NVDATA.
  52  *  09-28-01  01.02.03  Modified Event Data for Integrated RAID.
  53  *  11-01-01  01.02.04  Added defines for MPI_EXT_IMAGE_HEADER ImageType field.
  54  *  03-14-02  01.02.05  Added HeaderVersion field to MSG_IOC_FACTS_REPLY.
  55  *  05-31-02  01.02.06  Added define for
  56  *                      MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID.
  57  *                      Added AliasIndex to EVENT_DATA_LOGOUT structure.
  58  *  04-01-03  01.02.07  Added defines for MPI_FW_HEADER_SIGNATURE_.
  59  *  06-26-03  01.02.08  Added new values to the product family defines.
  60  *  04-29-04  01.02.09  Added IOCCapabilities field to MSG_IOC_FACTS_REPLY and
  61  *                      added related defines.
  62  *  05-11-04  01.03.01  Original release for MPI v1.3.
  63  *  08-19-04  01.05.01  Added four new fields to MSG_IOC_INIT.
  64  *                      Added three new fields to MSG_IOC_FACTS_REPLY.
  65  *                      Defined four new bits for the IOCCapabilities field of
  66  *                      the IOCFacts reply.
  67  *                      Added two new PortTypes for the PortFacts reply.
  68  *                      Added six new events along with their EventData
  69  *                      structures.
  70  *                      Added a new MsgFlag to the FwDownload request to
  71  *                      indicate last segment.
  72  *                      Defined a new image type of boot loader.
  73  *                      Added FW family codes for SAS product families.
  74  *  10-05-04  01.05.02  Added ReplyFifoHostSignalingAddr field to
  75  *                      MSG_IOC_FACTS_REPLY.
  76  *  12-07-04  01.05.03  Added more defines for SAS Discovery Error event.
  77  *  12-09-04  01.05.04  Added Unsupported device to SAS Device event.
  78  *  01-15-05  01.05.05  Added event data for SAS SES Event.
  79  *  02-09-05  01.05.06  Added MPI_FW_UPLOAD_ITYPE_FW_BACKUP define.
  80  *  02-22-05  01.05.07  Added Host Page Buffer Persistent flag to IOC Facts
  81  *                      Reply and IOC Init Request.
  82  *  03-11-05  01.05.08  Added family code for 1068E family.
  83  *                      Removed IOCFacts Reply EEDP Capability bit.
  84  *  06-24-05  01.05.09  Added 5 new IOCFacts Reply IOCCapabilities bits.
  85  *                      Added Max SATA Targets to SAS Discovery Error event.
  86  *  08-30-05  01.05.10  Added 4 new events and their event data structures.
  87  *                      Added new ReasonCode value for SAS Device Status Change
  88  *                      event.
  89  *                      Added new family code for FC949E.
  90  *  03-27-06  01.05.11  Added MPI_IOCFACTS_CAPABILITY_TLR.
  91  *                      Added additional Reason Codes and more event data fields
  92  *                      to EVENT_DATA_SAS_DEVICE_STATUS_CHANGE.
  93  *                      Added EVENT_DATA_SAS_BROADCAST_PRIMITIVE structure and
  94  *                      new event.
  95  *                      Added MPI_EVENT_SAS_SMP_ERROR and event data structure.
  96  *                      Added MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE and event
  97  *                      data structure.
  98  *                      Added MPI_EVENT_SAS_INIT_TABLE_OVERFLOW and event
  99  *                      data structure.
 100  *                      Added MPI_EXT_IMAGE_TYPE_INITIALIZATION.
 101  *  --------------------------------------------------------------------------
 102  */
 103
 104 #ifndef MPI_IOC_H
 105 #define MPI_IOC_H
 106
 107
 108 /*****************************************************************************
 109 *
 110 *               I O C    M e s s a g e s
 111 *
 112 *****************************************************************************/
 113
 114 /****************************************************************************/
 115 /*  IOCInit message                                                         */
 116 /****************************************************************************/
 117
 118 typedef struct _MSG_IOC_INIT
 119 {
 120     U8                      WhoInit;                    /* 00h */
 121     U8                      Reserved;                   /* 01h */
 122     U8                      ChainOffset;                /* 02h */
 123     U8                      Function;                   /* 03h */
 124     U8                      Flags;                      /* 04h */
 125     U8                      MaxDevices;                 /* 05h */
 126     U8                      MaxBuses;                   /* 06h */
 127     U8                      MsgFlags;                   /* 07h */
 128     U32                     MsgContext;                 /* 08h */
 129     U16                     ReplyFrameSize;             /* 0Ch */
 130     U8                      Reserved1[2];               /* 0Eh */
 131     U32                     HostMfaHighAddr;            /* 10h */
 132     U32                     SenseBufferHighAddr;        /* 14h */
 133     U32                     ReplyFifoHostSignalingAddr; /* 18h */
 134     SGE_SIMPLE_UNION        HostPageBufferSGE;          /* 1Ch */
 135     U16                     MsgVersion;                 /* 28h */
 136     U16                     HeaderVersion;              /* 2Ah */
 137 } MSG_IOC_INIT, MPI_POINTER PTR_MSG_IOC_INIT,
 138   IOCInit_t, MPI_POINTER pIOCInit_t;
 139
 140 /* WhoInit values */
 141 #define MPI_WHOINIT_NO_ONE                              (0x00)
 142 #define MPI_WHOINIT_SYSTEM_BIOS                         (0x01)
 143 #define MPI_WHOINIT_ROM_BIOS                            (0x02)
 144 #define MPI_WHOINIT_PCI_PEER                            (0x03)
 145 #define MPI_WHOINIT_HOST_DRIVER                         (0x04)
 146 #define MPI_WHOINIT_MANUFACTURER                        (0x05)
 147
 148 /* Flags values */
 149 #define MPI_IOCINIT_FLAGS_HOST_PAGE_BUFFER_PERSISTENT   (0x04)
 150 #define MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL        (0x02)
 151 #define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE              (0x01)
 152
 153 /* MsgVersion */
 154 #define MPI_IOCINIT_MSGVERSION_MAJOR_MASK               (0xFF00)
 155 #define MPI_IOCINIT_MSGVERSION_MAJOR_SHIFT              (8)
 156 #define MPI_IOCINIT_MSGVERSION_MINOR_MASK               (0x00FF)
 157 #define MPI_IOCINIT_MSGVERSION_MINOR_SHIFT              (0)
 158
 159 /* HeaderVersion */
 160 #define MPI_IOCINIT_HEADERVERSION_UNIT_MASK             (0xFF00)
 161 #define MPI_IOCINIT_HEADERVERSION_UNIT_SHIFT            (8)
 162 #define MPI_IOCINIT_HEADERVERSION_DEV_MASK              (0x00FF)
 163 #define MPI_IOCINIT_HEADERVERSION_DEV_SHIFT             (0)
 164
 165
 166 typedef struct _MSG_IOC_INIT_REPLY
 167 {
 168     U8                      WhoInit;                    /* 00h */
 169     U8                      Reserved;                   /* 01h */
 170     U8                      MsgLength;                  /* 02h */
 171     U8                      Function;                   /* 03h */
 172     U8                      Flags;                      /* 04h */
 173     U8                      MaxDevices;                 /* 05h */
 174     U8                      MaxBuses;                   /* 06h */
 175     U8                      MsgFlags;                   /* 07h */
 176     U32                     MsgContext;                 /* 08h */
 177     U16                     Reserved2;                  /* 0Ch */
 178     U16                     IOCStatus;                  /* 0Eh */
 179     U32                     IOCLogInfo;                 /* 10h */
 180 } MSG_IOC_INIT_REPLY, MPI_POINTER PTR_MSG_IOC_INIT_REPLY,
 181   IOCInitReply_t, MPI_POINTER pIOCInitReply_t;
 182
 183
 184
 185 /****************************************************************************/
 186 /*  IOC Facts message                                                       */
 187 /****************************************************************************/
 188
 189 typedef struct _MSG_IOC_FACTS
 190 {
 191     U8                      Reserved[2];                /* 00h */
 192     U8                      ChainOffset;                /* 01h */
 193     U8                      Function;                   /* 02h */
 194     U8                      Reserved1[3];               /* 03h */
 195     U8                      MsgFlags;                   /* 04h */
 196     U32                     MsgContext;                 /* 08h */
 197 } MSG_IOC_FACTS, MPI_POINTER PTR_IOC_FACTS,
 198   IOCFacts_t, MPI_POINTER pIOCFacts_t;
 199
 200 typedef struct _MPI_FW_VERSION_STRUCT
 201 {
 202     U8                      Dev;                        /* 00h */
 203     U8                      Unit;                       /* 01h */
 204     U8                      Minor;                      /* 02h */
 205     U8                      Major;                      /* 03h */
 206 } MPI_FW_VERSION_STRUCT;
 207
 208 typedef union _MPI_FW_VERSION
 209 {
 210     MPI_FW_VERSION_STRUCT   Struct;
 211     U32                     Word;
 212 } MPI_FW_VERSION;
 213
 214 /* IOC Facts Reply */
 215 typedef struct _MSG_IOC_FACTS_REPLY
 216 {
 217     U16                     MsgVersion;                 /* 00h */
 218     U8                      MsgLength;                  /* 02h */
 219     U8                      Function;                   /* 03h */
 220     U16                     HeaderVersion;              /* 04h */
 221     U8                      IOCNumber;                  /* 06h */
 222     U8                      MsgFlags;                   /* 07h */
 223     U32                     MsgContext;                 /* 08h */
 224     U16                     IOCExceptions;              /* 0Ch */
 225     U16                     IOCStatus;                  /* 0Eh */
 226     U32                     IOCLogInfo;                 /* 10h */
 227     U8                      MaxChainDepth;              /* 14h */
 228     U8                      WhoInit;                    /* 15h */
 229     U8                      BlockSize;                  /* 16h */
 230     U8                      Flags;                      /* 17h */
 231     U16                     ReplyQueueDepth;            /* 18h */
 232     U16                     RequestFrameSize;           /* 1Ah */
 233     U16                     Reserved_0101_FWVersion;    /* 1Ch */ /* obsolete 16-bit FWVersion */
 234     U16                     ProductID;                  /* 1Eh */
 235     U32                     CurrentHostMfaHighAddr;     /* 20h */
 236     U16                     GlobalCredits;              /* 24h */
 237     U8                      NumberOfPorts;              /* 26h */
 238     U8                      EventState;                 /* 27h */
 239     U32                     CurrentSenseBufferHighAddr; /* 28h */
 240     U16                     CurReplyFrameSize;          /* 2Ch */
 241     U8                      MaxDevices;                 /* 2Eh */
 242     U8                      MaxBuses;                   /* 2Fh */
 243     U32                     FWImageSize;                /* 30h */
 244     U32                     IOCCapabilities;            /* 34h */
 245     MPI_FW_VERSION          FWVersion;                  /* 38h */
 246     U16                     HighPriorityQueueDepth;     /* 3Ch */
 247     U16                     Reserved2;                  /* 3Eh */
 248     SGE_SIMPLE_UNION        HostPageBufferSGE;          /* 40h */
 249     U32                     ReplyFifoHostSignalingAddr; /* 4Ch */
 250 } MSG_IOC_FACTS_REPLY, MPI_POINTER PTR_MSG_IOC_FACTS_REPLY,
 251   IOCFactsReply_t, MPI_POINTER pIOCFactsReply_t;
 252
 253 #define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK              (0xFF00)
 254 #define MPI_IOCFACTS_MSGVERSION_MAJOR_SHIFT             (8)
 255 #define MPI_IOCFACTS_MSGVERSION_MINOR_MASK              (0x00FF)
 256 #define MPI_IOCFACTS_MSGVERSION_MINOR_SHIFT             (0)
 257
 258 #define MPI_IOCFACTS_HDRVERSION_UNIT_MASK               (0xFF00)
 259 #define MPI_IOCFACTS_HDRVERSION_UNIT_SHIFT              (8)
 260 #define MPI_IOCFACTS_HDRVERSION_DEV_MASK                (0x00FF)
 261 #define MPI_IOCFACTS_HDRVERSION_DEV_SHIFT               (0)
 262
 263 #define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL        (0x0001)
 264 #define MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID         (0x0002)
 265 #define MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL            (0x0004)
 266 #define MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL       (0x0008)
 267
 268 #define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT             (0x01)
 269 #define MPI_IOCFACTS_FLAGS_REPLY_FIFO_HOST_SIGNAL       (0x02)
 270 #define MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT  (0x04)
 271
 272 #define MPI_IOCFACTS_EVENTSTATE_DISABLED                (0x00)
 273 #define MPI_IOCFACTS_EVENTSTATE_ENABLED                 (0x01)
 274
 275 #define MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q              (0x00000001)
 276 #define MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL       (0x00000002)
 277 #define MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING     (0x00000004)
 278 #define MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER       (0x00000008)
 279 #define MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER         (0x00000010)
 280 #define MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER         (0x00000020)
 281 #define MPI_IOCFACTS_CAPABILITY_EEDP                    (0x00000040)
 282 #define MPI_IOCFACTS_CAPABILITY_BIDIRECTIONAL           (0x00000080)
 283 #define MPI_IOCFACTS_CAPABILITY_MULTICAST               (0x00000100)
 284 #define MPI_IOCFACTS_CAPABILITY_SCSIIO32                (0x00000200)
 285 #define MPI_IOCFACTS_CAPABILITY_NO_SCSIIO16             (0x00000400)
 286 #define MPI_IOCFACTS_CAPABILITY_TLR                     (0x00000800)
 287
 288
 289 /*****************************************************************************
 290 *
 291 *               P o r t    M e s s a g e s
 292 *
 293 *****************************************************************************/
 294
 295 /****************************************************************************/
 296 /*  Port Facts message and Reply                                            */
 297 /****************************************************************************/
 298
 299 typedef struct _MSG_PORT_FACTS
 300 {
 301      U8                     Reserved[2];                /* 00h */
 302      U8                     ChainOffset;                /* 02h */
 303      U8                     Function;                   /* 03h */
 304      U8                     Reserved1[2];               /* 04h */
 305      U8                     PortNumber;                 /* 06h */
 306      U8                     MsgFlags;                   /* 07h */
 307      U32                    MsgContext;                 /* 08h */
 308 } MSG_PORT_FACTS, MPI_POINTER PTR_MSG_PORT_FACTS,
 309   PortFacts_t, MPI_POINTER pPortFacts_t;
 310
 311 typedef struct _MSG_PORT_FACTS_REPLY
 312 {
 313      U16                    Reserved;                   /* 00h */
 314      U8                     MsgLength;                  /* 02h */
 315      U8                     Function;                   /* 03h */
 316      U16                    Reserved1;                  /* 04h */
 317      U8                     PortNumber;                 /* 06h */
 318      U8                     MsgFlags;                   /* 07h */
 319      U32                    MsgContext;                 /* 08h */
 320      U16                    Reserved2;                  /* 0Ch */
 321      U16                    IOCStatus;                  /* 0Eh */
 322      U32                    IOCLogInfo;                 /* 10h */
 323      U8                     Reserved3;                  /* 14h */
 324      U8                     PortType;                   /* 15h */
 325      U16                    MaxDevices;                 /* 16h */
 326      U16                    PortSCSIID;                 /* 18h */
 327      U16                    ProtocolFlags;              /* 1Ah */
 328      U16                    MaxPostedCmdBuffers;        /* 1Ch */
 329      U16                    MaxPersistentIDs;           /* 1Eh */
 330      U16                    MaxLanBuckets;              /* 20h */
 331      U16                    Reserved4;                  /* 22h */
 332      U32                    Reserved5;                  /* 24h */
 333 } MSG_PORT_FACTS_REPLY, MPI_POINTER PTR_MSG_PORT_FACTS_REPLY,
 334   PortFactsReply_t, MPI_POINTER pPortFactsReply_t;
 335
 336
 337 /* PortTypes values */
 338
 339 #define MPI_PORTFACTS_PORTTYPE_INACTIVE         (0x00)
 340 #define MPI_PORTFACTS_PORTTYPE_SCSI             (0x01)
 341 #define MPI_PORTFACTS_PORTTYPE_FC               (0x10)
 342 #define MPI_PORTFACTS_PORTTYPE_ISCSI            (0x20)
 343 #define MPI_PORTFACTS_PORTTYPE_SAS              (0x30)
 344
 345 /* ProtocolFlags values */
 346
 347 #define MPI_PORTFACTS_PROTOCOL_LOGBUSADDR       (0x01)
 348 #define MPI_PORTFACTS_PROTOCOL_LAN              (0x02)
 349 #define MPI_PORTFACTS_PROTOCOL_TARGET           (0x04)
 350 #define MPI_PORTFACTS_PROTOCOL_INITIATOR        (0x08)
 351
 352
 353 /****************************************************************************/
 354 /*  Port Enable Message                                                     */
 355 /****************************************************************************/
 356
 357 typedef struct _MSG_PORT_ENABLE
 358 {
 359     U8                      Reserved[2];                /* 00h */
 360     U8                      ChainOffset;                /* 02h */
 361     U8                      Function;                   /* 03h */
 362     U8                      Reserved1[2];               /* 04h */
 363     U8                      PortNumber;                 /* 06h */
 364     U8                      MsgFlags;                   /* 07h */
 365     U32                     MsgContext;                 /* 08h */
 366 } MSG_PORT_ENABLE, MPI_POINTER PTR_MSG_PORT_ENABLE,
 367   PortEnable_t, MPI_POINTER pPortEnable_t;
 368
 369 typedef struct _MSG_PORT_ENABLE_REPLY
 370 {
 371     U8                      Reserved[2];                /* 00h */
 372     U8                      MsgLength;                  /* 02h */
 373     U8                      Function;                   /* 03h */
 374     U8                      Reserved1[2];               /* 04h */
 375     U8                      PortNumber;                 /* 05h */
 376     U8                      MsgFlags;                   /* 07h */
 377     U32                     MsgContext;                 /* 08h */
 378     U16                     Reserved2;                  /* 0Ch */
 379     U16                     IOCStatus;                  /* 0Eh */
 380     U32                     IOCLogInfo;                 /* 10h */
 381 } MSG_PORT_ENABLE_REPLY, MPI_POINTER PTR_MSG_PORT_ENABLE_REPLY,
 382   PortEnableReply_t, MPI_POINTER pPortEnableReply_t;
 383
 384
 385 /*****************************************************************************
 386 *
 387 *               E v e n t    M e s s a g e s
 388 *
 389 *****************************************************************************/
 390
 391 /****************************************************************************/
 392 /*  Event Notification messages                                             */
 393 /****************************************************************************/
 394
 395 typedef struct _MSG_EVENT_NOTIFY
 396 {
 397     U8                      Switch;                     /* 00h */
 398     U8                      Reserved;                   /* 01h */
 399     U8                      ChainOffset;                /* 02h */
 400     U8                      Function;                   /* 03h */
 401     U8                      Reserved1[3];               /* 04h */
 402     U8                      MsgFlags;                   /* 07h */
 403     U32                     MsgContext;                 /* 08h */
 404 } MSG_EVENT_NOTIFY, MPI_POINTER PTR_MSG_EVENT_NOTIFY,
 405   EventNotification_t, MPI_POINTER pEventNotification_t;
 406
 407 /* Event Notification Reply */
 408
 409 typedef struct _MSG_EVENT_NOTIFY_REPLY
 410 {
 411      U16                    EventDataLength;            /* 00h */
 412      U8                     MsgLength;                  /* 02h */
 413      U8                     Function;                   /* 03h */
 414      U8                     Reserved1[2];               /* 04h */
 415      U8                     AckRequired;                /* 06h */
 416      U8                     MsgFlags;                   /* 07h */
 417      U32                    MsgContext;                 /* 08h */
 418      U8                     Reserved2[2];               /* 0Ch */
 419      U16                    IOCStatus;                  /* 0Eh */
 420      U32                    IOCLogInfo;                 /* 10h */
 421      U32                    Event;                      /* 14h */
 422      U32                    EventContext;               /* 18h */
 423      U32                    Data[1];                    /* 1Ch */
 424 } MSG_EVENT_NOTIFY_REPLY, MPI_POINTER PTR_MSG_EVENT_NOTIFY_REPLY,
 425   EventNotificationReply_t, MPI_POINTER pEventNotificationReply_t;
 426
 427 /* Event Acknowledge */
 428
 429 typedef struct _MSG_EVENT_ACK
 430 {
 431     U8                      Reserved[2];                /* 00h */
 432     U8                      ChainOffset;                /* 02h */
 433     U8                      Function;                   /* 03h */
 434     U8                      Reserved1[3];               /* 04h */
 435     U8                      MsgFlags;                   /* 07h */
 436     U32                     MsgContext;                 /* 08h */
 437     U32                     Event;                      /* 0Ch */
 438     U32                     EventContext;               /* 10h */
 439 } MSG_EVENT_ACK, MPI_POINTER PTR_MSG_EVENT_ACK,
 440   EventAck_t, MPI_POINTER pEventAck_t;
 441
 442 typedef struct _MSG_EVENT_ACK_REPLY
 443 {
 444     U8                      Reserved[2];                /* 00h */
 445     U8                      MsgLength;                  /* 02h */
 446     U8                      Function;                   /* 03h */
 447     U8                      Reserved1[3];               /* 04h */
 448     U8                      MsgFlags;                   /* 07h */
 449     U32                     MsgContext;                 /* 08h */
 450     U16                     Reserved2;                  /* 0Ch */
 451     U16                     IOCStatus;                  /* 0Eh */
 452     U32                     IOCLogInfo;                 /* 10h */
 453 } MSG_EVENT_ACK_REPLY, MPI_POINTER PTR_MSG_EVENT_ACK_REPLY,
 454   EventAckReply_t, MPI_POINTER pEventAckReply_t;
 455
 456 /* Switch */
 457
 458 #define MPI_EVENT_NOTIFICATION_SWITCH_OFF   (0x00)
 459 #define MPI_EVENT_NOTIFICATION_SWITCH_ON    (0x01)
 460
 461 /* Event */
 462
 463 #define MPI_EVENT_NONE                          (0x00000000)
 464 #define MPI_EVENT_LOG_DATA                      (0x00000001)
 465 #define MPI_EVENT_STATE_CHANGE                  (0x00000002)
 466 #define MPI_EVENT_UNIT_ATTENTION                (0x00000003)
 467 #define MPI_EVENT_IOC_BUS_RESET                 (0x00000004)
 468 #define MPI_EVENT_EXT_BUS_RESET                 (0x00000005)
 469 #define MPI_EVENT_RESCAN                        (0x00000006)
 470 #define MPI_EVENT_LINK_STATUS_CHANGE            (0x00000007)
 471 #define MPI_EVENT_LOOP_STATE_CHANGE             (0x00000008)
 472 #define MPI_EVENT_LOGOUT                        (0x00000009)
 473 #define MPI_EVENT_EVENT_CHANGE                  (0x0000000A)
 474 #define MPI_EVENT_INTEGRATED_RAID               (0x0000000B)
 475 #define MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE     (0x0000000C)
 476 #define MPI_EVENT_ON_BUS_TIMER_EXPIRED          (0x0000000D)
 477 #define MPI_EVENT_QUEUE_FULL                    (0x0000000E)
 478 #define MPI_EVENT_SAS_DEVICE_STATUS_CHANGE      (0x0000000F)
 479 #define MPI_EVENT_SAS_SES                       (0x00000010)
 480 #define MPI_EVENT_PERSISTENT_TABLE_FULL         (0x00000011)
 481 #define MPI_EVENT_SAS_PHY_LINK_STATUS           (0x00000012)
 482 #define MPI_EVENT_SAS_DISCOVERY_ERROR           (0x00000013)
 483 #define MPI_EVENT_IR_RESYNC_UPDATE              (0x00000014)
 484 #define MPI_EVENT_IR2                           (0x00000015)
 485 #define MPI_EVENT_SAS_DISCOVERY                 (0x00000016)
 486 #define MPI_EVENT_SAS_BROADCAST_PRIMITIVE       (0x00000017)
 487 #define MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE (0x00000018)
 488 #define MPI_EVENT_SAS_INIT_TABLE_OVERFLOW       (0x00000019)
 489 #define MPI_EVENT_SAS_SMP_ERROR                 (0x0000001A)
 490 #define MPI_EVENT_LOG_ENTRY_ADDED               (0x00000021)
 491
 492 /* AckRequired field values */
 493
 494 #define MPI_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00)
 495 #define MPI_EVENT_NOTIFICATION_ACK_REQUIRED     (0x01)
 496
 497 /* EventChange Event data */
 498
 499 typedef struct _EVENT_DATA_EVENT_CHANGE
 500 {
 501     U8                      EventState;                 /* 00h */
 502     U8                      Reserved;                   /* 01h */
 503     U16                     Reserved1;                  /* 02h */
 504 } EVENT_DATA_EVENT_CHANGE, MPI_POINTER PTR_EVENT_DATA_EVENT_CHANGE,
 505   EventDataEventChange_t, MPI_POINTER pEventDataEventChange_t;
 506
 507 /* LogEntryAdded Event data */
 508
 509 /* this structure matches MPI_LOG_0_ENTRY in mpi_cnfg.h */
 510 #define MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH    (0x1C)
 511 typedef struct _EVENT_DATA_LOG_ENTRY
 512 {
 513     U32         TimeStamp;                          /* 00h */
 514     U32         Reserved1;                          /* 04h */
 515     U16         LogSequence;                        /* 08h */
 516     U16         LogEntryQualifier;                  /* 0Ah */
 517     U8          LogData[MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH]; /* 0Ch */
 518 } EVENT_DATA_LOG_ENTRY, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY,
 519   MpiEventDataLogEntry_t, MPI_POINTER pMpiEventDataLogEntry_t;
 520
 521 typedef struct _EVENT_DATA_LOG_ENTRY_ADDED
 522 {
 523     U16                     LogSequence;            /* 00h */
 524     U16                     Reserved1;              /* 02h */
 525     U32                     Reserved2;              /* 04h */
 526     EVENT_DATA_LOG_ENTRY    LogEntry;               /* 08h */
 527 } EVENT_DATA_LOG_ENTRY_ADDED, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY_ADDED,
 528   MpiEventDataLogEntryAdded_t, MPI_POINTER pMpiEventDataLogEntryAdded_t;
 529
 530 /* SCSI Event data for Port, Bus and Device forms */
 531
 532 typedef struct _EVENT_DATA_SCSI
 533 {
 534     U8                      TargetID;                   /* 00h */
 535     U8                      BusPort;                    /* 01h */
 536     U16                     Reserved;                   /* 02h */
 537 } EVENT_DATA_SCSI, MPI_POINTER PTR_EVENT_DATA_SCSI,
 538   EventDataScsi_t, MPI_POINTER pEventDataScsi_t;
 539
 540 /* SCSI Device Status Change Event data */
 541
 542 typedef struct _EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE
 543 {
 544     U8                      TargetID;                   /* 00h */
 545     U8                      Bus;                        /* 01h */
 546     U8                      ReasonCode;                 /* 02h */
 547     U8                      LUN;                        /* 03h */
 548     U8                      ASC;                        /* 04h */
 549     U8                      ASCQ;                       /* 05h */
 550     U16                     Reserved;                   /* 06h */
 551 } EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
 552   MPI_POINTER PTR_EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
 553   MpiEventDataScsiDeviceStatusChange_t,
 554   MPI_POINTER pMpiEventDataScsiDeviceStatusChange_t;
 555
 556 /* MPI SCSI Device Status Change Event data ReasonCode values */
 557 #define MPI_EVENT_SCSI_DEV_STAT_RC_ADDED                (0x03)
 558 #define MPI_EVENT_SCSI_DEV_STAT_RC_NOT_RESPONDING       (0x04)
 559 #define MPI_EVENT_SCSI_DEV_STAT_RC_SMART_DATA           (0x05)
 560
 561 /* SAS Device Status Change Event data */
 562
 563 typedef struct _EVENT_DATA_SAS_DEVICE_STATUS_CHANGE
 564 {
 565     U8                      TargetID;                   /* 00h */
 566     U8                      Bus;                        /* 01h */
 567     U8                      ReasonCode;                 /* 02h */
 568     U8                      Reserved;                   /* 03h */
 569     U8                      ASC;                        /* 04h */
 570     U8                      ASCQ;                       /* 05h */
 571     U16                     DevHandle;                  /* 06h */
 572     U32                     DeviceInfo;                 /* 08h */
 573     U16                     ParentDevHandle;            /* 0Ch */
 574     U8                      PhyNum;                     /* 0Eh */
 575     U8                      Reserved1;                  /* 0Fh */
 576     U64                     SASAddress;                 /* 10h */
 577     U8                      LUN[8];                     /* 18h */
 578     U16                     TaskTag;                    /* 20h */
 579     U16                     Reserved2;                  /* 22h */
 580 } EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
 581   MPI_POINTER PTR_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
 582   MpiEventDataSasDeviceStatusChange_t,
 583   MPI_POINTER pMpiEventDataSasDeviceStatusChange_t;
 584
 585 /* MPI SAS Device Status Change Event data ReasonCode values */
 586 #define MPI_EVENT_SAS_DEV_STAT_RC_ADDED                     (0x03)
 587 #define MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING            (0x04)
 588 #define MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA                (0x05)
 589 #define MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED          (0x06)
 590 #define MPI_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED               (0x07)
 591 #define MPI_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET     (0x08)
 592 #define MPI_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL       (0x09)
 593 #define MPI_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL   (0x0A)
 594 #define MPI_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL   (0x0B)
 595 #define MPI_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL       (0x0C)
 596
 597
 598 /* SCSI Event data for Queue Full event */
 599
 600 typedef struct _EVENT_DATA_QUEUE_FULL
 601 {
 602     U8                      TargetID;                   /* 00h */
 603     U8                      Bus;                        /* 01h */
 604     U16                     CurrentDepth;               /* 02h */
 605 } EVENT_DATA_QUEUE_FULL, MPI_POINTER PTR_EVENT_DATA_QUEUE_FULL,
 606   EventDataQueueFull_t, MPI_POINTER pEventDataQueueFull_t;
 607
 608 /* MPI Integrated RAID Event data */
 609
 610 typedef struct _EVENT_DATA_RAID
 611 {
 612     U8                      VolumeID;                   /* 00h */
 613     U8                      VolumeBus;                  /* 01h */
 614     U8                      ReasonCode;                 /* 02h */
 615     U8                      PhysDiskNum;                /* 03h */
 616     U8                      ASC;                        /* 04h */
 617     U8                      ASCQ;                       /* 05h */
 618     U16                     Reserved;                   /* 06h */
 619     U32                     SettingsStatus;             /* 08h */
 620 } EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID,
 621   MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t;
 622
 623 /* MPI Integrated RAID Event data ReasonCode values */
 624 #define MPI_EVENT_RAID_RC_VOLUME_CREATED                (0x00)
 625 #define MPI_EVENT_RAID_RC_VOLUME_DELETED                (0x01)
 626 #define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED       (0x02)
 627 #define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED         (0x03)
 628 #define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED       (0x04)
 629 #define MPI_EVENT_RAID_RC_PHYSDISK_CREATED              (0x05)
 630 #define MPI_EVENT_RAID_RC_PHYSDISK_DELETED              (0x06)
 631 #define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED     (0x07)
 632 #define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED       (0x08)
 633 #define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED             (0x09)
 634 #define MPI_EVENT_RAID_RC_SMART_DATA                    (0x0A)
 635 #define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED        (0x0B)
 636
 637
 638 /* MPI Integrated RAID Resync Update Event data */
 639
 640 typedef struct _MPI_EVENT_DATA_IR_RESYNC_UPDATE
 641 {
 642     U8                      VolumeID;                   /* 00h */
 643     U8                      VolumeBus;                  /* 01h */
 644     U8                      ResyncComplete;             /* 02h */
 645     U8                      Reserved1;                  /* 03h */
 646     U32                     Reserved2;                  /* 04h */
 647 } MPI_EVENT_DATA_IR_RESYNC_UPDATE,
 648   MPI_POINTER PTR_MPI_EVENT_DATA_IR_RESYNC_UPDATE,
 649   MpiEventDataIrResyncUpdate_t, MPI_POINTER pMpiEventDataIrResyncUpdate_t;
 650
 651 /* MPI IR2 Event data */
 652
 653 /* MPI_LD_STATE or MPI_PD_STATE */
 654 typedef struct _IR2_STATE_CHANGED
 655 {
 656     U16                 PreviousState;  /* 00h */
 657     U16                 NewState;       /* 02h */
 658 } IR2_STATE_CHANGED, MPI_POINTER PTR_IR2_STATE_CHANGED;
 659
 660 typedef struct _IR2_PD_INFO
 661 {
 662     U16                 DeviceHandle;           /* 00h */
 663     U8                  TruncEnclosureHandle;   /* 02h */
 664     U8                  TruncatedSlot;          /* 03h */
 665 } IR2_PD_INFO, MPI_POINTER PTR_IR2_PD_INFO;
 666
 667 typedef union _MPI_IR2_RC_EVENT_DATA
 668 {
 669     IR2_STATE_CHANGED   StateChanged;
 670     U32                 Lba;
 671     IR2_PD_INFO         PdInfo;
 672 } MPI_IR2_RC_EVENT_DATA, MPI_POINTER PTR_MPI_IR2_RC_EVENT_DATA;
 673
 674 typedef struct _MPI_EVENT_DATA_IR2
 675 {
 676     U8                      TargetID;             /* 00h */
 677     U8                      Bus;                  /* 01h */
 678     U8                      ReasonCode;           /* 02h */
 679     U8                      PhysDiskNum;          /* 03h */
 680     MPI_IR2_RC_EVENT_DATA   IR2EventData;         /* 04h */
 681 } MPI_EVENT_DATA_IR2, MPI_POINTER PTR_MPI_EVENT_DATA_IR2,
 682   MpiEventDataIR2_t, MPI_POINTER pMpiEventDataIR2_t;
 683
 684 /* MPI IR2 Event data ReasonCode values */
 685 #define MPI_EVENT_IR2_RC_LD_STATE_CHANGED           (0x01)
 686 #define MPI_EVENT_IR2_RC_PD_STATE_CHANGED           (0x02)
 687 #define MPI_EVENT_IR2_RC_BAD_BLOCK_TABLE_FULL       (0x03)
 688 #define MPI_EVENT_IR2_RC_PD_INSERTED                (0x04)
 689 #define MPI_EVENT_IR2_RC_PD_REMOVED                 (0x05)
 690 #define MPI_EVENT_IR2_RC_FOREIGN_CFG_DETECTED       (0x06)
 691 #define MPI_EVENT_IR2_RC_REBUILD_MEDIUM_ERROR       (0x07)
 692
 693 /* defines for logical disk states */
 694 #define MPI_LD_STATE_OPTIMAL                        (0x00)
 695 #define MPI_LD_STATE_DEGRADED                       (0x01)
 696 #define MPI_LD_STATE_FAILED                         (0x02)
 697 #define MPI_LD_STATE_MISSING                        (0x03)
 698 #define MPI_LD_STATE_OFFLINE                        (0x04)
 699
 700 /* defines for physical disk states */
 701 #define MPI_PD_STATE_ONLINE                         (0x00)
 702 #define MPI_PD_STATE_MISSING                        (0x01)
 703 #define MPI_PD_STATE_NOT_COMPATIBLE                 (0x02)
 704 #define MPI_PD_STATE_FAILED                         (0x03)
 705 #define MPI_PD_STATE_INITIALIZING                   (0x04)
 706 #define MPI_PD_STATE_OFFLINE_AT_HOST_REQUEST        (0x05)
 707 #define MPI_PD_STATE_FAILED_AT_HOST_REQUEST         (0x06)
 708 #define MPI_PD_STATE_OFFLINE_FOR_ANOTHER_REASON     (0xFF)
 709
 710 /* MPI Link Status Change Event data */
 711
 712 typedef struct _EVENT_DATA_LINK_STATUS
 713 {
 714     U8                      State;                      /* 00h */
 715     U8                      Reserved;                   /* 01h */
 716     U16                     Reserved1;                  /* 02h */
 717     U8                      Reserved2;                  /* 04h */
 718     U8                      Port;                       /* 05h */
 719     U16                     Reserved3;                  /* 06h */
 720 } EVENT_DATA_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_LINK_STATUS,
 721   EventDataLinkStatus_t, MPI_POINTER pEventDataLinkStatus_t;
 722
 723 #define MPI_EVENT_LINK_STATUS_FAILURE       (0x00000000)
 724 #define MPI_EVENT_LINK_STATUS_ACTIVE        (0x00000001)
 725
 726 /* MPI Loop State Change Event data */
 727
 728 typedef struct _EVENT_DATA_LOOP_STATE
 729 {
 730     U8                      Character4;                 /* 00h */
 731     U8                      Character3;                 /* 01h */
 732     U8                      Type;                       /* 02h */
 733     U8                      Reserved;                   /* 03h */
 734     U8                      Reserved1;                  /* 04h */
 735     U8                      Port;                       /* 05h */
 736     U16                     Reserved2;                  /* 06h */
 737 } EVENT_DATA_LOOP_STATE, MPI_POINTER PTR_EVENT_DATA_LOOP_STATE,
 738   EventDataLoopState_t, MPI_POINTER pEventDataLoopState_t;
 739
 740 #define MPI_EVENT_LOOP_STATE_CHANGE_LIP     (0x0001)
 741 #define MPI_EVENT_LOOP_STATE_CHANGE_LPE     (0x0002)
 742 #define MPI_EVENT_LOOP_STATE_CHANGE_LPB     (0x0003)
 743
 744 /* MPI LOGOUT Event data */
 745
 746 typedef struct _EVENT_DATA_LOGOUT
 747 {
 748     U32                     NPortID;                    /* 00h */
 749     U8                      AliasIndex;                 /* 04h */
 750     U8                      Port;                       /* 05h */
 751     U16                     Reserved1;                  /* 06h */
 752 } EVENT_DATA_LOGOUT, MPI_POINTER PTR_EVENT_DATA_LOGOUT,
 753   EventDataLogout_t, MPI_POINTER pEventDataLogout_t;
 754
 755 #define MPI_EVENT_LOGOUT_ALL_ALIASES        (0xFF)
 756
 757 /* SAS SES Event data */
 758
 759 typedef struct _EVENT_DATA_SAS_SES
 760 {
 761     U8                      PhyNum;                     /* 00h */
 762     U8                      Port;                       /* 01h */
 763     U8                      PortWidth;                  /* 02h */
 764     U8                      Reserved1;                  /* 04h */
 765 } EVENT_DATA_SAS_SES, MPI_POINTER PTR_EVENT_DATA_SAS_SES,
 766   MpiEventDataSasSes_t, MPI_POINTER pMpiEventDataSasSes_t;
 767
 768 /* SAS Broadcast Primitive Event data */
 769
 770 typedef struct _EVENT_DATA_SAS_BROADCAST_PRIMITIVE
 771 {
 772     U8                      PhyNum;                     /* 00h */
 773     U8                      Port;                       /* 01h */
 774     U8                      PortWidth;                  /* 02h */
 775     U8                      Primitive;                  /* 04h */
 776 } EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
 777   MPI_POINTER PTR_EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
 778   MpiEventDataSasBroadcastPrimitive_t,
 779   MPI_POINTER pMpiEventDataSasBroadcastPrimitive_t;
 780
 781 #define MPI_EVENT_PRIMITIVE_CHANGE              (0x01)
 782 #define MPI_EVENT_PRIMITIVE_EXPANDER            (0x03)
 783 #define MPI_EVENT_PRIMITIVE_RESERVED2           (0x04)
 784 #define MPI_EVENT_PRIMITIVE_RESERVED3           (0x05)
 785 #define MPI_EVENT_PRIMITIVE_RESERVED4           (0x06)
 786 #define MPI_EVENT_PRIMITIVE_CHANGE0_RESERVED    (0x07)
 787 #define MPI_EVENT_PRIMITIVE_CHANGE1_RESERVED    (0x08)
 788
 789 /* SAS Phy Link Status Event data */
 790
 791 typedef struct _EVENT_DATA_SAS_PHY_LINK_STATUS
 792 {
 793     U8                      PhyNum;                     /* 00h */
 794     U8                      LinkRates;                  /* 01h */
 795     U16                     DevHandle;                  /* 02h */
 796     U64                     SASAddress;                 /* 04h */
 797 } EVENT_DATA_SAS_PHY_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_SAS_PHY_LINK_STATUS,
 798   MpiEventDataSasPhyLinkStatus_t, MPI_POINTER pMpiEventDataSasPhyLinkStatus_t;
 799
 800 /* defines for the LinkRates field of the SAS PHY Link Status event */
 801 #define MPI_EVENT_SAS_PLS_LR_CURRENT_MASK                   (0xF0)
 802 #define MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT                  (4)
 803 #define MPI_EVENT_SAS_PLS_LR_PREVIOUS_MASK                  (0x0F)
 804 #define MPI_EVENT_SAS_PLS_LR_PREVIOUS_SHIFT                 (0)
 805 #define MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN                   (0x00)
 806 #define MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED              (0x01)
 807 #define MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION  (0x02)
 808 #define MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE         (0x03)
 809 #define MPI_EVENT_SAS_PLS_LR_RATE_1_5                       (0x08)
 810 #define MPI_EVENT_SAS_PLS_LR_RATE_3_0                       (0x09)
 811
 812 /* SAS Discovery Event data */
 813
 814 typedef struct _EVENT_DATA_SAS_DISCOVERY
 815 {
 816     U32                     DiscoveryStatus;            /* 00h */
 817     U32                     Reserved1;                  /* 04h */
 818 } EVENT_DATA_SAS_DISCOVERY, MPI_POINTER PTR_EVENT_DATA_SAS_DISCOVERY,
 819   EventDataSasDiscovery_t, MPI_POINTER pEventDataSasDiscovery_t;
 820
 821 #define MPI_EVENT_SAS_DSCVRY_COMPLETE                       (0x00000000)
 822 #define MPI_EVENT_SAS_DSCVRY_IN_PROGRESS                    (0x00000001)
 823 #define MPI_EVENT_SAS_DSCVRY_PHY_BITS_MASK                  (0xFFFF0000)
 824 #define MPI_EVENT_SAS_DSCVRY_PHY_BITS_SHIFT                 (16)
 825
 826 /* SAS Discovery Errror Event data */
 827
 828 typedef struct _EVENT_DATA_DISCOVERY_ERROR
 829 {
 830     U32                     DiscoveryStatus;            /* 00h */
 831     U8                      Port;                       /* 04h */
 832     U8                      Reserved1;                  /* 05h */
 833     U16                     Reserved2;                  /* 06h */
 834 } EVENT_DATA_DISCOVERY_ERROR, MPI_POINTER PTR_EVENT_DATA_DISCOVERY_ERROR,
 835   EventDataDiscoveryError_t, MPI_POINTER pEventDataDiscoveryError_t;
 836
 837 #define MPI_EVENT_DSCVRY_ERR_DS_LOOP_DETECTED               (0x00000001)
 838 #define MPI_EVENT_DSCVRY_ERR_DS_UNADDRESSABLE_DEVICE        (0x00000002)
 839 #define MPI_EVENT_DSCVRY_ERR_DS_MULTIPLE_PORTS              (0x00000004)
 840 #define MPI_EVENT_DSCVRY_ERR_DS_EXPANDER_ERR                (0x00000008)
 841 #define MPI_EVENT_DSCVRY_ERR_DS_SMP_TIMEOUT                 (0x00000010)
 842 #define MPI_EVENT_DSCVRY_ERR_DS_OUT_ROUTE_ENTRIES           (0x00000020)
 843 #define MPI_EVENT_DSCVRY_ERR_DS_INDEX_NOT_EXIST             (0x00000040)
 844 #define MPI_EVENT_DSCVRY_ERR_DS_SMP_FUNCTION_FAILED         (0x00000080)
 845 #define MPI_EVENT_DSCVRY_ERR_DS_SMP_CRC_ERROR               (0x00000100)
 846 #define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_SUBTRACTIVE          (0x00000200)
 847 #define MPI_EVENT_DSCVRY_ERR_DS_TABLE_TO_TABLE              (0x00000400)
 848 #define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_PATHS                (0x00000800)
 849 #define MPI_EVENT_DSCVRY_ERR_DS_MAX_SATA_TARGETS            (0x00001000)
 850
 851 /* SAS SMP Error Event data */
 852
 853 typedef struct _EVENT_DATA_SAS_SMP_ERROR
 854 {
 855     U8                      Status;                     /* 00h */
 856     U8                      Port;                       /* 01h */
 857     U8                      SMPFunctionResult;          /* 02h */
 858     U8                      Reserved1;                  /* 03h */
 859     U64                     SASAddress;                 /* 04h */
 860 } EVENT_DATA_SAS_SMP_ERROR, MPI_POINTER PTR_EVENT_DATA_SAS_SMP_ERROR,
 861   MpiEventDataSasSmpError_t, MPI_POINTER pMpiEventDataSasSmpError_t;
 862
 863 /* defines for the Status field of the SAS SMP Error event */
 864 #define MPI_EVENT_SAS_SMP_FUNCTION_RESULT_VALID         (0x00)
 865 #define MPI_EVENT_SAS_SMP_CRC_ERROR                     (0x01)
 866 #define MPI_EVENT_SAS_SMP_TIMEOUT                       (0x02)
 867 #define MPI_EVENT_SAS_SMP_NO_DESTINATION                (0x03)
 868 #define MPI_EVENT_SAS_SMP_BAD_DESTINATION               (0x04)
 869
 870 /* SAS Initiator Device Status Change Event data */
 871
 872 typedef struct _EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE
 873 {
 874     U8                      ReasonCode;                 /* 00h */
 875     U8                      Port;                       /* 01h */
 876     U16                     DevHandle;                  /* 02h */
 877     U64                     SASAddress;                 /* 04h */
 878 } EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
 879   MPI_POINTER PTR_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
 880   MpiEventDataSasInitDevStatusChange_t,
 881   MPI_POINTER pMpiEventDataSasInitDevStatusChange_t;
 882
 883 /* defines for the ReasonCode field of the SAS Initiator Device Status Change event */
 884 #define MPI_EVENT_SAS_INIT_RC_ADDED                 (0x01)
 885
 886 /* SAS Initiator Device Table Overflow Event data */
 887
 888 typedef struct _EVENT_DATA_SAS_INIT_TABLE_OVERFLOW
 889 {
 890     U8                      MaxInit;                    /* 00h */
 891     U8                      CurrentInit;                /* 01h */
 892     U16                     Reserved1;                  /* 02h */
 893 } EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
 894   MPI_POINTER PTR_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
 895   MpiEventDataSasInitTableOverflow_t,
 896   MPI_POINTER pMpiEventDataSasInitTableOverflow_t;
 897
 898
 899 /*****************************************************************************
 900 *
 901 *               F i r m w a r e    L o a d    M e s s a g e s
 902 *
 903 *****************************************************************************/
 904
 905 /****************************************************************************/
 906 /*  Firmware Download message and associated structures                     */
 907 /****************************************************************************/
 908
 909 typedef struct _MSG_FW_DOWNLOAD
 910 {
 911     U8                      ImageType;                  /* 00h */
 912     U8                      Reserved;                   /* 01h */
 913     U8                      ChainOffset;                /* 02h */
 914     U8                      Function;                   /* 03h */
 915     U8                      Reserved1[3];               /* 04h */
 916     U8                      MsgFlags;                   /* 07h */
 917     U32                     MsgContext;                 /* 08h */
 918     SGE_MPI_UNION           SGL;                        /* 0Ch */
 919 } MSG_FW_DOWNLOAD, MPI_POINTER PTR_MSG_FW_DOWNLOAD,
 920   FWDownload_t, MPI_POINTER pFWDownload_t;
 921
 922 #define MPI_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT    (0x01)
 923
 924 #define MPI_FW_DOWNLOAD_ITYPE_RESERVED          (0x00)
 925 #define MPI_FW_DOWNLOAD_ITYPE_FW                (0x01)
 926 #define MPI_FW_DOWNLOAD_ITYPE_BIOS              (0x02)
 927 #define MPI_FW_DOWNLOAD_ITYPE_NVDATA            (0x03)
 928 #define MPI_FW_DOWNLOAD_ITYPE_BOOTLOADER        (0x04)
 929
 930
 931 typedef struct _FWDownloadTCSGE
 932 {
 933     U8                      Reserved;                   /* 00h */
 934     U8                      ContextSize;                /* 01h */
 935     U8                      DetailsLength;              /* 02h */
 936     U8                      Flags;                      /* 03h */
 937     U32                     Reserved_0100_Checksum;     /* 04h */ /* obsolete Checksum */
 938     U32                     ImageOffset;                /* 08h */
 939     U32                     ImageSize;                  /* 0Ch */
 940 } FW_DOWNLOAD_TCSGE, MPI_POINTER PTR_FW_DOWNLOAD_TCSGE,
 941   FWDownloadTCSGE_t, MPI_POINTER pFWDownloadTCSGE_t;
 942
 943 /* Firmware Download reply */
 944 typedef struct _MSG_FW_DOWNLOAD_REPLY
 945 {
 946     U8                      ImageType;                  /* 00h */
 947     U8                      Reserved;                   /* 01h */
 948     U8                      MsgLength;                  /* 02h */
 949     U8                      Function;                   /* 03h */
 950     U8                      Reserved1[3];               /* 04h */
 951     U8                      MsgFlags;                   /* 07h */
 952     U32                     MsgContext;                 /* 08h */
 953     U16                     Reserved2;                  /* 0Ch */
 954     U16                     IOCStatus;                  /* 0Eh */
 955     U32                     IOCLogInfo;                 /* 10h */
 956 } MSG_FW_DOWNLOAD_REPLY, MPI_POINTER PTR_MSG_FW_DOWNLOAD_REPLY,
 957   FWDownloadReply_t, MPI_POINTER pFWDownloadReply_t;
 958
 959
 960 /****************************************************************************/
 961 /*  Firmware Upload message and associated structures                       */
 962 /****************************************************************************/
 963
 964 typedef struct _MSG_FW_UPLOAD
 965 {
 966     U8                      ImageType;                  /* 00h */
 967     U8                      Reserved;                   /* 01h */
 968     U8                      ChainOffset;                /* 02h */
 969     U8                      Function;                   /* 03h */
 970     U8                      Reserved1[3];               /* 04h */
 971     U8                      MsgFlags;                   /* 07h */
 972     U32                     MsgContext;                 /* 08h */
 973     SGE_MPI_UNION           SGL;                        /* 0Ch */
 974 } MSG_FW_UPLOAD, MPI_POINTER PTR_MSG_FW_UPLOAD,
 975   FWUpload_t, MPI_POINTER pFWUpload_t;
 976
 977 #define MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM      (0x00)
 978 #define MPI_FW_UPLOAD_ITYPE_FW_FLASH        (0x01)
 979 #define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH      (0x02)
 980 #define MPI_FW_UPLOAD_ITYPE_NVDATA          (0x03)
 981 #define MPI_FW_UPLOAD_ITYPE_BOOTLOADER      (0x04)
 982 #define MPI_FW_UPLOAD_ITYPE_FW_BACKUP       (0x05)
 983
 984 typedef struct _FWUploadTCSGE
 985 {
 986     U8                      Reserved;                   /* 00h */
 987     U8                      ContextSize;                /* 01h */
 988     U8                      DetailsLength;              /* 02h */
 989     U8                      Flags;                      /* 03h */
 990     U32                     Reserved1;                  /* 04h */
 991     U32                     ImageOffset;                /* 08h */
 992     U32                     ImageSize;                  /* 0Ch */
 993 } FW_UPLOAD_TCSGE, MPI_POINTER PTR_FW_UPLOAD_TCSGE,
 994   FWUploadTCSGE_t, MPI_POINTER pFWUploadTCSGE_t;
 995
 996 /* Firmware Upload reply */
 997 typedef struct _MSG_FW_UPLOAD_REPLY
 998 {
 999     U8                      ImageType;                  /* 00h */
1000     U8                      Reserved;                   /* 01h */
1001     U8                      MsgLength;                  /* 02h */
1002     U8                      Function;                   /* 03h */
1003     U8                      Reserved1[3];               /* 04h */
1004     U8                      MsgFlags;                   /* 07h */
1005     U32                     MsgContext;                 /* 08h */
1006     U16                     Reserved2;                  /* 0Ch */
1007     U16                     IOCStatus;                  /* 0Eh */
1008     U32                     IOCLogInfo;                 /* 10h */
1009     U32                     ActualImageSize;            /* 14h */
1010 } MSG_FW_UPLOAD_REPLY, MPI_POINTER PTR_MSG_FW_UPLOAD_REPLY,
1011   FWUploadReply_t, MPI_POINTER pFWUploadReply_t;
1012
1013
1014 typedef struct _MPI_FW_HEADER
1015 {
1016     U32                     ArmBranchInstruction0;      /* 00h */
1017     U32                     Signature0;                 /* 04h */
1018     U32                     Signature1;                 /* 08h */
1019     U32                     Signature2;                 /* 0Ch */
1020     U32                     ArmBranchInstruction1;      /* 10h */
1021     U32                     ArmBranchInstruction2;      /* 14h */
1022     U32                     Reserved;                   /* 18h */
1023     U32                     Checksum;                   /* 1Ch */
1024     U16                     VendorId;                   /* 20h */
1025     U16                     ProductId;                  /* 22h */
1026     MPI_FW_VERSION          FWVersion;                  /* 24h */
1027     U32                     SeqCodeVersion;             /* 28h */
1028     U32                     ImageSize;                  /* 2Ch */
1029     U32                     NextImageHeaderOffset;      /* 30h */
1030     U32                     LoadStartAddress;           /* 34h */
1031     U32                     IopResetVectorValue;        /* 38h */
1032     U32                     IopResetRegAddr;            /* 3Ch */
1033     U32                     VersionNameWhat;            /* 40h */
1034     U8                      VersionName[32];            /* 44h */
1035     U32                     VendorNameWhat;             /* 64h */
1036     U8                      VendorName[32];             /* 68h */
1037 } MPI_FW_HEADER, MPI_POINTER PTR_MPI_FW_HEADER,
1038   MpiFwHeader_t, MPI_POINTER pMpiFwHeader_t;
1039
1040 #define MPI_FW_HEADER_WHAT_SIGNATURE        (0x29232840)
1041
1042 /* defines for using the ProductId field */
1043 #define MPI_FW_HEADER_PID_TYPE_MASK             (0xF000)
1044 #define MPI_FW_HEADER_PID_TYPE_SCSI             (0x0000)
1045 #define MPI_FW_HEADER_PID_TYPE_FC               (0x1000)
1046 #define MPI_FW_HEADER_PID_TYPE_SAS              (0x2000)
1047
1048 #define MPI_FW_HEADER_SIGNATURE_0               (0x5AEAA55A)
1049 #define MPI_FW_HEADER_SIGNATURE_1               (0xA55AEAA5)
1050 #define MPI_FW_HEADER_SIGNATURE_2               (0x5AA55AEA)
1051
1052 #define MPI_FW_HEADER_PID_PROD_MASK                     (0x0F00)
1053 #define MPI_FW_HEADER_PID_PROD_INITIATOR_SCSI           (0x0100)
1054 #define MPI_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI    (0x0200)
1055 #define MPI_FW_HEADER_PID_PROD_TARGET_SCSI              (0x0300)
1056 #define MPI_FW_HEADER_PID_PROD_IM_SCSI                  (0x0400)
1057 #define MPI_FW_HEADER_PID_PROD_IS_SCSI                  (0x0500)
1058 #define MPI_FW_HEADER_PID_PROD_CTX_SCSI                 (0x0600)
1059 #define MPI_FW_HEADER_PID_PROD_IR_SCSI                  (0x0700)
1060
1061 #define MPI_FW_HEADER_PID_FAMILY_MASK           (0x00FF)
1062 /* SCSI */
1063 #define MPI_FW_HEADER_PID_FAMILY_1030A0_SCSI    (0x0001)
1064 #define MPI_FW_HEADER_PID_FAMILY_1030B0_SCSI    (0x0002)
1065 #define MPI_FW_HEADER_PID_FAMILY_1030B1_SCSI    (0x0003)
1066 #define MPI_FW_HEADER_PID_FAMILY_1030C0_SCSI    (0x0004)
1067 #define MPI_FW_HEADER_PID_FAMILY_1020A0_SCSI    (0x0005)
1068 #define MPI_FW_HEADER_PID_FAMILY_1020B0_SCSI    (0x0006)
1069 #define MPI_FW_HEADER_PID_FAMILY_1020B1_SCSI    (0x0007)
1070 #define MPI_FW_HEADER_PID_FAMILY_1020C0_SCSI    (0x0008)
1071 #define MPI_FW_HEADER_PID_FAMILY_1035A0_SCSI    (0x0009)
1072 #define MPI_FW_HEADER_PID_FAMILY_1035B0_SCSI    (0x000A)
1073 #define MPI_FW_HEADER_PID_FAMILY_1030TA0_SCSI   (0x000B)
1074 #define MPI_FW_HEADER_PID_FAMILY_1020TA0_SCSI   (0x000C)
1075 /* Fibre Channel */
1076 #define MPI_FW_HEADER_PID_FAMILY_909_FC         (0x0000)
1077 #define MPI_FW_HEADER_PID_FAMILY_919_FC         (0x0001) /* 919 and 929     */
1078 #define MPI_FW_HEADER_PID_FAMILY_919X_FC        (0x0002) /* 919X and 929X   */
1079 #define MPI_FW_HEADER_PID_FAMILY_919XL_FC       (0x0003) /* 919XL and 929XL */
1080 #define MPI_FW_HEADER_PID_FAMILY_939X_FC        (0x0004) /* 939X and 949X   */
1081 #define MPI_FW_HEADER_PID_FAMILY_959_FC         (0x0005)
1082 #define MPI_FW_HEADER_PID_FAMILY_949E_FC        (0x0006)
1083 /* SAS */
1084 #define MPI_FW_HEADER_PID_FAMILY_1064_SAS       (0x0001)
1085 #define MPI_FW_HEADER_PID_FAMILY_1068_SAS       (0x0002)
1086 #define MPI_FW_HEADER_PID_FAMILY_1078_SAS       (0x0003)
1087 #define MPI_FW_HEADER_PID_FAMILY_106xE_SAS      (0x0004) /* 1068E, 1066E, and 1064E */
1088
1089 typedef struct _MPI_EXT_IMAGE_HEADER
1090 {
1091     U8                      ImageType;                  /* 00h */
1092     U8                      Reserved;                   /* 01h */
1093     U16                     Reserved1;                  /* 02h */
1094     U32                     Checksum;                   /* 04h */
1095     U32                     ImageSize;                  /* 08h */
1096     U32                     NextImageHeaderOffset;      /* 0Ch */
1097     U32                     LoadStartAddress;           /* 10h */
1098     U32                     Reserved2;                  /* 14h */
1099 } MPI_EXT_IMAGE_HEADER, MPI_POINTER PTR_MPI_EXT_IMAGE_HEADER,
1100   MpiExtImageHeader_t, MPI_POINTER pMpiExtImageHeader_t;
1101
1102 /* defines for the ImageType field */
1103 #define MPI_EXT_IMAGE_TYPE_UNSPECIFIED          (0x00)
1104 #define MPI_EXT_IMAGE_TYPE_FW                   (0x01)
1105 #define MPI_EXT_IMAGE_TYPE_NVDATA               (0x03)
1106 #define MPI_EXT_IMAGE_TYPE_BOOTLOADER           (0x04)
1107 #define MPI_EXT_IMAGE_TYPE_INITIALIZATION       (0x05)
1108
1109 #endif