Merge branch 'fix/hda' into for-linus
[pandora-kernel.git] / drivers / media / video / mt9v011.c
1 /*
2  * mt9v011 -Micron 1/4-Inch VGA Digital Image Sensor
3  *
4  * Copyright (c) 2009 Mauro Carvalho Chehab (mchehab@redhat.com)
5  * This code is placed under the terms of the GNU General Public License v2
6  */
7
8 #include <linux/i2c.h>
9 #include <linux/videodev2.h>
10 #include <linux/delay.h>
11 #include <media/v4l2-device.h>
12 #include "mt9v011.h"
13 #include <media/v4l2-i2c-drv.h>
14 #include <media/v4l2-chip-ident.h>
15
16 MODULE_DESCRIPTION("Micron mt9v011 sensor driver");
17 MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
18 MODULE_LICENSE("GPL");
19
20
21 static int debug;
22 module_param(debug, int, 0);
23 MODULE_PARM_DESC(debug, "Debug level (0-2)");
24
25 /* supported controls */
26 static struct v4l2_queryctrl mt9v011_qctrl[] = {
27         {
28                 .id = V4L2_CID_GAIN,
29                 .type = V4L2_CTRL_TYPE_INTEGER,
30                 .name = "Gain",
31                 .minimum = 0,
32                 .maximum = (1 << 10) - 1,
33                 .step = 1,
34                 .default_value = 0x0020,
35                 .flags = 0,
36         }, {
37                 .id = V4L2_CID_RED_BALANCE,
38                 .type = V4L2_CTRL_TYPE_INTEGER,
39                 .name = "Red Balance",
40                 .minimum = -1 << 9,
41                 .maximum = (1 << 9) - 1,
42                 .step = 1,
43                 .default_value = 0,
44                 .flags = 0,
45         }, {
46                 .id = V4L2_CID_BLUE_BALANCE,
47                 .type = V4L2_CTRL_TYPE_INTEGER,
48                 .name = "Blue Balance",
49                 .minimum = -1 << 9,
50                 .maximum = (1 << 9) - 1,
51                 .step = 1,
52                 .default_value = 0,
53                 .flags = 0,
54         },
55 };
56
57 struct mt9v011 {
58         struct v4l2_subdev sd;
59         unsigned width, height;
60
61         u16 global_gain, red_bal, blue_bal;
62 };
63
64 static inline struct mt9v011 *to_mt9v011(struct v4l2_subdev *sd)
65 {
66         return container_of(sd, struct mt9v011, sd);
67 }
68
69 static int mt9v011_read(struct v4l2_subdev *sd, unsigned char addr)
70 {
71         struct i2c_client *c = v4l2_get_subdevdata(sd);
72         __be16 buffer;
73         int rc, val;
74
75         rc = i2c_master_send(c, &addr, 1);
76         if (rc != 1)
77                 v4l2_dbg(0, debug, sd,
78                          "i2c i/o error: rc == %d (should be 1)\n", rc);
79
80         msleep(10);
81
82         rc = i2c_master_recv(c, (char *)&buffer, 2);
83         if (rc != 2)
84                 v4l2_dbg(0, debug, sd,
85                          "i2c i/o error: rc == %d (should be 2)\n", rc);
86
87         val = be16_to_cpu(buffer);
88
89         v4l2_dbg(2, debug, sd, "mt9v011: read 0x%02x = 0x%04x\n", addr, val);
90
91         return val;
92 }
93
94 static void mt9v011_write(struct v4l2_subdev *sd, unsigned char addr,
95                                  u16 value)
96 {
97         struct i2c_client *c = v4l2_get_subdevdata(sd);
98         unsigned char buffer[3];
99         int rc;
100
101         buffer[0] = addr;
102         buffer[1] = value >> 8;
103         buffer[2] = value & 0xff;
104
105         v4l2_dbg(2, debug, sd,
106                  "mt9v011: writing 0x%02x 0x%04x\n", buffer[0], value);
107         rc = i2c_master_send(c, buffer, 3);
108         if (rc != 3)
109                 v4l2_dbg(0, debug, sd,
110                          "i2c i/o error: rc == %d (should be 3)\n", rc);
111 }
112
113
114 struct i2c_reg_value {
115         unsigned char reg;
116         u16           value;
117 };
118
119 /*
120  * Values used at the original driver
121  * Some values are marked as Reserved at the datasheet
122  */
123 static const struct i2c_reg_value mt9v011_init_default[] = {
124                 { R0D_MT9V011_RESET, 0x0001 },
125                 { R0D_MT9V011_RESET, 0x0000 },
126
127                 { R0C_MT9V011_SHUTTER_DELAY, 0x0000 },
128                 { R09_MT9V011_SHUTTER_WIDTH, 0x1fc },
129
130                 { R0A_MT9V011_CLK_SPEED, 0x0000 },
131                 { R1E_MT9V011_DIGITAL_ZOOM,  0x0000 },
132                 { R20_MT9V011_READ_MODE, 0x1000 },
133
134                 { R07_MT9V011_OUT_CTRL, 0x000a },       /* chip enable */
135 };
136
137 static void set_balance(struct v4l2_subdev *sd)
138 {
139         struct mt9v011 *core = to_mt9v011(sd);
140         u16 green1_gain, green2_gain, blue_gain, red_gain;
141
142         green1_gain = core->global_gain;
143         green2_gain = core->global_gain;
144
145         blue_gain = core->global_gain +
146                     core->global_gain * core->blue_bal / (1 << 9);
147
148         red_gain = core->global_gain +
149                    core->global_gain * core->blue_bal / (1 << 9);
150
151         mt9v011_write(sd, R2B_MT9V011_GREEN_1_GAIN, green1_gain);
152         mt9v011_write(sd, R2E_MT9V011_GREEN_2_GAIN,  green1_gain);
153         mt9v011_write(sd, R2C_MT9V011_BLUE_GAIN, blue_gain);
154         mt9v011_write(sd, R2D_MT9V011_RED_GAIN, red_gain);
155 }
156
157 static void set_res(struct v4l2_subdev *sd)
158 {
159         struct mt9v011 *core = to_mt9v011(sd);
160         unsigned vstart, hstart;
161
162         /*
163          * The mt9v011 doesn't have scaling. So, in order to select the desired
164          * resolution, we're cropping at the middle of the sensor.
165          * hblank and vblank should be adjusted, in order to warrant that
166          * we'll preserve the line timings for 30 fps, no matter what resolution
167          * is selected.
168          * NOTE: datasheet says that width (and height) should be filled with
169          * width-1. However, this doesn't work, since one pixel per line will
170          * be missing.
171          */
172
173         hstart = 14 + (640 - core->width) / 2;
174         mt9v011_write(sd, R02_MT9V011_COLSTART, hstart);
175         mt9v011_write(sd, R04_MT9V011_WIDTH, core->width);
176         mt9v011_write(sd, R05_MT9V011_HBLANK, 771 - core->width);
177
178         vstart = 8 + (640 - core->height) / 2;
179         mt9v011_write(sd, R01_MT9V011_ROWSTART, vstart);
180         mt9v011_write(sd, R03_MT9V011_HEIGHT, core->height);
181         mt9v011_write(sd, R06_MT9V011_VBLANK, 508 - core->height);
182 };
183
184 static int mt9v011_reset(struct v4l2_subdev *sd, u32 val)
185 {
186         int i;
187
188         for (i = 0; i < ARRAY_SIZE(mt9v011_init_default); i++)
189                 mt9v011_write(sd, mt9v011_init_default[i].reg,
190                                mt9v011_init_default[i].value);
191
192         set_balance(sd);
193         set_res(sd);
194
195         return 0;
196 };
197
198 static int mt9v011_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
199 {
200         struct mt9v011 *core = to_mt9v011(sd);
201
202         v4l2_dbg(1, debug, sd, "g_ctrl called\n");
203
204         switch (ctrl->id) {
205         case V4L2_CID_GAIN:
206                 ctrl->value = core->global_gain;
207                 return 0;
208         case V4L2_CID_RED_BALANCE:
209                 ctrl->value = core->red_bal;
210                 return 0;
211         case V4L2_CID_BLUE_BALANCE:
212                 ctrl->value = core->blue_bal;
213                 return 0;
214         }
215         return -EINVAL;
216 }
217
218 static int mt9v011_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
219 {
220         struct mt9v011 *core = to_mt9v011(sd);
221         u8 i, n;
222         n = ARRAY_SIZE(mt9v011_qctrl);
223
224         for (i = 0; i < n; i++) {
225                 if (ctrl->id != mt9v011_qctrl[i].id)
226                         continue;
227                 if (ctrl->value < mt9v011_qctrl[i].minimum ||
228                     ctrl->value > mt9v011_qctrl[i].maximum)
229                         return -ERANGE;
230                 v4l2_dbg(1, debug, sd, "s_ctrl: id=%d, value=%d\n",
231                                         ctrl->id, ctrl->value);
232                 break;
233         }
234
235         switch (ctrl->id) {
236         case V4L2_CID_GAIN:
237                 core->global_gain = ctrl->value;
238                 break;
239         case V4L2_CID_RED_BALANCE:
240                 core->red_bal = ctrl->value;
241                 break;
242         case V4L2_CID_BLUE_BALANCE:
243                 core->blue_bal = ctrl->value;
244                 break;
245         default:
246                 return -EINVAL;
247         }
248
249         set_balance(sd);
250
251         return 0;
252 }
253
254 static int mt9v011_enum_fmt(struct v4l2_subdev *sd, struct v4l2_fmtdesc *fmt)
255 {
256         if (fmt->index > 0)
257                 return -EINVAL;
258
259         fmt->flags = 0;
260         strcpy(fmt->description, "8 bpp Bayer GRGR..BGBG");
261         fmt->pixelformat = V4L2_PIX_FMT_SGRBG8;
262
263         return 0;
264 }
265
266 static int mt9v011_try_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt)
267 {
268         struct v4l2_pix_format *pix = &fmt->fmt.pix;
269
270         if (pix->pixelformat != V4L2_PIX_FMT_SGRBG8)
271                 return -EINVAL;
272
273         v4l_bound_align_image(&pix->width, 48, 639, 1,
274                               &pix->height, 32, 480, 1, 0);
275
276         return 0;
277 }
278
279 static int mt9v011_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt)
280 {
281         struct v4l2_pix_format *pix = &fmt->fmt.pix;
282         struct mt9v011 *core = to_mt9v011(sd);
283         int rc;
284
285         rc = mt9v011_try_fmt(sd, fmt);
286         if (rc < 0)
287                 return -EINVAL;
288
289         core->width = pix->width;
290         core->height = pix->height;
291
292         set_res(sd);
293
294         return 0;
295 }
296
297
298 #ifdef CONFIG_VIDEO_ADV_DEBUG
299 static int mt9v011_g_register(struct v4l2_subdev *sd,
300                               struct v4l2_dbg_register *reg)
301 {
302         struct i2c_client *client = v4l2_get_subdevdata(sd);
303
304         if (!v4l2_chip_match_i2c_client(client, &reg->match))
305                 return -EINVAL;
306         if (!capable(CAP_SYS_ADMIN))
307                 return -EPERM;
308
309         reg->val = mt9v011_read(sd, reg->reg & 0xff);
310         reg->size = 2;
311
312         return 0;
313 }
314
315 static int mt9v011_s_register(struct v4l2_subdev *sd,
316                               struct v4l2_dbg_register *reg)
317 {
318         struct i2c_client *client = v4l2_get_subdevdata(sd);
319
320         if (!v4l2_chip_match_i2c_client(client, &reg->match))
321                 return -EINVAL;
322         if (!capable(CAP_SYS_ADMIN))
323                 return -EPERM;
324
325         mt9v011_write(sd, reg->reg & 0xff, reg->val & 0xffff);
326
327         return 0;
328 }
329 #endif
330
331 static int mt9v011_g_chip_ident(struct v4l2_subdev *sd,
332                                 struct v4l2_dbg_chip_ident *chip)
333 {
334         struct i2c_client *client = v4l2_get_subdevdata(sd);
335
336         return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_MT9V011,
337                                           MT9V011_VERSION);
338 }
339
340 static const struct v4l2_subdev_core_ops mt9v011_core_ops = {
341         .g_ctrl = mt9v011_g_ctrl,
342         .s_ctrl = mt9v011_s_ctrl,
343         .reset = mt9v011_reset,
344         .g_chip_ident = mt9v011_g_chip_ident,
345 #ifdef CONFIG_VIDEO_ADV_DEBUG
346         .g_register = mt9v011_g_register,
347         .s_register = mt9v011_s_register,
348 #endif
349 };
350
351 static const struct v4l2_subdev_video_ops mt9v011_video_ops = {
352         .enum_fmt = mt9v011_enum_fmt,
353         .try_fmt = mt9v011_try_fmt,
354         .s_fmt = mt9v011_s_fmt,
355 };
356
357 static const struct v4l2_subdev_ops mt9v011_ops = {
358         .core  = &mt9v011_core_ops,
359         .video = &mt9v011_video_ops,
360 };
361
362
363 /****************************************************************************
364                         I2C Client & Driver
365  ****************************************************************************/
366
367 static int mt9v011_probe(struct i2c_client *c,
368                          const struct i2c_device_id *id)
369 {
370         u16 version;
371         struct mt9v011 *core;
372         struct v4l2_subdev *sd;
373
374         /* Check if the adapter supports the needed features */
375         if (!i2c_check_functionality(c->adapter,
376              I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
377                 return -EIO;
378
379         core = kzalloc(sizeof(struct mt9v011), GFP_KERNEL);
380         if (!core)
381                 return -ENOMEM;
382
383         sd = &core->sd;
384         v4l2_i2c_subdev_init(sd, c, &mt9v011_ops);
385
386         /* Check if the sensor is really a MT9V011 */
387         version = mt9v011_read(sd, R00_MT9V011_CHIP_VERSION);
388         if (version != MT9V011_VERSION) {
389                 v4l2_info(sd, "*** unknown micron chip detected (0x%04x.\n",
390                           version);
391                 kfree(core);
392                 return -EINVAL;
393         }
394
395         core->global_gain = 0x0024;
396         core->width  = 640;
397         core->height = 480;
398
399         v4l_info(c, "chip found @ 0x%02x (%s)\n",
400                  c->addr << 1, c->adapter->name);
401
402         return 0;
403 }
404
405 static int mt9v011_remove(struct i2c_client *c)
406 {
407         struct v4l2_subdev *sd = i2c_get_clientdata(c);
408
409         v4l2_dbg(1, debug, sd,
410                 "mt9v011.c: removing mt9v011 adapter on address 0x%x\n",
411                 c->addr << 1);
412
413         v4l2_device_unregister_subdev(sd);
414         kfree(to_mt9v011(sd));
415         return 0;
416 }
417
418 /* ----------------------------------------------------------------------- */
419
420 static const struct i2c_device_id mt9v011_id[] = {
421         { "mt9v011", 0 },
422         { }
423 };
424 MODULE_DEVICE_TABLE(i2c, mt9v011_id);
425
426 static struct v4l2_i2c_driver_data v4l2_i2c_data = {
427         .name = "mt9v011",
428         .probe = mt9v011_probe,
429         .remove = mt9v011_remove,
430         .id_table = mt9v011_id,
431 };