2 * mt9t112 Camera Driver
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
7 * Based on ov772x driver, mt9m111 driver,
9 * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com>
10 * Copyright (C) 2008, Robert Jarzmik <robert.jarzmik@free.fr>
11 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
12 * Copyright (C) 2008 Magnus Damm
13 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
20 #include <linux/delay.h>
21 #include <linux/i2c.h>
22 #include <linux/init.h>
23 #include <linux/module.h>
24 #include <linux/slab.h>
25 #include <linux/videodev2.h>
27 #include <media/mt9t112.h>
28 #include <media/soc_camera.h>
29 #include <media/soc_mediabus.h>
30 #include <media/v4l2-chip-ident.h>
31 #include <media/v4l2-common.h>
33 /* you can check PLL/clock info */
34 /* #define EXT_CLOCK 24000000 */
36 /************************************************************************
38 ************************************************************************/
42 #define MAX_WIDTH 2048
43 #define MAX_HEIGHT 1536
46 #define VGA_HEIGHT 480
51 #define ECHECKER(ret, x) \
58 #define mt9t112_reg_write(ret, client, a, b) \
59 ECHECKER(ret, __mt9t112_reg_write(client, a, b))
60 #define mt9t112_mcu_write(ret, client, a, b) \
61 ECHECKER(ret, __mt9t112_mcu_write(client, a, b))
63 #define mt9t112_reg_mask_set(ret, client, a, b, c) \
64 ECHECKER(ret, __mt9t112_reg_mask_set(client, a, b, c))
65 #define mt9t112_mcu_mask_set(ret, client, a, b, c) \
66 ECHECKER(ret, __mt9t112_mcu_mask_set(client, a, b, c))
68 #define mt9t112_reg_read(ret, client, a) \
69 ECHECKER(ret, __mt9t112_reg_read(client, a))
74 #define _VAR(id, offset, base) (base | (id & 0x1f) << 10 | (offset & 0x3ff))
75 #define VAR(id, offset) _VAR(id, offset, 0x0000)
76 #define VAR8(id, offset) _VAR(id, offset, 0x8000)
78 /************************************************************************
80 ************************************************************************/
81 struct mt9t112_frame_size {
86 struct mt9t112_format {
87 enum v4l2_mbus_pixelcode code;
88 enum v4l2_colorspace colorspace;
94 struct v4l2_subdev subdev;
95 struct mt9t112_camera_info *info;
96 struct i2c_client *client;
97 struct soc_camera_device icd;
98 struct mt9t112_frame_size frame;
99 const struct mt9t112_format *format;
103 #define INIT_DONE (1 << 0)
104 #define PCLK_RISING (1 << 1)
107 /************************************************************************
109 ************************************************************************/
111 static const struct mt9t112_format mt9t112_cfmts[] = {
113 .code = V4L2_MBUS_FMT_UYVY8_2X8,
114 .colorspace = V4L2_COLORSPACE_JPEG,
118 .code = V4L2_MBUS_FMT_VYUY8_2X8,
119 .colorspace = V4L2_COLORSPACE_JPEG,
123 .code = V4L2_MBUS_FMT_YUYV8_2X8,
124 .colorspace = V4L2_COLORSPACE_JPEG,
128 .code = V4L2_MBUS_FMT_YVYU8_2X8,
129 .colorspace = V4L2_COLORSPACE_JPEG,
133 .code = V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE,
134 .colorspace = V4L2_COLORSPACE_SRGB,
138 .code = V4L2_MBUS_FMT_RGB565_2X8_LE,
139 .colorspace = V4L2_COLORSPACE_SRGB,
145 /************************************************************************
147 ************************************************************************/
148 static struct mt9t112_priv *to_mt9t112(const struct i2c_client *client)
150 return container_of(i2c_get_clientdata(client),
155 static int __mt9t112_reg_read(const struct i2c_client *client, u16 command)
157 struct i2c_msg msg[2];
161 command = swab16(command);
163 msg[0].addr = client->addr;
166 msg[0].buf = (u8 *)&command;
168 msg[1].addr = client->addr;
169 msg[1].flags = I2C_M_RD;
174 * if return value of this function is < 0,
176 * else, under 16bit is valid data.
178 ret = i2c_transfer(client->adapter, msg, 2);
182 memcpy(&ret, buf, 2);
186 static int __mt9t112_reg_write(const struct i2c_client *client,
187 u16 command, u16 data)
193 command = swab16(command);
196 memcpy(buf + 0, &command, 2);
197 memcpy(buf + 2, &data, 2);
199 msg.addr = client->addr;
205 * i2c_transfer return message length,
206 * but this function should return 0 if correct case
208 ret = i2c_transfer(client->adapter, &msg, 1);
215 static int __mt9t112_reg_mask_set(const struct i2c_client *client,
220 int val = __mt9t112_reg_read(client, command);
227 return __mt9t112_reg_write(client, command, val);
231 static int __mt9t112_mcu_read(const struct i2c_client *client, u16 command)
235 ret = __mt9t112_reg_write(client, 0x098E, command);
239 return __mt9t112_reg_read(client, 0x0990);
242 static int __mt9t112_mcu_write(const struct i2c_client *client,
243 u16 command, u16 data)
247 ret = __mt9t112_reg_write(client, 0x098E, command);
251 return __mt9t112_reg_write(client, 0x0990, data);
254 static int __mt9t112_mcu_mask_set(const struct i2c_client *client,
259 int val = __mt9t112_mcu_read(client, command);
266 return __mt9t112_mcu_write(client, command, val);
269 static int mt9t112_reset(const struct i2c_client *client)
273 mt9t112_reg_mask_set(ret, client, 0x001a, 0x0001, 0x0001);
275 mt9t112_reg_mask_set(ret, client, 0x001a, 0x0001, 0x0000);
281 #define CLOCK_INFO(a, b)
283 #define CLOCK_INFO(a, b) mt9t112_clock_info(a, b)
284 static int mt9t112_clock_info(const struct i2c_client *client, u32 ext)
286 int m, n, p1, p2, p3, p4, p5, p6, p7;
290 ext /= 1000; /* kbyte order */
292 mt9t112_reg_read(n, client, 0x0012);
299 mt9t112_reg_read(n, client, 0x002a);
306 mt9t112_reg_read(n, client, 0x002c);
309 mt9t112_reg_read(n, client, 0x0010);
311 n = (n >> 8) & 0x003f;
313 enable = ((6000 > ext) || (54000 < ext)) ? "X" : "";
314 dev_info(&client->dev, "EXTCLK : %10u K %s\n", ext, enable);
316 vco = 2 * m * ext / (n+1);
317 enable = ((384000 > vco) || (768000 < vco)) ? "X" : "";
318 dev_info(&client->dev, "VCO : %10u K %s\n", vco, enable);
320 clk = vco / (p1+1) / (p2+1);
321 enable = (96000 < clk) ? "X" : "";
322 dev_info(&client->dev, "PIXCLK : %10u K %s\n", clk, enable);
325 enable = (768000 < clk) ? "X" : "";
326 dev_info(&client->dev, "MIPICLK : %10u K %s\n", clk, enable);
329 enable = (96000 < clk) ? "X" : "";
330 dev_info(&client->dev, "MCU CLK : %10u K %s\n", clk, enable);
333 enable = (54000 < clk) ? "X" : "";
334 dev_info(&client->dev, "SOC CLK : %10u K %s\n", clk, enable);
337 enable = (70000 < clk) ? "X" : "";
338 dev_info(&client->dev, "Sensor CLK : %10u K %s\n", clk, enable);
341 dev_info(&client->dev, "External sensor : %10u K\n", clk);
344 enable = ((2000 > clk) || (24000 < clk)) ? "X" : "";
345 dev_info(&client->dev, "PFD : %10u K %s\n", clk, enable);
351 static void mt9t112_frame_check(u32 *width, u32 *height)
353 if (*width > MAX_WIDTH)
356 if (*height > MAX_HEIGHT)
357 *height = MAX_HEIGHT;
360 static int mt9t112_set_a_frame_size(const struct i2c_client *client,
365 u16 wstart = (MAX_WIDTH - width) / 2;
366 u16 hstart = (MAX_HEIGHT - height) / 2;
368 /* (Context A) Image Width/Height */
369 mt9t112_mcu_write(ret, client, VAR(26, 0), width);
370 mt9t112_mcu_write(ret, client, VAR(26, 2), height);
372 /* (Context A) Output Width/Height */
373 mt9t112_mcu_write(ret, client, VAR(18, 43), 8 + width);
374 mt9t112_mcu_write(ret, client, VAR(18, 45), 8 + height);
376 /* (Context A) Start Row/Column */
377 mt9t112_mcu_write(ret, client, VAR(18, 2), 4 + hstart);
378 mt9t112_mcu_write(ret, client, VAR(18, 4), 4 + wstart);
380 /* (Context A) End Row/Column */
381 mt9t112_mcu_write(ret, client, VAR(18, 6), 11 + height + hstart);
382 mt9t112_mcu_write(ret, client, VAR(18, 8), 11 + width + wstart);
384 mt9t112_mcu_write(ret, client, VAR8(1, 0), 0x06);
389 static int mt9t112_set_pll_dividers(const struct i2c_client *client,
401 mt9t112_reg_mask_set(ret, client, 0x0010, 0x3fff, val);
404 val = ((p3 & 0x0F) << 8) |
407 mt9t112_reg_mask_set(ret, client, 0x0012, 0x0fff, val);
414 mt9t112_reg_mask_set(ret, client, 0x002A, 0x7fff, val);
419 mt9t112_reg_mask_set(ret, client, 0x002C, 0x100f, val);
424 static int mt9t112_init_pll(const struct i2c_client *client)
426 struct mt9t112_priv *priv = to_mt9t112(client);
429 mt9t112_reg_mask_set(ret, client, 0x0014, 0x003, 0x0001);
431 /* PLL control: BYPASS PLL = 8517 */
432 mt9t112_reg_write(ret, client, 0x0014, 0x2145);
434 /* Replace these registers when new timing parameters are generated */
435 mt9t112_set_pll_dividers(client,
436 priv->info->divider.m,
437 priv->info->divider.n,
438 priv->info->divider.p1,
439 priv->info->divider.p2,
440 priv->info->divider.p3,
441 priv->info->divider.p4,
442 priv->info->divider.p5,
443 priv->info->divider.p6,
444 priv->info->divider.p7);
452 mt9t112_reg_write(ret, client, 0x0014, 0x2525);
453 mt9t112_reg_write(ret, client, 0x0014, 0x2527);
454 mt9t112_reg_write(ret, client, 0x0014, 0x3427);
455 mt9t112_reg_write(ret, client, 0x0014, 0x3027);
461 * Reference clock count
462 * I2C Master Clock Divider
464 mt9t112_reg_write(ret, client, 0x0014, 0x3046);
465 mt9t112_reg_write(ret, client, 0x0022, 0x0190);
466 mt9t112_reg_write(ret, client, 0x3B84, 0x0212);
468 /* External sensor clock is PLL bypass */
469 mt9t112_reg_write(ret, client, 0x002E, 0x0500);
471 mt9t112_reg_mask_set(ret, client, 0x0018, 0x0002, 0x0002);
472 mt9t112_reg_mask_set(ret, client, 0x3B82, 0x0004, 0x0004);
475 mt9t112_reg_mask_set(ret, client, 0x0018, 0x0004, 0x0004);
478 mt9t112_reg_mask_set(ret, client, 0x0018, 0x0001, 0);
484 * Disable Secondary I2C Pads
486 mt9t112_reg_write(ret, client, 0x0614, 0x0001);
488 mt9t112_reg_write(ret, client, 0x0614, 0x0001);
490 mt9t112_reg_write(ret, client, 0x0614, 0x0001);
492 mt9t112_reg_write(ret, client, 0x0614, 0x0001);
494 mt9t112_reg_write(ret, client, 0x0614, 0x0001);
496 mt9t112_reg_write(ret, client, 0x0614, 0x0001);
499 /* poll to verify out of standby. Must Poll this bit */
500 for (i = 0; i < 100; i++) {
501 mt9t112_reg_read(data, client, 0x0018);
502 if (!(0x4000 & data))
511 static int mt9t112_init_setting(const struct i2c_client *client)
516 /* Adaptive Output Clock (A) */
517 mt9t112_mcu_mask_set(ret, client, VAR(26, 160), 0x0040, 0x0000);
520 mt9t112_mcu_write(ret, client, VAR(18, 12), 0x0024);
522 /* Fine Correction (A) */
523 mt9t112_mcu_write(ret, client, VAR(18, 15), 0x00CC);
525 /* Fine IT Min (A) */
526 mt9t112_mcu_write(ret, client, VAR(18, 17), 0x01f1);
528 /* Fine IT Max Margin (A) */
529 mt9t112_mcu_write(ret, client, VAR(18, 19), 0x00fF);
531 /* Base Frame Lines (A) */
532 mt9t112_mcu_write(ret, client, VAR(18, 29), 0x032D);
534 /* Min Line Length (A) */
535 mt9t112_mcu_write(ret, client, VAR(18, 31), 0x073a);
537 /* Line Length (A) */
538 mt9t112_mcu_write(ret, client, VAR(18, 37), 0x07d0);
540 /* Adaptive Output Clock (B) */
541 mt9t112_mcu_mask_set(ret, client, VAR(27, 160), 0x0040, 0x0000);
544 mt9t112_mcu_write(ret, client, VAR(18, 74), 0x004);
546 /* Column Start (B) */
547 mt9t112_mcu_write(ret, client, VAR(18, 76), 0x004);
550 mt9t112_mcu_write(ret, client, VAR(18, 78), 0x60B);
553 mt9t112_mcu_write(ret, client, VAR(18, 80), 0x80B);
555 /* Fine Correction (B) */
556 mt9t112_mcu_write(ret, client, VAR(18, 87), 0x008C);
558 /* Fine IT Min (B) */
559 mt9t112_mcu_write(ret, client, VAR(18, 89), 0x01F1);
561 /* Fine IT Max Margin (B) */
562 mt9t112_mcu_write(ret, client, VAR(18, 91), 0x00FF);
564 /* Base Frame Lines (B) */
565 mt9t112_mcu_write(ret, client, VAR(18, 101), 0x0668);
567 /* Min Line Length (B) */
568 mt9t112_mcu_write(ret, client, VAR(18, 103), 0x0AF0);
570 /* Line Length (B) */
571 mt9t112_mcu_write(ret, client, VAR(18, 109), 0x0AF0);
574 * Flicker Dectection registers
575 * This section should be replaced whenever new Timing file is generated
576 * All the following registers need to be replaced
577 * Following registers are generated from Register Wizard but user can
578 * modify them. For detail see auto flicker detection tuning
581 /* FD_FDPERIOD_SELECT */
582 mt9t112_mcu_write(ret, client, VAR8(8, 5), 0x01);
584 /* PRI_B_CONFIG_FD_ALGO_RUN */
585 mt9t112_mcu_write(ret, client, VAR(27, 17), 0x0003);
587 /* PRI_A_CONFIG_FD_ALGO_RUN */
588 mt9t112_mcu_write(ret, client, VAR(26, 17), 0x0003);
591 * AFD range detection tuning registers
595 mt9t112_mcu_write(ret, client, VAR8(18, 165), 0x25);
598 mt9t112_mcu_write(ret, client, VAR8(18, 166), 0x28);
601 mt9t112_mcu_write(ret, client, VAR8(18, 167), 0x2C);
604 mt9t112_mcu_write(ret, client, VAR8(18, 168), 0x2F);
606 /* period_50Hz (A) */
607 mt9t112_mcu_write(ret, client, VAR8(18, 68), 0xBA);
609 /* secret register by aptina */
610 /* period_50Hz (A MSB) */
611 mt9t112_mcu_write(ret, client, VAR8(18, 303), 0x00);
613 /* period_60Hz (A) */
614 mt9t112_mcu_write(ret, client, VAR8(18, 69), 0x9B);
616 /* secret register by aptina */
617 /* period_60Hz (A MSB) */
618 mt9t112_mcu_write(ret, client, VAR8(18, 301), 0x00);
620 /* period_50Hz (B) */
621 mt9t112_mcu_write(ret, client, VAR8(18, 140), 0x82);
623 /* secret register by aptina */
624 /* period_50Hz (B) MSB */
625 mt9t112_mcu_write(ret, client, VAR8(18, 304), 0x00);
627 /* period_60Hz (B) */
628 mt9t112_mcu_write(ret, client, VAR8(18, 141), 0x6D);
630 /* secret register by aptina */
631 /* period_60Hz (B) MSB */
632 mt9t112_mcu_write(ret, client, VAR8(18, 302), 0x00);
635 mt9t112_mcu_write(ret, client, VAR8(8, 2), 0x10);
638 mt9t112_mcu_write(ret, client, VAR8(8, 9), 0x02);
641 mt9t112_mcu_write(ret, client, VAR8(8, 10), 0x03);
644 mt9t112_mcu_write(ret, client, VAR8(8, 12), 0x0A);
646 /* RX FIFO Watermark (A) */
647 mt9t112_mcu_write(ret, client, VAR(18, 70), 0x0014);
649 /* RX FIFO Watermark (B) */
650 mt9t112_mcu_write(ret, client, VAR(18, 142), 0x0014);
654 * CorePixCLK: 36.5 MHz
656 mt9t112_mcu_write(ret, client, VAR8(18, 0x0044), 133);
657 mt9t112_mcu_write(ret, client, VAR8(18, 0x0045), 110);
658 mt9t112_mcu_write(ret, client, VAR8(18, 0x008c), 130);
659 mt9t112_mcu_write(ret, client, VAR8(18, 0x008d), 108);
661 mt9t112_mcu_write(ret, client, VAR8(18, 0x00A5), 27);
662 mt9t112_mcu_write(ret, client, VAR8(18, 0x00a6), 30);
663 mt9t112_mcu_write(ret, client, VAR8(18, 0x00a7), 32);
664 mt9t112_mcu_write(ret, client, VAR8(18, 0x00a8), 35);
669 static int mt9t112_auto_focus_setting(const struct i2c_client *client)
673 mt9t112_mcu_write(ret, client, VAR(12, 13), 0x000F);
674 mt9t112_mcu_write(ret, client, VAR(12, 23), 0x0F0F);
675 mt9t112_mcu_write(ret, client, VAR8(1, 0), 0x06);
677 mt9t112_reg_write(ret, client, 0x0614, 0x0000);
679 mt9t112_mcu_write(ret, client, VAR8(1, 0), 0x05);
680 mt9t112_mcu_write(ret, client, VAR8(12, 2), 0x02);
681 mt9t112_mcu_write(ret, client, VAR(12, 3), 0x0002);
682 mt9t112_mcu_write(ret, client, VAR(17, 3), 0x8001);
683 mt9t112_mcu_write(ret, client, VAR(17, 11), 0x0025);
684 mt9t112_mcu_write(ret, client, VAR(17, 13), 0x0193);
685 mt9t112_mcu_write(ret, client, VAR8(17, 33), 0x18);
686 mt9t112_mcu_write(ret, client, VAR8(1, 0), 0x05);
691 static int mt9t112_auto_focus_trigger(const struct i2c_client *client)
695 mt9t112_mcu_write(ret, client, VAR8(12, 25), 0x01);
700 static int mt9t112_init_camera(const struct i2c_client *client)
704 ECHECKER(ret, mt9t112_reset(client));
706 ECHECKER(ret, mt9t112_init_pll(client));
708 ECHECKER(ret, mt9t112_init_setting(client));
710 ECHECKER(ret, mt9t112_auto_focus_setting(client));
712 mt9t112_reg_mask_set(ret, client, 0x0018, 0x0004, 0);
714 /* Analog setting B */
715 mt9t112_reg_write(ret, client, 0x3084, 0x2409);
716 mt9t112_reg_write(ret, client, 0x3092, 0x0A49);
717 mt9t112_reg_write(ret, client, 0x3094, 0x4949);
718 mt9t112_reg_write(ret, client, 0x3096, 0x4950);
721 * Disable adaptive clock
722 * PRI_A_CONFIG_JPEG_OB_TX_CONTROL_VAR
723 * PRI_B_CONFIG_JPEG_OB_TX_CONTROL_VAR
725 mt9t112_mcu_write(ret, client, VAR(26, 160), 0x0A2E);
726 mt9t112_mcu_write(ret, client, VAR(27, 160), 0x0A2E);
728 /* Configure STatus in Status_before_length Format and enable header */
729 /* PRI_B_CONFIG_JPEG_OB_TX_CONTROL_VAR */
730 mt9t112_mcu_write(ret, client, VAR(27, 144), 0x0CB4);
732 /* Enable JPEG in context B */
733 /* PRI_B_CONFIG_JPEG_OB_TX_CONTROL_VAR */
734 mt9t112_mcu_write(ret, client, VAR8(27, 142), 0x01);
736 /* Disable Dac_TXLO */
737 mt9t112_reg_write(ret, client, 0x316C, 0x350F);
739 /* Set max slew rates */
740 mt9t112_reg_write(ret, client, 0x1E, 0x777);
745 /************************************************************************
747 ************************************************************************/
748 static int mt9t112_set_bus_param(struct soc_camera_device *icd,
751 struct soc_camera_link *icl = to_soc_camera_link(icd);
752 struct i2c_client *client = to_i2c_client(to_soc_camera_control(icd));
753 struct mt9t112_priv *priv = to_mt9t112(client);
755 if (soc_camera_apply_sensor_flags(icl, flags) & SOCAM_PCLK_SAMPLE_RISING)
756 priv->flags |= PCLK_RISING;
761 static unsigned long mt9t112_query_bus_param(struct soc_camera_device *icd)
763 struct i2c_client *client = to_i2c_client(to_soc_camera_control(icd));
764 struct mt9t112_priv *priv = to_mt9t112(client);
765 struct soc_camera_link *icl = to_soc_camera_link(icd);
766 unsigned long flags = SOCAM_MASTER | SOCAM_VSYNC_ACTIVE_HIGH |
767 SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_DATA_ACTIVE_HIGH;
769 flags |= (priv->info->flags & MT9T112_FLAG_PCLK_RISING_EDGE) ?
770 SOCAM_PCLK_SAMPLE_RISING : SOCAM_PCLK_SAMPLE_FALLING;
772 if (priv->info->flags & MT9T112_FLAG_DATAWIDTH_8)
773 flags |= SOCAM_DATAWIDTH_8;
775 flags |= SOCAM_DATAWIDTH_10;
777 return soc_camera_apply_sensor_flags(icl, flags);
780 static struct soc_camera_ops mt9t112_ops = {
781 .set_bus_param = mt9t112_set_bus_param,
782 .query_bus_param = mt9t112_query_bus_param,
785 /************************************************************************
787 ************************************************************************/
788 static int mt9t112_g_chip_ident(struct v4l2_subdev *sd,
789 struct v4l2_dbg_chip_ident *id)
791 struct i2c_client *client = v4l2_get_subdevdata(sd);
792 struct mt9t112_priv *priv = to_mt9t112(client);
794 id->ident = priv->model;
800 #ifdef CONFIG_VIDEO_ADV_DEBUG
801 static int mt9t112_g_register(struct v4l2_subdev *sd,
802 struct v4l2_dbg_register *reg)
804 struct i2c_client *client = v4l2_get_subdevdata(sd);
808 mt9t112_reg_read(ret, client, reg->reg);
810 reg->val = (__u64)ret;
815 static int mt9t112_s_register(struct v4l2_subdev *sd,
816 struct v4l2_dbg_register *reg)
818 struct i2c_client *client = v4l2_get_subdevdata(sd);
821 mt9t112_reg_write(ret, client, reg->reg, reg->val);
827 static struct v4l2_subdev_core_ops mt9t112_subdev_core_ops = {
828 .g_chip_ident = mt9t112_g_chip_ident,
829 #ifdef CONFIG_VIDEO_ADV_DEBUG
830 .g_register = mt9t112_g_register,
831 .s_register = mt9t112_s_register,
836 /************************************************************************
837 v4l2_subdev_video_ops
838 ************************************************************************/
839 static int mt9t112_s_stream(struct v4l2_subdev *sd, int enable)
841 struct i2c_client *client = v4l2_get_subdevdata(sd);
842 struct mt9t112_priv *priv = to_mt9t112(client);
848 * If user selected large output size,
849 * and used it long time,
850 * mt9t112 camera will be very warm.
852 * But current driver can not stop mt9t112 camera.
853 * So, set small size here to solve this problem.
855 mt9t112_set_a_frame_size(client, VGA_WIDTH, VGA_HEIGHT);
859 if (!(priv->flags & INIT_DONE)) {
860 u16 param = PCLK_RISING & priv->flags ? 0x0001 : 0x0000;
862 ECHECKER(ret, mt9t112_init_camera(client));
864 /* Invert PCLK (Data sampled on falling edge of pixclk) */
865 mt9t112_reg_write(ret, client, 0x3C20, param);
869 priv->flags |= INIT_DONE;
872 mt9t112_mcu_write(ret, client, VAR(26, 7), priv->format->fmt);
873 mt9t112_mcu_write(ret, client, VAR(26, 9), priv->format->order);
874 mt9t112_mcu_write(ret, client, VAR8(1, 0), 0x06);
876 mt9t112_set_a_frame_size(client,
880 ECHECKER(ret, mt9t112_auto_focus_trigger(client));
882 dev_dbg(&client->dev, "format : %d\n", priv->format->code);
883 dev_dbg(&client->dev, "size : %d x %d\n",
887 CLOCK_INFO(client, EXT_CLOCK);
892 static int mt9t112_set_params(struct i2c_client *client, u32 width, u32 height,
893 enum v4l2_mbus_pixelcode code)
895 struct mt9t112_priv *priv = to_mt9t112(client);
903 mt9t112_frame_check(&width, &height);
908 for (i = 0; i < ARRAY_SIZE(mt9t112_cfmts); i++)
909 if (mt9t112_cfmts[i].code == code)
912 if (i == ARRAY_SIZE(mt9t112_cfmts))
915 priv->frame.width = (u16)width;
916 priv->frame.height = (u16)height;
918 priv->format = mt9t112_cfmts + i;
923 static int mt9t112_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
927 a->bounds.width = VGA_WIDTH;
928 a->bounds.height = VGA_HEIGHT;
929 a->defrect = a->bounds;
930 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
931 a->pixelaspect.numerator = 1;
932 a->pixelaspect.denominator = 1;
937 static int mt9t112_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
941 a->c.width = VGA_WIDTH;
942 a->c.height = VGA_HEIGHT;
943 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
948 static int mt9t112_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
950 struct i2c_client *client = v4l2_get_subdevdata(sd);
951 struct v4l2_rect *rect = &a->c;
953 return mt9t112_set_params(client, rect->width, rect->height,
954 V4L2_MBUS_FMT_UYVY8_2X8);
957 static int mt9t112_g_fmt(struct v4l2_subdev *sd,
958 struct v4l2_mbus_framefmt *mf)
960 struct i2c_client *client = v4l2_get_subdevdata(sd);
961 struct mt9t112_priv *priv = to_mt9t112(client);
964 int ret = mt9t112_set_params(client, VGA_WIDTH, VGA_HEIGHT,
965 V4L2_MBUS_FMT_UYVY8_2X8);
970 mf->width = priv->frame.width;
971 mf->height = priv->frame.height;
972 /* TODO: set colorspace */
973 mf->code = priv->format->code;
974 mf->field = V4L2_FIELD_NONE;
979 static int mt9t112_s_fmt(struct v4l2_subdev *sd,
980 struct v4l2_mbus_framefmt *mf)
982 struct i2c_client *client = v4l2_get_subdevdata(sd);
984 /* TODO: set colorspace */
985 return mt9t112_set_params(client, mf->width, mf->height, mf->code);
988 static int mt9t112_try_fmt(struct v4l2_subdev *sd,
989 struct v4l2_mbus_framefmt *mf)
991 mt9t112_frame_check(&mf->width, &mf->height);
993 /* TODO: set colorspace */
994 mf->field = V4L2_FIELD_NONE;
999 static int mt9t112_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
1000 enum v4l2_mbus_pixelcode *code)
1002 if (index >= ARRAY_SIZE(mt9t112_cfmts))
1005 *code = mt9t112_cfmts[index].code;
1009 static int mt9t112_g_mbus_config(struct v4l2_subdev *sd,
1010 struct v4l2_mbus_config *cfg)
1012 struct i2c_client *client = v4l2_get_subdevdata(sd);
1013 struct soc_camera_device *icd = client->dev.platform_data;
1014 struct soc_camera_link *icl = to_soc_camera_link(icd);
1016 cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_VSYNC_ACTIVE_HIGH |
1017 V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_DATA_ACTIVE_HIGH |
1018 V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_PCLK_SAMPLE_FALLING;
1019 cfg->type = V4L2_MBUS_PARALLEL;
1020 cfg->flags = soc_camera_apply_board_flags(icl, cfg);
1025 static int mt9t112_s_mbus_config(struct v4l2_subdev *sd,
1026 const struct v4l2_mbus_config *cfg)
1028 struct i2c_client *client = v4l2_get_subdevdata(sd);
1029 struct soc_camera_device *icd = client->dev.platform_data;
1030 struct soc_camera_link *icl = to_soc_camera_link(icd);
1031 struct mt9t112_priv *priv = to_mt9t112(client);
1033 if (soc_camera_apply_board_flags(icl, cfg) & V4L2_MBUS_PCLK_SAMPLE_RISING)
1034 priv->flags |= PCLK_RISING;
1039 static struct v4l2_subdev_video_ops mt9t112_subdev_video_ops = {
1040 .s_stream = mt9t112_s_stream,
1041 .g_mbus_fmt = mt9t112_g_fmt,
1042 .s_mbus_fmt = mt9t112_s_fmt,
1043 .try_mbus_fmt = mt9t112_try_fmt,
1044 .cropcap = mt9t112_cropcap,
1045 .g_crop = mt9t112_g_crop,
1046 .s_crop = mt9t112_s_crop,
1047 .enum_mbus_fmt = mt9t112_enum_fmt,
1048 .g_mbus_config = mt9t112_g_mbus_config,
1049 .s_mbus_config = mt9t112_s_mbus_config,
1052 /************************************************************************
1054 ************************************************************************/
1055 static struct v4l2_subdev_ops mt9t112_subdev_ops = {
1056 .core = &mt9t112_subdev_core_ops,
1057 .video = &mt9t112_subdev_video_ops,
1060 static int mt9t112_camera_probe(struct soc_camera_device *icd,
1061 struct i2c_client *client)
1063 struct mt9t112_priv *priv = to_mt9t112(client);
1064 const char *devname;
1067 /* We must have a parent by now. And it cannot be a wrong one. */
1068 BUG_ON(!icd->parent ||
1069 to_soc_camera_host(icd->parent)->nr != icd->iface);
1072 * check and show chip ID
1074 mt9t112_reg_read(chipid, client, 0x0000);
1078 devname = "mt9t111";
1079 priv->model = V4L2_IDENT_MT9T111;
1082 devname = "mt9t112";
1083 priv->model = V4L2_IDENT_MT9T112;
1086 dev_err(&client->dev, "Product ID error %04x\n", chipid);
1090 dev_info(&client->dev, "%s chip ID %04x\n", devname, chipid);
1095 static int mt9t112_probe(struct i2c_client *client,
1096 const struct i2c_device_id *did)
1098 struct mt9t112_priv *priv;
1099 struct soc_camera_device *icd = client->dev.platform_data;
1100 struct soc_camera_link *icl;
1104 dev_err(&client->dev, "mt9t112: missing soc-camera data!\n");
1108 icl = to_soc_camera_link(icd);
1109 if (!icl || !icl->priv)
1112 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
1116 priv->info = icl->priv;
1118 v4l2_i2c_subdev_init(&priv->subdev, client, &mt9t112_subdev_ops);
1120 icd->ops = &mt9t112_ops;
1122 ret = mt9t112_camera_probe(icd, client);
1131 static int mt9t112_remove(struct i2c_client *client)
1133 struct mt9t112_priv *priv = to_mt9t112(client);
1134 struct soc_camera_device *icd = client->dev.platform_data;
1141 static const struct i2c_device_id mt9t112_id[] = {
1145 MODULE_DEVICE_TABLE(i2c, mt9t112_id);
1147 static struct i2c_driver mt9t112_i2c_driver = {
1151 .probe = mt9t112_probe,
1152 .remove = mt9t112_remove,
1153 .id_table = mt9t112_id,
1156 /************************************************************************
1158 ************************************************************************/
1159 static int __init mt9t112_module_init(void)
1161 return i2c_add_driver(&mt9t112_i2c_driver);
1164 static void __exit mt9t112_module_exit(void)
1166 i2c_del_driver(&mt9t112_i2c_driver);
1169 module_init(mt9t112_module_init);
1170 module_exit(mt9t112_module_exit);
1172 MODULE_DESCRIPTION("SoC Camera driver for mt9t112");
1173 MODULE_AUTHOR("Kuninori Morimoto");
1174 MODULE_LICENSE("GPL v2");