drivers/media/video/mt9t001.c

   1 /*
   2  * Driver for MT9T001 CMOS Image Sensor from Aptina (Micron)
   3  *
   4  * Copyright (C) 2010-2011, Laurent Pinchart <laurent.pinchart@ideasonboard.com>
   5  *
   6  * Based on the MT9M001 driver,
   7  *
   8  * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14
  15 #include <linux/i2c.h>
  16 #include <linux/module.h>
  17 #include <linux/log2.h>
  18 #include <linux/slab.h>
  19 #include <linux/videodev2.h>
  20 #include <linux/v4l2-mediabus.h>
  21
  22 #include <media/mt9t001.h>
  23 #include <media/v4l2-ctrls.h>
  24 #include <media/v4l2-device.h>
  25 #include <media/v4l2-subdev.h>
  26
  27 #define MT9T001_PIXEL_ARRAY_HEIGHT                      1568
  28 #define MT9T001_PIXEL_ARRAY_WIDTH                       2112
  29
  30 #define MT9T001_CHIP_VERSION                            0x00
  31 #define         MT9T001_CHIP_ID                         0x1621
  32 #define MT9T001_ROW_START                               0x01
  33 #define         MT9T001_ROW_START_MIN                   0
  34 #define         MT9T001_ROW_START_DEF                   20
  35 #define         MT9T001_ROW_START_MAX                   1534
  36 #define MT9T001_COLUMN_START                            0x02
  37 #define         MT9T001_COLUMN_START_MIN                0
  38 #define         MT9T001_COLUMN_START_DEF                32
  39 #define         MT9T001_COLUMN_START_MAX                2046
  40 #define MT9T001_WINDOW_HEIGHT                           0x03
  41 #define         MT9T001_WINDOW_HEIGHT_MIN               1
  42 #define         MT9T001_WINDOW_HEIGHT_DEF               1535
  43 #define         MT9T001_WINDOW_HEIGHT_MAX               1567
  44 #define MT9T001_WINDOW_WIDTH                            0x04
  45 #define         MT9T001_WINDOW_WIDTH_MIN                1
  46 #define         MT9T001_WINDOW_WIDTH_DEF                2047
  47 #define         MT9T001_WINDOW_WIDTH_MAX                2111
  48 #define MT9T001_HORIZONTAL_BLANKING                     0x05
  49 #define         MT9T001_HORIZONTAL_BLANKING_MIN         21
  50 #define         MT9T001_HORIZONTAL_BLANKING_MAX         1023
  51 #define MT9T001_VERTICAL_BLANKING                       0x06
  52 #define         MT9T001_VERTICAL_BLANKING_MIN           3
  53 #define         MT9T001_VERTICAL_BLANKING_MAX           1023
  54 #define MT9T001_OUTPUT_CONTROL                          0x07
  55 #define         MT9T001_OUTPUT_CONTROL_SYNC             (1 << 0)
  56 #define         MT9T001_OUTPUT_CONTROL_CHIP_ENABLE      (1 << 1)
  57 #define         MT9T001_OUTPUT_CONTROL_TEST_DATA        (1 << 6)
  58 #define MT9T001_SHUTTER_WIDTH_HIGH                      0x08
  59 #define MT9T001_SHUTTER_WIDTH_LOW                       0x09
  60 #define         MT9T001_SHUTTER_WIDTH_MIN               1
  61 #define         MT9T001_SHUTTER_WIDTH_DEF               1561
  62 #define         MT9T001_SHUTTER_WIDTH_MAX               (1024 * 1024)
  63 #define MT9T001_PIXEL_CLOCK                             0x0a
  64 #define         MT9T001_PIXEL_CLOCK_INVERT              (1 << 15)
  65 #define         MT9T001_PIXEL_CLOCK_SHIFT_MASK          (7 << 8)
  66 #define         MT9T001_PIXEL_CLOCK_SHIFT_SHIFT         8
  67 #define         MT9T001_PIXEL_CLOCK_DIVIDE_MASK         (0x7f << 0)
  68 #define MT9T001_FRAME_RESTART                           0x0b
  69 #define MT9T001_SHUTTER_DELAY                           0x0c
  70 #define         MT9T001_SHUTTER_DELAY_MAX               2047
  71 #define MT9T001_RESET                                   0x0d
  72 #define MT9T001_READ_MODE1                              0x1e
  73 #define         MT9T001_READ_MODE_SNAPSHOT              (1 << 8)
  74 #define         MT9T001_READ_MODE_STROBE_ENABLE         (1 << 9)
  75 #define         MT9T001_READ_MODE_STROBE_WIDTH          (1 << 10)
  76 #define         MT9T001_READ_MODE_STROBE_OVERRIDE       (1 << 11)
  77 #define MT9T001_READ_MODE2                              0x20
  78 #define         MT9T001_READ_MODE_BAD_FRAMES            (1 << 0)
  79 #define         MT9T001_READ_MODE_LINE_VALID_CONTINUOUS (1 << 9)
  80 #define         MT9T001_READ_MODE_LINE_VALID_FRAME      (1 << 10)
  81 #define MT9T001_READ_MODE3                              0x21
  82 #define         MT9T001_READ_MODE_GLOBAL_RESET          (1 << 0)
  83 #define         MT9T001_READ_MODE_GHST_CTL              (1 << 1)
  84 #define MT9T001_ROW_ADDRESS_MODE                        0x22
  85 #define         MT9T001_ROW_SKIP_MASK                   (7 << 0)
  86 #define         MT9T001_ROW_BIN_MASK                    (3 << 3)
  87 #define         MT9T001_ROW_BIN_SHIFT                   3
  88 #define MT9T001_COLUMN_ADDRESS_MODE                     0x23
  89 #define         MT9T001_COLUMN_SKIP_MASK                (7 << 0)
  90 #define         MT9T001_COLUMN_BIN_MASK                 (3 << 3)
  91 #define         MT9T001_COLUMN_BIN_SHIFT                3
  92 #define MT9T001_GREEN1_GAIN                             0x2b
  93 #define MT9T001_BLUE_GAIN                               0x2c
  94 #define MT9T001_RED_GAIN                                0x2d
  95 #define MT9T001_GREEN2_GAIN                             0x2e
  96 #define MT9T001_TEST_DATA                               0x32
  97 #define MT9T001_GLOBAL_GAIN                             0x35
  98 #define         MT9T001_GLOBAL_GAIN_MIN                 8
  99 #define         MT9T001_GLOBAL_GAIN_MAX                 1024
 100 #define MT9T001_BLACK_LEVEL                             0x49
 101 #define MT9T001_ROW_BLACK_DEFAULT_OFFSET                0x4b
 102 #define MT9T001_BLC_DELTA_THRESHOLDS                    0x5d
 103 #define MT9T001_CAL_THRESHOLDS                          0x5f
 104 #define MT9T001_GREEN1_OFFSET                           0x60
 105 #define MT9T001_GREEN2_OFFSET                           0x61
 106 #define MT9T001_BLACK_LEVEL_CALIBRATION                 0x62
 107 #define         MT9T001_BLACK_LEVEL_OVERRIDE            (1 << 0)
 108 #define         MT9T001_BLACK_LEVEL_DISABLE_OFFSET      (1 << 1)
 109 #define         MT9T001_BLACK_LEVEL_RECALCULATE         (1 << 12)
 110 #define         MT9T001_BLACK_LEVEL_LOCK_RED_BLUE       (1 << 13)
 111 #define         MT9T001_BLACK_LEVEL_LOCK_GREEN          (1 << 14)
 112 #define MT9T001_RED_OFFSET                              0x63
 113 #define MT9T001_BLUE_OFFSET                             0x64
 114
 115 struct mt9t001 {
 116         struct v4l2_subdev subdev;
 117         struct media_pad pad;
 118
 119         struct v4l2_mbus_framefmt format;
 120         struct v4l2_rect crop;
 121
 122         struct v4l2_ctrl_handler ctrls;
 123         struct v4l2_ctrl *gains[4];
 124
 125         u16 output_control;
 126         u16 black_level;
 127 };
 128
 129 static inline struct mt9t001 *to_mt9t001(struct v4l2_subdev *sd)
 130 {
 131         return container_of(sd, struct mt9t001, subdev);
 132 }
 133
 134 static int mt9t001_read(struct i2c_client *client, u8 reg)
 135 {
 136         s32 data = i2c_smbus_read_word_data(client, reg);
 137         return data < 0 ? data : be16_to_cpu(data);
 138 }
 139
 140 static int mt9t001_write(struct i2c_client *client, u8 reg, u16 data)
 141 {
 142         return i2c_smbus_write_word_data(client, reg, cpu_to_be16(data));
 143 }
 144
 145 static int mt9t001_set_output_control(struct mt9t001 *mt9t001, u16 clear,
 146                                       u16 set)
 147 {
 148         struct i2c_client *client = v4l2_get_subdevdata(&mt9t001->subdev);
 149         u16 value = (mt9t001->output_control & ~clear) | set;
 150         int ret;
 151
 152         if (value == mt9t001->output_control)
 153                 return 0;
 154
 155         ret = mt9t001_write(client, MT9T001_OUTPUT_CONTROL, value);
 156         if (ret < 0)
 157                 return ret;
 158
 159         mt9t001->output_control = value;
 160         return 0;
 161 }
 162
 163 /* -----------------------------------------------------------------------------
 164  * V4L2 subdev video operations
 165  */
 166
 167 static struct v4l2_mbus_framefmt *
 168 __mt9t001_get_pad_format(struct mt9t001 *mt9t001, struct v4l2_subdev_fh *fh,
 169                          unsigned int pad, enum v4l2_subdev_format_whence which)
 170 {
 171         switch (which) {
 172         case V4L2_SUBDEV_FORMAT_TRY:
 173                 return v4l2_subdev_get_try_format(fh, pad);
 174         case V4L2_SUBDEV_FORMAT_ACTIVE:
 175                 return &mt9t001->format;
 176         default:
 177                 return NULL;
 178         }
 179 }
 180
 181 static struct v4l2_rect *
 182 __mt9t001_get_pad_crop(struct mt9t001 *mt9t001, struct v4l2_subdev_fh *fh,
 183                        unsigned int pad, enum v4l2_subdev_format_whence which)
 184 {
 185         switch (which) {
 186         case V4L2_SUBDEV_FORMAT_TRY:
 187                 return v4l2_subdev_get_try_crop(fh, pad);
 188         case V4L2_SUBDEV_FORMAT_ACTIVE:
 189                 return &mt9t001->crop;
 190         default:
 191                 return NULL;
 192         }
 193 }
 194
 195 static int mt9t001_s_stream(struct v4l2_subdev *subdev, int enable)
 196 {
 197         const u16 mode = MT9T001_OUTPUT_CONTROL_CHIP_ENABLE;
 198         struct i2c_client *client = v4l2_get_subdevdata(subdev);
 199         struct mt9t001 *mt9t001 = to_mt9t001(subdev);
 200         struct v4l2_mbus_framefmt *format = &mt9t001->format;
 201         struct v4l2_rect *crop = &mt9t001->crop;
 202         unsigned int hratio;
 203         unsigned int vratio;
 204         int ret;
 205
 206         if (!enable)
 207                 return mt9t001_set_output_control(mt9t001, mode, 0);
 208
 209         /* Configure the window size and row/column bin */
 210         hratio = DIV_ROUND_CLOSEST(crop->width, format->width);
 211         vratio = DIV_ROUND_CLOSEST(crop->height, format->height);
 212
 213         ret = mt9t001_write(client, MT9T001_ROW_ADDRESS_MODE, hratio - 1);
 214         if (ret < 0)
 215                 return ret;
 216
 217         ret = mt9t001_write(client, MT9T001_COLUMN_ADDRESS_MODE, vratio - 1);
 218         if (ret < 0)
 219                 return ret;
 220
 221         ret = mt9t001_write(client, MT9T001_COLUMN_START, crop->left);
 222         if (ret < 0)
 223                 return ret;
 224
 225         ret = mt9t001_write(client, MT9T001_ROW_START, crop->top);
 226         if (ret < 0)
 227                 return ret;
 228
 229         ret = mt9t001_write(client, MT9T001_WINDOW_WIDTH, crop->width - 1);
 230         if (ret < 0)
 231                 return ret;
 232
 233         ret = mt9t001_write(client, MT9T001_WINDOW_HEIGHT, crop->height - 1);
 234         if (ret < 0)
 235                 return ret;
 236
 237         /* Switch to master "normal" mode */
 238         return mt9t001_set_output_control(mt9t001, 0, mode);
 239 }
 240
 241 static int mt9t001_enum_mbus_code(struct v4l2_subdev *subdev,
 242                                   struct v4l2_subdev_fh *fh,
 243                                   struct v4l2_subdev_mbus_code_enum *code)
 244 {
 245         if (code->index > 0)
 246                 return -EINVAL;
 247
 248         code->code = V4L2_MBUS_FMT_SGRBG10_1X10;
 249         return 0;
 250 }
 251
 252 static int mt9t001_enum_frame_size(struct v4l2_subdev *subdev,
 253                                    struct v4l2_subdev_fh *fh,
 254                                    struct v4l2_subdev_frame_size_enum *fse)
 255 {
 256         if (fse->index >= 8 || fse->code != V4L2_MBUS_FMT_SGRBG10_1X10)
 257                 return -EINVAL;
 258
 259         fse->min_width = (MT9T001_WINDOW_WIDTH_DEF + 1) / fse->index;
 260         fse->max_width = fse->min_width;
 261         fse->min_height = (MT9T001_WINDOW_HEIGHT_DEF + 1) / fse->index;
 262         fse->max_height = fse->min_height;
 263
 264         return 0;
 265 }
 266
 267 static int mt9t001_get_format(struct v4l2_subdev *subdev,
 268                               struct v4l2_subdev_fh *fh,
 269                               struct v4l2_subdev_format *format)
 270 {
 271         struct mt9t001 *mt9t001 = to_mt9t001(subdev);
 272
 273         format->format = *__mt9t001_get_pad_format(mt9t001, fh, format->pad,
 274                                                    format->which);
 275         return 0;
 276 }
 277
 278 static int mt9t001_set_format(struct v4l2_subdev *subdev,
 279                               struct v4l2_subdev_fh *fh,
 280                               struct v4l2_subdev_format *format)
 281 {
 282         struct mt9t001 *mt9t001 = to_mt9t001(subdev);
 283         struct v4l2_mbus_framefmt *__format;
 284         struct v4l2_rect *__crop;
 285         unsigned int width;
 286         unsigned int height;
 287         unsigned int hratio;
 288         unsigned int vratio;
 289
 290         __crop = __mt9t001_get_pad_crop(mt9t001, fh, format->pad,
 291                                         format->which);
 292
 293         /* Clamp the width and height to avoid dividing by zero. */
 294         width = clamp_t(unsigned int, ALIGN(format->format.width, 2),
 295                         max(__crop->width / 8, MT9T001_WINDOW_HEIGHT_MIN + 1),
 296                         __crop->width);
 297         height = clamp_t(unsigned int, ALIGN(format->format.height, 2),
 298                          max(__crop->height / 8, MT9T001_WINDOW_HEIGHT_MIN + 1),
 299                          __crop->height);
 300
 301         hratio = DIV_ROUND_CLOSEST(__crop->width, width);
 302         vratio = DIV_ROUND_CLOSEST(__crop->height, height);
 303
 304         __format = __mt9t001_get_pad_format(mt9t001, fh, format->pad,
 305                                             format->which);
 306         __format->width = __crop->width / hratio;
 307         __format->height = __crop->height / vratio;
 308
 309         format->format = *__format;
 310
 311         return 0;
 312 }
 313
 314 static int mt9t001_get_crop(struct v4l2_subdev *subdev,
 315                             struct v4l2_subdev_fh *fh,
 316                             struct v4l2_subdev_crop *crop)
 317 {
 318         struct mt9t001 *mt9t001 = to_mt9t001(subdev);
 319
 320         crop->rect = *__mt9t001_get_pad_crop(mt9t001, fh, crop->pad,
 321                                              crop->which);
 322         return 0;
 323 }
 324
 325 static int mt9t001_set_crop(struct v4l2_subdev *subdev,
 326                             struct v4l2_subdev_fh *fh,
 327                             struct v4l2_subdev_crop *crop)
 328 {
 329         struct mt9t001 *mt9t001 = to_mt9t001(subdev);
 330         struct v4l2_mbus_framefmt *__format;
 331         struct v4l2_rect *__crop;
 332         struct v4l2_rect rect;
 333
 334         /* Clamp the crop rectangle boundaries and align them to a multiple of 2
 335          * pixels.
 336          */
 337         rect.left = clamp(ALIGN(crop->rect.left, 2),
 338                           MT9T001_COLUMN_START_MIN,
 339                           MT9T001_COLUMN_START_MAX);
 340         rect.top = clamp(ALIGN(crop->rect.top, 2),
 341                          MT9T001_ROW_START_MIN,
 342                          MT9T001_ROW_START_MAX);
 343         rect.width = clamp(ALIGN(crop->rect.width, 2),
 344                            MT9T001_WINDOW_WIDTH_MIN + 1,
 345                            MT9T001_WINDOW_WIDTH_MAX + 1);
 346         rect.height = clamp(ALIGN(crop->rect.height, 2),
 347                             MT9T001_WINDOW_HEIGHT_MIN + 1,
 348                             MT9T001_WINDOW_HEIGHT_MAX + 1);
 349
 350         rect.width = min(rect.width, MT9T001_PIXEL_ARRAY_WIDTH - rect.left);
 351         rect.height = min(rect.height, MT9T001_PIXEL_ARRAY_HEIGHT - rect.top);
 352
 353         __crop = __mt9t001_get_pad_crop(mt9t001, fh, crop->pad, crop->which);
 354
 355         if (rect.width != __crop->width || rect.height != __crop->height) {
 356                 /* Reset the output image size if the crop rectangle size has
 357                  * been modified.
 358                  */
 359                 __format = __mt9t001_get_pad_format(mt9t001, fh, crop->pad,
 360                                                     crop->which);
 361                 __format->width = rect.width;
 362                 __format->height = rect.height;
 363         }
 364
 365         *__crop = rect;
 366         crop->rect = rect;
 367
 368         return 0;
 369 }
 370
 371 /* -----------------------------------------------------------------------------
 372  * V4L2 subdev control operations
 373  */
 374
 375 #define V4L2_CID_TEST_PATTERN           (V4L2_CID_USER_BASE | 0x1001)
 376 #define V4L2_CID_BLACK_LEVEL_AUTO       (V4L2_CID_USER_BASE | 0x1002)
 377 #define V4L2_CID_BLACK_LEVEL_OFFSET     (V4L2_CID_USER_BASE | 0x1003)
 378 #define V4L2_CID_BLACK_LEVEL_CALIBRATE  (V4L2_CID_USER_BASE | 0x1004)
 379
 380 #define V4L2_CID_GAIN_RED               (V4L2_CTRL_CLASS_CAMERA | 0x1001)
 381 #define V4L2_CID_GAIN_GREEN_RED         (V4L2_CTRL_CLASS_CAMERA | 0x1002)
 382 #define V4L2_CID_GAIN_GREEN_BLUE        (V4L2_CTRL_CLASS_CAMERA | 0x1003)
 383 #define V4L2_CID_GAIN_BLUE              (V4L2_CTRL_CLASS_CAMERA | 0x1004)
 384
 385 static u16 mt9t001_gain_value(s32 *gain)
 386 {
 387         /* Gain is controlled by 2 analog stages and a digital stage. Valid
 388          * values for the 3 stages are
 389          *
 390          * Stage                Min     Max     Step
 391          * ------------------------------------------
 392          * First analog stage   x1      x2      1
 393          * Second analog stage  x1      x4      0.125
 394          * Digital stage        x1      x16     0.125
 395          *
 396          * To minimize noise, the gain stages should be used in the second
 397          * analog stage, first analog stage, digital stage order. Gain from a
 398          * previous stage should be pushed to its maximum value before the next
 399          * stage is used.
 400          */
 401         if (*gain <= 32)
 402                 return *gain;
 403
 404         if (*gain <= 64) {
 405                 *gain &= ~1;
 406                 return (1 << 6) | (*gain >> 1);
 407         }
 408
 409         *gain &= ~7;
 410         return ((*gain - 64) << 5) | (1 << 6) | 32;
 411 }
 412
 413 static int mt9t001_ctrl_freeze(struct mt9t001 *mt9t001, bool freeze)
 414 {
 415         return mt9t001_set_output_control(mt9t001,
 416                 freeze ? 0 : MT9T001_OUTPUT_CONTROL_SYNC,
 417                 freeze ? MT9T001_OUTPUT_CONTROL_SYNC : 0);
 418 }
 419
 420 static int mt9t001_s_ctrl(struct v4l2_ctrl *ctrl)
 421 {
 422         static const u8 gains[4] = {
 423                 MT9T001_RED_GAIN, MT9T001_GREEN1_GAIN,
 424                 MT9T001_GREEN2_GAIN, MT9T001_BLUE_GAIN
 425         };
 426
 427         struct mt9t001 *mt9t001 =
 428                         container_of(ctrl->handler, struct mt9t001, ctrls);
 429         struct i2c_client *client = v4l2_get_subdevdata(&mt9t001->subdev);
 430         unsigned int count;
 431         unsigned int i;
 432         u16 value;
 433         int ret;
 434
 435         switch (ctrl->id) {
 436         case V4L2_CID_GAIN_RED:
 437         case V4L2_CID_GAIN_GREEN_RED:
 438         case V4L2_CID_GAIN_GREEN_BLUE:
 439         case V4L2_CID_GAIN_BLUE:
 440
 441                 /* Disable control updates if more than one control has changed
 442                  * in the cluster.
 443                  */
 444                 for (i = 0, count = 0; i < 4; ++i) {
 445                         struct v4l2_ctrl *gain = mt9t001->gains[i];
 446
 447                         if (gain->val != gain->cur.val)
 448                                 count++;
 449                 }
 450
 451                 if (count > 1) {
 452                         ret = mt9t001_ctrl_freeze(mt9t001, true);
 453                         if (ret < 0)
 454                                 return ret;
 455                 }
 456
 457                 /* Update the gain controls. */
 458                 for (i = 0; i < 4; ++i) {
 459                         struct v4l2_ctrl *gain = mt9t001->gains[i];
 460
 461                         if (gain->val == gain->cur.val)
 462                                 continue;
 463
 464                         value = mt9t001_gain_value(&gain->val);
 465                         ret = mt9t001_write(client, gains[i], value);
 466                         if (ret < 0) {
 467                                 mt9t001_ctrl_freeze(mt9t001, false);
 468                                 return ret;
 469                         }
 470                 }
 471
 472                 /* Enable control updates. */
 473                 if (count > 1) {
 474                         ret = mt9t001_ctrl_freeze(mt9t001, false);
 475                         if (ret < 0)
 476                                 return ret;
 477                 }
 478
 479                 break;
 480
 481         case V4L2_CID_EXPOSURE:
 482                 ret = mt9t001_write(client, MT9T001_SHUTTER_WIDTH_LOW,
 483                                     ctrl->val & 0xffff);
 484                 if (ret < 0)
 485                         return ret;
 486
 487                 return mt9t001_write(client, MT9T001_SHUTTER_WIDTH_HIGH,
 488                                      ctrl->val >> 16);
 489
 490         case V4L2_CID_TEST_PATTERN:
 491                 ret = mt9t001_set_output_control(mt9t001,
 492                         ctrl->val ? 0 : MT9T001_OUTPUT_CONTROL_TEST_DATA,
 493                         ctrl->val ? MT9T001_OUTPUT_CONTROL_TEST_DATA : 0);
 494                 if (ret < 0)
 495                         return ret;
 496
 497                 return mt9t001_write(client, MT9T001_TEST_DATA, ctrl->val << 2);
 498
 499         case V4L2_CID_BLACK_LEVEL_AUTO:
 500                 value = ctrl->val ? 0 : MT9T001_BLACK_LEVEL_OVERRIDE;
 501                 ret = mt9t001_write(client, MT9T001_BLACK_LEVEL_CALIBRATION,
 502                                     value);
 503                 if (ret < 0)
 504                         return ret;
 505
 506                 mt9t001->black_level = value;
 507                 break;
 508
 509         case V4L2_CID_BLACK_LEVEL_OFFSET:
 510                 ret = mt9t001_write(client, MT9T001_GREEN1_OFFSET, ctrl->val);
 511                 if (ret < 0)
 512                         return ret;
 513
 514                 ret = mt9t001_write(client, MT9T001_GREEN2_OFFSET, ctrl->val);
 515                 if (ret < 0)
 516                         return ret;
 517
 518                 ret = mt9t001_write(client, MT9T001_RED_OFFSET, ctrl->val);
 519                 if (ret < 0)
 520                         return ret;
 521
 522                 return mt9t001_write(client, MT9T001_BLUE_OFFSET, ctrl->val);
 523
 524         case V4L2_CID_BLACK_LEVEL_CALIBRATE:
 525                 return mt9t001_write(client, MT9T001_BLACK_LEVEL_CALIBRATION,
 526                                      MT9T001_BLACK_LEVEL_RECALCULATE |
 527                                      mt9t001->black_level);
 528         }
 529
 530         return 0;
 531 }
 532
 533 static struct v4l2_ctrl_ops mt9t001_ctrl_ops = {
 534         .s_ctrl = mt9t001_s_ctrl,
 535 };
 536
 537 static const struct v4l2_ctrl_config mt9t001_ctrls[] = {
 538         {
 539                 .ops            = &mt9t001_ctrl_ops,
 540                 .id             = V4L2_CID_TEST_PATTERN,
 541                 .type           = V4L2_CTRL_TYPE_INTEGER,
 542                 .name           = "Test pattern",
 543                 .min            = 0,
 544                 .max            = 1023,
 545                 .step           = 1,
 546                 .def            = 0,
 547                 .flags          = 0,
 548         }, {
 549                 .ops            = &mt9t001_ctrl_ops,
 550                 .id             = V4L2_CID_BLACK_LEVEL_AUTO,
 551                 .type           = V4L2_CTRL_TYPE_BOOLEAN,
 552                 .name           = "Black Level, Auto",
 553                 .min            = 0,
 554                 .max            = 1,
 555                 .step           = 1,
 556                 .def            = 1,
 557                 .flags          = 0,
 558         }, {
 559                 .ops            = &mt9t001_ctrl_ops,
 560                 .id             = V4L2_CID_BLACK_LEVEL_OFFSET,
 561                 .type           = V4L2_CTRL_TYPE_INTEGER,
 562                 .name           = "Black Level, Offset",
 563                 .min            = -256,
 564                 .max            = 255,
 565                 .step           = 1,
 566                 .def            = 32,
 567                 .flags          = 0,
 568         }, {
 569                 .ops            = &mt9t001_ctrl_ops,
 570                 .id             = V4L2_CID_BLACK_LEVEL_CALIBRATE,
 571                 .type           = V4L2_CTRL_TYPE_BUTTON,
 572                 .name           = "Black Level, Calibrate",
 573                 .min            = 0,
 574                 .max            = 0,
 575                 .step           = 0,
 576                 .def            = 0,
 577                 .flags          = V4L2_CTRL_FLAG_WRITE_ONLY,
 578         },
 579 };
 580
 581 static const struct v4l2_ctrl_config mt9t001_gains[] = {
 582         {
 583                 .ops            = &mt9t001_ctrl_ops,
 584                 .id             = V4L2_CID_GAIN_RED,
 585                 .type           = V4L2_CTRL_TYPE_INTEGER,
 586                 .name           = "Gain, Red",
 587                 .min            = MT9T001_GLOBAL_GAIN_MIN,
 588                 .max            = MT9T001_GLOBAL_GAIN_MAX,
 589                 .step           = 1,
 590                 .def            = MT9T001_GLOBAL_GAIN_MIN,
 591                 .flags          = 0,
 592         }, {
 593                 .ops            = &mt9t001_ctrl_ops,
 594                 .id             = V4L2_CID_GAIN_GREEN_RED,
 595                 .type           = V4L2_CTRL_TYPE_INTEGER,
 596                 .name           = "Gain, Green (R)",
 597                 .min            = MT9T001_GLOBAL_GAIN_MIN,
 598                 .max            = MT9T001_GLOBAL_GAIN_MAX,
 599                 .step           = 1,
 600                 .def            = MT9T001_GLOBAL_GAIN_MIN,
 601                 .flags          = 0,
 602         }, {
 603                 .ops            = &mt9t001_ctrl_ops,
 604                 .id             = V4L2_CID_GAIN_GREEN_BLUE,
 605                 .type           = V4L2_CTRL_TYPE_INTEGER,
 606                 .name           = "Gain, Green (B)",
 607                 .min            = MT9T001_GLOBAL_GAIN_MIN,
 608                 .max            = MT9T001_GLOBAL_GAIN_MAX,
 609                 .step           = 1,
 610                 .def            = MT9T001_GLOBAL_GAIN_MIN,
 611                 .flags          = 0,
 612         }, {
 613                 .ops            = &mt9t001_ctrl_ops,
 614                 .id             = V4L2_CID_GAIN_BLUE,
 615                 .type           = V4L2_CTRL_TYPE_INTEGER,
 616                 .name           = "Gain, Blue",
 617                 .min            = MT9T001_GLOBAL_GAIN_MIN,
 618                 .max            = MT9T001_GLOBAL_GAIN_MAX,
 619                 .step           = 1,
 620                 .def            = MT9T001_GLOBAL_GAIN_MIN,
 621                 .flags          = 0,
 622         },
 623 };
 624
 625 /* -----------------------------------------------------------------------------
 626  * V4L2 subdev internal operations
 627  */
 628
 629 static int mt9t001_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)
 630 {
 631         struct v4l2_mbus_framefmt *format;
 632         struct v4l2_rect *crop;
 633
 634         crop = v4l2_subdev_get_try_crop(fh, 0);
 635         crop->left = MT9T001_COLUMN_START_DEF;
 636         crop->top = MT9T001_ROW_START_DEF;
 637         crop->width = MT9T001_WINDOW_WIDTH_DEF + 1;
 638         crop->height = MT9T001_WINDOW_HEIGHT_DEF + 1;
 639
 640         format = v4l2_subdev_get_try_format(fh, 0);
 641         format->code = V4L2_MBUS_FMT_SGRBG10_1X10;
 642         format->width = MT9T001_WINDOW_WIDTH_DEF + 1;
 643         format->height = MT9T001_WINDOW_HEIGHT_DEF + 1;
 644         format->field = V4L2_FIELD_NONE;
 645         format->colorspace = V4L2_COLORSPACE_SRGB;
 646
 647         return 0;
 648 }
 649
 650 static struct v4l2_subdev_video_ops mt9t001_subdev_video_ops = {
 651         .s_stream = mt9t001_s_stream,
 652 };
 653
 654 static struct v4l2_subdev_pad_ops mt9t001_subdev_pad_ops = {
 655         .enum_mbus_code = mt9t001_enum_mbus_code,
 656         .enum_frame_size = mt9t001_enum_frame_size,
 657         .get_fmt = mt9t001_get_format,
 658         .set_fmt = mt9t001_set_format,
 659         .get_crop = mt9t001_get_crop,
 660         .set_crop = mt9t001_set_crop,
 661 };
 662
 663 static struct v4l2_subdev_ops mt9t001_subdev_ops = {
 664         .video = &mt9t001_subdev_video_ops,
 665         .pad = &mt9t001_subdev_pad_ops,
 666 };
 667
 668 static struct v4l2_subdev_internal_ops mt9t001_subdev_internal_ops = {
 669         .open = mt9t001_open,
 670 };
 671
 672 static int mt9t001_video_probe(struct i2c_client *client)
 673 {
 674         struct mt9t001_platform_data *pdata = client->dev.platform_data;
 675         s32 data;
 676         int ret;
 677
 678         dev_info(&client->dev, "Probing MT9T001 at address 0x%02x\n",
 679                  client->addr);
 680
 681         /* Reset the chip and stop data read out */
 682         ret = mt9t001_write(client, MT9T001_RESET, 1);
 683         if (ret < 0)
 684                 return ret;
 685
 686         ret = mt9t001_write(client, MT9T001_RESET, 0);
 687         if (ret < 0)
 688                 return ret;
 689
 690         ret  = mt9t001_write(client, MT9T001_OUTPUT_CONTROL, 0);
 691         if (ret < 0)
 692                 return ret;
 693
 694         /* Configure the pixel clock polarity */
 695         if (pdata && pdata->clk_pol) {
 696                 ret  = mt9t001_write(client, MT9T001_PIXEL_CLOCK,
 697                                      MT9T001_PIXEL_CLOCK_INVERT);
 698                 if (ret < 0)
 699                         return ret;
 700         }
 701
 702         /* Read and check the sensor version */
 703         data = mt9t001_read(client, MT9T001_CHIP_VERSION);
 704         if (data != MT9T001_CHIP_ID) {
 705                 dev_err(&client->dev, "MT9T001 not detected, wrong version "
 706                         "0x%04x\n", data);
 707                 return -ENODEV;
 708         }
 709
 710         dev_info(&client->dev, "MT9T001 detected at address 0x%02x\n",
 711                  client->addr);
 712
 713         return ret;
 714 }
 715
 716 static int mt9t001_probe(struct i2c_client *client,
 717                          const struct i2c_device_id *did)
 718 {
 719         struct mt9t001 *mt9t001;
 720         unsigned int i;
 721         int ret;
 722
 723         if (!i2c_check_functionality(client->adapter,
 724                                      I2C_FUNC_SMBUS_WORD_DATA)) {
 725                 dev_warn(&client->adapter->dev,
 726                          "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
 727                 return -EIO;
 728         }
 729
 730         ret = mt9t001_video_probe(client);
 731         if (ret < 0)
 732                 return ret;
 733
 734         mt9t001 = kzalloc(sizeof(*mt9t001), GFP_KERNEL);
 735         if (!mt9t001)
 736                 return -ENOMEM;
 737
 738         v4l2_ctrl_handler_init(&mt9t001->ctrls, ARRAY_SIZE(mt9t001_ctrls) +
 739                                                 ARRAY_SIZE(mt9t001_gains) + 2);
 740
 741         v4l2_ctrl_new_std(&mt9t001->ctrls, &mt9t001_ctrl_ops,
 742                           V4L2_CID_EXPOSURE, MT9T001_SHUTTER_WIDTH_MIN,
 743                           MT9T001_SHUTTER_WIDTH_MAX, 1,
 744                           MT9T001_SHUTTER_WIDTH_DEF);
 745         v4l2_ctrl_new_std(&mt9t001->ctrls, &mt9t001_ctrl_ops,
 746                           V4L2_CID_BLACK_LEVEL, 1, 1, 1, 1);
 747
 748         for (i = 0; i < ARRAY_SIZE(mt9t001_ctrls); ++i)
 749                 v4l2_ctrl_new_custom(&mt9t001->ctrls, &mt9t001_ctrls[i], NULL);
 750
 751         for (i = 0; i < ARRAY_SIZE(mt9t001_gains); ++i)
 752                 mt9t001->gains[i] = v4l2_ctrl_new_custom(&mt9t001->ctrls,
 753                         &mt9t001_gains[i], NULL);
 754
 755         v4l2_ctrl_cluster(ARRAY_SIZE(mt9t001_gains), mt9t001->gains);
 756
 757         mt9t001->subdev.ctrl_handler = &mt9t001->ctrls;
 758
 759         if (mt9t001->ctrls.error) {
 760                 printk(KERN_INFO "%s: control initialization error %d\n",
 761                        __func__, mt9t001->ctrls.error);
 762                 ret = -EINVAL;
 763                 goto done;
 764         }
 765
 766         mt9t001->crop.left = MT9T001_COLUMN_START_DEF;
 767         mt9t001->crop.top = MT9T001_ROW_START_DEF;
 768         mt9t001->crop.width = MT9T001_WINDOW_WIDTH_DEF + 1;
 769         mt9t001->crop.height = MT9T001_WINDOW_HEIGHT_DEF + 1;
 770
 771         mt9t001->format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
 772         mt9t001->format.width = MT9T001_WINDOW_WIDTH_DEF + 1;
 773         mt9t001->format.height = MT9T001_WINDOW_HEIGHT_DEF + 1;
 774         mt9t001->format.field = V4L2_FIELD_NONE;
 775         mt9t001->format.colorspace = V4L2_COLORSPACE_SRGB;
 776
 777         v4l2_i2c_subdev_init(&mt9t001->subdev, client, &mt9t001_subdev_ops);
 778         mt9t001->subdev.internal_ops = &mt9t001_subdev_internal_ops;
 779         mt9t001->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
 780
 781         mt9t001->pad.flags = MEDIA_PAD_FL_SOURCE;
 782         ret = media_entity_init(&mt9t001->subdev.entity, 1, &mt9t001->pad, 0);
 783
 784 done:
 785         if (ret < 0) {
 786                 v4l2_ctrl_handler_free(&mt9t001->ctrls);
 787                 media_entity_cleanup(&mt9t001->subdev.entity);
 788                 kfree(mt9t001);
 789         }
 790
 791         return ret;
 792 }
 793
 794 static int mt9t001_remove(struct i2c_client *client)
 795 {
 796         struct v4l2_subdev *subdev = i2c_get_clientdata(client);
 797         struct mt9t001 *mt9t001 = to_mt9t001(subdev);
 798
 799         v4l2_ctrl_handler_free(&mt9t001->ctrls);
 800         v4l2_device_unregister_subdev(subdev);
 801         media_entity_cleanup(&subdev->entity);
 802         kfree(mt9t001);
 803         return 0;
 804 }
 805
 806 static const struct i2c_device_id mt9t001_id[] = {
 807         { "mt9t001", 0 },
 808         { }
 809 };
 810 MODULE_DEVICE_TABLE(i2c, mt9t001_id);
 811
 812 static struct i2c_driver mt9t001_driver = {
 813         .driver = {
 814                 .name = "mt9t001",
 815         },
 816         .probe          = mt9t001_probe,
 817         .remove         = mt9t001_remove,
 818         .id_table       = mt9t001_id,
 819 };
 820
 821 static int __init mt9t001_init(void)
 822 {
 823         return i2c_add_driver(&mt9t001_driver);
 824 }
 825
 826 static void __exit mt9t001_exit(void)
 827 {
 828         i2c_del_driver(&mt9t001_driver);
 829 }
 830
 831 module_init(mt9t001_init);
 832 module_exit(mt9t001_exit);
 833
 834 MODULE_DESCRIPTION("Aptina (Micron) MT9T001 Camera driver");
 835 MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
 836 MODULE_LICENSE("GPL");