4 * Copyright (C) 2008 Jean-Francois Moine (http://moinejf.free.fr)
5 * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
7 * This module is adapted from the ov51x-jpeg package, which itself
8 * was adapted from the ov511 driver.
10 * Original copyright for the ov511 driver is:
12 * Copyright (c) 1999-2006 Mark W. McClelland
13 * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
14 * Many improvements by Bret Wallach <bwallac1@san.rr.com>
15 * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000)
16 * OV7620 fixes by Charl P. Botha <cpbotha@ieee.org>
17 * Changes by Claudio Matsuoka <claudio@conectiva.com>
19 * ov51x-jpeg original copyright is:
21 * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
22 * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
24 * This program is free software; you can redistribute it and/or modify
25 * it under the terms of the GNU General Public License as published by
26 * the Free Software Foundation; either version 2 of the License, or
29 * This program is distributed in the hope that it will be useful,
30 * but WITHOUT ANY WARRANTY; without even the implied warranty of
31 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
32 * GNU General Public License for more details.
34 * You should have received a copy of the GNU General Public License
35 * along with this program; if not, write to the Free Software
36 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
39 #define MODULE_NAME "ov519"
41 #include <linux/input.h>
44 /* The jpeg_hdr is used by w996Xcf only */
45 /* The CONEX_CAM define for jpeg.h needs renaming, now its used here too */
49 MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
50 MODULE_DESCRIPTION("OV519 USB Camera Driver");
51 MODULE_LICENSE("GPL");
53 /* global parameters */
54 static int frame_rate;
56 /* Number of times to retry a failed I2C transaction. Increase this if you
57 * are getting "Failed to read sensor ID..." */
58 static int i2c_detect_tries = 10;
69 NCTRL /* number of controls */
72 /* ov519 device descriptor */
74 struct gspca_dev gspca_dev; /* !! must be the first item */
76 struct gspca_ctrl ctrls[NCTRL];
81 #define BRIDGE_OV511 0
82 #define BRIDGE_OV511PLUS 1
83 #define BRIDGE_OV518 2
84 #define BRIDGE_OV518PLUS 3
85 #define BRIDGE_OV519 4 /* = ov530 */
86 #define BRIDGE_OVFX2 5
87 #define BRIDGE_W9968CF 6
91 #define BRIDGE_INVERT_LED 8
93 char snapshot_pressed;
94 char snapshot_needs_reset;
96 /* Determined by sensor type */
100 #define QUALITY_MIN 50
101 #define QUALITY_MAX 70
102 #define QUALITY_DEF 50
104 u8 stopped; /* Streaming is temporarily paused */
107 u8 frame_rate; /* current Framerate */
108 u8 clockdiv; /* clockdiv override */
110 s8 sensor; /* Type of image sensor chip (SEN_*) */
115 s16 sensor_reg_cache[256];
117 u8 jpeg_hdr[JPEG_HDR_SZ];
137 /* Note this is a bit of a hack, but the w9968cf driver needs the code for all
138 the ov sensors which is already present here. When we have the time we
139 really should move the sensor drivers to v4l2 sub drivers. */
142 /* V4L2 controls supported by the driver */
143 static void setbrightness(struct gspca_dev *gspca_dev);
144 static void setcontrast(struct gspca_dev *gspca_dev);
145 static void setcolors(struct gspca_dev *gspca_dev);
146 static void sethvflip(struct gspca_dev *gspca_dev);
147 static void setautobright(struct gspca_dev *gspca_dev);
148 static void setfreq(struct gspca_dev *gspca_dev);
149 static void setfreq_i(struct sd *sd);
151 static const struct ctrl sd_ctrls[] = {
154 .id = V4L2_CID_BRIGHTNESS,
155 .type = V4L2_CTRL_TYPE_INTEGER,
156 .name = "Brightness",
160 .default_value = 127,
162 .set_control = setbrightness,
166 .id = V4L2_CID_CONTRAST,
167 .type = V4L2_CTRL_TYPE_INTEGER,
172 .default_value = 127,
174 .set_control = setcontrast,
178 .id = V4L2_CID_SATURATION,
179 .type = V4L2_CTRL_TYPE_INTEGER,
184 .default_value = 127,
186 .set_control = setcolors,
188 /* The flip controls work for sensors ov7660 and ov7670 only */
191 .id = V4L2_CID_HFLIP,
192 .type = V4L2_CTRL_TYPE_BOOLEAN,
199 .set_control = sethvflip,
203 .id = V4L2_CID_VFLIP,
204 .type = V4L2_CTRL_TYPE_BOOLEAN,
211 .set_control = sethvflip,
215 .id = V4L2_CID_AUTOBRIGHTNESS,
216 .type = V4L2_CTRL_TYPE_BOOLEAN,
217 .name = "Auto Brightness",
223 .set_control = setautobright,
227 .id = V4L2_CID_POWER_LINE_FREQUENCY,
228 .type = V4L2_CTRL_TYPE_MENU,
229 .name = "Light frequency filter",
231 .maximum = 2, /* 0: no flicker, 1: 50Hz, 2:60Hz, 3: auto */
235 .set_control = setfreq,
239 /* table of the disabled controls */
240 static const unsigned ctrl_dis[] = {
241 [SEN_OV2610] = (1 << NCTRL) - 1, /* no control */
243 [SEN_OV2610AE] = (1 << NCTRL) - 1, /* no control */
245 [SEN_OV3610] = (1 << NCTRL) - 1, /* no control */
247 [SEN_OV6620] = (1 << HFLIP) |
250 [SEN_OV6630] = (1 << HFLIP) |
253 [SEN_OV66308AF] = (1 << HFLIP) |
256 [SEN_OV7610] = (1 << HFLIP) |
259 [SEN_OV7620] = (1 << HFLIP) |
262 [SEN_OV7620AE] = (1 << HFLIP) |
265 [SEN_OV7640] = (1 << HFLIP) |
270 [SEN_OV7648] = (1 << HFLIP) |
275 [SEN_OV7660] = (1 << AUTOBRIGHT),
277 [SEN_OV7670] = (1 << COLORS) |
280 [SEN_OV76BE] = (1 << HFLIP) |
283 [SEN_OV8610] = (1 << HFLIP) |
288 static const struct v4l2_pix_format ov519_vga_mode[] = {
289 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
291 .sizeimage = 320 * 240 * 3 / 8 + 590,
292 .colorspace = V4L2_COLORSPACE_JPEG,
294 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
296 .sizeimage = 640 * 480 * 3 / 8 + 590,
297 .colorspace = V4L2_COLORSPACE_JPEG,
300 static const struct v4l2_pix_format ov519_sif_mode[] = {
301 {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
303 .sizeimage = 160 * 120 * 3 / 8 + 590,
304 .colorspace = V4L2_COLORSPACE_JPEG,
306 {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
308 .sizeimage = 176 * 144 * 3 / 8 + 590,
309 .colorspace = V4L2_COLORSPACE_JPEG,
311 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
313 .sizeimage = 320 * 240 * 3 / 8 + 590,
314 .colorspace = V4L2_COLORSPACE_JPEG,
316 {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
318 .sizeimage = 352 * 288 * 3 / 8 + 590,
319 .colorspace = V4L2_COLORSPACE_JPEG,
323 /* Note some of the sizeimage values for the ov511 / ov518 may seem
324 larger then necessary, however they need to be this big as the ov511 /
325 ov518 always fills the entire isoc frame, using 0 padding bytes when
326 it doesn't have any data. So with low framerates the amount of data
327 transfered can become quite large (libv4l will remove all the 0 padding
329 static const struct v4l2_pix_format ov518_vga_mode[] = {
330 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
332 .sizeimage = 320 * 240 * 3,
333 .colorspace = V4L2_COLORSPACE_JPEG,
335 {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
337 .sizeimage = 640 * 480 * 2,
338 .colorspace = V4L2_COLORSPACE_JPEG,
341 static const struct v4l2_pix_format ov518_sif_mode[] = {
342 {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
345 .colorspace = V4L2_COLORSPACE_JPEG,
347 {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
350 .colorspace = V4L2_COLORSPACE_JPEG,
352 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
354 .sizeimage = 320 * 240 * 3,
355 .colorspace = V4L2_COLORSPACE_JPEG,
357 {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
359 .sizeimage = 352 * 288 * 3,
360 .colorspace = V4L2_COLORSPACE_JPEG,
364 static const struct v4l2_pix_format ov511_vga_mode[] = {
365 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
367 .sizeimage = 320 * 240 * 3,
368 .colorspace = V4L2_COLORSPACE_JPEG,
370 {640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
372 .sizeimage = 640 * 480 * 2,
373 .colorspace = V4L2_COLORSPACE_JPEG,
376 static const struct v4l2_pix_format ov511_sif_mode[] = {
377 {160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
380 .colorspace = V4L2_COLORSPACE_JPEG,
382 {176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
385 .colorspace = V4L2_COLORSPACE_JPEG,
387 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
389 .sizeimage = 320 * 240 * 3,
390 .colorspace = V4L2_COLORSPACE_JPEG,
392 {352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
394 .sizeimage = 352 * 288 * 3,
395 .colorspace = V4L2_COLORSPACE_JPEG,
399 static const struct v4l2_pix_format ovfx2_vga_mode[] = {
400 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
402 .sizeimage = 320 * 240,
403 .colorspace = V4L2_COLORSPACE_SRGB,
405 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
407 .sizeimage = 640 * 480,
408 .colorspace = V4L2_COLORSPACE_SRGB,
411 static const struct v4l2_pix_format ovfx2_cif_mode[] = {
412 {160, 120, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
414 .sizeimage = 160 * 120,
415 .colorspace = V4L2_COLORSPACE_SRGB,
417 {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
419 .sizeimage = 176 * 144,
420 .colorspace = V4L2_COLORSPACE_SRGB,
422 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
424 .sizeimage = 320 * 240,
425 .colorspace = V4L2_COLORSPACE_SRGB,
427 {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
429 .sizeimage = 352 * 288,
430 .colorspace = V4L2_COLORSPACE_SRGB,
433 static const struct v4l2_pix_format ovfx2_ov2610_mode[] = {
434 {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
436 .sizeimage = 800 * 600,
437 .colorspace = V4L2_COLORSPACE_SRGB,
439 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
440 .bytesperline = 1600,
441 .sizeimage = 1600 * 1200,
442 .colorspace = V4L2_COLORSPACE_SRGB},
444 static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
445 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
447 .sizeimage = 640 * 480,
448 .colorspace = V4L2_COLORSPACE_SRGB,
450 {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
452 .sizeimage = 800 * 600,
453 .colorspace = V4L2_COLORSPACE_SRGB,
455 {1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
456 .bytesperline = 1024,
457 .sizeimage = 1024 * 768,
458 .colorspace = V4L2_COLORSPACE_SRGB,
460 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
461 .bytesperline = 1600,
462 .sizeimage = 1600 * 1200,
463 .colorspace = V4L2_COLORSPACE_SRGB,
465 {2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
466 .bytesperline = 2048,
467 .sizeimage = 2048 * 1536,
468 .colorspace = V4L2_COLORSPACE_SRGB,
472 /* Registers common to OV511 / OV518 */
473 #define R51x_FIFO_PSIZE 0x30 /* 2 bytes wide w/ OV518(+) */
474 #define R51x_SYS_RESET 0x50
475 /* Reset type flags */
476 #define OV511_RESET_OMNICE 0x08
477 #define R51x_SYS_INIT 0x53
478 #define R51x_SYS_SNAP 0x52
479 #define R51x_SYS_CUST_ID 0x5f
480 #define R51x_COMP_LUT_BEGIN 0x80
482 /* OV511 Camera interface register numbers */
483 #define R511_CAM_DELAY 0x10
484 #define R511_CAM_EDGE 0x11
485 #define R511_CAM_PXCNT 0x12
486 #define R511_CAM_LNCNT 0x13
487 #define R511_CAM_PXDIV 0x14
488 #define R511_CAM_LNDIV 0x15
489 #define R511_CAM_UV_EN 0x16
490 #define R511_CAM_LINE_MODE 0x17
491 #define R511_CAM_OPTS 0x18
493 #define R511_SNAP_FRAME 0x19
494 #define R511_SNAP_PXCNT 0x1a
495 #define R511_SNAP_LNCNT 0x1b
496 #define R511_SNAP_PXDIV 0x1c
497 #define R511_SNAP_LNDIV 0x1d
498 #define R511_SNAP_UV_EN 0x1e
499 #define R511_SNAP_OPTS 0x1f
501 #define R511_DRAM_FLOW_CTL 0x20
502 #define R511_FIFO_OPTS 0x31
503 #define R511_I2C_CTL 0x40
504 #define R511_SYS_LED_CTL 0x55 /* OV511+ only */
505 #define R511_COMP_EN 0x78
506 #define R511_COMP_LUT_EN 0x79
508 /* OV518 Camera interface register numbers */
509 #define R518_GPIO_OUT 0x56 /* OV518(+) only */
510 #define R518_GPIO_CTL 0x57 /* OV518(+) only */
512 /* OV519 Camera interface register numbers */
513 #define OV519_R10_H_SIZE 0x10
514 #define OV519_R11_V_SIZE 0x11
515 #define OV519_R12_X_OFFSETL 0x12
516 #define OV519_R13_X_OFFSETH 0x13
517 #define OV519_R14_Y_OFFSETL 0x14
518 #define OV519_R15_Y_OFFSETH 0x15
519 #define OV519_R16_DIVIDER 0x16
520 #define OV519_R20_DFR 0x20
521 #define OV519_R25_FORMAT 0x25
523 /* OV519 System Controller register numbers */
524 #define OV519_R51_RESET1 0x51
525 #define OV519_R54_EN_CLK1 0x54
526 #define OV519_R57_SNAPSHOT 0x57
528 #define OV519_GPIO_DATA_OUT0 0x71
529 #define OV519_GPIO_IO_CTRL0 0x72
531 /*#define OV511_ENDPOINT_ADDRESS 1 * Isoc endpoint number */
534 * The FX2 chip does not give us a zero length read at end of frame.
535 * It does, however, give a short read at the end of a frame, if
536 * necessary, rather than run two frames together.
538 * By choosing the right bulk transfer size, we are guaranteed to always
539 * get a short read for the last read of each frame. Frame sizes are
540 * always a composite number (width * height, or a multiple) so if we
541 * choose a prime number, we are guaranteed that the last read of a
542 * frame will be short.
544 * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB,
545 * otherwise EOVERFLOW "babbling" errors occur. I have not been able
546 * to figure out why. [PMiller]
548 * The constant (13 * 4096) is the largest "prime enough" number less than 64KB.
550 * It isn't enough to know the number of bytes per frame, in case we
551 * have data dropouts or buffer overruns (even though the FX2 double
552 * buffers, there are some pretty strict real time constraints for
553 * isochronous transfer for larger frame sizes).
555 /*jfm: this value works well for 1600x1200, but not 800x600 - see isoc_init */
556 #define OVFX2_BULK_SIZE (13 * 4096)
559 #define R51x_I2C_W_SID 0x41
560 #define R51x_I2C_SADDR_3 0x42
561 #define R51x_I2C_SADDR_2 0x43
562 #define R51x_I2C_R_SID 0x44
563 #define R51x_I2C_DATA 0x45
564 #define R518_I2C_CTL 0x47 /* OV518(+) only */
565 #define OVFX2_I2C_ADDR 0x00
568 #define OV7xx0_SID 0x42
569 #define OV_HIRES_SID 0x60 /* OV9xxx / OV2xxx / OV3xxx */
570 #define OV8xx0_SID 0xa0
571 #define OV6xx0_SID 0xc0
573 /* OV7610 registers */
574 #define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */
575 #define OV7610_REG_BLUE 0x01 /* blue channel balance */
576 #define OV7610_REG_RED 0x02 /* red channel balance */
577 #define OV7610_REG_SAT 0x03 /* saturation */
578 #define OV8610_REG_HUE 0x04 /* 04 reserved */
579 #define OV7610_REG_CNT 0x05 /* Y contrast */
580 #define OV7610_REG_BRT 0x06 /* Y brightness */
581 #define OV7610_REG_COM_C 0x14 /* misc common regs */
582 #define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */
583 #define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */
584 #define OV7610_REG_COM_I 0x29 /* misc settings */
586 /* OV7660 and OV7670 registers */
587 #define OV7670_R00_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
588 #define OV7670_R01_BLUE 0x01 /* blue gain */
589 #define OV7670_R02_RED 0x02 /* red gain */
590 #define OV7670_R03_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
591 #define OV7670_R04_COM1 0x04 /* Control 1 */
592 /*#define OV7670_R07_AECHH 0x07 * AEC MS 5 bits */
593 #define OV7670_R0C_COM3 0x0c /* Control 3 */
594 #define OV7670_R0D_COM4 0x0d /* Control 4 */
595 #define OV7670_R0E_COM5 0x0e /* All "reserved" */
596 #define OV7670_R0F_COM6 0x0f /* Control 6 */
597 #define OV7670_R10_AECH 0x10 /* More bits of AEC value */
598 #define OV7670_R11_CLKRC 0x11 /* Clock control */
599 #define OV7670_R12_COM7 0x12 /* Control 7 */
600 #define OV7670_COM7_FMT_VGA 0x00
601 /*#define OV7670_COM7_YUV 0x00 * YUV */
602 #define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */
603 #define OV7670_COM7_FMT_MASK 0x38
604 #define OV7670_COM7_RESET 0x80 /* Register reset */
605 #define OV7670_R13_COM8 0x13 /* Control 8 */
606 #define OV7670_COM8_AEC 0x01 /* Auto exposure enable */
607 #define OV7670_COM8_AWB 0x02 /* White balance enable */
608 #define OV7670_COM8_AGC 0x04 /* Auto gain enable */
609 #define OV7670_COM8_BFILT 0x20 /* Band filter enable */
610 #define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */
611 #define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
612 #define OV7670_R14_COM9 0x14 /* Control 9 - gain ceiling */
613 #define OV7670_R15_COM10 0x15 /* Control 10 */
614 #define OV7670_R17_HSTART 0x17 /* Horiz start high bits */
615 #define OV7670_R18_HSTOP 0x18 /* Horiz stop high bits */
616 #define OV7670_R19_VSTART 0x19 /* Vert start high bits */
617 #define OV7670_R1A_VSTOP 0x1a /* Vert stop high bits */
618 #define OV7670_R1E_MVFP 0x1e /* Mirror / vflip */
619 #define OV7670_MVFP_VFLIP 0x10 /* vertical flip */
620 #define OV7670_MVFP_MIRROR 0x20 /* Mirror image */
621 #define OV7670_R24_AEW 0x24 /* AGC upper limit */
622 #define OV7670_R25_AEB 0x25 /* AGC lower limit */
623 #define OV7670_R26_VPT 0x26 /* AGC/AEC fast mode op region */
624 #define OV7670_R32_HREF 0x32 /* HREF pieces */
625 #define OV7670_R3A_TSLB 0x3a /* lots of stuff */
626 #define OV7670_R3B_COM11 0x3b /* Control 11 */
627 #define OV7670_COM11_EXP 0x02
628 #define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
629 #define OV7670_R3C_COM12 0x3c /* Control 12 */
630 #define OV7670_R3D_COM13 0x3d /* Control 13 */
631 #define OV7670_COM13_GAMMA 0x80 /* Gamma enable */
632 #define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */
633 #define OV7670_R3E_COM14 0x3e /* Control 14 */
634 #define OV7670_R3F_EDGE 0x3f /* Edge enhancement factor */
635 #define OV7670_R40_COM15 0x40 /* Control 15 */
636 /*#define OV7670_COM15_R00FF 0xc0 * 00 to FF */
637 #define OV7670_R41_COM16 0x41 /* Control 16 */
638 #define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */
639 /* end of ov7660 common registers */
640 #define OV7670_R55_BRIGHT 0x55 /* Brightness */
641 #define OV7670_R56_CONTRAS 0x56 /* Contrast control */
642 #define OV7670_R69_GFIX 0x69 /* Fix gain control */
643 /*#define OV7670_R8C_RGB444 0x8c * RGB 444 control */
644 #define OV7670_R9F_HAECC1 0x9f /* Hist AEC/AGC control 1 */
645 #define OV7670_RA0_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
646 #define OV7670_RA5_BD50MAX 0xa5 /* 50hz banding step limit */
647 #define OV7670_RA6_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
648 #define OV7670_RA7_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
649 #define OV7670_RA8_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
650 #define OV7670_RA9_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
651 #define OV7670_RAA_HAECC7 0xaa /* Hist AEC/AGC control 7 */
652 #define OV7670_RAB_BD60MAX 0xab /* 60hz banding step limit */
658 struct ov_i2c_regvals {
663 /* Settings for OV2610 camera chip */
664 static const struct ov_i2c_regvals norm_2610[] = {
665 { 0x12, 0x80 }, /* reset */
668 static const struct ov_i2c_regvals norm_2610ae[] = {
669 {0x12, 0x80}, /* reset */
674 {0x12, 0x20}, /* 1600x1200 */
679 {0x11, 0x83}, /* clock / 3 ? */
680 {0x2d, 0x00}, /* 60 Hz filter */
681 {0x24, 0xb0}, /* normal colors */
686 static const struct ov_i2c_regvals norm_3620b[] = {
688 * From the datasheet: "Note that after writing to register COMH
689 * (0x12) to change the sensor mode, registers related to the
690 * sensor’s cropping window will be reset back to their default
693 * "wait 4096 external clock ... to make sure the sensor is
694 * stable and ready to access registers" i.e. 160us at 24MHz
696 { 0x12, 0x80 }, /* COMH reset */
697 { 0x12, 0x00 }, /* QXGA, master */
700 * 11 CLKRC "Clock Rate Control"
701 * [7] internal frequency doublers: on
702 * [6] video port mode: master
703 * [5:0] clock divider: 1
708 * 13 COMI "Common Control I"
709 * = 192 (0xC0) 11000000
710 * COMI[7] "AEC speed selection"
711 * = 1 (0x01) 1....... "Faster AEC correction"
712 * COMI[6] "AEC speed step selection"
713 * = 1 (0x01) .1...... "Big steps, fast"
714 * COMI[5] "Banding filter on off"
715 * = 0 (0x00) ..0..... "Off"
716 * COMI[4] "Banding filter option"
717 * = 0 (0x00) ...0.... "Main clock is 48 MHz and
720 * = 0 (0x00) ....0...
721 * COMI[2] "AGC auto manual control selection"
722 * = 0 (0x00) .....0.. "Manual"
723 * COMI[1] "AWB auto manual control selection"
724 * = 0 (0x00) ......0. "Manual"
725 * COMI[0] "Exposure control"
726 * = 0 (0x00) .......0 "Manual"
731 * 09 COMC "Common Control C"
732 * = 8 (0x08) 00001000
733 * COMC[7:5] "Reserved"
734 * = 0 (0x00) 000.....
735 * COMC[4] "Sleep Mode Enable"
736 * = 0 (0x00) ...0.... "Normal mode"
737 * COMC[3:2] "Sensor sampling reset timing selection"
738 * = 2 (0x02) ....10.. "Longer reset time"
739 * COMC[1:0] "Output drive current select"
740 * = 0 (0x00) ......00 "Weakest"
745 * 0C COMD "Common Control D"
746 * = 8 (0x08) 00001000
748 * = 0 (0x00) 0.......
749 * COMD[6] "Swap MSB and LSB at the output port"
750 * = 0 (0x00) .0...... "False"
751 * COMD[5:3] "Reserved"
752 * = 1 (0x01) ..001...
753 * COMD[2] "Output Average On Off"
754 * = 0 (0x00) .....0.. "Output Normal"
755 * COMD[1] "Sensor precharge voltage selection"
756 * = 0 (0x00) ......0. "Selects internal
757 * reference precharge
759 * COMD[0] "Snapshot option"
760 * = 0 (0x00) .......0 "Enable live video output
761 * after snapshot sequence"
766 * 0D COME "Common Control E"
767 * = 161 (0xA1) 10100001
768 * COME[7] "Output average option"
769 * = 1 (0x01) 1....... "Output average of 4 pixels"
770 * COME[6] "Anti-blooming control"
771 * = 0 (0x00) .0...... "Off"
772 * COME[5:3] "Reserved"
773 * = 4 (0x04) ..100...
774 * COME[2] "Clock output power down pin status"
775 * = 0 (0x00) .....0.. "Tri-state data output pin
777 * COME[1] "Data output pin status selection at power down"
778 * = 0 (0x00) ......0. "Tri-state VSYNC, PCLK,
779 * HREF, and CHSYNC pins on
781 * COME[0] "Auto zero circuit select"
782 * = 1 (0x01) .......1 "On"
787 * 0E COMF "Common Control F"
788 * = 112 (0x70) 01110000
789 * COMF[7] "System clock selection"
790 * = 0 (0x00) 0....... "Use 24 MHz system clock"
791 * COMF[6:4] "Reserved"
792 * = 7 (0x07) .111....
793 * COMF[3] "Manual auto negative offset canceling selection"
794 * = 0 (0x00) ....0... "Auto detect negative
795 * offset and cancel it"
796 * COMF[2:0] "Reserved"
797 * = 0 (0x00) .....000
802 * 0F COMG "Common Control G"
803 * = 66 (0x42) 01000010
804 * COMG[7] "Optical black output selection"
805 * = 0 (0x00) 0....... "Disable"
806 * COMG[6] "Black level calibrate selection"
807 * = 1 (0x01) .1...... "Use optical black pixels
809 * COMG[5:4] "Reserved"
810 * = 0 (0x00) ..00....
811 * COMG[3] "Channel offset adjustment"
812 * = 0 (0x00) ....0... "Disable offset adjustment"
813 * COMG[2] "ADC black level calibration option"
814 * = 0 (0x00) .....0.. "Use B/G line and G/R
815 * line to calibrate each
816 * channel's black level"
818 * = 1 (0x01) ......1.
819 * COMG[0] "ADC black level calibration enable"
820 * = 0 (0x00) .......0 "Disable"
825 * 14 COMJ "Common Control J"
826 * = 198 (0xC6) 11000110
827 * COMJ[7:6] "AGC gain ceiling"
828 * = 3 (0x03) 11...... "8x"
829 * COMJ[5:4] "Reserved"
830 * = 0 (0x00) ..00....
831 * COMJ[3] "Auto banding filter"
832 * = 0 (0x00) ....0... "Banding filter is always
833 * on off depending on
835 * COMJ[2] "VSYNC drop option"
836 * = 1 (0x01) .....1.. "SYNC is dropped if frame
838 * COMJ[1] "Frame data drop"
839 * = 1 (0x01) ......1. "Drop frame data if
840 * exposure is not within
841 * tolerance. In AEC mode,
842 * data is normally dropped
843 * when data is out of
846 * = 0 (0x00) .......0
851 * 15 COMK "Common Control K"
852 * = 2 (0x02) 00000010
853 * COMK[7] "CHSYNC pin output swap"
854 * = 0 (0x00) 0....... "CHSYNC"
855 * COMK[6] "HREF pin output swap"
856 * = 0 (0x00) .0...... "HREF"
857 * COMK[5] "PCLK output selection"
858 * = 0 (0x00) ..0..... "PCLK always output"
859 * COMK[4] "PCLK edge selection"
860 * = 0 (0x00) ...0.... "Data valid on falling edge"
861 * COMK[3] "HREF output polarity"
862 * = 0 (0x00) ....0... "positive"
864 * = 0 (0x00) .....0..
865 * COMK[1] "VSYNC polarity"
866 * = 1 (0x01) ......1. "negative"
867 * COMK[0] "HSYNC polarity"
868 * = 0 (0x00) .......0 "positive"
873 * 33 CHLF "Current Control"
874 * = 9 (0x09) 00001001
875 * CHLF[7:6] "Sensor current control"
876 * = 0 (0x00) 00......
877 * CHLF[5] "Sensor current range control"
878 * = 0 (0x00) ..0..... "normal range"
879 * CHLF[4] "Sensor current"
880 * = 0 (0x00) ...0.... "normal current"
881 * CHLF[3] "Sensor buffer current control"
882 * = 1 (0x01) ....1... "half current"
883 * CHLF[2] "Column buffer current control"
884 * = 0 (0x00) .....0.. "normal current"
885 * CHLF[1] "Analog DSP current control"
886 * = 0 (0x00) ......0. "normal current"
887 * CHLF[1] "ADC current control"
888 * = 0 (0x00) ......0. "normal current"
893 * 34 VBLM "Blooming Control"
894 * = 80 (0x50) 01010000
895 * VBLM[7] "Hard soft reset switch"
896 * = 0 (0x00) 0....... "Hard reset"
897 * VBLM[6:4] "Blooming voltage selection"
898 * = 5 (0x05) .101....
899 * VBLM[3:0] "Sensor current control"
900 * = 0 (0x00) ....0000
905 * 36 VCHG "Sensor Precharge Voltage Control"
906 * = 0 (0x00) 00000000
908 * = 0 (0x00) 0.......
909 * VCHG[6:4] "Sensor precharge voltage control"
910 * = 0 (0x00) .000....
911 * VCHG[3:0] "Sensor array common reference"
912 * = 0 (0x00) ....0000
917 * 37 ADC "ADC Reference Control"
918 * = 4 (0x04) 00000100
919 * ADC[7:4] "Reserved"
920 * = 0 (0x00) 0000....
921 * ADC[3] "ADC input signal range"
922 * = 0 (0x00) ....0... "Input signal 1.0x"
923 * ADC[2:0] "ADC range control"
924 * = 4 (0x04) .....100
929 * 38 ACOM "Analog Common Ground"
930 * = 82 (0x52) 01010010
931 * ACOM[7] "Analog gain control"
932 * = 0 (0x00) 0....... "Gain 1x"
933 * ACOM[6] "Analog black level calibration"
934 * = 1 (0x01) .1...... "On"
935 * ACOM[5:0] "Reserved"
936 * = 18 (0x12) ..010010
941 * 3A FREFA "Internal Reference Adjustment"
942 * = 0 (0x00) 00000000
944 * = 0 (0x00) 00000000
949 * 3C FVOPT "Internal Reference Adjustment"
950 * = 31 (0x1F) 00011111
952 * = 31 (0x1F) 00011111
957 * 44 Undocumented = 0 (0x00) 00000000
958 * 44[7:0] "It's a secret"
959 * = 0 (0x00) 00000000
964 * 40 Undocumented = 0 (0x00) 00000000
965 * 40[7:0] "It's a secret"
966 * = 0 (0x00) 00000000
971 * 41 Undocumented = 0 (0x00) 00000000
972 * 41[7:0] "It's a secret"
973 * = 0 (0x00) 00000000
978 * 42 Undocumented = 0 (0x00) 00000000
979 * 42[7:0] "It's a secret"
980 * = 0 (0x00) 00000000
985 * 43 Undocumented = 0 (0x00) 00000000
986 * 43[7:0] "It's a secret"
987 * = 0 (0x00) 00000000
992 * 45 Undocumented = 128 (0x80) 10000000
993 * 45[7:0] "It's a secret"
994 * = 128 (0x80) 10000000
999 * 48 Undocumented = 192 (0xC0) 11000000
1000 * 48[7:0] "It's a secret"
1001 * = 192 (0xC0) 11000000
1006 * 49 Undocumented = 25 (0x19) 00011001
1007 * 49[7:0] "It's a secret"
1008 * = 25 (0x19) 00011001
1013 * 4B Undocumented = 128 (0x80) 10000000
1014 * 4B[7:0] "It's a secret"
1015 * = 128 (0x80) 10000000
1020 * 4D Undocumented = 196 (0xC4) 11000100
1021 * 4D[7:0] "It's a secret"
1022 * = 196 (0xC4) 11000100
1027 * 35 VREF "Reference Voltage Control"
1028 * = 76 (0x4c) 01001100
1029 * VREF[7:5] "Column high reference control"
1030 * = 2 (0x02) 010..... "higher voltage"
1031 * VREF[4:2] "Column low reference control"
1032 * = 3 (0x03) ...011.. "Highest voltage"
1033 * VREF[1:0] "Reserved"
1034 * = 0 (0x00) ......00
1039 * 3D Undocumented = 0 (0x00) 00000000
1040 * 3D[7:0] "It's a secret"
1041 * = 0 (0x00) 00000000
1046 * 3E Undocumented = 0 (0x00) 00000000
1047 * 3E[7:0] "It's a secret"
1048 * = 0 (0x00) 00000000
1053 * 3B FREFB "Internal Reference Adjustment"
1054 * = 24 (0x18) 00011000
1055 * FREFB[7:0] "Range"
1056 * = 24 (0x18) 00011000
1061 * 33 CHLF "Current Control"
1062 * = 25 (0x19) 00011001
1063 * CHLF[7:6] "Sensor current control"
1064 * = 0 (0x00) 00......
1065 * CHLF[5] "Sensor current range control"
1066 * = 0 (0x00) ..0..... "normal range"
1067 * CHLF[4] "Sensor current"
1068 * = 1 (0x01) ...1.... "double current"
1069 * CHLF[3] "Sensor buffer current control"
1070 * = 1 (0x01) ....1... "half current"
1071 * CHLF[2] "Column buffer current control"
1072 * = 0 (0x00) .....0.. "normal current"
1073 * CHLF[1] "Analog DSP current control"
1074 * = 0 (0x00) ......0. "normal current"
1075 * CHLF[1] "ADC current control"
1076 * = 0 (0x00) ......0. "normal current"
1081 * 34 VBLM "Blooming Control"
1082 * = 90 (0x5A) 01011010
1083 * VBLM[7] "Hard soft reset switch"
1084 * = 0 (0x00) 0....... "Hard reset"
1085 * VBLM[6:4] "Blooming voltage selection"
1086 * = 5 (0x05) .101....
1087 * VBLM[3:0] "Sensor current control"
1088 * = 10 (0x0A) ....1010
1093 * 3B FREFB "Internal Reference Adjustment"
1094 * = 0 (0x00) 00000000
1095 * FREFB[7:0] "Range"
1096 * = 0 (0x00) 00000000
1101 * 33 CHLF "Current Control"
1102 * = 9 (0x09) 00001001
1103 * CHLF[7:6] "Sensor current control"
1104 * = 0 (0x00) 00......
1105 * CHLF[5] "Sensor current range control"
1106 * = 0 (0x00) ..0..... "normal range"
1107 * CHLF[4] "Sensor current"
1108 * = 0 (0x00) ...0.... "normal current"
1109 * CHLF[3] "Sensor buffer current control"
1110 * = 1 (0x01) ....1... "half current"
1111 * CHLF[2] "Column buffer current control"
1112 * = 0 (0x00) .....0.. "normal current"
1113 * CHLF[1] "Analog DSP current control"
1114 * = 0 (0x00) ......0. "normal current"
1115 * CHLF[1] "ADC current control"
1116 * = 0 (0x00) ......0. "normal current"
1121 * 34 VBLM "Blooming Control"
1122 * = 80 (0x50) 01010000
1123 * VBLM[7] "Hard soft reset switch"
1124 * = 0 (0x00) 0....... "Hard reset"
1125 * VBLM[6:4] "Blooming voltage selection"
1126 * = 5 (0x05) .101....
1127 * VBLM[3:0] "Sensor current control"
1128 * = 0 (0x00) ....0000
1133 * 12 COMH "Common Control H"
1134 * = 64 (0x40) 01000000
1136 * = 0 (0x00) 0....... "No-op"
1137 * COMH[6:4] "Resolution selection"
1138 * = 4 (0x04) .100.... "XGA"
1139 * COMH[3] "Master slave selection"
1140 * = 0 (0x00) ....0... "Master mode"
1141 * COMH[2] "Internal B/R channel option"
1142 * = 0 (0x00) .....0.. "B/R use same channel"
1143 * COMH[1] "Color bar test pattern"
1144 * = 0 (0x00) ......0. "Off"
1145 * COMH[0] "Reserved"
1146 * = 0 (0x00) .......0
1151 * 17 HREFST "Horizontal window start"
1152 * = 31 (0x1F) 00011111
1153 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1154 * = 31 (0x1F) 00011111
1159 * 18 HREFEND "Horizontal window end"
1160 * = 95 (0x5F) 01011111
1161 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1162 * = 95 (0x5F) 01011111
1167 * 19 VSTRT "Vertical window start"
1168 * = 0 (0x00) 00000000
1169 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1170 * = 0 (0x00) 00000000
1175 * 1A VEND "Vertical window end"
1176 * = 96 (0x60) 01100000
1177 * VEND[7:0] "Vertical Window End, 8 MSBs"
1178 * = 96 (0x60) 01100000
1183 * 32 COMM "Common Control M"
1184 * = 18 (0x12) 00010010
1185 * COMM[7:6] "Pixel clock divide option"
1186 * = 0 (0x00) 00...... "/1"
1187 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1188 * = 2 (0x02) ..010...
1189 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1190 * = 2 (0x02) .....010
1195 * 03 COMA "Common Control A"
1196 * = 74 (0x4A) 01001010
1197 * COMA[7:4] "AWB Update Threshold"
1198 * = 4 (0x04) 0100....
1199 * COMA[3:2] "Vertical window end line control 2 LSBs"
1200 * = 2 (0x02) ....10..
1201 * COMA[1:0] "Vertical window start line control 2 LSBs"
1202 * = 2 (0x02) ......10
1207 * 11 CLKRC "Clock Rate Control"
1208 * = 128 (0x80) 10000000
1209 * CLKRC[7] "Internal frequency doublers on off seclection"
1210 * = 1 (0x01) 1....... "On"
1211 * CLKRC[6] "Digital video master slave selection"
1212 * = 0 (0x00) .0...... "Master mode, sensor
1214 * CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }"
1215 * = 0 (0x00) ..000000
1220 * 12 COMH "Common Control H"
1221 * = 0 (0x00) 00000000
1223 * = 0 (0x00) 0....... "No-op"
1224 * COMH[6:4] "Resolution selection"
1225 * = 0 (0x00) .000.... "QXGA"
1226 * COMH[3] "Master slave selection"
1227 * = 0 (0x00) ....0... "Master mode"
1228 * COMH[2] "Internal B/R channel option"
1229 * = 0 (0x00) .....0.. "B/R use same channel"
1230 * COMH[1] "Color bar test pattern"
1231 * = 0 (0x00) ......0. "Off"
1232 * COMH[0] "Reserved"
1233 * = 0 (0x00) .......0
1238 * 12 COMH "Common Control H"
1239 * = 64 (0x40) 01000000
1241 * = 0 (0x00) 0....... "No-op"
1242 * COMH[6:4] "Resolution selection"
1243 * = 4 (0x04) .100.... "XGA"
1244 * COMH[3] "Master slave selection"
1245 * = 0 (0x00) ....0... "Master mode"
1246 * COMH[2] "Internal B/R channel option"
1247 * = 0 (0x00) .....0.. "B/R use same channel"
1248 * COMH[1] "Color bar test pattern"
1249 * = 0 (0x00) ......0. "Off"
1250 * COMH[0] "Reserved"
1251 * = 0 (0x00) .......0
1256 * 17 HREFST "Horizontal window start"
1257 * = 31 (0x1F) 00011111
1258 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1259 * = 31 (0x1F) 00011111
1264 * 18 HREFEND "Horizontal window end"
1265 * = 95 (0x5F) 01011111
1266 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1267 * = 95 (0x5F) 01011111
1272 * 19 VSTRT "Vertical window start"
1273 * = 0 (0x00) 00000000
1274 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1275 * = 0 (0x00) 00000000
1280 * 1A VEND "Vertical window end"
1281 * = 96 (0x60) 01100000
1282 * VEND[7:0] "Vertical Window End, 8 MSBs"
1283 * = 96 (0x60) 01100000
1288 * 32 COMM "Common Control M"
1289 * = 18 (0x12) 00010010
1290 * COMM[7:6] "Pixel clock divide option"
1291 * = 0 (0x00) 00...... "/1"
1292 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1293 * = 2 (0x02) ..010...
1294 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1295 * = 2 (0x02) .....010
1300 * 03 COMA "Common Control A"
1301 * = 74 (0x4A) 01001010
1302 * COMA[7:4] "AWB Update Threshold"
1303 * = 4 (0x04) 0100....
1304 * COMA[3:2] "Vertical window end line control 2 LSBs"
1305 * = 2 (0x02) ....10..
1306 * COMA[1:0] "Vertical window start line control 2 LSBs"
1307 * = 2 (0x02) ......10
1312 * 02 RED "Red Gain Control"
1313 * = 175 (0xAF) 10101111
1315 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1317 * = 47 (0x2F) .0101111
1322 * 2D ADDVSL "VSYNC Pulse Width"
1323 * = 210 (0xD2) 11010010
1324 * ADDVSL[7:0] "VSYNC pulse width, LSB"
1325 * = 210 (0xD2) 11010010
1330 * 00 GAIN = 24 (0x18) 00011000
1331 * GAIN[7:6] "Reserved"
1332 * = 0 (0x00) 00......
1334 * = 0 (0x00) ..0..... "False"
1336 * = 1 (0x01) ...1.... "True"
1338 * = 8 (0x08) ....1000
1343 * 01 BLUE "Blue Gain Control"
1344 * = 240 (0xF0) 11110000
1346 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1348 * = 112 (0x70) .1110000
1353 * 10 AEC "Automatic Exposure Control"
1354 * = 10 (0x0A) 00001010
1355 * AEC[7:0] "Automatic Exposure Control, 8 MSBs"
1356 * = 10 (0x0A) 00001010
1368 static const struct ov_i2c_regvals norm_6x20[] = {
1369 { 0x12, 0x80 }, /* reset */
1372 { 0x05, 0x7f }, /* For when autoadjust is off */
1374 /* The ratio of 0x0c and 0x0d controls the white point */
1377 { 0x0f, 0x15 }, /* COMS */
1378 { 0x10, 0x75 }, /* AEC Exposure time */
1379 { 0x12, 0x24 }, /* Enable AGC */
1381 /* 0x16: 0x06 helps frame stability with moving objects */
1383 /* { 0x20, 0x30 }, * Aperture correction enable */
1384 { 0x26, 0xb2 }, /* BLC enable */
1385 /* 0x28: 0x05 Selects RGB format if RGB on */
1387 { 0x2a, 0x04 }, /* Disable framerate adjust */
1388 /* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */
1390 { 0x33, 0xa0 }, /* Color Processing Parameter */
1391 { 0x34, 0xd2 }, /* Max A/D range */
1395 { 0x3c, 0x39 }, /* Enable AEC mode changing */
1396 { 0x3c, 0x3c }, /* Change AEC mode */
1397 { 0x3c, 0x24 }, /* Disable AEC mode changing */
1400 /* These next two registers (0x4a, 0x4b) are undocumented.
1401 * They control the color balance */
1404 { 0x4d, 0xd2 }, /* This reduces noise a bit */
1407 /* Do 50-53 have any effect? */
1408 /* Toggle 0x12[2] off and on here? */
1411 static const struct ov_i2c_regvals norm_6x30[] = {
1412 { 0x12, 0x80 }, /* Reset */
1413 { 0x00, 0x1f }, /* Gain */
1414 { 0x01, 0x99 }, /* Blue gain */
1415 { 0x02, 0x7c }, /* Red gain */
1416 { 0x03, 0xc0 }, /* Saturation */
1417 { 0x05, 0x0a }, /* Contrast */
1418 { 0x06, 0x95 }, /* Brightness */
1419 { 0x07, 0x2d }, /* Sharpness */
1422 { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
1425 { 0x11, 0x00 }, /* Pixel clock = fastest */
1426 { 0x12, 0x24 }, /* Enable AGC and AWB */
1441 { 0x23, 0xc0 }, /* Crystal circuit power level */
1442 { 0x25, 0x9a }, /* Increase AEC black ratio */
1443 { 0x26, 0xb2 }, /* BLC enable */
1447 { 0x2a, 0x84 }, /* 60 Hz power */
1448 { 0x2b, 0xa8 }, /* 60 Hz power */
1450 { 0x2d, 0x95 }, /* Enable auto-brightness */
1464 { 0x40, 0x00 }, /* White bal */
1465 { 0x41, 0x00 }, /* White bal */
1467 { 0x43, 0x3f }, /* White bal */
1477 { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
1479 { 0x4f, 0x07 }, /* UV avg., col. killer: max */
1481 { 0x54, 0x23 }, /* Max AGC gain: 18dB */
1486 { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
1488 { 0x5b, 0x0f }, /* AWB chrominance levels */
1492 { 0x12, 0x20 }, /* Toggle AWB */
1496 /* Lawrence Glaister <lg@jfm.bc.ca> reports:
1498 * Register 0x0f in the 7610 has the following effects:
1500 * 0x85 (AEC method 1): Best overall, good contrast range
1501 * 0x45 (AEC method 2): Very overexposed
1502 * 0xa5 (spec sheet default): Ok, but the black level is
1503 * shifted resulting in loss of contrast
1504 * 0x05 (old driver setting): very overexposed, too much
1507 static const struct ov_i2c_regvals norm_7610[] = {
1514 { 0x28, 0x24 }, /* 0c */
1515 { 0x0f, 0x85 }, /* lg's setting */
1537 static const struct ov_i2c_regvals norm_7620[] = {
1538 { 0x12, 0x80 }, /* reset */
1539 { 0x00, 0x00 }, /* gain */
1540 { 0x01, 0x80 }, /* blue gain */
1541 { 0x02, 0x80 }, /* red gain */
1542 { 0x03, 0xc0 }, /* OV7670_R03_VREF */
1565 { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */
1604 /* 7640 and 7648. The defaults should be OK for most registers. */
1605 static const struct ov_i2c_regvals norm_7640[] = {
1610 static const struct ov_regvals init_519_ov7660[] = {
1611 { 0x5d, 0x03 }, /* Turn off suspend mode */
1612 { 0x53, 0x9b }, /* 0x9f enables the (unused) microcontroller */
1613 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
1614 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
1618 { 0x37, 0x00 }, /* SetUsbInit */
1619 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
1620 /* Enable both fields, YUV Input, disable defect comp (why?) */
1621 { 0x20, 0x0c }, /* 0x0d does U <-> V swap */
1624 { 0x17, 0x50 }, /* undocumented */
1625 { 0x37, 0x00 }, /* undocumented */
1626 { 0x40, 0xff }, /* I2C timeout counter */
1627 { 0x46, 0x00 }, /* I2C clock prescaler */
1629 static const struct ov_i2c_regvals norm_7660[] = {
1630 {OV7670_R12_COM7, OV7670_COM7_RESET},
1631 {OV7670_R11_CLKRC, 0x81},
1632 {0x92, 0x00}, /* DM_LNL */
1633 {0x93, 0x00}, /* DM_LNH */
1634 {0x9d, 0x4c}, /* BD50ST */
1635 {0x9e, 0x3f}, /* BD60ST */
1636 {OV7670_R3B_COM11, 0x02},
1637 {OV7670_R13_COM8, 0xf5},
1638 {OV7670_R10_AECH, 0x00},
1639 {OV7670_R00_GAIN, 0x00},
1640 {OV7670_R01_BLUE, 0x7c},
1641 {OV7670_R02_RED, 0x9d},
1642 {OV7670_R12_COM7, 0x00},
1643 {OV7670_R04_COM1, 00},
1644 {OV7670_R18_HSTOP, 0x01},
1645 {OV7670_R17_HSTART, 0x13},
1646 {OV7670_R32_HREF, 0x92},
1647 {OV7670_R19_VSTART, 0x02},
1648 {OV7670_R1A_VSTOP, 0x7a},
1649 {OV7670_R03_VREF, 0x00},
1650 {OV7670_R0E_COM5, 0x04},
1651 {OV7670_R0F_COM6, 0x62},
1652 {OV7670_R15_COM10, 0x00},
1653 {0x16, 0x02}, /* RSVD */
1654 {0x1b, 0x00}, /* PSHFT */
1655 {OV7670_R1E_MVFP, 0x01},
1656 {0x29, 0x3c}, /* RSVD */
1657 {0x33, 0x00}, /* CHLF */
1658 {0x34, 0x07}, /* ARBLM */
1659 {0x35, 0x84}, /* RSVD */
1660 {0x36, 0x00}, /* RSVD */
1661 {0x37, 0x04}, /* ADC */
1662 {0x39, 0x43}, /* OFON */
1663 {OV7670_R3A_TSLB, 0x00},
1664 {OV7670_R3C_COM12, 0x6c},
1665 {OV7670_R3D_COM13, 0x98},
1666 {OV7670_R3F_EDGE, 0x23},
1667 {OV7670_R40_COM15, 0xc1},
1668 {OV7670_R41_COM16, 0x22},
1669 {0x6b, 0x0a}, /* DBLV */
1670 {0xa1, 0x08}, /* RSVD */
1671 {0x69, 0x80}, /* HV */
1672 {0x43, 0xf0}, /* RSVD.. */
1687 {0x9f, 0x9d}, /* RSVD */
1688 {0xa0, 0xa0}, /* DSPC2 */
1689 {0x4f, 0x60}, /* matrix */
1698 {0x58, 0x0d}, /* matrix sign */
1699 {0x8b, 0xcc}, /* RSVD */
1702 {0x6c, 0x40}, /* gamma curve */
1718 {0x7c, 0x04}, /* gamma curve */
1733 {OV7670_R14_COM9, 0x1e},
1734 {OV7670_R24_AEW, 0x80},
1735 {OV7670_R25_AEB, 0x72},
1736 {OV7670_R26_VPT, 0xb3},
1737 {0x62, 0x80}, /* LCC1 */
1738 {0x63, 0x80}, /* LCC2 */
1739 {0x64, 0x06}, /* LCC3 */
1740 {0x65, 0x00}, /* LCC4 */
1741 {0x66, 0x01}, /* LCC5 */
1742 {0x94, 0x0e}, /* RSVD.. */
1744 {OV7670_R13_COM8, OV7670_COM8_FASTAEC
1745 | OV7670_COM8_AECSTEP
1754 /* 7670. Defaults taken from OmniVision provided data,
1755 * as provided by Jonathan Corbet of OLPC */
1756 static const struct ov_i2c_regvals norm_7670[] = {
1757 { OV7670_R12_COM7, OV7670_COM7_RESET },
1758 { OV7670_R3A_TSLB, 0x04 }, /* OV */
1759 { OV7670_R12_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
1760 { OV7670_R11_CLKRC, 0x01 },
1762 * Set the hardware window. These values from OV don't entirely
1763 * make sense - hstop is less than hstart. But they work...
1765 { OV7670_R17_HSTART, 0x13 },
1766 { OV7670_R18_HSTOP, 0x01 },
1767 { OV7670_R32_HREF, 0xb6 },
1768 { OV7670_R19_VSTART, 0x02 },
1769 { OV7670_R1A_VSTOP, 0x7a },
1770 { OV7670_R03_VREF, 0x0a },
1772 { OV7670_R0C_COM3, 0x00 },
1773 { OV7670_R3E_COM14, 0x00 },
1774 /* Mystery scaling numbers */
1780 /* { OV7670_R15_COM10, 0x0 }, */
1782 /* Gamma curve values */
1800 /* AGC and AEC parameters. Note we start by disabling those features,
1801 then turn them only after tweaking the values. */
1802 { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1803 | OV7670_COM8_AECSTEP
1804 | OV7670_COM8_BFILT },
1805 { OV7670_R00_GAIN, 0x00 },
1806 { OV7670_R10_AECH, 0x00 },
1807 { OV7670_R0D_COM4, 0x40 }, /* magic reserved bit */
1808 { OV7670_R14_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
1809 { OV7670_RA5_BD50MAX, 0x05 },
1810 { OV7670_RAB_BD60MAX, 0x07 },
1811 { OV7670_R24_AEW, 0x95 },
1812 { OV7670_R25_AEB, 0x33 },
1813 { OV7670_R26_VPT, 0xe3 },
1814 { OV7670_R9F_HAECC1, 0x78 },
1815 { OV7670_RA0_HAECC2, 0x68 },
1816 { 0xa1, 0x03 }, /* magic */
1817 { OV7670_RA6_HAECC3, 0xd8 },
1818 { OV7670_RA7_HAECC4, 0xd8 },
1819 { OV7670_RA8_HAECC5, 0xf0 },
1820 { OV7670_RA9_HAECC6, 0x90 },
1821 { OV7670_RAA_HAECC7, 0x94 },
1822 { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1823 | OV7670_COM8_AECSTEP
1826 | OV7670_COM8_AEC },
1828 /* Almost all of these are magic "reserved" values. */
1829 { OV7670_R0E_COM5, 0x61 },
1830 { OV7670_R0F_COM6, 0x4b },
1832 { OV7670_R1E_MVFP, 0x07 },
1841 { OV7670_R3C_COM12, 0x78 },
1844 { OV7670_R69_GFIX, 0x00 },
1860 /* More reserved magic, some of which tweaks white balance */
1876 { 0x6f, 0x9f }, /* "9e for advance AWB" */
1878 { OV7670_R01_BLUE, 0x40 },
1879 { OV7670_R02_RED, 0x60 },
1880 { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1881 | OV7670_COM8_AECSTEP
1885 | OV7670_COM8_AWB },
1887 /* Matrix coefficients */
1896 { OV7670_R41_COM16, OV7670_COM16_AWBGAIN },
1897 { OV7670_R3F_EDGE, 0x00 },
1902 { OV7670_R3D_COM13, OV7670_COM13_GAMMA
1903 | OV7670_COM13_UVSAT
1907 { OV7670_R41_COM16, 0x38 },
1911 { OV7670_R3B_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
1924 /* Extra-weird stuff. Some sort of multiplexor register */
1950 static const struct ov_i2c_regvals norm_8610[] = {
1957 { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
1958 { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
1967 { 0x15, 0x01 }, /* Lin and Win think different about UV order */
1969 { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
1970 { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
1971 { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
1974 { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
1975 { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
1976 { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
1977 { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
1983 { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
1985 { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
1987 { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
1989 { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
1990 { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
1991 { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
1992 { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
1994 { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
1995 * maybe thats wrong */
1999 { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
2003 { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
2004 * deleting bit7 colors the first images red */
2005 { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
2006 { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
2012 { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
2014 { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
2019 { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
2021 { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
2022 { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
2029 { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
2035 { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
2038 static unsigned char ov7670_abs_to_sm(unsigned char v)
2042 return (128 - v) | 0x80;
2045 /* Write a OV519 register */
2046 static void reg_w(struct sd *sd, u16 index, u16 value)
2050 if (sd->gspca_dev.usb_err < 0)
2053 switch (sd->bridge) {
2055 case BRIDGE_OV511PLUS:
2061 case BRIDGE_W9968CF:
2062 PDEBUG(D_USBO, "SET %02x %04x %04x",
2064 ret = usb_control_msg(sd->gspca_dev.dev,
2065 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2067 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2068 value, index, NULL, 0, 500);
2074 PDEBUG(D_USBO, "SET %02x 0000 %04x %02x",
2076 sd->gspca_dev.usb_buf[0] = value;
2077 ret = usb_control_msg(sd->gspca_dev.dev,
2078 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2080 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2082 sd->gspca_dev.usb_buf, 1, 500);
2085 err("reg_w %02x failed %d", index, ret);
2086 sd->gspca_dev.usb_err = ret;
2091 /* Read from a OV519 register, note not valid for the w9968cf!! */
2092 /* returns: negative is error, pos or zero is data */
2093 static int reg_r(struct sd *sd, u16 index)
2098 if (sd->gspca_dev.usb_err < 0)
2101 switch (sd->bridge) {
2103 case BRIDGE_OV511PLUS:
2113 ret = usb_control_msg(sd->gspca_dev.dev,
2114 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2116 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2117 0, index, sd->gspca_dev.usb_buf, 1, 500);
2120 ret = sd->gspca_dev.usb_buf[0];
2121 PDEBUG(D_USBI, "GET %02x 0000 %04x %02x",
2124 err("reg_r %02x failed %d", index, ret);
2125 sd->gspca_dev.usb_err = ret;
2131 /* Read 8 values from a OV519 register */
2132 static int reg_r8(struct sd *sd,
2137 if (sd->gspca_dev.usb_err < 0)
2140 ret = usb_control_msg(sd->gspca_dev.dev,
2141 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2143 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2144 0, index, sd->gspca_dev.usb_buf, 8, 500);
2147 ret = sd->gspca_dev.usb_buf[0];
2149 err("reg_r8 %02x failed %d", index, ret);
2150 sd->gspca_dev.usb_err = ret;
2157 * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
2158 * the same position as 1's in "mask" are cleared and set to "value". Bits
2159 * that are in the same position as 0's in "mask" are preserved, regardless
2160 * of their respective state in "value".
2162 static void reg_w_mask(struct sd *sd,
2171 value &= mask; /* Enforce mask on value */
2172 ret = reg_r(sd, index);
2176 oldval = ret & ~mask; /* Clear the masked bits */
2177 value |= oldval; /* Set the desired bits */
2179 reg_w(sd, index, value);
2183 * Writes multiple (n) byte value to a single register. Only valid with certain
2184 * registers (0x30 and 0xc4 - 0xce).
2186 static void ov518_reg_w32(struct sd *sd, u16 index, u32 value, int n)
2190 if (sd->gspca_dev.usb_err < 0)
2193 *((__le32 *) sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
2195 ret = usb_control_msg(sd->gspca_dev.dev,
2196 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2198 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2200 sd->gspca_dev.usb_buf, n, 500);
2202 err("reg_w32 %02x failed %d", index, ret);
2203 sd->gspca_dev.usb_err = ret;
2207 static void ov511_i2c_w(struct sd *sd, u8 reg, u8 value)
2211 PDEBUG(D_USBO, "ov511_i2c_w %02x %02x", reg, value);
2213 /* Three byte write cycle */
2214 for (retries = 6; ; ) {
2215 /* Select camera register */
2216 reg_w(sd, R51x_I2C_SADDR_3, reg);
2218 /* Write "value" to I2C data port of OV511 */
2219 reg_w(sd, R51x_I2C_DATA, value);
2221 /* Initiate 3-byte write cycle */
2222 reg_w(sd, R511_I2C_CTL, 0x01);
2225 rc = reg_r(sd, R511_I2C_CTL);
2226 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2231 if ((rc & 2) == 0) /* Ack? */
2233 if (--retries < 0) {
2234 PDEBUG(D_USBO, "i2c write retries exhausted");
2240 static int ov511_i2c_r(struct sd *sd, u8 reg)
2242 int rc, value, retries;
2244 /* Two byte write cycle */
2245 for (retries = 6; ; ) {
2246 /* Select camera register */
2247 reg_w(sd, R51x_I2C_SADDR_2, reg);
2249 /* Initiate 2-byte write cycle */
2250 reg_w(sd, R511_I2C_CTL, 0x03);
2253 rc = reg_r(sd, R511_I2C_CTL);
2254 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2259 if ((rc & 2) == 0) /* Ack? */
2263 reg_w(sd, R511_I2C_CTL, 0x10);
2265 if (--retries < 0) {
2266 PDEBUG(D_USBI, "i2c write retries exhausted");
2271 /* Two byte read cycle */
2272 for (retries = 6; ; ) {
2273 /* Initiate 2-byte read cycle */
2274 reg_w(sd, R511_I2C_CTL, 0x05);
2277 rc = reg_r(sd, R511_I2C_CTL);
2278 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2283 if ((rc & 2) == 0) /* Ack? */
2287 reg_w(sd, R511_I2C_CTL, 0x10);
2289 if (--retries < 0) {
2290 PDEBUG(D_USBI, "i2c read retries exhausted");
2295 value = reg_r(sd, R51x_I2C_DATA);
2297 PDEBUG(D_USBI, "ov511_i2c_r %02x %02x", reg, value);
2299 /* This is needed to make i2c_w() work */
2300 reg_w(sd, R511_I2C_CTL, 0x05);
2306 * The OV518 I2C I/O procedure is different, hence, this function.
2307 * This is normally only called from i2c_w(). Note that this function
2308 * always succeeds regardless of whether the sensor is present and working.
2310 static void ov518_i2c_w(struct sd *sd,
2314 PDEBUG(D_USBO, "ov518_i2c_w %02x %02x", reg, value);
2316 /* Select camera register */
2317 reg_w(sd, R51x_I2C_SADDR_3, reg);
2319 /* Write "value" to I2C data port of OV511 */
2320 reg_w(sd, R51x_I2C_DATA, value);
2322 /* Initiate 3-byte write cycle */
2323 reg_w(sd, R518_I2C_CTL, 0x01);
2325 /* wait for write complete */
2327 reg_r8(sd, R518_I2C_CTL);
2331 * returns: negative is error, pos or zero is data
2333 * The OV518 I2C I/O procedure is different, hence, this function.
2334 * This is normally only called from i2c_r(). Note that this function
2335 * always succeeds regardless of whether the sensor is present and working.
2337 static int ov518_i2c_r(struct sd *sd, u8 reg)
2341 /* Select camera register */
2342 reg_w(sd, R51x_I2C_SADDR_2, reg);
2344 /* Initiate 2-byte write cycle */
2345 reg_w(sd, R518_I2C_CTL, 0x03);
2347 /* Initiate 2-byte read cycle */
2348 reg_w(sd, R518_I2C_CTL, 0x05);
2349 value = reg_r(sd, R51x_I2C_DATA);
2350 PDEBUG(D_USBI, "ov518_i2c_r %02x %02x", reg, value);
2354 static void ovfx2_i2c_w(struct sd *sd, u8 reg, u8 value)
2358 if (sd->gspca_dev.usb_err < 0)
2361 ret = usb_control_msg(sd->gspca_dev.dev,
2362 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2364 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2365 (u16) value, (u16) reg, NULL, 0, 500);
2368 err("ovfx2_i2c_w %02x failed %d", reg, ret);
2369 sd->gspca_dev.usb_err = ret;
2372 PDEBUG(D_USBO, "ovfx2_i2c_w %02x %02x", reg, value);
2375 static int ovfx2_i2c_r(struct sd *sd, u8 reg)
2379 if (sd->gspca_dev.usb_err < 0)
2382 ret = usb_control_msg(sd->gspca_dev.dev,
2383 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2385 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2386 0, (u16) reg, sd->gspca_dev.usb_buf, 1, 500);
2389 ret = sd->gspca_dev.usb_buf[0];
2390 PDEBUG(D_USBI, "ovfx2_i2c_r %02x %02x", reg, ret);
2392 err("ovfx2_i2c_r %02x failed %d", reg, ret);
2393 sd->gspca_dev.usb_err = ret;
2399 static void i2c_w(struct sd *sd, u8 reg, u8 value)
2401 if (sd->sensor_reg_cache[reg] == value)
2404 switch (sd->bridge) {
2406 case BRIDGE_OV511PLUS:
2407 ov511_i2c_w(sd, reg, value);
2410 case BRIDGE_OV518PLUS:
2412 ov518_i2c_w(sd, reg, value);
2415 ovfx2_i2c_w(sd, reg, value);
2417 case BRIDGE_W9968CF:
2418 w9968cf_i2c_w(sd, reg, value);
2422 if (sd->gspca_dev.usb_err >= 0) {
2423 /* Up on sensor reset empty the register cache */
2424 if (reg == 0x12 && (value & 0x80))
2425 memset(sd->sensor_reg_cache, -1,
2426 sizeof(sd->sensor_reg_cache));
2428 sd->sensor_reg_cache[reg] = value;
2432 static int i2c_r(struct sd *sd, u8 reg)
2436 if (sd->sensor_reg_cache[reg] != -1)
2437 return sd->sensor_reg_cache[reg];
2439 switch (sd->bridge) {
2441 case BRIDGE_OV511PLUS:
2442 ret = ov511_i2c_r(sd, reg);
2445 case BRIDGE_OV518PLUS:
2447 ret = ov518_i2c_r(sd, reg);
2450 ret = ovfx2_i2c_r(sd, reg);
2452 case BRIDGE_W9968CF:
2453 ret = w9968cf_i2c_r(sd, reg);
2458 sd->sensor_reg_cache[reg] = ret;
2463 /* Writes bits at positions specified by mask to an I2C reg. Bits that are in
2464 * the same position as 1's in "mask" are cleared and set to "value". Bits
2465 * that are in the same position as 0's in "mask" are preserved, regardless
2466 * of their respective state in "value".
2468 static void i2c_w_mask(struct sd *sd,
2476 value &= mask; /* Enforce mask on value */
2477 rc = i2c_r(sd, reg);
2480 oldval = rc & ~mask; /* Clear the masked bits */
2481 value |= oldval; /* Set the desired bits */
2482 i2c_w(sd, reg, value);
2485 /* Temporarily stops OV511 from functioning. Must do this before changing
2486 * registers while the camera is streaming */
2487 static inline void ov51x_stop(struct sd *sd)
2489 PDEBUG(D_STREAM, "stopping");
2491 switch (sd->bridge) {
2493 case BRIDGE_OV511PLUS:
2494 reg_w(sd, R51x_SYS_RESET, 0x3d);
2497 case BRIDGE_OV518PLUS:
2498 reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
2501 reg_w(sd, OV519_R51_RESET1, 0x0f);
2502 reg_w(sd, OV519_R51_RESET1, 0x00);
2503 reg_w(sd, 0x22, 0x00); /* FRAR */
2506 reg_w_mask(sd, 0x0f, 0x00, 0x02);
2508 case BRIDGE_W9968CF:
2509 reg_w(sd, 0x3c, 0x0a05); /* stop USB transfer */
2514 /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
2515 * actually stopped (for performance). */
2516 static inline void ov51x_restart(struct sd *sd)
2518 PDEBUG(D_STREAM, "restarting");
2523 /* Reinitialize the stream */
2524 switch (sd->bridge) {
2526 case BRIDGE_OV511PLUS:
2527 reg_w(sd, R51x_SYS_RESET, 0x00);
2530 case BRIDGE_OV518PLUS:
2531 reg_w(sd, 0x2f, 0x80);
2532 reg_w(sd, R51x_SYS_RESET, 0x00);
2535 reg_w(sd, OV519_R51_RESET1, 0x0f);
2536 reg_w(sd, OV519_R51_RESET1, 0x00);
2537 reg_w(sd, 0x22, 0x1d); /* FRAR */
2540 reg_w_mask(sd, 0x0f, 0x02, 0x02);
2542 case BRIDGE_W9968CF:
2543 reg_w(sd, 0x3c, 0x8a05); /* USB FIFO enable */
2548 static void ov51x_set_slave_ids(struct sd *sd, u8 slave);
2550 /* This does an initial reset of an OmniVision sensor and ensures that I2C
2551 * is synchronized. Returns <0 on failure.
2553 static int init_ov_sensor(struct sd *sd, u8 slave)
2557 ov51x_set_slave_ids(sd, slave);
2559 /* Reset the sensor */
2560 i2c_w(sd, 0x12, 0x80);
2562 /* Wait for it to initialize */
2565 for (i = 0; i < i2c_detect_tries; i++) {
2566 if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
2567 i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
2568 PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
2572 /* Reset the sensor */
2573 i2c_w(sd, 0x12, 0x80);
2575 /* Wait for it to initialize */
2578 /* Dummy read to sync I2C */
2579 if (i2c_r(sd, 0x00) < 0)
2585 /* Set the read and write slave IDs. The "slave" argument is the write slave,
2586 * and the read slave will be set to (slave + 1).
2587 * This should not be called from outside the i2c I/O functions.
2588 * Sets I2C read and write slave IDs. Returns <0 for error
2590 static void ov51x_set_slave_ids(struct sd *sd,
2593 switch (sd->bridge) {
2595 reg_w(sd, OVFX2_I2C_ADDR, slave);
2597 case BRIDGE_W9968CF:
2598 sd->sensor_addr = slave;
2602 reg_w(sd, R51x_I2C_W_SID, slave);
2603 reg_w(sd, R51x_I2C_R_SID, slave + 1);
2606 static void write_regvals(struct sd *sd,
2607 const struct ov_regvals *regvals,
2611 reg_w(sd, regvals->reg, regvals->val);
2616 static void write_i2c_regvals(struct sd *sd,
2617 const struct ov_i2c_regvals *regvals,
2621 i2c_w(sd, regvals->reg, regvals->val);
2626 /****************************************************************************
2628 * OV511 and sensor configuration
2630 ***************************************************************************/
2632 /* This initializes the OV2x10 / OV3610 / OV3620 */
2633 static void ov_hires_configure(struct sd *sd)
2637 if (sd->bridge != BRIDGE_OVFX2) {
2638 err("error hires sensors only supported with ovfx2");
2642 PDEBUG(D_PROBE, "starting ov hires configuration");
2644 /* Detect sensor (sub)type */
2645 high = i2c_r(sd, 0x0a);
2646 low = i2c_r(sd, 0x0b);
2647 /* info("%x, %x", high, low); */
2648 if (high == 0x96 && low == 0x40) {
2649 PDEBUG(D_PROBE, "Sensor is an OV2610");
2650 sd->sensor = SEN_OV2610;
2651 } else if (high == 0x96 && low == 0x41) {
2652 PDEBUG(D_PROBE, "Sensor is an OV2610AE");
2653 sd->sensor = SEN_OV2610AE;
2654 } else if (high == 0x36 && (low & 0x0f) == 0x00) {
2655 PDEBUG(D_PROBE, "Sensor is an OV3610");
2656 sd->sensor = SEN_OV3610;
2658 err("Error unknown sensor type: %02x%02x",
2663 /* This initializes the OV8110, OV8610 sensor. The OV8110 uses
2664 * the same register settings as the OV8610, since they are very similar.
2666 static void ov8xx0_configure(struct sd *sd)
2670 PDEBUG(D_PROBE, "starting ov8xx0 configuration");
2672 /* Detect sensor (sub)type */
2673 rc = i2c_r(sd, OV7610_REG_COM_I);
2675 PDEBUG(D_ERR, "Error detecting sensor type");
2679 sd->sensor = SEN_OV8610;
2681 err("Unknown image sensor version: %d", rc & 3);
2684 /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
2685 * the same register settings as the OV7610, since they are very similar.
2687 static void ov7xx0_configure(struct sd *sd)
2691 PDEBUG(D_PROBE, "starting OV7xx0 configuration");
2693 /* Detect sensor (sub)type */
2694 rc = i2c_r(sd, OV7610_REG_COM_I);
2697 * it appears to be wrongly detected as a 7610 by default */
2699 PDEBUG(D_ERR, "Error detecting sensor type");
2702 if ((rc & 3) == 3) {
2703 /* quick hack to make OV7670s work */
2704 high = i2c_r(sd, 0x0a);
2705 low = i2c_r(sd, 0x0b);
2706 /* info("%x, %x", high, low); */
2707 if (high == 0x76 && (low & 0xf0) == 0x70) {
2708 PDEBUG(D_PROBE, "Sensor is an OV76%02x", low);
2709 sd->sensor = SEN_OV7670;
2711 PDEBUG(D_PROBE, "Sensor is an OV7610");
2712 sd->sensor = SEN_OV7610;
2714 } else if ((rc & 3) == 1) {
2715 /* I don't know what's different about the 76BE yet. */
2716 if (i2c_r(sd, 0x15) & 1) {
2717 PDEBUG(D_PROBE, "Sensor is an OV7620AE");
2718 sd->sensor = SEN_OV7620AE;
2720 PDEBUG(D_PROBE, "Sensor is an OV76BE");
2721 sd->sensor = SEN_OV76BE;
2723 } else if ((rc & 3) == 0) {
2724 /* try to read product id registers */
2725 high = i2c_r(sd, 0x0a);
2727 PDEBUG(D_ERR, "Error detecting camera chip PID");
2730 low = i2c_r(sd, 0x0b);
2732 PDEBUG(D_ERR, "Error detecting camera chip VER");
2738 err("Sensor is an OV7630/OV7635");
2739 err("7630 is not supported by this driver");
2742 PDEBUG(D_PROBE, "Sensor is an OV7645");
2743 sd->sensor = SEN_OV7640; /* FIXME */
2746 PDEBUG(D_PROBE, "Sensor is an OV7645B");
2747 sd->sensor = SEN_OV7640; /* FIXME */
2750 PDEBUG(D_PROBE, "Sensor is an OV7648");
2751 sd->sensor = SEN_OV7648;
2754 PDEBUG(D_PROBE, "Sensor is a OV7660");
2755 sd->sensor = SEN_OV7660;
2759 PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);
2763 PDEBUG(D_PROBE, "Sensor is an OV7620");
2764 sd->sensor = SEN_OV7620;
2767 err("Unknown image sensor version: %d", rc & 3);
2771 /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
2772 static void ov6xx0_configure(struct sd *sd)
2775 PDEBUG(D_PROBE, "starting OV6xx0 configuration");
2777 /* Detect sensor (sub)type */
2778 rc = i2c_r(sd, OV7610_REG_COM_I);
2780 PDEBUG(D_ERR, "Error detecting sensor type");
2784 /* Ugh. The first two bits are the version bits, but
2785 * the entire register value must be used. I guess OVT
2786 * underestimated how many variants they would make. */
2789 sd->sensor = SEN_OV6630;
2790 warn("WARNING: Sensor is an OV66308. Your camera may have");
2791 warn("been misdetected in previous driver versions.");
2794 sd->sensor = SEN_OV6620;
2795 PDEBUG(D_PROBE, "Sensor is an OV6620");
2798 sd->sensor = SEN_OV6630;
2799 PDEBUG(D_PROBE, "Sensor is an OV66308AE");
2802 sd->sensor = SEN_OV66308AF;
2803 PDEBUG(D_PROBE, "Sensor is an OV66308AF");
2806 sd->sensor = SEN_OV6630;
2807 warn("WARNING: Sensor is an OV66307. Your camera may have");
2808 warn("been misdetected in previous driver versions.");
2811 err("FATAL: Unknown sensor version: 0x%02x", rc);
2815 /* Set sensor-specific vars */
2819 /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
2820 static void ov51x_led_control(struct sd *sd, int on)
2825 switch (sd->bridge) {
2826 /* OV511 has no LED control */
2827 case BRIDGE_OV511PLUS:
2828 reg_w(sd, R511_SYS_LED_CTL, on);
2831 case BRIDGE_OV518PLUS:
2832 reg_w_mask(sd, R518_GPIO_OUT, 0x02 * on, 0x02);
2835 reg_w_mask(sd, OV519_GPIO_DATA_OUT0, on, 1);
2840 static void sd_reset_snapshot(struct gspca_dev *gspca_dev)
2842 struct sd *sd = (struct sd *) gspca_dev;
2844 if (!sd->snapshot_needs_reset)
2847 /* Note it is important that we clear sd->snapshot_needs_reset,
2848 before actually clearing the snapshot state in the bridge
2849 otherwise we might race with the pkt_scan interrupt handler */
2850 sd->snapshot_needs_reset = 0;
2852 switch (sd->bridge) {
2854 case BRIDGE_OV511PLUS:
2855 reg_w(sd, R51x_SYS_SNAP, 0x02);
2856 reg_w(sd, R51x_SYS_SNAP, 0x00);
2859 case BRIDGE_OV518PLUS:
2860 reg_w(sd, R51x_SYS_SNAP, 0x02); /* Reset */
2861 reg_w(sd, R51x_SYS_SNAP, 0x01); /* Enable */
2864 reg_w(sd, R51x_SYS_RESET, 0x40);
2865 reg_w(sd, R51x_SYS_RESET, 0x00);
2870 static void ov51x_upload_quan_tables(struct sd *sd)
2872 const unsigned char yQuanTable511[] = {
2873 0, 1, 1, 2, 2, 3, 3, 4,
2874 1, 1, 1, 2, 2, 3, 4, 4,
2875 1, 1, 2, 2, 3, 4, 4, 4,
2876 2, 2, 2, 3, 4, 4, 4, 4,
2877 2, 2, 3, 4, 4, 5, 5, 5,
2878 3, 3, 4, 4, 5, 5, 5, 5,
2879 3, 4, 4, 4, 5, 5, 5, 5,
2880 4, 4, 4, 4, 5, 5, 5, 5
2883 const unsigned char uvQuanTable511[] = {
2884 0, 2, 2, 3, 4, 4, 4, 4,
2885 2, 2, 2, 4, 4, 4, 4, 4,
2886 2, 2, 3, 4, 4, 4, 4, 4,
2887 3, 4, 4, 4, 4, 4, 4, 4,
2888 4, 4, 4, 4, 4, 4, 4, 4,
2889 4, 4, 4, 4, 4, 4, 4, 4,
2890 4, 4, 4, 4, 4, 4, 4, 4,
2891 4, 4, 4, 4, 4, 4, 4, 4
2894 /* OV518 quantization tables are 8x4 (instead of 8x8) */
2895 const unsigned char yQuanTable518[] = {
2896 5, 4, 5, 6, 6, 7, 7, 7,
2897 5, 5, 5, 5, 6, 7, 7, 7,
2898 6, 6, 6, 6, 7, 7, 7, 8,
2899 7, 7, 6, 7, 7, 7, 8, 8
2901 const unsigned char uvQuanTable518[] = {
2902 6, 6, 6, 7, 7, 7, 7, 7,
2903 6, 6, 6, 7, 7, 7, 7, 7,
2904 6, 6, 6, 7, 7, 7, 7, 8,
2905 7, 7, 7, 7, 7, 7, 8, 8
2908 const unsigned char *pYTable, *pUVTable;
2909 unsigned char val0, val1;
2910 int i, size, reg = R51x_COMP_LUT_BEGIN;
2912 PDEBUG(D_PROBE, "Uploading quantization tables");
2914 if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) {
2915 pYTable = yQuanTable511;
2916 pUVTable = uvQuanTable511;
2919 pYTable = yQuanTable518;
2920 pUVTable = uvQuanTable518;
2924 for (i = 0; i < size; i++) {
2930 reg_w(sd, reg, val0);
2937 reg_w(sd, reg + size, val0);
2943 /* This initializes the OV511/OV511+ and the sensor */
2944 static void ov511_configure(struct gspca_dev *gspca_dev)
2946 struct sd *sd = (struct sd *) gspca_dev;
2948 /* For 511 and 511+ */
2949 const struct ov_regvals init_511[] = {
2950 { R51x_SYS_RESET, 0x7f },
2951 { R51x_SYS_INIT, 0x01 },
2952 { R51x_SYS_RESET, 0x7f },
2953 { R51x_SYS_INIT, 0x01 },
2954 { R51x_SYS_RESET, 0x3f },
2955 { R51x_SYS_INIT, 0x01 },
2956 { R51x_SYS_RESET, 0x3d },
2959 const struct ov_regvals norm_511[] = {
2960 { R511_DRAM_FLOW_CTL, 0x01 },
2961 { R51x_SYS_SNAP, 0x00 },
2962 { R51x_SYS_SNAP, 0x02 },
2963 { R51x_SYS_SNAP, 0x00 },
2964 { R511_FIFO_OPTS, 0x1f },
2965 { R511_COMP_EN, 0x00 },
2966 { R511_COMP_LUT_EN, 0x03 },
2969 const struct ov_regvals norm_511_p[] = {
2970 { R511_DRAM_FLOW_CTL, 0xff },
2971 { R51x_SYS_SNAP, 0x00 },
2972 { R51x_SYS_SNAP, 0x02 },
2973 { R51x_SYS_SNAP, 0x00 },
2974 { R511_FIFO_OPTS, 0xff },
2975 { R511_COMP_EN, 0x00 },
2976 { R511_COMP_LUT_EN, 0x03 },
2979 const struct ov_regvals compress_511[] = {
2990 PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID));
2992 write_regvals(sd, init_511, ARRAY_SIZE(init_511));
2994 switch (sd->bridge) {
2996 write_regvals(sd, norm_511, ARRAY_SIZE(norm_511));
2998 case BRIDGE_OV511PLUS:
2999 write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p));
3003 /* Init compression */
3004 write_regvals(sd, compress_511, ARRAY_SIZE(compress_511));
3006 ov51x_upload_quan_tables(sd);
3009 /* This initializes the OV518/OV518+ and the sensor */
3010 static void ov518_configure(struct gspca_dev *gspca_dev)
3012 struct sd *sd = (struct sd *) gspca_dev;
3014 /* For 518 and 518+ */
3015 const struct ov_regvals init_518[] = {
3016 { R51x_SYS_RESET, 0x40 },
3017 { R51x_SYS_INIT, 0xe1 },
3018 { R51x_SYS_RESET, 0x3e },
3019 { R51x_SYS_INIT, 0xe1 },
3020 { R51x_SYS_RESET, 0x00 },
3021 { R51x_SYS_INIT, 0xe1 },
3026 const struct ov_regvals norm_518[] = {
3027 { R51x_SYS_SNAP, 0x02 }, /* Reset */
3028 { R51x_SYS_SNAP, 0x01 }, /* Enable */
3039 const struct ov_regvals norm_518_p[] = {
3040 { R51x_SYS_SNAP, 0x02 }, /* Reset */
3041 { R51x_SYS_SNAP, 0x01 }, /* Enable */
3058 /* First 5 bits of custom ID reg are a revision ID on OV518 */
3059 PDEBUG(D_PROBE, "Device revision %d",
3060 0x1f & reg_r(sd, R51x_SYS_CUST_ID));
3062 write_regvals(sd, init_518, ARRAY_SIZE(init_518));
3064 /* Set LED GPIO pin to output mode */
3065 reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
3067 switch (sd->bridge) {
3069 write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
3071 case BRIDGE_OV518PLUS:
3072 write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
3076 ov51x_upload_quan_tables(sd);
3078 reg_w(sd, 0x2f, 0x80);
3081 static void ov519_configure(struct sd *sd)
3083 static const struct ov_regvals init_519[] = {
3084 { 0x5a, 0x6d }, /* EnableSystem */
3085 { 0x53, 0x9b }, /* don't enable the microcontroller */
3086 { OV519_R54_EN_CLK1, 0xff }, /* set bit2 to enable jpeg */
3090 /* Set LED pin to output mode. Bit 4 must be cleared or sensor
3091 * detection will fail. This deserves further investigation. */
3092 { OV519_GPIO_IO_CTRL0, 0xee },
3093 { OV519_R51_RESET1, 0x0f },
3094 { OV519_R51_RESET1, 0x00 },
3096 /* windows reads 0x55 at this point*/
3099 write_regvals(sd, init_519, ARRAY_SIZE(init_519));
3102 static void ovfx2_configure(struct sd *sd)
3104 static const struct ov_regvals init_fx2[] = {
3116 write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2));
3120 /* This function works for ov7660 only */
3121 static void ov519_set_mode(struct sd *sd)
3123 static const struct ov_regvals bridge_ov7660[2][10] = {
3124 {{0x10, 0x14}, {0x11, 0x1e}, {0x12, 0x00}, {0x13, 0x00},
3125 {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
3126 {0x25, 0x01}, {0x26, 0x00}},
3127 {{0x10, 0x28}, {0x11, 0x3c}, {0x12, 0x00}, {0x13, 0x00},
3128 {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
3129 {0x25, 0x03}, {0x26, 0x00}}
3131 static const struct ov_i2c_regvals sensor_ov7660[2][3] = {
3132 {{0x12, 0x00}, {0x24, 0x00}, {0x0c, 0x0c}},
3133 {{0x12, 0x00}, {0x04, 0x00}, {0x0c, 0x00}}
3135 static const struct ov_i2c_regvals sensor_ov7660_2[] = {
3136 {OV7670_R17_HSTART, 0x13},
3137 {OV7670_R18_HSTOP, 0x01},
3138 {OV7670_R32_HREF, 0x92},
3139 {OV7670_R19_VSTART, 0x02},
3140 {OV7670_R1A_VSTOP, 0x7a},
3141 {OV7670_R03_VREF, 0x00},
3148 write_regvals(sd, bridge_ov7660[sd->gspca_dev.curr_mode],
3149 ARRAY_SIZE(bridge_ov7660[0]));
3150 write_i2c_regvals(sd, sensor_ov7660[sd->gspca_dev.curr_mode],
3151 ARRAY_SIZE(sensor_ov7660[0]));
3152 write_i2c_regvals(sd, sensor_ov7660_2,
3153 ARRAY_SIZE(sensor_ov7660_2));
3156 /* set the frame rate */
3157 /* This function works for sensors ov7640, ov7648 ov7660 and ov7670 only */
3158 static void ov519_set_fr(struct sd *sd)
3162 /* frame rate table with indices:
3163 * - mode = 0: 320x240, 1: 640x480
3164 * - fr rate = 0: 30, 1: 25, 2: 20, 3: 15, 4: 10, 5: 5
3165 * - reg = 0: bridge a4, 1: bridge 23, 2: sensor 11 (clock)
3167 static const u8 fr_tb[2][6][3] = {
3168 {{0x04, 0xff, 0x00},
3173 {0x04, 0x01, 0x00}},
3174 {{0x0c, 0xff, 0x00},
3179 {0x04, 0x1b, 0x01}},
3183 sd->frame_rate = frame_rate;
3184 if (sd->frame_rate >= 30)
3186 else if (sd->frame_rate >= 25)
3188 else if (sd->frame_rate >= 20)
3190 else if (sd->frame_rate >= 15)
3192 else if (sd->frame_rate >= 10)
3196 reg_w(sd, 0xa4, fr_tb[sd->gspca_dev.curr_mode][fr][0]);
3197 reg_w(sd, 0x23, fr_tb[sd->gspca_dev.curr_mode][fr][1]);
3198 clock = fr_tb[sd->gspca_dev.curr_mode][fr][2];
3199 if (sd->sensor == SEN_OV7660)
3200 clock |= 0x80; /* enable double clock */
3201 ov518_i2c_w(sd, OV7670_R11_CLKRC, clock);
3204 /* this function is called at probe time */
3205 static int sd_config(struct gspca_dev *gspca_dev,
3206 const struct usb_device_id *id)
3208 struct sd *sd = (struct sd *) gspca_dev;
3209 struct cam *cam = &gspca_dev->cam;
3211 sd->bridge = id->driver_info & BRIDGE_MASK;
3212 sd->invert_led = (id->driver_info & BRIDGE_INVERT_LED) != 0;
3214 switch (sd->bridge) {
3216 case BRIDGE_OV511PLUS:
3217 cam->cam_mode = ov511_vga_mode;
3218 cam->nmodes = ARRAY_SIZE(ov511_vga_mode);
3221 case BRIDGE_OV518PLUS:
3222 cam->cam_mode = ov518_vga_mode;
3223 cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
3226 cam->cam_mode = ov519_vga_mode;
3227 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3228 sd->invert_led = !sd->invert_led;
3231 cam->cam_mode = ov519_vga_mode;
3232 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3233 cam->bulk_size = OVFX2_BULK_SIZE;
3234 cam->bulk_nurbs = MAX_NURBS;
3237 case BRIDGE_W9968CF:
3238 cam->cam_mode = w9968cf_vga_mode;
3239 cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode);
3240 cam->reverse_alts = 1;
3244 gspca_dev->cam.ctrls = sd->ctrls;
3245 sd->quality = QUALITY_DEF;
3250 /* this function is called at probe and resume time */
3251 static int sd_init(struct gspca_dev *gspca_dev)
3253 struct sd *sd = (struct sd *) gspca_dev;
3254 struct cam *cam = &gspca_dev->cam;
3256 switch (sd->bridge) {
3258 case BRIDGE_OV511PLUS:
3259 ov511_configure(gspca_dev);
3262 case BRIDGE_OV518PLUS:
3263 ov518_configure(gspca_dev);
3266 ov519_configure(sd);
3269 ovfx2_configure(sd);
3271 case BRIDGE_W9968CF:
3272 w9968cf_configure(sd);
3276 /* The OV519 must be more aggressive about sensor detection since
3277 * I2C write will never fail if the sensor is not present. We have
3278 * to try to initialize the sensor to detect its presence */
3282 if (init_ov_sensor(sd, OV7xx0_SID) >= 0) {
3283 ov7xx0_configure(sd);
3286 } else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) {
3287 ov6xx0_configure(sd);
3290 } else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) {
3291 ov8xx0_configure(sd);
3293 /* Test for 3xxx / 2xxx */
3294 } else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) {
3295 ov_hires_configure(sd);
3297 err("Can't determine sensor slave IDs");
3304 ov51x_led_control(sd, 0); /* turn LED off */
3306 switch (sd->bridge) {
3308 case BRIDGE_OV511PLUS:
3310 cam->cam_mode = ov511_sif_mode;
3311 cam->nmodes = ARRAY_SIZE(ov511_sif_mode);
3315 case BRIDGE_OV518PLUS:
3317 cam->cam_mode = ov518_sif_mode;
3318 cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
3323 cam->cam_mode = ov519_sif_mode;
3324 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3328 switch (sd->sensor) {
3331 cam->cam_mode = ovfx2_ov2610_mode;
3332 cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode);
3335 cam->cam_mode = ovfx2_ov3610_mode;
3336 cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode);
3340 cam->cam_mode = ov519_sif_mode;
3341 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3346 case BRIDGE_W9968CF:
3348 cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode) - 1;
3350 /* w9968cf needs initialisation once the sensor is known */
3355 gspca_dev->ctrl_dis = ctrl_dis[sd->sensor];
3357 /* initialize the sensor */
3358 switch (sd->sensor) {
3360 write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610));
3362 /* Enable autogain, autoexpo, awb, bandfilter */
3363 i2c_w_mask(sd, 0x13, 0x27, 0x27);
3366 write_i2c_regvals(sd, norm_2610ae, ARRAY_SIZE(norm_2610ae));
3368 /* enable autoexpo */
3369 i2c_w_mask(sd, 0x13, 0x05, 0x05);
3372 write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b));
3374 /* Enable autogain, autoexpo, awb, bandfilter */
3375 i2c_w_mask(sd, 0x13, 0x27, 0x27);
3378 write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20));
3382 sd->ctrls[CONTRAST].def = 200;
3383 /* The default is too low for the ov6630 */
3384 write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30));
3387 /* case SEN_OV7610: */
3388 /* case SEN_OV76BE: */
3389 write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610));
3390 i2c_w_mask(sd, 0x0e, 0x00, 0x40);
3394 write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620));
3398 write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640));
3401 i2c_w(sd, OV7670_R12_COM7, OV7670_COM7_RESET);
3403 reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
3404 write_regvals(sd, init_519_ov7660,
3405 ARRAY_SIZE(init_519_ov7660));
3406 write_i2c_regvals(sd, norm_7660, ARRAY_SIZE(norm_7660));
3407 sd->gspca_dev.curr_mode = 1; /* 640x480 */
3408 sd->frame_rate = 15;
3411 sd->ctrls[COLORS].max = 4; /* 0..4 */
3412 sd->ctrls[COLORS].val =
3413 sd->ctrls[COLORS].def = 2;
3414 setcolors(gspca_dev);
3415 sd->ctrls[CONTRAST].max = 6; /* 0..6 */
3416 sd->ctrls[CONTRAST].val =
3417 sd->ctrls[CONTRAST].def = 3;
3418 setcontrast(gspca_dev);
3419 sd->ctrls[BRIGHTNESS].max = 6; /* 0..6 */
3420 sd->ctrls[BRIGHTNESS].val =
3421 sd->ctrls[BRIGHTNESS].def = 3;
3422 setbrightness(gspca_dev);
3423 sd_reset_snapshot(gspca_dev);
3425 ov51x_stop(sd); /* not in win traces */
3426 ov51x_led_control(sd, 0);
3429 sd->ctrls[FREQ].max = 3; /* auto */
3430 sd->ctrls[FREQ].def = 3;
3431 write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670));
3434 write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610));
3437 return gspca_dev->usb_err;
3439 PDEBUG(D_ERR, "OV519 Config failed");
3443 /* function called at start time before URB creation */
3444 static int sd_isoc_init(struct gspca_dev *gspca_dev)
3446 struct sd *sd = (struct sd *) gspca_dev;
3448 switch (sd->bridge) {
3450 if (gspca_dev->width == 1600)
3451 gspca_dev->cam.bulk_size = OVFX2_BULK_SIZE;
3453 gspca_dev->cam.bulk_size = 7 * 4096;
3459 /* Set up the OV511/OV511+ with the given image parameters.
3461 * Do not put any sensor-specific code in here (including I2C I/O functions)
3463 static void ov511_mode_init_regs(struct sd *sd)
3465 int hsegs, vsegs, packet_size, fps, needed;
3467 struct usb_host_interface *alt;
3468 struct usb_interface *intf;
3470 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3471 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3473 err("Couldn't get altsetting");
3474 sd->gspca_dev.usb_err = -EIO;
3478 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3479 reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5);
3481 reg_w(sd, R511_CAM_UV_EN, 0x01);
3482 reg_w(sd, R511_SNAP_UV_EN, 0x01);
3483 reg_w(sd, R511_SNAP_OPTS, 0x03);
3485 /* Here I'm assuming that snapshot size == image size.
3486 * I hope that's always true. --claudio
3488 hsegs = (sd->gspca_dev.width >> 3) - 1;
3489 vsegs = (sd->gspca_dev.height >> 3) - 1;
3491 reg_w(sd, R511_CAM_PXCNT, hsegs);
3492 reg_w(sd, R511_CAM_LNCNT, vsegs);
3493 reg_w(sd, R511_CAM_PXDIV, 0x00);
3494 reg_w(sd, R511_CAM_LNDIV, 0x00);
3496 /* YUV420, low pass filter on */
3497 reg_w(sd, R511_CAM_OPTS, 0x03);
3499 /* Snapshot additions */
3500 reg_w(sd, R511_SNAP_PXCNT, hsegs);
3501 reg_w(sd, R511_SNAP_LNCNT, vsegs);
3502 reg_w(sd, R511_SNAP_PXDIV, 0x00);
3503 reg_w(sd, R511_SNAP_LNDIV, 0x00);
3505 /******** Set the framerate ********/
3507 sd->frame_rate = frame_rate;
3509 switch (sd->sensor) {
3511 /* No framerate control, doesn't like higher rates yet */
3515 /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
3516 for more sensors we need to do this for them too */
3522 if (sd->gspca_dev.width == 320)
3528 switch (sd->frame_rate) {
3531 /* Not enough bandwidth to do 640x480 @ 30 fps */
3532 if (sd->gspca_dev.width != 640) {
3536 /* Fall through for 640x480 case */
3550 sd->clockdiv = (sd->clockdiv + 1) * 2 - 1;
3551 /* Higher then 10 does not work */
3552 if (sd->clockdiv > 10)
3558 /* No framerate control ?? */
3563 /* Check if we have enough bandwidth to disable compression */
3564 fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
3565 needed = fps * sd->gspca_dev.width * sd->gspca_dev.height * 3 / 2;
3566 /* 1400 is a conservative estimate of the max nr of isoc packets/sec */
3567 if (needed > 1400 * packet_size) {
3568 /* Enable Y and UV quantization and compression */
3569 reg_w(sd, R511_COMP_EN, 0x07);
3570 reg_w(sd, R511_COMP_LUT_EN, 0x03);
3572 reg_w(sd, R511_COMP_EN, 0x06);
3573 reg_w(sd, R511_COMP_LUT_EN, 0x00);
3576 reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE);
3577 reg_w(sd, R51x_SYS_RESET, 0);
3580 /* Sets up the OV518/OV518+ with the given image parameters
3582 * OV518 needs a completely different approach, until we can figure out what
3583 * the individual registers do. Also, only 15 FPS is supported now.
3585 * Do not put any sensor-specific code in here (including I2C I/O functions)
3587 static void ov518_mode_init_regs(struct sd *sd)
3589 int hsegs, vsegs, packet_size;
3590 struct usb_host_interface *alt;
3591 struct usb_interface *intf;
3593 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3594 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3596 err("Couldn't get altsetting");
3597 sd->gspca_dev.usb_err = -EIO;
3601 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3602 ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2);
3604 /******** Set the mode ********/
3614 if (sd->bridge == BRIDGE_OV518) {
3615 /* Set 8-bit (YVYU) input format */
3616 reg_w_mask(sd, 0x20, 0x08, 0x08);
3618 /* Set 12-bit (4:2:0) output format */
3619 reg_w_mask(sd, 0x28, 0x80, 0xf0);
3620 reg_w_mask(sd, 0x38, 0x80, 0xf0);
3622 reg_w(sd, 0x28, 0x80);
3623 reg_w(sd, 0x38, 0x80);
3626 hsegs = sd->gspca_dev.width / 16;
3627 vsegs = sd->gspca_dev.height / 4;
3629 reg_w(sd, 0x29, hsegs);
3630 reg_w(sd, 0x2a, vsegs);
3632 reg_w(sd, 0x39, hsegs);
3633 reg_w(sd, 0x3a, vsegs);
3635 /* Windows driver does this here; who knows why */
3636 reg_w(sd, 0x2f, 0x80);
3638 /******** Set the framerate ********/
3641 /* Mode independent, but framerate dependent, regs */
3642 /* 0x51: Clock divider; Only works on some cams which use 2 crystals */
3643 reg_w(sd, 0x51, 0x04);
3644 reg_w(sd, 0x22, 0x18);
3645 reg_w(sd, 0x23, 0xff);
3647 if (sd->bridge == BRIDGE_OV518PLUS) {
3648 switch (sd->sensor) {
3650 if (sd->gspca_dev.width == 320) {
3651 reg_w(sd, 0x20, 0x00);
3652 reg_w(sd, 0x21, 0x19);
3654 reg_w(sd, 0x20, 0x60);
3655 reg_w(sd, 0x21, 0x1f);
3659 reg_w(sd, 0x20, 0x00);
3660 reg_w(sd, 0x21, 0x19);
3663 reg_w(sd, 0x21, 0x19);
3666 reg_w(sd, 0x71, 0x17); /* Compression-related? */
3668 /* FIXME: Sensor-specific */
3669 /* Bit 5 is what matters here. Of course, it is "reserved" */
3670 i2c_w(sd, 0x54, 0x23);
3672 reg_w(sd, 0x2f, 0x80);
3674 if (sd->bridge == BRIDGE_OV518PLUS) {
3675 reg_w(sd, 0x24, 0x94);
3676 reg_w(sd, 0x25, 0x90);
3677 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3678 ov518_reg_w32(sd, 0xc6, 540, 2); /* 21ch */
3679 ov518_reg_w32(sd, 0xc7, 540, 2); /* 21ch */
3680 ov518_reg_w32(sd, 0xc8, 108, 2); /* 6ch */
3681 ov518_reg_w32(sd, 0xca, 131098, 3); /* 2001ah */
3682 ov518_reg_w32(sd, 0xcb, 532, 2); /* 214h */
3683 ov518_reg_w32(sd, 0xcc, 2400, 2); /* 960h */
3684 ov518_reg_w32(sd, 0xcd, 32, 2); /* 20h */
3685 ov518_reg_w32(sd, 0xce, 608, 2); /* 260h */
3687 reg_w(sd, 0x24, 0x9f);
3688 reg_w(sd, 0x25, 0x90);
3689 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3690 ov518_reg_w32(sd, 0xc6, 381, 2); /* 17dh */
3691 ov518_reg_w32(sd, 0xc7, 381, 2); /* 17dh */
3692 ov518_reg_w32(sd, 0xc8, 128, 2); /* 80h */
3693 ov518_reg_w32(sd, 0xca, 183331, 3); /* 2cc23h */
3694 ov518_reg_w32(sd, 0xcb, 746, 2); /* 2eah */
3695 ov518_reg_w32(sd, 0xcc, 1750, 2); /* 6d6h */
3696 ov518_reg_w32(sd, 0xcd, 45, 2); /* 2dh */
3697 ov518_reg_w32(sd, 0xce, 851, 2); /* 353h */
3700 reg_w(sd, 0x2f, 0x80);
3703 /* Sets up the OV519 with the given image parameters
3705 * OV519 needs a completely different approach, until we can figure out what
3706 * the individual registers do.
3708 * Do not put any sensor-specific code in here (including I2C I/O functions)
3710 static void ov519_mode_init_regs(struct sd *sd)
3712 static const struct ov_regvals mode_init_519_ov7670[] = {
3713 { 0x5d, 0x03 }, /* Turn off suspend mode */
3714 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3715 { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3716 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3720 { 0x37, 0x00 }, /* SetUsbInit */
3721 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3722 /* Enable both fields, YUV Input, disable defect comp (why?) */
3726 { 0x17, 0x50 }, /* undocumented */
3727 { 0x37, 0x00 }, /* undocumented */
3728 { 0x40, 0xff }, /* I2C timeout counter */
3729 { 0x46, 0x00 }, /* I2C clock prescaler */
3730 { 0x59, 0x04 }, /* new from windrv 090403 */
3731 { 0xff, 0x00 }, /* undocumented */
3732 /* windows reads 0x55 at this point, why? */
3735 static const struct ov_regvals mode_init_519[] = {
3736 { 0x5d, 0x03 }, /* Turn off suspend mode */
3737 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3738 { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3739 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3743 { 0x37, 0x00 }, /* SetUsbInit */
3744 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3745 /* Enable both fields, YUV Input, disable defect comp (why?) */
3747 { 0x17, 0x50 }, /* undocumented */
3748 { 0x37, 0x00 }, /* undocumented */
3749 { 0x40, 0xff }, /* I2C timeout counter */
3750 { 0x46, 0x00 }, /* I2C clock prescaler */
3751 { 0x59, 0x04 }, /* new from windrv 090403 */
3752 { 0xff, 0x00 }, /* undocumented */
3753 /* windows reads 0x55 at this point, why? */
3756 /******** Set the mode ********/
3757 switch (sd->sensor) {
3759 write_regvals(sd, mode_init_519, ARRAY_SIZE(mode_init_519));
3760 if (sd->sensor == SEN_OV7640 ||
3761 sd->sensor == SEN_OV7648) {
3762 /* Select 8-bit input mode */
3763 reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
3767 return; /* done by ov519_set_mode/fr() */
3769 write_regvals(sd, mode_init_519_ov7670,
3770 ARRAY_SIZE(mode_init_519_ov7670));
3774 reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.width >> 4);
3775 reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.height >> 3);
3776 if (sd->sensor == SEN_OV7670 &&
3777 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3778 reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
3779 else if (sd->sensor == SEN_OV7648 &&
3780 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3781 reg_w(sd, OV519_R12_X_OFFSETL, 0x01);
3783 reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
3784 reg_w(sd, OV519_R13_X_OFFSETH, 0x00);
3785 reg_w(sd, OV519_R14_Y_OFFSETL, 0x00);
3786 reg_w(sd, OV519_R15_Y_OFFSETH, 0x00);
3787 reg_w(sd, OV519_R16_DIVIDER, 0x00);
3788 reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */
3789 reg_w(sd, 0x26, 0x00); /* Undocumented */
3791 /******** Set the framerate ********/
3793 sd->frame_rate = frame_rate;
3795 /* FIXME: These are only valid at the max resolution. */
3797 switch (sd->sensor) {
3800 switch (sd->frame_rate) {
3803 reg_w(sd, 0xa4, 0x0c);
3804 reg_w(sd, 0x23, 0xff);
3807 reg_w(sd, 0xa4, 0x0c);
3808 reg_w(sd, 0x23, 0x1f);
3811 reg_w(sd, 0xa4, 0x0c);
3812 reg_w(sd, 0x23, 0x1b);
3815 reg_w(sd, 0xa4, 0x04);
3816 reg_w(sd, 0x23, 0xff);
3820 reg_w(sd, 0xa4, 0x04);
3821 reg_w(sd, 0x23, 0x1f);
3825 reg_w(sd, 0xa4, 0x04);
3826 reg_w(sd, 0x23, 0x1b);
3832 switch (sd->frame_rate) {
3833 default: /* 15 fps */
3835 reg_w(sd, 0xa4, 0x06);
3836 reg_w(sd, 0x23, 0xff);
3839 reg_w(sd, 0xa4, 0x06);
3840 reg_w(sd, 0x23, 0x1f);
3843 reg_w(sd, 0xa4, 0x06);
3844 reg_w(sd, 0x23, 0x1b);
3848 case SEN_OV7670: /* guesses, based on 7640 */
3849 PDEBUG(D_STREAM, "Setting framerate to %d fps",
3850 (sd->frame_rate == 0) ? 15 : sd->frame_rate);
3851 reg_w(sd, 0xa4, 0x10);
3852 switch (sd->frame_rate) {
3854 reg_w(sd, 0x23, 0xff);
3857 reg_w(sd, 0x23, 0x1b);
3861 reg_w(sd, 0x23, 0xff);
3869 static void mode_init_ov_sensor_regs(struct sd *sd)
3871 struct gspca_dev *gspca_dev;
3872 int qvga, xstart, xend, ystart, yend;
3875 gspca_dev = &sd->gspca_dev;
3876 qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
3878 /******** Mode (VGA/QVGA) and sensor specific regs ********/
3879 switch (sd->sensor) {
3881 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3882 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3883 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3884 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3885 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3886 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3887 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3889 case SEN_OV2610AE: {
3893 * 10fps / 5 fps for 1600x1200
3894 * 40fps / 20fps for 800x600
3898 if (sd->frame_rate < 25)
3901 if (sd->frame_rate < 10)
3905 i2c_w(sd, 0x12, qvga ? 0x60 : 0x20);
3910 xstart = (1040 - gspca_dev->width) / 2 + (0x1f << 4);
3911 ystart = (776 - gspca_dev->height) / 2;
3913 xstart = (2076 - gspca_dev->width) / 2 + (0x10 << 4);
3914 ystart = (1544 - gspca_dev->height) / 2;
3916 xend = xstart + gspca_dev->width;
3917 yend = ystart + gspca_dev->height;
3918 /* Writing to the COMH register resets the other windowing regs
3919 to their default values, so we must do this first. */
3920 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0);
3921 i2c_w_mask(sd, 0x32,
3922 (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7),
3924 i2c_w_mask(sd, 0x03,
3925 (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3),
3927 i2c_w(sd, 0x17, xstart >> 4);
3928 i2c_w(sd, 0x18, xend >> 4);
3929 i2c_w(sd, 0x19, ystart >> 3);
3930 i2c_w(sd, 0x1a, yend >> 3);
3933 /* For OV8610 qvga means qsvga */
3934 i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
3935 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3936 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3937 i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */
3938 i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */
3941 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3942 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
3943 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3944 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3949 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3950 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3951 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3952 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3953 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3954 i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
3955 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3956 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3957 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3958 if (sd->sensor == SEN_OV76BE)
3959 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
3963 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3964 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3965 /* Setting this undocumented bit in qvga mode removes a very
3966 annoying vertical shaking of the image */
3967 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3969 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3970 /* Allow higher automatic gain (to allow higher framerates) */
3971 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3972 i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
3975 /* set COM7_FMT_VGA or COM7_FMT_QVGA
3976 * do we need to set anything else?
3977 * HSTART etc are set in set_ov_sensor_window itself */
3978 i2c_w_mask(sd, OV7670_R12_COM7,
3979 qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
3980 OV7670_COM7_FMT_MASK);
3981 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3982 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_AWB,
3984 if (qvga) { /* QVGA from ov7670.c by
3985 * Jonathan Corbet */
3996 /* OV7670 hardware window registers are split across
3997 * multiple locations */
3998 i2c_w(sd, OV7670_R17_HSTART, xstart >> 3);
3999 i2c_w(sd, OV7670_R18_HSTOP, xend >> 3);
4000 v = i2c_r(sd, OV7670_R32_HREF);
4001 v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07);
4002 msleep(10); /* need to sleep between read and write to
4004 i2c_w(sd, OV7670_R32_HREF, v);
4006 i2c_w(sd, OV7670_R19_VSTART, ystart >> 2);
4007 i2c_w(sd, OV7670_R1A_VSTOP, yend >> 2);
4008 v = i2c_r(sd, OV7670_R03_VREF);
4009 v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03);
4010 msleep(10); /* need to sleep between read and write to
4012 i2c_w(sd, OV7670_R03_VREF, v);
4015 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4016 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4017 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4021 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4022 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4028 /******** Clock programming ********/
4029 i2c_w(sd, 0x11, sd->clockdiv);
4032 /* this function works for bridge ov519 and sensors ov7660 and ov7670 only */
4033 static void sethvflip(struct gspca_dev *gspca_dev)
4035 struct sd *sd = (struct sd *) gspca_dev;
4037 if (sd->gspca_dev.streaming)
4038 reg_w(sd, OV519_R51_RESET1, 0x0f); /* block stream */
4039 i2c_w_mask(sd, OV7670_R1E_MVFP,
4040 OV7670_MVFP_MIRROR * sd->ctrls[HFLIP].val
4041 | OV7670_MVFP_VFLIP * sd->ctrls[VFLIP].val,
4042 OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
4043 if (sd->gspca_dev.streaming)
4044 reg_w(sd, OV519_R51_RESET1, 0x00); /* restart stream */
4047 static void set_ov_sensor_window(struct sd *sd)
4049 struct gspca_dev *gspca_dev;
4051 int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
4053 /* mode setup is fully handled in mode_init_ov_sensor_regs for these */
4054 switch (sd->sensor) {
4059 mode_init_ov_sensor_regs(sd);
4067 gspca_dev = &sd->gspca_dev;
4068 qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
4069 crop = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 2;
4071 /* The different sensor ICs handle setting up of window differently.
4072 * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
4073 switch (sd->sensor) {
4084 vwsbase = vwebase = 0x05;
4093 if (sd->sensor == SEN_OV66308AF && qvga)
4094 /* HDG: this fixes U and V getting swapped */
4105 hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */
4107 vwsbase = vwebase = 0x05;
4113 vwsbase = vwebase = 0x03;
4119 switch (sd->sensor) {
4123 if (qvga) { /* QCIF */
4128 vwscale = 1; /* The datasheet says 0;
4133 if (qvga) { /* QSVGA */
4141 default: /* SEN_OV7xx0 */
4142 if (qvga) { /* QVGA */
4151 mode_init_ov_sensor_regs(sd);
4153 i2c_w(sd, 0x17, hwsbase);
4154 i2c_w(sd, 0x18, hwebase + (sd->sensor_width >> hwscale));
4155 i2c_w(sd, 0x19, vwsbase);
4156 i2c_w(sd, 0x1a, vwebase + (sd->sensor_height >> vwscale));
4159 /* -- start the camera -- */
4160 static int sd_start(struct gspca_dev *gspca_dev)
4162 struct sd *sd = (struct sd *) gspca_dev;
4164 /* Default for most bridges, allow bridge_mode_init_regs to override */
4165 sd->sensor_width = sd->gspca_dev.width;
4166 sd->sensor_height = sd->gspca_dev.height;
4168 switch (sd->bridge) {
4170 case BRIDGE_OV511PLUS:
4171 ov511_mode_init_regs(sd);
4174 case BRIDGE_OV518PLUS:
4175 ov518_mode_init_regs(sd);
4178 ov519_mode_init_regs(sd);
4180 /* case BRIDGE_OVFX2: nothing to do */
4181 case BRIDGE_W9968CF:
4182 w9968cf_mode_init_regs(sd);
4186 set_ov_sensor_window(sd);
4188 if (!(sd->gspca_dev.ctrl_dis & (1 << CONTRAST)))
4189 setcontrast(gspca_dev);
4190 if (!(sd->gspca_dev.ctrl_dis & (1 << BRIGHTNESS)))
4191 setbrightness(gspca_dev);
4192 if (!(sd->gspca_dev.ctrl_dis & (1 << COLORS)))
4193 setcolors(gspca_dev);
4194 if (!(sd->gspca_dev.ctrl_dis & ((1 << HFLIP) | (1 << VFLIP))))
4195 sethvflip(gspca_dev);
4196 if (!(sd->gspca_dev.ctrl_dis & (1 << AUTOBRIGHT)))
4197 setautobright(gspca_dev);
4198 if (!(sd->gspca_dev.ctrl_dis & (1 << FREQ)))
4201 /* Force clear snapshot state in case the snapshot button was
4202 pressed while we weren't streaming */
4203 sd->snapshot_needs_reset = 1;
4204 sd_reset_snapshot(gspca_dev);
4206 sd->first_frame = 3;
4209 ov51x_led_control(sd, 1);
4210 return gspca_dev->usb_err;
4213 static void sd_stopN(struct gspca_dev *gspca_dev)
4215 struct sd *sd = (struct sd *) gspca_dev;
4218 ov51x_led_control(sd, 0);
4221 static void sd_stop0(struct gspca_dev *gspca_dev)
4223 struct sd *sd = (struct sd *) gspca_dev;
4225 if (!sd->gspca_dev.present)
4227 if (sd->bridge == BRIDGE_W9968CF)
4230 #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
4231 /* If the last button state is pressed, release it now! */
4232 if (sd->snapshot_pressed) {
4233 input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
4234 input_sync(gspca_dev->input_dev);
4235 sd->snapshot_pressed = 0;
4238 if (sd->bridge == BRIDGE_OV519)
4239 reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
4242 static void ov51x_handle_button(struct gspca_dev *gspca_dev, u8 state)
4244 struct sd *sd = (struct sd *) gspca_dev;
4246 if (sd->snapshot_pressed != state) {
4247 #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
4248 input_report_key(gspca_dev->input_dev, KEY_CAMERA, state);
4249 input_sync(gspca_dev->input_dev);
4252 sd->snapshot_needs_reset = 1;
4254 sd->snapshot_pressed = state;
4256 /* On the ov511 / ov519 we need to reset the button state
4257 multiple times, as resetting does not work as long as the
4258 button stays pressed */
4259 switch (sd->bridge) {
4261 case BRIDGE_OV511PLUS:
4264 sd->snapshot_needs_reset = 1;
4270 static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
4271 u8 *in, /* isoc packet */
4272 int len) /* iso packet length */
4274 struct sd *sd = (struct sd *) gspca_dev;
4276 /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th
4277 * byte non-zero. The EOF packet has image width/height in the
4278 * 10th and 11th bytes. The 9th byte is given as follows:
4281 * 6: compression enabled
4282 * 5: 422/420/400 modes
4283 * 4: 422/420/400 modes
4285 * 2: snapshot button on
4289 if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
4291 ov51x_handle_button(gspca_dev, (in[8] >> 2) & 1);
4294 if ((in[9] + 1) * 8 != gspca_dev->width ||
4295 (in[10] + 1) * 8 != gspca_dev->height) {
4296 PDEBUG(D_ERR, "Invalid frame size, got: %dx%d,"
4297 " requested: %dx%d\n",
4298 (in[9] + 1) * 8, (in[10] + 1) * 8,
4299 gspca_dev->width, gspca_dev->height);
4300 gspca_dev->last_packet_type = DISCARD_PACKET;
4303 /* Add 11 byte footer to frame, might be usefull */
4304 gspca_frame_add(gspca_dev, LAST_PACKET, in, 11);
4308 gspca_frame_add(gspca_dev, FIRST_PACKET, in, 0);
4313 /* Ignore the packet number */
4316 /* intermediate packet */
4317 gspca_frame_add(gspca_dev, INTER_PACKET, in, len);
4320 static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
4321 u8 *data, /* isoc packet */
4322 int len) /* iso packet length */
4324 struct sd *sd = (struct sd *) gspca_dev;
4326 /* A false positive here is likely, until OVT gives me
4327 * the definitive SOF/EOF format */
4328 if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
4329 ov51x_handle_button(gspca_dev, (data[6] >> 1) & 1);
4330 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4331 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4335 if (gspca_dev->last_packet_type == DISCARD_PACKET)
4338 /* Does this device use packet numbers ? */
4341 if (sd->packet_nr == data[len])
4343 /* The last few packets of the frame (which are all 0's
4344 except that they may contain part of the footer), are
4346 else if (sd->packet_nr == 0 || data[len]) {
4347 PDEBUG(D_ERR, "Invalid packet nr: %d (expect: %d)",
4348 (int)data[len], (int)sd->packet_nr);
4349 gspca_dev->last_packet_type = DISCARD_PACKET;
4354 /* intermediate packet */
4355 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4358 static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
4359 u8 *data, /* isoc packet */
4360 int len) /* iso packet length */
4362 /* Header of ov519 is 16 bytes:
4363 * Byte Value Description
4367 * 3 0xXX 0x50 = SOF, 0x51 = EOF
4368 * 9 0xXX 0x01 initial frame without data,
4369 * 0x00 standard frame with image
4370 * 14 Lo in EOF: length of image data / 8
4374 if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
4376 case 0x50: /* start of frame */
4377 /* Don't check the button state here, as the state
4378 usually (always ?) changes at EOF and checking it
4379 here leads to unnecessary snapshot state resets. */
4384 if (data[0] == 0xff || data[1] == 0xd8)
4385 gspca_frame_add(gspca_dev, FIRST_PACKET,
4388 gspca_dev->last_packet_type = DISCARD_PACKET;
4390 case 0x51: /* end of frame */
4391 ov51x_handle_button(gspca_dev, data[11] & 1);
4393 gspca_dev->last_packet_type = DISCARD_PACKET;
4394 gspca_frame_add(gspca_dev, LAST_PACKET,
4400 /* intermediate packet */
4401 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4404 static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev,
4405 u8 *data, /* isoc packet */
4406 int len) /* iso packet length */
4408 struct sd *sd = (struct sd *) gspca_dev;
4410 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4412 /* A short read signals EOF */
4413 if (len < OVFX2_BULK_SIZE) {
4414 /* If the frame is short, and it is one of the first ones
4415 the sensor and bridge are still syncing, so drop it. */
4416 if (sd->first_frame) {
4418 if (gspca_dev->image_len <
4419 sd->gspca_dev.width * sd->gspca_dev.height)
4420 gspca_dev->last_packet_type = DISCARD_PACKET;
4422 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4423 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4427 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
4428 u8 *data, /* isoc packet */
4429 int len) /* iso packet length */
4431 struct sd *sd = (struct sd *) gspca_dev;
4433 switch (sd->bridge) {
4435 case BRIDGE_OV511PLUS:
4436 ov511_pkt_scan(gspca_dev, data, len);
4439 case BRIDGE_OV518PLUS:
4440 ov518_pkt_scan(gspca_dev, data, len);
4443 ov519_pkt_scan(gspca_dev, data, len);
4446 ovfx2_pkt_scan(gspca_dev, data, len);
4448 case BRIDGE_W9968CF:
4449 w9968cf_pkt_scan(gspca_dev, data, len);
4454 /* -- management routines -- */
4456 static void setbrightness(struct gspca_dev *gspca_dev)
4458 struct sd *sd = (struct sd *) gspca_dev;
4460 static const struct ov_i2c_regvals brit_7660[][7] = {
4461 {{0x0f, 0x6a}, {0x24, 0x40}, {0x25, 0x2b}, {0x26, 0x90},
4462 {0x27, 0xe0}, {0x28, 0xe0}, {0x2c, 0xe0}},
4463 {{0x0f, 0x6a}, {0x24, 0x50}, {0x25, 0x40}, {0x26, 0xa1},
4464 {0x27, 0xc0}, {0x28, 0xc0}, {0x2c, 0xc0}},
4465 {{0x0f, 0x6a}, {0x24, 0x68}, {0x25, 0x58}, {0x26, 0xc2},
4466 {0x27, 0xa0}, {0x28, 0xa0}, {0x2c, 0xa0}},
4467 {{0x0f, 0x6a}, {0x24, 0x70}, {0x25, 0x68}, {0x26, 0xd3},
4468 {0x27, 0x80}, {0x28, 0x80}, {0x2c, 0x80}},
4469 {{0x0f, 0x6a}, {0x24, 0x80}, {0x25, 0x70}, {0x26, 0xd3},
4470 {0x27, 0x20}, {0x28, 0x20}, {0x2c, 0x20}},
4471 {{0x0f, 0x6a}, {0x24, 0x88}, {0x25, 0x78}, {0x26, 0xd3},
4472 {0x27, 0x40}, {0x28, 0x40}, {0x2c, 0x40}},
4473 {{0x0f, 0x6a}, {0x24, 0x90}, {0x25, 0x80}, {0x26, 0xd4},
4474 {0x27, 0x60}, {0x28, 0x60}, {0x2c, 0x60}}
4477 val = sd->ctrls[BRIGHTNESS].val;
4478 switch (sd->sensor) {
4487 i2c_w(sd, OV7610_REG_BRT, val);
4491 /* 7620 doesn't like manual changes when in auto mode */
4492 if (!sd->ctrls[AUTOBRIGHT].val)
4493 i2c_w(sd, OV7610_REG_BRT, val);
4496 write_i2c_regvals(sd, brit_7660[val],
4497 ARRAY_SIZE(brit_7660[0]));
4501 * i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_AEC); */
4502 i2c_w(sd, OV7670_R55_BRIGHT, ov7670_abs_to_sm(val));
4507 static void setcontrast(struct gspca_dev *gspca_dev)
4509 struct sd *sd = (struct sd *) gspca_dev;
4511 static const struct ov_i2c_regvals contrast_7660[][31] = {
4512 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0xa0},
4513 {0x70, 0x58}, {0x71, 0x38}, {0x72, 0x30}, {0x73, 0x30},
4514 {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x24}, {0x77, 0x24},
4515 {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x34},
4516 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x65},
4517 {0x80, 0x70}, {0x81, 0x77}, {0x82, 0x7d}, {0x83, 0x83},
4518 {0x84, 0x88}, {0x85, 0x8d}, {0x86, 0x96}, {0x87, 0x9f},
4519 {0x88, 0xb0}, {0x89, 0xc4}, {0x8a, 0xd9}},
4520 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0x94},
4521 {0x70, 0x58}, {0x71, 0x40}, {0x72, 0x30}, {0x73, 0x30},
4522 {0x74, 0x30}, {0x75, 0x30}, {0x76, 0x2c}, {0x77, 0x24},
4523 {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x31},
4524 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x62},
4525 {0x80, 0x6d}, {0x81, 0x75}, {0x82, 0x7b}, {0x83, 0x81},
4526 {0x84, 0x87}, {0x85, 0x8d}, {0x86, 0x98}, {0x87, 0xa1},
4527 {0x88, 0xb2}, {0x89, 0xc6}, {0x8a, 0xdb}},
4528 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x84},
4529 {0x70, 0x58}, {0x71, 0x48}, {0x72, 0x40}, {0x73, 0x40},
4530 {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x28}, {0x77, 0x24},
4531 {0x78, 0x26}, {0x79, 0x28}, {0x7a, 0x28}, {0x7b, 0x34},
4532 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x5d},
4533 {0x80, 0x68}, {0x81, 0x71}, {0x82, 0x79}, {0x83, 0x81},
4534 {0x84, 0x86}, {0x85, 0x8b}, {0x86, 0x95}, {0x87, 0x9e},
4535 {0x88, 0xb1}, {0x89, 0xc5}, {0x8a, 0xd9}},
4536 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x70},
4537 {0x70, 0x58}, {0x71, 0x58}, {0x72, 0x48}, {0x73, 0x48},
4538 {0x74, 0x38}, {0x75, 0x40}, {0x76, 0x34}, {0x77, 0x34},
4539 {0x78, 0x2e}, {0x79, 0x28}, {0x7a, 0x24}, {0x7b, 0x22},
4540 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x58},
4541 {0x80, 0x63}, {0x81, 0x6e}, {0x82, 0x77}, {0x83, 0x80},
4542 {0x84, 0x87}, {0x85, 0x8f}, {0x86, 0x9c}, {0x87, 0xa9},
4543 {0x88, 0xc0}, {0x89, 0xd4}, {0x8a, 0xe6}},
4544 {{0x6c, 0xa0}, {0x6d, 0xf0}, {0x6e, 0x90}, {0x6f, 0x80},
4545 {0x70, 0x70}, {0x71, 0x80}, {0x72, 0x60}, {0x73, 0x60},
4546 {0x74, 0x58}, {0x75, 0x60}, {0x76, 0x4c}, {0x77, 0x38},
4547 {0x78, 0x38}, {0x79, 0x2a}, {0x7a, 0x20}, {0x7b, 0x0e},
4548 {0x7c, 0x0a}, {0x7d, 0x14}, {0x7e, 0x26}, {0x7f, 0x46},
4549 {0x80, 0x54}, {0x81, 0x64}, {0x82, 0x70}, {0x83, 0x7c},
4550 {0x84, 0x87}, {0x85, 0x93}, {0x86, 0xa6}, {0x87, 0xb4},
4551 {0x88, 0xd0}, {0x89, 0xe5}, {0x8a, 0xf5}},
4552 {{0x6c, 0x60}, {0x6d, 0x80}, {0x6e, 0x60}, {0x6f, 0x80},
4553 {0x70, 0x80}, {0x71, 0x80}, {0x72, 0x88}, {0x73, 0x30},
4554 {0x74, 0x70}, {0x75, 0x68}, {0x76, 0x64}, {0x77, 0x50},
4555 {0x78, 0x3c}, {0x79, 0x22}, {0x7a, 0x10}, {0x7b, 0x08},
4556 {0x7c, 0x06}, {0x7d, 0x0e}, {0x7e, 0x1a}, {0x7f, 0x3a},
4557 {0x80, 0x4a}, {0x81, 0x5a}, {0x82, 0x6b}, {0x83, 0x7b},
4558 {0x84, 0x89}, {0x85, 0x96}, {0x86, 0xaf}, {0x87, 0xc3},
4559 {0x88, 0xe1}, {0x89, 0xf2}, {0x8a, 0xfa}},
4560 {{0x6c, 0x20}, {0x6d, 0x40}, {0x6e, 0x20}, {0x6f, 0x60},
4561 {0x70, 0x88}, {0x71, 0xc8}, {0x72, 0xc0}, {0x73, 0xb8},
4562 {0x74, 0xa8}, {0x75, 0xb8}, {0x76, 0x80}, {0x77, 0x5c},
4563 {0x78, 0x26}, {0x79, 0x10}, {0x7a, 0x08}, {0x7b, 0x04},
4564 {0x7c, 0x02}, {0x7d, 0x06}, {0x7e, 0x0a}, {0x7f, 0x22},
4565 {0x80, 0x33}, {0x81, 0x4c}, {0x82, 0x64}, {0x83, 0x7b},
4566 {0x84, 0x90}, {0x85, 0xa7}, {0x86, 0xc7}, {0x87, 0xde},
4567 {0x88, 0xf1}, {0x89, 0xf9}, {0x8a, 0xfd}},
4570 val = sd->ctrls[CONTRAST].val;
4571 switch (sd->sensor) {
4574 i2c_w(sd, OV7610_REG_CNT, val);
4578 i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
4581 static const u8 ctab[] = {
4582 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
4585 /* Use Y gamma control instead. Bit 0 enables it. */
4586 i2c_w(sd, 0x64, ctab[val >> 5]);
4590 case SEN_OV7620AE: {
4591 static const u8 ctab[] = {
4592 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
4593 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
4596 /* Use Y gamma control instead. Bit 0 enables it. */
4597 i2c_w(sd, 0x64, ctab[val >> 4]);
4601 write_i2c_regvals(sd, contrast_7660[val],
4602 ARRAY_SIZE(contrast_7660[0]));
4605 /* check that this isn't just the same as ov7610 */
4606 i2c_w(sd, OV7670_R56_CONTRAS, val >> 1);
4611 static void setcolors(struct gspca_dev *gspca_dev)
4613 struct sd *sd = (struct sd *) gspca_dev;
4615 static const struct ov_i2c_regvals colors_7660[][6] = {
4616 {{0x4f, 0x28}, {0x50, 0x2a}, {0x51, 0x02}, {0x52, 0x0a},
4617 {0x53, 0x19}, {0x54, 0x23}},
4618 {{0x4f, 0x47}, {0x50, 0x4a}, {0x51, 0x03}, {0x52, 0x11},
4619 {0x53, 0x2c}, {0x54, 0x3e}},
4620 {{0x4f, 0x66}, {0x50, 0x6b}, {0x51, 0x05}, {0x52, 0x19},
4621 {0x53, 0x40}, {0x54, 0x59}},
4622 {{0x4f, 0x84}, {0x50, 0x8b}, {0x51, 0x06}, {0x52, 0x20},
4623 {0x53, 0x53}, {0x54, 0x73}},
4624 {{0x4f, 0xa3}, {0x50, 0xab}, {0x51, 0x08}, {0x52, 0x28},
4625 {0x53, 0x66}, {0x54, 0x8e}},
4628 val = sd->ctrls[COLORS].val;
4629 switch (sd->sensor) {
4636 i2c_w(sd, OV7610_REG_SAT, val);
4640 /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
4641 /* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
4644 i2c_w(sd, OV7610_REG_SAT, val);
4648 i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
4651 write_i2c_regvals(sd, colors_7660[val],
4652 ARRAY_SIZE(colors_7660[0]));
4655 /* supported later once I work out how to do it
4656 * transparently fail now! */
4657 /* set REG_COM13 values for UV sat auto mode */
4662 static void setautobright(struct gspca_dev *gspca_dev)
4664 struct sd *sd = (struct sd *) gspca_dev;
4666 i2c_w_mask(sd, 0x2d, sd->ctrls[AUTOBRIGHT].val ? 0x10 : 0x00, 0x10);
4669 static void setfreq_i(struct sd *sd)
4671 if (sd->sensor == SEN_OV7660
4672 || sd->sensor == SEN_OV7670) {
4673 switch (sd->ctrls[FREQ].val) {
4674 case 0: /* Banding filter disabled */
4675 i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_BFILT);
4678 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4680 i2c_w_mask(sd, OV7670_R3B_COM11, 0x08, 0x18);
4683 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4685 i2c_w_mask(sd, OV7670_R3B_COM11, 0x00, 0x18);
4687 case 3: /* Auto hz - ov7670 only */
4688 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4690 i2c_w_mask(sd, OV7670_R3B_COM11, OV7670_COM11_HZAUTO,
4695 switch (sd->ctrls[FREQ].val) {
4696 case 0: /* Banding filter disabled */
4697 i2c_w_mask(sd, 0x2d, 0x00, 0x04);
4698 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4700 case 1: /* 50 hz (filter on and framerate adj) */
4701 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4702 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4703 /* 20 fps -> 16.667 fps */
4704 if (sd->sensor == SEN_OV6620 ||
4705 sd->sensor == SEN_OV6630 ||
4706 sd->sensor == SEN_OV66308AF)
4707 i2c_w(sd, 0x2b, 0x5e);
4709 i2c_w(sd, 0x2b, 0xac);
4711 case 2: /* 60 hz (filter on, ...) */
4712 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4713 if (sd->sensor == SEN_OV6620 ||
4714 sd->sensor == SEN_OV6630 ||
4715 sd->sensor == SEN_OV66308AF) {
4716 /* 20 fps -> 15 fps */
4717 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4718 i2c_w(sd, 0x2b, 0xa8);
4720 /* no framerate adj. */
4721 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4727 static void setfreq(struct gspca_dev *gspca_dev)
4729 struct sd *sd = (struct sd *) gspca_dev;
4733 /* Ugly but necessary */
4734 if (sd->bridge == BRIDGE_W9968CF)
4735 w9968cf_set_crop_window(sd);
4738 static int sd_querymenu(struct gspca_dev *gspca_dev,
4739 struct v4l2_querymenu *menu)
4741 struct sd *sd = (struct sd *) gspca_dev;
4744 case V4L2_CID_POWER_LINE_FREQUENCY:
4745 switch (menu->index) {
4746 case 0: /* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */
4747 strcpy((char *) menu->name, "NoFliker");
4749 case 1: /* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */
4750 strcpy((char *) menu->name, "50 Hz");
4752 case 2: /* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */
4753 strcpy((char *) menu->name, "60 Hz");
4756 if (sd->sensor != SEN_OV7670)
4759 strcpy((char *) menu->name, "Automatic");
4767 static int sd_get_jcomp(struct gspca_dev *gspca_dev,
4768 struct v4l2_jpegcompression *jcomp)
4770 struct sd *sd = (struct sd *) gspca_dev;
4772 if (sd->bridge != BRIDGE_W9968CF)
4775 memset(jcomp, 0, sizeof *jcomp);
4776 jcomp->quality = sd->quality;
4777 jcomp->jpeg_markers = V4L2_JPEG_MARKER_DHT | V4L2_JPEG_MARKER_DQT |
4778 V4L2_JPEG_MARKER_DRI;
4782 static int sd_set_jcomp(struct gspca_dev *gspca_dev,
4783 struct v4l2_jpegcompression *jcomp)
4785 struct sd *sd = (struct sd *) gspca_dev;
4787 if (sd->bridge != BRIDGE_W9968CF)
4790 if (gspca_dev->streaming)
4793 if (jcomp->quality < QUALITY_MIN)
4794 sd->quality = QUALITY_MIN;
4795 else if (jcomp->quality > QUALITY_MAX)
4796 sd->quality = QUALITY_MAX;
4798 sd->quality = jcomp->quality;
4800 /* Return resulting jcomp params to app */
4801 sd_get_jcomp(gspca_dev, jcomp);
4806 /* sub-driver description */
4807 static const struct sd_desc sd_desc = {
4808 .name = MODULE_NAME,
4810 .nctrls = ARRAY_SIZE(sd_ctrls),
4811 .config = sd_config,
4813 .isoc_init = sd_isoc_init,
4817 .pkt_scan = sd_pkt_scan,
4818 .dq_callback = sd_reset_snapshot,
4819 .querymenu = sd_querymenu,
4820 .get_jcomp = sd_get_jcomp,
4821 .set_jcomp = sd_set_jcomp,
4822 #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
4827 /* -- module initialisation -- */
4828 static const struct usb_device_id device_table[] = {
4829 {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF },
4830 {USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 },
4831 {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
4832 {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
4833 {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
4834 {USB_DEVICE(0x041e, 0x4064),
4835 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4836 {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
4837 {USB_DEVICE(0x041e, 0x4068),
4838 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4839 {USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 },
4840 {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
4841 {USB_DEVICE(0x054c, 0x0155),
4842 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4843 {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
4844 {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
4845 {USB_DEVICE(0x05a9, 0x0519), .driver_info = BRIDGE_OV519 },
4846 {USB_DEVICE(0x05a9, 0x0530), .driver_info = BRIDGE_OV519 },
4847 {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 },
4848 {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
4849 {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
4850 {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS },
4851 {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
4852 {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS },
4853 {USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 },
4854 {USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 },
4855 {USB_DEVICE(0x1046, 0x9967), .driver_info = BRIDGE_W9968CF },
4856 {USB_DEVICE(0x8020, 0xef04), .driver_info = BRIDGE_OVFX2 },
4860 MODULE_DEVICE_TABLE(usb, device_table);
4862 /* -- device connect -- */
4863 static int sd_probe(struct usb_interface *intf,
4864 const struct usb_device_id *id)
4866 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
4870 static struct usb_driver sd_driver = {
4871 .name = MODULE_NAME,
4872 .id_table = device_table,
4874 .disconnect = gspca_disconnect,
4876 .suspend = gspca_suspend,
4877 .resume = gspca_resume,
4881 /* -- module insert / remove -- */
4882 static int __init sd_mod_init(void)
4884 return usb_register(&sd_driver);
4886 static void __exit sd_mod_exit(void)
4888 usb_deregister(&sd_driver);
4891 module_init(sd_mod_init);
4892 module_exit(sd_mod_exit);
4894 module_param(frame_rate, int, 0644);
4895 MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");