drivers/media/video/cx88/cx88-tvaudio.c

   1 /*
   2
   3     cx88x-audio.c - Conexant CX23880/23881 audio downstream driver driver
   4
   5      (c) 2001 Michael Eskin, Tom Zakrajsek [Windows version]
   6      (c) 2002 Yurij Sysoev <yurij@naturesoft.net>
   7      (c) 2003 Gerd Knorr <kraxel@bytesex.org>
   8
   9     -----------------------------------------------------------------------
  10
  11     Lot of voodoo here.  Even the data sheet doesn't help to
  12     understand what is going on here, the documentation for the audio
  13     part of the cx2388x chip is *very* bad.
  14
  15     Some of this comes from party done linux driver sources I got from
  16     [undocumented].
  17
  18     Some comes from the dscaler sources, one of the dscaler driver guy works
  19     for Conexant ...
  20
  21     -----------------------------------------------------------------------
  22
  23     This program is free software; you can redistribute it and/or modify
  24     it under the terms of the GNU General Public License as published by
  25     the Free Software Foundation; either version 2 of the License, or
  26     (at your option) any later version.
  27
  28     This program is distributed in the hope that it will be useful,
  29     but WITHOUT ANY WARRANTY; without even the implied warranty of
  30     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  31     GNU General Public License for more details.
  32
  33     You should have received a copy of the GNU General Public License
  34     along with this program; if not, write to the Free Software
  35     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  36 */
  37
  38 #include <linux/module.h>
  39 #include <linux/errno.h>
  40 #include <linux/freezer.h>
  41 #include <linux/kernel.h>
  42 #include <linux/slab.h>
  43 #include <linux/mm.h>
  44 #include <linux/poll.h>
  45 #include <linux/signal.h>
  46 #include <linux/ioport.h>
  47 #include <linux/types.h>
  48 #include <linux/interrupt.h>
  49 #include <linux/vmalloc.h>
  50 #include <linux/init.h>
  51 #include <linux/delay.h>
  52 #include <linux/kthread.h>
  53
  54 #include "cx88.h"
  55
  56 static unsigned int audio_debug;
  57 module_param(audio_debug, int, 0644);
  58 MODULE_PARM_DESC(audio_debug, "enable debug messages [audio]");
  59
  60 static unsigned int always_analog;
  61 module_param(always_analog,int,0644);
  62 MODULE_PARM_DESC(always_analog,"force analog audio out");
  63
  64 static unsigned int radio_deemphasis;
  65 module_param(radio_deemphasis,int,0644);
  66 MODULE_PARM_DESC(radio_deemphasis, "Radio deemphasis time constant, "
  67                  "0=None, 1=50us (elsewhere), 2=75us (USA)");
  68
  69 #define dprintk(fmt, arg...)    if (audio_debug) \
  70         printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
  71
  72 /* ----------------------------------------------------------- */
  73
  74 static char *aud_ctl_names[64] = {
  75         [EN_BTSC_FORCE_MONO] = "BTSC_FORCE_MONO",
  76         [EN_BTSC_FORCE_STEREO] = "BTSC_FORCE_STEREO",
  77         [EN_BTSC_FORCE_SAP] = "BTSC_FORCE_SAP",
  78         [EN_BTSC_AUTO_STEREO] = "BTSC_AUTO_STEREO",
  79         [EN_BTSC_AUTO_SAP] = "BTSC_AUTO_SAP",
  80         [EN_A2_FORCE_MONO1] = "A2_FORCE_MONO1",
  81         [EN_A2_FORCE_MONO2] = "A2_FORCE_MONO2",
  82         [EN_A2_FORCE_STEREO] = "A2_FORCE_STEREO",
  83         [EN_A2_AUTO_MONO2] = "A2_AUTO_MONO2",
  84         [EN_A2_AUTO_STEREO] = "A2_AUTO_STEREO",
  85         [EN_EIAJ_FORCE_MONO1] = "EIAJ_FORCE_MONO1",
  86         [EN_EIAJ_FORCE_MONO2] = "EIAJ_FORCE_MONO2",
  87         [EN_EIAJ_FORCE_STEREO] = "EIAJ_FORCE_STEREO",
  88         [EN_EIAJ_AUTO_MONO2] = "EIAJ_AUTO_MONO2",
  89         [EN_EIAJ_AUTO_STEREO] = "EIAJ_AUTO_STEREO",
  90         [EN_NICAM_FORCE_MONO1] = "NICAM_FORCE_MONO1",
  91         [EN_NICAM_FORCE_MONO2] = "NICAM_FORCE_MONO2",
  92         [EN_NICAM_FORCE_STEREO] = "NICAM_FORCE_STEREO",
  93         [EN_NICAM_AUTO_MONO2] = "NICAM_AUTO_MONO2",
  94         [EN_NICAM_AUTO_STEREO] = "NICAM_AUTO_STEREO",
  95         [EN_FMRADIO_FORCE_MONO] = "FMRADIO_FORCE_MONO",
  96         [EN_FMRADIO_FORCE_STEREO] = "FMRADIO_FORCE_STEREO",
  97         [EN_FMRADIO_AUTO_STEREO] = "FMRADIO_AUTO_STEREO",
  98 };
  99
 100 struct rlist {
 101         u32 reg;
 102         u32 val;
 103 };
 104
 105 static void set_audio_registers(struct cx88_core *core, const struct rlist *l)
 106 {
 107         int i;
 108
 109         for (i = 0; l[i].reg; i++) {
 110                 switch (l[i].reg) {
 111                 case AUD_PDF_DDS_CNST_BYTE2:
 112                 case AUD_PDF_DDS_CNST_BYTE1:
 113                 case AUD_PDF_DDS_CNST_BYTE0:
 114                 case AUD_QAM_MODE:
 115                 case AUD_PHACC_FREQ_8MSB:
 116                 case AUD_PHACC_FREQ_8LSB:
 117                         cx_writeb(l[i].reg, l[i].val);
 118                         break;
 119                 default:
 120                         cx_write(l[i].reg, l[i].val);
 121                         break;
 122                 }
 123         }
 124 }
 125
 126 static void set_audio_start(struct cx88_core *core, u32 mode)
 127 {
 128         /* mute */
 129         cx_write(AUD_VOL_CTL, (1 << 6));
 130
 131         /* start programming */
 132         cx_write(AUD_INIT, mode);
 133         cx_write(AUD_INIT_LD, 0x0001);
 134         cx_write(AUD_SOFT_RESET, 0x0001);
 135 }
 136
 137 static void set_audio_finish(struct cx88_core *core, u32 ctl)
 138 {
 139         u32 volume;
 140
 141         /* restart dma; This avoids buzz in NICAM and is good in others  */
 142         cx88_stop_audio_dma(core);
 143         cx_write(AUD_RATE_THRES_DMD, 0x000000C0);
 144         cx88_start_audio_dma(core);
 145
 146         if (core->board.mpeg & CX88_MPEG_BLACKBIRD) {
 147                 cx_write(AUD_I2SINPUTCNTL, 4);
 148                 cx_write(AUD_BAUDRATE, 1);
 149                 /* 'pass-thru mode': this enables the i2s output to the mpeg encoder */
 150                 cx_set(AUD_CTL, EN_I2SOUT_ENABLE);
 151                 cx_write(AUD_I2SOUTPUTCNTL, 1);
 152                 cx_write(AUD_I2SCNTL, 0);
 153                 /* cx_write(AUD_APB_IN_RATE_ADJ, 0); */
 154         }
 155         if ((always_analog) || (!(core->board.mpeg & CX88_MPEG_BLACKBIRD))) {
 156                 ctl |= EN_DAC_ENABLE;
 157                 cx_write(AUD_CTL, ctl);
 158         }
 159
 160         /* finish programming */
 161         cx_write(AUD_SOFT_RESET, 0x0000);
 162
 163         /* unmute */
 164         volume = cx_sread(SHADOW_AUD_VOL_CTL);
 165         cx_swrite(SHADOW_AUD_VOL_CTL, AUD_VOL_CTL, volume);
 166
 167         core->last_change = jiffies;
 168 }
 169
 170 /* ----------------------------------------------------------- */
 171
 172 static void set_audio_standard_BTSC(struct cx88_core *core, unsigned int sap,
 173                                     u32 mode)
 174 {
 175         static const struct rlist btsc[] = {
 176                 {AUD_AFE_12DB_EN, 0x00000001},
 177                 {AUD_OUT1_SEL, 0x00000013},
 178                 {AUD_OUT1_SHIFT, 0x00000000},
 179                 {AUD_POLY0_DDS_CONSTANT, 0x0012010c},
 180                 {AUD_DMD_RA_DDS, 0x00c3e7aa},
 181                 {AUD_DBX_IN_GAIN, 0x00004734},
 182                 {AUD_DBX_WBE_GAIN, 0x00004640},
 183                 {AUD_DBX_SE_GAIN, 0x00008d31},
 184                 {AUD_DCOC_0_SRC, 0x0000001a},
 185                 {AUD_IIR1_4_SEL, 0x00000021},
 186                 {AUD_DCOC_PASS_IN, 0x00000003},
 187                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
 188                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
 189                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
 190                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
 191                 {AUD_DN0_FREQ, 0x0000283b},
 192                 {AUD_DN2_SRC_SEL, 0x00000008},
 193                 {AUD_DN2_FREQ, 0x00003000},
 194                 {AUD_DN2_AFC, 0x00000002},
 195                 {AUD_DN2_SHFT, 0x00000000},
 196                 {AUD_IIR2_2_SEL, 0x00000020},
 197                 {AUD_IIR2_2_SHIFT, 0x00000000},
 198                 {AUD_IIR2_3_SEL, 0x0000001f},
 199                 {AUD_IIR2_3_SHIFT, 0x00000000},
 200                 {AUD_CRDC1_SRC_SEL, 0x000003ce},
 201                 {AUD_CRDC1_SHIFT, 0x00000000},
 202                 {AUD_CORDIC_SHIFT_1, 0x00000007},
 203                 {AUD_DCOC_1_SRC, 0x0000001b},
 204                 {AUD_DCOC1_SHIFT, 0x00000000},
 205                 {AUD_RDSI_SEL, 0x00000008},
 206                 {AUD_RDSQ_SEL, 0x00000008},
 207                 {AUD_RDSI_SHIFT, 0x00000000},
 208                 {AUD_RDSQ_SHIFT, 0x00000000},
 209                 {AUD_POLYPH80SCALEFAC, 0x00000003},
 210                 { /* end of list */ },
 211         };
 212         static const struct rlist btsc_sap[] = {
 213                 {AUD_AFE_12DB_EN, 0x00000001},
 214                 {AUD_DBX_IN_GAIN, 0x00007200},
 215                 {AUD_DBX_WBE_GAIN, 0x00006200},
 216                 {AUD_DBX_SE_GAIN, 0x00006200},
 217                 {AUD_IIR1_1_SEL, 0x00000000},
 218                 {AUD_IIR1_3_SEL, 0x00000001},
 219                 {AUD_DN1_SRC_SEL, 0x00000007},
 220                 {AUD_IIR1_4_SHIFT, 0x00000006},
 221                 {AUD_IIR2_1_SHIFT, 0x00000000},
 222                 {AUD_IIR2_2_SHIFT, 0x00000000},
 223                 {AUD_IIR3_0_SHIFT, 0x00000000},
 224                 {AUD_IIR3_1_SHIFT, 0x00000000},
 225                 {AUD_IIR3_0_SEL, 0x0000000d},
 226                 {AUD_IIR3_1_SEL, 0x0000000e},
 227                 {AUD_DEEMPH1_SRC_SEL, 0x00000014},
 228                 {AUD_DEEMPH1_SHIFT, 0x00000000},
 229                 {AUD_DEEMPH1_G0, 0x00004000},
 230                 {AUD_DEEMPH1_A0, 0x00000000},
 231                 {AUD_DEEMPH1_B0, 0x00000000},
 232                 {AUD_DEEMPH1_A1, 0x00000000},
 233                 {AUD_DEEMPH1_B1, 0x00000000},
 234                 {AUD_OUT0_SEL, 0x0000003f},
 235                 {AUD_OUT1_SEL, 0x0000003f},
 236                 {AUD_DN1_AFC, 0x00000002},
 237                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
 238                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
 239                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
 240                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
 241                 {AUD_IIR1_0_SEL, 0x0000001d},
 242                 {AUD_IIR1_2_SEL, 0x0000001e},
 243                 {AUD_IIR2_1_SEL, 0x00000002},
 244                 {AUD_IIR2_2_SEL, 0x00000004},
 245                 {AUD_IIR3_2_SEL, 0x0000000f},
 246                 {AUD_DCOC2_SHIFT, 0x00000001},
 247                 {AUD_IIR3_2_SHIFT, 0x00000001},
 248                 {AUD_DEEMPH0_SRC_SEL, 0x00000014},
 249                 {AUD_CORDIC_SHIFT_1, 0x00000006},
 250                 {AUD_POLY0_DDS_CONSTANT, 0x000e4db2},
 251                 {AUD_DMD_RA_DDS, 0x00f696e6},
 252                 {AUD_IIR2_3_SEL, 0x00000025},
 253                 {AUD_IIR1_4_SEL, 0x00000021},
 254                 {AUD_DN1_FREQ, 0x0000c965},
 255                 {AUD_DCOC_PASS_IN, 0x00000003},
 256                 {AUD_DCOC_0_SRC, 0x0000001a},
 257                 {AUD_DCOC_1_SRC, 0x0000001b},
 258                 {AUD_DCOC1_SHIFT, 0x00000000},
 259                 {AUD_RDSI_SEL, 0x00000009},
 260                 {AUD_RDSQ_SEL, 0x00000009},
 261                 {AUD_RDSI_SHIFT, 0x00000000},
 262                 {AUD_RDSQ_SHIFT, 0x00000000},
 263                 {AUD_POLYPH80SCALEFAC, 0x00000003},
 264                 { /* end of list */ },
 265         };
 266
 267         mode |= EN_FMRADIO_EN_RDS;
 268
 269         if (sap) {
 270                 dprintk("%s SAP (status: unknown)\n", __func__);
 271                 set_audio_start(core, SEL_SAP);
 272                 set_audio_registers(core, btsc_sap);
 273                 set_audio_finish(core, mode);
 274         } else {
 275                 dprintk("%s (status: known-good)\n", __func__);
 276                 set_audio_start(core, SEL_BTSC);
 277                 set_audio_registers(core, btsc);
 278                 set_audio_finish(core, mode);
 279         }
 280 }
 281
 282 static void set_audio_standard_NICAM(struct cx88_core *core, u32 mode)
 283 {
 284         static const struct rlist nicam_l[] = {
 285                 {AUD_AFE_12DB_EN, 0x00000001},
 286                 {AUD_RATE_ADJ1, 0x00000060},
 287                 {AUD_RATE_ADJ2, 0x000000F9},
 288                 {AUD_RATE_ADJ3, 0x000001CC},
 289                 {AUD_RATE_ADJ4, 0x000002B3},
 290                 {AUD_RATE_ADJ5, 0x00000726},
 291                 {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
 292                 {AUD_DEEMPHDENOM2_R, 0x00000000},
 293                 {AUD_ERRLOGPERIOD_R, 0x00000064},
 294                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
 295                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
 296                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
 297                 {AUD_POLYPH80SCALEFAC, 0x00000003},
 298                 {AUD_DMD_RA_DDS, 0x00C00000},
 299                 {AUD_PLL_INT, 0x0000001E},
 300                 {AUD_PLL_DDS, 0x00000000},
 301                 {AUD_PLL_FRAC, 0x0000E542},
 302                 {AUD_START_TIMER, 0x00000000},
 303                 {AUD_DEEMPHNUMER1_R, 0x000353DE},
 304                 {AUD_DEEMPHNUMER2_R, 0x000001B1},
 305                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
 306                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
 307                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
 308                 {AUD_QAM_MODE, 0x05},
 309                 {AUD_PHACC_FREQ_8MSB, 0x34},
 310                 {AUD_PHACC_FREQ_8LSB, 0x4C},
 311                 {AUD_DEEMPHGAIN_R, 0x00006680},
 312                 {AUD_RATE_THRES_DMD, 0x000000C0},
 313                 { /* end of list */ },
 314         };
 315
 316         static const struct rlist nicam_bgdki_common[] = {
 317                 {AUD_AFE_12DB_EN, 0x00000001},
 318                 {AUD_RATE_ADJ1, 0x00000010},
 319                 {AUD_RATE_ADJ2, 0x00000040},
 320                 {AUD_RATE_ADJ3, 0x00000100},
 321                 {AUD_RATE_ADJ4, 0x00000400},
 322                 {AUD_RATE_ADJ5, 0x00001000},
 323                 {AUD_ERRLOGPERIOD_R, 0x00000fff},
 324                 {AUD_ERRINTRPTTHSHLD1_R, 0x000003ff},
 325                 {AUD_ERRINTRPTTHSHLD2_R, 0x000000ff},
 326                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000003f},
 327                 {AUD_POLYPH80SCALEFAC, 0x00000003},
 328                 {AUD_DEEMPHGAIN_R, 0x000023c2},
 329                 {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
 330                 {AUD_DEEMPHNUMER2_R, 0x0003023e},
 331                 {AUD_DEEMPHDENOM1_R, 0x0000f3d0},
 332                 {AUD_DEEMPHDENOM2_R, 0x00000000},
 333                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
 334                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
 335                 {AUD_QAM_MODE, 0x05},
 336                 { /* end of list */ },
 337         };
 338
 339         static const struct rlist nicam_i[] = {
 340                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
 341                 {AUD_PHACC_FREQ_8MSB, 0x3a},
 342                 {AUD_PHACC_FREQ_8LSB, 0x93},
 343                 { /* end of list */ },
 344         };
 345
 346         static const struct rlist nicam_default[] = {
 347                 {AUD_PDF_DDS_CNST_BYTE0, 0x16},
 348                 {AUD_PHACC_FREQ_8MSB, 0x34},
 349                 {AUD_PHACC_FREQ_8LSB, 0x4c},
 350                 { /* end of list */ },
 351         };
 352
 353         set_audio_start(core,SEL_NICAM);
 354         switch (core->tvaudio) {
 355         case WW_L:
 356                 dprintk("%s SECAM-L NICAM (status: devel)\n", __func__);
 357                 set_audio_registers(core, nicam_l);
 358                 break;
 359         case WW_I:
 360                 dprintk("%s PAL-I NICAM (status: known-good)\n", __func__);
 361                 set_audio_registers(core, nicam_bgdki_common);
 362                 set_audio_registers(core, nicam_i);
 363                 break;
 364         default:
 365                 dprintk("%s PAL-BGDK NICAM (status: known-good)\n", __func__);
 366                 set_audio_registers(core, nicam_bgdki_common);
 367                 set_audio_registers(core, nicam_default);
 368                 break;
 369         };
 370
 371         mode |= EN_DMTRX_LR | EN_DMTRX_BYPASS;
 372         set_audio_finish(core, mode);
 373 }
 374
 375 static void set_audio_standard_A2(struct cx88_core *core, u32 mode)
 376 {
 377         static const struct rlist a2_bgdk_common[] = {
 378                 {AUD_ERRLOGPERIOD_R, 0x00000064},
 379                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
 380                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
 381                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
 382                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
 383                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
 384                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
 385                 {AUD_QAM_MODE, 0x05},
 386                 {AUD_PHACC_FREQ_8MSB, 0x34},
 387                 {AUD_PHACC_FREQ_8LSB, 0x4c},
 388                 {AUD_RATE_ADJ1, 0x00000100},
 389                 {AUD_RATE_ADJ2, 0x00000200},
 390                 {AUD_RATE_ADJ3, 0x00000300},
 391                 {AUD_RATE_ADJ4, 0x00000400},
 392                 {AUD_RATE_ADJ5, 0x00000500},
 393                 {AUD_THR_FR, 0x00000000},
 394                 {AAGC_HYST, 0x0000001a},
 395                 {AUD_PILOT_BQD_1_K0, 0x0000755b},
 396                 {AUD_PILOT_BQD_1_K1, 0x00551340},
 397                 {AUD_PILOT_BQD_1_K2, 0x006d30be},
 398                 {AUD_PILOT_BQD_1_K3, 0xffd394af},
 399                 {AUD_PILOT_BQD_1_K4, 0x00400000},
 400                 {AUD_PILOT_BQD_2_K0, 0x00040000},
 401                 {AUD_PILOT_BQD_2_K1, 0x002a4841},
 402                 {AUD_PILOT_BQD_2_K2, 0x00400000},
 403                 {AUD_PILOT_BQD_2_K3, 0x00000000},
 404                 {AUD_PILOT_BQD_2_K4, 0x00000000},
 405                 {AUD_MODE_CHG_TIMER, 0x00000040},
 406                 {AUD_AFE_12DB_EN, 0x00000001},
 407                 {AUD_CORDIC_SHIFT_0, 0x00000007},
 408                 {AUD_CORDIC_SHIFT_1, 0x00000007},
 409                 {AUD_DEEMPH0_G0, 0x00000380},
 410                 {AUD_DEEMPH1_G0, 0x00000380},
 411                 {AUD_DCOC_0_SRC, 0x0000001a},
 412                 {AUD_DCOC0_SHIFT, 0x00000000},
 413                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
 414                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
 415                 {AUD_DCOC_PASS_IN, 0x00000003},
 416                 {AUD_IIR3_0_SEL, 0x00000021},
 417                 {AUD_DN2_AFC, 0x00000002},
 418                 {AUD_DCOC_1_SRC, 0x0000001b},
 419                 {AUD_DCOC1_SHIFT, 0x00000000},
 420                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
 421                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
 422                 {AUD_IIR3_1_SEL, 0x00000023},
 423                 {AUD_RDSI_SEL, 0x00000017},
 424                 {AUD_RDSI_SHIFT, 0x00000000},
 425                 {AUD_RDSQ_SEL, 0x00000017},
 426                 {AUD_RDSQ_SHIFT, 0x00000000},
 427                 {AUD_PLL_INT, 0x0000001e},
 428                 {AUD_PLL_DDS, 0x00000000},
 429                 {AUD_PLL_FRAC, 0x0000e542},
 430                 {AUD_POLYPH80SCALEFAC, 0x00000001},
 431                 {AUD_START_TIMER, 0x00000000},
 432                 { /* end of list */ },
 433         };
 434
 435         static const struct rlist a2_bg[] = {
 436                 {AUD_DMD_RA_DDS, 0x002a4f2f},
 437                 {AUD_C1_UP_THR, 0x00007000},
 438                 {AUD_C1_LO_THR, 0x00005400},
 439                 {AUD_C2_UP_THR, 0x00005400},
 440                 {AUD_C2_LO_THR, 0x00003000},
 441                 { /* end of list */ },
 442         };
 443
 444         static const struct rlist a2_dk[] = {
 445                 {AUD_DMD_RA_DDS, 0x002a4f2f},
 446                 {AUD_C1_UP_THR, 0x00007000},
 447                 {AUD_C1_LO_THR, 0x00005400},
 448                 {AUD_C2_UP_THR, 0x00005400},
 449                 {AUD_C2_LO_THR, 0x00003000},
 450                 {AUD_DN0_FREQ, 0x00003a1c},
 451                 {AUD_DN2_FREQ, 0x0000d2e0},
 452                 { /* end of list */ },
 453         };
 454
 455         static const struct rlist a1_i[] = {
 456                 {AUD_ERRLOGPERIOD_R, 0x00000064},
 457                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
 458                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
 459                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
 460                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
 461                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
 462                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
 463                 {AUD_QAM_MODE, 0x05},
 464                 {AUD_PHACC_FREQ_8MSB, 0x3a},
 465                 {AUD_PHACC_FREQ_8LSB, 0x93},
 466                 {AUD_DMD_RA_DDS, 0x002a4f2f},
 467                 {AUD_PLL_INT, 0x0000001e},
 468                 {AUD_PLL_DDS, 0x00000004},
 469                 {AUD_PLL_FRAC, 0x0000e542},
 470                 {AUD_RATE_ADJ1, 0x00000100},
 471                 {AUD_RATE_ADJ2, 0x00000200},
 472                 {AUD_RATE_ADJ3, 0x00000300},
 473                 {AUD_RATE_ADJ4, 0x00000400},
 474                 {AUD_RATE_ADJ5, 0x00000500},
 475                 {AUD_THR_FR, 0x00000000},
 476                 {AUD_PILOT_BQD_1_K0, 0x0000755b},
 477                 {AUD_PILOT_BQD_1_K1, 0x00551340},
 478                 {AUD_PILOT_BQD_1_K2, 0x006d30be},
 479                 {AUD_PILOT_BQD_1_K3, 0xffd394af},
 480                 {AUD_PILOT_BQD_1_K4, 0x00400000},
 481                 {AUD_PILOT_BQD_2_K0, 0x00040000},
 482                 {AUD_PILOT_BQD_2_K1, 0x002a4841},
 483                 {AUD_PILOT_BQD_2_K2, 0x00400000},
 484                 {AUD_PILOT_BQD_2_K3, 0x00000000},
 485                 {AUD_PILOT_BQD_2_K4, 0x00000000},
 486                 {AUD_MODE_CHG_TIMER, 0x00000060},
 487                 {AUD_AFE_12DB_EN, 0x00000001},
 488                 {AAGC_HYST, 0x0000000a},
 489                 {AUD_CORDIC_SHIFT_0, 0x00000007},
 490                 {AUD_CORDIC_SHIFT_1, 0x00000007},
 491                 {AUD_C1_UP_THR, 0x00007000},
 492                 {AUD_C1_LO_THR, 0x00005400},
 493                 {AUD_C2_UP_THR, 0x00005400},
 494                 {AUD_C2_LO_THR, 0x00003000},
 495                 {AUD_DCOC_0_SRC, 0x0000001a},
 496                 {AUD_DCOC0_SHIFT, 0x00000000},
 497                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
 498                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
 499                 {AUD_DCOC_PASS_IN, 0x00000003},
 500                 {AUD_IIR3_0_SEL, 0x00000021},
 501                 {AUD_DN2_AFC, 0x00000002},
 502                 {AUD_DCOC_1_SRC, 0x0000001b},
 503                 {AUD_DCOC1_SHIFT, 0x00000000},
 504                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
 505                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
 506                 {AUD_IIR3_1_SEL, 0x00000023},
 507                 {AUD_DN0_FREQ, 0x000035a3},
 508                 {AUD_DN2_FREQ, 0x000029c7},
 509                 {AUD_CRDC0_SRC_SEL, 0x00000511},
 510                 {AUD_IIR1_0_SEL, 0x00000001},
 511                 {AUD_IIR1_1_SEL, 0x00000000},
 512                 {AUD_IIR3_2_SEL, 0x00000003},
 513                 {AUD_IIR3_2_SHIFT, 0x00000000},
 514                 {AUD_IIR3_0_SEL, 0x00000002},
 515                 {AUD_IIR2_0_SEL, 0x00000021},
 516                 {AUD_IIR2_0_SHIFT, 0x00000002},
 517                 {AUD_DEEMPH0_SRC_SEL, 0x0000000b},
 518                 {AUD_DEEMPH1_SRC_SEL, 0x0000000b},
 519                 {AUD_POLYPH80SCALEFAC, 0x00000001},
 520                 {AUD_START_TIMER, 0x00000000},
 521                 { /* end of list */ },
 522         };
 523
 524         static const struct rlist am_l[] = {
 525                 {AUD_ERRLOGPERIOD_R, 0x00000064},
 526                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
 527                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
 528                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
 529                 {AUD_PDF_DDS_CNST_BYTE2, 0x48},
 530                 {AUD_PDF_DDS_CNST_BYTE1, 0x3D},
 531                 {AUD_QAM_MODE, 0x00},
 532                 {AUD_PDF_DDS_CNST_BYTE0, 0xf5},
 533                 {AUD_PHACC_FREQ_8MSB, 0x3a},
 534                 {AUD_PHACC_FREQ_8LSB, 0x4a},
 535                 {AUD_DEEMPHGAIN_R, 0x00006680},
 536                 {AUD_DEEMPHNUMER1_R, 0x000353DE},
 537                 {AUD_DEEMPHNUMER2_R, 0x000001B1},
 538                 {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
 539                 {AUD_DEEMPHDENOM2_R, 0x00000000},
 540                 {AUD_FM_MODE_ENABLE, 0x00000007},
 541                 {AUD_POLYPH80SCALEFAC, 0x00000003},
 542                 {AUD_AFE_12DB_EN, 0x00000001},
 543                 {AAGC_GAIN, 0x00000000},
 544                 {AAGC_HYST, 0x00000018},
 545                 {AAGC_DEF, 0x00000020},
 546                 {AUD_DN0_FREQ, 0x00000000},
 547                 {AUD_POLY0_DDS_CONSTANT, 0x000E4DB2},
 548                 {AUD_DCOC_0_SRC, 0x00000021},
 549                 {AUD_IIR1_0_SEL, 0x00000000},
 550                 {AUD_IIR1_0_SHIFT, 0x00000007},
 551                 {AUD_IIR1_1_SEL, 0x00000002},
 552                 {AUD_IIR1_1_SHIFT, 0x00000000},
 553                 {AUD_DCOC_1_SRC, 0x00000003},
 554                 {AUD_DCOC1_SHIFT, 0x00000000},
 555                 {AUD_DCOC_PASS_IN, 0x00000000},
 556                 {AUD_IIR1_2_SEL, 0x00000023},
 557                 {AUD_IIR1_2_SHIFT, 0x00000000},
 558                 {AUD_IIR1_3_SEL, 0x00000004},
 559                 {AUD_IIR1_3_SHIFT, 0x00000007},
 560                 {AUD_IIR1_4_SEL, 0x00000005},
 561                 {AUD_IIR1_4_SHIFT, 0x00000007},
 562                 {AUD_IIR3_0_SEL, 0x00000007},
 563                 {AUD_IIR3_0_SHIFT, 0x00000000},
 564                 {AUD_DEEMPH0_SRC_SEL, 0x00000011},
 565                 {AUD_DEEMPH0_SHIFT, 0x00000000},
 566                 {AUD_DEEMPH0_G0, 0x00007000},
 567                 {AUD_DEEMPH0_A0, 0x00000000},
 568                 {AUD_DEEMPH0_B0, 0x00000000},
 569                 {AUD_DEEMPH0_A1, 0x00000000},
 570                 {AUD_DEEMPH0_B1, 0x00000000},
 571                 {AUD_DEEMPH1_SRC_SEL, 0x00000011},
 572                 {AUD_DEEMPH1_SHIFT, 0x00000000},
 573                 {AUD_DEEMPH1_G0, 0x00007000},
 574                 {AUD_DEEMPH1_A0, 0x00000000},
 575                 {AUD_DEEMPH1_B0, 0x00000000},
 576                 {AUD_DEEMPH1_A1, 0x00000000},
 577                 {AUD_DEEMPH1_B1, 0x00000000},
 578                 {AUD_OUT0_SEL, 0x0000003F},
 579                 {AUD_OUT1_SEL, 0x0000003F},
 580                 {AUD_DMD_RA_DDS, 0x00F5C285},
 581                 {AUD_PLL_INT, 0x0000001E},
 582                 {AUD_PLL_DDS, 0x00000000},
 583                 {AUD_PLL_FRAC, 0x0000E542},
 584                 {AUD_RATE_ADJ1, 0x00000100},
 585                 {AUD_RATE_ADJ2, 0x00000200},
 586                 {AUD_RATE_ADJ3, 0x00000300},
 587                 {AUD_RATE_ADJ4, 0x00000400},
 588                 {AUD_RATE_ADJ5, 0x00000500},
 589                 {AUD_RATE_THRES_DMD, 0x000000C0},
 590                 { /* end of list */ },
 591         };
 592
 593         static const struct rlist a2_deemph50[] = {
 594                 {AUD_DEEMPH0_G0, 0x00000380},
 595                 {AUD_DEEMPH1_G0, 0x00000380},
 596                 {AUD_DEEMPHGAIN_R, 0x000011e1},
 597                 {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
 598                 {AUD_DEEMPHNUMER2_R, 0x0003023c},
 599                 { /* end of list */ },
 600         };
 601
 602         set_audio_start(core, SEL_A2);
 603         switch (core->tvaudio) {
 604         case WW_BG:
 605                 dprintk("%s PAL-BG A1/2 (status: known-good)\n", __func__);
 606                 set_audio_registers(core, a2_bgdk_common);
 607                 set_audio_registers(core, a2_bg);
 608                 set_audio_registers(core, a2_deemph50);
 609                 break;
 610         case WW_DK:
 611                 dprintk("%s PAL-DK A1/2 (status: known-good)\n", __func__);
 612                 set_audio_registers(core, a2_bgdk_common);
 613                 set_audio_registers(core, a2_dk);
 614                 set_audio_registers(core, a2_deemph50);
 615                 break;
 616         case WW_I:
 617                 dprintk("%s PAL-I A1 (status: known-good)\n", __func__);
 618                 set_audio_registers(core, a1_i);
 619                 set_audio_registers(core, a2_deemph50);
 620                 break;
 621         case WW_L:
 622                 dprintk("%s AM-L (status: devel)\n", __func__);
 623                 set_audio_registers(core, am_l);
 624                 break;
 625         default:
 626                 dprintk("%s Warning: wrong value\n", __func__);
 627                 return;
 628                 break;
 629         };
 630
 631         mode |= EN_FMRADIO_EN_RDS | EN_DMTRX_SUMDIFF;
 632         set_audio_finish(core, mode);
 633 }
 634
 635 static void set_audio_standard_EIAJ(struct cx88_core *core)
 636 {
 637         static const struct rlist eiaj[] = {
 638                 /* TODO: eiaj register settings are not there yet ... */
 639
 640                 { /* end of list */ },
 641         };
 642         dprintk("%s (status: unknown)\n", __func__);
 643
 644         set_audio_start(core, SEL_EIAJ);
 645         set_audio_registers(core, eiaj);
 646         set_audio_finish(core, EN_EIAJ_AUTO_STEREO);
 647 }
 648
 649 static void set_audio_standard_FM(struct cx88_core *core,
 650                                   enum cx88_deemph_type deemph)
 651 {
 652         static const struct rlist fm_deemph_50[] = {
 653                 {AUD_DEEMPH0_G0, 0x0C45},
 654                 {AUD_DEEMPH0_A0, 0x6262},
 655                 {AUD_DEEMPH0_B0, 0x1C29},
 656                 {AUD_DEEMPH0_A1, 0x3FC66},
 657                 {AUD_DEEMPH0_B1, 0x399A},
 658
 659                 {AUD_DEEMPH1_G0, 0x0D80},
 660                 {AUD_DEEMPH1_A0, 0x6262},
 661                 {AUD_DEEMPH1_B0, 0x1C29},
 662                 {AUD_DEEMPH1_A1, 0x3FC66},
 663                 {AUD_DEEMPH1_B1, 0x399A},
 664
 665                 {AUD_POLYPH80SCALEFAC, 0x0003},
 666                 { /* end of list */ },
 667         };
 668         static const struct rlist fm_deemph_75[] = {
 669                 {AUD_DEEMPH0_G0, 0x091B},
 670                 {AUD_DEEMPH0_A0, 0x6B68},
 671                 {AUD_DEEMPH0_B0, 0x11EC},
 672                 {AUD_DEEMPH0_A1, 0x3FC66},
 673                 {AUD_DEEMPH0_B1, 0x399A},
 674
 675                 {AUD_DEEMPH1_G0, 0x0AA0},
 676                 {AUD_DEEMPH1_A0, 0x6B68},
 677                 {AUD_DEEMPH1_B0, 0x11EC},
 678                 {AUD_DEEMPH1_A1, 0x3FC66},
 679                 {AUD_DEEMPH1_B1, 0x399A},
 680
 681                 {AUD_POLYPH80SCALEFAC, 0x0003},
 682                 { /* end of list */ },
 683         };
 684
 685         /* It is enough to leave default values? */
 686         /* No, it's not!  The deemphasis registers are reset to the 75us
 687          * values by default.  Analyzing the spectrum of the decoded audio
 688          * reveals that "no deemphasis" is the same as 75 us, while the 50 us
 689          * setting results in less deemphasis.  */
 690         static const struct rlist fm_no_deemph[] = {
 691
 692                 {AUD_POLYPH80SCALEFAC, 0x0003},
 693                 { /* end of list */ },
 694         };
 695
 696         dprintk("%s (status: unknown)\n", __func__);
 697         set_audio_start(core, SEL_FMRADIO);
 698
 699         switch (deemph) {
 700         default:
 701         case FM_NO_DEEMPH:
 702                 set_audio_registers(core, fm_no_deemph);
 703                 break;
 704
 705         case FM_DEEMPH_50:
 706                 set_audio_registers(core, fm_deemph_50);
 707                 break;
 708
 709         case FM_DEEMPH_75:
 710                 set_audio_registers(core, fm_deemph_75);
 711                 break;
 712         }
 713
 714         set_audio_finish(core, EN_FMRADIO_AUTO_STEREO);
 715 }
 716
 717 /* ----------------------------------------------------------- */
 718
 719 static int cx88_detect_nicam(struct cx88_core *core)
 720 {
 721         int i, j = 0;
 722
 723         dprintk("start nicam autodetect.\n");
 724
 725         for (i = 0; i < 6; i++) {
 726                 /* if bit1=1 then nicam is detected */
 727                 j += ((cx_read(AUD_NICAM_STATUS2) & 0x02) >> 1);
 728
 729                 if (j == 1) {
 730                         dprintk("nicam is detected.\n");
 731                         return 1;
 732                 }
 733
 734                 /* wait a little bit for next reading status */
 735                 msleep(10);
 736         }
 737
 738         dprintk("nicam is not detected.\n");
 739         return 0;
 740 }
 741
 742 void cx88_set_tvaudio(struct cx88_core *core)
 743 {
 744         switch (core->tvaudio) {
 745         case WW_BTSC:
 746                 set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
 747                 break;
 748         case WW_BG:
 749         case WW_DK:
 750         case WW_M:
 751         case WW_I:
 752         case WW_L:
 753                 /* prepare all dsp registers */
 754                 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
 755
 756                 /* set nicam mode - otherwise
 757                    AUD_NICAM_STATUS2 contains wrong values */
 758                 set_audio_standard_NICAM(core, EN_NICAM_AUTO_STEREO);
 759                 if (0 == cx88_detect_nicam(core)) {
 760                         /* fall back to fm / am mono */
 761                         set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
 762                         core->audiomode_current = V4L2_TUNER_MODE_MONO;
 763                         core->use_nicam = 0;
 764                 } else {
 765                         core->use_nicam = 1;
 766                 }
 767                 break;
 768         case WW_EIAJ:
 769                 set_audio_standard_EIAJ(core);
 770                 break;
 771         case WW_FM:
 772                 set_audio_standard_FM(core, radio_deemphasis);
 773                 break;
 774         case WW_I2SADC:
 775                 set_audio_start(core, 0x01);
 776                 /* Slave/Philips/Autobaud */
 777                 cx_write(AUD_I2SINPUTCNTL, 0);
 778                 /* Switch to "I2S ADC mode" */
 779                 cx_write(AUD_I2SCNTL, 0x1);
 780                 set_audio_finish(core, EN_I2SIN_ENABLE);
 781                 break;
 782         case WW_NONE:
 783         default:
 784                 printk("%s/0: unknown tv audio mode [%d]\n",
 785                        core->name, core->tvaudio);
 786                 break;
 787         }
 788         return;
 789 }
 790
 791 void cx88_newstation(struct cx88_core *core)
 792 {
 793         core->audiomode_manual = UNSET;
 794         core->last_change = jiffies;
 795 }
 796
 797 void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t)
 798 {
 799         static char *m[] = { "stereo", "dual mono", "mono", "sap" };
 800         static char *p[] = { "no pilot", "pilot c1", "pilot c2", "?" };
 801         u32 reg, mode, pilot;
 802
 803         reg = cx_read(AUD_STATUS);
 804         mode = reg & 0x03;
 805         pilot = (reg >> 2) & 0x03;
 806
 807         if (core->astat != reg)
 808                 dprintk("AUD_STATUS: 0x%x [%s/%s] ctl=%s\n",
 809                         reg, m[mode], p[pilot],
 810                         aud_ctl_names[cx_read(AUD_CTL) & 63]);
 811         core->astat = reg;
 812
 813         t->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_SAP |
 814             V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
 815         t->rxsubchans = UNSET;
 816         t->audmode = V4L2_TUNER_MODE_MONO;
 817
 818         switch (mode) {
 819         case 0:
 820                 t->audmode = V4L2_TUNER_MODE_STEREO;
 821                 break;
 822         case 1:
 823                 t->audmode = V4L2_TUNER_MODE_LANG2;
 824                 break;
 825         case 2:
 826                 t->audmode = V4L2_TUNER_MODE_MONO;
 827                 break;
 828         case 3:
 829                 t->audmode = V4L2_TUNER_MODE_SAP;
 830                 break;
 831         }
 832
 833         switch (core->tvaudio) {
 834         case WW_BTSC:
 835         case WW_BG:
 836         case WW_DK:
 837         case WW_M:
 838         case WW_EIAJ:
 839                 if (!core->use_nicam) {
 840                         t->rxsubchans = cx88_dsp_detect_stereo_sap(core);
 841                         break;
 842                 }
 843                 break;
 844         default:
 845                 /* nothing */
 846                 break;
 847         }
 848
 849         /* If software stereo detection is not supported... */
 850         if (UNSET == t->rxsubchans) {
 851                 t->rxsubchans = V4L2_TUNER_SUB_MONO;
 852                 /* If the hardware itself detected stereo, also return
 853                    stereo as an available subchannel */
 854                 if (V4L2_TUNER_MODE_STEREO == t->audmode)
 855                         t->rxsubchans |= V4L2_TUNER_SUB_STEREO;
 856         }
 857         return;
 858 }
 859
 860 void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual)
 861 {
 862         u32 ctl = UNSET;
 863         u32 mask = UNSET;
 864
 865         if (manual) {
 866                 core->audiomode_manual = mode;
 867         } else {
 868                 if (UNSET != core->audiomode_manual)
 869                         return;
 870         }
 871         core->audiomode_current = mode;
 872
 873         switch (core->tvaudio) {
 874         case WW_BTSC:
 875                 switch (mode) {
 876                 case V4L2_TUNER_MODE_MONO:
 877                         set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_MONO);
 878                         break;
 879                 case V4L2_TUNER_MODE_LANG1:
 880                         set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
 881                         break;
 882                 case V4L2_TUNER_MODE_LANG2:
 883                         set_audio_standard_BTSC(core, 1, EN_BTSC_FORCE_SAP);
 884                         break;
 885                 case V4L2_TUNER_MODE_STEREO:
 886                 case V4L2_TUNER_MODE_LANG1_LANG2:
 887                         set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_STEREO);
 888                         break;
 889                 }
 890                 break;
 891         case WW_BG:
 892         case WW_DK:
 893         case WW_M:
 894         case WW_I:
 895         case WW_L:
 896                 if (1 == core->use_nicam) {
 897                         switch (mode) {
 898                         case V4L2_TUNER_MODE_MONO:
 899                         case V4L2_TUNER_MODE_LANG1:
 900                                 set_audio_standard_NICAM(core,
 901                                                          EN_NICAM_FORCE_MONO1);
 902                                 break;
 903                         case V4L2_TUNER_MODE_LANG2:
 904                                 set_audio_standard_NICAM(core,
 905                                                          EN_NICAM_FORCE_MONO2);
 906                                 break;
 907                         case V4L2_TUNER_MODE_STEREO:
 908                         case V4L2_TUNER_MODE_LANG1_LANG2:
 909                                 set_audio_standard_NICAM(core,
 910                                                          EN_NICAM_FORCE_STEREO);
 911                                 break;
 912                         }
 913                 } else {
 914                         if ((core->tvaudio == WW_I) || (core->tvaudio == WW_L)) {
 915                                 /* fall back to fm / am mono */
 916                                 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
 917                         } else {
 918                                 /* TODO: Add A2 autodection */
 919                                 mask = 0x3f;
 920                                 switch (mode) {
 921                                 case V4L2_TUNER_MODE_MONO:
 922                                 case V4L2_TUNER_MODE_LANG1:
 923                                         ctl = EN_A2_FORCE_MONO1;
 924                                         break;
 925                                 case V4L2_TUNER_MODE_LANG2:
 926                                         ctl = EN_A2_FORCE_MONO2;
 927                                         break;
 928                                 case V4L2_TUNER_MODE_STEREO:
 929                                 case V4L2_TUNER_MODE_LANG1_LANG2:
 930                                         ctl = EN_A2_FORCE_STEREO;
 931                                         break;
 932                                 }
 933                         }
 934                 }
 935                 break;
 936         case WW_FM:
 937                 switch (mode) {
 938                 case V4L2_TUNER_MODE_MONO:
 939                         ctl = EN_FMRADIO_FORCE_MONO;
 940                         mask = 0x3f;
 941                         break;
 942                 case V4L2_TUNER_MODE_STEREO:
 943                         ctl = EN_FMRADIO_AUTO_STEREO;
 944                         mask = 0x3f;
 945                         break;
 946                 }
 947                 break;
 948         case WW_I2SADC:
 949                 /* DO NOTHING */
 950                 break;
 951         }
 952
 953         if (UNSET != ctl) {
 954                 dprintk("cx88_set_stereo: mask 0x%x, ctl 0x%x "
 955                         "[status=0x%x,ctl=0x%x,vol=0x%x]\n",
 956                         mask, ctl, cx_read(AUD_STATUS),
 957                         cx_read(AUD_CTL), cx_sread(SHADOW_AUD_VOL_CTL));
 958                 cx_andor(AUD_CTL, mask, ctl);
 959         }
 960         return;
 961 }
 962
 963 int cx88_audio_thread(void *data)
 964 {
 965         struct cx88_core *core = data;
 966         struct v4l2_tuner t;
 967         u32 mode = 0;
 968
 969         dprintk("cx88: tvaudio thread started\n");
 970         set_freezable();
 971         for (;;) {
 972                 msleep_interruptible(1000);
 973                 if (kthread_should_stop())
 974                         break;
 975                 try_to_freeze();
 976
 977                 switch (core->tvaudio) {
 978                 case WW_BG:
 979                 case WW_DK:
 980                 case WW_M:
 981                 case WW_I:
 982                 case WW_L:
 983                         if (core->use_nicam)
 984                                 goto hw_autodetect;
 985
 986                         /* just monitor the audio status for now ... */
 987                         memset(&t, 0, sizeof(t));
 988                         cx88_get_stereo(core, &t);
 989
 990                         if (UNSET != core->audiomode_manual)
 991                                 /* manually set, don't do anything. */
 992                                 continue;
 993
 994                         /* monitor signal and set stereo if available */
 995                         if (t.rxsubchans & V4L2_TUNER_SUB_STEREO)
 996                                 mode = V4L2_TUNER_MODE_STEREO;
 997                         else
 998                                 mode = V4L2_TUNER_MODE_MONO;
 999                         if (mode == core->audiomode_current)
1000                                 continue;
1001                         /* automatically switch to best available mode */
1002                         cx88_set_stereo(core, mode, 0);
1003                         break;
1004                 default:
1005 hw_autodetect:
1006                         /* stereo autodetection is supported by hardware so
1007                            we don't need to do it manually. Do nothing. */
1008                         break;
1009                 }
1010         }
1011
1012         dprintk("cx88: tvaudio thread exiting\n");
1013         return 0;
1014 }
1015
1016 /* ----------------------------------------------------------- */
1017
1018 EXPORT_SYMBOL(cx88_set_tvaudio);
1019 EXPORT_SYMBOL(cx88_newstation);
1020 EXPORT_SYMBOL(cx88_set_stereo);
1021 EXPORT_SYMBOL(cx88_get_stereo);
1022 EXPORT_SYMBOL(cx88_audio_thread);
1023
1024 /*
1025  * Local variables:
1026  * c-basic-offset: 8
1027  * End:
1028  * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
1029  */