drivers/media/video/cx88/cx88-tvaudio.c

   1 /*
   2
   3     cx88x-audio.c - Conexant CX23880/23881 audio downstream driver driver
   4
   5      (c) 2001 Michael Eskin, Tom Zakrajsek [Windows version]
   6      (c) 2002 Yurij Sysoev <yurij@naturesoft.net>
   7      (c) 2003 Gerd Knorr <kraxel@bytesex.org>
   8
   9     -----------------------------------------------------------------------
  10
  11     Lot of voodoo here.  Even the data sheet doesn't help to
  12     understand what is going on here, the documentation for the audio
  13     part of the cx2388x chip is *very* bad.
  14
  15     Some of this comes from party done linux driver sources I got from
  16     [undocumented].
  17
  18     Some comes from the dscaler sources, one of the dscaler driver guy works
  19     for Conexant ...
  20
  21     -----------------------------------------------------------------------
  22
  23     This program is free software; you can redistribute it and/or modify
  24     it under the terms of the GNU General Public License as published by
  25     the Free Software Foundation; either version 2 of the License, or
  26     (at your option) any later version.
  27
  28     This program is distributed in the hope that it will be useful,
  29     but WITHOUT ANY WARRANTY; without even the implied warranty of
  30     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  31     GNU General Public License for more details.
  32
  33     You should have received a copy of the GNU General Public License
  34     along with this program; if not, write to the Free Software
  35     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  36 */
  37
  38 #include <linux/module.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/errno.h>
  41 #include <linux/kernel.h>
  42 #include <linux/slab.h>
  43 #include <linux/mm.h>
  44 #include <linux/poll.h>
  45 #include <linux/pci.h>
  46 #include <linux/signal.h>
  47 #include <linux/ioport.h>
  48 #include <linux/sched.h>
  49 #include <linux/types.h>
  50 #include <linux/interrupt.h>
  51 #include <linux/vmalloc.h>
  52 #include <linux/init.h>
  53 #include <linux/smp_lock.h>
  54 #include <linux/delay.h>
  55 #include <linux/kthread.h>
  56
  57 #include "cx88.h"
  58
  59 static unsigned int audio_debug = 0;
  60 module_param(audio_debug,int,0644);
  61 MODULE_PARM_DESC(audio_debug,"enable debug messages [audio]");
  62
  63 #define dprintk(fmt, arg...)    if (audio_debug) \
  64         printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
  65
  66 /* ----------------------------------------------------------- */
  67
  68 static char *aud_ctl_names[64] =
  69 {
  70         [ EN_BTSC_FORCE_MONO       ] = "BTSC_FORCE_MONO",
  71         [ EN_BTSC_FORCE_STEREO     ] = "BTSC_FORCE_STEREO",
  72         [ EN_BTSC_FORCE_SAP        ] = "BTSC_FORCE_SAP",
  73         [ EN_BTSC_AUTO_STEREO      ] = "BTSC_AUTO_STEREO",
  74         [ EN_BTSC_AUTO_SAP         ] = "BTSC_AUTO_SAP",
  75         [ EN_A2_FORCE_MONO1        ] = "A2_FORCE_MONO1",
  76         [ EN_A2_FORCE_MONO2        ] = "A2_FORCE_MONO2",
  77         [ EN_A2_FORCE_STEREO       ] = "A2_FORCE_STEREO",
  78         [ EN_A2_AUTO_MONO2         ] = "A2_AUTO_MONO2",
  79         [ EN_A2_AUTO_STEREO        ] = "A2_AUTO_STEREO",
  80         [ EN_EIAJ_FORCE_MONO1      ] = "EIAJ_FORCE_MONO1",
  81         [ EN_EIAJ_FORCE_MONO2      ] = "EIAJ_FORCE_MONO2",
  82         [ EN_EIAJ_FORCE_STEREO     ] = "EIAJ_FORCE_STEREO",
  83         [ EN_EIAJ_AUTO_MONO2       ] = "EIAJ_AUTO_MONO2",
  84         [ EN_EIAJ_AUTO_STEREO      ] = "EIAJ_AUTO_STEREO",
  85         [ EN_NICAM_FORCE_MONO1     ] = "NICAM_FORCE_MONO1",
  86         [ EN_NICAM_FORCE_MONO2     ] = "NICAM_FORCE_MONO2",
  87         [ EN_NICAM_FORCE_STEREO    ] = "NICAM_FORCE_STEREO",
  88         [ EN_NICAM_AUTO_MONO2      ] = "NICAM_AUTO_MONO2",
  89         [ EN_NICAM_AUTO_STEREO     ] = "NICAM_AUTO_STEREO",
  90         [ EN_FMRADIO_FORCE_MONO    ] = "FMRADIO_FORCE_MONO",
  91         [ EN_FMRADIO_FORCE_STEREO  ] = "FMRADIO_FORCE_STEREO",
  92         [ EN_FMRADIO_AUTO_STEREO   ] = "FMRADIO_AUTO_STEREO",
  93 };
  94
  95 struct rlist {
  96         u32 reg;
  97         u32 val;
  98 };
  99
 100 static void set_audio_registers(struct cx88_core *core,
 101                                 const struct rlist *l)
 102 {
 103         int i;
 104
 105         for (i = 0; l[i].reg; i++) {
 106                 switch (l[i].reg) {
 107                 case AUD_PDF_DDS_CNST_BYTE2:
 108                 case AUD_PDF_DDS_CNST_BYTE1:
 109                 case AUD_PDF_DDS_CNST_BYTE0:
 110                 case AUD_QAM_MODE:
 111                 case AUD_PHACC_FREQ_8MSB:
 112                 case AUD_PHACC_FREQ_8LSB:
 113                         cx_writeb(l[i].reg, l[i].val);
 114                         break;
 115                 default:
 116                         cx_write(l[i].reg, l[i].val);
 117                         break;
 118                 }
 119         }
 120 }
 121
 122 static void set_audio_start(struct cx88_core *core,
 123                         u32 mode)
 124 {
 125         // mute
 126         cx_write(AUD_VOL_CTL,       (1 << 6));
 127
 128         // start programming
 129         cx_write(AUD_CTL,           0x0000);
 130         cx_write(AUD_INIT,          mode);
 131         cx_write(AUD_INIT_LD,       0x0001);
 132         cx_write(AUD_SOFT_RESET,    0x0001);
 133 }
 134
 135 static void set_audio_finish(struct cx88_core *core, u32 ctl)
 136 {
 137         u32 volume;
 138
 139         if (cx88_boards[core->board].blackbird) {
 140                 // sets sound input from external adc
 141                 cx_set(AUD_CTL, EN_I2SIN_ENABLE);
 142                 //cx_write(AUD_I2SINPUTCNTL, 0);
 143                 cx_write(AUD_I2SINPUTCNTL, 4);
 144                 cx_write(AUD_BAUDRATE, 1);
 145                 // 'pass-thru mode': this enables the i2s output to the mpeg encoder
 146                 cx_set(AUD_CTL, EN_I2SOUT_ENABLE);
 147                 cx_write(AUD_I2SOUTPUTCNTL, 1);
 148                 cx_write(AUD_I2SCNTL, 0);
 149                 //cx_write(AUD_APB_IN_RATE_ADJ, 0);
 150         } else {
 151         ctl |= EN_DAC_ENABLE;
 152         cx_write(AUD_CTL, ctl);
 153         }
 154
 155         /* finish programming */
 156         cx_write(AUD_SOFT_RESET, 0x0000);
 157
 158         /* unmute */
 159         volume = cx_sread(SHADOW_AUD_VOL_CTL);
 160         cx_swrite(SHADOW_AUD_VOL_CTL, AUD_VOL_CTL, volume);
 161 }
 162
 163 /* ----------------------------------------------------------- */
 164
 165 static void set_audio_standard_BTSC(struct cx88_core *core, unsigned int sap, u32 mode)
 166 {
 167         static const struct rlist btsc[] = {
 168         { AUD_AFE_12DB_EN,             0x00000001 },
 169                 { AUD_OUT1_SEL,                0x00000013 },
 170                 { AUD_OUT1_SHIFT,              0x00000000 },
 171                 { AUD_POLY0_DDS_CONSTANT,      0x0012010c },
 172                 { AUD_DMD_RA_DDS,              0x00c3e7aa },
 173                 { AUD_DBX_IN_GAIN,             0x00004734 },
 174                 { AUD_DBX_WBE_GAIN,            0x00004640 },
 175                 { AUD_DBX_SE_GAIN,             0x00008d31 },
 176                 { AUD_DCOC_0_SRC,              0x0000001a },
 177                 { AUD_IIR1_4_SEL,              0x00000021 },
 178                 { AUD_DCOC_PASS_IN,            0x00000003 },
 179                 { AUD_DCOC_0_SHIFT_IN0,        0x0000000a },
 180                 { AUD_DCOC_0_SHIFT_IN1,        0x00000008 },
 181                 { AUD_DCOC_1_SHIFT_IN0,        0x0000000a },
 182                 { AUD_DCOC_1_SHIFT_IN1,        0x00000008 },
 183                 { AUD_DN0_FREQ,                0x0000283b },
 184                 { AUD_DN2_SRC_SEL,             0x00000008 },
 185                 { AUD_DN2_FREQ,                0x00003000 },
 186                 { AUD_DN2_AFC,                 0x00000002 },
 187                 { AUD_DN2_SHFT,                0x00000000 },
 188                 { AUD_IIR2_2_SEL,              0x00000020 },
 189                 { AUD_IIR2_2_SHIFT,            0x00000000 },
 190                 { AUD_IIR2_3_SEL,              0x0000001f },
 191                 { AUD_IIR2_3_SHIFT,            0x00000000 },
 192                 { AUD_CRDC1_SRC_SEL,           0x000003ce },
 193                 { AUD_CRDC1_SHIFT,             0x00000000 },
 194                 { AUD_CORDIC_SHIFT_1,          0x00000007 },
 195                 { AUD_DCOC_1_SRC,              0x0000001b },
 196                 { AUD_DCOC1_SHIFT,             0x00000000 },
 197                 { AUD_RDSI_SEL,                0x00000008 },
 198                 { AUD_RDSQ_SEL,                0x00000008 },
 199                 { AUD_RDSI_SHIFT,              0x00000000 },
 200                 { AUD_RDSQ_SHIFT,              0x00000000 },
 201                 { AUD_POLYPH80SCALEFAC,        0x00000003 },
 202                 { /* end of list */ },
 203         };
 204         static const struct rlist btsc_sap[] = {
 205         { AUD_AFE_12DB_EN,             0x00000001 },
 206                 { AUD_DBX_IN_GAIN,             0x00007200 },
 207                 { AUD_DBX_WBE_GAIN,            0x00006200 },
 208                 { AUD_DBX_SE_GAIN,             0x00006200 },
 209                 { AUD_IIR1_1_SEL,              0x00000000 },
 210                 { AUD_IIR1_3_SEL,              0x00000001 },
 211                 { AUD_DN1_SRC_SEL,             0x00000007 },
 212                 { AUD_IIR1_4_SHIFT,            0x00000006 },
 213                 { AUD_IIR2_1_SHIFT,            0x00000000 },
 214                 { AUD_IIR2_2_SHIFT,            0x00000000 },
 215                 { AUD_IIR3_0_SHIFT,            0x00000000 },
 216                 { AUD_IIR3_1_SHIFT,            0x00000000 },
 217                 { AUD_IIR3_0_SEL,              0x0000000d },
 218                 { AUD_IIR3_1_SEL,              0x0000000e },
 219                 { AUD_DEEMPH1_SRC_SEL,         0x00000014 },
 220                 { AUD_DEEMPH1_SHIFT,           0x00000000 },
 221                 { AUD_DEEMPH1_G0,              0x00004000 },
 222                 { AUD_DEEMPH1_A0,              0x00000000 },
 223                 { AUD_DEEMPH1_B0,              0x00000000 },
 224                 { AUD_DEEMPH1_A1,              0x00000000 },
 225                 { AUD_DEEMPH1_B1,              0x00000000 },
 226                 { AUD_OUT0_SEL,                0x0000003f },
 227                 { AUD_OUT1_SEL,                0x0000003f },
 228                 { AUD_DN1_AFC,                 0x00000002 },
 229                 { AUD_DCOC_0_SHIFT_IN0,        0x0000000a },
 230                 { AUD_DCOC_0_SHIFT_IN1,        0x00000008 },
 231                 { AUD_DCOC_1_SHIFT_IN0,        0x0000000a },
 232                 { AUD_DCOC_1_SHIFT_IN1,        0x00000008 },
 233                 { AUD_IIR1_0_SEL,              0x0000001d },
 234                 { AUD_IIR1_2_SEL,              0x0000001e },
 235                 { AUD_IIR2_1_SEL,              0x00000002 },
 236                 { AUD_IIR2_2_SEL,              0x00000004 },
 237                 { AUD_IIR3_2_SEL,              0x0000000f },
 238                 { AUD_DCOC2_SHIFT,             0x00000001 },
 239                 { AUD_IIR3_2_SHIFT,            0x00000001 },
 240                 { AUD_DEEMPH0_SRC_SEL,         0x00000014 },
 241                 { AUD_CORDIC_SHIFT_1,          0x00000006 },
 242                 { AUD_POLY0_DDS_CONSTANT,      0x000e4db2 },
 243                 { AUD_DMD_RA_DDS,              0x00f696e6 },
 244                 { AUD_IIR2_3_SEL,              0x00000025 },
 245                 { AUD_IIR1_4_SEL,              0x00000021 },
 246                 { AUD_DN1_FREQ,                0x0000c965 },
 247                 { AUD_DCOC_PASS_IN,            0x00000003 },
 248                 { AUD_DCOC_0_SRC,              0x0000001a },
 249                 { AUD_DCOC_1_SRC,              0x0000001b },
 250                 { AUD_DCOC1_SHIFT,             0x00000000 },
 251                 { AUD_RDSI_SEL,                0x00000009 },
 252                 { AUD_RDSQ_SEL,                0x00000009 },
 253                 { AUD_RDSI_SHIFT,              0x00000000 },
 254                 { AUD_RDSQ_SHIFT,              0x00000000 },
 255                 { AUD_POLYPH80SCALEFAC,        0x00000003 },
 256                 { /* end of list */ },
 257         };
 258
 259         mode |= EN_FMRADIO_EN_RDS;
 260
 261         if (sap) {
 262                 dprintk("%s SAP (status: unknown)\n",__FUNCTION__);
 263         set_audio_start(core, SEL_SAP);
 264                 set_audio_registers(core, btsc_sap);
 265                 set_audio_finish(core, mode);
 266         } else {
 267                 dprintk("%s (status: known-good)\n",__FUNCTION__);
 268         set_audio_start(core, SEL_BTSC);
 269                 set_audio_registers(core, btsc);
 270                 set_audio_finish(core, mode);
 271         }
 272 }
 273
 274
 275 static void set_audio_standard_NICAM_L(struct cx88_core *core, int stereo)
 276 {
 277         /* This is probably weird..
 278         * Let's operate and find out. */
 279
 280         static const struct rlist nicam_l_mono[] = {
 281                 { AUD_ERRLOGPERIOD_R,     0x00000064 },
 282                 { AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF },
 283                 { AUD_ERRINTRPTTHSHLD2_R, 0x0000001F },
 284                 { AUD_ERRINTRPTTHSHLD3_R, 0x0000000F },
 285
 286                 { AUD_PDF_DDS_CNST_BYTE2, 0x48 },
 287                 { AUD_PDF_DDS_CNST_BYTE1, 0x3D },
 288                 { AUD_QAM_MODE,           0x00 },
 289                 { AUD_PDF_DDS_CNST_BYTE0, 0xf5 },
 290                 { AUD_PHACC_FREQ_8MSB,    0x3a },
 291                 { AUD_PHACC_FREQ_8LSB,    0x4a },
 292
 293                 { AUD_DEEMPHGAIN_R, 0x6680 },
 294                 { AUD_DEEMPHNUMER1_R, 0x353DE },
 295                 { AUD_DEEMPHNUMER2_R, 0x1B1 },
 296                 { AUD_DEEMPHDENOM1_R, 0x0F3D0 },
 297                 { AUD_DEEMPHDENOM2_R, 0x0 },
 298                 { AUD_FM_MODE_ENABLE, 0x7 },
 299                 { AUD_POLYPH80SCALEFAC, 0x3 },
 300                 { AUD_AFE_12DB_EN, 0x1 },
 301                 { AAGC_GAIN, 0x0 },
 302                 { AAGC_HYST, 0x18 },
 303                 { AAGC_DEF, 0x20 },
 304                 { AUD_DN0_FREQ, 0x0 },
 305                 { AUD_POLY0_DDS_CONSTANT, 0x0E4DB2 },
 306                 { AUD_DCOC_0_SRC, 0x21 },
 307                 { AUD_IIR1_0_SEL, 0x0 },
 308                 { AUD_IIR1_0_SHIFT, 0x7 },
 309                 { AUD_IIR1_1_SEL, 0x2 },
 310                 { AUD_IIR1_1_SHIFT, 0x0 },
 311                 { AUD_DCOC_1_SRC, 0x3 },
 312                 { AUD_DCOC1_SHIFT, 0x0 },
 313                 { AUD_DCOC_PASS_IN, 0x0 },
 314                 { AUD_IIR1_2_SEL, 0x23 },
 315                 { AUD_IIR1_2_SHIFT, 0x0 },
 316                 { AUD_IIR1_3_SEL, 0x4 },
 317                 { AUD_IIR1_3_SHIFT, 0x7 },
 318                 { AUD_IIR1_4_SEL, 0x5 },
 319                 { AUD_IIR1_4_SHIFT, 0x7 },
 320                 { AUD_IIR3_0_SEL, 0x7 },
 321                 { AUD_IIR3_0_SHIFT, 0x0 },
 322                 { AUD_DEEMPH0_SRC_SEL, 0x11 },
 323                 { AUD_DEEMPH0_SHIFT, 0x0 },
 324                 { AUD_DEEMPH0_G0, 0x7000 },
 325                 { AUD_DEEMPH0_A0, 0x0 },
 326                 { AUD_DEEMPH0_B0, 0x0 },
 327                 { AUD_DEEMPH0_A1, 0x0 },
 328                 { AUD_DEEMPH0_B1, 0x0 },
 329                 { AUD_DEEMPH1_SRC_SEL, 0x11 },
 330                 { AUD_DEEMPH1_SHIFT, 0x0 },
 331                 { AUD_DEEMPH1_G0, 0x7000 },
 332                 { AUD_DEEMPH1_A0, 0x0 },
 333                 { AUD_DEEMPH1_B0, 0x0 },
 334                 { AUD_DEEMPH1_A1, 0x0 },
 335                 { AUD_DEEMPH1_B1, 0x0 },
 336                 { AUD_OUT0_SEL, 0x3F },
 337                 { AUD_OUT1_SEL, 0x3F },
 338                 { AUD_DMD_RA_DDS, 0x0F5C285 },
 339                 { AUD_PLL_INT, 0x1E },
 340                 { AUD_PLL_DDS, 0x0 },
 341                 { AUD_PLL_FRAC, 0x0E542 },
 342
 343                 // setup QAM registers
 344                 { AUD_RATE_ADJ1,      0x00000100 },
 345                 { AUD_RATE_ADJ2,      0x00000200 },
 346                 { AUD_RATE_ADJ3,      0x00000300 },
 347                 { AUD_RATE_ADJ4,      0x00000400 },
 348                 { AUD_RATE_ADJ5,      0x00000500 },
 349                 { AUD_RATE_THRES_DMD, 0x000000C0 },
 350                 { /* end of list */ },
 351         };
 352
 353         static const struct rlist nicam_l[] = {
 354                 // setup QAM registers
 355                 { AUD_RATE_ADJ1, 0x00000060 },
 356                 { AUD_RATE_ADJ2, 0x000000F9 },
 357                 { AUD_RATE_ADJ3, 0x000001CC },
 358                 { AUD_RATE_ADJ4, 0x000002B3 },
 359                 { AUD_RATE_ADJ5, 0x00000726 },
 360                 { AUD_DEEMPHDENOM1_R, 0x0000F3D0 },
 361                 { AUD_DEEMPHDENOM2_R, 0x00000000 },
 362                 { AUD_ERRLOGPERIOD_R, 0x00000064 },
 363                 { AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF },
 364                 { AUD_ERRINTRPTTHSHLD2_R, 0x0000001F },
 365                 { AUD_ERRINTRPTTHSHLD3_R, 0x0000000F },
 366                 { AUD_POLYPH80SCALEFAC, 0x00000003 },
 367                 { AUD_DMD_RA_DDS, 0x00C00000 },
 368                 { AUD_PLL_INT, 0x0000001E },
 369                 { AUD_PLL_DDS, 0x00000000 },
 370                 { AUD_PLL_FRAC, 0x0000E542 },
 371                 { AUD_START_TIMER, 0x00000000 },
 372                 { AUD_DEEMPHNUMER1_R, 0x000353DE },
 373                 { AUD_DEEMPHNUMER2_R, 0x000001B1 },
 374                 { AUD_PDF_DDS_CNST_BYTE2, 0x06 },
 375                 { AUD_PDF_DDS_CNST_BYTE1, 0x82 },
 376                 { AUD_QAM_MODE, 0x05 },
 377                 { AUD_PDF_DDS_CNST_BYTE0, 0x12 },
 378                 { AUD_PHACC_FREQ_8MSB, 0x34 },
 379                 { AUD_PHACC_FREQ_8LSB, 0x4C },
 380                 { AUD_DEEMPHGAIN_R, 0x00006680 },
 381                 { AUD_RATE_THRES_DMD, 0x000000C0  },
 382                 { /* end of list */ },
 383         } ;
 384         dprintk("%s (status: devel), stereo : %d\n",__FUNCTION__,stereo);
 385
 386         if (!stereo) {
 387         /* AM Mono */
 388                 set_audio_start(core, SEL_A2);
 389                 set_audio_registers(core, nicam_l_mono);
 390         set_audio_finish(core, EN_A2_FORCE_MONO1);
 391         } else {
 392         /* Nicam Stereo */
 393                 set_audio_start(core, SEL_NICAM);
 394                 set_audio_registers(core, nicam_l);
 395         set_audio_finish(core, 0x1924); /* FIXME */
 396         }
 397 }
 398
 399 static void set_audio_standard_PAL_I(struct cx88_core *core, int stereo)
 400 {
 401        static const struct rlist pal_i_fm_mono[] = {
 402         {AUD_ERRLOGPERIOD_R,       0x00000064},
 403         {AUD_ERRINTRPTTHSHLD1_R,   0x00000fff},
 404         {AUD_ERRINTRPTTHSHLD2_R,   0x0000001f},
 405         {AUD_ERRINTRPTTHSHLD3_R,   0x0000000f},
 406         {AUD_PDF_DDS_CNST_BYTE2,   0x06},
 407         {AUD_PDF_DDS_CNST_BYTE1,   0x82},
 408         {AUD_PDF_DDS_CNST_BYTE0,   0x12},
 409         {AUD_QAM_MODE,             0x05},
 410         {AUD_PHACC_FREQ_8MSB,      0x3a},
 411         {AUD_PHACC_FREQ_8LSB,      0x93},
 412         {AUD_DMD_RA_DDS,           0x002a4f2f},
 413         {AUD_PLL_INT,              0x0000001e},
 414         {AUD_PLL_DDS,              0x00000004},
 415         {AUD_PLL_FRAC,             0x0000e542},
 416         {AUD_RATE_ADJ1,            0x00000100},
 417         {AUD_RATE_ADJ2,            0x00000200},
 418         {AUD_RATE_ADJ3,            0x00000300},
 419         {AUD_RATE_ADJ4,            0x00000400},
 420         {AUD_RATE_ADJ5,            0x00000500},
 421         {AUD_THR_FR,               0x00000000},
 422         {AUD_PILOT_BQD_1_K0,       0x0000755b},
 423         {AUD_PILOT_BQD_1_K1,       0x00551340},
 424         {AUD_PILOT_BQD_1_K2,       0x006d30be},
 425         {AUD_PILOT_BQD_1_K3,       0xffd394af},
 426         {AUD_PILOT_BQD_1_K4,       0x00400000},
 427         {AUD_PILOT_BQD_2_K0,       0x00040000},
 428         {AUD_PILOT_BQD_2_K1,       0x002a4841},
 429         {AUD_PILOT_BQD_2_K2,       0x00400000},
 430         {AUD_PILOT_BQD_2_K3,       0x00000000},
 431         {AUD_PILOT_BQD_2_K4,       0x00000000},
 432         {AUD_MODE_CHG_TIMER,       0x00000060},
 433         {AUD_AFE_12DB_EN,          0x00000001},
 434         {AAGC_HYST,                0x0000000a},
 435         {AUD_CORDIC_SHIFT_0,       0x00000007},
 436         {AUD_CORDIC_SHIFT_1,       0x00000007},
 437         {AUD_C1_UP_THR,            0x00007000},
 438         {AUD_C1_LO_THR,            0x00005400},
 439         {AUD_C2_UP_THR,            0x00005400},
 440         {AUD_C2_LO_THR,            0x00003000},
 441         {AUD_DCOC_0_SRC,           0x0000001a},
 442         {AUD_DCOC0_SHIFT,          0x00000000},
 443         {AUD_DCOC_0_SHIFT_IN0,     0x0000000a},
 444         {AUD_DCOC_0_SHIFT_IN1,     0x00000008},
 445         {AUD_DCOC_PASS_IN,         0x00000003},
 446         {AUD_IIR3_0_SEL,           0x00000021},
 447         {AUD_DN2_AFC,              0x00000002},
 448         {AUD_DCOC_1_SRC,           0x0000001b},
 449         {AUD_DCOC1_SHIFT,          0x00000000},
 450         {AUD_DCOC_1_SHIFT_IN0,     0x0000000a},
 451         {AUD_DCOC_1_SHIFT_IN1,     0x00000008},
 452         {AUD_IIR3_1_SEL,           0x00000023},
 453         {AUD_DN0_FREQ,             0x000035a3},
 454         {AUD_DN2_FREQ,             0x000029c7},
 455         {AUD_CRDC0_SRC_SEL,        0x00000511},
 456         {AUD_IIR1_0_SEL,           0x00000001},
 457         {AUD_IIR1_1_SEL,           0x00000000},
 458         {AUD_IIR3_2_SEL,           0x00000003},
 459         {AUD_IIR3_2_SHIFT,         0x00000000},
 460         {AUD_IIR3_0_SEL,           0x00000002},
 461         {AUD_IIR2_0_SEL,           0x00000021},
 462         {AUD_IIR2_0_SHIFT,         0x00000002},
 463         {AUD_DEEMPH0_SRC_SEL,      0x0000000b},
 464         {AUD_DEEMPH1_SRC_SEL,      0x0000000b},
 465         {AUD_POLYPH80SCALEFAC,     0x00000001},
 466         {AUD_START_TIMER,          0x00000000},
 467         { /* end of list */ },
 468        };
 469
 470        static const struct rlist pal_i_nicam[] = {
 471         { AUD_RATE_ADJ1,           0x00000010 },
 472         { AUD_RATE_ADJ2,           0x00000040 },
 473         { AUD_RATE_ADJ3,           0x00000100 },
 474         { AUD_RATE_ADJ4,           0x00000400 },
 475         { AUD_RATE_ADJ5,           0x00001000 },
 476         //     { AUD_DMD_RA_DDS,          0x00c0d5ce },
 477         { AUD_DEEMPHGAIN_R,        0x000023c2 },
 478         { AUD_DEEMPHNUMER1_R,      0x0002a7bc },
 479         { AUD_DEEMPHNUMER2_R,      0x0003023e },
 480         { AUD_DEEMPHDENOM1_R,      0x0000f3d0 },
 481         { AUD_DEEMPHDENOM2_R,      0x00000000 },
 482         { AUD_DEEMPHDENOM2_R,      0x00000000 },
 483         { AUD_ERRLOGPERIOD_R,      0x00000fff },
 484         { AUD_ERRINTRPTTHSHLD1_R,  0x000003ff },
 485         { AUD_ERRINTRPTTHSHLD2_R,  0x000000ff },
 486         { AUD_ERRINTRPTTHSHLD3_R,  0x0000003f },
 487         { AUD_POLYPH80SCALEFAC,    0x00000003 },
 488         { AUD_PDF_DDS_CNST_BYTE2,  0x06 },
 489         { AUD_PDF_DDS_CNST_BYTE1,  0x82 },
 490         { AUD_PDF_DDS_CNST_BYTE0,  0x16 },
 491         { AUD_QAM_MODE,            0x05 },
 492         { AUD_PDF_DDS_CNST_BYTE0,  0x12 },
 493         { AUD_PHACC_FREQ_8MSB,     0x3a },
 494         { AUD_PHACC_FREQ_8LSB,     0x93 },
 495         { /* end of list */ },
 496         };
 497
 498         dprintk("%s (status: devel), stereo : %d\n",__FUNCTION__,stereo);
 499
 500         if (!stereo) {
 501         /* FM Mono */
 502         set_audio_start(core, SEL_A2);
 503                 set_audio_registers(core, pal_i_fm_mono);
 504                 set_audio_finish(core, EN_DMTRX_SUMDIFF | EN_A2_FORCE_MONO1);
 505         } else {
 506         /* Nicam Stereo */
 507         set_audio_start(core, SEL_NICAM);
 508                 set_audio_registers(core, pal_i_nicam);
 509                 set_audio_finish(core, EN_DMTRX_LR | EN_DMTRX_BYPASS | EN_NICAM_AUTO_STEREO);
 510         }
 511 }
 512
 513 static void set_audio_standard_A2(struct cx88_core *core, u32 mode)
 514 {
 515         static const struct rlist a2_common[] = {
 516         {AUD_ERRLOGPERIOD_R,            0x00000064},
 517         {AUD_ERRINTRPTTHSHLD1_R,        0x00000fff},
 518         {AUD_ERRINTRPTTHSHLD2_R,        0x0000001f},
 519         {AUD_ERRINTRPTTHSHLD3_R,        0x0000000f},
 520         {AUD_PDF_DDS_CNST_BYTE2,        0x06},
 521         {AUD_PDF_DDS_CNST_BYTE1,        0x82},
 522         {AUD_PDF_DDS_CNST_BYTE0,        0x12},
 523         {AUD_QAM_MODE,                  0x05},
 524         {AUD_PHACC_FREQ_8MSB,           0x34},
 525         {AUD_PHACC_FREQ_8LSB,           0x4c},
 526         {AUD_RATE_ADJ1,                 0x00000100},
 527         {AUD_RATE_ADJ2,                 0x00000200},
 528         {AUD_RATE_ADJ3,                 0x00000300},
 529         {AUD_RATE_ADJ4,                 0x00000400},
 530         {AUD_RATE_ADJ5,                 0x00000500},
 531         {AUD_THR_FR,                    0x00000000},
 532         {AAGC_HYST,                     0x0000001a},
 533         {AUD_PILOT_BQD_1_K0,            0x0000755b},
 534         {AUD_PILOT_BQD_1_K1,            0x00551340},
 535         {AUD_PILOT_BQD_1_K2,            0x006d30be},
 536         {AUD_PILOT_BQD_1_K3,            0xffd394af},
 537         {AUD_PILOT_BQD_1_K4,            0x00400000},
 538         {AUD_PILOT_BQD_2_K0,            0x00040000},
 539         {AUD_PILOT_BQD_2_K1,            0x002a4841},
 540         {AUD_PILOT_BQD_2_K2,            0x00400000},
 541         {AUD_PILOT_BQD_2_K3,            0x00000000},
 542         {AUD_PILOT_BQD_2_K4,            0x00000000},
 543         {AUD_MODE_CHG_TIMER,            0x00000040},
 544         {AUD_AFE_12DB_EN,               0x00000001},
 545         {AUD_CORDIC_SHIFT_0,            0x00000007},
 546         {AUD_CORDIC_SHIFT_1,            0x00000007},
 547         {AUD_DEEMPH0_G0,                0x00000380},
 548         {AUD_DEEMPH1_G0,                0x00000380},
 549         {AUD_DCOC_0_SRC,                0x0000001a},
 550         {AUD_DCOC0_SHIFT,               0x00000000},
 551         {AUD_DCOC_0_SHIFT_IN0,          0x0000000a},
 552         {AUD_DCOC_0_SHIFT_IN1,          0x00000008},
 553         {AUD_DCOC_PASS_IN,              0x00000003},
 554         {AUD_IIR3_0_SEL,                0x00000021},
 555         {AUD_DN2_AFC,                   0x00000002},
 556         {AUD_DCOC_1_SRC,                0x0000001b},
 557         {AUD_DCOC1_SHIFT,               0x00000000},
 558         {AUD_DCOC_1_SHIFT_IN0,          0x0000000a},
 559         {AUD_DCOC_1_SHIFT_IN1,          0x00000008},
 560         {AUD_IIR3_1_SEL,                0x00000023},
 561         {AUD_RDSI_SEL,                  0x00000017},
 562         {AUD_RDSI_SHIFT,                0x00000000},
 563         {AUD_RDSQ_SEL,                  0x00000017},
 564         {AUD_RDSQ_SHIFT,                0x00000000},
 565         {AUD_PLL_INT,                   0x0000001e},
 566         {AUD_PLL_DDS,                   0x00000000},
 567         {AUD_PLL_FRAC,                  0x0000e542},
 568         {AUD_POLYPH80SCALEFAC,          0x00000001},
 569         {AUD_START_TIMER,               0x00000000},
 570         { /* end of list */ },
 571         };
 572
 573         static const struct rlist a2_bg[] = {
 574         {AUD_DMD_RA_DDS,                0x002a4f2f},
 575         {AUD_C1_UP_THR,                 0x00007000},
 576         {AUD_C1_LO_THR,                 0x00005400},
 577         {AUD_C2_UP_THR,                 0x00005400},
 578         {AUD_C2_LO_THR,                 0x00003000},
 579                 { /* end of list */ },
 580         };
 581
 582         static const struct rlist a2_dk[] = {
 583         {AUD_DMD_RA_DDS,                0x002a4f2f},
 584         {AUD_C1_UP_THR,                 0x00007000},
 585         {AUD_C1_LO_THR,                 0x00005400},
 586         {AUD_C2_UP_THR,                 0x00005400},
 587         {AUD_C2_LO_THR,                 0x00003000},
 588         {AUD_DN0_FREQ,                  0x00003a1c},
 589         {AUD_DN2_FREQ,                  0x0000d2e0},
 590                 { /* end of list */ },
 591         };
 592 /* unknown, probably NTSC-M */
 593         static const struct rlist a2_m[] = {
 594         {AUD_DMD_RA_DDS,                0x002a0425},
 595         {AUD_C1_UP_THR,                 0x00003c00},
 596         {AUD_C1_LO_THR,                 0x00003000},
 597         {AUD_C2_UP_THR,                 0x00006000},
 598         {AUD_C2_LO_THR,                 0x00003c00},
 599         {AUD_DEEMPH0_A0,                0x00007a80},
 600         {AUD_DEEMPH1_A0,                0x00007a80},
 601         {AUD_DEEMPH0_G0,                0x00001200},
 602         {AUD_DEEMPH1_G0,                0x00001200},
 603         {AUD_DN0_FREQ,                  0x0000283b},
 604         {AUD_DN1_FREQ,                  0x00003418},
 605         {AUD_DN2_FREQ,                  0x000029c7},
 606         {AUD_POLY0_DDS_CONSTANT,        0x000a7540},
 607                 { /* end of list */ },
 608         };
 609
 610         static const struct rlist a2_deemph50[] = {
 611         {AUD_DEEMPH0_G0,                0x00000380},
 612         {AUD_DEEMPH1_G0,                0x00000380},
 613         {AUD_DEEMPHGAIN_R,              0x000011e1},
 614         {AUD_DEEMPHNUMER1_R,            0x0002a7bc},
 615         {AUD_DEEMPHNUMER2_R,            0x0003023c},
 616         { /* end of list */ },
 617         };
 618
 619         static const struct rlist a2_deemph75[] = {
 620         {AUD_DEEMPH0_G0,                0x00000480},
 621         {AUD_DEEMPH1_G0,                0x00000480},
 622         {AUD_DEEMPHGAIN_R,              0x00009000},
 623         {AUD_DEEMPHNUMER1_R,            0x000353de},
 624         {AUD_DEEMPHNUMER2_R,            0x000001b1},
 625                 { /* end of list */ },
 626         };
 627
 628         set_audio_start(core, SEL_A2);
 629         set_audio_registers(core, a2_common);
 630         switch (core->tvaudio) {
 631         case WW_A2_BG:
 632                 dprintk("%s PAL-BG A2 (status: known-good)\n",__FUNCTION__);
 633         set_audio_registers(core, a2_bg);
 634         set_audio_registers(core, a2_deemph50);
 635                 break;
 636         case WW_A2_DK:
 637                 dprintk("%s PAL-DK A2 (status: known-good)\n",__FUNCTION__);
 638         set_audio_registers(core, a2_dk);
 639         set_audio_registers(core, a2_deemph50);
 640                 break;
 641         case WW_A2_M:
 642                 dprintk("%s NTSC-M A2 (status: unknown)\n",__FUNCTION__);
 643         set_audio_registers(core, a2_m);
 644         set_audio_registers(core, a2_deemph75);
 645                 break;
 646         };
 647
 648         mode |= EN_FMRADIO_EN_RDS | EN_DMTRX_SUMDIFF;
 649         set_audio_finish(core, mode);
 650 }
 651
 652 static void set_audio_standard_EIAJ(struct cx88_core *core)
 653 {
 654         static const struct rlist eiaj[] = {
 655                 /* TODO: eiaj register settings are not there yet ... */
 656
 657                 { /* end of list */ },
 658         };
 659         dprintk("%s (status: unknown)\n",__FUNCTION__);
 660
 661         set_audio_start(core, SEL_EIAJ);
 662         set_audio_registers(core, eiaj);
 663         set_audio_finish(core, EN_EIAJ_AUTO_STEREO);
 664 }
 665
 666 static void set_audio_standard_FM(struct cx88_core *core, enum cx88_deemph_type deemph)
 667 {
 668         static const struct rlist fm_deemph_50[] = {
 669                 { AUD_DEEMPH0_G0,       0x0C45 },
 670                 { AUD_DEEMPH0_A0,       0x6262 },
 671                 { AUD_DEEMPH0_B0,       0x1C29 },
 672                 { AUD_DEEMPH0_A1,       0x3FC66},
 673                 { AUD_DEEMPH0_B1,       0x399A },
 674
 675                 { AUD_DEEMPH1_G0,       0x0D80 },
 676                 { AUD_DEEMPH1_A0,       0x6262 },
 677                 { AUD_DEEMPH1_B0,       0x1C29 },
 678                 { AUD_DEEMPH1_A1,       0x3FC66},
 679                 { AUD_DEEMPH1_B1,       0x399A},
 680
 681                 { AUD_POLYPH80SCALEFAC, 0x0003},
 682                 { /* end of list */ },
 683         };
 684         static const struct rlist fm_deemph_75[] = {
 685                 { AUD_DEEMPH0_G0,       0x091B },
 686                 { AUD_DEEMPH0_A0,       0x6B68 },
 687                 { AUD_DEEMPH0_B0,       0x11EC },
 688                 { AUD_DEEMPH0_A1,       0x3FC66},
 689                 { AUD_DEEMPH0_B1,       0x399A },
 690
 691                 { AUD_DEEMPH1_G0,       0x0AA0 },
 692                 { AUD_DEEMPH1_A0,       0x6B68 },
 693                 { AUD_DEEMPH1_B0,       0x11EC },
 694                 { AUD_DEEMPH1_A1,       0x3FC66},
 695                 { AUD_DEEMPH1_B1,       0x399A},
 696
 697                 { AUD_POLYPH80SCALEFAC, 0x0003},
 698                 { /* end of list */ },
 699         };
 700
 701         /* It is enough to leave default values? */
 702         static const struct rlist fm_no_deemph[] = {
 703
 704                 { AUD_POLYPH80SCALEFAC, 0x0003},
 705                 { /* end of list */ },
 706         };
 707
 708         dprintk("%s (status: unknown)\n",__FUNCTION__);
 709         set_audio_start(core, SEL_FMRADIO);
 710
 711         switch (deemph)
 712         {
 713                 case FM_NO_DEEMPH:
 714                         set_audio_registers(core, fm_no_deemph);
 715                         break;
 716
 717                 case FM_DEEMPH_50:
 718                         set_audio_registers(core, fm_deemph_50);
 719                         break;
 720
 721                 case FM_DEEMPH_75:
 722                         set_audio_registers(core, fm_deemph_75);
 723                         break;
 724         }
 725
 726         set_audio_finish(core, EN_FMRADIO_AUTO_STEREO);
 727 }
 728
 729 /* ----------------------------------------------------------- */
 730
 731 void cx88_set_tvaudio(struct cx88_core *core)
 732 {
 733         switch (core->tvaudio) {
 734         case WW_BTSC:
 735                 set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
 736                 break;
 737         case WW_NICAM_BGDKL:
 738                 set_audio_standard_NICAM_L(core,0);
 739                 break;
 740         case WW_NICAM_I:
 741                 set_audio_standard_PAL_I(core,0);
 742                 break;
 743         case WW_A2_BG:
 744         case WW_A2_DK:
 745         case WW_A2_M:
 746         set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
 747                 break;
 748         case WW_EIAJ:
 749                 set_audio_standard_EIAJ(core);
 750                 break;
 751         case WW_FM:
 752                 set_audio_standard_FM(core,FM_NO_DEEMPH);
 753                 break;
 754         case WW_SYSTEM_L_AM:
 755                 set_audio_standard_NICAM_L(core, 1);
 756                 break;
 757         case WW_NONE:
 758         default:
 759                 printk("%s/0: unknown tv audio mode [%d]\n",
 760                 core->name, core->tvaudio);
 761                 break;
 762         }
 763         return;
 764 }
 765
 766 void cx88_newstation(struct cx88_core *core)
 767 {
 768         core->audiomode_manual = UNSET;
 769
 770         switch (core->tvaudio) {
 771         case WW_SYSTEM_L_AM:
 772                 /* try nicam ... */
 773                 core->audiomode_current = V4L2_TUNER_MODE_STEREO;
 774                 set_audio_standard_NICAM_L(core, 1);
 775                 break;
 776         }
 777 }
 778
 779 void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t)
 780 {
 781         static char *m[] = {"stereo", "dual mono", "mono", "sap"};
 782         static char *p[] = {"no pilot", "pilot c1", "pilot c2", "?"};
 783         u32 reg,mode,pilot;
 784
 785         reg   = cx_read(AUD_STATUS);
 786         mode  = reg & 0x03;
 787         pilot = (reg >> 2) & 0x03;
 788
 789         if (core->astat != reg)
 790                 dprintk("AUD_STATUS: 0x%x [%s/%s] ctl=%s\n",
 791                         reg, m[mode], p[pilot],
 792                         aud_ctl_names[cx_read(AUD_CTL) & 63]);
 793         core->astat = reg;
 794
 795 /* TODO
 796        Reading from AUD_STATUS is not enough
 797        for auto-detecting sap/dual-fm/nicam.
 798        Add some code here later.
 799 */
 800
 801 # if 0
 802         t->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_SAP |
 803                 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
 804         t->rxsubchans = V4L2_TUNER_SUB_MONO;
 805         t->audmode    = V4L2_TUNER_MODE_MONO;
 806
 807         switch (core->tvaudio) {
 808         case WW_BTSC:
 809                 t->capability = V4L2_TUNER_CAP_STEREO |
 810                         V4L2_TUNER_CAP_SAP;
 811                 t->rxsubchans = V4L2_TUNER_SUB_STEREO;
 812                 if (1 == pilot) {
 813                         /* SAP */
 814                         t->rxsubchans |= V4L2_TUNER_SUB_SAP;
 815                 }
 816                 break;
 817         case WW_A2_BG:
 818         case WW_A2_DK:
 819         case WW_A2_M:
 820                 if (1 == pilot) {
 821                         /* stereo */
 822                         t->rxsubchans = V4L2_TUNER_SUB_MONO | V4L2_TUNER_SUB_STEREO;
 823                         if (0 == mode)
 824                                 t->audmode = V4L2_TUNER_MODE_STEREO;
 825                 }
 826                 if (2 == pilot) {
 827                         /* dual language -- FIXME */
 828                         t->rxsubchans = V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
 829                         t->audmode = V4L2_TUNER_MODE_LANG1;
 830                 }
 831                 break;
 832         case WW_NICAM_BGDKL:
 833                 if (0 == mode) {
 834                         t->audmode = V4L2_TUNER_MODE_STEREO;
 835                         t->rxsubchans |= V4L2_TUNER_SUB_STEREO;
 836                 }
 837                 break;
 838         case WW_SYSTEM_L_AM:
 839                 if (0x0 == mode && !(cx_read(AUD_INIT) & 0x04)) {
 840                         t->audmode = V4L2_TUNER_MODE_STEREO;
 841                         t->rxsubchans |= V4L2_TUNER_SUB_STEREO;
 842                 }
 843                 break ;
 844         default:
 845                 /* nothing */
 846                 break;
 847         }
 848 # endif
 849         return;
 850 }
 851
 852 void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual)
 853 {
 854         u32 ctl  = UNSET;
 855         u32 mask = UNSET;
 856
 857         if (manual) {
 858                 core->audiomode_manual = mode;
 859         } else {
 860                 if (UNSET != core->audiomode_manual)
 861                         return;
 862         }
 863         core->audiomode_current = mode;
 864
 865         switch (core->tvaudio) {
 866         case WW_BTSC:
 867                 switch (mode) {
 868                 case V4L2_TUNER_MODE_MONO:
 869                         set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_MONO);
 870                         break;
 871                 case V4L2_TUNER_MODE_LANG1:
 872                         set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
 873                         break;
 874                 case V4L2_TUNER_MODE_LANG2:
 875                         set_audio_standard_BTSC(core, 1, EN_BTSC_FORCE_SAP);
 876                         break;
 877                 case V4L2_TUNER_MODE_STEREO:
 878                         set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_STEREO);
 879                         break;
 880                 }
 881                 break;
 882         case WW_A2_BG:
 883         case WW_A2_DK:
 884         case WW_A2_M:
 885                 switch (mode) {
 886                 case V4L2_TUNER_MODE_MONO:
 887                 case V4L2_TUNER_MODE_LANG1:
 888                 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
 889                         break;
 890                 case V4L2_TUNER_MODE_LANG2:
 891                 set_audio_standard_A2(core, EN_A2_FORCE_MONO2);
 892                         break;
 893                 case V4L2_TUNER_MODE_STEREO:
 894                 set_audio_standard_A2(core, EN_A2_FORCE_STEREO);
 895                         break;
 896                 }
 897                 break;
 898         case WW_NICAM_BGDKL:
 899                 switch (mode) {
 900                 case V4L2_TUNER_MODE_MONO:
 901                         ctl  = EN_NICAM_FORCE_MONO1;
 902                         mask = 0x3f;
 903                         break;
 904                 case V4L2_TUNER_MODE_LANG1:
 905                         ctl  = EN_NICAM_AUTO_MONO2;
 906                         mask = 0x3f;
 907                         break;
 908                 case V4L2_TUNER_MODE_STEREO:
 909                         ctl  = EN_NICAM_FORCE_STEREO | EN_DMTRX_LR;
 910                         mask = 0x93f;
 911                         break;
 912                 }
 913                 break;
 914         case WW_SYSTEM_L_AM:
 915                 switch (mode) {
 916                 case V4L2_TUNER_MODE_MONO:
 917                 case V4L2_TUNER_MODE_LANG1:  /* FIXME */
 918                         set_audio_standard_NICAM_L(core, 0);
 919                         break;
 920                 case V4L2_TUNER_MODE_STEREO:
 921                         set_audio_standard_NICAM_L(core, 1);
 922                         break;
 923                 }
 924                 break;
 925         case WW_NICAM_I:
 926                 switch (mode) {
 927                 case V4L2_TUNER_MODE_MONO:
 928                 case V4L2_TUNER_MODE_LANG1:
 929                         set_audio_standard_PAL_I(core, 0);
 930                         break;
 931                 case V4L2_TUNER_MODE_STEREO:
 932                         set_audio_standard_PAL_I(core, 1);
 933                         break;
 934                 }
 935                 break;
 936         case WW_FM:
 937                 switch (mode) {
 938                 case V4L2_TUNER_MODE_MONO:
 939                         ctl  = EN_FMRADIO_FORCE_MONO;
 940                         mask = 0x3f;
 941                         break;
 942                 case V4L2_TUNER_MODE_STEREO:
 943                         ctl  = EN_FMRADIO_AUTO_STEREO;
 944                         mask = 0x3f;
 945                         break;
 946                 }
 947                 break;
 948         }
 949
 950         if (UNSET != ctl) {
 951                 dprintk("cx88_set_stereo: mask 0x%x, ctl 0x%x "
 952                         "[status=0x%x,ctl=0x%x,vol=0x%x]\n",
 953                         mask, ctl, cx_read(AUD_STATUS),
 954                         cx_read(AUD_CTL), cx_sread(SHADOW_AUD_VOL_CTL));
 955                 cx_andor(AUD_CTL, mask, ctl);
 956         }
 957         return;
 958 }
 959
 960 int cx88_audio_thread(void *data)
 961 {
 962         struct cx88_core *core = data;
 963         struct v4l2_tuner t;
 964         u32 mode = 0;
 965
 966         dprintk("cx88: tvaudio thread started\n");
 967         for (;;) {
 968                 msleep_interruptible(1000);
 969                 if (kthread_should_stop())
 970                         break;
 971
 972                 /* just monitor the audio status for now ... */
 973                 memset(&t,0,sizeof(t));
 974                 cx88_get_stereo(core,&t);
 975
 976                 if (UNSET != core->audiomode_manual)
 977                         /* manually set, don't do anything. */
 978                         continue;
 979
 980                 /* monitor signal */
 981                 if (t.rxsubchans & V4L2_TUNER_SUB_STEREO)
 982                         mode = V4L2_TUNER_MODE_STEREO;
 983                 else
 984                         mode = V4L2_TUNER_MODE_MONO;
 985                 if (mode == core->audiomode_current)
 986                         continue;
 987
 988                 /* automatically switch to best available mode */
 989                 cx88_set_stereo(core, mode, 0);
 990         }
 991
 992         dprintk("cx88: tvaudio thread exiting\n");
 993         return 0;
 994 }
 995
 996 /* ----------------------------------------------------------- */
 997
 998 EXPORT_SYMBOL(cx88_set_tvaudio);
 999 EXPORT_SYMBOL(cx88_newstation);
1000 EXPORT_SYMBOL(cx88_set_stereo);
1001 EXPORT_SYMBOL(cx88_get_stereo);
1002 EXPORT_SYMBOL(cx88_audio_thread);
1003
1004 /*
1005  * Local variables:
1006  * c-basic-offset: 8
1007  * End:
1008  * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
1009  */