Merge branch 'linux-next' of git://git.infradead.org/ubi-2.6
[pandora-kernel.git] / drivers / media / video / cx23885 / cx23885.h
1 /*
2  *  Driver for the Conexant CX23885 PCIe bridge
3  *
4  *  Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5  *
6  *  This program is free software; you can redistribute it and/or modify
7  *  it under the terms of the GNU General Public License as published by
8  *  the Free Software Foundation; either version 2 of the License, or
9  *  (at your option) any later version.
10  *
11  *  This program is distributed in the hope that it will be useful,
12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *
15  *  GNU General Public License for more details.
16  *
17  *  You should have received a copy of the GNU General Public License
18  *  along with this program; if not, write to the Free Software
19  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20  */
21
22 #include <linux/pci.h>
23 #include <linux/i2c.h>
24 #include <linux/i2c-algo-bit.h>
25 #include <linux/kdev_t.h>
26
27 #include <media/v4l2-device.h>
28 #include <media/tuner.h>
29 #include <media/tveeprom.h>
30 #include <media/videobuf-dma-sg.h>
31 #include <media/videobuf-dvb.h>
32
33 #include "btcx-risc.h"
34 #include "cx23885-reg.h"
35 #include "media/cx2341x.h"
36
37 #include <linux/version.h>
38 #include <linux/mutex.h>
39
40 #define CX23885_VERSION_CODE KERNEL_VERSION(0, 0, 1)
41
42 #define UNSET (-1U)
43
44 #define CX23885_MAXBOARDS 8
45
46 /* Max number of inputs by card */
47 #define MAX_CX23885_INPUT 8
48 #define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
49 #define RESOURCE_OVERLAY       1
50 #define RESOURCE_VIDEO         2
51 #define RESOURCE_VBI           4
52
53 #define BUFFER_TIMEOUT     (HZ)  /* 0.5 seconds */
54
55 #define CX23885_BOARD_NOAUTO               UNSET
56 #define CX23885_BOARD_UNKNOWN                  0
57 #define CX23885_BOARD_HAUPPAUGE_HVR1800lp      1
58 #define CX23885_BOARD_HAUPPAUGE_HVR1800        2
59 #define CX23885_BOARD_HAUPPAUGE_HVR1250        3
60 #define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP   4
61 #define CX23885_BOARD_HAUPPAUGE_HVR1500Q       5
62 #define CX23885_BOARD_HAUPPAUGE_HVR1500        6
63 #define CX23885_BOARD_HAUPPAUGE_HVR1200        7
64 #define CX23885_BOARD_HAUPPAUGE_HVR1700        8
65 #define CX23885_BOARD_HAUPPAUGE_HVR1400        9
66 #define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
67 #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
68 #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
69 #define CX23885_BOARD_COMPRO_VIDEOMATE_E650F   13
70 #define CX23885_BOARD_TBS_6920                 14
71 #define CX23885_BOARD_TEVII_S470               15
72 #define CX23885_BOARD_DVBWORLD_2005            16
73 #define CX23885_BOARD_NETUP_DUAL_DVBS2_CI      17
74
75 /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
76 #define CX23885_NORMS (\
77         V4L2_STD_NTSC_M |  V4L2_STD_NTSC_M_JP |  V4L2_STD_NTSC_443 | \
78         V4L2_STD_PAL_BG |  V4L2_STD_PAL_DK    |  V4L2_STD_PAL_I    | \
79         V4L2_STD_PAL_M  |  V4L2_STD_PAL_N     |  V4L2_STD_PAL_Nc   | \
80         V4L2_STD_PAL_60 |  V4L2_STD_SECAM_L   |  V4L2_STD_SECAM_DK)
81
82 struct cx23885_fmt {
83         char  *name;
84         u32   fourcc;          /* v4l2 format id */
85         int   depth;
86         int   flags;
87         u32   cxformat;
88 };
89
90 struct cx23885_ctrl {
91         struct v4l2_queryctrl v;
92         u32                   off;
93         u32                   reg;
94         u32                   mask;
95         u32                   shift;
96 };
97
98 struct cx23885_tvnorm {
99         char            *name;
100         v4l2_std_id     id;
101         u32             cxiformat;
102         u32             cxoformat;
103 };
104
105 struct cx23885_fh {
106         struct cx23885_dev         *dev;
107         enum v4l2_buf_type         type;
108         int                        radio;
109         u32                        resources;
110
111         /* video overlay */
112         struct v4l2_window         win;
113         struct v4l2_clip           *clips;
114         unsigned int               nclips;
115
116         /* video capture */
117         struct cx23885_fmt         *fmt;
118         unsigned int               width, height;
119
120         /* vbi capture */
121         struct videobuf_queue      vidq;
122         struct videobuf_queue      vbiq;
123
124         /* MPEG Encoder specifics ONLY */
125         struct videobuf_queue      mpegq;
126         atomic_t                   v4l_reading;
127 };
128
129 enum cx23885_itype {
130         CX23885_VMUX_COMPOSITE1 = 1,
131         CX23885_VMUX_COMPOSITE2,
132         CX23885_VMUX_COMPOSITE3,
133         CX23885_VMUX_COMPOSITE4,
134         CX23885_VMUX_SVIDEO,
135         CX23885_VMUX_TELEVISION,
136         CX23885_VMUX_CABLE,
137         CX23885_VMUX_DVB,
138         CX23885_VMUX_DEBUG,
139         CX23885_RADIO,
140 };
141
142 enum cx23885_src_sel_type {
143         CX23885_SRC_SEL_EXT_656_VIDEO = 0,
144         CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
145 };
146
147 /* buffer for one video frame */
148 struct cx23885_buffer {
149         /* common v4l buffer stuff -- must be first */
150         struct videobuf_buffer vb;
151
152         /* cx23885 specific */
153         unsigned int           bpl;
154         struct btcx_riscmem    risc;
155         struct cx23885_fmt     *fmt;
156         u32                    count;
157 };
158
159 struct cx23885_input {
160         enum cx23885_itype type;
161         unsigned int    vmux;
162         u32             gpio0, gpio1, gpio2, gpio3;
163 };
164
165 typedef enum {
166         CX23885_MPEG_UNDEFINED = 0,
167         CX23885_MPEG_DVB,
168         CX23885_ANALOG_VIDEO,
169         CX23885_MPEG_ENCODER,
170 } port_t;
171
172 struct cx23885_board {
173         char                    *name;
174         port_t                  porta, portb, portc;
175         unsigned int            tuner_type;
176         unsigned int            radio_type;
177         unsigned char           tuner_addr;
178         unsigned char           radio_addr;
179
180         /* Vendors can and do run the PCIe bridge at different
181          * clock rates, driven physically by crystals on the PCBs.
182          * The core has to accomodate this. This allows the user
183          * to add new boards with new frequencys. The value is
184          * expressed in Hz.
185          *
186          * The core framework will default this value based on
187          * current designs, but it can vary.
188          */
189         u32                     clk_freq;
190         struct cx23885_input    input[MAX_CX23885_INPUT];
191         int                     cimax; /* for NetUP */
192 };
193
194 struct cx23885_subid {
195         u16     subvendor;
196         u16     subdevice;
197         u32     card;
198 };
199
200 struct cx23885_i2c {
201         struct cx23885_dev *dev;
202
203         int                        nr;
204
205         /* i2c i/o */
206         struct i2c_adapter         i2c_adap;
207         struct i2c_algo_bit_data   i2c_algo;
208         struct i2c_client          i2c_client;
209         u32                        i2c_rc;
210
211         /* 885 registers used for raw addess */
212         u32                        i2c_period;
213         u32                        reg_ctrl;
214         u32                        reg_stat;
215         u32                        reg_addr;
216         u32                        reg_rdata;
217         u32                        reg_wdata;
218 };
219
220 struct cx23885_dmaqueue {
221         struct list_head       active;
222         struct list_head       queued;
223         struct timer_list      timeout;
224         struct btcx_riscmem    stopper;
225         u32                    count;
226 };
227
228 struct cx23885_tsport {
229         struct cx23885_dev *dev;
230
231         int                        nr;
232         int                        sram_chno;
233
234         struct videobuf_dvb_frontends frontends;
235
236         /* dma queues */
237         struct cx23885_dmaqueue    mpegq;
238         u32                        ts_packet_size;
239         u32                        ts_packet_count;
240
241         int                        width;
242         int                        height;
243
244         spinlock_t                 slock;
245
246         /* registers */
247         u32                        reg_gpcnt;
248         u32                        reg_gpcnt_ctl;
249         u32                        reg_dma_ctl;
250         u32                        reg_lngth;
251         u32                        reg_hw_sop_ctrl;
252         u32                        reg_gen_ctrl;
253         u32                        reg_bd_pkt_status;
254         u32                        reg_sop_status;
255         u32                        reg_fifo_ovfl_stat;
256         u32                        reg_vld_misc;
257         u32                        reg_ts_clk_en;
258         u32                        reg_ts_int_msk;
259         u32                        reg_ts_int_stat;
260         u32                        reg_src_sel;
261
262         /* Default register vals */
263         int                        pci_irqmask;
264         u32                        dma_ctl_val;
265         u32                        ts_int_msk_val;
266         u32                        gen_ctrl_val;
267         u32                        ts_clk_en_val;
268         u32                        src_sel_val;
269         u32                        vld_misc_val;
270         u32                        hw_sop_ctrl_val;
271
272         /* Allow a single tsport to have multiple frontends */
273         u32                        num_frontends;
274         void                       *port_priv;
275 };
276
277 struct cx23885_dev {
278         struct list_head           devlist;
279         atomic_t                   refcount;
280         struct v4l2_device         v4l2_dev;
281
282         /* pci stuff */
283         struct pci_dev             *pci;
284         unsigned char              pci_rev, pci_lat;
285         int                        pci_bus, pci_slot;
286         u32                        __iomem *lmmio;
287         u8                         __iomem *bmmio;
288         int                        pci_irqmask;
289         int                        hwrevision;
290
291         /* This valud is board specific and is used to configure the
292          * AV core so we see nice clean and stable video and audio. */
293         u32                        clk_freq;
294
295         /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
296         struct cx23885_i2c         i2c_bus[3];
297
298         int                        nr;
299         struct mutex               lock;
300
301         /* board details */
302         unsigned int               board;
303         char                       name[32];
304
305         struct cx23885_tsport      ts1, ts2;
306
307         /* sram configuration */
308         struct sram_channel        *sram_channels;
309
310         enum {
311                 CX23885_BRIDGE_UNDEFINED = 0,
312                 CX23885_BRIDGE_885 = 885,
313                 CX23885_BRIDGE_887 = 887,
314         } bridge;
315
316         /* Analog video */
317         u32                        resources;
318         unsigned int               input;
319         u32                        tvaudio;
320         v4l2_std_id                tvnorm;
321         unsigned int               tuner_type;
322         unsigned char              tuner_addr;
323         unsigned int               radio_type;
324         unsigned char              radio_addr;
325         unsigned int               has_radio;
326         struct v4l2_subdev         *sd_cx25840;
327
328         /* V4l */
329         u32                        freq;
330         struct video_device        *video_dev;
331         struct video_device        *vbi_dev;
332         struct video_device        *radio_dev;
333
334         struct cx23885_dmaqueue    vidq;
335         struct cx23885_dmaqueue    vbiq;
336         spinlock_t                 slock;
337
338         /* MPEG Encoder ONLY settings */
339         u32                        cx23417_mailbox;
340         struct cx2341x_mpeg_params mpeg_params;
341         struct video_device        *v4l_device;
342         atomic_t                   v4l_reader_count;
343         struct cx23885_tvnorm      encodernorm;
344
345 };
346
347 static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev)
348 {
349         return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev);
350 }
351
352 #define call_all(dev, o, f, args...) \
353         v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args)
354
355 extern struct list_head cx23885_devlist;
356
357 #define SRAM_CH01  0 /* Video A */
358 #define SRAM_CH02  1 /* VBI A */
359 #define SRAM_CH03  2 /* Video B */
360 #define SRAM_CH04  3 /* Transport via B */
361 #define SRAM_CH05  4 /* VBI B */
362 #define SRAM_CH06  5 /* Video C */
363 #define SRAM_CH07  6 /* Transport via C */
364 #define SRAM_CH08  7 /* Audio Internal A */
365 #define SRAM_CH09  8 /* Audio Internal B */
366 #define SRAM_CH10  9 /* Audio External */
367 #define SRAM_CH11 10 /* COMB_3D_N */
368 #define SRAM_CH12 11 /* Comb 3D N1 */
369 #define SRAM_CH13 12 /* Comb 3D N2 */
370 #define SRAM_CH14 13 /* MOE Vid */
371 #define SRAM_CH15 14 /* MOE RSLT */
372
373 struct sram_channel {
374         char *name;
375         u32  cmds_start;
376         u32  ctrl_start;
377         u32  cdt;
378         u32  fifo_start;;
379         u32  fifo_size;
380         u32  ptr1_reg;
381         u32  ptr2_reg;
382         u32  cnt1_reg;
383         u32  cnt2_reg;
384         u32  jumponly;
385 };
386
387 /* ----------------------------------------------------------- */
388
389 #define cx_read(reg)             readl(dev->lmmio + ((reg)>>2))
390 #define cx_write(reg, value)     writel((value), dev->lmmio + ((reg)>>2))
391
392 #define cx_andor(reg, mask, value) \
393   writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
394   ((value) & (mask)), dev->lmmio+((reg)>>2))
395
396 #define cx_set(reg, bit)          cx_andor((reg), (bit), (bit))
397 #define cx_clear(reg, bit)        cx_andor((reg), (bit), 0)
398
399 /* ----------------------------------------------------------- */
400 /* cx23885-core.c                                              */
401
402 extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
403         struct sram_channel *ch,
404         unsigned int bpl, u32 risc);
405
406 extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
407         struct sram_channel *ch);
408
409 extern int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
410         u32 reg, u32 mask, u32 value);
411
412 extern int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
413         struct scatterlist *sglist,
414         unsigned int top_offset, unsigned int bottom_offset,
415         unsigned int bpl, unsigned int padding, unsigned int lines);
416
417 void cx23885_cancel_buffers(struct cx23885_tsport *port);
418
419 extern int cx23885_restart_queue(struct cx23885_tsport *port,
420                                 struct cx23885_dmaqueue *q);
421
422 extern void cx23885_wakeup(struct cx23885_tsport *port,
423                            struct cx23885_dmaqueue *q, u32 count);
424
425
426 /* ----------------------------------------------------------- */
427 /* cx23885-cards.c                                             */
428 extern struct cx23885_board cx23885_boards[];
429 extern const unsigned int cx23885_bcount;
430
431 extern struct cx23885_subid cx23885_subids[];
432 extern const unsigned int cx23885_idcount;
433
434 extern int cx23885_tuner_callback(void *priv, int component,
435         int command, int arg);
436 extern void cx23885_card_list(struct cx23885_dev *dev);
437 extern int  cx23885_ir_init(struct cx23885_dev *dev);
438 extern void cx23885_gpio_setup(struct cx23885_dev *dev);
439 extern void cx23885_card_setup(struct cx23885_dev *dev);
440 extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
441
442 extern int cx23885_dvb_register(struct cx23885_tsport *port);
443 extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
444
445 extern int cx23885_buf_prepare(struct videobuf_queue *q,
446                                struct cx23885_tsport *port,
447                                struct cx23885_buffer *buf,
448                                enum v4l2_field field);
449 extern void cx23885_buf_queue(struct cx23885_tsport *port,
450                               struct cx23885_buffer *buf);
451 extern void cx23885_free_buffer(struct videobuf_queue *q,
452                                 struct cx23885_buffer *buf);
453
454 /* ----------------------------------------------------------- */
455 /* cx23885-video.c                                             */
456 /* Video */
457 extern int cx23885_video_register(struct cx23885_dev *dev);
458 extern void cx23885_video_unregister(struct cx23885_dev *dev);
459 extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
460
461 /* ----------------------------------------------------------- */
462 /* cx23885-vbi.c                                               */
463 extern int cx23885_vbi_fmt(struct file *file, void *priv,
464         struct v4l2_format *f);
465 extern void cx23885_vbi_timeout(unsigned long data);
466 extern struct videobuf_queue_ops cx23885_vbi_qops;
467
468 /* cx23885-i2c.c                                                */
469 extern int cx23885_i2c_register(struct cx23885_i2c *bus);
470 extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
471 extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
472
473 /* ----------------------------------------------------------- */
474 /* cx23885-417.c                                               */
475 extern int cx23885_417_register(struct cx23885_dev *dev);
476 extern void cx23885_417_unregister(struct cx23885_dev *dev);
477 extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
478 extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
479 extern void cx23885_mc417_init(struct cx23885_dev *dev);
480 extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
481 extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
482
483
484 /* ----------------------------------------------------------- */
485 /* tv norms                                                    */
486
487 static inline unsigned int norm_maxw(v4l2_std_id norm)
488 {
489         return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768;
490 }
491
492 static inline unsigned int norm_maxh(v4l2_std_id norm)
493 {
494         return (norm & V4L2_STD_625_50) ? 576 : 480;
495 }
496
497 static inline unsigned int norm_swidth(v4l2_std_id norm)
498 {
499         return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 754 : 922;
500 }