pandora: defconfig: update
[pandora-kernel.git] / drivers / media / video / cx23885 / cx23885-dvb.c
1 /*
2  *  Driver for the Conexant CX23885 PCIe bridge
3  *
4  *  Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5  *
6  *  This program is free software; you can redistribute it and/or modify
7  *  it under the terms of the GNU General Public License as published by
8  *  the Free Software Foundation; either version 2 of the License, or
9  *  (at your option) any later version.
10  *
11  *  This program is distributed in the hope that it will be useful,
12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *
15  *  GNU General Public License for more details.
16  *
17  *  You should have received a copy of the GNU General Public License
18  *  along with this program; if not, write to the Free Software
19  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20  */
21
22 #include <linux/module.h>
23 #include <linux/init.h>
24 #include <linux/device.h>
25 #include <linux/fs.h>
26 #include <linux/kthread.h>
27 #include <linux/file.h>
28 #include <linux/suspend.h>
29
30 #include "cx23885.h"
31 #include <media/v4l2-common.h>
32
33 #include "dvb_ca_en50221.h"
34 #include "s5h1409.h"
35 #include "s5h1411.h"
36 #include "mt2131.h"
37 #include "tda8290.h"
38 #include "tda18271.h"
39 #include "lgdt330x.h"
40 #include "xc4000.h"
41 #include "xc5000.h"
42 #include "max2165.h"
43 #include "tda10048.h"
44 #include "tuner-xc2028.h"
45 #include "tuner-simple.h"
46 #include "dib7000p.h"
47 #include "dibx000_common.h"
48 #include "zl10353.h"
49 #include "stv0900.h"
50 #include "stv0900_reg.h"
51 #include "stv6110.h"
52 #include "lnbh24.h"
53 #include "cx24116.h"
54 #include "cimax2.h"
55 #include "lgs8gxx.h"
56 #include "netup-eeprom.h"
57 #include "netup-init.h"
58 #include "lgdt3305.h"
59 #include "atbm8830.h"
60 #include "ds3000.h"
61 #include "cx23885-f300.h"
62 #include "altera-ci.h"
63 #include "stv0367.h"
64
65 static unsigned int debug;
66
67 #define dprintk(level, fmt, arg...)\
68         do { if (debug >= level)\
69                 printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\
70         } while (0)
71
72 /* ------------------------------------------------------------------ */
73
74 static unsigned int alt_tuner;
75 module_param(alt_tuner, int, 0644);
76 MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration");
77
78 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
79
80 /* ------------------------------------------------------------------ */
81
82 static int dvb_buf_setup(struct videobuf_queue *q,
83                          unsigned int *count, unsigned int *size)
84 {
85         struct cx23885_tsport *port = q->priv_data;
86
87         port->ts_packet_size  = 188 * 4;
88         port->ts_packet_count = 32;
89
90         *size  = port->ts_packet_size * port->ts_packet_count;
91         *count = 32;
92         return 0;
93 }
94
95 static int dvb_buf_prepare(struct videobuf_queue *q,
96                            struct videobuf_buffer *vb, enum v4l2_field field)
97 {
98         struct cx23885_tsport *port = q->priv_data;
99         return cx23885_buf_prepare(q, port, (struct cx23885_buffer *)vb, field);
100 }
101
102 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
103 {
104         struct cx23885_tsport *port = q->priv_data;
105         cx23885_buf_queue(port, (struct cx23885_buffer *)vb);
106 }
107
108 static void dvb_buf_release(struct videobuf_queue *q,
109                             struct videobuf_buffer *vb)
110 {
111         cx23885_free_buffer(q, (struct cx23885_buffer *)vb);
112 }
113
114 static void cx23885_dvb_gate_ctrl(struct cx23885_tsport  *port, int open)
115 {
116         struct videobuf_dvb_frontends *f;
117         struct videobuf_dvb_frontend *fe;
118
119         f = &port->frontends;
120
121         if (f->gate <= 1) /* undefined or fe0 */
122                 fe = videobuf_dvb_get_frontend(f, 1);
123         else
124                 fe = videobuf_dvb_get_frontend(f, f->gate);
125
126         if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
127                 fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
128 }
129
130 static struct videobuf_queue_ops dvb_qops = {
131         .buf_setup    = dvb_buf_setup,
132         .buf_prepare  = dvb_buf_prepare,
133         .buf_queue    = dvb_buf_queue,
134         .buf_release  = dvb_buf_release,
135 };
136
137 static struct s5h1409_config hauppauge_generic_config = {
138         .demod_address = 0x32 >> 1,
139         .output_mode   = S5H1409_SERIAL_OUTPUT,
140         .gpio          = S5H1409_GPIO_ON,
141         .qam_if        = 44000,
142         .inversion     = S5H1409_INVERSION_OFF,
143         .status_mode   = S5H1409_DEMODLOCKING,
144         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
145 };
146
147 static struct tda10048_config hauppauge_hvr1200_config = {
148         .demod_address    = 0x10 >> 1,
149         .output_mode      = TDA10048_SERIAL_OUTPUT,
150         .fwbulkwritelen   = TDA10048_BULKWRITE_200,
151         .inversion        = TDA10048_INVERSION_ON,
152         .dtv6_if_freq_khz = TDA10048_IF_3300,
153         .dtv7_if_freq_khz = TDA10048_IF_3800,
154         .dtv8_if_freq_khz = TDA10048_IF_4300,
155         .clk_freq_khz     = TDA10048_CLK_16000,
156 };
157
158 static struct tda10048_config hauppauge_hvr1210_config = {
159         .demod_address    = 0x10 >> 1,
160         .output_mode      = TDA10048_SERIAL_OUTPUT,
161         .fwbulkwritelen   = TDA10048_BULKWRITE_200,
162         .inversion        = TDA10048_INVERSION_ON,
163         .dtv6_if_freq_khz = TDA10048_IF_3300,
164         .dtv7_if_freq_khz = TDA10048_IF_3500,
165         .dtv8_if_freq_khz = TDA10048_IF_4000,
166         .clk_freq_khz     = TDA10048_CLK_16000,
167 };
168
169 static struct s5h1409_config hauppauge_ezqam_config = {
170         .demod_address = 0x32 >> 1,
171         .output_mode   = S5H1409_SERIAL_OUTPUT,
172         .gpio          = S5H1409_GPIO_OFF,
173         .qam_if        = 4000,
174         .inversion     = S5H1409_INVERSION_ON,
175         .status_mode   = S5H1409_DEMODLOCKING,
176         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
177 };
178
179 static struct s5h1409_config hauppauge_hvr1800lp_config = {
180         .demod_address = 0x32 >> 1,
181         .output_mode   = S5H1409_SERIAL_OUTPUT,
182         .gpio          = S5H1409_GPIO_OFF,
183         .qam_if        = 44000,
184         .inversion     = S5H1409_INVERSION_OFF,
185         .status_mode   = S5H1409_DEMODLOCKING,
186         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
187 };
188
189 static struct s5h1409_config hauppauge_hvr1500_config = {
190         .demod_address = 0x32 >> 1,
191         .output_mode   = S5H1409_SERIAL_OUTPUT,
192         .gpio          = S5H1409_GPIO_OFF,
193         .inversion     = S5H1409_INVERSION_OFF,
194         .status_mode   = S5H1409_DEMODLOCKING,
195         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
196 };
197
198 static struct mt2131_config hauppauge_generic_tunerconfig = {
199         0x61
200 };
201
202 static struct lgdt330x_config fusionhdtv_5_express = {
203         .demod_address = 0x0e,
204         .demod_chip = LGDT3303,
205         .serial_mpeg = 0x40,
206 };
207
208 static struct s5h1409_config hauppauge_hvr1500q_config = {
209         .demod_address = 0x32 >> 1,
210         .output_mode   = S5H1409_SERIAL_OUTPUT,
211         .gpio          = S5H1409_GPIO_ON,
212         .qam_if        = 44000,
213         .inversion     = S5H1409_INVERSION_OFF,
214         .status_mode   = S5H1409_DEMODLOCKING,
215         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
216 };
217
218 static struct s5h1409_config dvico_s5h1409_config = {
219         .demod_address = 0x32 >> 1,
220         .output_mode   = S5H1409_SERIAL_OUTPUT,
221         .gpio          = S5H1409_GPIO_ON,
222         .qam_if        = 44000,
223         .inversion     = S5H1409_INVERSION_OFF,
224         .status_mode   = S5H1409_DEMODLOCKING,
225         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
226 };
227
228 static struct s5h1411_config dvico_s5h1411_config = {
229         .output_mode   = S5H1411_SERIAL_OUTPUT,
230         .gpio          = S5H1411_GPIO_ON,
231         .qam_if        = S5H1411_IF_44000,
232         .vsb_if        = S5H1411_IF_44000,
233         .inversion     = S5H1411_INVERSION_OFF,
234         .status_mode   = S5H1411_DEMODLOCKING,
235         .mpeg_timing   = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
236 };
237
238 static struct s5h1411_config hcw_s5h1411_config = {
239         .output_mode   = S5H1411_SERIAL_OUTPUT,
240         .gpio          = S5H1411_GPIO_OFF,
241         .vsb_if        = S5H1411_IF_44000,
242         .qam_if        = S5H1411_IF_4000,
243         .inversion     = S5H1411_INVERSION_ON,
244         .status_mode   = S5H1411_DEMODLOCKING,
245         .mpeg_timing   = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
246 };
247
248 static struct xc5000_config hauppauge_hvr1500q_tunerconfig = {
249         .i2c_address      = 0x61,
250         .if_khz           = 5380,
251 };
252
253 static struct xc5000_config dvico_xc5000_tunerconfig = {
254         .i2c_address      = 0x64,
255         .if_khz           = 5380,
256 };
257
258 static struct tda829x_config tda829x_no_probe = {
259         .probe_tuner = TDA829X_DONT_PROBE,
260 };
261
262 static struct tda18271_std_map hauppauge_tda18271_std_map = {
263         .atsc_6   = { .if_freq = 5380, .agc_mode = 3, .std = 3,
264                       .if_lvl = 6, .rfagc_top = 0x37 },
265         .qam_6    = { .if_freq = 4000, .agc_mode = 3, .std = 0,
266                       .if_lvl = 6, .rfagc_top = 0x37 },
267 };
268
269 static struct tda18271_std_map hauppauge_hvr1200_tda18271_std_map = {
270         .dvbt_6   = { .if_freq = 3300, .agc_mode = 3, .std = 4,
271                       .if_lvl = 1, .rfagc_top = 0x37, },
272         .dvbt_7   = { .if_freq = 3800, .agc_mode = 3, .std = 5,
273                       .if_lvl = 1, .rfagc_top = 0x37, },
274         .dvbt_8   = { .if_freq = 4300, .agc_mode = 3, .std = 6,
275                       .if_lvl = 1, .rfagc_top = 0x37, },
276 };
277
278 static struct tda18271_config hauppauge_tda18271_config = {
279         .std_map = &hauppauge_tda18271_std_map,
280         .gate    = TDA18271_GATE_ANALOG,
281         .output_opt = TDA18271_OUTPUT_LT_OFF,
282 };
283
284 static struct tda18271_config hauppauge_hvr1200_tuner_config = {
285         .std_map = &hauppauge_hvr1200_tda18271_std_map,
286         .gate    = TDA18271_GATE_ANALOG,
287         .output_opt = TDA18271_OUTPUT_LT_OFF,
288 };
289
290 static struct tda18271_config hauppauge_hvr1210_tuner_config = {
291         .gate    = TDA18271_GATE_DIGITAL,
292         .output_opt = TDA18271_OUTPUT_LT_OFF,
293 };
294
295 static struct tda18271_std_map hauppauge_hvr127x_std_map = {
296         .atsc_6   = { .if_freq = 3250, .agc_mode = 3, .std = 4,
297                       .if_lvl = 1, .rfagc_top = 0x58 },
298         .qam_6    = { .if_freq = 4000, .agc_mode = 3, .std = 5,
299                       .if_lvl = 1, .rfagc_top = 0x58 },
300 };
301
302 static struct tda18271_config hauppauge_hvr127x_config = {
303         .std_map = &hauppauge_hvr127x_std_map,
304         .output_opt = TDA18271_OUTPUT_LT_OFF,
305 };
306
307 static struct lgdt3305_config hauppauge_lgdt3305_config = {
308         .i2c_addr           = 0x0e,
309         .mpeg_mode          = LGDT3305_MPEG_SERIAL,
310         .tpclk_edge         = LGDT3305_TPCLK_FALLING_EDGE,
311         .tpvalid_polarity   = LGDT3305_TP_VALID_HIGH,
312         .deny_i2c_rptr      = 1,
313         .spectral_inversion = 1,
314         .qam_if_khz         = 4000,
315         .vsb_if_khz         = 3250,
316 };
317
318 static struct dibx000_agc_config xc3028_agc_config = {
319         BAND_VHF | BAND_UHF,    /* band_caps */
320
321         /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
322          * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
323          * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0,
324          * P_agc_nb_est=2, P_agc_write=0
325          */
326         (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
327                 (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */
328
329         712,    /* inv_gain */
330         21,     /* time_stabiliz */
331
332         0,      /* alpha_level */
333         118,    /* thlock */
334
335         0,      /* wbd_inv */
336         2867,   /* wbd_ref */
337         0,      /* wbd_sel */
338         2,      /* wbd_alpha */
339
340         0,      /* agc1_max */
341         0,      /* agc1_min */
342         39718,  /* agc2_max */
343         9930,   /* agc2_min */
344         0,      /* agc1_pt1 */
345         0,      /* agc1_pt2 */
346         0,      /* agc1_pt3 */
347         0,      /* agc1_slope1 */
348         0,      /* agc1_slope2 */
349         0,      /* agc2_pt1 */
350         128,    /* agc2_pt2 */
351         29,     /* agc2_slope1 */
352         29,     /* agc2_slope2 */
353
354         17,     /* alpha_mant */
355         27,     /* alpha_exp */
356         23,     /* beta_mant */
357         51,     /* beta_exp */
358
359         1,      /* perform_agc_softsplit */
360 };
361
362 /* PLL Configuration for COFDM BW_MHz = 8.000000
363  * With external clock = 30.000000 */
364 static struct dibx000_bandwidth_config xc3028_bw_config = {
365         60000,  /* internal */
366         30000,  /* sampling */
367         1,      /* pll_cfg: prediv */
368         8,      /* pll_cfg: ratio */
369         3,      /* pll_cfg: range */
370         1,      /* pll_cfg: reset */
371         0,      /* pll_cfg: bypass */
372         0,      /* misc: refdiv */
373         0,      /* misc: bypclk_div */
374         1,      /* misc: IO_CLK_en_core */
375         1,      /* misc: ADClkSrc */
376         0,      /* misc: modulo */
377         (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
378         (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
379         20452225, /* timf */
380         30000000  /* xtal_hz */
381 };
382
383 static struct dib7000p_config hauppauge_hvr1400_dib7000_config = {
384         .output_mpeg2_in_188_bytes = 1,
385         .hostbus_diversity = 1,
386         .tuner_is_baseband = 0,
387         .update_lna  = NULL,
388
389         .agc_config_count = 1,
390         .agc = &xc3028_agc_config,
391         .bw  = &xc3028_bw_config,
392
393         .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
394         .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
395         .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
396
397         .pwm_freq_div = 0,
398         .agc_control  = NULL,
399         .spur_protect = 0,
400
401         .output_mode = OUTMODE_MPEG2_SERIAL,
402 };
403
404 static struct zl10353_config dvico_fusionhdtv_xc3028 = {
405         .demod_address = 0x0f,
406         .if2           = 45600,
407         .no_tuner      = 1,
408         .disable_i2c_gate_ctrl = 1,
409 };
410
411 static struct stv0900_reg stv0900_ts_regs[] = {
412         { R0900_TSGENERAL, 0x00 },
413         { R0900_P1_TSSPEED, 0x40 },
414         { R0900_P2_TSSPEED, 0x40 },
415         { R0900_P1_TSCFGM, 0xc0 },
416         { R0900_P2_TSCFGM, 0xc0 },
417         { R0900_P1_TSCFGH, 0xe0 },
418         { R0900_P2_TSCFGH, 0xe0 },
419         { R0900_P1_TSCFGL, 0x20 },
420         { R0900_P2_TSCFGL, 0x20 },
421         { 0xffff, 0xff }, /* terminate */
422 };
423
424 static struct stv0900_config netup_stv0900_config = {
425         .demod_address = 0x68,
426         .demod_mode = 1, /* dual */
427         .xtal = 8000000,
428         .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
429         .diseqc_mode = 2,/* 2/3 PWM */
430         .ts_config_regs = stv0900_ts_regs,
431         .tun1_maddress = 0,/* 0x60 */
432         .tun2_maddress = 3,/* 0x63 */
433         .tun1_adc = 1,/* 1 Vpp */
434         .tun2_adc = 1,/* 1 Vpp */
435 };
436
437 static struct stv6110_config netup_stv6110_tunerconfig_a = {
438         .i2c_address = 0x60,
439         .mclk = 16000000,
440         .clk_div = 1,
441         .gain = 8, /* +16 dB  - maximum gain */
442 };
443
444 static struct stv6110_config netup_stv6110_tunerconfig_b = {
445         .i2c_address = 0x63,
446         .mclk = 16000000,
447         .clk_div = 1,
448         .gain = 8, /* +16 dB  - maximum gain */
449 };
450
451 static struct cx24116_config tbs_cx24116_config = {
452         .demod_address = 0x55,
453 };
454
455 static struct ds3000_config tevii_ds3000_config = {
456         .demod_address = 0x68,
457 };
458
459 static struct cx24116_config dvbworld_cx24116_config = {
460         .demod_address = 0x05,
461 };
462
463 static struct lgs8gxx_config mygica_x8506_lgs8gl5_config = {
464         .prod = LGS8GXX_PROD_LGS8GL5,
465         .demod_address = 0x19,
466         .serial_ts = 0,
467         .ts_clk_pol = 1,
468         .ts_clk_gated = 1,
469         .if_clk_freq = 30400, /* 30.4 MHz */
470         .if_freq = 5380, /* 5.38 MHz */
471         .if_neg_center = 1,
472         .ext_adc = 0,
473         .adc_signed = 0,
474         .if_neg_edge = 0,
475 };
476
477 static struct xc5000_config mygica_x8506_xc5000_config = {
478         .i2c_address = 0x61,
479         .if_khz = 5380,
480 };
481
482 static int cx23885_dvb_set_frontend(struct dvb_frontend *fe,
483                                     struct dvb_frontend_parameters *param)
484 {
485         struct cx23885_tsport *port = fe->dvb->priv;
486         struct cx23885_dev *dev = port->dev;
487
488         switch (dev->board) {
489         case CX23885_BOARD_HAUPPAUGE_HVR1275:
490                 switch (param->u.vsb.modulation) {
491                 case VSB_8:
492                         cx23885_gpio_clear(dev, GPIO_5);
493                         break;
494                 case QAM_64:
495                 case QAM_256:
496                 default:
497                         cx23885_gpio_set(dev, GPIO_5);
498                         break;
499                 }
500                 break;
501         case CX23885_BOARD_MYGICA_X8506:
502         case CX23885_BOARD_MAGICPRO_PROHDTVE2:
503                 /* Select Digital TV */
504                 cx23885_gpio_set(dev, GPIO_0);
505                 break;
506         }
507         return 0;
508 }
509
510 static int cx23885_dvb_fe_ioctl_override(struct dvb_frontend *fe,
511                                          unsigned int cmd, void *parg,
512                                          unsigned int stage)
513 {
514         int err = 0;
515
516         switch (stage) {
517         case DVB_FE_IOCTL_PRE:
518
519                 switch (cmd) {
520                 case FE_SET_FRONTEND:
521                         err = cx23885_dvb_set_frontend(fe,
522                                 (struct dvb_frontend_parameters *) parg);
523                         break;
524                 }
525                 break;
526
527         case DVB_FE_IOCTL_POST:
528                 /* no post-ioctl handling required */
529                 break;
530         }
531         return err;
532 };
533
534
535 static struct lgs8gxx_config magicpro_prohdtve2_lgs8g75_config = {
536         .prod = LGS8GXX_PROD_LGS8G75,
537         .demod_address = 0x19,
538         .serial_ts = 0,
539         .ts_clk_pol = 1,
540         .ts_clk_gated = 1,
541         .if_clk_freq = 30400, /* 30.4 MHz */
542         .if_freq = 6500, /* 6.50 MHz */
543         .if_neg_center = 1,
544         .ext_adc = 0,
545         .adc_signed = 1,
546         .adc_vpp = 2, /* 1.6 Vpp */
547         .if_neg_edge = 1,
548 };
549
550 static struct xc5000_config magicpro_prohdtve2_xc5000_config = {
551         .i2c_address = 0x61,
552         .if_khz = 6500,
553 };
554
555 static struct atbm8830_config mygica_x8558pro_atbm8830_cfg1 = {
556         .prod = ATBM8830_PROD_8830,
557         .demod_address = 0x44,
558         .serial_ts = 0,
559         .ts_sampling_edge = 1,
560         .ts_clk_gated = 0,
561         .osc_clk_freq = 30400, /* in kHz */
562         .if_freq = 0, /* zero IF */
563         .zif_swap_iq = 1,
564         .agc_min = 0x2E,
565         .agc_max = 0xFF,
566         .agc_hold_loop = 0,
567 };
568
569 static struct max2165_config mygic_x8558pro_max2165_cfg1 = {
570         .i2c_address = 0x60,
571         .osc_clk = 20
572 };
573
574 static struct atbm8830_config mygica_x8558pro_atbm8830_cfg2 = {
575         .prod = ATBM8830_PROD_8830,
576         .demod_address = 0x44,
577         .serial_ts = 1,
578         .ts_sampling_edge = 1,
579         .ts_clk_gated = 0,
580         .osc_clk_freq = 30400, /* in kHz */
581         .if_freq = 0, /* zero IF */
582         .zif_swap_iq = 1,
583         .agc_min = 0x2E,
584         .agc_max = 0xFF,
585         .agc_hold_loop = 0,
586 };
587
588 static struct max2165_config mygic_x8558pro_max2165_cfg2 = {
589         .i2c_address = 0x60,
590         .osc_clk = 20
591 };
592 static struct stv0367_config netup_stv0367_config[] = {
593         {
594                 .demod_address = 0x1c,
595                 .xtal = 27000000,
596                 .if_khz = 4500,
597                 .if_iq_mode = 0,
598                 .ts_mode = 1,
599                 .clk_pol = 0,
600         }, {
601                 .demod_address = 0x1d,
602                 .xtal = 27000000,
603                 .if_khz = 4500,
604                 .if_iq_mode = 0,
605                 .ts_mode = 1,
606                 .clk_pol = 0,
607         },
608 };
609
610 static struct xc5000_config netup_xc5000_config[] = {
611         {
612                 .i2c_address = 0x61,
613                 .if_khz = 4500,
614         }, {
615                 .i2c_address = 0x64,
616                 .if_khz = 4500,
617         },
618 };
619
620 int netup_altera_fpga_rw(void *device, int flag, int data, int read)
621 {
622         struct cx23885_dev *dev = (struct cx23885_dev *)device;
623         unsigned long timeout = jiffies + msecs_to_jiffies(1);
624         uint32_t mem = 0;
625
626         mem = cx_read(MC417_RWD);
627         if (read)
628                 cx_set(MC417_OEN, ALT_DATA);
629         else {
630                 cx_clear(MC417_OEN, ALT_DATA);/* D0-D7 out */
631                 mem &= ~ALT_DATA;
632                 mem |= (data & ALT_DATA);
633         }
634
635         if (flag)
636                 mem |= ALT_AD_RG;
637         else
638                 mem &= ~ALT_AD_RG;
639
640         mem &= ~ALT_CS;
641         if (read)
642                 mem = (mem & ~ALT_RD) | ALT_WR;
643         else
644                 mem = (mem & ~ALT_WR) | ALT_RD;
645
646         cx_write(MC417_RWD, mem);  /* start RW cycle */
647
648         for (;;) {
649                 mem = cx_read(MC417_RWD);
650                 if ((mem & ALT_RDY) == 0)
651                         break;
652                 if (time_after(jiffies, timeout))
653                         break;
654                 udelay(1);
655         }
656
657         cx_set(MC417_RWD, ALT_RD | ALT_WR | ALT_CS);
658         if (read)
659                 return mem & ALT_DATA;
660
661         return 0;
662 };
663
664 static int dvb_register(struct cx23885_tsport *port)
665 {
666         struct cx23885_dev *dev = port->dev;
667         struct cx23885_i2c *i2c_bus = NULL, *i2c_bus2 = NULL;
668         struct videobuf_dvb_frontend *fe0, *fe1 = NULL;
669         int mfe_shared = 0; /* bus not shared by default */
670         int ret;
671
672         /* Get the first frontend */
673         fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
674         if (!fe0)
675                 return -EINVAL;
676
677         /* init struct videobuf_dvb */
678         fe0->dvb.name = dev->name;
679
680         /* multi-frontend gate control is undefined or defaults to fe0 */
681         port->frontends.gate = 0;
682
683         /* Sets the gate control callback to be used by i2c command calls */
684         port->gate_ctrl = cx23885_dvb_gate_ctrl;
685
686         /* init frontend */
687         switch (dev->board) {
688         case CX23885_BOARD_HAUPPAUGE_HVR1250:
689                 i2c_bus = &dev->i2c_bus[0];
690                 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
691                                                 &hauppauge_generic_config,
692                                                 &i2c_bus->i2c_adap);
693                 if (fe0->dvb.frontend != NULL) {
694                         dvb_attach(mt2131_attach, fe0->dvb.frontend,
695                                    &i2c_bus->i2c_adap,
696                                    &hauppauge_generic_tunerconfig, 0);
697                 }
698                 break;
699         case CX23885_BOARD_HAUPPAUGE_HVR1270:
700         case CX23885_BOARD_HAUPPAUGE_HVR1275:
701                 i2c_bus = &dev->i2c_bus[0];
702                 fe0->dvb.frontend = dvb_attach(lgdt3305_attach,
703                                                &hauppauge_lgdt3305_config,
704                                                &i2c_bus->i2c_adap);
705                 if (fe0->dvb.frontend != NULL) {
706                         dvb_attach(tda18271_attach, fe0->dvb.frontend,
707                                    0x60, &dev->i2c_bus[1].i2c_adap,
708                                    &hauppauge_hvr127x_config);
709                 }
710                 break;
711         case CX23885_BOARD_HAUPPAUGE_HVR1255:
712                 i2c_bus = &dev->i2c_bus[0];
713                 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
714                                                &hcw_s5h1411_config,
715                                                &i2c_bus->i2c_adap);
716                 if (fe0->dvb.frontend != NULL) {
717                         dvb_attach(tda18271_attach, fe0->dvb.frontend,
718                                    0x60, &dev->i2c_bus[1].i2c_adap,
719                                    &hauppauge_tda18271_config);
720                 }
721                 break;
722         case CX23885_BOARD_HAUPPAUGE_HVR1800:
723                 i2c_bus = &dev->i2c_bus[0];
724                 switch (alt_tuner) {
725                 case 1:
726                         fe0->dvb.frontend =
727                                 dvb_attach(s5h1409_attach,
728                                            &hauppauge_ezqam_config,
729                                            &i2c_bus->i2c_adap);
730                         if (fe0->dvb.frontend != NULL) {
731                                 dvb_attach(tda829x_attach, fe0->dvb.frontend,
732                                            &dev->i2c_bus[1].i2c_adap, 0x42,
733                                            &tda829x_no_probe);
734                                 dvb_attach(tda18271_attach, fe0->dvb.frontend,
735                                            0x60, &dev->i2c_bus[1].i2c_adap,
736                                            &hauppauge_tda18271_config);
737                         }
738                         break;
739                 case 0:
740                 default:
741                         fe0->dvb.frontend =
742                                 dvb_attach(s5h1409_attach,
743                                            &hauppauge_generic_config,
744                                            &i2c_bus->i2c_adap);
745                         if (fe0->dvb.frontend != NULL)
746                                 dvb_attach(mt2131_attach, fe0->dvb.frontend,
747                                            &i2c_bus->i2c_adap,
748                                            &hauppauge_generic_tunerconfig, 0);
749                         break;
750                 }
751                 break;
752         case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
753                 i2c_bus = &dev->i2c_bus[0];
754                 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
755                                                 &hauppauge_hvr1800lp_config,
756                                                 &i2c_bus->i2c_adap);
757                 if (fe0->dvb.frontend != NULL) {
758                         dvb_attach(mt2131_attach, fe0->dvb.frontend,
759                                    &i2c_bus->i2c_adap,
760                                    &hauppauge_generic_tunerconfig, 0);
761                 }
762                 break;
763         case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
764                 i2c_bus = &dev->i2c_bus[0];
765                 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
766                                                 &fusionhdtv_5_express,
767                                                 &i2c_bus->i2c_adap);
768                 if (fe0->dvb.frontend != NULL) {
769                         dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
770                                    &i2c_bus->i2c_adap, 0x61,
771                                    TUNER_LG_TDVS_H06XF);
772                 }
773                 break;
774         case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
775                 i2c_bus = &dev->i2c_bus[1];
776                 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
777                                                 &hauppauge_hvr1500q_config,
778                                                 &dev->i2c_bus[0].i2c_adap);
779                 if (fe0->dvb.frontend != NULL)
780                         dvb_attach(xc5000_attach, fe0->dvb.frontend,
781                                    &i2c_bus->i2c_adap,
782                                    &hauppauge_hvr1500q_tunerconfig);
783                 break;
784         case CX23885_BOARD_HAUPPAUGE_HVR1500:
785                 i2c_bus = &dev->i2c_bus[1];
786                 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
787                                                 &hauppauge_hvr1500_config,
788                                                 &dev->i2c_bus[0].i2c_adap);
789                 if (fe0->dvb.frontend != NULL) {
790                         struct dvb_frontend *fe;
791                         struct xc2028_config cfg = {
792                                 .i2c_adap  = &i2c_bus->i2c_adap,
793                                 .i2c_addr  = 0x61,
794                         };
795                         static struct xc2028_ctrl ctl = {
796                                 .fname       = XC2028_DEFAULT_FIRMWARE,
797                                 .max_len     = 64,
798                                 .demod       = XC3028_FE_OREN538,
799                         };
800
801                         fe = dvb_attach(xc2028_attach,
802                                         fe0->dvb.frontend, &cfg);
803                         if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
804                                 fe->ops.tuner_ops.set_config(fe, &ctl);
805                 }
806                 break;
807         case CX23885_BOARD_HAUPPAUGE_HVR1200:
808         case CX23885_BOARD_HAUPPAUGE_HVR1700:
809                 i2c_bus = &dev->i2c_bus[0];
810                 fe0->dvb.frontend = dvb_attach(tda10048_attach,
811                         &hauppauge_hvr1200_config,
812                         &i2c_bus->i2c_adap);
813                 if (fe0->dvb.frontend != NULL) {
814                         dvb_attach(tda829x_attach, fe0->dvb.frontend,
815                                 &dev->i2c_bus[1].i2c_adap, 0x42,
816                                 &tda829x_no_probe);
817                         dvb_attach(tda18271_attach, fe0->dvb.frontend,
818                                 0x60, &dev->i2c_bus[1].i2c_adap,
819                                 &hauppauge_hvr1200_tuner_config);
820                 }
821                 break;
822         case CX23885_BOARD_HAUPPAUGE_HVR1210:
823                 i2c_bus = &dev->i2c_bus[0];
824                 fe0->dvb.frontend = dvb_attach(tda10048_attach,
825                         &hauppauge_hvr1210_config,
826                         &i2c_bus->i2c_adap);
827                 if (fe0->dvb.frontend != NULL) {
828                         dvb_attach(tda18271_attach, fe0->dvb.frontend,
829                                 0x60, &dev->i2c_bus[1].i2c_adap,
830                                 &hauppauge_hvr1210_tuner_config);
831                 }
832                 break;
833         case CX23885_BOARD_HAUPPAUGE_HVR1400:
834                 i2c_bus = &dev->i2c_bus[0];
835                 fe0->dvb.frontend = dvb_attach(dib7000p_attach,
836                         &i2c_bus->i2c_adap,
837                         0x12, &hauppauge_hvr1400_dib7000_config);
838                 if (fe0->dvb.frontend != NULL) {
839                         struct dvb_frontend *fe;
840                         struct xc2028_config cfg = {
841                                 .i2c_adap  = &dev->i2c_bus[1].i2c_adap,
842                                 .i2c_addr  = 0x64,
843                         };
844                         static struct xc2028_ctrl ctl = {
845                                 .fname   = XC3028L_DEFAULT_FIRMWARE,
846                                 .max_len = 64,
847                                 .demod   = XC3028_FE_DIBCOM52,
848                                 /* This is true for all demods with
849                                         v36 firmware? */
850                                 .type    = XC2028_D2633,
851                         };
852
853                         fe = dvb_attach(xc2028_attach,
854                                         fe0->dvb.frontend, &cfg);
855                         if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
856                                 fe->ops.tuner_ops.set_config(fe, &ctl);
857                 }
858                 break;
859         case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
860                 i2c_bus = &dev->i2c_bus[port->nr - 1];
861
862                 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
863                                                 &dvico_s5h1409_config,
864                                                 &i2c_bus->i2c_adap);
865                 if (fe0->dvb.frontend == NULL)
866                         fe0->dvb.frontend = dvb_attach(s5h1411_attach,
867                                                         &dvico_s5h1411_config,
868                                                         &i2c_bus->i2c_adap);
869                 if (fe0->dvb.frontend != NULL)
870                         dvb_attach(xc5000_attach, fe0->dvb.frontend,
871                                    &i2c_bus->i2c_adap,
872                                    &dvico_xc5000_tunerconfig);
873                 break;
874         case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: {
875                 i2c_bus = &dev->i2c_bus[port->nr - 1];
876
877                 fe0->dvb.frontend = dvb_attach(zl10353_attach,
878                                                &dvico_fusionhdtv_xc3028,
879                                                &i2c_bus->i2c_adap);
880                 if (fe0->dvb.frontend != NULL) {
881                         struct dvb_frontend      *fe;
882                         struct xc2028_config      cfg = {
883                                 .i2c_adap  = &i2c_bus->i2c_adap,
884                                 .i2c_addr  = 0x61,
885                         };
886                         static struct xc2028_ctrl ctl = {
887                                 .fname       = XC2028_DEFAULT_FIRMWARE,
888                                 .max_len     = 64,
889                                 .demod       = XC3028_FE_ZARLINK456,
890                         };
891
892                         fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
893                                         &cfg);
894                         if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
895                                 fe->ops.tuner_ops.set_config(fe, &ctl);
896                 }
897                 break;
898         }
899         case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
900         case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
901         case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
902                 i2c_bus = &dev->i2c_bus[0];
903
904                 fe0->dvb.frontend = dvb_attach(zl10353_attach,
905                         &dvico_fusionhdtv_xc3028,
906                         &i2c_bus->i2c_adap);
907                 if (fe0->dvb.frontend != NULL) {
908                         struct dvb_frontend      *fe;
909                         struct xc2028_config      cfg = {
910                                 .i2c_adap  = &dev->i2c_bus[1].i2c_adap,
911                                 .i2c_addr  = 0x61,
912                         };
913                         static struct xc2028_ctrl ctl = {
914                                 .fname       = XC2028_DEFAULT_FIRMWARE,
915                                 .max_len     = 64,
916                                 .demod       = XC3028_FE_ZARLINK456,
917                         };
918
919                         fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
920                                 &cfg);
921                         if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
922                                 fe->ops.tuner_ops.set_config(fe, &ctl);
923                 }
924                 break;
925         case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
926                 i2c_bus = &dev->i2c_bus[0];
927
928                 fe0->dvb.frontend = dvb_attach(zl10353_attach,
929                                                &dvico_fusionhdtv_xc3028,
930                                                &i2c_bus->i2c_adap);
931                 if (fe0->dvb.frontend != NULL) {
932                         struct dvb_frontend     *fe;
933                         struct xc4000_config    cfg = {
934                                 .i2c_address      = 0x61,
935                                 .default_pm       = 0,
936                                 .dvb_amplitude    = 134,
937                                 .set_smoothedcvbs = 1,
938                                 .if_khz           = 4560
939                         };
940
941                         fe = dvb_attach(xc4000_attach, fe0->dvb.frontend,
942                                         &dev->i2c_bus[1].i2c_adap, &cfg);
943                         if (!fe) {
944                                 printk(KERN_ERR "%s/2: xc4000 attach failed\n",
945                                        dev->name);
946                                 goto frontend_detach;
947                         }
948                 }
949                 break;
950         case CX23885_BOARD_TBS_6920:
951                 i2c_bus = &dev->i2c_bus[1];
952
953                 fe0->dvb.frontend = dvb_attach(cx24116_attach,
954                                         &tbs_cx24116_config,
955                                         &i2c_bus->i2c_adap);
956                 if (fe0->dvb.frontend != NULL)
957                         fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
958
959                 break;
960         case CX23885_BOARD_TEVII_S470:
961                 i2c_bus = &dev->i2c_bus[1];
962
963                 fe0->dvb.frontend = dvb_attach(ds3000_attach,
964                                         &tevii_ds3000_config,
965                                         &i2c_bus->i2c_adap);
966                 if (fe0->dvb.frontend != NULL)
967                         fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
968
969                 break;
970         case CX23885_BOARD_DVBWORLD_2005:
971                 i2c_bus = &dev->i2c_bus[1];
972
973                 fe0->dvb.frontend = dvb_attach(cx24116_attach,
974                         &dvbworld_cx24116_config,
975                         &i2c_bus->i2c_adap);
976                 break;
977         case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
978                 i2c_bus = &dev->i2c_bus[0];
979                 switch (port->nr) {
980                 /* port B */
981                 case 1:
982                         fe0->dvb.frontend = dvb_attach(stv0900_attach,
983                                                         &netup_stv0900_config,
984                                                         &i2c_bus->i2c_adap, 0);
985                         if (fe0->dvb.frontend != NULL) {
986                                 if (dvb_attach(stv6110_attach,
987                                                 fe0->dvb.frontend,
988                                                 &netup_stv6110_tunerconfig_a,
989                                                 &i2c_bus->i2c_adap)) {
990                                         if (!dvb_attach(lnbh24_attach,
991                                                         fe0->dvb.frontend,
992                                                         &i2c_bus->i2c_adap,
993                                                         LNBH24_PCL | LNBH24_TTX,
994                                                         LNBH24_TEN, 0x09))
995                                                 printk(KERN_ERR
996                                                         "No LNBH24 found!\n");
997
998                                 }
999                         }
1000                         break;
1001                 /* port C */
1002                 case 2:
1003                         fe0->dvb.frontend = dvb_attach(stv0900_attach,
1004                                                         &netup_stv0900_config,
1005                                                         &i2c_bus->i2c_adap, 1);
1006                         if (fe0->dvb.frontend != NULL) {
1007                                 if (dvb_attach(stv6110_attach,
1008                                                 fe0->dvb.frontend,
1009                                                 &netup_stv6110_tunerconfig_b,
1010                                                 &i2c_bus->i2c_adap)) {
1011                                         if (!dvb_attach(lnbh24_attach,
1012                                                         fe0->dvb.frontend,
1013                                                         &i2c_bus->i2c_adap,
1014                                                         LNBH24_PCL | LNBH24_TTX,
1015                                                         LNBH24_TEN, 0x0a))
1016                                                 printk(KERN_ERR
1017                                                         "No LNBH24 found!\n");
1018
1019                                 }
1020                         }
1021                         break;
1022                 }
1023                 break;
1024         case CX23885_BOARD_MYGICA_X8506:
1025                 i2c_bus = &dev->i2c_bus[0];
1026                 i2c_bus2 = &dev->i2c_bus[1];
1027                 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
1028                         &mygica_x8506_lgs8gl5_config,
1029                         &i2c_bus->i2c_adap);
1030                 if (fe0->dvb.frontend != NULL) {
1031                         dvb_attach(xc5000_attach,
1032                                 fe0->dvb.frontend,
1033                                 &i2c_bus2->i2c_adap,
1034                                 &mygica_x8506_xc5000_config);
1035                 }
1036                 break;
1037         case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1038                 i2c_bus = &dev->i2c_bus[0];
1039                 i2c_bus2 = &dev->i2c_bus[1];
1040                 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
1041                         &magicpro_prohdtve2_lgs8g75_config,
1042                         &i2c_bus->i2c_adap);
1043                 if (fe0->dvb.frontend != NULL) {
1044                         dvb_attach(xc5000_attach,
1045                                 fe0->dvb.frontend,
1046                                 &i2c_bus2->i2c_adap,
1047                                 &magicpro_prohdtve2_xc5000_config);
1048                 }
1049                 break;
1050         case CX23885_BOARD_HAUPPAUGE_HVR1850:
1051         case CX23885_BOARD_HAUPPAUGE_HVR1290:
1052                 i2c_bus = &dev->i2c_bus[0];
1053                 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1054                         &hcw_s5h1411_config,
1055                         &i2c_bus->i2c_adap);
1056                 if (fe0->dvb.frontend != NULL)
1057                         dvb_attach(tda18271_attach, fe0->dvb.frontend,
1058                                 0x60, &dev->i2c_bus[0].i2c_adap,
1059                                 &hauppauge_tda18271_config);
1060                 break;
1061         case CX23885_BOARD_MYGICA_X8558PRO:
1062                 switch (port->nr) {
1063                 /* port B */
1064                 case 1:
1065                         i2c_bus = &dev->i2c_bus[0];
1066                         fe0->dvb.frontend = dvb_attach(atbm8830_attach,
1067                                 &mygica_x8558pro_atbm8830_cfg1,
1068                                 &i2c_bus->i2c_adap);
1069                         if (fe0->dvb.frontend != NULL) {
1070                                 dvb_attach(max2165_attach,
1071                                         fe0->dvb.frontend,
1072                                         &i2c_bus->i2c_adap,
1073                                         &mygic_x8558pro_max2165_cfg1);
1074                         }
1075                         break;
1076                 /* port C */
1077                 case 2:
1078                         i2c_bus = &dev->i2c_bus[1];
1079                         fe0->dvb.frontend = dvb_attach(atbm8830_attach,
1080                                 &mygica_x8558pro_atbm8830_cfg2,
1081                                 &i2c_bus->i2c_adap);
1082                         if (fe0->dvb.frontend != NULL) {
1083                                 dvb_attach(max2165_attach,
1084                                         fe0->dvb.frontend,
1085                                         &i2c_bus->i2c_adap,
1086                                         &mygic_x8558pro_max2165_cfg2);
1087                         }
1088                         break;
1089                 }
1090                 break;
1091         case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1092                 i2c_bus = &dev->i2c_bus[0];
1093                 mfe_shared = 1;/* MFE */
1094                 port->frontends.gate = 0;/* not clear for me yet */
1095                 /* ports B, C */
1096                 /* MFE frontend 1 DVB-T */
1097                 fe0->dvb.frontend = dvb_attach(stv0367ter_attach,
1098                                         &netup_stv0367_config[port->nr - 1],
1099                                         &i2c_bus->i2c_adap);
1100                 if (fe0->dvb.frontend != NULL) {
1101                         if (NULL == dvb_attach(xc5000_attach,
1102                                         fe0->dvb.frontend,
1103                                         &i2c_bus->i2c_adap,
1104                                         &netup_xc5000_config[port->nr - 1]))
1105                                 goto frontend_detach;
1106                         /* load xc5000 firmware */
1107                         fe0->dvb.frontend->ops.tuner_ops.init(fe0->dvb.frontend);
1108                 }
1109                 /* MFE frontend 2 */
1110                 fe1 = videobuf_dvb_get_frontend(&port->frontends, 2);
1111                 if (fe1 == NULL)
1112                         goto frontend_detach;
1113                 /* DVB-C init */
1114                 fe1->dvb.frontend = dvb_attach(stv0367cab_attach,
1115                                         &netup_stv0367_config[port->nr - 1],
1116                                         &i2c_bus->i2c_adap);
1117                 if (fe1->dvb.frontend != NULL) {
1118                         fe1->dvb.frontend->id = 1;
1119                         if (NULL == dvb_attach(xc5000_attach,
1120                                         fe1->dvb.frontend,
1121                                         &i2c_bus->i2c_adap,
1122                                         &netup_xc5000_config[port->nr - 1]))
1123                                 goto frontend_detach;
1124                 }
1125                 break;
1126         default:
1127                 printk(KERN_INFO "%s: The frontend of your DVB/ATSC card "
1128                         " isn't supported yet\n",
1129                        dev->name);
1130                 break;
1131         }
1132
1133         if ((NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend)) {
1134                 printk(KERN_ERR "%s: frontend initialization failed\n",
1135                        dev->name);
1136                 goto frontend_detach;
1137         }
1138
1139         /* define general-purpose callback pointer */
1140         fe0->dvb.frontend->callback = cx23885_tuner_callback;
1141         if (fe1)
1142                 fe1->dvb.frontend->callback = cx23885_tuner_callback;
1143 #if 0
1144         /* Ensure all frontends negotiate bus access */
1145         fe0->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
1146         if (fe1)
1147                 fe1->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
1148 #endif
1149
1150         /* Put the analog decoder in standby to keep it quiet */
1151         call_all(dev, core, s_power, 0);
1152
1153         if (fe0->dvb.frontend->ops.analog_ops.standby)
1154                 fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend);
1155
1156         /* register everything */
1157         ret = videobuf_dvb_register_bus(&port->frontends, THIS_MODULE, port,
1158                                         &dev->pci->dev, adapter_nr, mfe_shared,
1159                                         cx23885_dvb_fe_ioctl_override);
1160         if (ret)
1161                 goto frontend_detach;
1162
1163         /* init CI & MAC */
1164         switch (dev->board) {
1165         case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: {
1166                 static struct netup_card_info cinfo;
1167
1168                 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
1169                 memcpy(port->frontends.adapter.proposed_mac,
1170                                 cinfo.port[port->nr - 1].mac, 6);
1171                 printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=%pM\n",
1172                         port->nr, port->frontends.adapter.proposed_mac);
1173
1174                 netup_ci_init(port);
1175                 break;
1176                 }
1177         case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
1178                 struct altera_ci_config netup_ci_cfg = {
1179                         .dev = dev,/* magic number to identify*/
1180                         .adapter = &port->frontends.adapter,/* for CI */
1181                         .demux = &fe0->dvb.demux,/* for hw pid filter */
1182                         .fpga_rw = netup_altera_fpga_rw,
1183                 };
1184
1185                 altera_ci_init(&netup_ci_cfg, port->nr);
1186                 break;
1187                 }
1188         case CX23885_BOARD_TEVII_S470: {
1189                 u8 eeprom[256]; /* 24C02 i2c eeprom */
1190
1191                 if (port->nr != 1)
1192                         break;
1193
1194                 /* Read entire EEPROM */
1195                 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1196                 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, sizeof(eeprom));
1197                 printk(KERN_INFO "TeVii S470 MAC= %pM\n", eeprom + 0xa0);
1198                 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xa0, 6);
1199                 break;
1200                 }
1201         }
1202
1203         return ret;
1204
1205 frontend_detach:
1206         port->gate_ctrl = NULL;
1207         videobuf_dvb_dealloc_frontends(&port->frontends);
1208         return -EINVAL;
1209 }
1210
1211 int cx23885_dvb_register(struct cx23885_tsport *port)
1212 {
1213
1214         struct videobuf_dvb_frontend *fe0;
1215         struct cx23885_dev *dev = port->dev;
1216         int err, i;
1217
1218         /* Here we need to allocate the correct number of frontends,
1219          * as reflected in the cards struct. The reality is that currently
1220          * no cx23885 boards support this - yet. But, if we don't modify this
1221          * code then the second frontend would never be allocated (later)
1222          * and fail with error before the attach in dvb_register().
1223          * Without these changes we risk an OOPS later. The changes here
1224          * are for safety, and should provide a good foundation for the
1225          * future addition of any multi-frontend cx23885 based boards.
1226          */
1227         printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
1228                 port->num_frontends);
1229
1230         for (i = 1; i <= port->num_frontends; i++) {
1231                 if (videobuf_dvb_alloc_frontend(
1232                         &port->frontends, i) == NULL) {
1233                         printk(KERN_ERR "%s() failed to alloc\n", __func__);
1234                         return -ENOMEM;
1235                 }
1236
1237                 fe0 = videobuf_dvb_get_frontend(&port->frontends, i);
1238                 if (!fe0)
1239                         err = -EINVAL;
1240
1241                 dprintk(1, "%s\n", __func__);
1242                 dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n",
1243                         dev->board,
1244                         dev->name,
1245                         dev->pci_bus,
1246                         dev->pci_slot);
1247
1248                 err = -ENODEV;
1249
1250                 /* dvb stuff */
1251                 /* We have to init the queue for each frontend on a port. */
1252                 printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name);
1253                 videobuf_queue_sg_init(&fe0->dvb.dvbq, &dvb_qops,
1254                             &dev->pci->dev, &port->slock,
1255                             V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_TOP,
1256                             sizeof(struct cx23885_buffer), port, NULL);
1257         }
1258         err = dvb_register(port);
1259         if (err != 0)
1260                 printk(KERN_ERR "%s() dvb_register failed err = %d\n",
1261                         __func__, err);
1262
1263         return err;
1264 }
1265
1266 int cx23885_dvb_unregister(struct cx23885_tsport *port)
1267 {
1268         struct videobuf_dvb_frontend *fe0;
1269
1270         /* FIXME: in an error condition where the we have
1271          * an expected number of frontends (attach problem)
1272          * then this might not clean up correctly, if 1
1273          * is invalid.
1274          * This comment only applies to future boards IF they
1275          * implement MFE support.
1276          */
1277         fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
1278         if (fe0 && fe0->dvb.frontend)
1279                 videobuf_dvb_unregister_bus(&port->frontends);
1280
1281         switch (port->dev->board) {
1282         case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1283                 netup_ci_exit(port);
1284                 break;
1285         case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1286                 altera_ci_release(port->dev, port->nr);
1287                 break;
1288         }
1289
1290         port->gate_ctrl = NULL;
1291
1292         return 0;
1293 }
1294