drivers/media/dvb/frontends/tda10048.c

   1 /*
   2     NXP TDA10048HN DVB OFDM demodulator driver
   3
   4     Copyright (C) 2008 Steven Toth <stoth@linuxtv.org>
   5
   6     This program is free software; you can redistribute it and/or modify
   7     it under the terms of the GNU General Public License as published by
   8     the Free Software Foundation; either version 2 of the License, or
   9     (at your option) any later version.
  10
  11     This program is distributed in the hope that it will be useful,
  12     but WITHOUT ANY WARRANTY; without even the implied warranty of
  13     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14     GNU General Public License for more details.
  15
  16     You should have received a copy of the GNU General Public License
  17     along with this program; if not, write to the Free Software
  18     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19
  20 */
  21
  22 #include <linux/kernel.h>
  23 #include <linux/init.h>
  24 #include <linux/module.h>
  25 #include <linux/string.h>
  26 #include <linux/slab.h>
  27 #include <linux/delay.h>
  28 #include <asm/div64.h>
  29 #include "dvb_frontend.h"
  30 #include "dvb_math.h"
  31 #include "tda10048.h"
  32
  33 #define TDA10048_DEFAULT_FIRMWARE "dvb-fe-tda10048-1.0.fw"
  34 #define TDA10048_DEFAULT_FIRMWARE_SIZE 24878
  35
  36 /* Register name definitions */
  37 #define TDA10048_IDENTITY          0x00
  38 #define TDA10048_VERSION           0x01
  39 #define TDA10048_DSP_CODE_CPT      0x0C
  40 #define TDA10048_DSP_CODE_IN       0x0E
  41 #define TDA10048_IN_CONF1          0x10
  42 #define TDA10048_IN_CONF2          0x11
  43 #define TDA10048_IN_CONF3          0x12
  44 #define TDA10048_OUT_CONF1         0x14
  45 #define TDA10048_OUT_CONF2         0x15
  46 #define TDA10048_OUT_CONF3         0x16
  47 #define TDA10048_AUTO              0x18
  48 #define TDA10048_SYNC_STATUS       0x1A
  49 #define TDA10048_CONF_C4_1         0x1E
  50 #define TDA10048_CONF_C4_2         0x1F
  51 #define TDA10048_CODE_IN_RAM       0x20
  52 #define TDA10048_CHANNEL_INFO_1_R  0x22
  53 #define TDA10048_CHANNEL_INFO_2_R  0x23
  54 #define TDA10048_CHANNEL_INFO1     0x24
  55 #define TDA10048_CHANNEL_INFO2     0x25
  56 #define TDA10048_TIME_ERROR_R      0x26
  57 #define TDA10048_TIME_ERROR        0x27
  58 #define TDA10048_FREQ_ERROR_LSB_R  0x28
  59 #define TDA10048_FREQ_ERROR_MSB_R  0x29
  60 #define TDA10048_FREQ_ERROR_LSB    0x2A
  61 #define TDA10048_FREQ_ERROR_MSB    0x2B
  62 #define TDA10048_IT_SEL            0x30
  63 #define TDA10048_IT_STAT           0x32
  64 #define TDA10048_DSP_AD_LSB        0x3C
  65 #define TDA10048_DSP_AD_MSB        0x3D
  66 #define TDA10048_DSP_REF_LSB       0x3E
  67 #define TDA10048_DSP_REF_MSB       0x3F
  68 #define TDA10048_CONF_TRISTATE1    0x44
  69 #define TDA10048_CONF_TRISTATE2    0x45
  70 #define TDA10048_CONF_POLARITY     0x46
  71 #define TDA10048_GPIO_SP_DS0       0x48
  72 #define TDA10048_GPIO_SP_DS1       0x49
  73 #define TDA10048_GPIO_SP_DS2       0x4A
  74 #define TDA10048_GPIO_SP_DS3       0x4B
  75 #define TDA10048_GPIO_OUT_SEL      0x4C
  76 #define TDA10048_GPIO_SELECT       0x4D
  77 #define TDA10048_IC_MODE           0x4E
  78 #define TDA10048_CONF_XO           0x50
  79 #define TDA10048_CONF_PLL1         0x51
  80 #define TDA10048_CONF_PLL2         0x52
  81 #define TDA10048_CONF_PLL3         0x53
  82 #define TDA10048_CONF_ADC          0x54
  83 #define TDA10048_CONF_ADC_2        0x55
  84 #define TDA10048_CONF_C1_1         0x60
  85 #define TDA10048_CONF_C1_3         0x62
  86 #define TDA10048_AGC_CONF          0x70
  87 #define TDA10048_AGC_THRESHOLD_LSB 0x72
  88 #define TDA10048_AGC_THRESHOLD_MSB 0x73
  89 #define TDA10048_AGC_RENORM        0x74
  90 #define TDA10048_AGC_GAINS         0x76
  91 #define TDA10048_AGC_TUN_MIN       0x78
  92 #define TDA10048_AGC_TUN_MAX       0x79
  93 #define TDA10048_AGC_IF_MIN        0x7A
  94 #define TDA10048_AGC_IF_MAX        0x7B
  95 #define TDA10048_AGC_TUN_LEVEL     0x7E
  96 #define TDA10048_AGC_IF_LEVEL      0x7F
  97 #define TDA10048_DIG_AGC_LEVEL     0x81
  98 #define TDA10048_FREQ_PHY2_LSB     0x86
  99 #define TDA10048_FREQ_PHY2_MSB     0x87
 100 #define TDA10048_TIME_INVWREF_LSB  0x88
 101 #define TDA10048_TIME_INVWREF_MSB  0x89
 102 #define TDA10048_TIME_WREF_LSB     0x8A
 103 #define TDA10048_TIME_WREF_MID1    0x8B
 104 #define TDA10048_TIME_WREF_MID2    0x8C
 105 #define TDA10048_TIME_WREF_MSB     0x8D
 106 #define TDA10048_NP_OUT            0xA2
 107 #define TDA10048_CELL_ID_LSB       0xA4
 108 #define TDA10048_CELL_ID_MSB       0xA5
 109 #define TDA10048_EXTTPS_ODD        0xAA
 110 #define TDA10048_EXTTPS_EVEN       0xAB
 111 #define TDA10048_TPS_LENGTH        0xAC
 112 #define TDA10048_FREE_REG_1        0xB2
 113 #define TDA10048_FREE_REG_2        0xB3
 114 #define TDA10048_CONF_C3_1         0xC0
 115 #define TDA10048_CYBER_CTRL        0xC2
 116 #define TDA10048_CBER_NMAX_LSB     0xC4
 117 #define TDA10048_CBER_NMAX_MSB     0xC5
 118 #define TDA10048_CBER_LSB          0xC6
 119 #define TDA10048_CBER_MSB          0xC7
 120 #define TDA10048_VBER_LSB          0xC8
 121 #define TDA10048_VBER_MID          0xC9
 122 #define TDA10048_VBER_MSB          0xCA
 123 #define TDA10048_CYBER_LUT         0xCC
 124 #define TDA10048_UNCOR_CTRL        0xCD
 125 #define TDA10048_UNCOR_CPT_LSB     0xCE
 126 #define TDA10048_UNCOR_CPT_MSB     0xCF
 127 #define TDA10048_SOFT_IT_C3        0xD6
 128 #define TDA10048_CONF_TS2          0xE0
 129 #define TDA10048_CONF_TS1          0xE1
 130
 131 static unsigned int debug;
 132
 133 #define dprintk(level, fmt, arg...)\
 134         do { if (debug >= level)\
 135                 printk(KERN_DEBUG "tda10048: " fmt, ## arg);\
 136         } while (0)
 137
 138 struct tda10048_state {
 139
 140         struct i2c_adapter *i2c;
 141
 142         /* configuration settings */
 143         const struct tda10048_config *config;
 144         struct dvb_frontend frontend;
 145
 146         int fwloaded;
 147
 148         u32 freq_if_hz;
 149         u32 xtal_hz;
 150         u32 pll_mfactor;
 151         u32 pll_nfactor;
 152         u32 pll_pfactor;
 153         u32 sample_freq;
 154
 155         enum fe_bandwidth bandwidth;
 156 };
 157
 158 static struct init_tab {
 159         u8      reg;
 160         u16     data;
 161 } init_tab[] = {
 162         { TDA10048_CONF_PLL1, 0x08 },
 163         { TDA10048_CONF_ADC_2, 0x00 },
 164         { TDA10048_CONF_C4_1, 0x00 },
 165         { TDA10048_CONF_PLL1, 0x0f },
 166         { TDA10048_CONF_PLL2, 0x0a },
 167         { TDA10048_CONF_PLL3, 0x43 },
 168         { TDA10048_FREQ_PHY2_LSB, 0x02 },
 169         { TDA10048_FREQ_PHY2_MSB, 0x0a },
 170         { TDA10048_TIME_WREF_LSB, 0xbd },
 171         { TDA10048_TIME_WREF_MID1, 0xe4 },
 172         { TDA10048_TIME_WREF_MID2, 0xa8 },
 173         { TDA10048_TIME_WREF_MSB, 0x02 },
 174         { TDA10048_TIME_INVWREF_LSB, 0x04 },
 175         { TDA10048_TIME_INVWREF_MSB, 0x06 },
 176         { TDA10048_CONF_C4_1, 0x00 },
 177         { TDA10048_CONF_C1_1, 0xa8 },
 178         { TDA10048_AGC_CONF, 0x16 },
 179         { TDA10048_CONF_C1_3, 0x0b },
 180         { TDA10048_AGC_TUN_MIN, 0x00 },
 181         { TDA10048_AGC_TUN_MAX, 0xff },
 182         { TDA10048_AGC_IF_MIN, 0x00 },
 183         { TDA10048_AGC_IF_MAX, 0xff },
 184         { TDA10048_AGC_THRESHOLD_MSB, 0x00 },
 185         { TDA10048_AGC_THRESHOLD_LSB, 0x70 },
 186         { TDA10048_CYBER_CTRL, 0x38 },
 187         { TDA10048_AGC_GAINS, 0x12 },
 188         { TDA10048_CONF_XO, 0x00 },
 189         { TDA10048_CONF_TS1, 0x07 },
 190         { TDA10048_IC_MODE, 0x00 },
 191         { TDA10048_CONF_TS2, 0xc0 },
 192         { TDA10048_CONF_TRISTATE1, 0x21 },
 193         { TDA10048_CONF_TRISTATE2, 0x00 },
 194         { TDA10048_CONF_POLARITY, 0x00 },
 195         { TDA10048_CONF_C4_2, 0x04 },
 196         { TDA10048_CONF_ADC, 0x60 },
 197         { TDA10048_CONF_ADC_2, 0x10 },
 198         { TDA10048_CONF_ADC, 0x60 },
 199         { TDA10048_CONF_ADC_2, 0x00 },
 200         { TDA10048_CONF_C1_1, 0xa8 },
 201         { TDA10048_UNCOR_CTRL, 0x00 },
 202         { TDA10048_CONF_C4_2, 0x04 },
 203 };
 204
 205 static int tda10048_writereg(struct tda10048_state *state, u8 reg, u8 data)
 206 {
 207         int ret;
 208         u8 buf[] = { reg, data };
 209         struct i2c_msg msg = {
 210                 .addr = state->config->demod_address,
 211                 .flags = 0, .buf = buf, .len = 2 };
 212
 213         dprintk(2, "%s(reg = 0x%02x, data = 0x%02x)\n", __func__, reg, data);
 214
 215         ret = i2c_transfer(state->i2c, &msg, 1);
 216
 217         if (ret != 1)
 218                 printk("%s: writereg error (ret == %i)\n", __func__, ret);
 219
 220         return (ret != 1) ? -1 : 0;
 221 }
 222
 223 static u8 tda10048_readreg(struct tda10048_state *state, u8 reg)
 224 {
 225         int ret;
 226         u8 b0[] = { reg };
 227         u8 b1[] = { 0 };
 228         struct i2c_msg msg[] = {
 229                 { .addr = state->config->demod_address,
 230                         .flags = 0, .buf = b0, .len = 1 },
 231                 { .addr = state->config->demod_address,
 232                         .flags = I2C_M_RD, .buf = b1, .len = 1 } };
 233
 234         dprintk(2, "%s(reg = 0x%02x)\n", __func__, reg);
 235
 236         ret = i2c_transfer(state->i2c, msg, 2);
 237
 238         if (ret != 2)
 239                 printk(KERN_ERR "%s: readreg error (ret == %i)\n",
 240                         __func__, ret);
 241
 242         return b1[0];
 243 }
 244
 245 static int tda10048_writeregbulk(struct tda10048_state *state, u8 reg,
 246                                  const u8 *data, u16 len)
 247 {
 248         int ret = -EREMOTEIO;
 249         struct i2c_msg msg;
 250         u8 *buf;
 251
 252         dprintk(2, "%s(%d, ?, len = %d)\n", __func__, reg, len);
 253
 254         buf = kmalloc(len + 1, GFP_KERNEL);
 255         if (buf == NULL) {
 256                 ret = -ENOMEM;
 257                 goto error;
 258         }
 259
 260         *buf = reg;
 261         memcpy(buf + 1, data, len);
 262
 263         msg.addr = state->config->demod_address;
 264         msg.flags = 0;
 265         msg.buf = buf;
 266         msg.len = len + 1;
 267
 268         dprintk(2, "%s():  write len = %d\n",
 269                 __func__, msg.len);
 270
 271         ret = i2c_transfer(state->i2c, &msg, 1);
 272         if (ret != 1) {
 273                 printk(KERN_ERR "%s(): writereg error err %i\n",
 274                          __func__, ret);
 275                 ret = -EREMOTEIO;
 276         }
 277
 278 error:
 279         kfree(buf);
 280
 281         return ret;
 282 }
 283
 284 static int tda10048_set_phy2(struct dvb_frontend *fe, u32 sample_freq_hz,
 285                              u32 if_hz)
 286 {
 287         struct tda10048_state *state = fe->demodulator_priv;
 288         u64 t;
 289
 290         dprintk(1, "%s()\n", __func__);
 291
 292         if (sample_freq_hz == 0)
 293                 return -EINVAL;
 294
 295         if (if_hz < (sample_freq_hz / 2)) {
 296                 /* PHY2 = (if2/fs) * 2^15 */
 297                 t = if_hz;
 298                 t *= 10;
 299                 t *= 32768;
 300                 do_div(t, sample_freq_hz);
 301                 t += 5;
 302                 do_div(t, 10);
 303         } else {
 304                 /* PHY2 = ((IF1-fs)/fs) * 2^15 */
 305                 t = sample_freq_hz - if_hz;
 306                 t *= 10;
 307                 t *= 32768;
 308                 do_div(t, sample_freq_hz);
 309                 t += 5;
 310                 do_div(t, 10);
 311                 t = ~t + 1;
 312         }
 313
 314         tda10048_writereg(state, TDA10048_FREQ_PHY2_LSB, (u8)t);
 315         tda10048_writereg(state, TDA10048_FREQ_PHY2_MSB, (u8)(t >> 8));
 316
 317         return 0;
 318 }
 319
 320 static int tda10048_set_wref(struct dvb_frontend *fe, u32 sample_freq_hz,
 321                              u32 bw)
 322 {
 323         struct tda10048_state *state = fe->demodulator_priv;
 324         u64 t, z;
 325         u32 b = 8000000;
 326
 327         dprintk(1, "%s()\n", __func__);
 328
 329         if (sample_freq_hz == 0)
 330                 return -EINVAL;
 331
 332         if (bw == BANDWIDTH_6_MHZ)
 333                 b = 6000000;
 334         else
 335         if (bw == BANDWIDTH_7_MHZ)
 336                 b = 7000000;
 337
 338         /* WREF = (B / (7 * fs)) * 2^31 */
 339         t = b * 10;
 340         /* avoid warning: this decimal constant is unsigned only in ISO C90 */
 341         /* t *= 2147483648 on 32bit platforms */
 342         t *= (2048 * 1024);
 343         t *= 1024;
 344         z = 7 * sample_freq_hz;
 345         do_div(t, z);
 346         t += 5;
 347         do_div(t, 10);
 348
 349         tda10048_writereg(state, TDA10048_TIME_WREF_LSB, (u8)t);
 350         tda10048_writereg(state, TDA10048_TIME_WREF_MID1, (u8)(t >> 8));
 351         tda10048_writereg(state, TDA10048_TIME_WREF_MID2, (u8)(t >> 16));
 352         tda10048_writereg(state, TDA10048_TIME_WREF_MSB, (u8)(t >> 24));
 353
 354         return 0;
 355 }
 356
 357 static int tda10048_set_invwref(struct dvb_frontend *fe, u32 sample_freq_hz,
 358                                 u32 bw)
 359 {
 360         struct tda10048_state *state = fe->demodulator_priv;
 361         u64 t;
 362         u32 b = 8000000;
 363
 364         dprintk(1, "%s()\n", __func__);
 365
 366         if (sample_freq_hz == 0)
 367                 return -EINVAL;
 368
 369         if (bw == BANDWIDTH_6_MHZ)
 370                 b = 6000000;
 371         else
 372         if (bw == BANDWIDTH_7_MHZ)
 373                 b = 7000000;
 374
 375         /* INVWREF = ((7 * fs) / B) * 2^5 */
 376         t = sample_freq_hz;
 377         t *= 7;
 378         t *= 32;
 379         t *= 10;
 380         do_div(t, b);
 381         t += 5;
 382         do_div(t, 10);
 383
 384         tda10048_writereg(state, TDA10048_TIME_INVWREF_LSB, (u8)t);
 385         tda10048_writereg(state, TDA10048_TIME_INVWREF_MSB, (u8)(t >> 8));
 386
 387         return 0;
 388 }
 389
 390 static int tda10048_set_bandwidth(struct dvb_frontend *fe,
 391         enum fe_bandwidth bw)
 392 {
 393         struct tda10048_state *state = fe->demodulator_priv;
 394         dprintk(1, "%s(bw=%d)\n", __func__, bw);
 395
 396         /* Bandwidth setting may need to be adjusted */
 397         switch (bw) {
 398         case BANDWIDTH_6_MHZ:
 399         case BANDWIDTH_7_MHZ:
 400         case BANDWIDTH_8_MHZ:
 401                 tda10048_set_wref(fe, state->sample_freq, bw);
 402                 tda10048_set_invwref(fe, state->sample_freq, bw);
 403                 break;
 404         default:
 405                 printk(KERN_ERR "%s() invalid bandwidth\n", __func__);
 406                 return -EINVAL;
 407         }
 408
 409         state->bandwidth = bw;
 410
 411         return 0;
 412 }
 413
 414 static int tda10048_set_pll(struct dvb_frontend *fe)
 415 {
 416         struct tda10048_state *state = fe->demodulator_priv;
 417         int ret = 0;
 418
 419         dprintk(1, "%s()\n", __func__);
 420
 421         if ((state->config->clk_freq_khz == TDA10048_CLK_4000) &&
 422                 (state->config->if_freq_khz == TDA10048_IF_36130)) {
 423                 state->freq_if_hz = TDA10048_IF_36130 * 1000;
 424                 state->xtal_hz = TDA10048_CLK_4000 * 1000;
 425                 state->pll_mfactor = 10;
 426                 state->pll_nfactor = 0;
 427                 state->pll_pfactor = 0;
 428         } else
 429         if ((state->config->clk_freq_khz == TDA10048_CLK_16000) &&
 430                 (state->config->if_freq_khz == TDA10048_IF_4300)) {
 431                 state->freq_if_hz = TDA10048_IF_4300 * 1000;
 432                 state->xtal_hz = TDA10048_CLK_16000 * 1000;
 433                 state->pll_mfactor = 10;
 434                 state->pll_nfactor = 3;
 435                 state->pll_pfactor = 0;
 436         } else
 437         if ((state->config->clk_freq_khz == TDA10048_CLK_16000) &&
 438                 (state->config->if_freq_khz == TDA10048_IF_4000)) {
 439                 state->freq_if_hz = TDA10048_IF_4000 * 1000;
 440                 state->xtal_hz = TDA10048_CLK_16000 * 1000;
 441                 state->pll_mfactor = 10;
 442                 state->pll_nfactor = 3;
 443                 state->pll_pfactor = 0;
 444         } else
 445         if ((state->config->clk_freq_khz == TDA10048_CLK_16000) &&
 446                 (state->config->if_freq_khz == TDA10048_IF_36130)) {
 447                 state->freq_if_hz = TDA10048_IF_36130 * 1000;
 448                 state->xtal_hz = TDA10048_CLK_16000 * 1000;
 449                 state->pll_mfactor = 10;
 450                 state->pll_nfactor = 3;
 451                 state->pll_pfactor = 0;
 452         } else {
 453                 printk(KERN_ERR "%s() Incorrect attach settings\n", __func__);
 454                 ret = -EINVAL;
 455         }
 456
 457         dprintk(1, "- freq_if_hz = %d\n", state->freq_if_hz);
 458         dprintk(1, "- xtal_hz = %d\n", state->xtal_hz);
 459         dprintk(1, "- pll_mfactor = %d\n", state->pll_mfactor);
 460         dprintk(1, "- pll_nfactor = %d\n", state->pll_nfactor);
 461         dprintk(1, "- pll_pfactor = %d\n", state->pll_pfactor);
 462
 463         /* Calculate the sample frequency */
 464         state->sample_freq = state->xtal_hz * (state->pll_mfactor + 45);
 465         state->sample_freq /= (state->pll_nfactor + 1);
 466         state->sample_freq /= (state->pll_pfactor + 4);
 467         dprintk(1, "- sample_freq = %d\n", state->sample_freq);
 468
 469         tda10048_set_phy2(fe, state->sample_freq,
 470                 state->config->if_freq_khz * 1000);
 471         tda10048_set_wref(fe, state->sample_freq, state->bandwidth);
 472         tda10048_set_invwref(fe, state->sample_freq, state->bandwidth);
 473
 474         return ret;
 475 }
 476
 477 static int tda10048_firmware_upload(struct dvb_frontend *fe)
 478 {
 479         struct tda10048_state *state = fe->demodulator_priv;
 480         const struct firmware *fw;
 481         int ret;
 482         int pos = 0;
 483         int cnt;
 484         u8 wlen = state->config->fwbulkwritelen;
 485
 486         if ((wlen != TDA10048_BULKWRITE_200) && (wlen != TDA10048_BULKWRITE_50))
 487                 wlen = TDA10048_BULKWRITE_200;
 488
 489         /* request the firmware, this will block and timeout */
 490         printk(KERN_INFO "%s: waiting for firmware upload (%s)...\n",
 491                 __func__,
 492                 TDA10048_DEFAULT_FIRMWARE);
 493
 494         ret = request_firmware(&fw, TDA10048_DEFAULT_FIRMWARE,
 495                 state->i2c->dev.parent);
 496         if (ret) {
 497                 printk(KERN_ERR "%s: Upload failed. (file not found?)\n",
 498                         __func__);
 499                 return -EIO;
 500         } else {
 501                 printk(KERN_INFO "%s: firmware read %Zu bytes.\n",
 502                         __func__,
 503                         fw->size);
 504                 ret = 0;
 505         }
 506
 507         if (fw->size != TDA10048_DEFAULT_FIRMWARE_SIZE) {
 508                 printk(KERN_ERR "%s: firmware incorrect size\n", __func__);
 509                 ret = -EIO;
 510         } else {
 511                 printk(KERN_INFO "%s: firmware uploading\n", __func__);
 512
 513                 /* Soft reset */
 514                 tda10048_writereg(state, TDA10048_CONF_TRISTATE1,
 515                         tda10048_readreg(state, TDA10048_CONF_TRISTATE1)
 516                                 & 0xfe);
 517                 tda10048_writereg(state, TDA10048_CONF_TRISTATE1,
 518                         tda10048_readreg(state, TDA10048_CONF_TRISTATE1)
 519                                 | 0x01);
 520
 521                 /* Put the demod into host download mode */
 522                 tda10048_writereg(state, TDA10048_CONF_C4_1,
 523                         tda10048_readreg(state, TDA10048_CONF_C4_1) & 0xf9);
 524
 525                 /* Boot the DSP */
 526                 tda10048_writereg(state, TDA10048_CONF_C4_1,
 527                         tda10048_readreg(state, TDA10048_CONF_C4_1) | 0x08);
 528
 529                 /* Prepare for download */
 530                 tda10048_writereg(state, TDA10048_DSP_CODE_CPT, 0);
 531
 532                 /* Download the firmware payload */
 533                 while (pos < fw->size) {
 534
 535                         if ((fw->size - pos) > wlen)
 536                                 cnt = wlen;
 537                         else
 538                                 cnt = fw->size - pos;
 539
 540                         tda10048_writeregbulk(state, TDA10048_DSP_CODE_IN,
 541                                 &fw->data[pos], cnt);
 542
 543                         pos += cnt;
 544                 }
 545
 546                 ret = -EIO;
 547                 /* Wait up to 250ms for the DSP to boot */
 548                 for (cnt = 0; cnt < 250 ; cnt += 10) {
 549
 550                         msleep(10);
 551
 552                         if (tda10048_readreg(state, TDA10048_SYNC_STATUS)
 553                                 & 0x40) {
 554                                 ret = 0;
 555                                 break;
 556                         }
 557                 }
 558         }
 559
 560         release_firmware(fw);
 561
 562         if (ret == 0) {
 563                 printk(KERN_INFO "%s: firmware uploaded\n", __func__);
 564                 state->fwloaded = 1;
 565         } else
 566                 printk(KERN_ERR "%s: firmware upload failed\n", __func__);
 567
 568         return ret;
 569 }
 570
 571 static int tda10048_set_inversion(struct dvb_frontend *fe, int inversion)
 572 {
 573         struct tda10048_state *state = fe->demodulator_priv;
 574
 575         dprintk(1, "%s(%d)\n", __func__, inversion);
 576
 577         if (inversion == TDA10048_INVERSION_ON)
 578                 tda10048_writereg(state, TDA10048_CONF_C1_1,
 579                         tda10048_readreg(state, TDA10048_CONF_C1_1) | 0x20);
 580         else
 581                 tda10048_writereg(state, TDA10048_CONF_C1_1,
 582                         tda10048_readreg(state, TDA10048_CONF_C1_1) & 0xdf);
 583
 584         return 0;
 585 }
 586
 587 /* Retrieve the demod settings */
 588 static int tda10048_get_tps(struct tda10048_state *state,
 589         struct dvb_ofdm_parameters *p)
 590 {
 591         u8 val;
 592
 593         /* Make sure the TPS regs are valid */
 594         if (!(tda10048_readreg(state, TDA10048_AUTO) & 0x01))
 595                 return -EAGAIN;
 596
 597         val = tda10048_readreg(state, TDA10048_OUT_CONF2);
 598         switch ((val & 0x60) >> 5) {
 599         case 0:
 600                 p->constellation = QPSK;
 601                 break;
 602         case 1:
 603                 p->constellation = QAM_16;
 604                 break;
 605         case 2:
 606                 p->constellation = QAM_64;
 607                 break;
 608         }
 609         switch ((val & 0x18) >> 3) {
 610         case 0:
 611                 p->hierarchy_information = HIERARCHY_NONE;
 612                 break;
 613         case 1:
 614                 p->hierarchy_information = HIERARCHY_1;
 615                 break;
 616         case 2:
 617                 p->hierarchy_information = HIERARCHY_2;
 618                 break;
 619         case 3:
 620                 p->hierarchy_information = HIERARCHY_4;
 621                 break;
 622         }
 623         switch (val & 0x07) {
 624         case 0:
 625                 p->code_rate_HP = FEC_1_2;
 626                 break;
 627         case 1:
 628                 p->code_rate_HP = FEC_2_3;
 629                 break;
 630         case 2:
 631                 p->code_rate_HP = FEC_3_4;
 632                 break;
 633         case 3:
 634                 p->code_rate_HP = FEC_5_6;
 635                 break;
 636         case 4:
 637                 p->code_rate_HP = FEC_7_8;
 638                 break;
 639         }
 640
 641         val = tda10048_readreg(state, TDA10048_OUT_CONF3);
 642         switch (val & 0x07) {
 643         case 0:
 644                 p->code_rate_LP = FEC_1_2;
 645                 break;
 646         case 1:
 647                 p->code_rate_LP = FEC_2_3;
 648                 break;
 649         case 2:
 650                 p->code_rate_LP = FEC_3_4;
 651                 break;
 652         case 3:
 653                 p->code_rate_LP = FEC_5_6;
 654                 break;
 655         case 4:
 656                 p->code_rate_LP = FEC_7_8;
 657                 break;
 658         }
 659
 660         val = tda10048_readreg(state, TDA10048_OUT_CONF1);
 661         switch ((val & 0x0c) >> 2) {
 662         case 0:
 663                 p->guard_interval = GUARD_INTERVAL_1_32;
 664                 break;
 665         case 1:
 666                 p->guard_interval = GUARD_INTERVAL_1_16;
 667                 break;
 668         case 2:
 669                 p->guard_interval =  GUARD_INTERVAL_1_8;
 670                 break;
 671         case 3:
 672                 p->guard_interval =  GUARD_INTERVAL_1_4;
 673                 break;
 674         }
 675         switch (val & 0x02) {
 676         case 0:
 677                 p->transmission_mode = TRANSMISSION_MODE_2K;
 678                 break;
 679         case 1:
 680                 p->transmission_mode = TRANSMISSION_MODE_8K;
 681                 break;
 682         }
 683
 684         return 0;
 685 }
 686
 687 static int tda10048_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
 688 {
 689         struct tda10048_state *state = fe->demodulator_priv;
 690         dprintk(1, "%s(%d)\n", __func__, enable);
 691
 692         if (enable)
 693                 return tda10048_writereg(state, TDA10048_CONF_C4_1,
 694                         tda10048_readreg(state, TDA10048_CONF_C4_1) | 0x02);
 695         else
 696                 return tda10048_writereg(state, TDA10048_CONF_C4_1,
 697                         tda10048_readreg(state, TDA10048_CONF_C4_1) & 0xfd);
 698 }
 699
 700 static int tda10048_output_mode(struct dvb_frontend *fe, int serial)
 701 {
 702         struct tda10048_state *state = fe->demodulator_priv;
 703         dprintk(1, "%s(%d)\n", __func__, serial);
 704
 705         /* Ensure pins are out of tri-state */
 706         tda10048_writereg(state, TDA10048_CONF_TRISTATE1, 0x21);
 707         tda10048_writereg(state, TDA10048_CONF_TRISTATE2, 0x00);
 708
 709         if (serial) {
 710                 tda10048_writereg(state, TDA10048_IC_MODE, 0x80 | 0x20);
 711                 tda10048_writereg(state, TDA10048_CONF_TS2, 0xc0);
 712         } else {
 713                 tda10048_writereg(state, TDA10048_IC_MODE, 0x00);
 714                 tda10048_writereg(state, TDA10048_CONF_TS2, 0x01);
 715         }
 716
 717         return 0;
 718 }
 719
 720 /* Talk to the demod, set the FEC, GUARD, QAM settings etc */
 721 /* TODO: Support manual tuning with specific params */
 722 static int tda10048_set_frontend(struct dvb_frontend *fe,
 723         struct dvb_frontend_parameters *p)
 724 {
 725         struct tda10048_state *state = fe->demodulator_priv;
 726
 727         dprintk(1, "%s(frequency=%d)\n", __func__, p->frequency);
 728
 729         if (p->u.ofdm.bandwidth != state->bandwidth)
 730                 tda10048_set_bandwidth(fe, p->u.ofdm.bandwidth);
 731
 732         if (fe->ops.tuner_ops.set_params) {
 733
 734                 if (fe->ops.i2c_gate_ctrl)
 735                         fe->ops.i2c_gate_ctrl(fe, 1);
 736
 737                 fe->ops.tuner_ops.set_params(fe, p);
 738
 739                 if (fe->ops.i2c_gate_ctrl)
 740                         fe->ops.i2c_gate_ctrl(fe, 0);
 741         }
 742
 743         /* Enable demod TPS auto detection and begin acquisition */
 744         tda10048_writereg(state, TDA10048_AUTO, 0x57);
 745
 746         return 0;
 747 }
 748
 749 /* Establish sane defaults and load firmware. */
 750 static int tda10048_init(struct dvb_frontend *fe)
 751 {
 752         struct tda10048_state *state = fe->demodulator_priv;
 753         int ret = 0, i;
 754
 755         dprintk(1, "%s()\n", __func__);
 756
 757         /* Apply register defaults */
 758         for (i = 0; i < ARRAY_SIZE(init_tab); i++)
 759                 tda10048_writereg(state, init_tab[i].reg, init_tab[i].data);
 760
 761         if (state->fwloaded == 0)
 762                 ret = tda10048_firmware_upload(fe);
 763
 764         /* Set either serial or parallel */
 765         tda10048_output_mode(fe, state->config->output_mode);
 766
 767         /* Set inversion */
 768         tda10048_set_inversion(fe, state->config->inversion);
 769
 770         /* Establish default PLL values */
 771         tda10048_set_pll(fe);
 772
 773         /* Establish default bandwidth */
 774         tda10048_set_bandwidth(fe, BANDWIDTH_8_MHZ);
 775
 776         /* Ensure we leave the gate closed */
 777         tda10048_i2c_gate_ctrl(fe, 0);
 778
 779         return ret;
 780 }
 781
 782 static int tda10048_read_status(struct dvb_frontend *fe, fe_status_t *status)
 783 {
 784         struct tda10048_state *state = fe->demodulator_priv;
 785         u8 reg;
 786
 787         *status = 0;
 788
 789         reg = tda10048_readreg(state, TDA10048_SYNC_STATUS);
 790
 791         dprintk(1, "%s() status =0x%02x\n", __func__, reg);
 792
 793         if (reg & 0x02)
 794                 *status |= FE_HAS_CARRIER;
 795
 796         if (reg & 0x04)
 797                 *status |= FE_HAS_SIGNAL;
 798
 799         if (reg & 0x08) {
 800                 *status |= FE_HAS_LOCK;
 801                 *status |= FE_HAS_VITERBI;
 802                 *status |= FE_HAS_SYNC;
 803         }
 804
 805         return 0;
 806 }
 807
 808 static int tda10048_read_ber(struct dvb_frontend *fe, u32 *ber)
 809 {
 810         struct tda10048_state *state = fe->demodulator_priv;
 811
 812         dprintk(1, "%s()\n", __func__);
 813
 814         /* TODO: A reset may be required here */
 815         *ber = tda10048_readreg(state, TDA10048_CBER_MSB) << 8 |
 816                 tda10048_readreg(state, TDA10048_CBER_LSB);
 817
 818         return 0;
 819 }
 820
 821 static int tda10048_read_signal_strength(struct dvb_frontend *fe,
 822         u16 *signal_strength)
 823 {
 824         struct tda10048_state *state = fe->demodulator_priv;
 825         u8 v;
 826
 827         dprintk(1, "%s()\n", __func__);
 828
 829         *signal_strength = 65535;
 830
 831         v = tda10048_readreg(state, TDA10048_NP_OUT);
 832         if (v > 0)
 833                 *signal_strength -= (v << 8) | v;
 834
 835         return 0;
 836 }
 837
 838 /* SNR lookup table */
 839 static struct snr_tab {
 840         u8 val;
 841         u8 data;
 842 } snr_tab[] = {
 843         {   0,   0 },
 844         {   1, 246 },
 845         {   2, 215 },
 846         {   3, 198 },
 847         {   4, 185 },
 848         {   5, 176 },
 849         {   6, 168 },
 850         {   7, 161 },
 851         {   8, 155 },
 852         {   9, 150 },
 853         {  10, 146 },
 854         {  11, 141 },
 855         {  12, 138 },
 856         {  13, 134 },
 857         {  14, 131 },
 858         {  15, 128 },
 859         {  16, 125 },
 860         {  17, 122 },
 861         {  18, 120 },
 862         {  19, 118 },
 863         {  20, 115 },
 864         {  21, 113 },
 865         {  22, 111 },
 866         {  23, 109 },
 867         {  24, 107 },
 868         {  25, 106 },
 869         {  26, 104 },
 870         {  27, 102 },
 871         {  28, 101 },
 872         {  29,  99 },
 873         {  30,  98 },
 874         {  31,  96 },
 875         {  32,  95 },
 876         {  33,  94 },
 877         {  34,  92 },
 878         {  35,  91 },
 879         {  36,  90 },
 880         {  37,  89 },
 881         {  38,  88 },
 882         {  39,  86 },
 883         {  40,  85 },
 884         {  41,  84 },
 885         {  42,  83 },
 886         {  43,  82 },
 887         {  44,  81 },
 888         {  45,  80 },
 889         {  46,  79 },
 890         {  47,  78 },
 891         {  48,  77 },
 892         {  49,  76 },
 893         {  50,  76 },
 894         {  51,  75 },
 895         {  52,  74 },
 896         {  53,  73 },
 897         {  54,  72 },
 898         {  56,  71 },
 899         {  57,  70 },
 900         {  58,  69 },
 901         {  60,  68 },
 902         {  61,  67 },
 903         {  63,  66 },
 904         {  64,  65 },
 905         {  66,  64 },
 906         {  67,  63 },
 907         {  68,  62 },
 908         {  69,  62 },
 909         {  70,  61 },
 910         {  72,  60 },
 911         {  74,  59 },
 912         {  75,  58 },
 913         {  77,  57 },
 914         {  79,  56 },
 915         {  81,  55 },
 916         {  83,  54 },
 917         {  85,  53 },
 918         {  87,  52 },
 919         {  89,  51 },
 920         {  91,  50 },
 921         {  93,  49 },
 922         {  95,  48 },
 923         {  97,  47 },
 924         { 100,  46 },
 925         { 102,  45 },
 926         { 104,  44 },
 927         { 107,  43 },
 928         { 109,  42 },
 929         { 112,  41 },
 930         { 114,  40 },
 931         { 117,  39 },
 932         { 120,  38 },
 933         { 123,  37 },
 934         { 125,  36 },
 935         { 128,  35 },
 936         { 131,  34 },
 937         { 134,  33 },
 938         { 138,  32 },
 939         { 141,  31 },
 940         { 144,  30 },
 941         { 147,  29 },
 942         { 151,  28 },
 943         { 154,  27 },
 944         { 158,  26 },
 945         { 162,  25 },
 946         { 165,  24 },
 947         { 169,  23 },
 948         { 173,  22 },
 949         { 177,  21 },
 950         { 181,  20 },
 951         { 186,  19 },
 952         { 190,  18 },
 953         { 194,  17 },
 954         { 199,  16 },
 955         { 204,  15 },
 956         { 208,  14 },
 957         { 213,  13 },
 958         { 218,  12 },
 959         { 223,  11 },
 960         { 229,  10 },
 961         { 234,   9 },
 962         { 239,   8 },
 963         { 245,   7 },
 964         { 251,   6 },
 965         { 255,   5 },
 966 };
 967
 968 static int tda10048_read_snr(struct dvb_frontend *fe, u16 *snr)
 969 {
 970         struct tda10048_state *state = fe->demodulator_priv;
 971         u8 v;
 972         int i, ret = -EINVAL;
 973
 974         dprintk(1, "%s()\n", __func__);
 975
 976         v = tda10048_readreg(state, TDA10048_NP_OUT);
 977         for (i = 0; i < ARRAY_SIZE(snr_tab); i++) {
 978                 if (v <= snr_tab[i].val) {
 979                         *snr = snr_tab[i].data;
 980                         ret = 0;
 981                         break;
 982                 }
 983         }
 984
 985         return ret;
 986 }
 987
 988 static int tda10048_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
 989 {
 990         struct tda10048_state *state = fe->demodulator_priv;
 991
 992         dprintk(1, "%s()\n", __func__);
 993
 994         *ucblocks = tda10048_readreg(state, TDA10048_UNCOR_CPT_MSB) << 8 |
 995                 tda10048_readreg(state, TDA10048_UNCOR_CPT_LSB);
 996
 997         return 0;
 998 }
 999
1000 static int tda10048_get_frontend(struct dvb_frontend *fe,
1001         struct dvb_frontend_parameters *p)
1002 {
1003         struct tda10048_state *state = fe->demodulator_priv;
1004
1005         dprintk(1, "%s()\n", __func__);
1006
1007         p->inversion = tda10048_readreg(state, TDA10048_CONF_C1_1)
1008                 & 0x20 ? INVERSION_ON : INVERSION_OFF;
1009
1010         return tda10048_get_tps(state, &p->u.ofdm);
1011 }
1012
1013 static int tda10048_get_tune_settings(struct dvb_frontend *fe,
1014         struct dvb_frontend_tune_settings *tune)
1015 {
1016         tune->min_delay_ms = 1000;
1017         return 0;
1018 }
1019
1020 static void tda10048_release(struct dvb_frontend *fe)
1021 {
1022         struct tda10048_state *state = fe->demodulator_priv;
1023         dprintk(1, "%s()\n", __func__);
1024         kfree(state);
1025 }
1026
1027 static struct dvb_frontend_ops tda10048_ops;
1028
1029 struct dvb_frontend *tda10048_attach(const struct tda10048_config *config,
1030         struct i2c_adapter *i2c)
1031 {
1032         struct tda10048_state *state = NULL;
1033
1034         dprintk(1, "%s()\n", __func__);
1035
1036         /* allocate memory for the internal state */
1037         state = kmalloc(sizeof(struct tda10048_state), GFP_KERNEL);
1038         if (state == NULL)
1039                 goto error;
1040
1041         /* setup the state */
1042         state->config = config;
1043         state->i2c = i2c;
1044         state->fwloaded = 0;
1045         state->bandwidth = BANDWIDTH_8_MHZ;
1046
1047         /* check if the demod is present */
1048         if (tda10048_readreg(state, TDA10048_IDENTITY) != 0x048)
1049                 goto error;
1050
1051         /* create dvb_frontend */
1052         memcpy(&state->frontend.ops, &tda10048_ops,
1053                 sizeof(struct dvb_frontend_ops));
1054         state->frontend.demodulator_priv = state;
1055
1056         /* Set the xtal and freq defaults */
1057         if (tda10048_set_pll(&state->frontend) != 0)
1058                 goto error;
1059
1060         /* Leave the gate closed */
1061         tda10048_i2c_gate_ctrl(&state->frontend, 0);
1062
1063         return &state->frontend;
1064
1065 error:
1066         kfree(state);
1067         return NULL;
1068 }
1069 EXPORT_SYMBOL(tda10048_attach);
1070
1071 static struct dvb_frontend_ops tda10048_ops = {
1072
1073         .info = {
1074                 .name                   = "NXP TDA10048HN DVB-T",
1075                 .type                   = FE_OFDM,
1076                 .frequency_min          = 177000000,
1077                 .frequency_max          = 858000000,
1078                 .frequency_stepsize     = 166666,
1079                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1080                 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1081                 FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
1082                 FE_CAN_HIERARCHY_AUTO | FE_CAN_GUARD_INTERVAL_AUTO |
1083                 FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_RECOVER
1084         },
1085
1086         .release = tda10048_release,
1087         .init = tda10048_init,
1088         .i2c_gate_ctrl = tda10048_i2c_gate_ctrl,
1089         .set_frontend = tda10048_set_frontend,
1090         .get_frontend = tda10048_get_frontend,
1091         .get_tune_settings = tda10048_get_tune_settings,
1092         .read_status = tda10048_read_status,
1093         .read_ber = tda10048_read_ber,
1094         .read_signal_strength = tda10048_read_signal_strength,
1095         .read_snr = tda10048_read_snr,
1096         .read_ucblocks = tda10048_read_ucblocks,
1097 };
1098
1099 module_param(debug, int, 0644);
1100 MODULE_PARM_DESC(debug, "Enable verbose debug messages");
1101
1102 MODULE_DESCRIPTION("NXP TDA10048HN DVB-T Demodulator driver");
1103 MODULE_AUTHOR("Steven Toth");
1104 MODULE_LICENSE("GPL");