2 * Sony CXD2820R demodulator driver
4 * Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
22 #include "cxd2820r_priv.h"
25 module_param_named(debug, cxd2820r_debug, int, 0644);
26 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
28 /* write multiple registers */
29 static int cxd2820r_wr_regs_i2c(struct cxd2820r_priv *priv, u8 i2c, u8 reg,
34 struct i2c_msg msg[1] = {
44 memcpy(&buf[1], val, len);
46 ret = i2c_transfer(priv->i2c, msg, 1);
50 warn("i2c wr failed ret:%d reg:%02x len:%d", ret, reg, len);
56 /* read multiple registers */
57 static int cxd2820r_rd_regs_i2c(struct cxd2820r_priv *priv, u8 i2c, u8 reg,
62 struct i2c_msg msg[2] = {
76 ret = i2c_transfer(priv->i2c, msg, 2);
78 memcpy(val, buf, len);
81 warn("i2c rd failed ret:%d reg:%02x len:%d", ret, reg, len);
88 /* write multiple registers */
89 int cxd2820r_wr_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
94 u8 reg = (reginfo >> 0) & 0xff;
95 u8 bank = (reginfo >> 8) & 0xff;
96 u8 i2c = (reginfo >> 16) & 0x01;
100 i2c_addr = priv->cfg.i2c_address | (1 << 1); /* DVB-C */
102 i2c_addr = priv->cfg.i2c_address; /* DVB-T/T2 */
104 /* switch bank if needed */
105 if (bank != priv->bank[i2c]) {
106 ret = cxd2820r_wr_regs_i2c(priv, i2c_addr, 0x00, &bank, 1);
109 priv->bank[i2c] = bank;
111 return cxd2820r_wr_regs_i2c(priv, i2c_addr, reg, val, len);
114 /* read multiple registers */
115 int cxd2820r_rd_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
120 u8 reg = (reginfo >> 0) & 0xff;
121 u8 bank = (reginfo >> 8) & 0xff;
122 u8 i2c = (reginfo >> 16) & 0x01;
126 i2c_addr = priv->cfg.i2c_address | (1 << 1); /* DVB-C */
128 i2c_addr = priv->cfg.i2c_address; /* DVB-T/T2 */
130 /* switch bank if needed */
131 if (bank != priv->bank[i2c]) {
132 ret = cxd2820r_wr_regs_i2c(priv, i2c_addr, 0x00, &bank, 1);
135 priv->bank[i2c] = bank;
137 return cxd2820r_rd_regs_i2c(priv, i2c_addr, reg, val, len);
140 /* write single register */
141 int cxd2820r_wr_reg(struct cxd2820r_priv *priv, u32 reg, u8 val)
143 return cxd2820r_wr_regs(priv, reg, &val, 1);
146 /* read single register */
147 int cxd2820r_rd_reg(struct cxd2820r_priv *priv, u32 reg, u8 *val)
149 return cxd2820r_rd_regs(priv, reg, val, 1);
152 /* write single register with mask */
153 int cxd2820r_wr_reg_mask(struct cxd2820r_priv *priv, u32 reg, u8 val,
159 /* no need for read if whole reg is written */
161 ret = cxd2820r_rd_reg(priv, reg, &tmp);
170 return cxd2820r_wr_reg(priv, reg, val);
173 int cxd2820r_gpio(struct dvb_frontend *fe)
175 struct cxd2820r_priv *priv = fe->demodulator_priv;
177 u8 *gpio, tmp0, tmp1;
178 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
180 switch (fe->dtv_property_cache.delivery_system) {
182 gpio = priv->cfg.gpio_dvbt;
185 gpio = priv->cfg.gpio_dvbt2;
187 case SYS_DVBC_ANNEX_AC:
188 gpio = priv->cfg.gpio_dvbc;
195 /* update GPIOs only when needed */
196 if (!memcmp(gpio, priv->gpio, sizeof(priv->gpio)))
201 for (i = 0; i < sizeof(priv->gpio); i++) {
202 /* enable / disable */
203 if (gpio[i] & CXD2820R_GPIO_E)
204 tmp0 |= (2 << 6) >> (2 * i);
206 tmp0 |= (1 << 6) >> (2 * i);
209 if (gpio[i] & CXD2820R_GPIO_I)
210 tmp1 |= (1 << (3 + i));
212 tmp1 |= (0 << (3 + i));
215 if (gpio[i] & CXD2820R_GPIO_H)
216 tmp1 |= (1 << (0 + i));
218 tmp1 |= (0 << (0 + i));
220 dbg("%s: GPIO i=%d %02x %02x", __func__, i, tmp0, tmp1);
223 dbg("%s: wr gpio=%02x %02x", __func__, tmp0, tmp1);
225 /* write bits [7:2] */
226 ret = cxd2820r_wr_reg_mask(priv, 0x00089, tmp0, 0xfc);
230 /* write bits [5:0] */
231 ret = cxd2820r_wr_reg_mask(priv, 0x0008e, tmp1, 0x3f);
235 memcpy(priv->gpio, gpio, sizeof(priv->gpio));
239 dbg("%s: failed:%d", __func__, ret);
244 static int cxd2820r_lock(struct cxd2820r_priv *priv, int active_fe)
247 dbg("%s: active_fe=%d", __func__, active_fe);
249 mutex_lock(&priv->fe_lock);
251 /* -1=NONE, 0=DVB-T/T2, 1=DVB-C */
252 if (priv->active_fe == active_fe)
254 else if (priv->active_fe == -1)
255 priv->active_fe = active_fe;
259 mutex_unlock(&priv->fe_lock);
265 static void cxd2820r_unlock(struct cxd2820r_priv *priv, int active_fe)
267 dbg("%s: active_fe=%d", __func__, active_fe);
269 mutex_lock(&priv->fe_lock);
271 /* -1=NONE, 0=DVB-T/T2, 1=DVB-C */
272 if (priv->active_fe == active_fe)
273 priv->active_fe = -1;
275 mutex_unlock(&priv->fe_lock);
280 /* 64 bit div with round closest, like DIV_ROUND_CLOSEST but 64 bit */
281 u32 cxd2820r_div_u64_round_closest(u64 dividend, u32 divisor)
283 return div_u64(dividend + (divisor / 2), divisor);
286 static int cxd2820r_set_frontend(struct dvb_frontend *fe,
287 struct dvb_frontend_parameters *p)
289 struct cxd2820r_priv *priv = fe->demodulator_priv;
290 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
292 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
294 if (fe->ops.info.type == FE_OFDM) {
296 ret = cxd2820r_lock(priv, 0);
300 switch (priv->delivery_system) {
302 if (c->delivery_system == SYS_DVBT) {
304 ret = cxd2820r_set_frontend_t(fe, p);
306 /* SLEEP => DVB-T2 */
307 ret = cxd2820r_set_frontend_t2(fe, p);
311 if (c->delivery_system == SYS_DVBT) {
313 ret = cxd2820r_set_frontend_t(fe, p);
314 } else if (c->delivery_system == SYS_DVBT2) {
315 /* DVB-T => DVB-T2 */
316 ret = cxd2820r_sleep_t(fe);
317 ret = cxd2820r_set_frontend_t2(fe, p);
321 if (c->delivery_system == SYS_DVBT2) {
322 /* DVB-T2 => DVB-T2 */
323 ret = cxd2820r_set_frontend_t2(fe, p);
324 } else if (c->delivery_system == SYS_DVBT) {
325 /* DVB-T2 => DVB-T */
326 ret = cxd2820r_sleep_t2(fe);
327 ret = cxd2820r_set_frontend_t(fe, p);
331 dbg("%s: error state=%d", __func__,
332 priv->delivery_system);
337 ret = cxd2820r_lock(priv, 1);
341 ret = cxd2820r_set_frontend_c(fe, p);
347 static int cxd2820r_read_status(struct dvb_frontend *fe, fe_status_t *status)
349 struct cxd2820r_priv *priv = fe->demodulator_priv;
351 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
353 if (fe->ops.info.type == FE_OFDM) {
355 ret = cxd2820r_lock(priv, 0);
359 switch (fe->dtv_property_cache.delivery_system) {
361 ret = cxd2820r_read_status_t(fe, status);
364 ret = cxd2820r_read_status_t2(fe, status);
371 ret = cxd2820r_lock(priv, 1);
375 ret = cxd2820r_read_status_c(fe, status);
381 static int cxd2820r_get_frontend(struct dvb_frontend *fe,
382 struct dvb_frontend_parameters *p)
384 struct cxd2820r_priv *priv = fe->demodulator_priv;
386 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
388 if (fe->ops.info.type == FE_OFDM) {
390 ret = cxd2820r_lock(priv, 0);
394 switch (fe->dtv_property_cache.delivery_system) {
396 ret = cxd2820r_get_frontend_t(fe, p);
399 ret = cxd2820r_get_frontend_t2(fe, p);
406 ret = cxd2820r_lock(priv, 1);
410 ret = cxd2820r_get_frontend_c(fe, p);
416 static int cxd2820r_read_ber(struct dvb_frontend *fe, u32 *ber)
418 struct cxd2820r_priv *priv = fe->demodulator_priv;
420 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
422 if (fe->ops.info.type == FE_OFDM) {
424 ret = cxd2820r_lock(priv, 0);
428 switch (fe->dtv_property_cache.delivery_system) {
430 ret = cxd2820r_read_ber_t(fe, ber);
433 ret = cxd2820r_read_ber_t2(fe, ber);
440 ret = cxd2820r_lock(priv, 1);
444 ret = cxd2820r_read_ber_c(fe, ber);
450 static int cxd2820r_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
452 struct cxd2820r_priv *priv = fe->demodulator_priv;
454 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
456 if (fe->ops.info.type == FE_OFDM) {
458 ret = cxd2820r_lock(priv, 0);
462 switch (fe->dtv_property_cache.delivery_system) {
464 ret = cxd2820r_read_signal_strength_t(fe, strength);
467 ret = cxd2820r_read_signal_strength_t2(fe, strength);
474 ret = cxd2820r_lock(priv, 1);
478 ret = cxd2820r_read_signal_strength_c(fe, strength);
484 static int cxd2820r_read_snr(struct dvb_frontend *fe, u16 *snr)
486 struct cxd2820r_priv *priv = fe->demodulator_priv;
488 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
490 if (fe->ops.info.type == FE_OFDM) {
492 ret = cxd2820r_lock(priv, 0);
496 switch (fe->dtv_property_cache.delivery_system) {
498 ret = cxd2820r_read_snr_t(fe, snr);
501 ret = cxd2820r_read_snr_t2(fe, snr);
508 ret = cxd2820r_lock(priv, 1);
512 ret = cxd2820r_read_snr_c(fe, snr);
518 static int cxd2820r_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
520 struct cxd2820r_priv *priv = fe->demodulator_priv;
522 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
524 if (fe->ops.info.type == FE_OFDM) {
526 ret = cxd2820r_lock(priv, 0);
530 switch (fe->dtv_property_cache.delivery_system) {
532 ret = cxd2820r_read_ucblocks_t(fe, ucblocks);
535 ret = cxd2820r_read_ucblocks_t2(fe, ucblocks);
542 ret = cxd2820r_lock(priv, 1);
546 ret = cxd2820r_read_ucblocks_c(fe, ucblocks);
552 static int cxd2820r_init(struct dvb_frontend *fe)
554 struct cxd2820r_priv *priv = fe->demodulator_priv;
556 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
558 priv->delivery_system = SYS_UNDEFINED;
559 /* delivery system is unknown at that (init) phase */
561 if (fe->ops.info.type == FE_OFDM) {
563 ret = cxd2820r_lock(priv, 0);
567 ret = cxd2820r_init_t(fe);
570 ret = cxd2820r_lock(priv, 1);
574 ret = cxd2820r_init_c(fe);
580 static int cxd2820r_sleep(struct dvb_frontend *fe)
582 struct cxd2820r_priv *priv = fe->demodulator_priv;
584 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
586 if (fe->ops.info.type == FE_OFDM) {
588 ret = cxd2820r_lock(priv, 0);
592 switch (fe->dtv_property_cache.delivery_system) {
594 ret = cxd2820r_sleep_t(fe);
597 ret = cxd2820r_sleep_t2(fe);
603 cxd2820r_unlock(priv, 0);
606 ret = cxd2820r_lock(priv, 1);
610 ret = cxd2820r_sleep_c(fe);
612 cxd2820r_unlock(priv, 1);
618 static int cxd2820r_get_tune_settings(struct dvb_frontend *fe,
619 struct dvb_frontend_tune_settings *s)
621 struct cxd2820r_priv *priv = fe->demodulator_priv;
623 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
625 if (fe->ops.info.type == FE_OFDM) {
627 ret = cxd2820r_lock(priv, 0);
631 switch (fe->dtv_property_cache.delivery_system) {
633 ret = cxd2820r_get_tune_settings_t(fe, s);
636 ret = cxd2820r_get_tune_settings_t2(fe, s);
643 ret = cxd2820r_lock(priv, 1);
647 ret = cxd2820r_get_tune_settings_c(fe, s);
653 static enum dvbfe_search cxd2820r_search(struct dvb_frontend *fe,
654 struct dvb_frontend_parameters *p)
656 struct cxd2820r_priv *priv = fe->demodulator_priv;
657 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
659 fe_status_t status = 0;
660 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
662 /* switch between DVB-T and DVB-T2 when tune fails */
663 if (priv->last_tune_failed) {
664 if (priv->delivery_system == SYS_DVBT)
665 c->delivery_system = SYS_DVBT2;
667 c->delivery_system = SYS_DVBT;
671 ret = cxd2820r_set_frontend(fe, p);
676 /* frontend lock wait loop count */
677 switch (priv->delivery_system) {
690 /* wait frontend lock */
692 dbg("%s: LOOP=%d", __func__, i);
694 ret = cxd2820r_read_status(fe, &status);
698 if (status & FE_HAS_SIGNAL)
702 /* check if we have a valid signal */
704 priv->last_tune_failed = 0;
705 return DVBFE_ALGO_SEARCH_SUCCESS;
707 priv->last_tune_failed = 1;
708 return DVBFE_ALGO_SEARCH_AGAIN;
712 dbg("%s: failed:%d", __func__, ret);
713 return DVBFE_ALGO_SEARCH_ERROR;
716 static int cxd2820r_get_frontend_algo(struct dvb_frontend *fe)
718 return DVBFE_ALGO_CUSTOM;
721 static void cxd2820r_release(struct dvb_frontend *fe)
723 struct cxd2820r_priv *priv = fe->demodulator_priv;
726 if (fe->ops.info.type == FE_OFDM) {
727 i2c_del_adapter(&priv->tuner_i2c_adapter);
734 static u32 cxd2820r_tuner_i2c_func(struct i2c_adapter *adapter)
739 static int cxd2820r_tuner_i2c_xfer(struct i2c_adapter *i2c_adap,
740 struct i2c_msg msg[], int num)
742 struct cxd2820r_priv *priv = i2c_get_adapdata(i2c_adap);
743 u8 obuf[msg[0].len + 2];
744 struct i2c_msg msg2[2] = {
746 .addr = priv->cfg.i2c_address,
751 .addr = priv->cfg.i2c_address,
759 obuf[1] = (msg[0].addr << 1);
760 if (num == 2) { /* I2C read */
761 obuf[1] = (msg[0].addr << 1) | I2C_M_RD; /* I2C RD flag */
762 msg2[0].len = sizeof(obuf) - 1; /* maybe HW bug ? */
764 memcpy(&obuf[2], msg[0].buf, msg[0].len);
766 return i2c_transfer(priv->i2c, msg2, num);
769 static struct i2c_algorithm cxd2820r_tuner_i2c_algo = {
770 .master_xfer = cxd2820r_tuner_i2c_xfer,
771 .functionality = cxd2820r_tuner_i2c_func,
774 struct i2c_adapter *cxd2820r_get_tuner_i2c_adapter(struct dvb_frontend *fe)
776 struct cxd2820r_priv *priv = fe->demodulator_priv;
777 return &priv->tuner_i2c_adapter;
779 EXPORT_SYMBOL(cxd2820r_get_tuner_i2c_adapter);
781 static struct dvb_frontend_ops cxd2820r_ops[2];
783 struct dvb_frontend *cxd2820r_attach(const struct cxd2820r_config *cfg,
784 struct i2c_adapter *i2c, struct dvb_frontend *fe)
787 struct cxd2820r_priv *priv = NULL;
792 /* allocate memory for the internal priv */
793 priv = kzalloc(sizeof(struct cxd2820r_priv), GFP_KERNEL);
799 memcpy(&priv->cfg, cfg, sizeof(struct cxd2820r_config));
800 mutex_init(&priv->fe_lock);
802 priv->active_fe = -1; /* NONE */
804 /* check if the demod is there */
805 priv->bank[0] = priv->bank[1] = 0xff;
806 ret = cxd2820r_rd_reg(priv, 0x000fd, &tmp);
807 dbg("%s: chip id=%02x", __func__, tmp);
808 if (ret || tmp != 0xe1)
811 /* create frontends */
812 memcpy(&priv->fe[0].ops, &cxd2820r_ops[0],
813 sizeof(struct dvb_frontend_ops));
814 memcpy(&priv->fe[1].ops, &cxd2820r_ops[1],
815 sizeof(struct dvb_frontend_ops));
817 priv->fe[0].demodulator_priv = priv;
818 priv->fe[1].demodulator_priv = priv;
820 /* create tuner i2c adapter */
821 strlcpy(priv->tuner_i2c_adapter.name,
822 "CXD2820R tuner I2C adapter",
823 sizeof(priv->tuner_i2c_adapter.name));
824 priv->tuner_i2c_adapter.algo = &cxd2820r_tuner_i2c_algo;
825 priv->tuner_i2c_adapter.algo_data = NULL;
826 i2c_set_adapdata(&priv->tuner_i2c_adapter, priv);
827 if (i2c_add_adapter(&priv->tuner_i2c_adapter) < 0) {
828 err("tuner I2C bus could not be initialized");
835 /* FE1: FE0 given as pointer, just return FE1 we have
837 priv = fe->demodulator_priv;
845 EXPORT_SYMBOL(cxd2820r_attach);
847 static struct dvb_frontend_ops cxd2820r_ops[2] = {
851 .name = "Sony CXD2820R (DVB-T/T2)",
854 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 |
855 FE_CAN_FEC_3_4 | FE_CAN_FEC_5_6 |
856 FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
857 FE_CAN_QPSK | FE_CAN_QAM_16 |
858 FE_CAN_QAM_64 | FE_CAN_QAM_256 |
860 FE_CAN_TRANSMISSION_MODE_AUTO |
861 FE_CAN_GUARD_INTERVAL_AUTO |
862 FE_CAN_HIERARCHY_AUTO |
867 .release = cxd2820r_release,
868 .init = cxd2820r_init,
869 .sleep = cxd2820r_sleep,
871 .get_tune_settings = cxd2820r_get_tune_settings,
873 .get_frontend = cxd2820r_get_frontend,
875 .get_frontend_algo = cxd2820r_get_frontend_algo,
876 .search = cxd2820r_search,
878 .read_status = cxd2820r_read_status,
879 .read_snr = cxd2820r_read_snr,
880 .read_ber = cxd2820r_read_ber,
881 .read_ucblocks = cxd2820r_read_ucblocks,
882 .read_signal_strength = cxd2820r_read_signal_strength,
887 .name = "Sony CXD2820R (DVB-C)",
890 FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 |
891 FE_CAN_QAM_128 | FE_CAN_QAM_256 |
895 .release = cxd2820r_release,
896 .init = cxd2820r_init,
897 .sleep = cxd2820r_sleep,
899 .get_tune_settings = cxd2820r_get_tune_settings,
901 .set_frontend = cxd2820r_set_frontend,
902 .get_frontend = cxd2820r_get_frontend,
904 .read_status = cxd2820r_read_status,
905 .read_snr = cxd2820r_read_snr,
906 .read_ber = cxd2820r_read_ber,
907 .read_ucblocks = cxd2820r_read_ucblocks,
908 .read_signal_strength = cxd2820r_read_signal_strength,
913 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
914 MODULE_DESCRIPTION("Sony CXD2820R demodulator driver");
915 MODULE_LICENSE("GPL");