2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
21 * We need the mmu code to access both 32-bit and 64-bit guest ptes,
22 * so the code in this file is compiled twice, once per pte size.
26 #define pt_element_t u64
27 #define guest_walker guest_walker64
28 #define FNAME(name) paging##64_##name
29 #define PT_BASE_ADDR_MASK PT64_BASE_ADDR_MASK
30 #define PT_DIR_BASE_ADDR_MASK PT64_DIR_BASE_ADDR_MASK
31 #define PT_INDEX(addr, level) PT64_INDEX(addr, level)
32 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
33 #define PT_LEVEL_MASK(level) PT64_LEVEL_MASK(level)
34 #define PT_PTE_COPY_MASK PT64_PTE_COPY_MASK
36 #define pt_element_t u32
37 #define guest_walker guest_walker32
38 #define FNAME(name) paging##32_##name
39 #define PT_BASE_ADDR_MASK PT32_BASE_ADDR_MASK
40 #define PT_DIR_BASE_ADDR_MASK PT32_DIR_BASE_ADDR_MASK
41 #define PT_INDEX(addr, level) PT32_INDEX(addr, level)
42 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
43 #define PT_LEVEL_MASK(level) PT32_LEVEL_MASK(level)
44 #define PT_PTE_COPY_MASK PT32_PTE_COPY_MASK
46 #error Invalid PTTYPE value
50 * The guest_walker structure emulates the behavior of the hardware page
57 pt_element_t inherited_ar;
60 static void FNAME(init_walker)(struct guest_walker *walker,
61 struct kvm_vcpu *vcpu)
64 struct kvm_memory_slot *slot;
66 walker->level = vcpu->mmu.root_level;
67 walker->table_gfn = (vcpu->cr3 & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
68 slot = gfn_to_memslot(vcpu->kvm, walker->table_gfn);
69 hpa = safe_gpa_to_hpa(vcpu, vcpu->cr3 & PT64_BASE_ADDR_MASK);
70 walker->table = kmap_atomic(pfn_to_page(hpa >> PAGE_SHIFT), KM_USER0);
72 ASSERT((!is_long_mode(vcpu) && is_pae(vcpu)) ||
73 (vcpu->cr3 & ~(PAGE_MASK | CR3_FLAGS_MASK)) == 0);
75 walker->table = (pt_element_t *)( (unsigned long)walker->table |
76 (unsigned long)(vcpu->cr3 & ~(PAGE_MASK | CR3_FLAGS_MASK)) );
77 walker->inherited_ar = PT_USER_MASK | PT_WRITABLE_MASK;
80 static void FNAME(release_walker)(struct guest_walker *walker)
82 kunmap_atomic(walker->table, KM_USER0);
85 static void FNAME(set_pte)(struct kvm_vcpu *vcpu, u64 guest_pte,
86 u64 *shadow_pte, u64 access_bits)
88 ASSERT(*shadow_pte == 0);
89 access_bits &= guest_pte;
90 *shadow_pte = (guest_pte & PT_PTE_COPY_MASK);
91 set_pte_common(vcpu, shadow_pte, guest_pte & PT_BASE_ADDR_MASK,
92 guest_pte & PT_DIRTY_MASK, access_bits);
95 static void FNAME(set_pde)(struct kvm_vcpu *vcpu, u64 guest_pde,
96 u64 *shadow_pte, u64 access_bits,
101 ASSERT(*shadow_pte == 0);
102 access_bits &= guest_pde;
103 gaddr = (guest_pde & PT_DIR_BASE_ADDR_MASK) + PAGE_SIZE * index;
104 if (PTTYPE == 32 && is_cpuid_PSE36())
105 gaddr |= (guest_pde & PT32_DIR_PSE36_MASK) <<
106 (32 - PT32_DIR_PSE36_SHIFT);
107 *shadow_pte = guest_pde & PT_PTE_COPY_MASK;
108 set_pte_common(vcpu, shadow_pte, gaddr,
109 guest_pde & PT_DIRTY_MASK, access_bits);
113 * Fetch a guest pte from a specific level in the paging hierarchy.
115 static pt_element_t *FNAME(fetch_guest)(struct kvm_vcpu *vcpu,
116 struct guest_walker *walker,
121 ASSERT(level > 0 && level <= walker->level);
124 int index = PT_INDEX(addr, walker->level);
127 ASSERT(((unsigned long)walker->table & PAGE_MASK) ==
128 ((unsigned long)&walker->table[index] & PAGE_MASK));
129 if (level == walker->level ||
130 !is_present_pte(walker->table[index]) ||
131 (walker->level == PT_DIRECTORY_LEVEL &&
132 (walker->table[index] & PT_PAGE_SIZE_MASK) &&
133 (PTTYPE == 64 || is_pse(vcpu))))
134 return &walker->table[index];
135 if (walker->level != 3 || is_long_mode(vcpu))
136 walker->inherited_ar &= walker->table[index];
137 walker->table_gfn = (walker->table[index] & PT_BASE_ADDR_MASK)
139 paddr = safe_gpa_to_hpa(vcpu, walker->table[index] & PT_BASE_ADDR_MASK);
140 kunmap_atomic(walker->table, KM_USER0);
141 walker->table = kmap_atomic(pfn_to_page(paddr >> PAGE_SHIFT),
148 * Fetch a shadow pte for a specific level in the paging hierarchy.
150 static u64 *FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr,
151 struct guest_walker *walker)
155 u64 *prev_shadow_ent = NULL;
157 shadow_addr = vcpu->mmu.root_hpa;
158 level = vcpu->mmu.shadow_root_level;
161 u32 index = SHADOW_PT_INDEX(addr, level);
162 u64 *shadow_ent = ((u64 *)__va(shadow_addr)) + index;
163 pt_element_t *guest_ent;
166 if (is_present_pte(*shadow_ent) || is_io_pte(*shadow_ent)) {
167 if (level == PT_PAGE_TABLE_LEVEL)
169 shadow_addr = *shadow_ent & PT64_BASE_ADDR_MASK;
170 prev_shadow_ent = shadow_ent;
174 if (PTTYPE == 32 && level > PT32_ROOT_LEVEL) {
175 ASSERT(level == PT32E_ROOT_LEVEL);
176 guest_ent = FNAME(fetch_guest)(vcpu, walker,
177 PT32_ROOT_LEVEL, addr);
179 guest_ent = FNAME(fetch_guest)(vcpu, walker,
182 if (!is_present_pte(*guest_ent))
185 /* Don't set accessed bit on PAE PDPTRs */
186 if (vcpu->mmu.root_level != 3 || walker->level != 3)
187 *guest_ent |= PT_ACCESSED_MASK;
189 if (level == PT_PAGE_TABLE_LEVEL) {
191 if (walker->level == PT_DIRECTORY_LEVEL) {
193 *prev_shadow_ent |= PT_SHADOW_PS_MARK;
194 FNAME(set_pde)(vcpu, *guest_ent, shadow_ent,
195 walker->inherited_ar,
196 PT_INDEX(addr, PT_PAGE_TABLE_LEVEL));
198 ASSERT(walker->level == PT_PAGE_TABLE_LEVEL);
199 FNAME(set_pte)(vcpu, *guest_ent, shadow_ent, walker->inherited_ar);
204 shadow_addr = kvm_mmu_alloc_page(vcpu, shadow_ent);
205 if (!VALID_PAGE(shadow_addr))
206 return ERR_PTR(-ENOMEM);
207 shadow_pte = shadow_addr | PT_PRESENT_MASK;
208 if (vcpu->mmu.root_level > 3 || level != 3)
209 shadow_pte |= PT_ACCESSED_MASK
210 | PT_WRITABLE_MASK | PT_USER_MASK;
211 *shadow_ent = shadow_pte;
212 prev_shadow_ent = shadow_ent;
217 * The guest faulted for write. We need to
219 * - check write permissions
220 * - update the guest pte dirty bit
221 * - update our own dirty page tracking structures
223 static int FNAME(fix_write_pf)(struct kvm_vcpu *vcpu,
225 struct guest_walker *walker,
229 pt_element_t *guest_ent;
233 if (is_writeble_pte(*shadow_ent))
236 writable_shadow = *shadow_ent & PT_SHADOW_WRITABLE_MASK;
239 * User mode access. Fail if it's a kernel page or a read-only
242 if (!(*shadow_ent & PT_SHADOW_USER_MASK) || !writable_shadow)
244 ASSERT(*shadow_ent & PT_USER_MASK);
247 * Kernel mode access. Fail if it's a read-only page and
248 * supervisor write protection is enabled.
250 if (!writable_shadow) {
251 if (is_write_protection(vcpu))
253 *shadow_ent &= ~PT_USER_MASK;
256 guest_ent = FNAME(fetch_guest)(vcpu, walker, PT_PAGE_TABLE_LEVEL, addr);
258 if (!is_present_pte(*guest_ent)) {
263 gfn = (*guest_ent & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
264 mark_page_dirty(vcpu->kvm, gfn);
265 *shadow_ent |= PT_WRITABLE_MASK;
266 *guest_ent |= PT_DIRTY_MASK;
267 rmap_add(vcpu->kvm, shadow_ent);
273 * Page fault handler. There are several causes for a page fault:
274 * - there is no shadow pte for the guest pte
275 * - write access through a shadow pte marked read only so that we can set
277 * - write access to a shadow pte marked read only so we can update the page
278 * dirty bitmap, when userspace requests it
279 * - mmio access; in this case we will never install a present shadow pte
280 * - normal guest page fault due to the guest pte marked not present, not
281 * writable, or not executable
283 * Returns: 1 if we need to emulate the instruction, 0 otherwise
285 static int FNAME(page_fault)(struct kvm_vcpu *vcpu, gva_t addr,
288 int write_fault = error_code & PFERR_WRITE_MASK;
289 int pte_present = error_code & PFERR_PRESENT_MASK;
290 int user_fault = error_code & PFERR_USER_MASK;
291 struct guest_walker walker;
296 * Look up the shadow pte for the faulting address.
299 FNAME(init_walker)(&walker, vcpu);
300 shadow_pte = FNAME(fetch)(vcpu, addr, &walker);
301 if (IS_ERR(shadow_pte)) { /* must be -ENOMEM */
302 nonpaging_flush(vcpu);
303 FNAME(release_walker)(&walker);
310 * The page is not mapped by the guest. Let the guest handle it.
313 inject_page_fault(vcpu, addr, error_code);
314 FNAME(release_walker)(&walker);
319 * Update the shadow pte.
322 fixed = FNAME(fix_write_pf)(vcpu, shadow_pte, &walker, addr,
325 fixed = fix_read_pf(shadow_pte);
327 FNAME(release_walker)(&walker);
330 * mmio: emulate if accessible, otherwise its a guest fault.
332 if (is_io_pte(*shadow_pte)) {
333 if (may_access(*shadow_pte, write_fault, user_fault))
335 pgprintk("%s: io work, no access\n", __FUNCTION__);
336 inject_page_fault(vcpu, addr,
337 error_code | PFERR_PRESENT_MASK);
342 * pte not present, guest page fault.
344 if (pte_present && !fixed) {
345 inject_page_fault(vcpu, addr, error_code);
354 static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr)
356 struct guest_walker walker;
357 pt_element_t guest_pte;
360 FNAME(init_walker)(&walker, vcpu);
361 guest_pte = *FNAME(fetch_guest)(vcpu, &walker, PT_PAGE_TABLE_LEVEL,
363 FNAME(release_walker)(&walker);
365 if (!is_present_pte(guest_pte))
368 if (walker.level == PT_DIRECTORY_LEVEL) {
369 ASSERT((guest_pte & PT_PAGE_SIZE_MASK));
370 ASSERT(PTTYPE == 64 || is_pse(vcpu));
372 gpa = (guest_pte & PT_DIR_BASE_ADDR_MASK) | (vaddr &
373 (PT_LEVEL_MASK(PT_PAGE_TABLE_LEVEL) | ~PAGE_MASK));
375 if (PTTYPE == 32 && is_cpuid_PSE36())
376 gpa |= (guest_pte & PT32_DIR_PSE36_MASK) <<
377 (32 - PT32_DIR_PSE36_SHIFT);
379 gpa = (guest_pte & PT_BASE_ADDR_MASK);
380 gpa |= (vaddr & ~PAGE_MASK);
389 #undef PT_BASE_ADDR_MASK
391 #undef SHADOW_PT_INDEX
393 #undef PT_PTE_COPY_MASK
394 #undef PT_NON_PTE_COPY_MASK
395 #undef PT_DIR_BASE_ADDR_MASK